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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -mattr=+unaligned-access-mode < %s | FileCheck --check-prefix=GFX9 %s3; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=hawaii -mattr=+unaligned-access-mode < %s | FileCheck --check-prefix=GFX7 %s4; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 -mattr=+unaligned-access-mode < %s | FileCheck --check-prefix=GFX10 %s5; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=+unaligned-access-mode < %s | FileCheck --check-prefix=GFX11 %s6 7; FixMe: need merge/unmerge artifact combine8 9; Unaligned DS access in available from GFX9 onwards.10; LDS alignment enforcement is controlled by a configuration register:11; SH_MEM_CONFIG.alignment_mode12 13define <4 x i32> @load_lds_v4i32_align1(ptr addrspace(3) %ptr) {14; GFX9-LABEL: load_lds_v4i32_align1:15; GFX9: ; %bb.0:16; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)17; GFX9-NEXT: ds_read_b128 v[0:3], v018; GFX9-NEXT: s_waitcnt lgkmcnt(0)19; GFX9-NEXT: s_setpc_b64 s[30:31]20;21; GFX7-LABEL: load_lds_v4i32_align1:22; GFX7: ; %bb.0:23; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)24; GFX7-NEXT: s_mov_b32 m0, -125; GFX7-NEXT: ds_read_u8 v1, v026; GFX7-NEXT: ds_read_u8 v2, v0 offset:127; GFX7-NEXT: ds_read_u8 v3, v0 offset:228; GFX7-NEXT: ds_read_u8 v4, v0 offset:329; GFX7-NEXT: ds_read_u8 v5, v0 offset:430; GFX7-NEXT: ds_read_u8 v6, v0 offset:531; GFX7-NEXT: ds_read_u8 v7, v0 offset:632; GFX7-NEXT: ds_read_u8 v8, v0 offset:733; GFX7-NEXT: s_waitcnt lgkmcnt(6)34; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v235; GFX7-NEXT: v_or_b32_e32 v1, v2, v136; GFX7-NEXT: s_waitcnt lgkmcnt(4)37; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v438; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v339; GFX7-NEXT: v_or_b32_e32 v2, v2, v340; GFX7-NEXT: v_or_b32_e32 v4, v2, v141; GFX7-NEXT: s_waitcnt lgkmcnt(2)42; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v643; GFX7-NEXT: s_waitcnt lgkmcnt(0)44; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v845; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v746; GFX7-NEXT: v_or_b32_e32 v1, v1, v547; GFX7-NEXT: v_or_b32_e32 v2, v2, v348; GFX7-NEXT: v_or_b32_e32 v1, v2, v149; GFX7-NEXT: ds_read_u8 v2, v0 offset:850; GFX7-NEXT: ds_read_u8 v3, v0 offset:951; GFX7-NEXT: ds_read_u8 v5, v0 offset:1052; GFX7-NEXT: ds_read_u8 v6, v0 offset:1153; GFX7-NEXT: ds_read_u8 v7, v0 offset:1254; GFX7-NEXT: ds_read_u8 v8, v0 offset:1355; GFX7-NEXT: ds_read_u8 v9, v0 offset:1456; GFX7-NEXT: ds_read_u8 v0, v0 offset:1557; GFX7-NEXT: s_waitcnt lgkmcnt(6)58; GFX7-NEXT: v_lshlrev_b32_e32 v3, 8, v359; GFX7-NEXT: v_or_b32_e32 v2, v3, v260; GFX7-NEXT: s_waitcnt lgkmcnt(4)61; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v662; GFX7-NEXT: v_lshlrev_b32_e32 v5, 16, v563; GFX7-NEXT: v_or_b32_e32 v3, v3, v564; GFX7-NEXT: v_or_b32_e32 v2, v3, v265; GFX7-NEXT: s_waitcnt lgkmcnt(2)66; GFX7-NEXT: v_lshlrev_b32_e32 v3, 8, v867; GFX7-NEXT: s_waitcnt lgkmcnt(0)68; GFX7-NEXT: v_lshlrev_b32_e32 v0, 24, v069; GFX7-NEXT: v_lshlrev_b32_e32 v5, 16, v970; GFX7-NEXT: v_or_b32_e32 v3, v3, v771; GFX7-NEXT: v_or_b32_e32 v0, v0, v572; GFX7-NEXT: v_or_b32_e32 v3, v0, v373; GFX7-NEXT: v_mov_b32_e32 v0, v474; GFX7-NEXT: s_setpc_b64 s[30:31]75;76; GFX10-LABEL: load_lds_v4i32_align1:77; GFX10: ; %bb.0:78; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)79; GFX10-NEXT: v_mov_b32_e32 v2, v080; GFX10-NEXT: ds_read2_b32 v[0:1], v0 offset1:181; GFX10-NEXT: ds_read2_b32 v[2:3], v2 offset0:2 offset1:382; GFX10-NEXT: s_waitcnt lgkmcnt(0)83; GFX10-NEXT: s_setpc_b64 s[30:31]84;85; GFX11-LABEL: load_lds_v4i32_align1:86; GFX11: ; %bb.0:87; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)88; GFX11-NEXT: ds_load_b128 v[0:3], v089; GFX11-NEXT: s_waitcnt lgkmcnt(0)90; GFX11-NEXT: s_setpc_b64 s[30:31]91 %load = load <4 x i32>, ptr addrspace(3) %ptr, align 192 ret <4 x i32> %load93}94 95define <3 x i32> @load_lds_v3i32_align1(ptr addrspace(3) %ptr) {96; GFX9-LABEL: load_lds_v3i32_align1:97; GFX9: ; %bb.0:98; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)99; GFX9-NEXT: ds_read_b96 v[0:2], v0100; GFX9-NEXT: s_waitcnt lgkmcnt(0)101; GFX9-NEXT: s_setpc_b64 s[30:31]102;103; GFX7-LABEL: load_lds_v3i32_align1:104; GFX7: ; %bb.0:105; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)106; GFX7-NEXT: s_mov_b32 m0, -1107; GFX7-NEXT: ds_read_u8 v1, v0108; GFX7-NEXT: ds_read_u8 v2, v0 offset:1109; GFX7-NEXT: ds_read_u8 v3, v0 offset:2110; GFX7-NEXT: ds_read_u8 v4, v0 offset:3111; GFX7-NEXT: ds_read_u8 v5, v0 offset:4112; GFX7-NEXT: ds_read_u8 v6, v0 offset:5113; GFX7-NEXT: ds_read_u8 v7, v0 offset:6114; GFX7-NEXT: ds_read_u8 v8, v0 offset:7115; GFX7-NEXT: s_waitcnt lgkmcnt(6)116; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2117; GFX7-NEXT: v_or_b32_e32 v1, v2, v1118; GFX7-NEXT: s_waitcnt lgkmcnt(4)119; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v4120; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3121; GFX7-NEXT: v_or_b32_e32 v2, v2, v3122; GFX7-NEXT: v_or_b32_e32 v3, v2, v1123; GFX7-NEXT: s_waitcnt lgkmcnt(2)124; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v6125; GFX7-NEXT: v_or_b32_e32 v1, v1, v5126; GFX7-NEXT: s_waitcnt lgkmcnt(1)127; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v7128; GFX7-NEXT: ds_read_u8 v5, v0 offset:8129; GFX7-NEXT: ds_read_u8 v6, v0 offset:9130; GFX7-NEXT: ds_read_u8 v7, v0 offset:10131; GFX7-NEXT: ds_read_u8 v0, v0 offset:11132; GFX7-NEXT: s_waitcnt lgkmcnt(4)133; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v8134; GFX7-NEXT: v_or_b32_e32 v2, v2, v4135; GFX7-NEXT: v_or_b32_e32 v1, v2, v1136; GFX7-NEXT: s_waitcnt lgkmcnt(2)137; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v6138; GFX7-NEXT: s_waitcnt lgkmcnt(0)139; GFX7-NEXT: v_lshlrev_b32_e32 v0, 24, v0140; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v7141; GFX7-NEXT: v_or_b32_e32 v2, v2, v5142; GFX7-NEXT: v_or_b32_e32 v0, v0, v4143; GFX7-NEXT: v_or_b32_e32 v2, v0, v2144; GFX7-NEXT: v_mov_b32_e32 v0, v3145; GFX7-NEXT: s_setpc_b64 s[30:31]146;147; GFX10-LABEL: load_lds_v3i32_align1:148; GFX10: ; %bb.0:149; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)150; GFX10-NEXT: v_mov_b32_e32 v2, v0151; GFX10-NEXT: ds_read2_b32 v[0:1], v0 offset1:1152; GFX10-NEXT: ds_read_b32 v2, v2 offset:8153; GFX10-NEXT: s_waitcnt lgkmcnt(0)154; GFX10-NEXT: s_setpc_b64 s[30:31]155;156; GFX11-LABEL: load_lds_v3i32_align1:157; GFX11: ; %bb.0:158; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)159; GFX11-NEXT: ds_load_b96 v[0:2], v0160; GFX11-NEXT: s_waitcnt lgkmcnt(0)161; GFX11-NEXT: s_setpc_b64 s[30:31]162 %load = load <3 x i32>, ptr addrspace(3) %ptr, align 1163 ret <3 x i32> %load164}165 166define void @store_lds_v4i32_align1(ptr addrspace(3) %out, <4 x i32> %x) {167; GFX9-LABEL: store_lds_v4i32_align1:168; GFX9: ; %bb.0:169; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)170; GFX9-NEXT: ds_write_b128 v0, v[1:4]171; GFX9-NEXT: s_waitcnt lgkmcnt(0)172; GFX9-NEXT: s_setpc_b64 s[30:31]173;174; GFX7-LABEL: store_lds_v4i32_align1:175; GFX7: ; %bb.0:176; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)177; GFX7-NEXT: s_mov_b32 m0, -1178; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v1179; GFX7-NEXT: v_bfe_u32 v6, v1, 8, 8180; GFX7-NEXT: ds_write_b8 v0, v1181; GFX7-NEXT: ds_write_b8 v0, v6 offset:1182; GFX7-NEXT: v_lshrrev_b32_e32 v1, 24, v1183; GFX7-NEXT: ds_write_b8 v0, v5 offset:2184; GFX7-NEXT: ds_write_b8 v0, v1 offset:3185; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v2186; GFX7-NEXT: v_bfe_u32 v5, v2, 8, 8187; GFX7-NEXT: ds_write_b8 v0, v2 offset:4188; GFX7-NEXT: ds_write_b8 v0, v5 offset:5189; GFX7-NEXT: v_lshrrev_b32_e32 v2, 24, v2190; GFX7-NEXT: ds_write_b8 v0, v1 offset:6191; GFX7-NEXT: ds_write_b8 v0, v2 offset:7192; GFX7-NEXT: v_bfe_u32 v2, v3, 8, 8193; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v3194; GFX7-NEXT: ds_write_b8 v0, v3 offset:8195; GFX7-NEXT: ds_write_b8 v0, v2 offset:9196; GFX7-NEXT: v_lshrrev_b32_e32 v2, 24, v3197; GFX7-NEXT: ds_write_b8 v0, v1 offset:10198; GFX7-NEXT: ds_write_b8 v0, v2 offset:11199; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v4200; GFX7-NEXT: v_bfe_u32 v2, v4, 8, 8201; GFX7-NEXT: ds_write_b8 v0, v4 offset:12202; GFX7-NEXT: ds_write_b8 v0, v2 offset:13203; GFX7-NEXT: v_lshrrev_b32_e32 v2, 24, v4204; GFX7-NEXT: ds_write_b8 v0, v1 offset:14205; GFX7-NEXT: ds_write_b8 v0, v2 offset:15206; GFX7-NEXT: s_waitcnt lgkmcnt(0)207; GFX7-NEXT: s_setpc_b64 s[30:31]208;209; GFX10-LABEL: store_lds_v4i32_align1:210; GFX10: ; %bb.0:211; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)212; GFX10-NEXT: ds_write2_b32 v0, v1, v2 offset1:1213; GFX10-NEXT: ds_write2_b32 v0, v3, v4 offset0:2 offset1:3214; GFX10-NEXT: s_waitcnt lgkmcnt(0)215; GFX10-NEXT: s_setpc_b64 s[30:31]216;217; GFX11-LABEL: store_lds_v4i32_align1:218; GFX11: ; %bb.0:219; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)220; GFX11-NEXT: ds_store_b128 v0, v[1:4]221; GFX11-NEXT: s_waitcnt lgkmcnt(0)222; GFX11-NEXT: s_setpc_b64 s[30:31]223 store <4 x i32> %x, ptr addrspace(3) %out, align 1224 ret void225}226 227define void @store_lds_v3i32_align1(ptr addrspace(3) %out, <3 x i32> %x) {228; GFX9-LABEL: store_lds_v3i32_align1:229; GFX9: ; %bb.0:230; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)231; GFX9-NEXT: ds_write_b96 v0, v[1:3]232; GFX9-NEXT: s_waitcnt lgkmcnt(0)233; GFX9-NEXT: s_setpc_b64 s[30:31]234;235; GFX7-LABEL: store_lds_v3i32_align1:236; GFX7: ; %bb.0:237; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)238; GFX7-NEXT: s_mov_b32 m0, -1239; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v1240; GFX7-NEXT: v_bfe_u32 v5, v1, 8, 8241; GFX7-NEXT: ds_write_b8 v0, v1242; GFX7-NEXT: ds_write_b8 v0, v5 offset:1243; GFX7-NEXT: v_lshrrev_b32_e32 v1, 24, v1244; GFX7-NEXT: ds_write_b8 v0, v4 offset:2245; GFX7-NEXT: ds_write_b8 v0, v1 offset:3246; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v2247; GFX7-NEXT: v_bfe_u32 v4, v2, 8, 8248; GFX7-NEXT: ds_write_b8 v0, v2 offset:4249; GFX7-NEXT: ds_write_b8 v0, v4 offset:5250; GFX7-NEXT: v_lshrrev_b32_e32 v2, 24, v2251; GFX7-NEXT: ds_write_b8 v0, v1 offset:6252; GFX7-NEXT: ds_write_b8 v0, v2 offset:7253; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v3254; GFX7-NEXT: v_bfe_u32 v2, v3, 8, 8255; GFX7-NEXT: ds_write_b8 v0, v3 offset:8256; GFX7-NEXT: ds_write_b8 v0, v2 offset:9257; GFX7-NEXT: v_lshrrev_b32_e32 v2, 24, v3258; GFX7-NEXT: ds_write_b8 v0, v1 offset:10259; GFX7-NEXT: ds_write_b8 v0, v2 offset:11260; GFX7-NEXT: s_waitcnt lgkmcnt(0)261; GFX7-NEXT: s_setpc_b64 s[30:31]262;263; GFX10-LABEL: store_lds_v3i32_align1:264; GFX10: ; %bb.0:265; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)266; GFX10-NEXT: ds_write2_b32 v0, v1, v2 offset1:1267; GFX10-NEXT: ds_write_b32 v0, v3 offset:8268; GFX10-NEXT: s_waitcnt lgkmcnt(0)269; GFX10-NEXT: s_setpc_b64 s[30:31]270;271; GFX11-LABEL: store_lds_v3i32_align1:272; GFX11: ; %bb.0:273; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)274; GFX11-NEXT: ds_store_b96 v0, v[1:3]275; GFX11-NEXT: s_waitcnt lgkmcnt(0)276; GFX11-NEXT: s_setpc_b64 s[30:31]277 store <3 x i32> %x, ptr addrspace(3) %out, align 1278 ret void279}280 281define amdgpu_ps void @test_s_load_constant_v8i32_align1(ptr addrspace(4) inreg %ptr, ptr addrspace(1) inreg %out) {282; GFX9-LABEL: test_s_load_constant_v8i32_align1:283; GFX9: ; %bb.0:284; GFX9-NEXT: v_mov_b32_e32 v8, 0285; GFX9-NEXT: global_load_dwordx4 v[0:3], v8, s[0:1]286; GFX9-NEXT: global_load_dwordx4 v[4:7], v8, s[0:1] offset:16287; GFX9-NEXT: s_waitcnt vmcnt(1)288; GFX9-NEXT: v_readfirstlane_b32 s4, v0289; GFX9-NEXT: v_readfirstlane_b32 s5, v1290; GFX9-NEXT: v_readfirstlane_b32 s6, v2291; GFX9-NEXT: v_readfirstlane_b32 s7, v3292; GFX9-NEXT: s_waitcnt vmcnt(0)293; GFX9-NEXT: v_readfirstlane_b32 s8, v4294; GFX9-NEXT: v_mov_b32_e32 v0, s4295; GFX9-NEXT: v_readfirstlane_b32 s9, v5296; GFX9-NEXT: v_readfirstlane_b32 s10, v6297; GFX9-NEXT: v_readfirstlane_b32 s11, v7298; GFX9-NEXT: v_mov_b32_e32 v1, s5299; GFX9-NEXT: v_mov_b32_e32 v2, s6300; GFX9-NEXT: v_mov_b32_e32 v3, s7301; GFX9-NEXT: v_mov_b32_e32 v4, s8302; GFX9-NEXT: v_mov_b32_e32 v5, s9303; GFX9-NEXT: v_mov_b32_e32 v6, s10304; GFX9-NEXT: v_mov_b32_e32 v7, s11305; GFX9-NEXT: global_store_dwordx4 v8, v[0:3], s[2:3]306; GFX9-NEXT: global_store_dwordx4 v8, v[4:7], s[2:3] offset:16307; GFX9-NEXT: s_endpgm308;309; GFX7-LABEL: test_s_load_constant_v8i32_align1:310; GFX7: ; %bb.0:311; GFX7-NEXT: s_mov_b32 s4, s2312; GFX7-NEXT: s_mov_b32 s5, s3313; GFX7-NEXT: s_mov_b32 s2, -1314; GFX7-NEXT: s_mov_b32 s3, 0xf000315; GFX7-NEXT: buffer_load_dwordx4 v[0:3], off, s[0:3], 0316; GFX7-NEXT: buffer_load_dwordx4 v[4:7], off, s[0:3], 0 offset:16317; GFX7-NEXT: s_mov_b64 s[6:7], s[2:3]318; GFX7-NEXT: s_waitcnt vmcnt(1)319; GFX7-NEXT: v_readfirstlane_b32 s0, v0320; GFX7-NEXT: v_readfirstlane_b32 s1, v1321; GFX7-NEXT: v_readfirstlane_b32 s2, v2322; GFX7-NEXT: v_readfirstlane_b32 s3, v3323; GFX7-NEXT: s_waitcnt vmcnt(0)324; GFX7-NEXT: v_readfirstlane_b32 s8, v4325; GFX7-NEXT: v_mov_b32_e32 v0, s0326; GFX7-NEXT: v_readfirstlane_b32 s9, v5327; GFX7-NEXT: v_readfirstlane_b32 s10, v6328; GFX7-NEXT: v_readfirstlane_b32 s11, v7329; GFX7-NEXT: v_mov_b32_e32 v1, s1330; GFX7-NEXT: v_mov_b32_e32 v2, s2331; GFX7-NEXT: v_mov_b32_e32 v3, s3332; GFX7-NEXT: v_mov_b32_e32 v4, s8333; GFX7-NEXT: v_mov_b32_e32 v5, s9334; GFX7-NEXT: v_mov_b32_e32 v6, s10335; GFX7-NEXT: v_mov_b32_e32 v7, s11336; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0337; GFX7-NEXT: buffer_store_dwordx4 v[4:7], off, s[4:7], 0 offset:16338; GFX7-NEXT: s_endpgm339;340; GFX10-LABEL: test_s_load_constant_v8i32_align1:341; GFX10: ; %bb.0:342; GFX10-NEXT: v_mov_b32_e32 v8, 0343; GFX10-NEXT: s_clause 0x1344; GFX10-NEXT: global_load_dwordx4 v[0:3], v8, s[0:1]345; GFX10-NEXT: global_load_dwordx4 v[4:7], v8, s[0:1] offset:16346; GFX10-NEXT: s_waitcnt vmcnt(1)347; GFX10-NEXT: v_readfirstlane_b32 s4, v0348; GFX10-NEXT: v_readfirstlane_b32 s5, v1349; GFX10-NEXT: v_readfirstlane_b32 s6, v2350; GFX10-NEXT: v_readfirstlane_b32 s7, v3351; GFX10-NEXT: s_waitcnt vmcnt(0)352; GFX10-NEXT: v_readfirstlane_b32 s8, v4353; GFX10-NEXT: v_readfirstlane_b32 s9, v5354; GFX10-NEXT: v_readfirstlane_b32 s10, v6355; GFX10-NEXT: v_readfirstlane_b32 s11, v7356; GFX10-NEXT: v_mov_b32_e32 v0, s4357; GFX10-NEXT: v_mov_b32_e32 v1, s5358; GFX10-NEXT: v_mov_b32_e32 v2, s6359; GFX10-NEXT: v_mov_b32_e32 v3, s7360; GFX10-NEXT: v_mov_b32_e32 v4, s8361; GFX10-NEXT: v_mov_b32_e32 v5, s9362; GFX10-NEXT: v_mov_b32_e32 v6, s10363; GFX10-NEXT: v_mov_b32_e32 v7, s11364; GFX10-NEXT: global_store_dwordx4 v8, v[0:3], s[2:3]365; GFX10-NEXT: global_store_dwordx4 v8, v[4:7], s[2:3] offset:16366; GFX10-NEXT: s_endpgm367;368; GFX11-LABEL: test_s_load_constant_v8i32_align1:369; GFX11: ; %bb.0:370; GFX11-NEXT: v_mov_b32_e32 v8, 0371; GFX11-NEXT: s_clause 0x1372; GFX11-NEXT: global_load_b128 v[0:3], v8, s[0:1]373; GFX11-NEXT: global_load_b128 v[4:7], v8, s[0:1] offset:16374; GFX11-NEXT: s_waitcnt vmcnt(1)375; GFX11-NEXT: v_readfirstlane_b32 s4, v0376; GFX11-NEXT: v_readfirstlane_b32 s5, v1377; GFX11-NEXT: v_readfirstlane_b32 s6, v2378; GFX11-NEXT: v_readfirstlane_b32 s7, v3379; GFX11-NEXT: s_waitcnt vmcnt(0)380; GFX11-NEXT: v_readfirstlane_b32 s8, v4381; GFX11-NEXT: v_readfirstlane_b32 s9, v5382; GFX11-NEXT: v_readfirstlane_b32 s10, v6383; GFX11-NEXT: v_readfirstlane_b32 s11, v7384; GFX11-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v3, s7385; GFX11-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_mov_b32 v2, s6386; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)387; GFX11-NEXT: v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v7, s11388; GFX11-NEXT: v_dual_mov_b32 v5, s9 :: v_dual_mov_b32 v6, s10389; GFX11-NEXT: s_clause 0x1390; GFX11-NEXT: global_store_b128 v8, v[0:3], s[2:3]391; GFX11-NEXT: global_store_b128 v8, v[4:7], s[2:3] offset:16392; GFX11-NEXT: s_endpgm393 %load = load <8 x i32>, ptr addrspace(4) %ptr, align 1394 store <8 x i32> %load, ptr addrspace(1) %out395 ret void396}397