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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select,machineverifier -o - %s | FileCheck -check-prefixes=GFX9 %s3 4---5name: foo6legalized: true7regBankSelected: true8machineFunctionInfo:9 mode:10 fp32-output-denormals: false11 fp32-input-denormals: false12body: |13 bb.0:14 ; GFX9-LABEL: name: foo15 ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr016 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr117 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1618 ; GFX9-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc19 ; GFX9-NEXT: [[S_LSHR_B32_1:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc20 ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[S_LSHR_B32_]]21 ; GFX9-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_LSHR_B32_1]]22 ; GFX9-NEXT: [[V_MAD_MIX_F32_:%[0-9]+]]:vgpr_32 = V_MAD_MIX_F32 9, [[COPY3]], 8, [[COPY3]], 8, [[COPY2]], 0, 0, 0, implicit $mode, implicit $exec23 ; GFX9-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[V_MAD_MIX_F32_]], implicit $exec24 ; GFX9-NEXT: $sgpr0 = COPY [[V_READFIRSTLANE_B32_]]25 ; GFX9-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr026 %0:sgpr(s32) = COPY $sgpr027 %1:sgpr(s32) = COPY $sgpr128 %2:sgpr(s32) = G_CONSTANT i32 1629 %3:sgpr(s32) = G_LSHR %0:sgpr, %2:sgpr(s32)30 %4:sgpr(s16) = G_TRUNC %3:sgpr(s32)31 %5:sgpr(s32) = G_LSHR %1:sgpr, %2:sgpr(s32)32 %6:sgpr(s16) = G_TRUNC %5:sgpr(s32)33 %7:vgpr(s16) = COPY %4:sgpr(s16)34 %8:vgpr(s32) = G_FPEXT %7:vgpr(s16)35 %9:vgpr(s16) = COPY %6:sgpr(s16)36 %10:vgpr(s32) = G_FPEXT %9:vgpr(s16)37 %11:vgpr(s32) = G_FNEG %10:vgpr38 %12:vgpr(s32) = G_FMAD %11:vgpr, %10:vgpr, %8:vgpr39 %13:sgpr(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %12:vgpr(s32)40 $sgpr0 = COPY %13:sgpr(s32)41 SI_RETURN_TO_EPILOG implicit $sgpr042...43