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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn -o - %s | FileCheck %s3 4define amdgpu_cs void @test1(i32 %arg1, <4 x i32> inreg %arg2, i32, ptr addrspace(6) inreg %arg3) {5; CHECK-LABEL: test1:6; CHECK: ; %bb.0: ; %.entry7; CHECK-NEXT: v_and_b32_e32 v3, 0x3ffffffc, v08; CHECK-NEXT: v_mov_b32_e32 v0, 119; CHECK-NEXT: v_mov_b32_e32 v1, 2210; CHECK-NEXT: v_mov_b32_e32 v2, 3311; CHECK-NEXT: v_lshlrev_b32_e32 v3, 2, v312; CHECK-NEXT: v_add_i32_e32 v4, vcc, s4, v313; CHECK-NEXT: v_mov_b32_e32 v3, 4414; CHECK-NEXT: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 offen15; CHECK-NEXT: s_endpgm16.entry:17 %bs1 = and i32 %arg1, 107374182018 %ep1 = getelementptr i32, ptr addrspace(6) %arg3, i32 %bs119 %ad1 = ptrtoint ptr addrspace(6) %ep1 to i3220 call void @llvm.amdgcn.raw.buffer.store.i32(i32 11, <4 x i32> %arg2, i32 %ad1, i32 0, i32 0)21 22 %bs2 = or disjoint i32 %bs1, 123 %ep2 = getelementptr i32, ptr addrspace(6) %arg3, i32 %bs224 %ad2 = ptrtoint ptr addrspace(6) %ep2 to i3225 call void @llvm.amdgcn.raw.buffer.store.i32(i32 22, <4 x i32> %arg2, i32 %ad2, i32 0, i32 0)26 27 %bs3 = or disjoint i32 %bs1, 228 %ep3 = getelementptr i32, ptr addrspace(6) %arg3, i32 %bs329 %ad3 = ptrtoint ptr addrspace(6) %ep3 to i3230 call void @llvm.amdgcn.raw.buffer.store.i32(i32 33, <4 x i32> %arg2, i32 %ad3, i32 0, i32 0)31 32 %bs4 = or disjoint i32 %bs1, 333 %ep4 = getelementptr i32, ptr addrspace(6) %arg3, i32 %bs434 %ad4 = ptrtoint ptr addrspace(6) %ep4 to i3235 call void @llvm.amdgcn.raw.buffer.store.i32(i32 44, <4 x i32> %arg2, i32 %ad4, i32 0, i32 0)36 37 ret void38}39 40define amdgpu_cs void @test1_ptr(i32 %arg1, ptr addrspace(8) inreg %arg2, i32, ptr addrspace(6) inreg %arg3) {41; CHECK-LABEL: test1_ptr:42; CHECK: ; %bb.0: ; %.entry43; CHECK-NEXT: v_and_b32_e32 v3, 0x3ffffffc, v044; CHECK-NEXT: v_mov_b32_e32 v0, 1145; CHECK-NEXT: v_mov_b32_e32 v1, 2246; CHECK-NEXT: v_mov_b32_e32 v2, 3347; CHECK-NEXT: v_lshlrev_b32_e32 v3, 2, v348; CHECK-NEXT: v_add_i32_e32 v4, vcc, s4, v349; CHECK-NEXT: v_mov_b32_e32 v3, 4450; CHECK-NEXT: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 offen51; CHECK-NEXT: s_endpgm52.entry:53 %bs1 = and i32 %arg1, 107374182054 %ep1 = getelementptr i32, ptr addrspace(6) %arg3, i32 %bs155 %ad1 = ptrtoint ptr addrspace(6) %ep1 to i3256 call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 11, ptr addrspace(8) %arg2, i32 %ad1, i32 0, i32 0)57 58 %bs2 = or disjoint i32 %bs1, 159 %ep2 = getelementptr i32, ptr addrspace(6) %arg3, i32 %bs260 %ad2 = ptrtoint ptr addrspace(6) %ep2 to i3261 call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 22, ptr addrspace(8) %arg2, i32 %ad2, i32 0, i32 0)62 63 %bs3 = or disjoint i32 %bs1, 264 %ep3 = getelementptr i32, ptr addrspace(6) %arg3, i32 %bs365 %ad3 = ptrtoint ptr addrspace(6) %ep3 to i3266 call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 33, ptr addrspace(8) %arg2, i32 %ad3, i32 0, i32 0)67 68 %bs4 = or disjoint i32 %bs1, 369 %ep4 = getelementptr i32, ptr addrspace(6) %arg3, i32 %bs470 %ad4 = ptrtoint ptr addrspace(6) %ep4 to i3271 call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 44, ptr addrspace(8) %arg2, i32 %ad4, i32 0, i32 0)72 73 ret void74}75 76define amdgpu_cs void @test2(i32 %arg1, <4 x i32> inreg %arg2) {77; CHECK-LABEL: test2:78; CHECK: ; %bb.0: ; %.entry79; CHECK-NEXT: v_and_b32_e32 v3, 0x3ffffffc, v080; CHECK-NEXT: v_mov_b32_e32 v0, 1181; CHECK-NEXT: v_mov_b32_e32 v1, 2282; CHECK-NEXT: v_mov_b32_e32 v2, 3383; CHECK-NEXT: v_lshlrev_b32_e32 v4, 2, v384; CHECK-NEXT: v_mov_b32_e32 v3, 4485; CHECK-NEXT: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 offen86; CHECK-NEXT: s_endpgm87.entry:88 %bs1 = and i32 %arg1, 107374182089 %ep1 = getelementptr <{ [64 x i32] }>, ptr addrspace(6) null, i32 0, i32 0, i32 %bs190 %ad1 = ptrtoint ptr addrspace(6) %ep1 to i3291 call void @llvm.amdgcn.raw.buffer.store.i32(i32 11, <4 x i32> %arg2, i32 %ad1, i32 0, i32 0)92 93 %bs2 = or disjoint i32 %bs1, 194 %ep2 = getelementptr <{ [64 x i32] }>, ptr addrspace(6) null, i32 0, i32 0, i32 %bs295 %ad2 = ptrtoint ptr addrspace(6) %ep2 to i3296 call void @llvm.amdgcn.raw.buffer.store.i32(i32 22, <4 x i32> %arg2, i32 %ad2, i32 0, i32 0)97 98 %bs3 = or disjoint i32 %bs1, 299 %ep3 = getelementptr <{ [64 x i32] }>, ptr addrspace(6) null, i32 0, i32 0, i32 %bs3100 %ad3 = ptrtoint ptr addrspace(6) %ep3 to i32101 call void @llvm.amdgcn.raw.buffer.store.i32(i32 33, <4 x i32> %arg2, i32 %ad3, i32 0, i32 0)102 103 %bs4 = or disjoint i32 %bs1, 3104 %ep4 = getelementptr <{ [64 x i32] }>, ptr addrspace(6) null, i32 0, i32 0, i32 %bs4105 %ad4 = ptrtoint ptr addrspace(6) %ep4 to i32106 call void @llvm.amdgcn.raw.buffer.store.i32(i32 44, <4 x i32> %arg2, i32 %ad4, i32 0, i32 0)107 108 ret void109}110 111define amdgpu_cs void @test2_ptr(i32 %arg1, ptr addrspace(8) inreg %arg2) {112; CHECK-LABEL: test2_ptr:113; CHECK: ; %bb.0: ; %.entry114; CHECK-NEXT: v_and_b32_e32 v3, 0x3ffffffc, v0115; CHECK-NEXT: v_mov_b32_e32 v0, 11116; CHECK-NEXT: v_mov_b32_e32 v1, 22117; CHECK-NEXT: v_mov_b32_e32 v2, 33118; CHECK-NEXT: v_lshlrev_b32_e32 v4, 2, v3119; CHECK-NEXT: v_mov_b32_e32 v3, 44120; CHECK-NEXT: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 offen121; CHECK-NEXT: s_endpgm122.entry:123 %bs1 = and i32 %arg1, 1073741820124 %ep1 = getelementptr <{ [64 x i32] }>, ptr addrspace(6) null, i32 0, i32 0, i32 %bs1125 %ad1 = ptrtoint ptr addrspace(6) %ep1 to i32126 call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 11, ptr addrspace(8) %arg2, i32 %ad1, i32 0, i32 0)127 128 %bs2 = or disjoint i32 %bs1, 1129 %ep2 = getelementptr <{ [64 x i32] }>, ptr addrspace(6) null, i32 0, i32 0, i32 %bs2130 %ad2 = ptrtoint ptr addrspace(6) %ep2 to i32131 call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 22, ptr addrspace(8) %arg2, i32 %ad2, i32 0, i32 0)132 133 %bs3 = or disjoint i32 %bs1, 2134 %ep3 = getelementptr <{ [64 x i32] }>, ptr addrspace(6) null, i32 0, i32 0, i32 %bs3135 %ad3 = ptrtoint ptr addrspace(6) %ep3 to i32136 call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 33, ptr addrspace(8) %arg2, i32 %ad3, i32 0, i32 0)137 138 %bs4 = or disjoint i32 %bs1, 3139 %ep4 = getelementptr <{ [64 x i32] }>, ptr addrspace(6) null, i32 0, i32 0, i32 %bs4140 %ad4 = ptrtoint ptr addrspace(6) %ep4 to i32141 call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 44, ptr addrspace(8) %arg2, i32 %ad4, i32 0, i32 0)142 143 ret void144}145 146declare void @llvm.amdgcn.raw.buffer.store.i32(i32, <4 x i32>, i32, i32, i32 immarg)147declare void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32, ptr addrspace(8), i32, i32, i32 immarg)148