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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx700 < %s | FileCheck -check-prefixes=GCN,GFX7 %s3; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx801 < %s | FileCheck -check-prefixes=GCN,GFX8 %s4; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX9 %s5; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10PLUS,GFX10 %s6; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16, -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX10PLUS,GFX11,GFX11-TRUE16 %s7; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16, -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX10PLUS,GFX11,GFX11-FAKE16 %s8; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefixes=GFX12 %s9 10define amdgpu_ps i16 @s_or_i16(i16 inreg %num, i16 inreg %den) {11; GCN-LABEL: s_or_i16:12; GCN: ; %bb.0:13; GCN-NEXT: s_or_b32 s0, s0, s114; GCN-NEXT: ; return to shader part epilog15;16; GFX10PLUS-LABEL: s_or_i16:17; GFX10PLUS: ; %bb.0:18; GFX10PLUS-NEXT: s_or_b32 s0, s0, s119; GFX10PLUS-NEXT: ; return to shader part epilog20;21; GFX12-LABEL: s_or_i16:22; GFX12: ; %bb.0:23; GFX12-NEXT: s_or_b32 s0, s0, s124; GFX12-NEXT: ; return to shader part epilog25 %result = or i16 %num, %den26 ret i16 %result27}28 29define i16 @v_or_i16(i16 %num, i16 %den) {30; GCN-LABEL: v_or_i16:31; GCN: ; %bb.0:32; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)33; GCN-NEXT: v_or_b32_e32 v0, v0, v134; GCN-NEXT: s_setpc_b64 s[30:31]35;36; GFX10PLUS-LABEL: v_or_i16:37; GFX10PLUS: ; %bb.0:38; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)39; GFX10PLUS-NEXT: v_or_b32_e32 v0, v0, v140; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]41;42; GFX12-LABEL: v_or_i16:43; GFX12: ; %bb.0:44; GFX12-NEXT: s_wait_loadcnt_dscnt 0x045; GFX12-NEXT: s_wait_expcnt 0x046; GFX12-NEXT: s_wait_samplecnt 0x047; GFX12-NEXT: s_wait_bvhcnt 0x048; GFX12-NEXT: s_wait_kmcnt 0x049; GFX12-NEXT: v_or_b32_e32 v0, v0, v150; GFX12-NEXT: s_setpc_b64 s[30:31]51 %result = or i16 %num, %den52 ret i16 %result53}54 55define amdgpu_ps zeroext i16 @s_or_i16_zeroext(i16 inreg zeroext %num, i16 inreg zeroext %den) {56; GFX7-LABEL: s_or_i16_zeroext:57; GFX7: ; %bb.0:58; GFX7-NEXT: s_or_b32 s0, s0, s159; GFX7-NEXT: ; return to shader part epilog60;61; GFX8-LABEL: s_or_i16_zeroext:62; GFX8: ; %bb.0:63; GFX8-NEXT: s_or_b32 s0, s0, s164; GFX8-NEXT: s_and_b32 s0, s0, 0xffff65; GFX8-NEXT: ; return to shader part epilog66;67; GFX9-LABEL: s_or_i16_zeroext:68; GFX9: ; %bb.0:69; GFX9-NEXT: s_or_b32 s0, s0, s170; GFX9-NEXT: s_and_b32 s0, s0, 0xffff71; GFX9-NEXT: ; return to shader part epilog72;73; GFX10PLUS-LABEL: s_or_i16_zeroext:74; GFX10PLUS: ; %bb.0:75; GFX10PLUS-NEXT: s_or_b32 s0, s0, s176; GFX10PLUS-NEXT: s_and_b32 s0, s0, 0xffff77; GFX10PLUS-NEXT: ; return to shader part epilog78;79; GFX12-LABEL: s_or_i16_zeroext:80; GFX12: ; %bb.0:81; GFX12-NEXT: s_or_b32 s0, s0, s182; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)83; GFX12-NEXT: s_and_b32 s0, s0, 0xffff84; GFX12-NEXT: ; return to shader part epilog85 %result = or i16 %num, %den86 ret i16 %result87}88 89define zeroext i16 @v_or_i16_zeroext(i16 zeroext %num, i16 zeroext %den) {90; GCN-LABEL: v_or_i16_zeroext:91; GCN: ; %bb.0:92; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)93; GCN-NEXT: v_or_b32_e32 v0, v0, v194; GCN-NEXT: s_setpc_b64 s[30:31]95;96; GFX10PLUS-LABEL: v_or_i16_zeroext:97; GFX10PLUS: ; %bb.0:98; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)99; GFX10PLUS-NEXT: v_or_b32_e32 v0, v0, v1100; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]101;102; GFX12-LABEL: v_or_i16_zeroext:103; GFX12: ; %bb.0:104; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0105; GFX12-NEXT: s_wait_expcnt 0x0106; GFX12-NEXT: s_wait_samplecnt 0x0107; GFX12-NEXT: s_wait_bvhcnt 0x0108; GFX12-NEXT: s_wait_kmcnt 0x0109; GFX12-NEXT: v_or_b32_e32 v0, v0, v1110; GFX12-NEXT: s_setpc_b64 s[30:31]111 %result = or i16 %num, %den112 ret i16 %result113}114 115define amdgpu_ps signext i16 @s_or_i16_signext(i16 inreg signext %num, i16 inreg signext %den) {116; GFX7-LABEL: s_or_i16_signext:117; GFX7: ; %bb.0:118; GFX7-NEXT: s_or_b32 s0, s0, s1119; GFX7-NEXT: ; return to shader part epilog120;121; GFX8-LABEL: s_or_i16_signext:122; GFX8: ; %bb.0:123; GFX8-NEXT: s_or_b32 s0, s0, s1124; GFX8-NEXT: s_sext_i32_i16 s0, s0125; GFX8-NEXT: ; return to shader part epilog126;127; GFX9-LABEL: s_or_i16_signext:128; GFX9: ; %bb.0:129; GFX9-NEXT: s_or_b32 s0, s0, s1130; GFX9-NEXT: s_sext_i32_i16 s0, s0131; GFX9-NEXT: ; return to shader part epilog132;133; GFX10PLUS-LABEL: s_or_i16_signext:134; GFX10PLUS: ; %bb.0:135; GFX10PLUS-NEXT: s_or_b32 s0, s0, s1136; GFX10PLUS-NEXT: s_sext_i32_i16 s0, s0137; GFX10PLUS-NEXT: ; return to shader part epilog138;139; GFX12-LABEL: s_or_i16_signext:140; GFX12: ; %bb.0:141; GFX12-NEXT: s_or_b32 s0, s0, s1142; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)143; GFX12-NEXT: s_sext_i32_i16 s0, s0144; GFX12-NEXT: ; return to shader part epilog145 %result = or i16 %num, %den146 ret i16 %result147}148 149define signext i16 @v_or_i16_signext(i16 signext %num, i16 signext %den) {150; GCN-LABEL: v_or_i16_signext:151; GCN: ; %bb.0:152; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)153; GCN-NEXT: v_or_b32_e32 v0, v0, v1154; GCN-NEXT: s_setpc_b64 s[30:31]155;156; GFX10PLUS-LABEL: v_or_i16_signext:157; GFX10PLUS: ; %bb.0:158; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)159; GFX10PLUS-NEXT: v_or_b32_e32 v0, v0, v1160; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]161;162; GFX12-LABEL: v_or_i16_signext:163; GFX12: ; %bb.0:164; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0165; GFX12-NEXT: s_wait_expcnt 0x0166; GFX12-NEXT: s_wait_samplecnt 0x0167; GFX12-NEXT: s_wait_bvhcnt 0x0168; GFX12-NEXT: s_wait_kmcnt 0x0169; GFX12-NEXT: v_or_b32_e32 v0, v0, v1170; GFX12-NEXT: s_setpc_b64 s[30:31]171 %result = or i16 %num, %den172 ret i16 %result173}174 175define amdgpu_ps i32 @s_or_i32(i32 inreg %num, i32 inreg %den) {176; GCN-LABEL: s_or_i32:177; GCN: ; %bb.0:178; GCN-NEXT: s_or_b32 s0, s0, s1179; GCN-NEXT: ; return to shader part epilog180;181; GFX10PLUS-LABEL: s_or_i32:182; GFX10PLUS: ; %bb.0:183; GFX10PLUS-NEXT: s_or_b32 s0, s0, s1184; GFX10PLUS-NEXT: ; return to shader part epilog185;186; GFX12-LABEL: s_or_i32:187; GFX12: ; %bb.0:188; GFX12-NEXT: s_or_b32 s0, s0, s1189; GFX12-NEXT: ; return to shader part epilog190 %result = or i32 %num, %den191 ret i32 %result192}193 194define i32 @v_or_i32(i32 %num, i32 %den) {195; GCN-LABEL: v_or_i32:196; GCN: ; %bb.0:197; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)198; GCN-NEXT: v_or_b32_e32 v0, v0, v1199; GCN-NEXT: s_setpc_b64 s[30:31]200;201; GFX10PLUS-LABEL: v_or_i32:202; GFX10PLUS: ; %bb.0:203; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)204; GFX10PLUS-NEXT: v_or_b32_e32 v0, v0, v1205; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]206;207; GFX12-LABEL: v_or_i32:208; GFX12: ; %bb.0:209; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0210; GFX12-NEXT: s_wait_expcnt 0x0211; GFX12-NEXT: s_wait_samplecnt 0x0212; GFX12-NEXT: s_wait_bvhcnt 0x0213; GFX12-NEXT: s_wait_kmcnt 0x0214; GFX12-NEXT: v_or_b32_e32 v0, v0, v1215; GFX12-NEXT: s_setpc_b64 s[30:31]216 %result = or i32 %num, %den217 ret i32 %result218}219 220define amdgpu_ps <2 x i32> @s_or_v2i32(<2 x i32> inreg %num, <2 x i32> inreg %den) {221; GCN-LABEL: s_or_v2i32:222; GCN: ; %bb.0:223; GCN-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]224; GCN-NEXT: ; return to shader part epilog225;226; GFX10PLUS-LABEL: s_or_v2i32:227; GFX10PLUS: ; %bb.0:228; GFX10PLUS-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]229; GFX10PLUS-NEXT: ; return to shader part epilog230;231; GFX12-LABEL: s_or_v2i32:232; GFX12: ; %bb.0:233; GFX12-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]234; GFX12-NEXT: ; return to shader part epilog235 %result = or <2 x i32> %num, %den236 ret <2 x i32> %result237}238 239define <2 x i32> @v_or_v2i32(<2 x i32> %num, <2 x i32> %den) {240; GCN-LABEL: v_or_v2i32:241; GCN: ; %bb.0:242; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)243; GCN-NEXT: v_or_b32_e32 v0, v0, v2244; GCN-NEXT: v_or_b32_e32 v1, v1, v3245; GCN-NEXT: s_setpc_b64 s[30:31]246;247; GFX10PLUS-LABEL: v_or_v2i32:248; GFX10PLUS: ; %bb.0:249; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)250; GFX10PLUS-NEXT: v_or_b32_e32 v0, v0, v2251; GFX10PLUS-NEXT: v_or_b32_e32 v1, v1, v3252; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]253;254; GFX12-LABEL: v_or_v2i32:255; GFX12: ; %bb.0:256; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0257; GFX12-NEXT: s_wait_expcnt 0x0258; GFX12-NEXT: s_wait_samplecnt 0x0259; GFX12-NEXT: s_wait_bvhcnt 0x0260; GFX12-NEXT: s_wait_kmcnt 0x0261; GFX12-NEXT: v_or_b32_e32 v0, v0, v2262; GFX12-NEXT: v_or_b32_e32 v1, v1, v3263; GFX12-NEXT: s_setpc_b64 s[30:31]264 %result = or <2 x i32> %num, %den265 ret <2 x i32> %result266}267 268define amdgpu_cs i33 @s_or_i33(i33 inreg %num, i33 inreg %den) {269; GCN-LABEL: s_or_i33:270; GCN: ; %bb.0:271; GCN-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]272; GCN-NEXT: ; return to shader part epilog273;274; GFX10PLUS-LABEL: s_or_i33:275; GFX10PLUS: ; %bb.0:276; GFX10PLUS-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]277; GFX10PLUS-NEXT: ; return to shader part epilog278;279; GFX12-LABEL: s_or_i33:280; GFX12: ; %bb.0:281; GFX12-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]282; GFX12-NEXT: ; return to shader part epilog283 %result = or i33 %num, %den284 ret i33 %result285}286 287define amdgpu_ps i64 @s_or_i64(i64 inreg %num, i64 inreg %den) {288; GCN-LABEL: s_or_i64:289; GCN: ; %bb.0:290; GCN-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]291; GCN-NEXT: ; return to shader part epilog292;293; GFX10PLUS-LABEL: s_or_i64:294; GFX10PLUS: ; %bb.0:295; GFX10PLUS-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]296; GFX10PLUS-NEXT: ; return to shader part epilog297;298; GFX12-LABEL: s_or_i64:299; GFX12: ; %bb.0:300; GFX12-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]301; GFX12-NEXT: ; return to shader part epilog302 %result = or i64 %num, %den303 ret i64 %result304}305 306define i64 @v_or_i64(i64 %num, i64 %den) {307; GCN-LABEL: v_or_i64:308; GCN: ; %bb.0:309; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)310; GCN-NEXT: v_or_b32_e32 v0, v0, v2311; GCN-NEXT: v_or_b32_e32 v1, v1, v3312; GCN-NEXT: s_setpc_b64 s[30:31]313;314; GFX10PLUS-LABEL: v_or_i64:315; GFX10PLUS: ; %bb.0:316; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)317; GFX10PLUS-NEXT: v_or_b32_e32 v0, v0, v2318; GFX10PLUS-NEXT: v_or_b32_e32 v1, v1, v3319; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]320;321; GFX12-LABEL: v_or_i64:322; GFX12: ; %bb.0:323; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0324; GFX12-NEXT: s_wait_expcnt 0x0325; GFX12-NEXT: s_wait_samplecnt 0x0326; GFX12-NEXT: s_wait_bvhcnt 0x0327; GFX12-NEXT: s_wait_kmcnt 0x0328; GFX12-NEXT: v_or_b32_e32 v0, v0, v2329; GFX12-NEXT: v_or_b32_e32 v1, v1, v3330; GFX12-NEXT: s_setpc_b64 s[30:31]331 %result = or i64 %num, %den332 ret i64 %result333}334 335define amdgpu_ps <3 x i32> @s_or_i96(i96 inreg %num, i96 inreg %den) {336; GCN-LABEL: s_or_i96:337; GCN: ; %bb.0:338; GCN-NEXT: s_mov_b32 s6, s3339; GCN-NEXT: s_mov_b32 s7, s4340; GCN-NEXT: s_or_b64 s[0:1], s[0:1], s[6:7]341; GCN-NEXT: s_or_b32 s2, s2, s5342; GCN-NEXT: ; return to shader part epilog343;344; GFX10PLUS-LABEL: s_or_i96:345; GFX10PLUS: ; %bb.0:346; GFX10PLUS-NEXT: s_mov_b32 s6, s3347; GFX10PLUS-NEXT: s_mov_b32 s7, s4348; GFX10PLUS-NEXT: s_or_b32 s2, s2, s5349; GFX10PLUS-NEXT: s_or_b64 s[0:1], s[0:1], s[6:7]350; GFX10PLUS-NEXT: ; return to shader part epilog351;352; GFX12-LABEL: s_or_i96:353; GFX12: ; %bb.0:354; GFX12-NEXT: s_mov_b32 s6, s3355; GFX12-NEXT: s_mov_b32 s7, s4356; GFX12-NEXT: s_or_b32 s2, s2, s5357; GFX12-NEXT: s_or_b64 s[0:1], s[0:1], s[6:7]358; GFX12-NEXT: ; return to shader part epilog359 %result = or i96 %num, %den360 %cast = bitcast i96 %result to <3 x i32>361 ret <3 x i32> %cast362}363 364define i96 @v_or_i96(i96 %num, i96 %den) {365; GCN-LABEL: v_or_i96:366; GCN: ; %bb.0:367; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)368; GCN-NEXT: v_or_b32_e32 v0, v0, v3369; GCN-NEXT: v_or_b32_e32 v1, v1, v4370; GCN-NEXT: v_or_b32_e32 v2, v2, v5371; GCN-NEXT: s_setpc_b64 s[30:31]372;373; GFX10PLUS-LABEL: v_or_i96:374; GFX10PLUS: ; %bb.0:375; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)376; GFX10PLUS-NEXT: v_or_b32_e32 v0, v0, v3377; GFX10PLUS-NEXT: v_or_b32_e32 v1, v1, v4378; GFX10PLUS-NEXT: v_or_b32_e32 v2, v2, v5379; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]380;381; GFX12-LABEL: v_or_i96:382; GFX12: ; %bb.0:383; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0384; GFX12-NEXT: s_wait_expcnt 0x0385; GFX12-NEXT: s_wait_samplecnt 0x0386; GFX12-NEXT: s_wait_bvhcnt 0x0387; GFX12-NEXT: s_wait_kmcnt 0x0388; GFX12-NEXT: v_or_b32_e32 v0, v0, v3389; GFX12-NEXT: v_or_b32_e32 v1, v1, v4390; GFX12-NEXT: v_or_b32_e32 v2, v2, v5391; GFX12-NEXT: s_setpc_b64 s[30:31]392 %result = or i96 %num, %den393 ret i96 %result394}395 396define amdgpu_ps <4 x i32> @s_or_i128(i128 inreg %num, i128 inreg %den) {397; GCN-LABEL: s_or_i128:398; GCN: ; %bb.0:399; GCN-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]400; GCN-NEXT: s_or_b64 s[2:3], s[2:3], s[6:7]401; GCN-NEXT: ; return to shader part epilog402;403; GFX10PLUS-LABEL: s_or_i128:404; GFX10PLUS: ; %bb.0:405; GFX10PLUS-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]406; GFX10PLUS-NEXT: s_or_b64 s[2:3], s[2:3], s[6:7]407; GFX10PLUS-NEXT: ; return to shader part epilog408;409; GFX12-LABEL: s_or_i128:410; GFX12: ; %bb.0:411; GFX12-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]412; GFX12-NEXT: s_or_b64 s[2:3], s[2:3], s[6:7]413; GFX12-NEXT: ; return to shader part epilog414 %result = or i128 %num, %den415 %cast = bitcast i128 %result to <4 x i32>416 ret <4 x i32> %cast417}418 419define i128 @v_or_i128(i128 %num, i128 %den) {420; GCN-LABEL: v_or_i128:421; GCN: ; %bb.0:422; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)423; GCN-NEXT: v_or_b32_e32 v0, v0, v4424; GCN-NEXT: v_or_b32_e32 v1, v1, v5425; GCN-NEXT: v_or_b32_e32 v2, v2, v6426; GCN-NEXT: v_or_b32_e32 v3, v3, v7427; GCN-NEXT: s_setpc_b64 s[30:31]428;429; GFX10PLUS-LABEL: v_or_i128:430; GFX10PLUS: ; %bb.0:431; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)432; GFX10PLUS-NEXT: v_or_b32_e32 v0, v0, v4433; GFX10PLUS-NEXT: v_or_b32_e32 v1, v1, v5434; GFX10PLUS-NEXT: v_or_b32_e32 v2, v2, v6435; GFX10PLUS-NEXT: v_or_b32_e32 v3, v3, v7436; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]437;438; GFX12-LABEL: v_or_i128:439; GFX12: ; %bb.0:440; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0441; GFX12-NEXT: s_wait_expcnt 0x0442; GFX12-NEXT: s_wait_samplecnt 0x0443; GFX12-NEXT: s_wait_bvhcnt 0x0444; GFX12-NEXT: s_wait_kmcnt 0x0445; GFX12-NEXT: v_or_b32_e32 v0, v0, v4446; GFX12-NEXT: v_or_b32_e32 v1, v1, v5447; GFX12-NEXT: v_or_b32_e32 v2, v2, v6448; GFX12-NEXT: v_or_b32_e32 v3, v3, v7449; GFX12-NEXT: s_setpc_b64 s[30:31]450 %result = or i128 %num, %den451 ret i128 %result452}453 454define amdgpu_ps <8 x i32> @s_or_i256(i256 inreg %num, i256 inreg %den) {455; GCN-LABEL: s_or_i256:456; GCN: ; %bb.0:457; GCN-NEXT: s_or_b64 s[0:1], s[0:1], s[8:9]458; GCN-NEXT: s_or_b64 s[2:3], s[2:3], s[10:11]459; GCN-NEXT: s_or_b64 s[4:5], s[4:5], s[12:13]460; GCN-NEXT: s_or_b64 s[6:7], s[6:7], s[14:15]461; GCN-NEXT: ; return to shader part epilog462;463; GFX10PLUS-LABEL: s_or_i256:464; GFX10PLUS: ; %bb.0:465; GFX10PLUS-NEXT: s_or_b64 s[0:1], s[0:1], s[8:9]466; GFX10PLUS-NEXT: s_or_b64 s[2:3], s[2:3], s[10:11]467; GFX10PLUS-NEXT: s_or_b64 s[4:5], s[4:5], s[12:13]468; GFX10PLUS-NEXT: s_or_b64 s[6:7], s[6:7], s[14:15]469; GFX10PLUS-NEXT: ; return to shader part epilog470;471; GFX12-LABEL: s_or_i256:472; GFX12: ; %bb.0:473; GFX12-NEXT: s_or_b64 s[0:1], s[0:1], s[8:9]474; GFX12-NEXT: s_or_b64 s[2:3], s[2:3], s[10:11]475; GFX12-NEXT: s_or_b64 s[4:5], s[4:5], s[12:13]476; GFX12-NEXT: s_or_b64 s[6:7], s[6:7], s[14:15]477; GFX12-NEXT: ; return to shader part epilog478 %result = or i256 %num, %den479 %cast = bitcast i256 %result to <8 x i32>480 ret <8 x i32> %cast481}482 483define i256 @v_or_i256(i256 %num, i256 %den) {484; GCN-LABEL: v_or_i256:485; GCN: ; %bb.0:486; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)487; GCN-NEXT: v_or_b32_e32 v0, v0, v8488; GCN-NEXT: v_or_b32_e32 v1, v1, v9489; GCN-NEXT: v_or_b32_e32 v2, v2, v10490; GCN-NEXT: v_or_b32_e32 v3, v3, v11491; GCN-NEXT: v_or_b32_e32 v4, v4, v12492; GCN-NEXT: v_or_b32_e32 v5, v5, v13493; GCN-NEXT: v_or_b32_e32 v6, v6, v14494; GCN-NEXT: v_or_b32_e32 v7, v7, v15495; GCN-NEXT: s_setpc_b64 s[30:31]496;497; GFX10PLUS-LABEL: v_or_i256:498; GFX10PLUS: ; %bb.0:499; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)500; GFX10PLUS-NEXT: v_or_b32_e32 v0, v0, v8501; GFX10PLUS-NEXT: v_or_b32_e32 v1, v1, v9502; GFX10PLUS-NEXT: v_or_b32_e32 v2, v2, v10503; GFX10PLUS-NEXT: v_or_b32_e32 v3, v3, v11504; GFX10PLUS-NEXT: v_or_b32_e32 v4, v4, v12505; GFX10PLUS-NEXT: v_or_b32_e32 v5, v5, v13506; GFX10PLUS-NEXT: v_or_b32_e32 v6, v6, v14507; GFX10PLUS-NEXT: v_or_b32_e32 v7, v7, v15508; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]509;510; GFX12-LABEL: v_or_i256:511; GFX12: ; %bb.0:512; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0513; GFX12-NEXT: s_wait_expcnt 0x0514; GFX12-NEXT: s_wait_samplecnt 0x0515; GFX12-NEXT: s_wait_bvhcnt 0x0516; GFX12-NEXT: s_wait_kmcnt 0x0517; GFX12-NEXT: v_or_b32_e32 v0, v0, v8518; GFX12-NEXT: v_or_b32_e32 v1, v1, v9519; GFX12-NEXT: v_or_b32_e32 v2, v2, v10520; GFX12-NEXT: v_or_b32_e32 v3, v3, v11521; GFX12-NEXT: v_or_b32_e32 v4, v4, v12522; GFX12-NEXT: v_or_b32_e32 v5, v5, v13523; GFX12-NEXT: v_or_b32_e32 v6, v6, v14524; GFX12-NEXT: v_or_b32_e32 v7, v7, v15525; GFX12-NEXT: s_setpc_b64 s[30:31]526 %result = or i256 %num, %den527 ret i256 %result528}529 530define amdgpu_ps void @s_or_u64_zext_with_vregs(ptr addrspace(1) %out, ptr addrspace(1) %in) {531; GFX7-LABEL: s_or_u64_zext_with_vregs:532; GFX7: ; %bb.0:533; GFX7-NEXT: s_mov_b32 s2, 0534; GFX7-NEXT: s_mov_b32 s3, 0xf000535; GFX7-NEXT: s_mov_b64 s[0:1], 0536; GFX7-NEXT: buffer_load_dword v2, v[2:3], s[0:3], 0 addr64537; GFX7-NEXT: v_mov_b32_e32 v3, 0538; GFX7-NEXT: s_waitcnt vmcnt(0)539; GFX7-NEXT: v_or_b32_e32 v2, 0x50, v2540; GFX7-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[0:3], 0 addr64541; GFX7-NEXT: s_endpgm542;543; GFX8-LABEL: s_or_u64_zext_with_vregs:544; GFX8: ; %bb.0:545; GFX8-NEXT: flat_load_dword v2, v[2:3]546; GFX8-NEXT: v_mov_b32_e32 v3, 0547; GFX8-NEXT: s_waitcnt vmcnt(0)548; GFX8-NEXT: v_or_b32_e32 v2, 0x50, v2549; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3]550; GFX8-NEXT: s_endpgm551;552; GFX9-LABEL: s_or_u64_zext_with_vregs:553; GFX9: ; %bb.0:554; GFX9-NEXT: global_load_dword v2, v[2:3], off555; GFX9-NEXT: v_mov_b32_e32 v3, 0556; GFX9-NEXT: s_waitcnt vmcnt(0)557; GFX9-NEXT: v_or_b32_e32 v2, 0x50, v2558; GFX9-NEXT: global_store_dwordx2 v[0:1], v[2:3], off559; GFX9-NEXT: s_endpgm560;561; GFX10-LABEL: s_or_u64_zext_with_vregs:562; GFX10: ; %bb.0:563; GFX10-NEXT: global_load_dword v2, v[2:3], off564; GFX10-NEXT: v_mov_b32_e32 v3, 0565; GFX10-NEXT: s_waitcnt vmcnt(0)566; GFX10-NEXT: v_or_b32_e32 v2, 0x50, v2567; GFX10-NEXT: global_store_dwordx2 v[0:1], v[2:3], off568; GFX10-NEXT: s_endpgm569;570; GFX11-LABEL: s_or_u64_zext_with_vregs:571; GFX11: ; %bb.0:572; GFX11-NEXT: global_load_b32 v2, v[2:3], off573; GFX11-NEXT: v_mov_b32_e32 v3, 0574; GFX11-NEXT: s_waitcnt vmcnt(0)575; GFX11-NEXT: v_or_b32_e32 v2, 0x50, v2576; GFX11-NEXT: global_store_b64 v[0:1], v[2:3], off577; GFX11-NEXT: s_endpgm578;579; GFX12-LABEL: s_or_u64_zext_with_vregs:580; GFX12: ; %bb.0:581; GFX12-NEXT: global_load_b32 v2, v[2:3], off582; GFX12-NEXT: v_mov_b32_e32 v3, 0583; GFX12-NEXT: s_wait_loadcnt 0x0584; GFX12-NEXT: v_or_b32_e32 v2, 0x50, v2585; GFX12-NEXT: global_store_b64 v[0:1], v[2:3], off586; GFX12-NEXT: s_endpgm587 %val = load i32, ptr addrspace(1) %in, align 4588 %ext = zext i32 %val to i64589 %or = or i64 %ext, 80590 store i64 %or, ptr addrspace(1) %out, align 8591 ret void592}593 594define amdgpu_kernel void @s_or_u64_zext_with_sregs(ptr addrspace(1) %out, ptr addrspace(1) %in) {595; GFX7-LABEL: s_or_u64_zext_with_sregs:596; GFX7: ; %bb.0:597; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9598; GFX7-NEXT: s_mov_b32 s5, 0599; GFX7-NEXT: s_waitcnt lgkmcnt(0)600; GFX7-NEXT: s_load_dword s3, s[2:3], 0x0601; GFX7-NEXT: s_mov_b32 s2, -1602; GFX7-NEXT: s_waitcnt lgkmcnt(0)603; GFX7-NEXT: s_or_b32 s4, s3, 0x50604; GFX7-NEXT: v_mov_b32_e32 v0, s4605; GFX7-NEXT: v_mov_b32_e32 v1, s5606; GFX7-NEXT: s_mov_b32 s3, 0xf000607; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0608; GFX7-NEXT: s_endpgm609;610; GFX8-LABEL: s_or_u64_zext_with_sregs:611; GFX8: ; %bb.0:612; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24613; GFX8-NEXT: s_waitcnt lgkmcnt(0)614; GFX8-NEXT: v_mov_b32_e32 v3, s1615; GFX8-NEXT: s_load_dword s2, s[2:3], 0x0616; GFX8-NEXT: s_mov_b32 s3, 0617; GFX8-NEXT: v_mov_b32_e32 v2, s0618; GFX8-NEXT: s_waitcnt lgkmcnt(0)619; GFX8-NEXT: s_or_b32 s2, s2, 0x50620; GFX8-NEXT: v_mov_b32_e32 v0, s2621; GFX8-NEXT: v_mov_b32_e32 v1, s3622; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]623; GFX8-NEXT: s_endpgm624;625; GFX9-LABEL: s_or_u64_zext_with_sregs:626; GFX9: ; %bb.0:627; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24628; GFX9-NEXT: v_mov_b32_e32 v2, 0629; GFX9-NEXT: s_waitcnt lgkmcnt(0)630; GFX9-NEXT: s_load_dword s2, s[2:3], 0x0631; GFX9-NEXT: s_mov_b32 s3, 0632; GFX9-NEXT: s_waitcnt lgkmcnt(0)633; GFX9-NEXT: s_or_b32 s2, s2, 0x50634; GFX9-NEXT: v_mov_b32_e32 v0, s2635; GFX9-NEXT: v_mov_b32_e32 v1, s3636; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]637; GFX9-NEXT: s_endpgm638;639; GFX10-LABEL: s_or_u64_zext_with_sregs:640; GFX10: ; %bb.0:641; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24642; GFX10-NEXT: v_mov_b32_e32 v2, 0643; GFX10-NEXT: s_waitcnt lgkmcnt(0)644; GFX10-NEXT: s_load_dword s2, s[2:3], 0x0645; GFX10-NEXT: s_mov_b32 s3, 0646; GFX10-NEXT: s_waitcnt lgkmcnt(0)647; GFX10-NEXT: s_or_b32 s2, s2, 0x50648; GFX10-NEXT: v_mov_b32_e32 v0, s2649; GFX10-NEXT: v_mov_b32_e32 v1, s3650; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]651; GFX10-NEXT: s_endpgm652;653; GFX11-LABEL: s_or_u64_zext_with_sregs:654; GFX11: ; %bb.0:655; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24656; GFX11-NEXT: v_mov_b32_e32 v2, 0657; GFX11-NEXT: s_waitcnt lgkmcnt(0)658; GFX11-NEXT: s_load_b32 s2, s[2:3], 0x0659; GFX11-NEXT: s_mov_b32 s3, 0660; GFX11-NEXT: s_waitcnt lgkmcnt(0)661; GFX11-NEXT: s_or_b32 s2, s2, 0x50662; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3663; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]664; GFX11-NEXT: s_endpgm665;666; GFX12-LABEL: s_or_u64_zext_with_sregs:667; GFX12: ; %bb.0:668; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24669; GFX12-NEXT: v_mov_b32_e32 v2, 0670; GFX12-NEXT: s_wait_kmcnt 0x0671; GFX12-NEXT: s_load_b32 s2, s[2:3], 0x0672; GFX12-NEXT: s_mov_b32 s3, 0673; GFX12-NEXT: s_wait_kmcnt 0x0674; GFX12-NEXT: s_or_b32 s2, s2, 0x50675; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)676; GFX12-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3677; GFX12-NEXT: global_store_b64 v2, v[0:1], s[0:1]678; GFX12-NEXT: s_endpgm679 %val = load i32, ptr addrspace(1) %in, align 4680 %ext = zext i32 %val to i64681 %or = or i64 %ext, 80682 store i64 %or, ptr addrspace(1) %out, align 8683 ret void684}685 686define amdgpu_ps void @s_or_u64_sext_with_vregs(ptr addrspace(1) %out, ptr addrspace(1) %in) {687; GFX7-LABEL: s_or_u64_sext_with_vregs:688; GFX7: ; %bb.0:689; GFX7-NEXT: s_mov_b32 s2, 0690; GFX7-NEXT: s_mov_b32 s3, 0xf000691; GFX7-NEXT: s_mov_b64 s[0:1], 0692; GFX7-NEXT: buffer_load_dword v2, v[2:3], s[0:3], 0 addr64693; GFX7-NEXT: s_waitcnt vmcnt(0)694; GFX7-NEXT: v_ashrrev_i32_e32 v3, 31, v2695; GFX7-NEXT: v_or_b32_e32 v2, 0x50, v2696; GFX7-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[0:3], 0 addr64697; GFX7-NEXT: s_endpgm698;699; GFX8-LABEL: s_or_u64_sext_with_vregs:700; GFX8: ; %bb.0:701; GFX8-NEXT: flat_load_dword v2, v[2:3]702; GFX8-NEXT: s_waitcnt vmcnt(0)703; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2704; GFX8-NEXT: v_or_b32_e32 v2, 0x50, v2705; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3]706; GFX8-NEXT: s_endpgm707;708; GFX9-LABEL: s_or_u64_sext_with_vregs:709; GFX9: ; %bb.0:710; GFX9-NEXT: global_load_dword v2, v[2:3], off711; GFX9-NEXT: s_waitcnt vmcnt(0)712; GFX9-NEXT: v_ashrrev_i32_e32 v3, 31, v2713; GFX9-NEXT: v_or_b32_e32 v2, 0x50, v2714; GFX9-NEXT: global_store_dwordx2 v[0:1], v[2:3], off715; GFX9-NEXT: s_endpgm716;717; GFX10-LABEL: s_or_u64_sext_with_vregs:718; GFX10: ; %bb.0:719; GFX10-NEXT: global_load_dword v2, v[2:3], off720; GFX10-NEXT: s_waitcnt vmcnt(0)721; GFX10-NEXT: v_ashrrev_i32_e32 v3, 31, v2722; GFX10-NEXT: v_or_b32_e32 v2, 0x50, v2723; GFX10-NEXT: global_store_dwordx2 v[0:1], v[2:3], off724; GFX10-NEXT: s_endpgm725;726; GFX11-LABEL: s_or_u64_sext_with_vregs:727; GFX11: ; %bb.0:728; GFX11-NEXT: global_load_b32 v2, v[2:3], off729; GFX11-NEXT: s_waitcnt vmcnt(0)730; GFX11-NEXT: v_ashrrev_i32_e32 v3, 31, v2731; GFX11-NEXT: v_or_b32_e32 v2, 0x50, v2732; GFX11-NEXT: global_store_b64 v[0:1], v[2:3], off733; GFX11-NEXT: s_endpgm734;735; GFX12-LABEL: s_or_u64_sext_with_vregs:736; GFX12: ; %bb.0:737; GFX12-NEXT: global_load_b32 v2, v[2:3], off738; GFX12-NEXT: s_wait_loadcnt 0x0739; GFX12-NEXT: v_ashrrev_i32_e32 v3, 31, v2740; GFX12-NEXT: v_or_b32_e32 v2, 0x50, v2741; GFX12-NEXT: global_store_b64 v[0:1], v[2:3], off742; GFX12-NEXT: s_endpgm743 %val = load i32, ptr addrspace(1) %in, align 4744 %ext = sext i32 %val to i64745 %or = or i64 %ext, 80746 store i64 %or, ptr addrspace(1) %out, align 8747 ret void748}749 750define amdgpu_kernel void @s_or_u64_sext_with_sregs(ptr addrspace(1) %out, ptr addrspace(1) %in) {751; GFX7-LABEL: s_or_u64_sext_with_sregs:752; GFX7: ; %bb.0:753; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9754; GFX7-NEXT: s_waitcnt lgkmcnt(0)755; GFX7-NEXT: s_load_dword s4, s[2:3], 0x0756; GFX7-NEXT: s_mov_b32 s2, -1757; GFX7-NEXT: s_mov_b32 s3, 0xf000758; GFX7-NEXT: s_waitcnt lgkmcnt(0)759; GFX7-NEXT: s_ashr_i32 s5, s4, 31760; GFX7-NEXT: s_or_b64 s[4:5], s[4:5], 0x50761; GFX7-NEXT: v_mov_b32_e32 v0, s4762; GFX7-NEXT: v_mov_b32_e32 v1, s5763; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0764; GFX7-NEXT: s_endpgm765;766; GFX8-LABEL: s_or_u64_sext_with_sregs:767; GFX8: ; %bb.0:768; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24769; GFX8-NEXT: s_waitcnt lgkmcnt(0)770; GFX8-NEXT: v_mov_b32_e32 v3, s1771; GFX8-NEXT: s_load_dword s2, s[2:3], 0x0772; GFX8-NEXT: v_mov_b32_e32 v2, s0773; GFX8-NEXT: s_waitcnt lgkmcnt(0)774; GFX8-NEXT: s_ashr_i32 s3, s2, 31775; GFX8-NEXT: s_or_b64 s[2:3], s[2:3], 0x50776; GFX8-NEXT: v_mov_b32_e32 v0, s2777; GFX8-NEXT: v_mov_b32_e32 v1, s3778; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]779; GFX8-NEXT: s_endpgm780;781; GFX9-LABEL: s_or_u64_sext_with_sregs:782; GFX9: ; %bb.0:783; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24784; GFX9-NEXT: v_mov_b32_e32 v2, 0785; GFX9-NEXT: s_waitcnt lgkmcnt(0)786; GFX9-NEXT: s_load_dword s2, s[2:3], 0x0787; GFX9-NEXT: s_waitcnt lgkmcnt(0)788; GFX9-NEXT: s_ashr_i32 s3, s2, 31789; GFX9-NEXT: s_or_b64 s[2:3], s[2:3], 0x50790; GFX9-NEXT: v_mov_b32_e32 v0, s2791; GFX9-NEXT: v_mov_b32_e32 v1, s3792; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]793; GFX9-NEXT: s_endpgm794;795; GFX10-LABEL: s_or_u64_sext_with_sregs:796; GFX10: ; %bb.0:797; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24798; GFX10-NEXT: v_mov_b32_e32 v2, 0799; GFX10-NEXT: s_waitcnt lgkmcnt(0)800; GFX10-NEXT: s_load_dword s2, s[2:3], 0x0801; GFX10-NEXT: s_waitcnt lgkmcnt(0)802; GFX10-NEXT: s_ashr_i32 s3, s2, 31803; GFX10-NEXT: s_or_b64 s[2:3], s[2:3], 0x50804; GFX10-NEXT: v_mov_b32_e32 v0, s2805; GFX10-NEXT: v_mov_b32_e32 v1, s3806; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]807; GFX10-NEXT: s_endpgm808;809; GFX11-LABEL: s_or_u64_sext_with_sregs:810; GFX11: ; %bb.0:811; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24812; GFX11-NEXT: v_mov_b32_e32 v2, 0813; GFX11-NEXT: s_waitcnt lgkmcnt(0)814; GFX11-NEXT: s_load_b32 s2, s[2:3], 0x0815; GFX11-NEXT: s_waitcnt lgkmcnt(0)816; GFX11-NEXT: s_ashr_i32 s3, s2, 31817; GFX11-NEXT: s_or_b64 s[2:3], s[2:3], 0x50818; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3819; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]820; GFX11-NEXT: s_endpgm821;822; GFX12-LABEL: s_or_u64_sext_with_sregs:823; GFX12: ; %bb.0:824; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24825; GFX12-NEXT: v_mov_b32_e32 v2, 0826; GFX12-NEXT: s_wait_kmcnt 0x0827; GFX12-NEXT: s_load_b32 s2, s[2:3], 0x0828; GFX12-NEXT: s_wait_kmcnt 0x0829; GFX12-NEXT: s_ashr_i32 s3, s2, 31830; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)831; GFX12-NEXT: s_or_b64 s[2:3], s[2:3], 0x50832; GFX12-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3833; GFX12-NEXT: global_store_b64 v2, v[0:1], s[0:1]834; GFX12-NEXT: s_endpgm835 %val = load i32, ptr addrspace(1) %in, align 4836 %ext = sext i32 %val to i64837 %or = or i64 %ext, 80838 store i64 %or, ptr addrspace(1) %out, align 8839 ret void840}841 842define <2 x i128> @v_or_v2i128(<2 x i128> %a, <2 x i128> %b) {843; GCN-LABEL: v_or_v2i128:844; GCN: ; %bb.0:845; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)846; GCN-NEXT: v_or_b32_e32 v0, v0, v8847; GCN-NEXT: v_or_b32_e32 v1, v1, v9848; GCN-NEXT: v_or_b32_e32 v2, v2, v10849; GCN-NEXT: v_or_b32_e32 v3, v3, v11850; GCN-NEXT: v_or_b32_e32 v4, v4, v12851; GCN-NEXT: v_or_b32_e32 v5, v5, v13852; GCN-NEXT: v_or_b32_e32 v6, v6, v14853; GCN-NEXT: v_or_b32_e32 v7, v7, v15854; GCN-NEXT: s_setpc_b64 s[30:31]855;856; GFX10PLUS-LABEL: v_or_v2i128:857; GFX10PLUS: ; %bb.0:858; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)859; GFX10PLUS-NEXT: v_or_b32_e32 v0, v0, v8860; GFX10PLUS-NEXT: v_or_b32_e32 v1, v1, v9861; GFX10PLUS-NEXT: v_or_b32_e32 v2, v2, v10862; GFX10PLUS-NEXT: v_or_b32_e32 v3, v3, v11863; GFX10PLUS-NEXT: v_or_b32_e32 v4, v4, v12864; GFX10PLUS-NEXT: v_or_b32_e32 v5, v5, v13865; GFX10PLUS-NEXT: v_or_b32_e32 v6, v6, v14866; GFX10PLUS-NEXT: v_or_b32_e32 v7, v7, v15867; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]868;869; GFX12-LABEL: v_or_v2i128:870; GFX12: ; %bb.0:871; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0872; GFX12-NEXT: s_wait_expcnt 0x0873; GFX12-NEXT: s_wait_samplecnt 0x0874; GFX12-NEXT: s_wait_bvhcnt 0x0875; GFX12-NEXT: s_wait_kmcnt 0x0876; GFX12-NEXT: v_or_b32_e32 v0, v0, v8877; GFX12-NEXT: v_or_b32_e32 v1, v1, v9878; GFX12-NEXT: v_or_b32_e32 v2, v2, v10879; GFX12-NEXT: v_or_b32_e32 v3, v3, v11880; GFX12-NEXT: v_or_b32_e32 v4, v4, v12881; GFX12-NEXT: v_or_b32_e32 v5, v5, v13882; GFX12-NEXT: v_or_b32_e32 v6, v6, v14883; GFX12-NEXT: v_or_b32_e32 v7, v7, v15884; GFX12-NEXT: s_setpc_b64 s[30:31]885 %or = or <2 x i128> %a, %b886 ret <2 x i128> %or887}888 889define <2 x i128> @v_or_v2i128_inline_imm(<2 x i128> %a) {890; GCN-LABEL: v_or_v2i128_inline_imm:891; GCN: ; %bb.0:892; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)893; GCN-NEXT: v_or_b32_e32 v0, 64, v0894; GCN-NEXT: v_or_b32_e32 v4, 64, v4895; GCN-NEXT: s_setpc_b64 s[30:31]896;897; GFX10PLUS-LABEL: v_or_v2i128_inline_imm:898; GFX10PLUS: ; %bb.0:899; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)900; GFX10PLUS-NEXT: v_or_b32_e32 v0, 64, v0901; GFX10PLUS-NEXT: v_or_b32_e32 v4, 64, v4902; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]903;904; GFX12-LABEL: v_or_v2i128_inline_imm:905; GFX12: ; %bb.0:906; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0907; GFX12-NEXT: s_wait_expcnt 0x0908; GFX12-NEXT: s_wait_samplecnt 0x0909; GFX12-NEXT: s_wait_bvhcnt 0x0910; GFX12-NEXT: s_wait_kmcnt 0x0911; GFX12-NEXT: v_or_b32_e32 v0, 64, v0912; GFX12-NEXT: v_or_b32_e32 v4, 64, v4913; GFX12-NEXT: s_setpc_b64 s[30:31]914 %or = or <2 x i128> %a, <i128 64, i128 64>915 ret <2 x i128> %or916}917 918define <3 x i128> @v_or_v3i128(<3 x i128> %a, <3 x i128> %b) {919; GCN-LABEL: v_or_v3i128:920; GCN: ; %bb.0:921; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)922; GCN-NEXT: v_or_b32_e32 v0, v0, v12923; GCN-NEXT: v_or_b32_e32 v1, v1, v13924; GCN-NEXT: v_or_b32_e32 v2, v2, v14925; GCN-NEXT: v_or_b32_e32 v3, v3, v15926; GCN-NEXT: v_or_b32_e32 v4, v4, v16927; GCN-NEXT: v_or_b32_e32 v5, v5, v17928; GCN-NEXT: v_or_b32_e32 v6, v6, v18929; GCN-NEXT: v_or_b32_e32 v7, v7, v19930; GCN-NEXT: v_or_b32_e32 v8, v8, v20931; GCN-NEXT: v_or_b32_e32 v9, v9, v21932; GCN-NEXT: v_or_b32_e32 v10, v10, v22933; GCN-NEXT: v_or_b32_e32 v11, v11, v23934; GCN-NEXT: s_setpc_b64 s[30:31]935;936; GFX10PLUS-LABEL: v_or_v3i128:937; GFX10PLUS: ; %bb.0:938; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)939; GFX10PLUS-NEXT: v_or_b32_e32 v0, v0, v12940; GFX10PLUS-NEXT: v_or_b32_e32 v1, v1, v13941; GFX10PLUS-NEXT: v_or_b32_e32 v2, v2, v14942; GFX10PLUS-NEXT: v_or_b32_e32 v3, v3, v15943; GFX10PLUS-NEXT: v_or_b32_e32 v4, v4, v16944; GFX10PLUS-NEXT: v_or_b32_e32 v5, v5, v17945; GFX10PLUS-NEXT: v_or_b32_e32 v6, v6, v18946; GFX10PLUS-NEXT: v_or_b32_e32 v7, v7, v19947; GFX10PLUS-NEXT: v_or_b32_e32 v8, v8, v20948; GFX10PLUS-NEXT: v_or_b32_e32 v9, v9, v21949; GFX10PLUS-NEXT: v_or_b32_e32 v10, v10, v22950; GFX10PLUS-NEXT: v_or_b32_e32 v11, v11, v23951; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]952;953; GFX12-LABEL: v_or_v3i128:954; GFX12: ; %bb.0:955; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0956; GFX12-NEXT: s_wait_expcnt 0x0957; GFX12-NEXT: s_wait_samplecnt 0x0958; GFX12-NEXT: s_wait_bvhcnt 0x0959; GFX12-NEXT: s_wait_kmcnt 0x0960; GFX12-NEXT: v_or_b32_e32 v0, v0, v12961; GFX12-NEXT: v_or_b32_e32 v1, v1, v13962; GFX12-NEXT: v_or_b32_e32 v2, v2, v14963; GFX12-NEXT: v_or_b32_e32 v3, v3, v15964; GFX12-NEXT: v_or_b32_e32 v4, v4, v16965; GFX12-NEXT: v_or_b32_e32 v5, v5, v17966; GFX12-NEXT: v_or_b32_e32 v6, v6, v18967; GFX12-NEXT: v_or_b32_e32 v7, v7, v19968; GFX12-NEXT: v_or_b32_e32 v8, v8, v20969; GFX12-NEXT: v_or_b32_e32 v9, v9, v21970; GFX12-NEXT: v_or_b32_e32 v10, v10, v22971; GFX12-NEXT: v_or_b32_e32 v11, v11, v23972; GFX12-NEXT: s_setpc_b64 s[30:31]973 %or = or <3 x i128> %a, %b974 ret <3 x i128> %or975}976 977define <1 x i128> @v_or_v1i128(<1 x i128> %a, <1 x i128> %b) {978; GCN-LABEL: v_or_v1i128:979; GCN: ; %bb.0:980; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)981; GCN-NEXT: v_or_b32_e32 v0, v0, v4982; GCN-NEXT: v_or_b32_e32 v1, v1, v5983; GCN-NEXT: v_or_b32_e32 v2, v2, v6984; GCN-NEXT: v_or_b32_e32 v3, v3, v7985; GCN-NEXT: s_setpc_b64 s[30:31]986;987; GFX10PLUS-LABEL: v_or_v1i128:988; GFX10PLUS: ; %bb.0:989; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)990; GFX10PLUS-NEXT: v_or_b32_e32 v0, v0, v4991; GFX10PLUS-NEXT: v_or_b32_e32 v1, v1, v5992; GFX10PLUS-NEXT: v_or_b32_e32 v2, v2, v6993; GFX10PLUS-NEXT: v_or_b32_e32 v3, v3, v7994; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]995;996; GFX12-LABEL: v_or_v1i128:997; GFX12: ; %bb.0:998; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0999; GFX12-NEXT: s_wait_expcnt 0x01000; GFX12-NEXT: s_wait_samplecnt 0x01001; GFX12-NEXT: s_wait_bvhcnt 0x01002; GFX12-NEXT: s_wait_kmcnt 0x01003; GFX12-NEXT: v_or_b32_e32 v0, v0, v41004; GFX12-NEXT: v_or_b32_e32 v1, v1, v51005; GFX12-NEXT: v_or_b32_e32 v2, v2, v61006; GFX12-NEXT: v_or_b32_e32 v3, v3, v71007; GFX12-NEXT: s_setpc_b64 s[30:31]1008 %or = or <1 x i128> %a, %b1009 ret <1 x i128> %or1010}1011 1012define <2 x i256> @v_or_v2i256(<2 x i256> %a, <2 x i256> %b) {1013; GCN-LABEL: v_or_v2i256:1014; GCN: ; %bb.0:1015; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1016; GCN-NEXT: v_or_b32_e32 v0, v0, v161017; GCN-NEXT: buffer_load_dword v16, off, s[0:3], s321018; GCN-NEXT: v_or_b32_e32 v1, v1, v171019; GCN-NEXT: v_or_b32_e32 v2, v2, v181020; GCN-NEXT: v_or_b32_e32 v3, v3, v191021; GCN-NEXT: v_or_b32_e32 v4, v4, v201022; GCN-NEXT: v_or_b32_e32 v5, v5, v211023; GCN-NEXT: v_or_b32_e32 v6, v6, v221024; GCN-NEXT: v_or_b32_e32 v7, v7, v231025; GCN-NEXT: v_or_b32_e32 v8, v8, v241026; GCN-NEXT: v_or_b32_e32 v9, v9, v251027; GCN-NEXT: v_or_b32_e32 v10, v10, v261028; GCN-NEXT: v_or_b32_e32 v11, v11, v271029; GCN-NEXT: v_or_b32_e32 v12, v12, v281030; GCN-NEXT: v_or_b32_e32 v13, v13, v291031; GCN-NEXT: v_or_b32_e32 v14, v14, v301032; GCN-NEXT: s_waitcnt vmcnt(0)1033; GCN-NEXT: v_or_b32_e32 v15, v15, v161034; GCN-NEXT: s_setpc_b64 s[30:31]1035;1036; GFX10-LABEL: v_or_v2i256:1037; GFX10: ; %bb.0:1038; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1039; GFX10-NEXT: buffer_load_dword v31, off, s[0:3], s321040; GFX10-NEXT: v_or_b32_e32 v0, v0, v161041; GFX10-NEXT: v_or_b32_e32 v1, v1, v171042; GFX10-NEXT: v_or_b32_e32 v2, v2, v181043; GFX10-NEXT: v_or_b32_e32 v3, v3, v191044; GFX10-NEXT: v_or_b32_e32 v4, v4, v201045; GFX10-NEXT: v_or_b32_e32 v5, v5, v211046; GFX10-NEXT: v_or_b32_e32 v6, v6, v221047; GFX10-NEXT: v_or_b32_e32 v7, v7, v231048; GFX10-NEXT: v_or_b32_e32 v8, v8, v241049; GFX10-NEXT: v_or_b32_e32 v9, v9, v251050; GFX10-NEXT: v_or_b32_e32 v10, v10, v261051; GFX10-NEXT: v_or_b32_e32 v11, v11, v271052; GFX10-NEXT: v_or_b32_e32 v12, v12, v281053; GFX10-NEXT: v_or_b32_e32 v13, v13, v291054; GFX10-NEXT: v_or_b32_e32 v14, v14, v301055; GFX10-NEXT: s_waitcnt vmcnt(0)1056; GFX10-NEXT: v_or_b32_e32 v15, v15, v311057; GFX10-NEXT: s_setpc_b64 s[30:31]1058;1059; GFX11-LABEL: v_or_v2i256:1060; GFX11: ; %bb.0:1061; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1062; GFX11-NEXT: scratch_load_b32 v31, off, s321063; GFX11-NEXT: v_or_b32_e32 v0, v0, v161064; GFX11-NEXT: v_or_b32_e32 v1, v1, v171065; GFX11-NEXT: v_or_b32_e32 v2, v2, v181066; GFX11-NEXT: v_or_b32_e32 v3, v3, v191067; GFX11-NEXT: v_or_b32_e32 v4, v4, v201068; GFX11-NEXT: v_or_b32_e32 v5, v5, v211069; GFX11-NEXT: v_or_b32_e32 v6, v6, v221070; GFX11-NEXT: v_or_b32_e32 v7, v7, v231071; GFX11-NEXT: v_or_b32_e32 v8, v8, v241072; GFX11-NEXT: v_or_b32_e32 v9, v9, v251073; GFX11-NEXT: v_or_b32_e32 v10, v10, v261074; GFX11-NEXT: v_or_b32_e32 v11, v11, v271075; GFX11-NEXT: v_or_b32_e32 v12, v12, v281076; GFX11-NEXT: v_or_b32_e32 v13, v13, v291077; GFX11-NEXT: v_or_b32_e32 v14, v14, v301078; GFX11-NEXT: s_waitcnt vmcnt(0)1079; GFX11-NEXT: v_or_b32_e32 v15, v15, v311080; GFX11-NEXT: s_setpc_b64 s[30:31]1081;1082; GFX12-LABEL: v_or_v2i256:1083; GFX12: ; %bb.0:1084; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01085; GFX12-NEXT: s_wait_expcnt 0x01086; GFX12-NEXT: s_wait_samplecnt 0x01087; GFX12-NEXT: s_wait_bvhcnt 0x01088; GFX12-NEXT: s_wait_kmcnt 0x01089; GFX12-NEXT: scratch_load_b32 v31, off, s321090; GFX12-NEXT: v_or_b32_e32 v0, v0, v161091; GFX12-NEXT: v_or_b32_e32 v1, v1, v171092; GFX12-NEXT: v_or_b32_e32 v2, v2, v181093; GFX12-NEXT: v_or_b32_e32 v3, v3, v191094; GFX12-NEXT: v_or_b32_e32 v4, v4, v201095; GFX12-NEXT: v_or_b32_e32 v5, v5, v211096; GFX12-NEXT: v_or_b32_e32 v6, v6, v221097; GFX12-NEXT: v_or_b32_e32 v7, v7, v231098; GFX12-NEXT: v_or_b32_e32 v8, v8, v241099; GFX12-NEXT: v_or_b32_e32 v9, v9, v251100; GFX12-NEXT: v_or_b32_e32 v10, v10, v261101; GFX12-NEXT: v_or_b32_e32 v11, v11, v271102; GFX12-NEXT: v_or_b32_e32 v12, v12, v281103; GFX12-NEXT: v_or_b32_e32 v13, v13, v291104; GFX12-NEXT: v_or_b32_e32 v14, v14, v301105; GFX12-NEXT: s_wait_loadcnt 0x01106; GFX12-NEXT: v_or_b32_e32 v15, v15, v311107; GFX12-NEXT: s_setpc_b64 s[30:31]1108 %or = or <2 x i256> %a, %b1109 ret <2 x i256> %or1110}1111 1112;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:1113; GFX11-FAKE16: {{.*}}1114; GFX11-TRUE16: {{.*}}1115