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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s3# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s4# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s5 6---7name: remove_and_255_zextload8legalized: true9tracksRegLiveness: true10body: |11 bb.0:12 liveins: $vgpr0_vgpr113 ; CHECK-LABEL: name: remove_and_255_zextload14 ; CHECK: liveins: $vgpr0_vgpr115 ; CHECK-NEXT: {{ $}}16 ; CHECK-NEXT: %ptr:_(p1) = COPY $vgpr0_vgpr117 ; CHECK-NEXT: %and:_(s32) = G_ZEXTLOAD %ptr(p1) :: (load (s8), addrspace 1)18 ; CHECK-NEXT: $vgpr0 = COPY %and(s32)19 %ptr:_(p1) = COPY $vgpr0_vgpr120 %load:_(s32) = G_ZEXTLOAD %ptr :: (load (s8), addrspace 1, align 1)21 %mask:_(s32) = G_CONSTANT i32 25522 %and:_(s32) = G_AND %load, %mask23 $vgpr0 = COPY %and24 25...26 27---28name: remove_and_255_smin_zextload29legalized: true30tracksRegLiveness: true31body: |32 bb.0:33 liveins: $vgpr0_vgpr1, $vgpr2_vgpr334 ; CHECK-LABEL: name: remove_and_255_smin_zextload35 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr336 ; CHECK-NEXT: {{ $}}37 ; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr138 ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr339 ; CHECK-NEXT: %load0:_(s32) = G_ZEXTLOAD %ptr0(p1) :: (load (s8), addrspace 1)40 ; CHECK-NEXT: %load1:_(s32) = G_ZEXTLOAD %ptr1(p1) :: (load (s8), addrspace 1)41 ; CHECK-NEXT: %smin:_(s32) = G_SMIN %load0, %load142 ; CHECK-NEXT: $vgpr0 = COPY %smin(s32)43 %ptr0:_(p1) = COPY $vgpr0_vgpr144 %ptr1:_(p1) = COPY $vgpr2_vgpr345 %load0:_(s32) = G_ZEXTLOAD %ptr0 :: (load (s8), addrspace 1, align 1)46 %load1:_(s32) = G_ZEXTLOAD %ptr1 :: (load (s8), addrspace 1, align 1)47 %smin:_(s32) = G_SMIN %load0, %load148 %mask:_(s32) = G_CONSTANT i32 25549 %and:_(s32) = G_AND %smin, %mask50 $vgpr0 = COPY %and51 52...53 54---55name: remove_and_255_smax_zextload56legalized: true57tracksRegLiveness: true58body: |59 bb.0:60 liveins: $vgpr0_vgpr1, $vgpr2_vgpr361 ; CHECK-LABEL: name: remove_and_255_smax_zextload62 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr363 ; CHECK-NEXT: {{ $}}64 ; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr165 ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr366 ; CHECK-NEXT: %load0:_(s32) = G_ZEXTLOAD %ptr0(p1) :: (load (s8), addrspace 1)67 ; CHECK-NEXT: %load1:_(s32) = G_ZEXTLOAD %ptr1(p1) :: (load (s8), addrspace 1)68 ; CHECK-NEXT: %smax:_(s32) = G_SMAX %load0, %load169 ; CHECK-NEXT: $vgpr0 = COPY %smax(s32)70 %ptr0:_(p1) = COPY $vgpr0_vgpr171 %ptr1:_(p1) = COPY $vgpr2_vgpr372 %load0:_(s32) = G_ZEXTLOAD %ptr0 :: (load (s8), addrspace 1, align 1)73 %load1:_(s32) = G_ZEXTLOAD %ptr1 :: (load (s8), addrspace 1, align 1)74 %smax:_(s32) = G_SMAX %load0, %load175 %mask:_(s32) = G_CONSTANT i32 25576 %and:_(s32) = G_AND %smax, %mask77 $vgpr0 = COPY %and78 79...80 81---82name: remove_and_255_umin_zextload83legalized: true84tracksRegLiveness: true85body: |86 bb.0:87 liveins: $vgpr0_vgpr1, $vgpr2_vgpr388 ; CHECK-LABEL: name: remove_and_255_umin_zextload89 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr390 ; CHECK-NEXT: {{ $}}91 ; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr192 ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr393 ; CHECK-NEXT: %load0:_(s32) = G_ZEXTLOAD %ptr0(p1) :: (load (s8), addrspace 1)94 ; CHECK-NEXT: %load1:_(s32) = G_ZEXTLOAD %ptr1(p1) :: (load (s8), addrspace 1)95 ; CHECK-NEXT: %umin:_(s32) = G_UMIN %load0, %load196 ; CHECK-NEXT: $vgpr0 = COPY %umin(s32)97 %ptr0:_(p1) = COPY $vgpr0_vgpr198 %ptr1:_(p1) = COPY $vgpr2_vgpr399 %load0:_(s32) = G_ZEXTLOAD %ptr0 :: (load (s8), addrspace 1, align 1)100 %load1:_(s32) = G_ZEXTLOAD %ptr1 :: (load (s8), addrspace 1, align 1)101 %umin:_(s32) = G_UMIN %load0, %load1102 %mask:_(s32) = G_CONSTANT i32 255103 %and:_(s32) = G_AND %umin, %mask104 $vgpr0 = COPY %and105 106...107 108---109name: remove_and_255_umax_zextload110legalized: true111tracksRegLiveness: true112body: |113 bb.0:114 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3115 ; CHECK-LABEL: name: remove_and_255_umax_zextload116 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3117 ; CHECK-NEXT: {{ $}}118 ; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr1119 ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3120 ; CHECK-NEXT: %load0:_(s32) = G_ZEXTLOAD %ptr0(p1) :: (load (s8), addrspace 1)121 ; CHECK-NEXT: %load1:_(s32) = G_ZEXTLOAD %ptr1(p1) :: (load (s8), addrspace 1)122 ; CHECK-NEXT: %umax:_(s32) = G_UMAX %load0, %load1123 ; CHECK-NEXT: $vgpr0 = COPY %umax(s32)124 %ptr0:_(p1) = COPY $vgpr0_vgpr1125 %ptr1:_(p1) = COPY $vgpr2_vgpr3126 %load0:_(s32) = G_ZEXTLOAD %ptr0 :: (load (s8), addrspace 1, align 1)127 %load1:_(s32) = G_ZEXTLOAD %ptr1 :: (load (s8), addrspace 1, align 1)128 %umax:_(s32) = G_UMAX %load0, %load1129 %mask:_(s32) = G_CONSTANT i32 255130 %and:_(s32) = G_AND %umax, %mask131 $vgpr0 = COPY %and132 133...134 135# Don't have enough known bits for lhs136---137name: remove_and_255_smin_fail_lhs138legalized: true139tracksRegLiveness: true140body: |141 bb.0:142 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3143 ; CHECK-LABEL: name: remove_and_255_smin_fail_lhs144 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3145 ; CHECK-NEXT: {{ $}}146 ; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr1147 ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3148 ; CHECK-NEXT: %load0:_(s32) = G_LOAD %ptr0(p1) :: (load (s32), addrspace 1)149 ; CHECK-NEXT: %load1:_(s32) = G_ZEXTLOAD %ptr1(p1) :: (load (s8), addrspace 1)150 ; CHECK-NEXT: %smin:_(s32) = G_SMIN %load0, %load1151 ; CHECK-NEXT: %mask:_(s32) = G_CONSTANT i32 255152 ; CHECK-NEXT: %and:_(s32) = G_AND %smin, %mask153 ; CHECK-NEXT: $vgpr0 = COPY %and(s32)154 %ptr0:_(p1) = COPY $vgpr0_vgpr1155 %ptr1:_(p1) = COPY $vgpr2_vgpr3156 %load0:_(s32) = G_LOAD %ptr0 :: (load (s32), addrspace 1, align 4)157 %load1:_(s32) = G_ZEXTLOAD %ptr1 :: (load (s8), addrspace 1, align 1)158 %smin:_(s32) = G_SMIN %load0, %load1159 %mask:_(s32) = G_CONSTANT i32 255160 %and:_(s32) = G_AND %smin, %mask161 $vgpr0 = COPY %and162 163...164 165# Don't have enough known bits for rhs166---167name: remove_and_255_smin_fail_rhs168legalized: true169tracksRegLiveness: true170body: |171 bb.0:172 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3173 ; CHECK-LABEL: name: remove_and_255_smin_fail_rhs174 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3175 ; CHECK-NEXT: {{ $}}176 ; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr1177 ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3178 ; CHECK-NEXT: %load0:_(s32) = G_ZEXTLOAD %ptr0(p1) :: (load (s8), addrspace 1)179 ; CHECK-NEXT: %load1:_(s32) = G_LOAD %ptr1(p1) :: (load (s32), addrspace 1)180 ; CHECK-NEXT: %smin:_(s32) = G_SMIN %load0, %load1181 ; CHECK-NEXT: %mask:_(s32) = G_CONSTANT i32 255182 ; CHECK-NEXT: %and:_(s32) = G_AND %smin, %mask183 ; CHECK-NEXT: $vgpr0 = COPY %and(s32)184 %ptr0:_(p1) = COPY $vgpr0_vgpr1185 %ptr1:_(p1) = COPY $vgpr2_vgpr3186 %load0:_(s32) = G_ZEXTLOAD %ptr0 :: (load (s8), addrspace 1, align 1)187 %load1:_(s32) = G_LOAD %ptr1 :: (load (s32), addrspace 1, align 4)188 %smin:_(s32) = G_SMIN %load0, %load1189 %mask:_(s32) = G_CONSTANT i32 255190 %and:_(s32) = G_AND %smin, %mask191 $vgpr0 = COPY %and192 193...194 195# Test known bits for groupstaticsize is the maximum LDS size.196---197name: remove_and_65535_groupstaticsize198legalized: true199tracksRegLiveness: true200body: |201 bb.0:202 liveins: $vgpr0_vgpr1203 ; CHECK-LABEL: name: remove_and_65535_groupstaticsize204 ; CHECK: liveins: $vgpr0_vgpr1205 ; CHECK-NEXT: {{ $}}206 ; CHECK-NEXT: %ptr:_(p1) = COPY $vgpr0_vgpr1207 ; CHECK-NEXT: %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)208 ; CHECK-NEXT: %mask:_(s32) = G_CONSTANT i32 65535209 ; CHECK-NEXT: %and:_(s32) = G_AND %lds_size, %mask210 ; CHECK-NEXT: $vgpr0 = COPY %and(s32)211 %ptr:_(p1) = COPY $vgpr0_vgpr1212 %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)213 %mask:_(s32) = G_CONSTANT i32 65535214 %and:_(s32) = G_AND %lds_size, %mask215 $vgpr0 = COPY %and216 217...218 219---220name: remove_and_131071_groupstaticsize221legalized: true222tracksRegLiveness: true223body: |224 bb.0:225 liveins: $vgpr0_vgpr1226 ; CHECK-LABEL: name: remove_and_131071_groupstaticsize227 ; CHECK: liveins: $vgpr0_vgpr1228 ; CHECK-NEXT: {{ $}}229 ; CHECK-NEXT: %ptr:_(p1) = COPY $vgpr0_vgpr1230 ; CHECK-NEXT: %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)231 ; CHECK-NEXT: $vgpr0 = COPY %lds_size(s32)232 %ptr:_(p1) = COPY $vgpr0_vgpr1233 %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)234 %mask:_(s32) = G_CONSTANT i32 131071235 %and:_(s32) = G_AND %lds_size, %mask236 $vgpr0 = COPY %and237 238...239 240---241name: no_remove_and_65536_groupstaticsize242legalized: true243tracksRegLiveness: true244body: |245 bb.0:246 liveins: $vgpr0_vgpr1247 ; CHECK-LABEL: name: no_remove_and_65536_groupstaticsize248 ; CHECK: liveins: $vgpr0_vgpr1249 ; CHECK-NEXT: {{ $}}250 ; CHECK-NEXT: %ptr:_(p1) = COPY $vgpr0_vgpr1251 ; CHECK-NEXT: %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)252 ; CHECK-NEXT: %mask:_(s32) = G_CONSTANT i32 65536253 ; CHECK-NEXT: %and:_(s32) = G_AND %lds_size, %mask254 ; CHECK-NEXT: $vgpr0 = COPY %and(s32)255 %ptr:_(p1) = COPY $vgpr0_vgpr1256 %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)257 %mask:_(s32) = G_CONSTANT i32 65536258 %and:_(s32) = G_AND %lds_size, %mask259 $vgpr0 = COPY %and260 261...262 263---264name: no_remove_and_32767_groupstaticsize265legalized: true266tracksRegLiveness: true267body: |268 bb.0:269 liveins: $vgpr0_vgpr1270 ; CHECK-LABEL: name: no_remove_and_32767_groupstaticsize271 ; CHECK: liveins: $vgpr0_vgpr1272 ; CHECK-NEXT: {{ $}}273 ; CHECK-NEXT: %ptr:_(p1) = COPY $vgpr0_vgpr1274 ; CHECK-NEXT: %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)275 ; CHECK-NEXT: %mask:_(s32) = G_CONSTANT i32 32767276 ; CHECK-NEXT: %and:_(s32) = G_AND %lds_size, %mask277 ; CHECK-NEXT: $vgpr0 = COPY %and(s32)278 %ptr:_(p1) = COPY $vgpr0_vgpr1279 %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)280 %mask:_(s32) = G_CONSTANT i32 32767281 %and:_(s32) = G_AND %lds_size, %mask282 $vgpr0 = COPY %and283 284...285 286# We can conclude the number of bits based only on one operand287---288name: remove_and_umin_lhs_only289legalized: true290tracksRegLiveness: true291body: |292 bb.0:293 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4294 295 ; CHECK-LABEL: name: remove_and_umin_lhs_only296 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4297 ; CHECK-NEXT: {{ $}}298 ; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr1299 ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3300 ; CHECK-NEXT: %val:_(s32) = COPY $vgpr4301 ; CHECK-NEXT: %k255:_(s32) = G_CONSTANT i32 255302 ; CHECK-NEXT: %umin0:_(s32) = G_UMIN %val, %k255303 ; CHECK-NEXT: $vgpr0 = COPY %umin0(s32)304 %ptr0:_(p1) = COPY $vgpr0_vgpr1305 %ptr1:_(p1) = COPY $vgpr2_vgpr3306 %val:_(s32) = COPY $vgpr4307 %k255:_(s32) = G_CONSTANT i32 255308 %umin0:_(s32) = G_UMIN %val, %k255309 %and:_(s32) = G_AND %umin0, %k255310 $vgpr0 = COPY %and311 312...313 314---315name: remove_and_umin_rhs_only316legalized: true317tracksRegLiveness: true318body: |319 bb.0:320 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4321 322 ; CHECK-LABEL: name: remove_and_umin_rhs_only323 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4324 ; CHECK-NEXT: {{ $}}325 ; CHECK-NEXT: %ptr0:_(p1) = COPY $vgpr0_vgpr1326 ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3327 ; CHECK-NEXT: %val:_(s32) = COPY $vgpr4328 ; CHECK-NEXT: %k255:_(s32) = G_CONSTANT i32 255329 ; CHECK-NEXT: %umin0:_(s32) = G_UMIN %val, %k255330 ; CHECK-NEXT: $vgpr0 = COPY %umin0(s32)331 %ptr0:_(p1) = COPY $vgpr0_vgpr1332 %ptr1:_(p1) = COPY $vgpr2_vgpr3333 %val:_(s32) = COPY $vgpr4334 %k255:_(s32) = G_CONSTANT i32 255335 %umin0:_(s32) = G_UMIN %k255, %val336 %and:_(s32) = G_AND %umin0, %k255337 $vgpr0 = COPY %and338 339...340