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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=amdgpu-regbanklegalize %s -verify-machineinstrs -o - | FileCheck %s3 4---5name: readanylane_to_virtual_vgpr6legalized: true7body: |8 bb.0:9 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr310 11 ; CHECK-LABEL: name: readanylane_to_virtual_vgpr12 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr313 ; CHECK-NEXT: {{ $}}14 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr015 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr116 ; CHECK-NEXT: [[MV:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)17 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr218 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr(s32) = COPY $sgpr319 ; CHECK-NEXT: [[MV1:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)20 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(s32) = G_LOAD [[MV]](p1) :: (volatile "amdgpu-noclobber" load (s32), addrspace 1)21 ; CHECK-NEXT: G_STORE [[LOAD]](s32), [[MV1]](p1) :: (store (s32), addrspace 1)22 ; CHECK-NEXT: S_ENDPGM 023 %0:sgpr(s32) = COPY $sgpr024 %1:sgpr(s32) = COPY $sgpr125 %2:sgpr(p1) = G_MERGE_VALUES %0(s32), %1(s32)26 %3:sgpr(s32) = COPY $sgpr227 %4:sgpr(s32) = COPY $sgpr328 %5:sgpr(p1) = G_MERGE_VALUES %3(s32), %4(s32)29 %6:sgpr(s32) = G_LOAD %2(p1) :: (volatile "amdgpu-noclobber" load (s32), addrspace 1)30 G_STORE %6(s32), %5(p1) :: (store (s32), addrspace 1)31 S_ENDPGM 032...33 34---35name: readanylane_to_physical_vgpr36legalized: true37body: |38 bb.0:39 liveins: $sgpr0, $sgpr140 41 ; CHECK-LABEL: name: readanylane_to_physical_vgpr42 ; CHECK: liveins: $sgpr0, $sgpr143 ; CHECK-NEXT: {{ $}}44 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr045 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr146 ; CHECK-NEXT: [[MV:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)47 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(s32) = G_LOAD [[MV]](p1) :: (volatile "amdgpu-noclobber" load (s32), addrspace 1)48 ; CHECK-NEXT: $vgpr0 = COPY [[LOAD]](s32)49 ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr050 %0:sgpr(s32) = COPY $sgpr051 %1:sgpr(s32) = COPY $sgpr152 %2:sgpr(p1) = G_MERGE_VALUES %0(s32), %1(s32)53 %3:sgpr(s32) = G_LOAD %2(p1) :: (volatile "amdgpu-noclobber" load (s32), addrspace 1)54 $vgpr0 = COPY %3(s32)55 SI_RETURN_TO_EPILOG implicit $vgpr056...57 58---59name: readanylane_to_bitcast_to_virtual_vgpr60legalized: true61body: |62 bb.0:63 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr364 65 ; CHECK-LABEL: name: readanylane_to_bitcast_to_virtual_vgpr66 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr367 ; CHECK-NEXT: {{ $}}68 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr069 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr170 ; CHECK-NEXT: [[MV:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)71 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr272 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr(s32) = COPY $sgpr373 ; CHECK-NEXT: [[MV1:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)74 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(<2 x s16>) = G_LOAD [[MV]](p1) :: (volatile "amdgpu-noclobber" load (<2 x s16>), addrspace 1)75 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[LOAD]](<2 x s16>)76 ; CHECK-NEXT: G_STORE [[BITCAST]](s32), [[MV1]](p1) :: (store (s32), addrspace 1)77 ; CHECK-NEXT: S_ENDPGM 078 %0:sgpr(s32) = COPY $sgpr079 %1:sgpr(s32) = COPY $sgpr180 %2:sgpr(p1) = G_MERGE_VALUES %0(s32), %1(s32)81 %3:sgpr(s32) = COPY $sgpr282 %4:sgpr(s32) = COPY $sgpr383 %5:sgpr(p1) = G_MERGE_VALUES %3(s32), %4(s32)84 %6:sgpr(<2 x s16>) = G_LOAD %2(p1) :: (volatile "amdgpu-noclobber" load (<2 x s16>), addrspace 1)85 %7:sgpr(s32) = G_BITCAST %6(<2 x s16>)86 G_STORE %7(s32), %5(p1) :: (store (s32), addrspace 1)87 S_ENDPGM 088...89 90---91name: readanylane_to_bitcast_to_physical_vgpr92legalized: true93body: |94 bb.0:95 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr396 97 ; CHECK-LABEL: name: readanylane_to_bitcast_to_physical_vgpr98 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr399 ; CHECK-NEXT: {{ $}}100 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0101 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1102 ; CHECK-NEXT: [[MV:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)103 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(<2 x s16>) = G_LOAD [[MV]](p1) :: (volatile "amdgpu-noclobber" load (<2 x s16>), addrspace 1)104 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[LOAD]](<2 x s16>)105 ; CHECK-NEXT: $vgpr0 = COPY [[BITCAST]](s32)106 ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0107 %0:sgpr(s32) = COPY $sgpr0108 %1:sgpr(s32) = COPY $sgpr1109 %2:sgpr(p1) = G_MERGE_VALUES %0(s32), %1(s32)110 %3:sgpr(<2 x s16>) = G_LOAD %2(p1) :: (volatile "amdgpu-noclobber" load (<2 x s16>), addrspace 1)111 %4:sgpr(s32) = G_BITCAST %3(<2 x s16>)112 $vgpr0 = COPY %4(s32)113 SI_RETURN_TO_EPILOG implicit $vgpr0114...115 116---117name: unmerge_readanylane_merge_to_virtual_vgpr118legalized: true119body: |120 bb.0:121 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3122 123 ; CHECK-LABEL: name: unmerge_readanylane_merge_to_virtual_vgpr124 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3125 ; CHECK-NEXT: {{ $}}126 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0127 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1128 ; CHECK-NEXT: [[MV:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)129 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2130 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr(s32) = COPY $sgpr3131 ; CHECK-NEXT: [[MV1:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)132 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(s64) = G_LOAD [[MV]](p1) :: (volatile "amdgpu-noclobber" load (s64), addrspace 1)133 ; CHECK-NEXT: G_STORE [[LOAD]](s64), [[MV1]](p1) :: (store (s64), addrspace 1)134 ; CHECK-NEXT: S_ENDPGM 0135 %0:sgpr(s32) = COPY $sgpr0136 %1:sgpr(s32) = COPY $sgpr1137 %2:sgpr(p1) = G_MERGE_VALUES %0(s32), %1(s32)138 %3:sgpr(s32) = COPY $sgpr2139 %4:sgpr(s32) = COPY $sgpr3140 %5:sgpr(p1) = G_MERGE_VALUES %3(s32), %4(s32)141 %6:sgpr(s64) = G_LOAD %2(p1) :: (volatile "amdgpu-noclobber" load (s64), addrspace 1)142 G_STORE %6(s64), %5(p1) :: (store (s64), addrspace 1)143 S_ENDPGM 0144...145 146---147name: unmerge_readanylane_merge_to_physical_vgpr148legalized: true149body: |150 bb.0:151 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3152 153 ; CHECK-LABEL: name: unmerge_readanylane_merge_to_physical_vgpr154 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3155 ; CHECK-NEXT: {{ $}}156 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0157 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1158 ; CHECK-NEXT: [[MV:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)159 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(s64) = G_LOAD [[MV]](p1) :: (volatile "amdgpu-noclobber" load (s64), addrspace 1)160 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](s64)161 ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0_vgpr1162 %0:sgpr(s32) = COPY $sgpr0163 %1:sgpr(s32) = COPY $sgpr1164 %2:sgpr(p1) = G_MERGE_VALUES %0(s32), %1(s32)165 %3:sgpr(s64) = G_LOAD %2(p1) :: (volatile "amdgpu-noclobber" load (s64), addrspace 1)166 $vgpr0_vgpr1 = COPY %3(s64)167 SI_RETURN_TO_EPILOG implicit $vgpr0_vgpr1168...169 170---171name: unmerge_readanylane_merge_bitcast_to_virtual_vgpr172legalized: true173body: |174 bb.0:175 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3176 177 ; CHECK-LABEL: name: unmerge_readanylane_merge_bitcast_to_virtual_vgpr178 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3179 ; CHECK-NEXT: {{ $}}180 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0181 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1182 ; CHECK-NEXT: [[MV:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)183 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2184 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr(s32) = COPY $sgpr3185 ; CHECK-NEXT: [[MV1:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)186 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(<2 x s32>) = G_LOAD [[MV]](p1) :: (volatile "amdgpu-noclobber" load (<2 x s32>), addrspace 1)187 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s64) = G_BITCAST [[LOAD]](<2 x s32>)188 ; CHECK-NEXT: G_STORE [[BITCAST]](s64), [[MV1]](p1) :: (store (s64), addrspace 1)189 ; CHECK-NEXT: S_ENDPGM 0190 %0:sgpr(s32) = COPY $sgpr0191 %1:sgpr(s32) = COPY $sgpr1192 %2:sgpr(p1) = G_MERGE_VALUES %0(s32), %1(s32)193 %3:sgpr(s32) = COPY $sgpr2194 %4:sgpr(s32) = COPY $sgpr3195 %5:sgpr(p1) = G_MERGE_VALUES %3(s32), %4(s32)196 %6:sgpr(<2 x s32>) = G_LOAD %2(p1) :: (volatile "amdgpu-noclobber" load (<2 x s32>), addrspace 1)197 %7:sgpr(s64) = G_BITCAST %6(<2 x s32>)198 G_STORE %7(s64), %5(p1) :: (store (s64), addrspace 1)199 S_ENDPGM 0200...201 202---203name: unmerge_readanylane_merge_bitcast_to_physical_vgpr204legalized: true205body: |206 bb.0:207 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3208 209 ; CHECK-LABEL: name: unmerge_readanylane_merge_bitcast_to_physical_vgpr210 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3211 ; CHECK-NEXT: {{ $}}212 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0213 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1214 ; CHECK-NEXT: [[MV:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)215 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(<2 x s32>) = G_LOAD [[MV]](p1) :: (volatile "amdgpu-noclobber" load (<2 x s32>), addrspace 1)216 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s64) = G_BITCAST [[LOAD]](<2 x s32>)217 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BITCAST]](s64)218 ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0_vgpr1219 %0:sgpr(s32) = COPY $sgpr0220 %1:sgpr(s32) = COPY $sgpr1221 %2:sgpr(p1) = G_MERGE_VALUES %0(s32), %1(s32)222 %3:sgpr(<2 x s32>) = G_LOAD %2(p1) :: (volatile "amdgpu-noclobber" load (<2 x s32>), addrspace 1)223 %4:sgpr(s64) = G_BITCAST %3(<2 x s32>)224 $vgpr0_vgpr1 = COPY %4(s64)225 SI_RETURN_TO_EPILOG implicit $vgpr0_vgpr1226...227 228---229name: unmerge_readanylane_merge_extract_to_virtual_vgpr230legalized: true231body: |232 bb.0:233 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3234 235 ; CHECK-LABEL: name: unmerge_readanylane_merge_extract_to_virtual_vgpr236 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3237 ; CHECK-NEXT: {{ $}}238 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0239 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1240 ; CHECK-NEXT: [[MV:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)241 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2242 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr(s32) = COPY $sgpr3243 ; CHECK-NEXT: [[MV1:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)244 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(<2 x s32>) = G_LOAD [[MV]](p1) :: (volatile "amdgpu-noclobber" load (<2 x s32>), addrspace 1)245 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[LOAD]](<2 x s32>)246 ; CHECK-NEXT: G_STORE [[UV1]](s32), [[MV1]](p1) :: (store (s32), addrspace 1)247 ; CHECK-NEXT: S_ENDPGM 0248 %0:sgpr(s32) = COPY $sgpr0249 %1:sgpr(s32) = COPY $sgpr1250 %2:sgpr(p1) = G_MERGE_VALUES %0(s32), %1(s32)251 %3:sgpr(s32) = COPY $sgpr2252 %4:sgpr(s32) = COPY $sgpr3253 %5:sgpr(p1) = G_MERGE_VALUES %3(s32), %4(s32)254 %6:sgpr(<2 x s32>) = G_LOAD %2(p1) :: (volatile "amdgpu-noclobber" load (<2 x s32>), addrspace 1)255 %7:sgpr(s32), %8:sgpr(s32) = G_UNMERGE_VALUES %6(<2 x s32>)256 G_STORE %8(s32), %5(p1) :: (store (s32), addrspace 1)257 S_ENDPGM 0258...259 260---261name: unmerge_readanylane_merge_extract_to_physical_vgpr262legalized: true263body: |264 bb.0:265 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3266 267 ; CHECK-LABEL: name: unmerge_readanylane_merge_extract_to_physical_vgpr268 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3269 ; CHECK-NEXT: {{ $}}270 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0271 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1272 ; CHECK-NEXT: [[MV:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)273 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(<2 x s32>) = G_LOAD [[MV]](p1) :: (volatile "amdgpu-noclobber" load (<2 x s32>), addrspace 1)274 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[LOAD]](<2 x s32>)275 ; CHECK-NEXT: $vgpr0 = COPY [[UV1]](s32)276 ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0277 %0:sgpr(s32) = COPY $sgpr0278 %1:sgpr(s32) = COPY $sgpr1279 %2:sgpr(p1) = G_MERGE_VALUES %0(s32), %1(s32)280 %3:sgpr(<2 x s32>) = G_LOAD %2(p1) :: (volatile "amdgpu-noclobber" load (<2 x s32>), addrspace 1)281 %4:sgpr(s32), %5:sgpr(s32) = G_UNMERGE_VALUES %3(<2 x s32>)282 $vgpr0 = COPY %5(s32)283 SI_RETURN_TO_EPILOG implicit $vgpr0284...285 286---287name: unmerge_readanylane_merge_extract_bitcast_to_virtual_vgpr288legalized: true289body: |290 bb.0:291 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3292 293 ; CHECK-LABEL: name: unmerge_readanylane_merge_extract_bitcast_to_virtual_vgpr294 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3295 ; CHECK-NEXT: {{ $}}296 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0297 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1298 ; CHECK-NEXT: [[MV:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)299 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2300 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr(s32) = COPY $sgpr3301 ; CHECK-NEXT: [[MV1:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)302 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(<4 x s16>) = G_LOAD [[MV]](p1) :: (volatile "amdgpu-noclobber" load (<4 x s16>), addrspace 1)303 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(<2 x s16>), [[UV1:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[LOAD]](<4 x s16>)304 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[UV]](<2 x s16>)305 ; CHECK-NEXT: G_STORE [[BITCAST]](s32), [[MV1]](p1) :: (store (s32), addrspace 1)306 ; CHECK-NEXT: S_ENDPGM 0307 %0:sgpr(s32) = COPY $sgpr0308 %1:sgpr(s32) = COPY $sgpr1309 %2:sgpr(p1) = G_MERGE_VALUES %0(s32), %1(s32)310 %3:sgpr(s32) = COPY $sgpr2311 %4:sgpr(s32) = COPY $sgpr3312 %5:sgpr(p1) = G_MERGE_VALUES %3(s32), %4(s32)313 %6:sgpr(<4 x s16>) = G_LOAD %2(p1) :: (volatile "amdgpu-noclobber" load (<4 x s16>), addrspace 1)314 %7:sgpr(<2 x s16>), %8:sgpr(<2 x s16>) = G_UNMERGE_VALUES %6(<4 x s16>)315 %9:sgpr(s32) = G_BITCAST %7(<2 x s16>)316 G_STORE %9(s32), %5(p1) :: (store (s32), addrspace 1)317 S_ENDPGM 0318...319 320---321name: unmerge_readanylane_merge_extract_bitcast_to_physical_vgpr322legalized: true323body: |324 bb.0:325 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3326 327 ; CHECK-LABEL: name: unmerge_readanylane_merge_extract_bitcast_to_physical_vgpr328 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3329 ; CHECK-NEXT: {{ $}}330 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0331 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1332 ; CHECK-NEXT: [[MV:%[0-9]+]]:sgpr(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)333 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(<4 x s16>) = G_LOAD [[MV]](p1) :: (volatile "amdgpu-noclobber" load (<4 x s16>), addrspace 1)334 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(<2 x s16>), [[UV1:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[LOAD]](<4 x s16>)335 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[UV]](<2 x s16>)336 ; CHECK-NEXT: $vgpr0 = COPY [[BITCAST]](s32)337 ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0338 %0:sgpr(s32) = COPY $sgpr0339 %1:sgpr(s32) = COPY $sgpr1340 %2:sgpr(p1) = G_MERGE_VALUES %0(s32), %1(s32)341 %3:sgpr(<4 x s16>) = G_LOAD %2(p1) :: (volatile "amdgpu-noclobber" load (<4 x s16>), addrspace 1)342 %4:sgpr(<2 x s16>), %5:sgpr(<2 x s16>) = G_UNMERGE_VALUES %3(<4 x s16>)343 %6:sgpr(s32) = G_BITCAST %4(<2 x s16>)344 $vgpr0 = COPY %6(s32)345 SI_RETURN_TO_EPILOG implicit $vgpr0346...347 348