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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=amdgpu-regbankselect,amdgpu-regbanklegalize %s -verify-machineinstrs -o - | FileCheck %s3---4name: add_s16_ss5legalized: true6 7body: |8  bb.0:9    liveins: $sgpr0, $sgpr110    ; CHECK-LABEL: name: add_s16_ss11    ; CHECK: liveins: $sgpr0, $sgpr112    ; CHECK-NEXT: {{  $}}13    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr014    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr115    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)16    ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)17    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:sgpr(s32) = G_ANYEXT [[TRUNC]](s16)18    ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:sgpr(s32) = G_ANYEXT [[TRUNC1]](s16)19    ; CHECK-NEXT: [[ADD:%[0-9]+]]:sgpr(s32) = G_ADD [[ANYEXT]], [[ANYEXT1]]20    ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:sgpr(s16) = G_TRUNC [[ADD]](s32)21    ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s16) = G_AND [[TRUNC2]], [[TRUNC2]]22    %0:_(s32) = COPY $sgpr023    %1:_(s32) = COPY $sgpr124    %2:_(s16) = G_TRUNC %025    %3:_(s16) = G_TRUNC %126    %4:_(s16) = G_ADD %2, %327    %5:_(s16) = G_AND %4, %428...29 30---31name: add_s16_sv32legalized: true33 34body: |35  bb.0:36    liveins: $sgpr0, $vgpr037    ; CHECK-LABEL: name: add_s16_sv38    ; CHECK: liveins: $sgpr0, $vgpr039    ; CHECK-NEXT: {{  $}}40    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr041    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr042    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)43    ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)44    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s16) = COPY [[TRUNC]](s16)45    ; CHECK-NEXT: [[ADD:%[0-9]+]]:vgpr(s16) = G_ADD [[COPY2]], [[TRUNC1]]46    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s16) = G_AND [[ADD]], [[ADD]]47    %0:_(s32) = COPY $sgpr048    %1:_(s32) = COPY $vgpr049    %2:_(s16) = G_TRUNC %050    %3:_(s16) = G_TRUNC %151    %4:_(s16) = G_ADD %2, %352    %5:_(s16) = G_AND %4, %453...54 55---56name: add_s16_vs57legalized: true58 59body: |60  bb.0:61    liveins: $sgpr0, $vgpr062    ; CHECK-LABEL: name: add_s16_vs63    ; CHECK: liveins: $sgpr0, $vgpr064    ; CHECK-NEXT: {{  $}}65    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr066    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr067    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)68    ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)69    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s16) = COPY [[TRUNC1]](s16)70    ; CHECK-NEXT: [[ADD:%[0-9]+]]:vgpr(s16) = G_ADD [[TRUNC]], [[COPY2]]71    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s16) = G_AND [[ADD]], [[ADD]]72    %0:_(s32) = COPY $vgpr073    %1:_(s32) = COPY $sgpr074    %2:_(s16) = G_TRUNC %075    %3:_(s16) = G_TRUNC %176    %4:_(s16) = G_ADD %2, %377    %5:_(s16) = G_AND %4, %478...79 80---81name: add_s16_vv82legalized: true83 84body: |85  bb.0:86    liveins: $vgpr0, $vgpr187    ; CHECK-LABEL: name: add_s16_vv88    ; CHECK: liveins: $vgpr0, $vgpr189    ; CHECK-NEXT: {{  $}}90    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr091    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr192    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)93    ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)94    ; CHECK-NEXT: [[ADD:%[0-9]+]]:vgpr(s16) = G_ADD [[TRUNC]], [[TRUNC1]]95    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s16) = G_AND [[ADD]], [[ADD]]96    %0:_(s32) = COPY $vgpr097    %1:_(s32) = COPY $vgpr198    %2:_(s16) = G_TRUNC %099    %3:_(s16) = G_TRUNC %1100    %4:_(s16) = G_ADD %2, %3101    %5:_(s16) = G_AND %4, %4102...103 104---105name: add_s32_ss106legalized: true107 108body: |109  bb.0:110    liveins: $sgpr0, $sgpr1111    ; CHECK-LABEL: name: add_s32_ss112    ; CHECK: liveins: $sgpr0, $sgpr1113    ; CHECK-NEXT: {{  $}}114    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0115    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1116    ; CHECK-NEXT: [[ADD:%[0-9]+]]:sgpr(s32) = G_ADD [[COPY]], [[COPY1]]117    ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[ADD]], [[ADD]]118    %0:_(s32) = COPY $sgpr0119    %1:_(s32) = COPY $sgpr1120    %2:_(s32) = G_ADD %0, %1121    %3:_(s32) = G_AND %2, %2122...123 124---125name: add_s32_sv126legalized: true127 128body: |129  bb.0:130    liveins: $sgpr0, $vgpr0131    ; CHECK-LABEL: name: add_s32_sv132    ; CHECK: liveins: $sgpr0, $vgpr0133    ; CHECK-NEXT: {{  $}}134    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0135    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0136    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)137    ; CHECK-NEXT: [[ADD:%[0-9]+]]:vgpr(s32) = G_ADD [[COPY2]], [[COPY1]]138    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[ADD]], [[ADD]]139    %0:_(s32) = COPY $sgpr0140    %1:_(s32) = COPY $vgpr0141    %2:_(s32) = G_ADD %0, %1142    %3:_(s32) = G_AND %2, %2143...144 145---146name: add_s32_vs147legalized: true148 149body: |150  bb.0:151    liveins: $sgpr0, $vgpr0152    ; CHECK-LABEL: name: add_s32_vs153    ; CHECK: liveins: $sgpr0, $vgpr0154    ; CHECK-NEXT: {{  $}}155    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0156    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0157    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)158    ; CHECK-NEXT: [[ADD:%[0-9]+]]:vgpr(s32) = G_ADD [[COPY]], [[COPY2]]159    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[ADD]], [[ADD]]160    %0:_(s32) = COPY $vgpr0161    %1:_(s32) = COPY $sgpr0162    %2:_(s32) = G_ADD %0, %1163    %3:_(s32) = G_AND %2, %2164...165 166---167name: add_s32_vv168legalized: true169 170body: |171  bb.0:172    liveins: $vgpr0, $vgpr1173    ; CHECK-LABEL: name: add_s32_vv174    ; CHECK: liveins: $vgpr0, $vgpr1175    ; CHECK-NEXT: {{  $}}176    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0177    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1178    ; CHECK-NEXT: [[ADD:%[0-9]+]]:vgpr(s32) = G_ADD [[COPY]], [[COPY1]]179    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[ADD]], [[ADD]]180    %0:_(s32) = COPY $vgpr0181    %1:_(s32) = COPY $vgpr1182    %2:_(s32) = G_ADD %0, %1183    %3:_(s32) = G_AND %2, %2184...185 186---187name: add_s64_ss188legalized: true189 190body: |191  bb.0:192    liveins: $sgpr0_sgpr1, $sgpr2_sgpr3193    ; CHECK-LABEL: name: add_s64_ss194    ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3195    ; CHECK-NEXT: {{  $}}196    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1197    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3198    ; CHECK-NEXT: [[ADD:%[0-9]+]]:sgpr(s64) = G_ADD [[COPY]], [[COPY1]]199    ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s64) = G_CONSTANT i64 255200    ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s64) = G_AND [[ADD]], [[ADD]]201    %0:_(s64) = COPY $sgpr0_sgpr1202    %1:_(s64) = COPY $sgpr2_sgpr3203    %2:_(s64) = G_ADD %0, %1204    %3:_(s64) = G_CONSTANT i64 255205    %4:_(s64) = G_AND %2, %2206...207 208---209name: add_s64_sv210legalized: true211 212body: |213  bb.0:214    liveins: $sgpr0_sgpr1, $vgpr0_vgpr1215    ; CHECK-LABEL: name: add_s64_sv216    ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0_vgpr1217    ; CHECK-NEXT: {{  $}}218    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1219    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1220    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)221    ; CHECK-NEXT: [[ADD:%[0-9]+]]:vgpr(s64) = G_ADD [[COPY2]], [[COPY1]]222    ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[ADD]](s64)223    ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[ADD]](s64)224    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]225    ; CHECK-NEXT: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]226    ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)227    %0:_(s64) = COPY $sgpr0_sgpr1228    %1:_(s64) = COPY $vgpr0_vgpr1229    %2:_(s64) = G_ADD %0, %1230    %3:_(s64) = G_AND %2, %2231...232 233---234name: add_s64_vs235legalized: true236 237body: |238  bb.0:239    liveins: $sgpr0_sgpr1, $vgpr0_vgpr1240    ; CHECK-LABEL: name: add_s64_vs241    ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0_vgpr1242    ; CHECK-NEXT: {{  $}}243    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1244    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1245    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY1]](s64)246    ; CHECK-NEXT: [[ADD:%[0-9]+]]:vgpr(s64) = G_ADD [[COPY]], [[COPY2]]247    ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[ADD]](s64)248    ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[ADD]](s64)249    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]250    ; CHECK-NEXT: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]251    ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)252    %0:_(s64) = COPY $vgpr0_vgpr1253    %1:_(s64) = COPY $sgpr0_sgpr1254    %2:_(s64) = G_ADD %0, %1255    %3:_(s64) = G_AND %2, %2256...257 258---259name: add_s64_vv260legalized: true261 262body: |263  bb.0:264    liveins: $vgpr0_vgpr1, $vgpr2_vgpr3265    ; CHECK-LABEL: name: add_s64_vv266    ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3267    ; CHECK-NEXT: {{  $}}268    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1269    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3270    ; CHECK-NEXT: [[ADD:%[0-9]+]]:vgpr(s64) = G_ADD [[COPY]], [[COPY1]]271    ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[ADD]](s64)272    ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[ADD]](s64)273    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]274    ; CHECK-NEXT: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]275    ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)276    %0:_(s64) = COPY $vgpr0_vgpr1277    %1:_(s64) = COPY $vgpr2_vgpr3278    %2:_(s64) = G_ADD %0, %1279    %3:_(s64) = G_AND %2, %2280...281 282---283name: uaddo_s32_ss284legalized: true285 286body: |287  bb.0:288    liveins: $sgpr0, $sgpr1289    ; CHECK-LABEL: name: uaddo_s32_ss290    ; CHECK: liveins: $sgpr0, $sgpr1291    ; CHECK-NEXT: {{  $}}292    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0293    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1294    ; CHECK-NEXT: [[UADDO:%[0-9]+]]:sgpr(s32), [[UADDO1:%[0-9]+]]:sgpr(s32) = G_UADDO [[COPY]], [[COPY1]]295    ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 1296    ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[UADDO1]], [[C]]297    ; CHECK-NEXT: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0298    ; CHECK-NEXT: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[AND]](s32), [[C]], [[C1]]299    ; CHECK-NEXT: [[AND1:%[0-9]+]]:sgpr(s32) = G_AND [[SELECT]], [[UADDO]]300    %0:_(s32) = COPY $sgpr0301    %1:_(s32) = COPY $sgpr1302    %2:_(s32), %3:_(s1) = G_UADDO %0, %1303    %4:_(s32) = G_ZEXT %3304    %5:_(s32) = G_AND %4, %2305...306 307---308name: uaddo_s32_sv309legalized: true310 311body: |312  bb.0:313    liveins: $sgpr0, $vgpr1314    ; CHECK-LABEL: name: uaddo_s32_sv315    ; CHECK: liveins: $sgpr0, $vgpr1316    ; CHECK-NEXT: {{  $}}317    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0318    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1319    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)320    ; CHECK-NEXT: [[UADDO:%[0-9]+]]:vgpr(s32), [[UADDO1:%[0-9]+]]:vcc(s1) = G_UADDO [[COPY2]], [[COPY1]]321    ; CHECK-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 1322    ; CHECK-NEXT: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 0323    ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[UADDO1]](s1), [[C]], [[C1]]324    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UADDO]], [[SELECT]]325    %0:_(s32) = COPY $sgpr0326    %1:_(s32) = COPY $vgpr1327    %2:_(s32), %3:_(s1) = G_UADDO %0, %1328    %4:_(s32) = G_ZEXT %3329    %5:_(s32) = G_AND %2, %4330...331 332---333name: uaddo_s32_vs334legalized: true335 336body: |337  bb.0:338    liveins: $vgpr0, $sgpr1339    ; CHECK-LABEL: name: uaddo_s32_vs340    ; CHECK: liveins: $vgpr0, $sgpr1341    ; CHECK-NEXT: {{  $}}342    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0343    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1344    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)345    ; CHECK-NEXT: [[UADDO:%[0-9]+]]:vgpr(s32), [[UADDO1:%[0-9]+]]:vcc(s1) = G_UADDO [[COPY]], [[COPY2]]346    ; CHECK-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 1347    ; CHECK-NEXT: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 0348    ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[UADDO1]](s1), [[C]], [[C1]]349    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UADDO]], [[SELECT]]350    %0:_(s32) = COPY $vgpr0351    %1:_(s32) = COPY $sgpr1352    %2:_(s32), %3:_(s1) = G_UADDO %0, %1353    %4:_(s32) = G_ZEXT %3354    %5:_(s32) = G_AND %2, %4355...356 357---358name: uaddo_s32_vv359legalized: true360 361body: |362  bb.0:363    liveins: $vgpr0, $vgpr1364    ; CHECK-LABEL: name: uaddo_s32_vv365    ; CHECK: liveins: $vgpr0, $vgpr1366    ; CHECK-NEXT: {{  $}}367    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0368    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1369    ; CHECK-NEXT: [[UADDO:%[0-9]+]]:vgpr(s32), [[UADDO1:%[0-9]+]]:vcc(s1) = G_UADDO [[COPY]], [[COPY1]]370    ; CHECK-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 1371    ; CHECK-NEXT: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 0372    ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[UADDO1]](s1), [[C]], [[C1]]373    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UADDO]], [[SELECT]]374    %0:_(s32) = COPY $vgpr0375    %1:_(s32) = COPY $vgpr1376    %2:_(s32), %3:_(s1) = G_UADDO %0, %1377    %4:_(s32) = G_ZEXT %3378    %5:_(s32) = G_AND %2, %4379...380 381---382name: uadde_s32_ss383legalized: true384 385body: |386  bb.0:387    liveins: $sgpr0, $sgpr1, $sgpr2388    ; CHECK-LABEL: name: uadde_s32_ss389    ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2390    ; CHECK-NEXT: {{  $}}391    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0392    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1393    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2394    ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 1395    ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[COPY2]], [[C]]396    ; CHECK-NEXT: [[UADDE:%[0-9]+]]:sgpr(s32), [[UADDE1:%[0-9]+]]:sgpr(s32) = G_UADDE [[COPY]], [[COPY1]], [[AND]]397    ; CHECK-NEXT: [[AND1:%[0-9]+]]:sgpr(s32) = G_AND [[UADDE1]], [[C]]398    ; CHECK-NEXT: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0399    ; CHECK-NEXT: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[AND1]](s32), [[C]], [[C1]]400    ; CHECK-NEXT: [[AND2:%[0-9]+]]:sgpr(s32) = G_AND [[UADDE]], [[SELECT]]401    %0:_(s32) = COPY $sgpr0402    %1:_(s32) = COPY $sgpr1403    %2:_(s32) = COPY $sgpr2404    %3:_(s1) = G_TRUNC %2405    %4:_(s32), %5:_(s1) = G_UADDE %0, %1, %3406    %6:_(s32) = G_ZEXT %5407    %7:_(s32) = G_AND %4, %6408...409 410---411name: uadde_s32_sv412legalized: true413 414body: |415  bb.0:416    liveins: $sgpr0, $vgpr1, $sgpr2417    ; CHECK-LABEL: name: uadde_s32_sv418    ; CHECK: liveins: $sgpr0, $vgpr1, $sgpr2419    ; CHECK-NEXT: {{  $}}420    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0421    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1422    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2423    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)424    ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[COPY2]](s32)425    ; CHECK-NEXT: [[UADDE:%[0-9]+]]:vgpr(s32), [[UADDE1:%[0-9]+]]:vcc(s1) = G_UADDE [[COPY3]], [[COPY1]], [[AMDGPU_COPY_VCC_SCC]]426    ; CHECK-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 1427    ; CHECK-NEXT: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 0428    ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[UADDE1]](s1), [[C]], [[C1]]429    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UADDE]], [[SELECT]]430    %0:_(s32) = COPY $sgpr0431    %1:_(s32) = COPY $vgpr1432    %2:_(s32) = COPY $sgpr2433    %3:_(s1) = G_TRUNC %2434    %4:_(s32), %5:_(s1) = G_UADDE %0, %1, %3435    %6:_(s32) = G_ZEXT %5436    %7:_(s32) = G_AND %4, %6437...438 439---440name: uadde_s32_vs441legalized: true442 443body: |444  bb.0:445    liveins: $vgpr0, $sgpr1, $sgpr2446    ; CHECK-LABEL: name: uadde_s32_vs447    ; CHECK: liveins: $vgpr0, $sgpr1, $sgpr2448    ; CHECK-NEXT: {{  $}}449    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0450    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1451    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2452    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)453    ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[COPY2]](s32)454    ; CHECK-NEXT: [[UADDE:%[0-9]+]]:vgpr(s32), [[UADDE1:%[0-9]+]]:vcc(s1) = G_UADDE [[COPY]], [[COPY3]], [[AMDGPU_COPY_VCC_SCC]]455    ; CHECK-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 1456    ; CHECK-NEXT: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 0457    ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[UADDE1]](s1), [[C]], [[C1]]458    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UADDE]], [[SELECT]]459    %0:_(s32) = COPY $vgpr0460    %1:_(s32) = COPY $sgpr1461    %2:_(s32) = COPY $sgpr2462    %3:_(s1) = G_TRUNC %2463    %4:_(s32), %5:_(s1) = G_UADDE %0, %1, %3464    %6:_(s32) = G_ZEXT %5465    %7:_(s32) = G_AND %4, %6466...467 468---469name: uadde_s32_vv470legalized: true471 472body: |473  bb.0:474    liveins: $vgpr0, $vgpr1, $vgpr2475    ; CHECK-LABEL: name: uadde_s32_vv476    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2477    ; CHECK-NEXT: {{  $}}478    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0479    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1480    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr2481    ; CHECK-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 1482    ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[COPY2]], [[C]]483    ; CHECK-NEXT: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 0484    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[AND]](s32), [[C1]]485    ; CHECK-NEXT: [[UADDE:%[0-9]+]]:vgpr(s32), [[UADDE1:%[0-9]+]]:vcc(s1) = G_UADDE [[COPY]], [[COPY1]], [[ICMP]]486    ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[UADDE1]](s1), [[C]], [[C1]]487    ; CHECK-NEXT: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UADDE]], [[SELECT]]488    %0:_(s32) = COPY $vgpr0489    %1:_(s32) = COPY $vgpr1490    %2:_(s32) = COPY $vgpr2491    %3:_(s1) = G_TRUNC %2492    %4:_(s32), %5:_(s1) = G_UADDE %0, %1, %3493    %6:_(s32) = G_ZEXT %5494    %7:_(s32) = G_AND %4, %6495...496 497---498name: uadde_s32_ss_scc_use499legalized: true500 501body: |502  bb.0:503    liveins: $sgpr0, $sgpr1, $sgpr2504    ; CHECK-LABEL: name: uadde_s32_ss_scc_use505    ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2506    ; CHECK-NEXT: {{  $}}507    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0508    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1509    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2510    ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 1511    ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[COPY2]], [[C]]512    ; CHECK-NEXT: [[UADDE:%[0-9]+]]:sgpr(s32), [[UADDE1:%[0-9]+]]:sgpr(s32) = G_UADDE [[COPY]], [[COPY1]], [[AND]]513    ; CHECK-NEXT: [[AND1:%[0-9]+]]:sgpr(s32) = G_AND [[UADDE1]], [[C]]514    ; CHECK-NEXT: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0515    ; CHECK-NEXT: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[AND1]](s32), [[C]], [[C1]]516    ; CHECK-NEXT: [[AND2:%[0-9]+]]:sgpr(s32) = G_AND [[UADDE]], [[SELECT]]517    %0:_(s32) = COPY $sgpr0518    %1:_(s32) = COPY $sgpr1519    %2:_(s32) = COPY $sgpr2520    %3:_(s1) = G_TRUNC %2521    %4:_(s32), %5:_(s1) = G_UADDE %0, %1, %3522    %6:_(s32) = G_ZEXT %5523    %8:_(s32) = G_AND %4, %6524...525