77 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" %s -o - | FileCheck %s3 4---5name: add_s32_ss6legalized: true7 8body: |9 bb.0:10 liveins: $sgpr0, $sgpr111 ; CHECK-LABEL: name: add_s32_ss12 ; CHECK: liveins: $sgpr0, $sgpr113 ; CHECK-NEXT: {{ $}}14 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr015 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr116 ; CHECK-NEXT: [[ADD:%[0-9]+]]:sgpr(s32) = G_ADD [[COPY]], [[COPY1]]17 %0:_(s32) = COPY $sgpr018 %1:_(s32) = COPY $sgpr119 %2:_(s32) = G_ADD %0, %120...21 22---23name: add_s32_sv24legalized: true25 26body: |27 bb.0:28 liveins: $sgpr0, $vgpr029 ; CHECK-LABEL: name: add_s32_sv30 ; CHECK: liveins: $sgpr0, $vgpr031 ; CHECK-NEXT: {{ $}}32 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr033 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr034 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)35 ; CHECK-NEXT: [[ADD:%[0-9]+]]:vgpr(s32) = G_ADD [[COPY2]], [[COPY1]]36 %0:_(s32) = COPY $sgpr037 %1:_(s32) = COPY $vgpr038 %2:_(s32) = G_ADD %0, %139...40 41---42name: add_s32_vs43legalized: true44 45body: |46 bb.0:47 liveins: $sgpr0, $vgpr048 ; CHECK-LABEL: name: add_s32_vs49 ; CHECK: liveins: $sgpr0, $vgpr050 ; CHECK-NEXT: {{ $}}51 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr052 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr053 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)54 ; CHECK-NEXT: [[ADD:%[0-9]+]]:vgpr(s32) = G_ADD [[COPY]], [[COPY2]]55 %0:_(s32) = COPY $vgpr056 %1:_(s32) = COPY $sgpr057 %2:_(s32) = G_ADD %0, %158...59 60---61name: add_s32_vv62legalized: true63 64body: |65 bb.0:66 liveins: $vgpr0, $vgpr167 ; CHECK-LABEL: name: add_s32_vv68 ; CHECK: liveins: $vgpr0, $vgpr169 ; CHECK-NEXT: {{ $}}70 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr071 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr172 ; CHECK-NEXT: [[ADD:%[0-9]+]]:vgpr(s32) = G_ADD [[COPY]], [[COPY1]]73 %0:_(s32) = COPY $vgpr074 %1:_(s32) = COPY $vgpr175 %2:_(s32) = G_ADD %0, %176...77