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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s3# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s4 5---6name: class_ss7legalized: true8 9body: |10 bb.0:11 liveins: $sgpr0_sgpr1, $sgpr212 ; CHECK-LABEL: name: class_ss13 ; CHECK: liveins: $sgpr0_sgpr1, $sgpr214 ; CHECK-NEXT: {{ $}}15 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr116 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr217 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)18 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)19 ; CHECK-NEXT: [[INT:%[0-9]+]]:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), [[COPY2]](s64), [[COPY3]](s32)20 %0:_(s64) = COPY $sgpr0_sgpr121 %1:_(s32) = COPY $sgpr222 %2:_(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %123...24 25---26name: class_sv27legalized: true28 29body: |30 bb.0:31 liveins: $sgpr0_sgpr1, $vgpr032 33 ; CHECK-LABEL: name: class_sv34 ; CHECK: liveins: $sgpr0_sgpr1, $vgpr035 ; CHECK-NEXT: {{ $}}36 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr137 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr038 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)39 ; CHECK-NEXT: [[INT:%[0-9]+]]:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), [[COPY2]](s64), [[COPY1]](s32)40 %0:_(s64) = COPY $sgpr0_sgpr141 %1:_(s32) = COPY $vgpr042 %2:_(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %143...44 45---46name: class_vs47legalized: true48 49body: |50 bb.0:51 liveins: $vgpr0_vgpr1, $sgpr052 ; CHECK-LABEL: name: class_vs53 ; CHECK: liveins: $vgpr0_vgpr1, $sgpr054 ; CHECK-NEXT: {{ $}}55 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr156 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr057 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)58 ; CHECK-NEXT: [[INT:%[0-9]+]]:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), [[COPY]](s64), [[COPY2]](s32)59 %0:_(s64) = COPY $vgpr0_vgpr160 %1:_(s32) = COPY $sgpr061 %2:_(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %162...63 64---65name: class_vv66legalized: true67 68body: |69 bb.0:70 liveins: $vgpr0, $vgpr171 ; CHECK-LABEL: name: class_vv72 ; CHECK: liveins: $vgpr0, $vgpr173 ; CHECK-NEXT: {{ $}}74 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr175 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr276 ; CHECK-NEXT: [[INT:%[0-9]+]]:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), [[COPY]](s64), [[COPY1]](s32)77 %0:_(s64) = COPY $vgpr0_vgpr178 %1:_(s32) = COPY $vgpr279 %2:_(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %180...81