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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s3# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s4 5---6name: reg_sequence_ss_vreg7legalized: true8tracksRegLiveness: true9 10body: |11 bb.0:12 liveins: $sgpr0, $sgpr113 14 ; CHECK-LABEL: name: reg_sequence_ss_vreg15 ; CHECK: liveins: $sgpr0, $sgpr116 ; CHECK-NEXT: {{ $}}17 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr018 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr119 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr(s64) = REG_SEQUENCE [[COPY]](s32), %subreg.sub0, [[COPY1]](s32), %subreg.sub120 %0:_(s32) = COPY $sgpr021 %1:_(s32) = COPY $sgpr122 %2:_(s64) = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub123...24 25---26name: reg_sequence_ss_physreg27legalized: true28tracksRegLiveness: true29 30body: |31 bb.0:32 liveins: $sgpr0, $sgpr133 34 ; CHECK-LABEL: name: reg_sequence_ss_physreg35 ; CHECK: liveins: $sgpr0, $sgpr136 ; CHECK-NEXT: {{ $}}37 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr(s64) = REG_SEQUENCE $sgpr0, %subreg.sub0, $sgpr1, %subreg.sub138 %0:_(s64) = REG_SEQUENCE $sgpr0, %subreg.sub0, $sgpr1, %subreg.sub139...40 41---42name: reg_sequence_sv_vreg43legalized: true44tracksRegLiveness: true45 46body: |47 bb.0:48 liveins: $sgpr0, $vgpr049 50 ; CHECK-LABEL: name: reg_sequence_sv_vreg51 ; CHECK: liveins: $sgpr0, $vgpr052 ; CHECK-NEXT: {{ $}}53 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr054 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr055 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr(s64) = REG_SEQUENCE [[COPY]](s32), %subreg.sub0, [[COPY1]](s32), %subreg.sub156 %0:_(s32) = COPY $sgpr057 %1:_(s32) = COPY $vgpr058 %2:_(s64) = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub159...60 61---62name: reg_sequence_sv_physreg63legalized: true64tracksRegLiveness: true65 66body: |67 bb.0:68 liveins: $sgpr0, $vgpr069 70 ; CHECK-LABEL: name: reg_sequence_sv_physreg71 ; CHECK: liveins: $sgpr0, $vgpr072 ; CHECK-NEXT: {{ $}}73 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr(s64) = REG_SEQUENCE $sgpr0, %subreg.sub0, $vgpr0, %subreg.sub174 %0:_(s64) = REG_SEQUENCE $sgpr0, %subreg.sub0, $vgpr0, %subreg.sub175...76 77---78name: reg_sequence_vs_vreg79legalized: true80tracksRegLiveness: true81 82body: |83 bb.0:84 liveins: $vgpr0, $sgpr085 86 ; CHECK-LABEL: name: reg_sequence_vs_vreg87 ; CHECK: liveins: $vgpr0, $sgpr088 ; CHECK-NEXT: {{ $}}89 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr090 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr091 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr(s64) = REG_SEQUENCE [[COPY]](s32), %subreg.sub0, [[COPY1]](s32), %subreg.sub192 %0:_(s32) = COPY $vgpr093 %1:_(s32) = COPY $sgpr094 %2:_(s64) = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub195...96 97---98name: reg_sequence_vs_physreg99legalized: true100tracksRegLiveness: true101 102body: |103 bb.0:104 liveins: $vgpr0, $sgpr0105 106 ; CHECK-LABEL: name: reg_sequence_vs_physreg107 ; CHECK: liveins: $vgpr0, $sgpr0108 ; CHECK-NEXT: {{ $}}109 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr(s64) = REG_SEQUENCE $vgpr0, %subreg.sub0, $sgpr0, %subreg.sub1110 %0:_(s64) = REG_SEQUENCE $vgpr0, %subreg.sub0, $sgpr0, %subreg.sub1111...112 113---114name: reg_sequence_vv_vreg115legalized: true116tracksRegLiveness: true117 118body: |119 bb.0:120 liveins: $vgpr0, $vgpr1121 122 ; CHECK-LABEL: name: reg_sequence_vv_vreg123 ; CHECK: liveins: $vgpr0, $vgpr1124 ; CHECK-NEXT: {{ $}}125 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0126 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1127 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr(s64) = REG_SEQUENCE [[COPY]](s32), %subreg.sub0, [[COPY1]](s32), %subreg.sub1128 %0:_(s32) = COPY $vgpr0129 %1:_(s32) = COPY $vgpr1130 %2:_(s64) = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1131...132 133---134name: reg_sequence_vv_physreg135legalized: true136tracksRegLiveness: true137 138body: |139 bb.0:140 liveins: $vgpr0, $vgpr1141 142 ; CHECK-LABEL: name: reg_sequence_vv_physreg143 ; CHECK: liveins: $vgpr0, $vgpr1144 ; CHECK-NEXT: {{ $}}145 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr(s64) = REG_SEQUENCE $vgpr0, %subreg.sub0, $vgpr1, %subreg.sub1146 %0:_(s64) = REG_SEQUENCE $vgpr0, %subreg.sub0, $vgpr1, %subreg.sub1147...148 149