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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" %s -verify-machineinstrs -o - | FileCheck %s3 4---5name: select_s32_scc_ss6legalized: true7body: |8 bb.0:9 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr310 ; CHECK-LABEL: name: select_s32_scc_ss11 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr312 ; CHECK-NEXT: {{ $}}13 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr014 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr115 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr216 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr(s32) = COPY $sgpr317 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]18 ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 119 ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[ICMP]], [[C]]20 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[AND]](s32), [[COPY2]], [[COPY3]]21 %0:_(s32) = COPY $sgpr022 %1:_(s32) = COPY $sgpr123 %2:_(s32) = COPY $sgpr224 %3:_(s32) = COPY $sgpr325 %4:_(s1) = G_ICMP intpred(ne), %0, %126 %5:_(s32) = G_SELECT %4, %2, %327...28 29---30name: select_s32_scc_sv31legalized: true32body: |33 bb.0:34 liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr035 ; CHECK-LABEL: name: select_s32_scc_sv36 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr037 ; CHECK-NEXT: {{ $}}38 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr039 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr140 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr241 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr042 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]43 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)44 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY2]](s32)45 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[COPY4]], [[COPY3]]46 %0:_(s32) = COPY $sgpr047 %1:_(s32) = COPY $sgpr148 %2:_(s32) = COPY $sgpr249 %3:_(s32) = COPY $vgpr050 %4:_(s1) = G_ICMP intpred(ne), %0, %151 %5:_(s32) = G_SELECT %4, %2, %352 53...54 55---56name: select_s32_scc_vs57legalized: true58body: |59 bb.0:60 liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr061 ; CHECK-LABEL: name: select_s32_scc_vs62 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr063 ; CHECK-NEXT: {{ $}}64 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr065 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr166 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr267 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr068 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]69 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)70 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY2]](s32)71 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[COPY3]], [[COPY4]]72 %0:_(s32) = COPY $sgpr073 %1:_(s32) = COPY $sgpr174 %2:_(s32) = COPY $sgpr275 %3:_(s32) = COPY $vgpr076 %4:_(s1) = G_ICMP intpred(ne), %0, %177 %5:_(s32) = G_SELECT %4, %3, %278...79 80---81name: select_s32_scc_vv82legalized: true83body: |84 bb.0:85 liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr186 ; CHECK-LABEL: name: select_s32_scc_vv87 ; CHECK: liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr188 ; CHECK-NEXT: {{ $}}89 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr090 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr191 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr092 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr193 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]94 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)95 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[COPY2]], [[COPY3]]96 %0:_(s32) = COPY $sgpr097 %1:_(s32) = COPY $sgpr198 %2:_(s32) = COPY $vgpr099 %3:_(s32) = COPY $vgpr1100 %4:_(s1) = G_ICMP intpred(ne), %0, %1101 %5:_(s32) = G_SELECT %4, %2, %3102...103 104---105name: select_s32_vcc_ss106legalized: true107body: |108 bb.0:109 liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1110 ; CHECK-LABEL: name: select_s32_vcc_ss111 ; CHECK: liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1112 ; CHECK-NEXT: {{ $}}113 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0114 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1115 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0116 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr1117 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY2]](s32), [[COPY3]]118 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)119 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)120 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY4]], [[COPY5]]121 %0:_(s32) = COPY $sgpr0122 %1:_(s32) = COPY $sgpr1123 %2:_(s32) = COPY $vgpr0124 %3:_(s32) = COPY $vgpr1125 %4:_(s1) = G_ICMP intpred(ne), %2, %3126 %5:_(s32) = G_SELECT %4, %0, %1127...128 129---130name: select_s32_vcc_sv131legalized: true132body: |133 bb.0:134 liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2135 ; CHECK-LABEL: name: select_s32_vcc_sv136 ; CHECK: liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2137 ; CHECK-NEXT: {{ $}}138 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0139 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0140 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr1141 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr2142 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY2]]143 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)144 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY4]], [[COPY3]]145 %0:_(s32) = COPY $sgpr0146 %1:_(s32) = COPY $vgpr0147 %2:_(s32) = COPY $vgpr1148 %3:_(s32) = COPY $vgpr2149 %4:_(s1) = G_ICMP intpred(ne), %1, %2150 %5:_(s32) = G_SELECT %4, %0, %3151...152 153---154name: select_s32_vcc_vs155legalized: true156body: |157 bb.0:158 liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2159 ; CHECK-LABEL: name: select_s32_vcc_vs160 ; CHECK: liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2161 ; CHECK-NEXT: {{ $}}162 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0163 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0164 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr1165 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr2166 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY2]]167 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)168 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY3]], [[COPY4]]169 %0:_(s32) = COPY $sgpr0170 %1:_(s32) = COPY $vgpr0171 %2:_(s32) = COPY $vgpr1172 %3:_(s32) = COPY $vgpr2173 %4:_(s1) = G_ICMP intpred(ne), %1, %2174 %5:_(s32) = G_SELECT %4, %3, %0175...176 177---178name: select_s32_vcc_vv179legalized: true180body: |181 bb.0:182 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3183 ; CHECK-LABEL: name: select_s32_vcc_vv184 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3185 ; CHECK-NEXT: {{ $}}186 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0187 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1188 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr2189 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr3190 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]191 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY2]], [[COPY3]]192 %0:_(s32) = COPY $vgpr0193 %1:_(s32) = COPY $vgpr1194 %2:_(s32) = COPY $vgpr2195 %3:_(s32) = COPY $vgpr3196 %4:_(s1) = G_ICMP intpred(ne), %0, %1197 %5:_(s32) = G_SELECT %4, %2, %3198...199 200---201name: select_s64_sss202legalized: true203body: |204 bb.0:205 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5206 ; CHECK-LABEL: name: select_s64_sss207 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5208 ; CHECK-NEXT: {{ $}}209 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0210 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1211 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3212 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr(s64) = COPY $sgpr4_sgpr5213 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]214 ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 1215 ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[ICMP]], [[C]]216 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:sgpr(s64) = G_SELECT [[AND]](s32), [[COPY2]], [[COPY3]]217 %0:_(s32) = COPY $sgpr0218 %1:_(s32) = COPY $sgpr1219 %2:_(s64) = COPY $sgpr2_sgpr3220 %3:_(s64) = COPY $sgpr4_sgpr5221 %4:_(s1) = G_ICMP intpred(ne), %0, %1222 %5:_(s64) = G_SELECT %4, %2, %3223...224 225---226name: select_s64_ssv227legalized: true228body: |229 bb.0:230 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1231 ; CHECK-LABEL: name: select_s64_ssv232 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1233 ; CHECK-NEXT: {{ $}}234 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0235 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1236 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3237 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1238 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]239 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)240 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(s64) = COPY [[COPY2]](s64)241 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](s64)242 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](s64)243 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV]], [[UV2]]244 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV1]], [[UV3]]245 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)246 %0:_(s32) = COPY $sgpr0247 %1:_(s32) = COPY $sgpr1248 %2:_(s64) = COPY $sgpr2_sgpr3249 %3:_(s64) = COPY $vgpr0_vgpr1250 %4:_(s1) = G_ICMP intpred(ne), %0, %1251 %5:_(s64) = G_SELECT %4, %2, %3252 253...254 255---256name: select_s64_svs257legalized: true258body: |259 bb.0:260 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1261 ; CHECK-LABEL: name: select_s64_svs262 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1263 ; CHECK-NEXT: {{ $}}264 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0265 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1266 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3267 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1268 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]269 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)270 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(s64) = COPY [[COPY2]](s64)271 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](s64)272 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](s64)273 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV]], [[UV2]]274 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV1]], [[UV3]]275 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)276 %0:_(s32) = COPY $sgpr0277 %1:_(s32) = COPY $sgpr1278 %2:_(s64) = COPY $sgpr2_sgpr3279 %3:_(s64) = COPY $vgpr0_vgpr1280 %4:_(s1) = G_ICMP intpred(ne), %0, %1281 %5:_(s64) = G_SELECT %4, %3, %2282...283 284---285name: select_s64_svv286legalized: true287body: |288 bb.0:289 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1, $vgpr2_vgpr3290 ; CHECK-LABEL: name: select_s64_svv291 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1, $vgpr2_vgpr3292 ; CHECK-NEXT: {{ $}}293 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0294 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1295 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1296 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3297 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]298 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)299 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY2]](s64)300 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](s64)301 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV]], [[UV2]]302 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV1]], [[UV3]]303 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)304 %0:_(s32) = COPY $sgpr0305 %1:_(s32) = COPY $sgpr1306 %2:_(s64) = COPY $vgpr0_vgpr1307 %3:_(s64) = COPY $vgpr2_vgpr3308 %4:_(s1) = G_ICMP intpred(ne), %0, %1309 %5:_(s64) = G_SELECT %4, %2, %3310...311 312---313name: select_s64_vss314legalized: true315body: |316 bb.0:317 liveins: $sgpr0_sgpr1, $sgpr2_sgpr3, $vgpr0, $vgpr1318 ; CHECK-LABEL: name: select_s64_vss319 ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3, $vgpr0, $vgpr1320 ; CHECK-NEXT: {{ $}}321 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1322 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3323 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0324 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr1325 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY2]](s32), [[COPY3]]326 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)327 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr(s64) = COPY [[COPY1]](s64)328 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](s64)329 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY5]](s64)330 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]331 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]332 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)333 %0:_(s64) = COPY $sgpr0_sgpr1334 %1:_(s64) = COPY $sgpr2_sgpr3335 %2:_(s32) = COPY $vgpr0336 %3:_(s32) = COPY $vgpr1337 %4:_(s1) = G_ICMP intpred(ne), %2, %3338 %5:_(s64) = G_SELECT %4, %0, %1339...340 341---342name: select_s64_vsv343legalized: true344body: |345 bb.0:346 liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr3347 ; CHECK-LABEL: name: select_s64_vsv348 ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr3349 ; CHECK-NEXT: {{ $}}350 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1351 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0352 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr1353 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3354 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY2]]355 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)356 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](s64)357 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](s64)358 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]359 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]360 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)361 %0:_(s64) = COPY $sgpr0_sgpr1362 %1:_(s32) = COPY $vgpr0363 %2:_(s32) = COPY $vgpr1364 %3:_(s64) = COPY $vgpr2_vgpr3365 %4:_(s1) = G_ICMP intpred(ne), %1, %2366 %5:_(s64) = G_SELECT %4, %0, %3367...368 369---370name: select_s64_vvs371legalized: true372body: |373 bb.0:374 liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr3375 ; CHECK-LABEL: name: select_s64_vvs376 ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr3377 ; CHECK-NEXT: {{ $}}378 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1379 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0380 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr1381 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3382 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY2]]383 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)384 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](s64)385 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](s64)386 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]387 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]388 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)389 %0:_(s64) = COPY $sgpr0_sgpr1390 %1:_(s32) = COPY $vgpr0391 %2:_(s32) = COPY $vgpr1392 %3:_(s64) = COPY $vgpr2_vgpr3393 %4:_(s1) = G_ICMP intpred(ne), %1, %2394 %5:_(s64) = G_SELECT %4, %3, %0395...396 397---398name: select_s64_vvv399legalized: true400body: |401 bb.0:402 liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5403 ; CHECK-LABEL: name: select_s64_vvv404 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5405 ; CHECK-NEXT: {{ $}}406 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0407 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1408 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3409 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s64) = COPY $vgpr4_vgpr5410 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]411 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY2]](s64)412 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](s64)413 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]414 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]415 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)416 %0:_(s32) = COPY $vgpr0417 %1:_(s32) = COPY $vgpr1418 %2:_(s64) = COPY $vgpr2_vgpr3419 %3:_(s64) = COPY $vgpr4_vgpr5420 %4:_(s1) = G_ICMP intpred(ne), %0, %1421 %5:_(s64) = G_SELECT %4, %2, %3422...423 424---425name: select_s64_vvv_flags426legalized: true427body: |428 bb.0:429 liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5430 ; CHECK-LABEL: name: select_s64_vvv_flags431 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5432 ; CHECK-NEXT: {{ $}}433 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0434 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1435 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3436 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s64) = COPY $vgpr4_vgpr5437 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]438 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY2]](s64)439 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](s64)440 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = nnan G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]441 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = nnan G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]442 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)443 %0:_(s32) = COPY $vgpr0444 %1:_(s32) = COPY $vgpr1445 %2:_(s64) = COPY $vgpr2_vgpr3446 %3:_(s64) = COPY $vgpr4_vgpr5447 %4:_(s1) = G_ICMP intpred(ne), %0, %1448 %5:_(s64) = nnan G_SELECT %4, %2, %3449...450 451---452name: select_v2s32_scc_ss453legalized: true454body: |455 bb.0:456 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5457 ; CHECK-LABEL: name: select_v2s32_scc_ss458 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5459 ; CHECK-NEXT: {{ $}}460 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0461 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1462 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(<2 x s32>) = COPY $sgpr2_sgpr3463 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr(<2 x s32>) = COPY $sgpr4_sgpr5464 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]465 ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 1466 ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[ICMP]], [[C]]467 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:sgpr(<2 x s32>) = G_SELECT [[AND]](s32), [[COPY2]], [[COPY3]]468 %0:_(s32) = COPY $sgpr0469 %1:_(s32) = COPY $sgpr1470 %2:_(<2 x s32>) = COPY $sgpr2_sgpr3471 %3:_(<2 x s32>) = COPY $sgpr4_sgpr5472 %4:_(s1) = G_ICMP intpred(ne), %0, %1473 %5:_(<2 x s32>) = G_SELECT %4, %2, %3474...475 476---477name: select_v2s32_scc_sv478legalized: true479body: |480 bb.0:481 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1482 ; CHECK-LABEL: name: select_v2s32_scc_sv483 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1484 ; CHECK-NEXT: {{ $}}485 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0486 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1487 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(<2 x s32>) = COPY $sgpr2_sgpr3488 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1489 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]490 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)491 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(<2 x s32>) = COPY [[COPY2]](<2 x s32>)492 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](<2 x s32>)493 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](<2 x s32>)494 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV]], [[UV2]]495 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV1]], [[UV3]]496 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:vgpr(<2 x s32>) = G_BUILD_VECTOR [[SELECT]](s32), [[SELECT1]](s32)497 %0:_(s32) = COPY $sgpr0498 %1:_(s32) = COPY $sgpr1499 %2:_(<2 x s32>) = COPY $sgpr2_sgpr3500 %3:_(<2 x s32>) = COPY $vgpr0_vgpr1501 %4:_(s1) = G_ICMP intpred(ne), %0, %1502 %5:_(<2 x s32>) = G_SELECT %4, %2, %3503 504...505 506---507name: select_v2s32_scc_vs508legalized: true509body: |510 bb.0:511 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1512 ; CHECK-LABEL: name: select_v2s32_scc_vs513 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1514 ; CHECK-NEXT: {{ $}}515 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0516 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1517 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(<2 x s32>) = COPY $sgpr2_sgpr3518 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1519 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]520 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)521 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(<2 x s32>) = COPY [[COPY2]](<2 x s32>)522 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](<2 x s32>)523 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](<2 x s32>)524 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV]], [[UV2]]525 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV1]], [[UV3]]526 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:vgpr(<2 x s32>) = G_BUILD_VECTOR [[SELECT]](s32), [[SELECT1]](s32)527 %0:_(s32) = COPY $sgpr0528 %1:_(s32) = COPY $sgpr1529 %2:_(<2 x s32>) = COPY $sgpr2_sgpr3530 %3:_(<2 x s32>) = COPY $vgpr0_vgpr1531 %4:_(s1) = G_ICMP intpred(ne), %0, %1532 %5:_(<2 x s32>) = G_SELECT %4, %3, %2533...534 535---536name: select_v2s32_scc_vv537legalized: true538body: |539 bb.0:540 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1, $vgpr2_vgpr3541 ; CHECK-LABEL: name: select_v2s32_scc_vv542 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1, $vgpr2_vgpr3543 ; CHECK-NEXT: {{ $}}544 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0545 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1546 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1547 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr2_vgpr3548 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]549 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)550 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY2]](<2 x s32>)551 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](<2 x s32>)552 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV]], [[UV2]]553 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV1]], [[UV3]]554 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:vgpr(<2 x s32>) = G_BUILD_VECTOR [[SELECT]](s32), [[SELECT1]](s32)555 %0:_(s32) = COPY $sgpr0556 %1:_(s32) = COPY $sgpr1557 %2:_(<2 x s32>) = COPY $vgpr0_vgpr1558 %3:_(<2 x s32>) = COPY $vgpr2_vgpr3559 %4:_(s1) = G_ICMP intpred(ne), %0, %1560 %5:_(<2 x s32>) = G_SELECT %4, %2, %3561...562 563---564name: select_v2s32_vcc_ss565legalized: true566body: |567 bb.0:568 liveins: $sgpr0_sgpr1, $sgpr2_sgpr3, $vgpr0, $vgpr1569 ; CHECK-LABEL: name: select_v2s32_vcc_ss570 ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3, $vgpr0, $vgpr1571 ; CHECK-NEXT: {{ $}}572 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s32>) = COPY $sgpr0_sgpr1573 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(<2 x s32>) = COPY $sgpr2_sgpr3574 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0575 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr1576 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY2]](s32), [[COPY3]]577 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(<2 x s32>) = COPY [[COPY]](<2 x s32>)578 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr(<2 x s32>) = COPY [[COPY1]](<2 x s32>)579 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](<2 x s32>)580 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY5]](<2 x s32>)581 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]582 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]583 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:vgpr(<2 x s32>) = G_BUILD_VECTOR [[SELECT]](s32), [[SELECT1]](s32)584 %0:_(<2 x s32>) = COPY $sgpr0_sgpr1585 %1:_(<2 x s32>) = COPY $sgpr2_sgpr3586 %2:_(s32) = COPY $vgpr0587 %3:_(s32) = COPY $vgpr1588 %4:_(s1) = G_ICMP intpred(ne), %2, %3589 %5:_(<2 x s32>) = G_SELECT %4, %0, %1590...591 592---593name: select_v2s32_vcc_sv594legalized: true595body: |596 bb.0:597 liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr3598 ; CHECK-LABEL: name: select_v2s32_vcc_sv599 ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr3600 ; CHECK-NEXT: {{ $}}601 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s32>) = COPY $sgpr0_sgpr1602 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0603 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr1604 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr2_vgpr3605 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY2]]606 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(<2 x s32>) = COPY [[COPY]](<2 x s32>)607 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](<2 x s32>)608 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](<2 x s32>)609 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]610 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]611 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:vgpr(<2 x s32>) = G_BUILD_VECTOR [[SELECT]](s32), [[SELECT1]](s32)612 %0:_(<2 x s32>) = COPY $sgpr0_sgpr1613 %1:_(s32) = COPY $vgpr0614 %2:_(s32) = COPY $vgpr1615 %3:_(<2 x s32>) = COPY $vgpr2_vgpr3616 %4:_(s1) = G_ICMP intpred(ne), %1, %2617 %5:_(<2 x s32>) = G_SELECT %4, %0, %3618...619 620---621name: select_v2s32_vcc_vs622legalized: true623body: |624 bb.0:625 liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr3626 ; CHECK-LABEL: name: select_v2s32_vcc_vs627 ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr3628 ; CHECK-NEXT: {{ $}}629 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s32>) = COPY $sgpr0_sgpr1630 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0631 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr1632 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr2_vgpr3633 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY2]]634 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(<2 x s32>) = COPY [[COPY]](<2 x s32>)635 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](<2 x s32>)636 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](<2 x s32>)637 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]638 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]639 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:vgpr(<2 x s32>) = G_BUILD_VECTOR [[SELECT]](s32), [[SELECT1]](s32)640 %0:_(<2 x s32>) = COPY $sgpr0_sgpr1641 %1:_(s32) = COPY $vgpr0642 %2:_(s32) = COPY $vgpr1643 %3:_(<2 x s32>) = COPY $vgpr2_vgpr3644 %4:_(s1) = G_ICMP intpred(ne), %1, %2645 %5:_(<2 x s32>) = G_SELECT %4, %3, %0646...647 648---649name: select_v2s32_vcc_vv650legalized: true651body: |652 bb.0:653 liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5654 ; CHECK-LABEL: name: select_v2s32_vcc_vv655 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5656 ; CHECK-NEXT: {{ $}}657 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0658 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1659 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr2_vgpr3660 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr4_vgpr5661 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]662 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY2]](<2 x s32>)663 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](<2 x s32>)664 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]665 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]666 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:vgpr(<2 x s32>) = G_BUILD_VECTOR [[SELECT]](s32), [[SELECT1]](s32)667 %0:_(s32) = COPY $vgpr0668 %1:_(s32) = COPY $vgpr1669 %2:_(<2 x s32>) = COPY $vgpr2_vgpr3670 %3:_(<2 x s32>) = COPY $vgpr4_vgpr5671 %4:_(s1) = G_ICMP intpred(ne), %0, %1672 %5:_(<2 x s32>) = G_SELECT %4, %2, %3673...674 675---676name: select_v4s16_scc_ss677legalized: true678body: |679 bb.0:680 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5681 ; CHECK-LABEL: name: select_v4s16_scc_ss682 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5683 ; CHECK-NEXT: {{ $}}684 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0685 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1686 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(<4 x s16>) = COPY $sgpr2_sgpr3687 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr(<4 x s16>) = COPY $sgpr4_sgpr5688 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]689 ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 1690 ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[ICMP]], [[C]]691 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:sgpr(<4 x s16>) = G_SELECT [[AND]](s32), [[COPY2]], [[COPY3]]692 %0:_(s32) = COPY $sgpr0693 %1:_(s32) = COPY $sgpr1694 %2:_(<4 x s16>) = COPY $sgpr2_sgpr3695 %3:_(<4 x s16>) = COPY $sgpr4_sgpr5696 %4:_(s1) = G_ICMP intpred(ne), %0, %1697 %5:_(<4 x s16>) = G_SELECT %4, %2, %3698...699 700---701name: select_v4s16_scc_sv702legalized: true703body: |704 bb.0:705 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1706 ; CHECK-LABEL: name: select_v4s16_scc_sv707 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1708 ; CHECK-NEXT: {{ $}}709 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0710 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1711 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(<4 x s16>) = COPY $sgpr2_sgpr3712 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr0_vgpr1713 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]714 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)715 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(<4 x s16>) = COPY [[COPY2]](<4 x s16>)716 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(<2 x s16>), [[UV1:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY4]](<4 x s16>)717 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(<2 x s16>), [[UV3:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY3]](<4 x s16>)718 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(<2 x s16>) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV]], [[UV2]]719 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(<2 x s16>) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV1]], [[UV3]]720 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[SELECT]](<2 x s16>), [[SELECT1]](<2 x s16>)721 %0:_(s32) = COPY $sgpr0722 %1:_(s32) = COPY $sgpr1723 %2:_(<4 x s16>) = COPY $sgpr2_sgpr3724 %3:_(<4 x s16>) = COPY $vgpr0_vgpr1725 %4:_(s1) = G_ICMP intpred(ne), %0, %1726 %5:_(<4 x s16>) = G_SELECT %4, %2, %3727 728...729 730---731name: select_v4s16_scc_vs732legalized: true733body: |734 bb.0:735 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1736 ; CHECK-LABEL: name: select_v4s16_scc_vs737 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1738 ; CHECK-NEXT: {{ $}}739 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0740 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1741 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(<4 x s16>) = COPY $sgpr2_sgpr3742 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr0_vgpr1743 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]744 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)745 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(<4 x s16>) = COPY [[COPY2]](<4 x s16>)746 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(<2 x s16>), [[UV1:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY3]](<4 x s16>)747 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(<2 x s16>), [[UV3:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY4]](<4 x s16>)748 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(<2 x s16>) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV]], [[UV2]]749 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(<2 x s16>) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV1]], [[UV3]]750 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[SELECT]](<2 x s16>), [[SELECT1]](<2 x s16>)751 %0:_(s32) = COPY $sgpr0752 %1:_(s32) = COPY $sgpr1753 %2:_(<4 x s16>) = COPY $sgpr2_sgpr3754 %3:_(<4 x s16>) = COPY $vgpr0_vgpr1755 %4:_(s1) = G_ICMP intpred(ne), %0, %1756 %5:_(<4 x s16>) = G_SELECT %4, %3, %2757...758 759---760name: select_v4s16_scc_vv761legalized: true762body: |763 bb.0:764 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1, $vgpr2_vgpr3765 ; CHECK-LABEL: name: select_v4s16_scc_vv766 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1, $vgpr2_vgpr3767 ; CHECK-NEXT: {{ $}}768 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0769 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1770 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr0_vgpr1771 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr2_vgpr3772 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]773 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)774 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(<2 x s16>), [[UV1:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY2]](<4 x s16>)775 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(<2 x s16>), [[UV3:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY3]](<4 x s16>)776 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(<2 x s16>) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV]], [[UV2]]777 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(<2 x s16>) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV1]], [[UV3]]778 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[SELECT]](<2 x s16>), [[SELECT1]](<2 x s16>)779 %0:_(s32) = COPY $sgpr0780 %1:_(s32) = COPY $sgpr1781 %2:_(<4 x s16>) = COPY $vgpr0_vgpr1782 %3:_(<4 x s16>) = COPY $vgpr2_vgpr3783 %4:_(s1) = G_ICMP intpred(ne), %0, %1784 %5:_(<4 x s16>) = G_SELECT %4, %2, %3785...786 787---788name: select_v4s16_vcc_ss789legalized: true790body: |791 bb.0:792 liveins: $sgpr0_sgpr1, $sgpr2_sgpr3, $vgpr0, $vgpr1793 ; CHECK-LABEL: name: select_v4s16_vcc_ss794 ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3, $vgpr0, $vgpr1795 ; CHECK-NEXT: {{ $}}796 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(<4 x s16>) = COPY $sgpr0_sgpr1797 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(<4 x s16>) = COPY $sgpr2_sgpr3798 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0799 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr1800 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY2]](s32), [[COPY3]]801 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(<4 x s16>) = COPY [[COPY]](<4 x s16>)802 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr(<4 x s16>) = COPY [[COPY1]](<4 x s16>)803 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(<2 x s16>), [[UV1:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY4]](<4 x s16>)804 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(<2 x s16>), [[UV3:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY5]](<4 x s16>)805 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(<2 x s16>) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]806 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(<2 x s16>) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]807 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[SELECT]](<2 x s16>), [[SELECT1]](<2 x s16>)808 %0:_(<4 x s16>) = COPY $sgpr0_sgpr1809 %1:_(<4 x s16>) = COPY $sgpr2_sgpr3810 %2:_(s32) = COPY $vgpr0811 %3:_(s32) = COPY $vgpr1812 %4:_(s1) = G_ICMP intpred(ne), %2, %3813 %5:_(<4 x s16>) = G_SELECT %4, %0, %1814...815 816---817name: select_v4s16_vcc_sv818legalized: true819body: |820 bb.0:821 liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr3822 ; CHECK-LABEL: name: select_v4s16_vcc_sv823 ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr3824 ; CHECK-NEXT: {{ $}}825 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(<4 x s16>) = COPY $sgpr0_sgpr1826 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0827 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr1828 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr2_vgpr3829 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY2]]830 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(<4 x s16>) = COPY [[COPY]](<4 x s16>)831 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(<2 x s16>), [[UV1:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY4]](<4 x s16>)832 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(<2 x s16>), [[UV3:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY3]](<4 x s16>)833 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(<2 x s16>) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]834 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(<2 x s16>) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]835 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[SELECT]](<2 x s16>), [[SELECT1]](<2 x s16>)836 %0:_(<4 x s16>) = COPY $sgpr0_sgpr1837 %1:_(s32) = COPY $vgpr0838 %2:_(s32) = COPY $vgpr1839 %3:_(<4 x s16>) = COPY $vgpr2_vgpr3840 %4:_(s1) = G_ICMP intpred(ne), %1, %2841 %5:_(<4 x s16>) = G_SELECT %4, %0, %3842...843 844---845name: select_v4s16_vcc_vs846legalized: true847body: |848 bb.0:849 liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr3850 ; CHECK-LABEL: name: select_v4s16_vcc_vs851 ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr3852 ; CHECK-NEXT: {{ $}}853 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(<4 x s16>) = COPY $sgpr0_sgpr1854 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0855 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr1856 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr2_vgpr3857 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY2]]858 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(<4 x s16>) = COPY [[COPY]](<4 x s16>)859 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(<2 x s16>), [[UV1:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY3]](<4 x s16>)860 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(<2 x s16>), [[UV3:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY4]](<4 x s16>)861 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(<2 x s16>) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]862 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(<2 x s16>) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]863 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[SELECT]](<2 x s16>), [[SELECT1]](<2 x s16>)864 %0:_(<4 x s16>) = COPY $sgpr0_sgpr1865 %1:_(s32) = COPY $vgpr0866 %2:_(s32) = COPY $vgpr1867 %3:_(<4 x s16>) = COPY $vgpr2_vgpr3868 %4:_(s1) = G_ICMP intpred(ne), %1, %2869 %5:_(<4 x s16>) = G_SELECT %4, %3, %0870...871 872---873name: select_v4s16_vcc_vv874legalized: true875body: |876 bb.0:877 liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5878 ; CHECK-LABEL: name: select_v4s16_vcc_vv879 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5880 ; CHECK-NEXT: {{ $}}881 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0882 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1883 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr2_vgpr3884 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr4_vgpr5885 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]886 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(<2 x s16>), [[UV1:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY2]](<4 x s16>)887 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(<2 x s16>), [[UV3:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY3]](<4 x s16>)888 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(<2 x s16>) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]889 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(<2 x s16>) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]890 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[SELECT]](<2 x s16>), [[SELECT1]](<2 x s16>)891 %0:_(s32) = COPY $vgpr0892 %1:_(s32) = COPY $vgpr1893 %2:_(<4 x s16>) = COPY $vgpr2_vgpr3894 %3:_(<4 x s16>) = COPY $vgpr4_vgpr5895 %4:_(s1) = G_ICMP intpred(ne), %0, %1896 %5:_(<4 x s16>) = G_SELECT %4, %2, %3897...898 899---900name: select_p0_scc_ss901legalized: true902body: |903 bb.0:904 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5905 ; CHECK-LABEL: name: select_p0_scc_ss906 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5907 ; CHECK-NEXT: {{ $}}908 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0909 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1910 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(p0) = COPY $sgpr2_sgpr3911 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr(p0) = COPY $sgpr4_sgpr5912 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]913 ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 1914 ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[ICMP]], [[C]]915 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:sgpr(p0) = G_SELECT [[AND]](s32), [[COPY2]], [[COPY3]]916 %0:_(s32) = COPY $sgpr0917 %1:_(s32) = COPY $sgpr1918 %2:_(p0) = COPY $sgpr2_sgpr3919 %3:_(p0) = COPY $sgpr4_sgpr5920 %4:_(s1) = G_ICMP intpred(ne), %0, %1921 %5:_(p0) = G_SELECT %4, %2, %3922...923 924---925name: select_p1_scc_ss926legalized: true927body: |928 bb.0:929 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5930 ; CHECK-LABEL: name: select_p1_scc_ss931 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5932 ; CHECK-NEXT: {{ $}}933 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0934 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1935 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(p1) = COPY $sgpr2_sgpr3936 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr(p1) = COPY $sgpr4_sgpr5937 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]938 ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 1939 ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[ICMP]], [[C]]940 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:sgpr(p1) = G_SELECT [[AND]](s32), [[COPY2]], [[COPY3]]941 %0:_(s32) = COPY $sgpr0942 %1:_(s32) = COPY $sgpr1943 %2:_(p1) = COPY $sgpr2_sgpr3944 %3:_(p1) = COPY $sgpr4_sgpr5945 %4:_(s1) = G_ICMP intpred(ne), %0, %1946 %5:_(p1) = G_SELECT %4, %2, %3947...948 949---950name: select_p999_scc_ss951legalized: true952body: |953 bb.0:954 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5955 ; CHECK-LABEL: name: select_p999_scc_ss956 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5957 ; CHECK-NEXT: {{ $}}958 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0959 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1960 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(p999) = COPY $sgpr2_sgpr3961 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr(p999) = COPY $sgpr4_sgpr5962 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]963 ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 1964 ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[ICMP]], [[C]]965 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:sgpr(p999) = G_SELECT [[AND]](s32), [[COPY2]], [[COPY3]]966 %0:_(s32) = COPY $sgpr0967 %1:_(s32) = COPY $sgpr1968 %2:_(p999) = COPY $sgpr2_sgpr3969 %3:_(p999) = COPY $sgpr4_sgpr5970 %4:_(s1) = G_ICMP intpred(ne), %0, %1971 %5:_(p999) = G_SELECT %4, %2, %3972...973 974---975name: select_p0_scc_sv976legalized: true977body: |978 bb.0:979 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1980 ; CHECK-LABEL: name: select_p0_scc_sv981 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1982 ; CHECK-NEXT: {{ $}}983 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0984 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1985 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(p0) = COPY $sgpr2_sgpr3986 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1987 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]988 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)989 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(p0) = COPY [[COPY2]](p0)990 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](p0)991 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](p0)992 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV]], [[UV2]]993 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV1]], [[UV3]]994 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(p0) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)995 %0:_(s32) = COPY $sgpr0996 %1:_(s32) = COPY $sgpr1997 %2:_(p0) = COPY $sgpr2_sgpr3998 %3:_(p0) = COPY $vgpr0_vgpr1999 %4:_(s1) = G_ICMP intpred(ne), %0, %11000 %5:_(p0) = G_SELECT %4, %2, %31001 1002...1003 1004---1005name: select_p1_scc_sv1006legalized: true1007body: |1008 bb.0:1009 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr11010 ; CHECK-LABEL: name: select_p1_scc_sv1011 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr11012 ; CHECK-NEXT: {{ $}}1013 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr01014 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr11015 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(p1) = COPY $sgpr2_sgpr31016 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr11017 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]1018 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)1019 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(p1) = COPY [[COPY2]](p1)1020 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](p1)1021 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](p1)1022 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV]], [[UV2]]1023 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV1]], [[UV3]]1024 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(p1) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)1025 %0:_(s32) = COPY $sgpr01026 %1:_(s32) = COPY $sgpr11027 %2:_(p1) = COPY $sgpr2_sgpr31028 %3:_(p1) = COPY $vgpr0_vgpr11029 %4:_(s1) = G_ICMP intpred(ne), %0, %11030 %5:_(p1) = G_SELECT %4, %2, %31031 1032...1033 1034---1035name: select_p0_scc_vs1036legalized: true1037body: |1038 bb.0:1039 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr11040 ; CHECK-LABEL: name: select_p0_scc_vs1041 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr11042 ; CHECK-NEXT: {{ $}}1043 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr01044 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr11045 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(p0) = COPY $sgpr2_sgpr31046 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr11047 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]1048 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)1049 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(p0) = COPY [[COPY2]](p0)1050 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](p0)1051 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](p0)1052 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV]], [[UV2]]1053 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV1]], [[UV3]]1054 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(p0) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)1055 %0:_(s32) = COPY $sgpr01056 %1:_(s32) = COPY $sgpr11057 %2:_(p0) = COPY $sgpr2_sgpr31058 %3:_(p0) = COPY $vgpr0_vgpr11059 %4:_(s1) = G_ICMP intpred(ne), %0, %11060 %5:_(p0) = G_SELECT %4, %3, %21061...1062 1063---1064name: select_p1_scc_vs1065legalized: true1066body: |1067 bb.0:1068 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr11069 ; CHECK-LABEL: name: select_p1_scc_vs1070 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr11071 ; CHECK-NEXT: {{ $}}1072 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr01073 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr11074 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(p1) = COPY $sgpr2_sgpr31075 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr11076 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]1077 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)1078 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(p1) = COPY [[COPY2]](p1)1079 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](p1)1080 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](p1)1081 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV]], [[UV2]]1082 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV1]], [[UV3]]1083 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(p1) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)1084 %0:_(s32) = COPY $sgpr01085 %1:_(s32) = COPY $sgpr11086 %2:_(p1) = COPY $sgpr2_sgpr31087 %3:_(p1) = COPY $vgpr0_vgpr11088 %4:_(s1) = G_ICMP intpred(ne), %0, %11089 %5:_(p1) = G_SELECT %4, %3, %21090...1091 1092---1093name: select_p1_scc_vv1094legalized: true1095body: |1096 bb.0:1097 liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1, $vgpr2_vgpr31098 ; CHECK-LABEL: name: select_p1_scc_vv1099 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1, $vgpr2_vgpr31100 ; CHECK-NEXT: {{ $}}1101 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr01102 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr11103 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr11104 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(p1) = COPY $vgpr2_vgpr31105 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:sgpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]1106 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[ICMP]](s32)1107 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY2]](p1)1108 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](p1)1109 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV]], [[UV2]]1110 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[UV1]], [[UV3]]1111 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(p1) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)1112 %0:_(s32) = COPY $sgpr01113 %1:_(s32) = COPY $sgpr11114 %2:_(p1) = COPY $vgpr0_vgpr11115 %3:_(p1) = COPY $vgpr2_vgpr31116 %4:_(s1) = G_ICMP intpred(ne), %0, %11117 %5:_(p1) = G_SELECT %4, %2, %31118...1119 1120---1121name: select_p0_vcc_ss1122legalized: true1123body: |1124 bb.0:1125 liveins: $sgpr0_sgpr1, $sgpr2_sgpr3, $vgpr0, $vgpr11126 ; CHECK-LABEL: name: select_p0_vcc_ss1127 ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3, $vgpr0, $vgpr11128 ; CHECK-NEXT: {{ $}}1129 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p0) = COPY $sgpr0_sgpr11130 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(p0) = COPY $sgpr2_sgpr31131 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr01132 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr11133 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY2]](s32), [[COPY3]]1134 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(p0) = COPY [[COPY]](p0)1135 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr(p0) = COPY [[COPY1]](p0)1136 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](p0)1137 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY5]](p0)1138 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]1139 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]1140 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(p0) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)1141 %0:_(p0) = COPY $sgpr0_sgpr11142 %1:_(p0) = COPY $sgpr2_sgpr31143 %2:_(s32) = COPY $vgpr01144 %3:_(s32) = COPY $vgpr11145 %4:_(s1) = G_ICMP intpred(ne), %2, %31146 %5:_(p0) = G_SELECT %4, %0, %11147...1148 1149---1150name: select_p1_vcc_ss1151legalized: true1152body: |1153 bb.0:1154 liveins: $sgpr0_sgpr1, $sgpr2_sgpr3, $vgpr0, $vgpr11155 ; CHECK-LABEL: name: select_p1_vcc_ss1156 ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3, $vgpr0, $vgpr11157 ; CHECK-NEXT: {{ $}}1158 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr11159 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(p1) = COPY $sgpr2_sgpr31160 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr01161 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr11162 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY2]](s32), [[COPY3]]1163 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(p1) = COPY [[COPY]](p1)1164 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr(p1) = COPY [[COPY1]](p1)1165 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](p1)1166 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY5]](p1)1167 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]1168 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]1169 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(p1) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)1170 %0:_(p1) = COPY $sgpr0_sgpr11171 %1:_(p1) = COPY $sgpr2_sgpr31172 %2:_(s32) = COPY $vgpr01173 %3:_(s32) = COPY $vgpr11174 %4:_(s1) = G_ICMP intpred(ne), %2, %31175 %5:_(p1) = G_SELECT %4, %0, %11176...1177 1178---1179name: select_p0_vcc_sv1180legalized: true1181body: |1182 bb.0:1183 liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr31184 ; CHECK-LABEL: name: select_p0_vcc_sv1185 ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr31186 ; CHECK-NEXT: {{ $}}1187 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p0) = COPY $sgpr0_sgpr11188 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr01189 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr11190 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(p0) = COPY $vgpr2_vgpr31191 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY2]]1192 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(p0) = COPY [[COPY]](p0)1193 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](p0)1194 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](p0)1195 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]1196 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]1197 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(p0) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)1198 %0:_(p0) = COPY $sgpr0_sgpr11199 %1:_(s32) = COPY $vgpr01200 %2:_(s32) = COPY $vgpr11201 %3:_(p0) = COPY $vgpr2_vgpr31202 %4:_(s1) = G_ICMP intpred(ne), %1, %21203 %5:_(p0) = G_SELECT %4, %0, %31204...1205 1206---1207name: select_p1_vcc_sv1208legalized: true1209body: |1210 bb.0:1211 liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr31212 ; CHECK-LABEL: name: select_p1_vcc_sv1213 ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr31214 ; CHECK-NEXT: {{ $}}1215 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr11216 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr01217 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr11218 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(p1) = COPY $vgpr2_vgpr31219 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY2]]1220 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(p1) = COPY [[COPY]](p1)1221 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](p1)1222 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](p1)1223 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]1224 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]1225 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(p1) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)1226 %0:_(p1) = COPY $sgpr0_sgpr11227 %1:_(s32) = COPY $vgpr01228 %2:_(s32) = COPY $vgpr11229 %3:_(p1) = COPY $vgpr2_vgpr31230 %4:_(s1) = G_ICMP intpred(ne), %1, %21231 %5:_(p1) = G_SELECT %4, %0, %31232...1233 1234---1235name: select_p0_vcc_vs1236legalized: true1237body: |1238 bb.0:1239 liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr31240 ; CHECK-LABEL: name: select_p0_vcc_vs1241 ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr31242 ; CHECK-NEXT: {{ $}}1243 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p0) = COPY $sgpr0_sgpr11244 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr01245 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr11246 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(p0) = COPY $vgpr2_vgpr31247 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY2]]1248 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(p0) = COPY [[COPY]](p0)1249 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](p0)1250 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](p0)1251 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]1252 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]1253 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(p0) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)1254 %0:_(p0) = COPY $sgpr0_sgpr11255 %1:_(s32) = COPY $vgpr01256 %2:_(s32) = COPY $vgpr11257 %3:_(p0) = COPY $vgpr2_vgpr31258 %4:_(s1) = G_ICMP intpred(ne), %1, %21259 %5:_(p0) = G_SELECT %4, %3, %01260...1261 1262---1263name: select_p1_vcc_vs1264legalized: true1265body: |1266 bb.0:1267 liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr31268 ; CHECK-LABEL: name: select_p1_vcc_vs1269 ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0, $vgpr1, $vgpr2_vgpr31270 ; CHECK-NEXT: {{ $}}1271 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr11272 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr01273 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr11274 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(p1) = COPY $vgpr2_vgpr31275 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY2]]1276 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(p1) = COPY [[COPY]](p1)1277 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](p1)1278 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY4]](p1)1279 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]1280 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]1281 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(p1) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)1282 %0:_(p1) = COPY $sgpr0_sgpr11283 %1:_(s32) = COPY $vgpr01284 %2:_(s32) = COPY $vgpr11285 %3:_(p1) = COPY $vgpr2_vgpr31286 %4:_(s1) = G_ICMP intpred(ne), %1, %21287 %5:_(p1) = G_SELECT %4, %3, %01288...1289 1290---1291name: select_p0_vcc_vv1292legalized: true1293body: |1294 bb.0:1295 liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr51296 ; CHECK-LABEL: name: select_p0_vcc_vv1297 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr51298 ; CHECK-NEXT: {{ $}}1299 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr01300 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr11301 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(p0) = COPY $vgpr2_vgpr31302 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(p0) = COPY $vgpr4_vgpr51303 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]1304 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY2]](p0)1305 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](p0)1306 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]1307 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]1308 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(p0) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)1309 %0:_(s32) = COPY $vgpr01310 %1:_(s32) = COPY $vgpr11311 %2:_(p0) = COPY $vgpr2_vgpr31312 %3:_(p0) = COPY $vgpr4_vgpr51313 %4:_(s1) = G_ICMP intpred(ne), %0, %11314 %5:_(p0) = G_SELECT %4, %2, %31315...1316 1317---1318name: select_p1_vcc_vv1319legalized: true1320body: |1321 bb.0:1322 liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr51323 ; CHECK-LABEL: name: select_p1_vcc_vv1324 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr51325 ; CHECK-NEXT: {{ $}}1326 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr01327 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr11328 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(p1) = COPY $vgpr2_vgpr31329 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(p1) = COPY $vgpr4_vgpr51330 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]1331 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY2]](p1)1332 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](p1)1333 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]1334 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]1335 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(p1) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)1336 %0:_(s32) = COPY $vgpr01337 %1:_(s32) = COPY $vgpr11338 %2:_(p1) = COPY $vgpr2_vgpr31339 %3:_(p1) = COPY $vgpr4_vgpr51340 %4:_(s1) = G_ICMP intpred(ne), %0, %11341 %5:_(p1) = G_SELECT %4, %2, %31342...1343 1344---1345name: select_p999_vcc_vv1346legalized: true1347body: |1348 bb.0:1349 liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr51350 ; CHECK-LABEL: name: select_p999_vcc_vv1351 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr51352 ; CHECK-NEXT: {{ $}}1353 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr01354 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr11355 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(p999) = COPY $vgpr2_vgpr31356 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(p999) = COPY $vgpr4_vgpr51357 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]1358 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY2]](p999)1359 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY3]](p999)1360 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV]], [[UV2]]1361 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[UV1]], [[UV3]]1362 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(p999) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)1363 %0:_(s32) = COPY $vgpr01364 %1:_(s32) = COPY $vgpr11365 %2:_(p999) = COPY $vgpr2_vgpr31366 %3:_(p999) = COPY $vgpr4_vgpr51367 %4:_(s1) = G_ICMP intpred(ne), %0, %11368 %5:_(p999) = G_SELECT %4, %2, %31369...1370 1371---1372name: select_s32_vgpr_vv1373legalized: true1374body: |1375 bb.0:1376 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr31377 ; CHECK-LABEL: name: select_s32_vgpr_vv1378 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr31379 ; CHECK-NEXT: {{ $}}1380 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr01381 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr11382 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr21383 ; CHECK-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 11384 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[COPY]], [[C]]1385 ; CHECK-NEXT: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 01386 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[AND]](s32), [[C1]]1387 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY1]], [[COPY2]]1388 %0:_(s32) = COPY $vgpr01389 %1:_(s32) = COPY $vgpr11390 %2:_(s32) = COPY $vgpr21391 %3:_(s1) = G_TRUNC %01392 %4:_(s32) = G_SELECT %3, %1, %21393...1394 1395---1396name: select_s32_vgpr_ss1397legalized: true1398body: |1399 bb.0:1400 liveins: $vgpr0, $sgpr0, $sgpr11401 ; CHECK-LABEL: name: select_s32_vgpr_ss1402 ; CHECK: liveins: $vgpr0, $sgpr0, $sgpr11403 ; CHECK-NEXT: {{ $}}1404 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr01405 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr01406 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr11407 ; CHECK-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 11408 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[COPY]], [[C]]1409 ; CHECK-NEXT: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 01410 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[AND]](s32), [[C1]]1411 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)1412 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY2]](s32)1413 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY3]], [[COPY4]]1414 %0:_(s32) = COPY $vgpr01415 %1:_(s32) = COPY $sgpr01416 %2:_(s32) = COPY $sgpr11417 %3:_(s1) = G_TRUNC %01418 %4:_(s32) = G_SELECT %3, %1, %21419...1420 1421---1422name: select_s32_sgpr_vv1423legalized: true1424body: |1425 bb.0:1426 liveins: $sgpr0, $vgpr0, $vgpr11427 ; CHECK-LABEL: name: select_s32_sgpr_vv1428 ; CHECK: liveins: $sgpr0, $vgpr0, $vgpr11429 ; CHECK-NEXT: {{ $}}1430 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr01431 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr01432 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr11433 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[COPY]](s32)1434 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[COPY1]], [[COPY2]]1435 %0:_(s32) = COPY $sgpr01436 %1:_(s32) = COPY $vgpr01437 %2:_(s32) = COPY $vgpr11438 %3:_(s1) = G_TRUNC %01439 %4:_(s32) = G_SELECT %3, %1, %21440...1441 1442---1443name: select_s32_sgpr_vs1444legalized: true1445body: |1446 bb.0:1447 liveins: $sgpr0, $vgpr0, $sgpr11448 ; CHECK-LABEL: name: select_s32_sgpr_vs1449 ; CHECK: liveins: $sgpr0, $vgpr0, $sgpr11450 ; CHECK-NEXT: {{ $}}1451 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr01452 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr01453 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr11454 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[COPY]](s32)1455 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY2]](s32)1456 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[COPY1]], [[COPY3]]1457 %0:_(s32) = COPY $sgpr01458 %1:_(s32) = COPY $vgpr01459 %2:_(s32) = COPY $sgpr11460 %3:_(s1) = G_TRUNC %01461 %4:_(s32) = G_SELECT %3, %1, %21462...1463 1464---1465name: select_s32_sgpr_sv1466legalized: true1467body: |1468 bb.0:1469 liveins: $sgpr0, $sgpr0, $vgpr01470 ; CHECK-LABEL: name: select_s32_sgpr_sv1471 ; CHECK: liveins: $sgpr0, $sgpr0, $vgpr01472 ; CHECK-NEXT: {{ $}}1473 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr01474 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr11475 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr01476 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[COPY]](s32)1477 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)1478 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[AMDGPU_COPY_VCC_SCC]](s1), [[COPY3]], [[COPY2]]1479 %0:_(s32) = COPY $sgpr01480 %1:_(s32) = COPY $sgpr11481 %2:_(s32) = COPY $vgpr01482 %3:_(s1) = G_TRUNC %01483 %4:_(s32) = G_SELECT %3, %1, %21484...1485 1486# FIXME: greedy unnecessairly uses vcc/vgpr1487---1488name: select_s32_sgpr_ss1489legalized: true1490body: |1491 bb.0:1492 liveins: $sgpr0, $sgpr1, $sgpr21493 ; CHECK-LABEL: name: select_s32_sgpr_ss1494 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr21495 ; CHECK-NEXT: {{ $}}1496 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr01497 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr11498 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr21499 ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 11500 ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[COPY]], [[C]]1501 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[AND]](s32), [[COPY1]], [[COPY2]]1502 %0:_(s32) = COPY $sgpr01503 %1:_(s32) = COPY $sgpr11504 %2:_(s32) = COPY $sgpr21505 %3:_(s1) = G_TRUNC %01506 %4:_(s32) = G_SELECT %3, %1, %21507...1508