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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" %s -verify-machineinstrs -o - | FileCheck %s3 4---5name: sext_inreg_s_s32_16legalized: true7 8body: |9  bb.0:10    liveins: $sgpr011 12    ; CHECK-LABEL: name: sext_inreg_s_s32_113    ; CHECK: liveins: $sgpr014    ; CHECK-NEXT: {{  $}}15    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr016    ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:sgpr(s32) = G_SEXT_INREG [[COPY]], 117    ; CHECK-NEXT: S_ENDPGM 0, implicit [[SEXT_INREG]](s32)18    %0:_(s32) = COPY $sgpr019    %1:_(s32) = G_SEXT_INREG %0, 120    S_ENDPGM 0, implicit %121 22...23 24---25name: sext_inreg_s_s64_126legalized: true27 28body: |29  bb.0:30    liveins: $sgpr0_sgpr131 32    ; CHECK-LABEL: name: sext_inreg_s_s64_133    ; CHECK: liveins: $sgpr0_sgpr134    ; CHECK-NEXT: {{  $}}35    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr136    ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:sgpr(s64) = G_SEXT_INREG [[COPY]], 137    ; CHECK-NEXT: S_ENDPGM 0, implicit [[SEXT_INREG]](s64)38    %0:_(s64) = COPY $sgpr0_sgpr139    %1:_(s64) = G_SEXT_INREG %0, 140    S_ENDPGM 0, implicit %141 42...43 44---45name: sext_inreg_s_s64_3146legalized: true47 48body: |49  bb.0:50    liveins: $sgpr0_sgpr151 52    ; CHECK-LABEL: name: sext_inreg_s_s64_3153    ; CHECK: liveins: $sgpr0_sgpr154    ; CHECK-NEXT: {{  $}}55    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr156    ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:sgpr(s64) = G_SEXT_INREG [[COPY]], 3157    ; CHECK-NEXT: S_ENDPGM 0, implicit [[SEXT_INREG]](s64)58    %0:_(s64) = COPY $sgpr0_sgpr159    %1:_(s64) = G_SEXT_INREG %0, 3160    S_ENDPGM 0, implicit %161 62...63 64---65name: sext_inreg_s_s64_3266legalized: true67 68body: |69  bb.0:70    liveins: $sgpr0_sgpr171 72    ; CHECK-LABEL: name: sext_inreg_s_s64_3273    ; CHECK: liveins: $sgpr0_sgpr174    ; CHECK-NEXT: {{  $}}75    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr176    ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:sgpr(s64) = G_SEXT_INREG [[COPY]], 3277    ; CHECK-NEXT: S_ENDPGM 0, implicit [[SEXT_INREG]](s64)78    %0:_(s64) = COPY $sgpr0_sgpr179    %1:_(s64) = G_SEXT_INREG %0, 3280    S_ENDPGM 0, implicit %181 82...83 84---85name: sext_inreg_s_s64_3386legalized: true87 88body: |89  bb.0:90    liveins: $sgpr0_sgpr191 92    ; CHECK-LABEL: name: sext_inreg_s_s64_3393    ; CHECK: liveins: $sgpr0_sgpr194    ; CHECK-NEXT: {{  $}}95    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr196    ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:sgpr(s64) = G_SEXT_INREG [[COPY]], 3297    ; CHECK-NEXT: S_ENDPGM 0, implicit [[SEXT_INREG]](s64)98    %0:_(s64) = COPY $sgpr0_sgpr199    %1:_(s64) = G_SEXT_INREG %0, 32100    S_ENDPGM 0, implicit %1101 102...103 104---105name: sext_inreg_v_s32_1106legalized: true107 108body: |109  bb.0:110    liveins: $vgpr0111 112    ; CHECK-LABEL: name: sext_inreg_v_s32_1113    ; CHECK: liveins: $vgpr0114    ; CHECK-NEXT: {{  $}}115    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0116    ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:vgpr(s32) = G_SEXT_INREG [[COPY]], 1117    ; CHECK-NEXT: S_ENDPGM 0, implicit [[SEXT_INREG]](s32)118    %0:_(s32) = COPY $vgpr0119    %1:_(s32) = G_SEXT_INREG %0, 1120    S_ENDPGM 0, implicit %1121 122...123 124---125name: sext_inreg_v_s64_1126legalized: true127 128body: |129  bb.0:130    liveins: $vgpr0_vgpr1131 132    ; CHECK-LABEL: name: sext_inreg_v_s64_1133    ; CHECK: liveins: $vgpr0_vgpr1134    ; CHECK-NEXT: {{  $}}135    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1136    ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)137    ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:vgpr(s32) = G_FREEZE [[UV]]138    ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:vgpr(s32) = G_SEXT_INREG [[FREEZE]], 1139    ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 31140    ; CHECK-NEXT: [[ASHR:%[0-9]+]]:vgpr(s32) = G_ASHR [[SEXT_INREG]], [[C]](s32)141    ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[SEXT_INREG]](s32), [[ASHR]](s32)142    ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)143    %0:_(s64) = COPY $vgpr0_vgpr1144    %1:_(s64) = G_SEXT_INREG %0, 1145    S_ENDPGM 0, implicit %1146 147...148 149---150name: sext_inreg_v_s64_31151legalized: true152 153body: |154  bb.0:155    liveins: $vgpr0_vgpr1156 157    ; CHECK-LABEL: name: sext_inreg_v_s64_31158    ; CHECK: liveins: $vgpr0_vgpr1159    ; CHECK-NEXT: {{  $}}160    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1161    ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)162    ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:vgpr(s32) = G_FREEZE [[UV]]163    ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:vgpr(s32) = G_SEXT_INREG [[FREEZE]], 31164    ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 31165    ; CHECK-NEXT: [[ASHR:%[0-9]+]]:vgpr(s32) = G_ASHR [[SEXT_INREG]], [[C]](s32)166    ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[SEXT_INREG]](s32), [[ASHR]](s32)167    ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)168    %0:_(s64) = COPY $vgpr0_vgpr1169    %1:_(s64) = G_SEXT_INREG %0, 31170    S_ENDPGM 0, implicit %1171 172...173 174---175name: sext_inreg_v_s64_32176legalized: true177 178body: |179  bb.0:180    liveins: $vgpr0_vgpr1181 182    ; CHECK-LABEL: name: sext_inreg_v_s64_32183    ; CHECK: liveins: $vgpr0_vgpr1184    ; CHECK-NEXT: {{  $}}185    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1186    ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)187    ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:vgpr(s32) = G_FREEZE [[UV]]188    ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 31189    ; CHECK-NEXT: [[ASHR:%[0-9]+]]:vgpr(s32) = G_ASHR [[FREEZE]], [[C]](s32)190    ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[FREEZE]](s32), [[ASHR]](s32)191    ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)192    %0:_(s64) = COPY $vgpr0_vgpr1193    %1:_(s64) = G_SEXT_INREG %0, 32194    S_ENDPGM 0, implicit %1195 196...197 198---199name: sext_inreg_v_s64_33200legalized: true201 202body: |203  bb.0:204    liveins: $vgpr0_vgpr1205 206    ; CHECK-LABEL: name: sext_inreg_v_s64_33207    ; CHECK: liveins: $vgpr0_vgpr1208    ; CHECK-NEXT: {{  $}}209    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1210    ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)211    ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:vgpr(s32) = G_SEXT_INREG [[UV1]], 1212    ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[UV]](s32), [[SEXT_INREG]](s32)213    ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)214    %0:_(s64) = COPY $vgpr0_vgpr1215    %1:_(s64) = G_SEXT_INREG %0, 33216    S_ENDPGM 0, implicit %1217 218...219 220---221name: sext_inreg_v_s64_35222legalized: true223 224body: |225  bb.0:226    liveins: $vgpr0_vgpr1227 228    ; CHECK-LABEL: name: sext_inreg_v_s64_35229    ; CHECK: liveins: $vgpr0_vgpr1230    ; CHECK-NEXT: {{  $}}231    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1232    ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)233    ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:vgpr(s32) = G_SEXT_INREG [[UV1]], 3234    ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[UV]](s32), [[SEXT_INREG]](s32)235    ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)236    %0:_(s64) = COPY $vgpr0_vgpr1237    %1:_(s64) = G_SEXT_INREG %0, 35238    S_ENDPGM 0, implicit %1239 240...241 242---243name: sext_inreg_v_s64_63244legalized: true245 246body: |247  bb.0:248    liveins: $vgpr0_vgpr1249 250    ; CHECK-LABEL: name: sext_inreg_v_s64_63251    ; CHECK: liveins: $vgpr0_vgpr1252    ; CHECK-NEXT: {{  $}}253    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1254    ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)255    ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:vgpr(s32) = G_SEXT_INREG [[UV1]], 31256    ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[UV]](s32), [[SEXT_INREG]](s32)257    ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)258    %0:_(s64) = COPY $vgpr0_vgpr1259    %1:_(s64) = G_SEXT_INREG %0, 63260    S_ENDPGM 0, implicit %1261 262...263