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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass='amdgpu-regbankselect,amdgpu-regbanklegalize' -o - %s | FileCheck %s3 4---5name: smin_s32_ss6legalized: true7 8body: |9 bb.0:10 liveins: $sgpr0, $sgpr111 12 ; CHECK-LABEL: name: smin_s32_ss13 ; CHECK: liveins: $sgpr0, $sgpr114 ; CHECK-NEXT: {{ $}}15 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr016 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr117 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:sgpr(s32) = G_SMIN [[COPY]], [[COPY1]]18 ; CHECK-NEXT: $sgpr0 = COPY [[SMIN]](s32)19 %0:_(s32) = COPY $sgpr020 %1:_(s32) = COPY $sgpr121 %2:_(s32) = G_SMIN %0, %122 $sgpr0 = COPY %223...24 25---26name: smin_s32_sv27legalized: true28 29body: |30 bb.0:31 liveins: $sgpr0, $vgpr032 33 ; CHECK-LABEL: name: smin_s32_sv34 ; CHECK: liveins: $sgpr0, $vgpr035 ; CHECK-NEXT: {{ $}}36 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr037 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr038 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)39 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:vgpr(s32) = G_SMIN [[COPY2]], [[COPY1]]40 ; CHECK-NEXT: $vgpr0 = COPY [[SMIN]](s32)41 %0:_(s32) = COPY $sgpr042 %1:_(s32) = COPY $vgpr043 %2:_(s32) = G_SMIN %0, %144 $vgpr0 = COPY %245...46 47---48name: smin_s32_vs49legalized: true50 51body: |52 bb.0:53 liveins: $sgpr0, $vgpr054 55 ; CHECK-LABEL: name: smin_s32_vs56 ; CHECK: liveins: $sgpr0, $vgpr057 ; CHECK-NEXT: {{ $}}58 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr059 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr060 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)61 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:vgpr(s32) = G_SMIN [[COPY]], [[COPY2]]62 ; CHECK-NEXT: $vgpr0 = COPY [[SMIN]](s32)63 %0:_(s32) = COPY $vgpr064 %1:_(s32) = COPY $sgpr065 %2:_(s32) = G_SMIN %0, %166 $vgpr0 = COPY %267...68 69---70name: smin_s32_vv71legalized: true72 73body: |74 bb.0:75 liveins: $vgpr0, $vgpr176 77 ; CHECK-LABEL: name: smin_s32_vv78 ; CHECK: liveins: $vgpr0, $vgpr179 ; CHECK-NEXT: {{ $}}80 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr081 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr182 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:vgpr(s32) = G_SMIN [[COPY]], [[COPY1]]83 ; CHECK-NEXT: $vgpr0 = COPY [[SMIN]](s32)84 %0:_(s32) = COPY $vgpr085 %1:_(s32) = COPY $vgpr186 %2:_(s32) = G_SMIN %0, %187 $vgpr0 = COPY %288...89 90# FIXME: This should use VGPR instruction91---92name: smin_s32_ss_vgpr_use93legalized: true94 95body: |96 bb.0:97 liveins: $sgpr0, $sgpr198 99 ; CHECK-LABEL: name: smin_s32_ss_vgpr_use100 ; CHECK: liveins: $sgpr0, $sgpr1101 ; CHECK-NEXT: {{ $}}102 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0103 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1104 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:sgpr(s32) = G_SMIN [[COPY]], [[COPY1]]105 ; CHECK-NEXT: $vgpr0 = COPY [[SMIN]](s32)106 %0:_(s32) = COPY $sgpr0107 %1:_(s32) = COPY $sgpr1108 %2:_(s32) = G_SMIN %0, %1109 $vgpr0 = COPY %2110...111 112---113name: smin_s16_ss114legalized: true115 116body: |117 bb.0:118 liveins: $sgpr0, $sgpr1119 120 ; CHECK-LABEL: name: smin_s16_ss121 ; CHECK: liveins: $sgpr0, $sgpr1122 ; CHECK-NEXT: {{ $}}123 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0124 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1125 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)126 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)127 ; CHECK-NEXT: [[SEXT:%[0-9]+]]:sgpr(s32) = G_SEXT [[TRUNC]](s16)128 ; CHECK-NEXT: [[SEXT1:%[0-9]+]]:sgpr(s32) = G_SEXT [[TRUNC1]](s16)129 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:sgpr(s32) = G_SMIN [[SEXT]], [[SEXT1]]130 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:sgpr(s16) = G_TRUNC [[SMIN]](s32)131 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:sgpr(s32) = G_ANYEXT [[TRUNC2]](s16)132 ; CHECK-NEXT: $sgpr0 = COPY [[ANYEXT]](s32)133 %0:_(s32) = COPY $sgpr0134 %1:_(s32) = COPY $sgpr1135 %2:_(s16) = G_TRUNC %0136 %3:_(s16) = G_TRUNC %1137 %4:_(s16) = G_SMIN %2, %3138 %5:_(s32) = G_ANYEXT %4139 $sgpr0 = COPY %5140 141...142 143---144name: smin_s16_ss_vgpr_use145legalized: true146 147body: |148 bb.0:149 liveins: $sgpr0, $sgpr1150 151 ; CHECK-LABEL: name: smin_s16_ss_vgpr_use152 ; CHECK: liveins: $sgpr0, $sgpr1153 ; CHECK-NEXT: {{ $}}154 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0155 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1156 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)157 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)158 ; CHECK-NEXT: [[SEXT:%[0-9]+]]:sgpr(s32) = G_SEXT [[TRUNC]](s16)159 ; CHECK-NEXT: [[SEXT1:%[0-9]+]]:sgpr(s32) = G_SEXT [[TRUNC1]](s16)160 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:sgpr(s32) = G_SMIN [[SEXT]], [[SEXT1]]161 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:sgpr(s16) = G_TRUNC [[SMIN]](s32)162 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:sgpr(s32) = G_ANYEXT [[TRUNC2]](s16)163 ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)164 %0:_(s32) = COPY $sgpr0165 %1:_(s32) = COPY $sgpr1166 %2:_(s16) = G_TRUNC %0167 %3:_(s16) = G_TRUNC %1168 %4:_(s16) = G_SMIN %2, %3169 %5:_(s32) = G_ANYEXT %4170 $vgpr0 = COPY %5171 172...173 174---175name: smin_v2s16_ss176legalized: true177 178body: |179 bb.0:180 liveins: $sgpr0, $sgpr1181 182 ; CHECK-LABEL: name: smin_v2s16_ss183 ; CHECK: liveins: $sgpr0, $sgpr1184 ; CHECK-NEXT: {{ $}}185 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0186 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr1187 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:sgpr(s32) = G_BITCAST [[COPY]](<2 x s16>)188 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:sgpr(s32) = G_SEXT_INREG [[BITCAST]], 16189 ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 16190 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:sgpr(s32) = G_ASHR [[BITCAST]], [[C]](s32)191 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:sgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)192 ; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:sgpr(s32) = G_SEXT_INREG [[BITCAST1]], 16193 ; CHECK-NEXT: [[ASHR1:%[0-9]+]]:sgpr(s32) = G_ASHR [[BITCAST1]], [[C]](s32)194 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:sgpr(s32) = G_SMIN [[SEXT_INREG]], [[SEXT_INREG1]]195 ; CHECK-NEXT: [[SMIN1:%[0-9]+]]:sgpr(s32) = G_SMIN [[ASHR]], [[ASHR1]]196 ; CHECK-NEXT: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[SMIN]](s32), [[SMIN1]](s32)197 ; CHECK-NEXT: $sgpr0 = COPY [[BUILD_VECTOR_TRUNC]](<2 x s16>)198 %0:_(<2 x s16>) = COPY $sgpr0199 %1:_(<2 x s16>) = COPY $sgpr1200 %2:_(<2 x s16>) = G_SMIN %0, %1201 $sgpr0 = COPY %2202...203 204---205name: smin_v2s16_sv206legalized: true207 208body: |209 bb.0:210 liveins: $sgpr0, $vgpr0211 212 ; CHECK-LABEL: name: smin_v2s16_sv213 ; CHECK: liveins: $sgpr0, $vgpr0214 ; CHECK-NEXT: {{ $}}215 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0216 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0217 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY]](<2 x s16>)218 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:vgpr(<2 x s16>) = G_SMIN [[COPY2]], [[COPY1]]219 ; CHECK-NEXT: $vgpr0 = COPY [[SMIN]](<2 x s16>)220 %0:_(<2 x s16>) = COPY $sgpr0221 %1:_(<2 x s16>) = COPY $vgpr0222 %2:_(<2 x s16>) = G_SMIN %0, %1223 $vgpr0 = COPY %2224...225 226---227name: smin_v2s16_vs228legalized: true229 230body: |231 bb.0:232 liveins: $sgpr0, $vgpr0233 234 ; CHECK-LABEL: name: smin_v2s16_vs235 ; CHECK: liveins: $sgpr0, $vgpr0236 ; CHECK-NEXT: {{ $}}237 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0238 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0239 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY1]](<2 x s16>)240 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:vgpr(<2 x s16>) = G_SMIN [[COPY]], [[COPY2]]241 ; CHECK-NEXT: $vgpr0 = COPY [[SMIN]](<2 x s16>)242 %0:_(<2 x s16>) = COPY $vgpr0243 %1:_(<2 x s16>) = COPY $sgpr0244 %2:_(<2 x s16>) = G_SMIN %0, %1245 $vgpr0 = COPY %2246...247 248---249name: smin_v2s16_vv250legalized: true251 252body: |253 bb.0:254 liveins: $vgpr0, $vgpr1255 256 ; CHECK-LABEL: name: smin_v2s16_vv257 ; CHECK: liveins: $vgpr0, $vgpr1258 ; CHECK-NEXT: {{ $}}259 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0260 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1261 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:vgpr(<2 x s16>) = G_SMIN [[COPY]], [[COPY1]]262 ; CHECK-NEXT: $vgpr0 = COPY [[SMIN]](<2 x s16>)263 %0:_(<2 x s16>) = COPY $vgpr0264 %1:_(<2 x s16>) = COPY $vgpr1265 %2:_(<2 x s16>) = G_SMIN %0, %1266 $vgpr0 = COPY %2267...268