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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=amdgpu-regbankselect,amdgpu-regbanklegalize %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s3# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=amdgpu-regbankselect,amdgpu-regbanklegalize %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s4 5---6name: sub_s16_ss7legalized: true8 9body: |10 bb.0:11 liveins: $sgpr0, $sgpr112 ; CHECK-LABEL: name: sub_s16_ss13 ; CHECK: liveins: $sgpr0, $sgpr114 ; CHECK-NEXT: {{ $}}15 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr016 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr117 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)18 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)19 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:sgpr(s32) = G_ANYEXT [[TRUNC]](s16)20 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:sgpr(s32) = G_ANYEXT [[TRUNC1]](s16)21 ; CHECK-NEXT: [[SUB:%[0-9]+]]:sgpr(s32) = G_SUB [[ANYEXT]], [[ANYEXT1]]22 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:sgpr(s16) = G_TRUNC [[SUB]](s32)23 ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s16) = G_AND [[TRUNC2]], [[TRUNC2]]24 %0:_(s32) = COPY $sgpr025 %1:_(s32) = COPY $sgpr126 %2:_(s16) = G_TRUNC %027 %3:_(s16) = G_TRUNC %128 %4:_(s16) = G_SUB %2, %329 %6:_(s16) = G_AND %4, %430...31 32---33name: sub_s16_sv34legalized: true35 36body: |37 bb.0:38 liveins: $sgpr0, $vgpr039 ; CHECK-LABEL: name: sub_s16_sv40 ; CHECK: liveins: $sgpr0, $vgpr041 ; CHECK-NEXT: {{ $}}42 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr043 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr044 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)45 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)46 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s16) = COPY [[TRUNC]](s16)47 ; CHECK-NEXT: [[SUB:%[0-9]+]]:vgpr(s16) = G_SUB [[COPY2]], [[TRUNC1]]48 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s16) = G_AND [[SUB]], [[SUB]]49 %0:_(s32) = COPY $sgpr050 %1:_(s32) = COPY $vgpr051 %2:_(s16) = G_TRUNC %052 %3:_(s16) = G_TRUNC %153 %4:_(s16) = G_SUB %2, %354 %6:_(s16) = G_AND %4, %455...56 57---58name: sub_s16_vs59legalized: true60 61body: |62 bb.0:63 liveins: $sgpr0, $vgpr064 ; CHECK-LABEL: name: sub_s16_vs65 ; CHECK: liveins: $sgpr0, $vgpr066 ; CHECK-NEXT: {{ $}}67 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr068 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr069 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)70 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)71 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s16) = COPY [[TRUNC1]](s16)72 ; CHECK-NEXT: [[SUB:%[0-9]+]]:vgpr(s16) = G_SUB [[TRUNC]], [[COPY2]]73 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s16) = G_AND [[SUB]], [[SUB]]74 %0:_(s32) = COPY $vgpr075 %1:_(s32) = COPY $sgpr076 %2:_(s16) = G_TRUNC %077 %3:_(s16) = G_TRUNC %178 %4:_(s16) = G_SUB %2, %379 %6:_(s16) = G_AND %4, %480...81 82---83name: sub_s16_vv84legalized: true85 86body: |87 bb.0:88 liveins: $vgpr0, $vgpr189 ; CHECK-LABEL: name: sub_s16_vv90 ; CHECK: liveins: $vgpr0, $vgpr191 ; CHECK-NEXT: {{ $}}92 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr093 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr194 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)95 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)96 ; CHECK-NEXT: [[SUB:%[0-9]+]]:vgpr(s16) = G_SUB [[TRUNC]], [[TRUNC1]]97 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s16) = G_AND [[SUB]], [[SUB]]98 %0:_(s32) = COPY $vgpr099 %1:_(s32) = COPY $vgpr1100 %2:_(s16) = G_TRUNC %0101 %3:_(s16) = G_TRUNC %1102 %4:_(s16) = G_SUB %2, %3103 %6:_(s16) = G_AND %4, %4104...105 106---107name: sub_s32_ss108legalized: true109 110body: |111 bb.0:112 liveins: $sgpr0, $sgpr1113 ; CHECK-LABEL: name: sub_s32_ss114 ; CHECK: liveins: $sgpr0, $sgpr1115 ; CHECK-NEXT: {{ $}}116 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0117 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1118 ; CHECK-NEXT: [[SUB:%[0-9]+]]:sgpr(s32) = G_SUB [[COPY]], [[COPY1]]119 ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[SUB]], [[SUB]]120 %0:_(s32) = COPY $sgpr0121 %1:_(s32) = COPY $sgpr1122 %2:_(s32) = G_SUB %0, %1123 %4:_(s32) = G_AND %2, %2124...125 126---127name: sub_s32_sv128legalized: true129 130body: |131 bb.0:132 liveins: $sgpr0, $vgpr0133 ; CHECK-LABEL: name: sub_s32_sv134 ; CHECK: liveins: $sgpr0, $vgpr0135 ; CHECK-NEXT: {{ $}}136 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0137 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0138 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)139 ; CHECK-NEXT: [[SUB:%[0-9]+]]:vgpr(s32) = G_SUB [[COPY2]], [[COPY1]]140 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[SUB]], [[SUB]]141 %0:_(s32) = COPY $sgpr0142 %1:_(s32) = COPY $vgpr0143 %2:_(s32) = G_SUB %0, %1144 %4:_(s32) = G_AND %2, %2145...146 147---148name: sub_s32_vs149legalized: true150 151body: |152 bb.0:153 liveins: $sgpr0, $vgpr0154 ; CHECK-LABEL: name: sub_s32_vs155 ; CHECK: liveins: $sgpr0, $vgpr0156 ; CHECK-NEXT: {{ $}}157 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0158 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0159 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)160 ; CHECK-NEXT: [[SUB:%[0-9]+]]:vgpr(s32) = G_SUB [[COPY]], [[COPY2]]161 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[SUB]], [[SUB]]162 %0:_(s32) = COPY $vgpr0163 %1:_(s32) = COPY $sgpr0164 %2:_(s32) = G_SUB %0, %1165 %4:_(s32) = G_AND %2, %2166...167 168---169name: sub_s32_vv170legalized: true171 172body: |173 bb.0:174 liveins: $vgpr0, $vgpr1175 ; CHECK-LABEL: name: sub_s32_vv176 ; CHECK: liveins: $vgpr0, $vgpr1177 ; CHECK-NEXT: {{ $}}178 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0179 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1180 ; CHECK-NEXT: [[SUB:%[0-9]+]]:vgpr(s32) = G_SUB [[COPY]], [[COPY1]]181 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[SUB]], [[SUB]]182 %0:_(s32) = COPY $vgpr0183 %1:_(s32) = COPY $vgpr1184 %2:_(s32) = G_SUB %0, %1185 %4:_(s32) = G_AND %2, %2186...187 188---189name: sub_v2s16_ss190legalized: true191 192body: |193 bb.0:194 liveins: $sgpr0, $sgpr1195 ; CHECK-LABEL: name: sub_v2s16_ss196 ; CHECK: liveins: $sgpr0, $sgpr1197 ; CHECK-NEXT: {{ $}}198 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0199 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr1200 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:sgpr(s32) = G_BITCAST [[COPY]](<2 x s16>)201 ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 16202 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:sgpr(s32) = G_LSHR [[BITCAST]], [[C]](s32)203 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:sgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)204 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:sgpr(s32) = G_LSHR [[BITCAST1]], [[C]](s32)205 ; CHECK-NEXT: [[SUB:%[0-9]+]]:sgpr(s32) = G_SUB [[BITCAST]], [[BITCAST1]]206 ; CHECK-NEXT: [[SUB1:%[0-9]+]]:sgpr(s32) = G_SUB [[LSHR]], [[LSHR1]]207 ; CHECK-NEXT: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[SUB]](s32), [[SUB1]](s32)208 ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(<2 x s16>) = G_AND [[BUILD_VECTOR_TRUNC]], [[BUILD_VECTOR_TRUNC]]209 %0:_(<2 x s16>) = COPY $sgpr0210 %1:_(<2 x s16>) = COPY $sgpr1211 %2:_(<2 x s16>) = G_SUB %0, %1212 %5:_(<2 x s16>) = G_AND %2, %2213...214 215---216name: sub_v2s16_sv217legalized: true218 219body: |220 bb.0:221 liveins: $sgpr0, $vgpr0222 ; CHECK-LABEL: name: sub_v2s16_sv223 ; CHECK: liveins: $sgpr0, $vgpr0224 ; CHECK-NEXT: {{ $}}225 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0226 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0227 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY]](<2 x s16>)228 ; CHECK-NEXT: [[SUB:%[0-9]+]]:vgpr(<2 x s16>) = G_SUB [[COPY2]], [[COPY1]]229 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(<2 x s16>) = G_AND [[SUB]], [[SUB]]230 %0:_(<2 x s16>) = COPY $sgpr0231 %1:_(<2 x s16>) = COPY $vgpr0232 %2:_(<2 x s16>) = G_SUB %0, %1233 %5:_(<2 x s16>) = G_AND %2, %2234...235 236---237name: sub_v2s16_vs238legalized: true239 240body: |241 bb.0:242 liveins: $sgpr0, $vgpr0243 ; CHECK-LABEL: name: sub_v2s16_vs244 ; CHECK: liveins: $sgpr0, $vgpr0245 ; CHECK-NEXT: {{ $}}246 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0247 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0248 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY1]](<2 x s16>)249 ; CHECK-NEXT: [[SUB:%[0-9]+]]:vgpr(<2 x s16>) = G_SUB [[COPY]], [[COPY2]]250 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(<2 x s16>) = G_AND [[SUB]], [[SUB]]251 %0:_(<2 x s16>) = COPY $vgpr0252 %1:_(<2 x s16>) = COPY $sgpr0253 %2:_(<2 x s16>) = G_SUB %0, %1254 %5:_(<2 x s16>) = G_AND %2, %2255...256 257---258name: sub_v2s16_vv259legalized: true260 261body: |262 bb.0:263 liveins: $vgpr0, $vgpr1264 ; CHECK-LABEL: name: sub_v2s16_vv265 ; CHECK: liveins: $vgpr0, $vgpr1266 ; CHECK-NEXT: {{ $}}267 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0268 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1269 ; CHECK-NEXT: [[SUB:%[0-9]+]]:vgpr(<2 x s16>) = G_SUB [[COPY]], [[COPY1]]270 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(<2 x s16>) = G_AND [[SUB]], [[SUB]]271 %0:_(<2 x s16>) = COPY $vgpr0272 %1:_(<2 x s16>) = COPY $vgpr1273 %2:_(<2 x s16>) = G_SUB %0, %1274 %5:_(<2 x s16>) = G_AND %2, %2275...276 277---278name: sub_s64_ss279legalized: true280 281body: |282 bb.0:283 liveins: $sgpr0_sgpr1, $sgpr0_sgpr1284 ; CHECK-LABEL: name: sub_s64_ss285 ; CHECK: liveins: $sgpr0_sgpr1, $sgpr0_sgpr1286 ; CHECK-NEXT: {{ $}}287 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1288 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1289 ; CHECK-NEXT: [[SUB:%[0-9]+]]:sgpr(s64) = G_SUB [[COPY]], [[COPY1]]290 ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s64) = G_AND [[SUB]], [[SUB]]291 %0:_(s64) = COPY $sgpr0_sgpr1292 %1:_(s64) = COPY $sgpr0_sgpr1293 %2:_(s64) = G_SUB %0, %1294 %4:_(s64) = G_AND %2, %2295...296 297---298name: sub_s64_sv299legalized: true300 301body: |302 bb.0:303 liveins: $sgpr0_sgpr1, $vgpr0_vgpr1304 ; CHECK-LABEL: name: sub_s64_sv305 ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0_vgpr1306 ; CHECK-NEXT: {{ $}}307 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1308 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1309 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)310 ; CHECK-NEXT: [[SUB:%[0-9]+]]:vgpr(s64) = G_SUB [[COPY2]], [[COPY1]]311 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[SUB]](s64)312 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[SUB]](s64)313 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]314 ; CHECK-NEXT: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]315 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)316 %0:_(s64) = COPY $sgpr0_sgpr1317 %1:_(s64) = COPY $vgpr0_vgpr1318 %2:_(s64) = G_SUB %0, %1319 %4:_(s64) = G_AND %2, %2320...321 322---323name: sub_s64_vs324legalized: true325 326body: |327 bb.0:328 liveins: $sgpr0_sgpr1, $vgpr0_vgpr1329 ; CHECK-LABEL: name: sub_s64_vs330 ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0_vgpr1331 ; CHECK-NEXT: {{ $}}332 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1333 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1334 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY1]](s64)335 ; CHECK-NEXT: [[SUB:%[0-9]+]]:vgpr(s64) = G_SUB [[COPY]], [[COPY2]]336 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[SUB]](s64)337 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[SUB]](s64)338 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]339 ; CHECK-NEXT: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]340 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)341 %0:_(s64) = COPY $vgpr0_vgpr1342 %1:_(s64) = COPY $sgpr0_sgpr1343 %2:_(s64) = G_SUB %0, %1344 %4:_(s64) = G_AND %2, %2345...346 347---348name: sub_s64_vv349legalized: true350 351body: |352 bb.0:353 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3354 ; CHECK-LABEL: name: sub_s64_vv355 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3356 ; CHECK-NEXT: {{ $}}357 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1358 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3359 ; CHECK-NEXT: [[SUB:%[0-9]+]]:vgpr(s64) = G_SUB [[COPY]], [[COPY1]]360 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[SUB]](s64)361 ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[SUB]](s64)362 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]363 ; CHECK-NEXT: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]364 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)365 %0:_(s64) = COPY $vgpr0_vgpr1366 %1:_(s64) = COPY $vgpr2_vgpr3367 %2:_(s64) = G_SUB %0, %1368 %4:_(s64) = G_AND %2, %2369...370 371---372name: usubo_s32_ss373legalized: true374 375body: |376 bb.0:377 liveins: $sgpr0, $sgpr1378 ; CHECK-LABEL: name: usubo_s32_ss379 ; CHECK: liveins: $sgpr0, $sgpr1380 ; CHECK-NEXT: {{ $}}381 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0382 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1383 ; CHECK-NEXT: [[USUBO:%[0-9]+]]:sgpr(s32), [[USUBO1:%[0-9]+]]:sgpr(s32) = G_USUBO [[COPY]], [[COPY1]]384 ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[USUBO]], [[USUBO]]385 %0:_(s32) = COPY $sgpr0386 %1:_(s32) = COPY $sgpr1387 %2:_(s32), %3:_(s1) = G_USUBO %0, %1388 %5:_(s32) = G_AND %2, %2389...390 391---392name: usubo_s32_sv393legalized: true394 395body: |396 bb.0:397 liveins: $sgpr0, $vgpr1398 ; CHECK-LABEL: name: usubo_s32_sv399 ; CHECK: liveins: $sgpr0, $vgpr1400 ; CHECK-NEXT: {{ $}}401 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0402 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1403 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)404 ; CHECK-NEXT: [[USUBO:%[0-9]+]]:vgpr(s32), [[USUBO1:%[0-9]+]]:vcc(s1) = G_USUBO [[COPY2]], [[COPY1]]405 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[USUBO]], [[USUBO]]406 %0:_(s32) = COPY $sgpr0407 %1:_(s32) = COPY $vgpr1408 %2:_(s32), %3:_(s1) = G_USUBO %0, %1409 %5:_(s32) = G_AND %2, %2410...411 412---413name: usubo_s32_vs414legalized: true415 416body: |417 bb.0:418 liveins: $vgpr0, $sgpr1419 ; CHECK-LABEL: name: usubo_s32_vs420 ; CHECK: liveins: $vgpr0, $sgpr1421 ; CHECK-NEXT: {{ $}}422 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0423 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1424 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)425 ; CHECK-NEXT: [[USUBO:%[0-9]+]]:vgpr(s32), [[USUBO1:%[0-9]+]]:vcc(s1) = G_USUBO [[COPY]], [[COPY2]]426 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[USUBO]], [[USUBO]]427 %0:_(s32) = COPY $vgpr0428 %1:_(s32) = COPY $sgpr1429 %2:_(s32), %3:_(s1) = G_USUBO %0, %1430 %5:_(s32) = G_AND %2, %2431...432 433---434name: usubo_s32_vv435legalized: true436 437body: |438 bb.0:439 liveins: $vgpr0, $vgpr1440 ; CHECK-LABEL: name: usubo_s32_vv441 ; CHECK: liveins: $vgpr0, $vgpr1442 ; CHECK-NEXT: {{ $}}443 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0444 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1445 ; CHECK-NEXT: [[USUBO:%[0-9]+]]:vgpr(s32), [[USUBO1:%[0-9]+]]:vcc(s1) = G_USUBO [[COPY]], [[COPY1]]446 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[USUBO]], [[USUBO]]447 %0:_(s32) = COPY $vgpr0448 %1:_(s32) = COPY $vgpr1449 %2:_(s32), %3:_(s1) = G_USUBO %0, %1450 %5:_(s32) = G_AND %2, %2451...452 453---454name: usube_s32_ss455legalized: true456 457body: |458 bb.0:459 liveins: $sgpr0, $sgpr1, $sgpr2460 ; CHECK-LABEL: name: usube_s32_ss461 ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2462 ; CHECK-NEXT: {{ $}}463 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0464 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1465 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2466 ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 1467 ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[COPY2]], [[C]]468 ; CHECK-NEXT: [[USUBE:%[0-9]+]]:sgpr(s32), [[USUBE1:%[0-9]+]]:sgpr(s32) = G_USUBE [[COPY]], [[COPY1]], [[AND]]469 ; CHECK-NEXT: [[AND1:%[0-9]+]]:sgpr(s32) = G_AND [[USUBE]], [[USUBE]]470 %0:_(s32) = COPY $sgpr0471 %1:_(s32) = COPY $sgpr1472 %2:_(s32) = COPY $sgpr2473 %3:_(s1) = G_TRUNC %2474 %4:_(s32), %5:_(s1) = G_USUBE %0, %1, %3475 %7:_(s32) = G_AND %4, %4476...477 478---479name: usube_s32_sv480legalized: true481 482body: |483 bb.0:484 liveins: $sgpr0, $vgpr1, $sgpr2485 ; CHECK-LABEL: name: usube_s32_sv486 ; CHECK: liveins: $sgpr0, $vgpr1, $sgpr2487 ; CHECK-NEXT: {{ $}}488 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0489 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1490 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2491 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)492 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[COPY2]](s32)493 ; CHECK-NEXT: [[USUBE:%[0-9]+]]:vgpr(s32), [[USUBE1:%[0-9]+]]:vcc(s1) = G_USUBE [[COPY3]], [[COPY1]], [[AMDGPU_COPY_VCC_SCC]]494 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[USUBE]], [[USUBE]]495 %0:_(s32) = COPY $sgpr0496 %1:_(s32) = COPY $vgpr1497 %2:_(s32) = COPY $sgpr2498 %3:_(s1) = G_TRUNC %2499 %4:_(s32), %5:_(s1) = G_USUBE %0, %1, %3500 %7:_(s32) = G_AND %4, %4501...502 503---504name: usube_s32_vs505legalized: true506 507body: |508 bb.0:509 liveins: $vgpr0, $sgpr1, $sgpr2510 ; CHECK-LABEL: name: usube_s32_vs511 ; CHECK: liveins: $vgpr0, $sgpr1, $sgpr2512 ; CHECK-NEXT: {{ $}}513 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0514 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1515 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2516 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)517 ; CHECK-NEXT: [[AMDGPU_COPY_VCC_SCC:%[0-9]+]]:vcc(s1) = G_AMDGPU_COPY_VCC_SCC [[COPY2]](s32)518 ; CHECK-NEXT: [[USUBE:%[0-9]+]]:vgpr(s32), [[USUBE1:%[0-9]+]]:vcc(s1) = G_USUBE [[COPY]], [[COPY3]], [[AMDGPU_COPY_VCC_SCC]]519 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[USUBE]], [[USUBE]]520 %0:_(s32) = COPY $vgpr0521 %1:_(s32) = COPY $sgpr1522 %2:_(s32) = COPY $sgpr2523 %3:_(s1) = G_TRUNC %2524 %4:_(s32), %5:_(s1) = G_USUBE %0, %1, %3525 %7:_(s32) = G_AND %4, %4526...527 528---529name: usube_s32_vv530legalized: true531 532body: |533 bb.0:534 liveins: $vgpr0, $vgpr1, $vgpr2535 ; CHECK-LABEL: name: usube_s32_vv536 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2537 ; CHECK-NEXT: {{ $}}538 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0539 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1540 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr2541 ; CHECK-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 1542 ; CHECK-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[COPY2]], [[C]]543 ; CHECK-NEXT: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 0544 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[AND]](s32), [[C1]]545 ; CHECK-NEXT: [[USUBE:%[0-9]+]]:vgpr(s32), [[USUBE1:%[0-9]+]]:vcc(s1) = G_USUBE [[COPY]], [[COPY1]], [[ICMP]]546 ; CHECK-NEXT: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[USUBE]], [[USUBE]]547 %0:_(s32) = COPY $vgpr0548 %1:_(s32) = COPY $vgpr1549 %2:_(s32) = COPY $vgpr2550 %3:_(s1) = G_TRUNC %2551 %4:_(s32), %5:_(s1) = G_USUBE %0, %1, %3552 %7:_(s32) = G_AND %4, %4553...554