brintos

brintos / llvm-project-archived public Read only

0
0
Text · 8.3 KiB · fdb05f6 Raw
273 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass='amdgpu-regbankselect,amdgpu-regbanklegalize' -o - %s | FileCheck %s3 4---5name: umin_s32_ss6legalized: true7 8body: |9  bb.0:10    liveins: $sgpr0, $sgpr111 12    ; CHECK-LABEL: name: umin_s32_ss13    ; CHECK: liveins: $sgpr0, $sgpr114    ; CHECK-NEXT: {{  $}}15    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr016    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr117    ; CHECK-NEXT: [[UMIN:%[0-9]+]]:sgpr(s32) = G_UMIN [[COPY]], [[COPY1]]18    ; CHECK-NEXT: $sgpr0 = COPY [[UMIN]](s32)19    %0:_(s32) = COPY $sgpr020    %1:_(s32) = COPY $sgpr121    %2:_(s32) = G_UMIN %0, %122    $sgpr0 = COPY %223 24...25 26---27name: umin_s32_sv28legalized: true29 30body: |31  bb.0:32    liveins: $sgpr0, $vgpr033 34    ; CHECK-LABEL: name: umin_s32_sv35    ; CHECK: liveins: $sgpr0, $vgpr036    ; CHECK-NEXT: {{  $}}37    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr038    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr039    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)40    ; CHECK-NEXT: [[UMIN:%[0-9]+]]:vgpr(s32) = G_UMIN [[COPY2]], [[COPY1]]41    ; CHECK-NEXT: $vgpr0 = COPY [[UMIN]](s32)42    %0:_(s32) = COPY $sgpr043    %1:_(s32) = COPY $vgpr044    %2:_(s32) = G_UMIN %0, %145    $vgpr0 = COPY %246 47...48 49---50name: umin_s32_vs51legalized: true52 53body: |54  bb.0:55    liveins: $sgpr0, $vgpr056 57    ; CHECK-LABEL: name: umin_s32_vs58    ; CHECK: liveins: $sgpr0, $vgpr059    ; CHECK-NEXT: {{  $}}60    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr061    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr062    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)63    ; CHECK-NEXT: [[UMIN:%[0-9]+]]:vgpr(s32) = G_UMIN [[COPY]], [[COPY2]]64    ; CHECK-NEXT: $vgpr0 = COPY [[UMIN]](s32)65    %0:_(s32) = COPY $vgpr066    %1:_(s32) = COPY $sgpr067    %2:_(s32) = G_UMIN %0, %168    $vgpr0 = COPY %269 70...71 72---73name: umin_s32_vv74legalized: true75 76body: |77  bb.0:78    liveins: $vgpr0, $vgpr179 80    ; CHECK-LABEL: name: umin_s32_vv81    ; CHECK: liveins: $vgpr0, $vgpr182    ; CHECK-NEXT: {{  $}}83    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr084    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr185    ; CHECK-NEXT: [[UMIN:%[0-9]+]]:vgpr(s32) = G_UMIN [[COPY]], [[COPY1]]86    ; CHECK-NEXT: $vgpr0 = COPY [[UMIN]](s32)87    %0:_(s32) = COPY $vgpr088    %1:_(s32) = COPY $vgpr189    %2:_(s32) = G_UMIN %0, %190    $vgpr0 = COPY %291 92...93 94# FIXME: This should use VGPR instruction95---96name: umin_s32_ss_vgpr_use97legalized: true98 99body: |100  bb.0:101    liveins: $sgpr0, $sgpr1102 103    ; CHECK-LABEL: name: umin_s32_ss_vgpr_use104    ; CHECK: liveins: $sgpr0, $sgpr1105    ; CHECK-NEXT: {{  $}}106    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0107    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1108    ; CHECK-NEXT: [[UMIN:%[0-9]+]]:sgpr(s32) = G_UMIN [[COPY]], [[COPY1]]109    ; CHECK-NEXT: $vgpr0 = COPY [[UMIN]](s32)110    %0:_(s32) = COPY $sgpr0111    %1:_(s32) = COPY $sgpr1112    %2:_(s32) = G_UMIN %0, %1113    $vgpr0 = COPY %2114...115 116---117name: umin_s16_ss118legalized: true119 120body: |121  bb.0:122    liveins: $sgpr0, $sgpr1123 124    ; CHECK-LABEL: name: umin_s16_ss125    ; CHECK: liveins: $sgpr0, $sgpr1126    ; CHECK-NEXT: {{  $}}127    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0128    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1129    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)130    ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)131    ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:sgpr(s32) = G_ZEXT [[TRUNC]](s16)132    ; CHECK-NEXT: [[ZEXT1:%[0-9]+]]:sgpr(s32) = G_ZEXT [[TRUNC1]](s16)133    ; CHECK-NEXT: [[UMIN:%[0-9]+]]:sgpr(s32) = G_UMIN [[ZEXT]], [[ZEXT1]]134    ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:sgpr(s16) = G_TRUNC [[UMIN]](s32)135    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:sgpr(s32) = G_ANYEXT [[TRUNC2]](s16)136    ; CHECK-NEXT: $sgpr0 = COPY [[ANYEXT]](s32)137    %0:_(s32) = COPY $sgpr0138    %1:_(s32) = COPY $sgpr1139    %2:_(s16) = G_TRUNC %0140    %3:_(s16) = G_TRUNC %1141    %4:_(s16) = G_UMIN %2, %3142    %5:_(s32) = G_ANYEXT %4143    $sgpr0 = COPY %5144 145...146 147---148name: umin_s16_ss_vgpr_use149legalized: true150 151body: |152  bb.0:153    liveins: $sgpr0, $sgpr1154 155    ; CHECK-LABEL: name: umin_s16_ss_vgpr_use156    ; CHECK: liveins: $sgpr0, $sgpr1157    ; CHECK-NEXT: {{  $}}158    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0159    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1160    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)161    ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)162    ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:sgpr(s32) = G_ZEXT [[TRUNC]](s16)163    ; CHECK-NEXT: [[ZEXT1:%[0-9]+]]:sgpr(s32) = G_ZEXT [[TRUNC1]](s16)164    ; CHECK-NEXT: [[UMIN:%[0-9]+]]:sgpr(s32) = G_UMIN [[ZEXT]], [[ZEXT1]]165    ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:sgpr(s16) = G_TRUNC [[UMIN]](s32)166    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:sgpr(s32) = G_ANYEXT [[TRUNC2]](s16)167    ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)168    %0:_(s32) = COPY $sgpr0169    %1:_(s32) = COPY $sgpr1170    %2:_(s16) = G_TRUNC %0171    %3:_(s16) = G_TRUNC %1172    %4:_(s16) = G_UMIN %2, %3173    %5:_(s32) = G_ANYEXT %4174    $vgpr0 = COPY %5175 176...177 178---179name: umin_v2s16_ss180legalized: true181 182body: |183  bb.0:184    liveins: $sgpr0, $sgpr1185 186    ; CHECK-LABEL: name: umin_v2s16_ss187    ; CHECK: liveins: $sgpr0, $sgpr1188    ; CHECK-NEXT: {{  $}}189    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0190    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr1191    ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:sgpr(s32) = G_BITCAST [[COPY]](<2 x s16>)192    ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 65535193    ; CHECK-NEXT: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[BITCAST]], [[C]]194    ; CHECK-NEXT: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 16195    ; CHECK-NEXT: [[LSHR:%[0-9]+]]:sgpr(s32) = G_LSHR [[BITCAST]], [[C1]](s32)196    ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:sgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)197    ; CHECK-NEXT: [[AND1:%[0-9]+]]:sgpr(s32) = G_AND [[BITCAST1]], [[C]]198    ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:sgpr(s32) = G_LSHR [[BITCAST1]], [[C1]](s32)199    ; CHECK-NEXT: [[UMIN:%[0-9]+]]:sgpr(s32) = G_UMIN [[AND]], [[AND1]]200    ; CHECK-NEXT: [[UMIN1:%[0-9]+]]:sgpr(s32) = G_UMIN [[LSHR]], [[LSHR1]]201    ; CHECK-NEXT: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[UMIN]](s32), [[UMIN1]](s32)202    ; CHECK-NEXT: $sgpr0 = COPY [[BUILD_VECTOR_TRUNC]](<2 x s16>)203    %0:_(<2 x s16>) = COPY $sgpr0204    %1:_(<2 x s16>) = COPY $sgpr1205    %2:_(<2 x s16>) = G_UMIN %0, %1206    $sgpr0 = COPY %2207...208 209---210name: umin_v2s16_sv211legalized: true212 213body: |214  bb.0:215    liveins: $sgpr0, $vgpr0216 217    ; CHECK-LABEL: name: umin_v2s16_sv218    ; CHECK: liveins: $sgpr0, $vgpr0219    ; CHECK-NEXT: {{  $}}220    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0221    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0222    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY]](<2 x s16>)223    ; CHECK-NEXT: [[UMIN:%[0-9]+]]:vgpr(<2 x s16>) = G_UMIN [[COPY2]], [[COPY1]]224    ; CHECK-NEXT: $vgpr0 = COPY [[UMIN]](<2 x s16>)225    %0:_(<2 x s16>) = COPY $sgpr0226    %1:_(<2 x s16>) = COPY $vgpr0227    %2:_(<2 x s16>) = G_UMIN %0, %1228    $vgpr0 = COPY %2229...230 231---232name: umin_v2s16_vs233legalized: true234 235body: |236  bb.0:237    liveins: $sgpr0, $vgpr0238 239    ; CHECK-LABEL: name: umin_v2s16_vs240    ; CHECK: liveins: $sgpr0, $vgpr0241    ; CHECK-NEXT: {{  $}}242    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0243    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0244    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY1]](<2 x s16>)245    ; CHECK-NEXT: [[UMIN:%[0-9]+]]:vgpr(<2 x s16>) = G_UMIN [[COPY]], [[COPY2]]246    ; CHECK-NEXT: $vgpr0 = COPY [[UMIN]](<2 x s16>)247    %0:_(<2 x s16>) = COPY $vgpr0248    %1:_(<2 x s16>) = COPY $sgpr0249    %2:_(<2 x s16>) = G_UMIN %0, %1250    $vgpr0 = COPY %2251...252 253---254name: umin_v2s16_vv255legalized: true256 257body: |258  bb.0:259    liveins: $vgpr0, $vgpr1260 261    ; CHECK-LABEL: name: umin_v2s16_vv262    ; CHECK: liveins: $vgpr0, $vgpr1263    ; CHECK-NEXT: {{  $}}264    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0265    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1266    ; CHECK-NEXT: [[UMIN:%[0-9]+]]:vgpr(<2 x s16>) = G_UMIN [[COPY]], [[COPY1]]267    ; CHECK-NEXT: $vgpr0 = COPY [[UMIN]](<2 x s16>)268    %0:_(<2 x s16>) = COPY $vgpr0269    %1:_(<2 x s16>) = COPY $vgpr1270    %2:_(<2 x s16>) = G_UMIN %0, %1271    $vgpr0 = COPY %2272...273