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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=tahiti -o - %s | FileCheck -check-prefix=GFX6 %s3; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=fiji -o - %s | FileCheck -check-prefix=GFX8 %s4; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -o - %s | FileCheck -check-prefix=GFX9 %s5; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 -o - %s | FileCheck -check-prefixes=GFX10PLUS,GFX10 %s6; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 -o - %s | FileCheck -check-prefixes=GFX10PLUS,GFX11 %s7 8define i7 @v_saddsat_i7(i7 %lhs, i7 %rhs) {9; GFX6-LABEL: v_saddsat_i7:10; GFX6:       ; %bb.0:11; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 25, v013; GFX6-NEXT:    v_min_i32_e32 v3, 0, v014; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 25, v115; GFX6-NEXT:    v_max_i32_e32 v2, 0, v016; GFX6-NEXT:    v_sub_i32_e32 v3, vcc, 0x80000000, v317; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, 0x7fffffff, v218; GFX6-NEXT:    v_max_i32_e32 v1, v3, v119; GFX6-NEXT:    v_min_i32_e32 v1, v1, v220; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v121; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 25, v022; GFX6-NEXT:    s_setpc_b64 s[30:31]23;24; GFX8-LABEL: v_saddsat_i7:25; GFX8:       ; %bb.0:26; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)27; GFX8-NEXT:    v_lshlrev_b16_e32 v0, 9, v028; GFX8-NEXT:    v_min_i16_e32 v3, 0, v029; GFX8-NEXT:    v_lshlrev_b16_e32 v1, 9, v130; GFX8-NEXT:    v_max_i16_e32 v2, 0, v031; GFX8-NEXT:    v_sub_u16_e32 v3, 0x8000, v332; GFX8-NEXT:    v_sub_u16_e32 v2, 0x7fff, v233; GFX8-NEXT:    v_max_i16_e32 v1, v3, v134; GFX8-NEXT:    v_min_i16_e32 v1, v1, v235; GFX8-NEXT:    v_add_u16_e32 v0, v0, v136; GFX8-NEXT:    v_ashrrev_i16_e32 v0, 9, v037; GFX8-NEXT:    s_setpc_b64 s[30:31]38;39; GFX9-LABEL: v_saddsat_i7:40; GFX9:       ; %bb.0:41; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)42; GFX9-NEXT:    v_lshlrev_b16_e32 v0, 9, v043; GFX9-NEXT:    v_lshlrev_b16_e32 v1, 9, v144; GFX9-NEXT:    v_add_i16 v0, v0, v1 clamp45; GFX9-NEXT:    v_ashrrev_i16_e32 v0, 9, v046; GFX9-NEXT:    s_setpc_b64 s[30:31]47;48; GFX10PLUS-LABEL: v_saddsat_i7:49; GFX10PLUS:       ; %bb.0:50; GFX10PLUS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)51; GFX10PLUS-NEXT:    v_lshlrev_b16 v0, 9, v052; GFX10PLUS-NEXT:    v_lshlrev_b16 v1, 9, v153; GFX10PLUS-NEXT:    v_add_nc_i16 v0, v0, v1 clamp54; GFX10PLUS-NEXT:    v_ashrrev_i16 v0, 9, v055; GFX10PLUS-NEXT:    s_setpc_b64 s[30:31]56  %result = call i7 @llvm.sadd.sat.i7(i7 %lhs, i7 %rhs)57  ret i7 %result58}59 60define amdgpu_ps i7 @s_saddsat_i7(i7 inreg %lhs, i7 inreg %rhs) {61; GFX6-LABEL: s_saddsat_i7:62; GFX6:       ; %bb.0:63; GFX6-NEXT:    s_lshl_b32 s0, s0, 2564; GFX6-NEXT:    s_min_i32 s3, s0, 065; GFX6-NEXT:    s_lshl_b32 s1, s1, 2566; GFX6-NEXT:    s_max_i32 s2, s0, 067; GFX6-NEXT:    s_sub_i32 s3, 0x80000000, s368; GFX6-NEXT:    s_sub_i32 s2, 0x7fffffff, s269; GFX6-NEXT:    s_max_i32 s1, s3, s170; GFX6-NEXT:    s_min_i32 s1, s1, s271; GFX6-NEXT:    s_add_i32 s0, s0, s172; GFX6-NEXT:    s_ashr_i32 s0, s0, 2573; GFX6-NEXT:    ; return to shader part epilog74;75; GFX8-LABEL: s_saddsat_i7:76; GFX8:       ; %bb.0:77; GFX8-NEXT:    s_lshl_b32 s0, s0, 978; GFX8-NEXT:    s_sext_i32_i16 s2, s079; GFX8-NEXT:    s_max_i32 s3, s2, 080; GFX8-NEXT:    s_min_i32 s2, s2, 081; GFX8-NEXT:    s_lshl_b32 s1, s1, 982; GFX8-NEXT:    s_sub_i32 s2, 0x8000, s283; GFX8-NEXT:    s_sext_i32_i16 s2, s284; GFX8-NEXT:    s_sext_i32_i16 s1, s185; GFX8-NEXT:    s_sub_i32 s3, 0x7fff, s386; GFX8-NEXT:    s_max_i32 s1, s2, s187; GFX8-NEXT:    s_sext_i32_i16 s1, s188; GFX8-NEXT:    s_sext_i32_i16 s2, s389; GFX8-NEXT:    s_min_i32 s1, s1, s290; GFX8-NEXT:    s_add_i32 s0, s0, s191; GFX8-NEXT:    s_sext_i32_i16 s0, s092; GFX8-NEXT:    s_ashr_i32 s0, s0, 993; GFX8-NEXT:    ; return to shader part epilog94;95; GFX9-LABEL: s_saddsat_i7:96; GFX9:       ; %bb.0:97; GFX9-NEXT:    s_lshl_b32 s1, s1, 998; GFX9-NEXT:    s_lshl_b32 s0, s0, 999; GFX9-NEXT:    v_mov_b32_e32 v0, s1100; GFX9-NEXT:    v_add_i16 v0, s0, v0 clamp101; GFX9-NEXT:    v_ashrrev_i16_e32 v0, 9, v0102; GFX9-NEXT:    v_readfirstlane_b32 s0, v0103; GFX9-NEXT:    ; return to shader part epilog104;105; GFX10PLUS-LABEL: s_saddsat_i7:106; GFX10PLUS:       ; %bb.0:107; GFX10PLUS-NEXT:    s_lshl_b32 s0, s0, 9108; GFX10PLUS-NEXT:    s_lshl_b32 s1, s1, 9109; GFX10PLUS-NEXT:    v_add_nc_i16 v0, s0, s1 clamp110; GFX10PLUS-NEXT:    v_ashrrev_i16 v0, 9, v0111; GFX10PLUS-NEXT:    v_readfirstlane_b32 s0, v0112; GFX10PLUS-NEXT:    ; return to shader part epilog113  %result = call i7 @llvm.sadd.sat.i7(i7 %lhs, i7 %rhs)114  ret i7 %result115}116 117define i8 @v_saddsat_i8(i8 %lhs, i8 %rhs) {118; GFX6-LABEL: v_saddsat_i8:119; GFX6:       ; %bb.0:120; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)121; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 24, v0122; GFX6-NEXT:    v_min_i32_e32 v3, 0, v0123; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 24, v1124; GFX6-NEXT:    v_max_i32_e32 v2, 0, v0125; GFX6-NEXT:    v_sub_i32_e32 v3, vcc, 0x80000000, v3126; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, 0x7fffffff, v2127; GFX6-NEXT:    v_max_i32_e32 v1, v3, v1128; GFX6-NEXT:    v_min_i32_e32 v1, v1, v2129; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v1130; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 24, v0131; GFX6-NEXT:    s_setpc_b64 s[30:31]132;133; GFX8-LABEL: v_saddsat_i8:134; GFX8:       ; %bb.0:135; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)136; GFX8-NEXT:    v_lshlrev_b16_e32 v0, 8, v0137; GFX8-NEXT:    v_min_i16_e32 v3, 0, v0138; GFX8-NEXT:    v_lshlrev_b16_e32 v1, 8, v1139; GFX8-NEXT:    v_max_i16_e32 v2, 0, v0140; GFX8-NEXT:    v_sub_u16_e32 v3, 0x8000, v3141; GFX8-NEXT:    v_sub_u16_e32 v2, 0x7fff, v2142; GFX8-NEXT:    v_max_i16_e32 v1, v3, v1143; GFX8-NEXT:    v_min_i16_e32 v1, v1, v2144; GFX8-NEXT:    v_add_u16_e32 v0, v0, v1145; GFX8-NEXT:    v_ashrrev_i16_e32 v0, 8, v0146; GFX8-NEXT:    s_setpc_b64 s[30:31]147;148; GFX9-LABEL: v_saddsat_i8:149; GFX9:       ; %bb.0:150; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)151; GFX9-NEXT:    v_lshlrev_b16_e32 v0, 8, v0152; GFX9-NEXT:    v_lshlrev_b16_e32 v1, 8, v1153; GFX9-NEXT:    v_add_i16 v0, v0, v1 clamp154; GFX9-NEXT:    v_ashrrev_i16_e32 v0, 8, v0155; GFX9-NEXT:    s_setpc_b64 s[30:31]156;157; GFX10PLUS-LABEL: v_saddsat_i8:158; GFX10PLUS:       ; %bb.0:159; GFX10PLUS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)160; GFX10PLUS-NEXT:    v_lshlrev_b16 v0, 8, v0161; GFX10PLUS-NEXT:    v_lshlrev_b16 v1, 8, v1162; GFX10PLUS-NEXT:    v_add_nc_i16 v0, v0, v1 clamp163; GFX10PLUS-NEXT:    v_ashrrev_i16 v0, 8, v0164; GFX10PLUS-NEXT:    s_setpc_b64 s[30:31]165  %result = call i8 @llvm.sadd.sat.i8(i8 %lhs, i8 %rhs)166  ret i8 %result167}168 169define amdgpu_ps i8 @s_saddsat_i8(i8 inreg %lhs, i8 inreg %rhs) {170; GFX6-LABEL: s_saddsat_i8:171; GFX6:       ; %bb.0:172; GFX6-NEXT:    s_lshl_b32 s0, s0, 24173; GFX6-NEXT:    s_min_i32 s3, s0, 0174; GFX6-NEXT:    s_lshl_b32 s1, s1, 24175; GFX6-NEXT:    s_max_i32 s2, s0, 0176; GFX6-NEXT:    s_sub_i32 s3, 0x80000000, s3177; GFX6-NEXT:    s_sub_i32 s2, 0x7fffffff, s2178; GFX6-NEXT:    s_max_i32 s1, s3, s1179; GFX6-NEXT:    s_min_i32 s1, s1, s2180; GFX6-NEXT:    s_add_i32 s0, s0, s1181; GFX6-NEXT:    s_ashr_i32 s0, s0, 24182; GFX6-NEXT:    ; return to shader part epilog183;184; GFX8-LABEL: s_saddsat_i8:185; GFX8:       ; %bb.0:186; GFX8-NEXT:    s_lshl_b32 s0, s0, 8187; GFX8-NEXT:    s_sext_i32_i16 s2, s0188; GFX8-NEXT:    s_max_i32 s3, s2, 0189; GFX8-NEXT:    s_min_i32 s2, s2, 0190; GFX8-NEXT:    s_lshl_b32 s1, s1, 8191; GFX8-NEXT:    s_sub_i32 s2, 0x8000, s2192; GFX8-NEXT:    s_sext_i32_i16 s2, s2193; GFX8-NEXT:    s_sext_i32_i16 s1, s1194; GFX8-NEXT:    s_sub_i32 s3, 0x7fff, s3195; GFX8-NEXT:    s_max_i32 s1, s2, s1196; GFX8-NEXT:    s_sext_i32_i16 s1, s1197; GFX8-NEXT:    s_sext_i32_i16 s2, s3198; GFX8-NEXT:    s_min_i32 s1, s1, s2199; GFX8-NEXT:    s_add_i32 s0, s0, s1200; GFX8-NEXT:    s_sext_i32_i16 s0, s0201; GFX8-NEXT:    s_ashr_i32 s0, s0, 8202; GFX8-NEXT:    ; return to shader part epilog203;204; GFX9-LABEL: s_saddsat_i8:205; GFX9:       ; %bb.0:206; GFX9-NEXT:    s_lshl_b32 s1, s1, 8207; GFX9-NEXT:    s_lshl_b32 s0, s0, 8208; GFX9-NEXT:    v_mov_b32_e32 v0, s1209; GFX9-NEXT:    v_add_i16 v0, s0, v0 clamp210; GFX9-NEXT:    v_ashrrev_i16_e32 v0, 8, v0211; GFX9-NEXT:    v_readfirstlane_b32 s0, v0212; GFX9-NEXT:    ; return to shader part epilog213;214; GFX10PLUS-LABEL: s_saddsat_i8:215; GFX10PLUS:       ; %bb.0:216; GFX10PLUS-NEXT:    s_lshl_b32 s0, s0, 8217; GFX10PLUS-NEXT:    s_lshl_b32 s1, s1, 8218; GFX10PLUS-NEXT:    v_add_nc_i16 v0, s0, s1 clamp219; GFX10PLUS-NEXT:    v_ashrrev_i16 v0, 8, v0220; GFX10PLUS-NEXT:    v_readfirstlane_b32 s0, v0221; GFX10PLUS-NEXT:    ; return to shader part epilog222  %result = call i8 @llvm.sadd.sat.i8(i8 %lhs, i8 %rhs)223  ret i8 %result224}225 226define i16 @v_saddsat_v2i8(i16 %lhs.arg, i16 %rhs.arg) {227; GFX6-LABEL: v_saddsat_v2i8:228; GFX6:       ; %bb.0:229; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)230; GFX6-NEXT:    v_lshrrev_b32_e32 v2, 8, v0231; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 24, v0232; GFX6-NEXT:    v_min_i32_e32 v6, 0, v0233; GFX6-NEXT:    v_bfrev_b32_e32 v7, 1234; GFX6-NEXT:    v_lshrrev_b32_e32 v3, 8, v1235; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 24, v1236; GFX6-NEXT:    v_max_i32_e32 v4, 0, v0237; GFX6-NEXT:    v_sub_i32_e32 v6, vcc, v7, v6238; GFX6-NEXT:    v_sub_i32_e32 v4, vcc, 0x7fffffff, v4239; GFX6-NEXT:    v_max_i32_e32 v1, v6, v1240; GFX6-NEXT:    v_min_i32_e32 v1, v1, v4241; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v1242; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 24, v2243; GFX6-NEXT:    v_min_i32_e32 v4, 0, v1244; GFX6-NEXT:    v_bfrev_b32_e32 v5, -2245; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 24, v3246; GFX6-NEXT:    v_max_i32_e32 v3, 0, v1247; GFX6-NEXT:    v_sub_i32_e32 v4, vcc, 0x80000000, v4248; GFX6-NEXT:    v_sub_i32_e32 v3, vcc, v5, v3249; GFX6-NEXT:    v_max_i32_e32 v2, v4, v2250; GFX6-NEXT:    v_min_i32_e32 v2, v2, v3251; GFX6-NEXT:    v_add_i32_e32 v1, vcc, v1, v2252; GFX6-NEXT:    v_ashrrev_i32_e32 v1, 24, v1253; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 24, v0254; GFX6-NEXT:    v_and_b32_e32 v1, 0xff, v1255; GFX6-NEXT:    v_and_b32_e32 v0, 0xff, v0256; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 8, v1257; GFX6-NEXT:    v_or_b32_e32 v0, v0, v1258; GFX6-NEXT:    s_setpc_b64 s[30:31]259;260; GFX8-LABEL: v_saddsat_v2i8:261; GFX8:       ; %bb.0:262; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)263; GFX8-NEXT:    v_mov_b32_e32 v2, 8264; GFX8-NEXT:    v_lshrrev_b32_sdwa v3, v2, v0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD265; GFX8-NEXT:    v_lshlrev_b16_e32 v0, 8, v0266; GFX8-NEXT:    v_min_i16_e32 v5, 0, v0267; GFX8-NEXT:    v_lshrrev_b32_sdwa v2, v2, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD268; GFX8-NEXT:    v_lshlrev_b16_e32 v1, 8, v1269; GFX8-NEXT:    v_max_i16_e32 v4, 0, v0270; GFX8-NEXT:    v_sub_u16_e32 v5, 0x8000, v5271; GFX8-NEXT:    v_sub_u16_e32 v4, 0x7fff, v4272; GFX8-NEXT:    v_max_i16_e32 v1, v5, v1273; GFX8-NEXT:    v_min_i16_e32 v1, v1, v4274; GFX8-NEXT:    v_min_i16_e32 v4, 0, v3275; GFX8-NEXT:    v_add_u16_e32 v0, v0, v1276; GFX8-NEXT:    v_max_i16_e32 v1, 0, v3277; GFX8-NEXT:    v_sub_u16_e32 v4, 0x8000, v4278; GFX8-NEXT:    v_sub_u16_e32 v1, 0x7fff, v1279; GFX8-NEXT:    v_max_i16_e32 v2, v4, v2280; GFX8-NEXT:    v_min_i16_e32 v1, v2, v1281; GFX8-NEXT:    v_add_u16_e32 v1, v3, v1282; GFX8-NEXT:    v_mov_b32_e32 v2, 0xff283; GFX8-NEXT:    v_and_b32_sdwa v0, sext(v0), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD284; GFX8-NEXT:    v_and_b32_sdwa v1, sext(v1), v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD285; GFX8-NEXT:    v_or_b32_e32 v0, v0, v1286; GFX8-NEXT:    s_setpc_b64 s[30:31]287;288; GFX9-LABEL: v_saddsat_v2i8:289; GFX9:       ; %bb.0:290; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)291; GFX9-NEXT:    v_lshrrev_b32_e32 v2, 8, v0292; GFX9-NEXT:    v_lshrrev_b32_e32 v3, 8, v1293; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0294; GFX9-NEXT:    v_and_b32_e32 v1, 0xffff, v1295; GFX9-NEXT:    v_lshl_or_b32 v0, v2, 16, v0296; GFX9-NEXT:    v_lshl_or_b32 v1, v3, 16, v1297; GFX9-NEXT:    v_pk_lshlrev_b16 v0, 8, v0 op_sel_hi:[0,1]298; GFX9-NEXT:    v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1]299; GFX9-NEXT:    v_pk_add_i16 v0, v0, v1 clamp300; GFX9-NEXT:    v_pk_ashrrev_i16 v0, 8, v0 op_sel_hi:[0,1]301; GFX9-NEXT:    v_mov_b32_e32 v1, 0xff302; GFX9-NEXT:    v_and_b32_sdwa v1, v0, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD303; GFX9-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD304; GFX9-NEXT:    s_setpc_b64 s[30:31]305;306; GFX10-LABEL: v_saddsat_v2i8:307; GFX10:       ; %bb.0:308; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)309; GFX10-NEXT:    v_lshrrev_b32_e32 v2, 8, v0310; GFX10-NEXT:    v_lshrrev_b32_e32 v3, 8, v1311; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0312; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v1313; GFX10-NEXT:    v_lshl_or_b32 v0, v2, 16, v0314; GFX10-NEXT:    v_lshl_or_b32 v1, v3, 16, v1315; GFX10-NEXT:    v_pk_lshlrev_b16 v0, 8, v0 op_sel_hi:[0,1]316; GFX10-NEXT:    v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1]317; GFX10-NEXT:    v_pk_add_i16 v0, v0, v1 clamp318; GFX10-NEXT:    v_mov_b32_e32 v1, 0xff319; GFX10-NEXT:    v_pk_ashrrev_i16 v0, 8, v0 op_sel_hi:[0,1]320; GFX10-NEXT:    v_and_b32_sdwa v1, v0, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD321; GFX10-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD322; GFX10-NEXT:    s_setpc_b64 s[30:31]323;324; GFX11-LABEL: v_saddsat_v2i8:325; GFX11:       ; %bb.0:326; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)327; GFX11-NEXT:    v_lshrrev_b32_e32 v2, 8, v0328; GFX11-NEXT:    v_lshrrev_b32_e32 v3, 8, v1329; GFX11-NEXT:    v_and_b32_e32 v0, 0xffff, v0330; GFX11-NEXT:    v_and_b32_e32 v1, 0xffff, v1331; GFX11-NEXT:    v_lshl_or_b32 v0, v2, 16, v0332; GFX11-NEXT:    v_lshl_or_b32 v1, v3, 16, v1333; GFX11-NEXT:    v_pk_lshlrev_b16 v0, 8, v0 op_sel_hi:[0,1]334; GFX11-NEXT:    v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1]335; GFX11-NEXT:    v_pk_add_i16 v0, v0, v1 clamp336; GFX11-NEXT:    v_pk_ashrrev_i16 v0, 8, v0 op_sel_hi:[0,1]337; GFX11-NEXT:    v_lshrrev_b32_e32 v1, 16, v0338; GFX11-NEXT:    v_and_b32_e32 v0, 0xff, v0339; GFX11-NEXT:    v_and_b32_e32 v1, 0xff, v1340; GFX11-NEXT:    v_lshlrev_b16 v1, 8, v1341; GFX11-NEXT:    v_or_b32_e32 v0, v0, v1342; GFX11-NEXT:    s_setpc_b64 s[30:31]343  %lhs = bitcast i16 %lhs.arg to <2 x i8>344  %rhs = bitcast i16 %rhs.arg to <2 x i8>345  %result = call <2 x i8> @llvm.sadd.sat.v2i8(<2 x i8> %lhs, <2 x i8> %rhs)346  %cast.result = bitcast <2 x i8> %result to i16347  ret i16 %cast.result348}349 350define amdgpu_ps i16 @s_saddsat_v2i8(i16 inreg %lhs.arg, i16 inreg %rhs.arg) {351; GFX6-LABEL: s_saddsat_v2i8:352; GFX6:       ; %bb.0:353; GFX6-NEXT:    s_lshr_b32 s2, s0, 8354; GFX6-NEXT:    s_lshl_b32 s0, s0, 24355; GFX6-NEXT:    s_min_i32 s5, s0, 0356; GFX6-NEXT:    s_lshr_b32 s3, s1, 8357; GFX6-NEXT:    s_lshl_b32 s1, s1, 24358; GFX6-NEXT:    s_max_i32 s4, s0, 0359; GFX6-NEXT:    s_sub_i32 s5, 0x80000000, s5360; GFX6-NEXT:    s_sub_i32 s4, 0x7fffffff, s4361; GFX6-NEXT:    s_max_i32 s1, s5, s1362; GFX6-NEXT:    s_min_i32 s1, s1, s4363; GFX6-NEXT:    s_add_i32 s0, s0, s1364; GFX6-NEXT:    s_lshl_b32 s1, s2, 24365; GFX6-NEXT:    s_min_i32 s4, s1, 0366; GFX6-NEXT:    s_lshl_b32 s2, s3, 24367; GFX6-NEXT:    s_max_i32 s3, s1, 0368; GFX6-NEXT:    s_sub_i32 s4, 0x80000000, s4369; GFX6-NEXT:    s_sub_i32 s3, 0x7fffffff, s3370; GFX6-NEXT:    s_max_i32 s2, s4, s2371; GFX6-NEXT:    s_min_i32 s2, s2, s3372; GFX6-NEXT:    s_add_i32 s1, s1, s2373; GFX6-NEXT:    s_ashr_i32 s1, s1, 24374; GFX6-NEXT:    s_ashr_i32 s0, s0, 24375; GFX6-NEXT:    s_and_b32 s1, s1, 0xff376; GFX6-NEXT:    s_and_b32 s0, s0, 0xff377; GFX6-NEXT:    s_lshl_b32 s1, s1, 8378; GFX6-NEXT:    s_or_b32 s0, s0, s1379; GFX6-NEXT:    ; return to shader part epilog380;381; GFX8-LABEL: s_saddsat_v2i8:382; GFX8:       ; %bb.0:383; GFX8-NEXT:    s_lshr_b32 s2, s0, 8384; GFX8-NEXT:    s_lshl_b32 s0, s0, 8385; GFX8-NEXT:    s_sext_i32_i16 s4, s0386; GFX8-NEXT:    s_max_i32 s5, s4, 0387; GFX8-NEXT:    s_min_i32 s4, s4, 0388; GFX8-NEXT:    s_lshr_b32 s3, s1, 8389; GFX8-NEXT:    s_lshl_b32 s1, s1, 8390; GFX8-NEXT:    s_sub_i32 s4, 0x8000, s4391; GFX8-NEXT:    s_sext_i32_i16 s4, s4392; GFX8-NEXT:    s_sext_i32_i16 s1, s1393; GFX8-NEXT:    s_sub_i32 s5, 0x7fff, s5394; GFX8-NEXT:    s_max_i32 s1, s4, s1395; GFX8-NEXT:    s_sext_i32_i16 s1, s1396; GFX8-NEXT:    s_sext_i32_i16 s4, s5397; GFX8-NEXT:    s_min_i32 s1, s1, s4398; GFX8-NEXT:    s_add_i32 s0, s0, s1399; GFX8-NEXT:    s_lshl_b32 s1, s2, 8400; GFX8-NEXT:    s_lshl_b32 s2, s3, 8401; GFX8-NEXT:    s_sext_i32_i16 s3, s1402; GFX8-NEXT:    s_max_i32 s4, s3, 0403; GFX8-NEXT:    s_min_i32 s3, s3, 0404; GFX8-NEXT:    s_sub_i32 s3, 0x8000, s3405; GFX8-NEXT:    s_sext_i32_i16 s3, s3406; GFX8-NEXT:    s_sext_i32_i16 s2, s2407; GFX8-NEXT:    s_sub_i32 s4, 0x7fff, s4408; GFX8-NEXT:    s_max_i32 s2, s3, s2409; GFX8-NEXT:    s_sext_i32_i16 s2, s2410; GFX8-NEXT:    s_sext_i32_i16 s3, s4411; GFX8-NEXT:    s_min_i32 s2, s2, s3412; GFX8-NEXT:    s_add_i32 s1, s1, s2413; GFX8-NEXT:    s_sext_i32_i16 s1, s1414; GFX8-NEXT:    s_sext_i32_i16 s0, s0415; GFX8-NEXT:    s_ashr_i32 s1, s1, 8416; GFX8-NEXT:    s_ashr_i32 s0, s0, 8417; GFX8-NEXT:    s_and_b32 s1, s1, 0xff418; GFX8-NEXT:    s_and_b32 s0, s0, 0xff419; GFX8-NEXT:    s_lshl_b32 s1, s1, 8420; GFX8-NEXT:    s_or_b32 s0, s0, s1421; GFX8-NEXT:    ; return to shader part epilog422;423; GFX9-LABEL: s_saddsat_v2i8:424; GFX9:       ; %bb.0:425; GFX9-NEXT:    s_lshr_b32 s2, s0, 8426; GFX9-NEXT:    s_pack_ll_b32_b16 s0, s0, s2427; GFX9-NEXT:    s_lshr_b32 s3, s1, 8428; GFX9-NEXT:    s_lshr_b32 s2, s0, 16429; GFX9-NEXT:    s_pack_ll_b32_b16 s1, s1, s3430; GFX9-NEXT:    s_lshl_b32 s0, s0, 0x80008431; GFX9-NEXT:    s_lshl_b32 s2, s2, 8432; GFX9-NEXT:    s_pack_ll_b32_b16 s0, s0, s2433; GFX9-NEXT:    s_lshr_b32 s2, s1, 16434; GFX9-NEXT:    s_lshl_b32 s1, s1, 0x80008435; GFX9-NEXT:    s_lshl_b32 s2, s2, 8436; GFX9-NEXT:    s_pack_ll_b32_b16 s1, s1, s2437; GFX9-NEXT:    v_mov_b32_e32 v0, s1438; GFX9-NEXT:    v_pk_add_i16 v0, s0, v0 clamp439; GFX9-NEXT:    v_pk_ashrrev_i16 v0, 8, v0 op_sel_hi:[0,1]440; GFX9-NEXT:    v_mov_b32_e32 v1, 0xff441; GFX9-NEXT:    v_and_b32_sdwa v1, v0, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD442; GFX9-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD443; GFX9-NEXT:    v_readfirstlane_b32 s0, v0444; GFX9-NEXT:    ; return to shader part epilog445;446; GFX10-LABEL: s_saddsat_v2i8:447; GFX10:       ; %bb.0:448; GFX10-NEXT:    s_lshr_b32 s2, s0, 8449; GFX10-NEXT:    s_lshr_b32 s3, s1, 8450; GFX10-NEXT:    s_pack_ll_b32_b16 s0, s0, s2451; GFX10-NEXT:    s_pack_ll_b32_b16 s1, s1, s3452; GFX10-NEXT:    s_lshr_b32 s2, s0, 16453; GFX10-NEXT:    s_lshr_b32 s3, s1, 16454; GFX10-NEXT:    s_lshl_b32 s0, s0, 0x80008455; GFX10-NEXT:    s_lshl_b32 s2, s2, 8456; GFX10-NEXT:    s_lshl_b32 s1, s1, 0x80008457; GFX10-NEXT:    s_lshl_b32 s3, s3, 8458; GFX10-NEXT:    s_pack_ll_b32_b16 s0, s0, s2459; GFX10-NEXT:    s_pack_ll_b32_b16 s1, s1, s3460; GFX10-NEXT:    v_mov_b32_e32 v1, 0xff461; GFX10-NEXT:    v_pk_add_i16 v0, s0, s1 clamp462; GFX10-NEXT:    v_pk_ashrrev_i16 v0, 8, v0 op_sel_hi:[0,1]463; GFX10-NEXT:    v_and_b32_sdwa v1, v0, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD464; GFX10-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD465; GFX10-NEXT:    v_readfirstlane_b32 s0, v0466; GFX10-NEXT:    ; return to shader part epilog467;468; GFX11-LABEL: s_saddsat_v2i8:469; GFX11:       ; %bb.0:470; GFX11-NEXT:    s_lshr_b32 s2, s0, 8471; GFX11-NEXT:    s_lshr_b32 s3, s1, 8472; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s2473; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s3474; GFX11-NEXT:    s_lshr_b32 s2, s0, 16475; GFX11-NEXT:    s_lshr_b32 s3, s1, 16476; GFX11-NEXT:    s_lshl_b32 s0, s0, 0x80008477; GFX11-NEXT:    s_lshl_b32 s2, s2, 8478; GFX11-NEXT:    s_lshl_b32 s1, s1, 0x80008479; GFX11-NEXT:    s_lshl_b32 s3, s3, 8480; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s2481; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s3482; GFX11-NEXT:    v_pk_add_i16 v0, s0, s1 clamp483; GFX11-NEXT:    v_pk_ashrrev_i16 v0, 8, v0 op_sel_hi:[0,1]484; GFX11-NEXT:    v_lshrrev_b32_e32 v1, 16, v0485; GFX11-NEXT:    v_and_b32_e32 v0, 0xff, v0486; GFX11-NEXT:    v_and_b32_e32 v1, 0xff, v1487; GFX11-NEXT:    v_lshlrev_b16 v1, 8, v1488; GFX11-NEXT:    v_or_b32_e32 v0, v0, v1489; GFX11-NEXT:    v_readfirstlane_b32 s0, v0490; GFX11-NEXT:    ; return to shader part epilog491  %lhs = bitcast i16 %lhs.arg to <2 x i8>492  %rhs = bitcast i16 %rhs.arg to <2 x i8>493  %result = call <2 x i8> @llvm.sadd.sat.v2i8(<2 x i8> %lhs, <2 x i8> %rhs)494  %cast.result = bitcast <2 x i8> %result to i16495  ret i16 %cast.result496}497 498define i32 @v_saddsat_v4i8(i32 %lhs.arg, i32 %rhs.arg) {499; GFX6-LABEL: v_saddsat_v4i8:500; GFX6:       ; %bb.0:501; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)502; GFX6-NEXT:    v_lshrrev_b32_e32 v2, 8, v0503; GFX6-NEXT:    v_lshrrev_b32_e32 v3, 16, v0504; GFX6-NEXT:    v_lshrrev_b32_e32 v4, 24, v0505; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 24, v0506; GFX6-NEXT:    v_min_i32_e32 v10, 0, v0507; GFX6-NEXT:    v_bfrev_b32_e32 v11, 1508; GFX6-NEXT:    v_lshrrev_b32_e32 v5, 8, v1509; GFX6-NEXT:    v_lshrrev_b32_e32 v6, 16, v1510; GFX6-NEXT:    v_lshrrev_b32_e32 v7, 24, v1511; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 24, v1512; GFX6-NEXT:    v_max_i32_e32 v8, 0, v0513; GFX6-NEXT:    v_sub_i32_e32 v10, vcc, v11, v10514; GFX6-NEXT:    v_sub_i32_e32 v8, vcc, 0x7fffffff, v8515; GFX6-NEXT:    v_max_i32_e32 v1, v10, v1516; GFX6-NEXT:    v_min_i32_e32 v1, v1, v8517; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v1518; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 24, v2519; GFX6-NEXT:    v_min_i32_e32 v8, 0, v1520; GFX6-NEXT:    v_bfrev_b32_e32 v9, -2521; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 24, v5522; GFX6-NEXT:    v_max_i32_e32 v5, 0, v1523; GFX6-NEXT:    v_sub_i32_e32 v8, vcc, v11, v8524; GFX6-NEXT:    v_sub_i32_e32 v5, vcc, v9, v5525; GFX6-NEXT:    v_max_i32_e32 v2, v8, v2526; GFX6-NEXT:    v_min_i32_e32 v2, v2, v5527; GFX6-NEXT:    v_add_i32_e32 v1, vcc, v1, v2528; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 24, v3529; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 24, v6530; GFX6-NEXT:    v_min_i32_e32 v6, 0, v2531; GFX6-NEXT:    v_max_i32_e32 v5, 0, v2532; GFX6-NEXT:    v_sub_i32_e32 v6, vcc, v11, v6533; GFX6-NEXT:    v_sub_i32_e32 v5, vcc, v9, v5534; GFX6-NEXT:    v_max_i32_e32 v3, v6, v3535; GFX6-NEXT:    v_min_i32_e32 v3, v3, v5536; GFX6-NEXT:    v_add_i32_e32 v2, vcc, v2, v3537; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 24, v4538; GFX6-NEXT:    v_min_i32_e32 v6, 0, v3539; GFX6-NEXT:    v_ashrrev_i32_e32 v1, 24, v1540; GFX6-NEXT:    v_lshlrev_b32_e32 v4, 24, v7541; GFX6-NEXT:    v_max_i32_e32 v5, 0, v3542; GFX6-NEXT:    v_sub_i32_e32 v6, vcc, v11, v6543; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 24, v0544; GFX6-NEXT:    v_sub_i32_e32 v5, vcc, v9, v5545; GFX6-NEXT:    v_max_i32_e32 v4, v6, v4546; GFX6-NEXT:    v_and_b32_e32 v1, 0xff, v1547; GFX6-NEXT:    v_ashrrev_i32_e32 v2, 24, v2548; GFX6-NEXT:    v_min_i32_e32 v4, v4, v5549; GFX6-NEXT:    v_and_b32_e32 v0, 0xff, v0550; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 8, v1551; GFX6-NEXT:    v_add_i32_e32 v3, vcc, v3, v4552; GFX6-NEXT:    v_or_b32_e32 v0, v0, v1553; GFX6-NEXT:    v_and_b32_e32 v1, 0xff, v2554; GFX6-NEXT:    v_ashrrev_i32_e32 v3, 24, v3555; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v1556; GFX6-NEXT:    v_or_b32_e32 v0, v0, v1557; GFX6-NEXT:    v_and_b32_e32 v1, 0xff, v3558; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 24, v1559; GFX6-NEXT:    v_or_b32_e32 v0, v0, v1560; GFX6-NEXT:    s_setpc_b64 s[30:31]561;562; GFX8-LABEL: v_saddsat_v4i8:563; GFX8:       ; %bb.0:564; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)565; GFX8-NEXT:    v_mov_b32_e32 v2, 8566; GFX8-NEXT:    v_lshrrev_b32_sdwa v3, v2, v0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD567; GFX8-NEXT:    v_lshrrev_b32_e32 v4, 16, v0568; GFX8-NEXT:    v_lshrrev_b32_e32 v5, 24, v0569; GFX8-NEXT:    v_lshlrev_b16_e32 v0, 8, v0570; GFX8-NEXT:    v_min_i16_e32 v9, 0, v0571; GFX8-NEXT:    v_lshrrev_b32_sdwa v2, v2, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD572; GFX8-NEXT:    v_lshrrev_b32_e32 v6, 16, v1573; GFX8-NEXT:    v_lshrrev_b32_e32 v7, 24, v1574; GFX8-NEXT:    v_lshlrev_b16_e32 v1, 8, v1575; GFX8-NEXT:    v_max_i16_e32 v8, 0, v0576; GFX8-NEXT:    v_sub_u16_e32 v9, 0x8000, v9577; GFX8-NEXT:    v_sub_u16_e32 v8, 0x7fff, v8578; GFX8-NEXT:    v_max_i16_e32 v1, v9, v1579; GFX8-NEXT:    v_min_i16_e32 v1, v1, v8580; GFX8-NEXT:    v_min_i16_e32 v8, 0, v3581; GFX8-NEXT:    v_add_u16_e32 v0, v0, v1582; GFX8-NEXT:    v_max_i16_e32 v1, 0, v3583; GFX8-NEXT:    v_sub_u16_e32 v8, 0x8000, v8584; GFX8-NEXT:    v_sub_u16_e32 v1, 0x7fff, v1585; GFX8-NEXT:    v_max_i16_e32 v2, v8, v2586; GFX8-NEXT:    v_min_i16_e32 v1, v2, v1587; GFX8-NEXT:    v_lshlrev_b16_e32 v2, 8, v4588; GFX8-NEXT:    v_add_u16_e32 v1, v3, v1589; GFX8-NEXT:    v_lshlrev_b16_e32 v3, 8, v6590; GFX8-NEXT:    v_min_i16_e32 v6, 0, v2591; GFX8-NEXT:    v_max_i16_e32 v4, 0, v2592; GFX8-NEXT:    v_sub_u16_e32 v6, 0x8000, v6593; GFX8-NEXT:    v_sub_u16_e32 v4, 0x7fff, v4594; GFX8-NEXT:    v_max_i16_e32 v3, v6, v3595; GFX8-NEXT:    v_min_i16_e32 v3, v3, v4596; GFX8-NEXT:    v_add_u16_e32 v2, v2, v3597; GFX8-NEXT:    v_lshlrev_b16_e32 v3, 8, v5598; GFX8-NEXT:    v_min_i16_e32 v6, 0, v3599; GFX8-NEXT:    v_lshlrev_b16_e32 v4, 8, v7600; GFX8-NEXT:    v_max_i16_e32 v5, 0, v3601; GFX8-NEXT:    v_sub_u16_e32 v6, 0x8000, v6602; GFX8-NEXT:    v_sub_u16_e32 v5, 0x7fff, v5603; GFX8-NEXT:    v_max_i16_e32 v4, v6, v4604; GFX8-NEXT:    v_min_i16_e32 v4, v4, v5605; GFX8-NEXT:    v_add_u16_e32 v3, v3, v4606; GFX8-NEXT:    v_mov_b32_e32 v4, 0xff607; GFX8-NEXT:    v_and_b32_sdwa v1, sext(v1), v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD608; GFX8-NEXT:    v_and_b32_sdwa v0, sext(v0), v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD609; GFX8-NEXT:    v_lshlrev_b32_e32 v1, 8, v1610; GFX8-NEXT:    v_or_b32_e32 v0, v0, v1611; GFX8-NEXT:    v_and_b32_sdwa v1, sext(v2), v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD612; GFX8-NEXT:    v_or_b32_e32 v0, v0, v1613; GFX8-NEXT:    v_and_b32_sdwa v1, sext(v3), v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD614; GFX8-NEXT:    v_or_b32_e32 v0, v0, v1615; GFX8-NEXT:    s_setpc_b64 s[30:31]616;617; GFX9-LABEL: v_saddsat_v4i8:618; GFX9:       ; %bb.0:619; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)620; GFX9-NEXT:    v_lshrrev_b32_e32 v3, 24, v0621; GFX9-NEXT:    v_lshrrev_b32_e32 v2, 8, v0622; GFX9-NEXT:    v_lshrrev_b32_e32 v4, 8, v1623; GFX9-NEXT:    v_and_b32_e32 v6, 0xffff, v0624; GFX9-NEXT:    v_alignbit_b32 v0, v3, v0, 16625; GFX9-NEXT:    v_and_b32_e32 v3, 0xffff, v1626; GFX9-NEXT:    v_lshrrev_b32_e32 v5, 24, v1627; GFX9-NEXT:    v_lshl_or_b32 v2, v2, 16, v6628; GFX9-NEXT:    v_lshl_or_b32 v3, v4, 16, v3629; GFX9-NEXT:    v_alignbit_b32 v1, v5, v1, 16630; GFX9-NEXT:    v_pk_lshlrev_b16 v2, 8, v2 op_sel_hi:[0,1]631; GFX9-NEXT:    v_pk_lshlrev_b16 v3, 8, v3 op_sel_hi:[0,1]632; GFX9-NEXT:    v_pk_lshlrev_b16 v0, 8, v0 op_sel_hi:[0,1]633; GFX9-NEXT:    v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1]634; GFX9-NEXT:    v_pk_add_i16 v2, v2, v3 clamp635; GFX9-NEXT:    v_pk_add_i16 v0, v0, v1 clamp636; GFX9-NEXT:    v_pk_ashrrev_i16 v1, 8, v2 op_sel_hi:[0,1]637; GFX9-NEXT:    v_mov_b32_e32 v3, 8638; GFX9-NEXT:    v_pk_ashrrev_i16 v0, 8, v0 op_sel_hi:[0,1]639; GFX9-NEXT:    v_mov_b32_e32 v2, 0xff640; GFX9-NEXT:    v_lshlrev_b32_sdwa v3, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2641; GFX9-NEXT:    v_and_or_b32 v1, v1, v2, v3642; GFX9-NEXT:    v_and_b32_e32 v2, 0xff, v0643; GFX9-NEXT:    v_mov_b32_e32 v3, 24644; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 16, v2645; GFX9-NEXT:    v_lshlrev_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2646; GFX9-NEXT:    v_or3_b32 v0, v1, v2, v0647; GFX9-NEXT:    s_setpc_b64 s[30:31]648;649; GFX10-LABEL: v_saddsat_v4i8:650; GFX10:       ; %bb.0:651; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)652; GFX10-NEXT:    v_lshrrev_b32_e32 v2, 8, v0653; GFX10-NEXT:    v_lshrrev_b32_e32 v3, 24, v0654; GFX10-NEXT:    v_and_b32_e32 v4, 0xffff, v0655; GFX10-NEXT:    v_lshrrev_b32_e32 v5, 8, v1656; GFX10-NEXT:    v_and_b32_e32 v6, 0xffff, v1657; GFX10-NEXT:    v_lshrrev_b32_e32 v7, 24, v1658; GFX10-NEXT:    v_alignbit_b32 v0, v3, v0, 16659; GFX10-NEXT:    v_lshl_or_b32 v2, v2, 16, v4660; GFX10-NEXT:    v_mov_b32_e32 v4, 24661; GFX10-NEXT:    v_lshl_or_b32 v3, v5, 16, v6662; GFX10-NEXT:    v_alignbit_b32 v1, v7, v1, 16663; GFX10-NEXT:    v_pk_lshlrev_b16 v0, 8, v0 op_sel_hi:[0,1]664; GFX10-NEXT:    v_pk_lshlrev_b16 v2, 8, v2 op_sel_hi:[0,1]665; GFX10-NEXT:    v_pk_lshlrev_b16 v3, 8, v3 op_sel_hi:[0,1]666; GFX10-NEXT:    v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1]667; GFX10-NEXT:    v_pk_add_i16 v2, v2, v3 clamp668; GFX10-NEXT:    v_pk_add_i16 v0, v0, v1 clamp669; GFX10-NEXT:    v_mov_b32_e32 v1, 8670; GFX10-NEXT:    v_pk_ashrrev_i16 v2, 8, v2 op_sel_hi:[0,1]671; GFX10-NEXT:    v_pk_ashrrev_i16 v0, 8, v0 op_sel_hi:[0,1]672; GFX10-NEXT:    v_lshlrev_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2673; GFX10-NEXT:    v_and_b32_e32 v3, 0xff, v0674; GFX10-NEXT:    v_lshlrev_b32_sdwa v0, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2675; GFX10-NEXT:    v_and_or_b32 v1, 0xff, v2, v1676; GFX10-NEXT:    v_lshlrev_b32_e32 v2, 16, v3677; GFX10-NEXT:    v_or3_b32 v0, v1, v2, v0678; GFX10-NEXT:    s_setpc_b64 s[30:31]679;680; GFX11-LABEL: v_saddsat_v4i8:681; GFX11:       ; %bb.0:682; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)683; GFX11-NEXT:    v_lshrrev_b32_e32 v2, 8, v0684; GFX11-NEXT:    v_lshrrev_b32_e32 v3, 8, v1685; GFX11-NEXT:    v_and_b32_e32 v4, 0xffff, v0686; GFX11-NEXT:    v_and_b32_e32 v5, 0xffff, v1687; GFX11-NEXT:    v_lshrrev_b32_e32 v6, 24, v0688; GFX11-NEXT:    v_lshrrev_b32_e32 v7, 24, v1689; GFX11-NEXT:    v_lshl_or_b32 v2, v2, 16, v4690; GFX11-NEXT:    v_lshl_or_b32 v3, v3, 16, v5691; GFX11-NEXT:    v_alignbit_b32 v0, v6, v0, 16692; GFX11-NEXT:    v_alignbit_b32 v1, v7, v1, 16693; GFX11-NEXT:    v_pk_lshlrev_b16 v2, 8, v2 op_sel_hi:[0,1]694; GFX11-NEXT:    v_pk_lshlrev_b16 v3, 8, v3 op_sel_hi:[0,1]695; GFX11-NEXT:    v_pk_lshlrev_b16 v0, 8, v0 op_sel_hi:[0,1]696; GFX11-NEXT:    v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1]697; GFX11-NEXT:    v_pk_add_i16 v2, v2, v3 clamp698; GFX11-NEXT:    v_pk_add_i16 v0, v0, v1 clamp699; GFX11-NEXT:    v_pk_ashrrev_i16 v1, 8, v2 op_sel_hi:[0,1]700; GFX11-NEXT:    v_pk_ashrrev_i16 v0, 8, v0 op_sel_hi:[0,1]701; GFX11-NEXT:    v_bfe_u32 v2, v1, 16, 8702; GFX11-NEXT:    v_and_b32_e32 v3, 0xff, v0703; GFX11-NEXT:    v_bfe_u32 v0, v0, 16, 8704; GFX11-NEXT:    v_lshlrev_b32_e32 v2, 8, v2705; GFX11-NEXT:    v_lshlrev_b32_e32 v3, 16, v3706; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 24, v0707; GFX11-NEXT:    v_and_or_b32 v1, 0xff, v1, v2708; GFX11-NEXT:    v_or3_b32 v0, v1, v3, v0709; GFX11-NEXT:    s_setpc_b64 s[30:31]710  %lhs = bitcast i32 %lhs.arg to <4 x i8>711  %rhs = bitcast i32 %rhs.arg to <4 x i8>712  %result = call <4 x i8> @llvm.sadd.sat.v4i8(<4 x i8> %lhs, <4 x i8> %rhs)713  %cast.result = bitcast <4 x i8> %result to i32714  ret i32 %cast.result715}716 717define amdgpu_ps i32 @s_saddsat_v4i8(i32 inreg %lhs.arg, i32 inreg %rhs.arg) {718; GFX6-LABEL: s_saddsat_v4i8:719; GFX6:       ; %bb.0:720; GFX6-NEXT:    s_lshr_b32 s2, s0, 8721; GFX6-NEXT:    s_lshr_b32 s3, s0, 16722; GFX6-NEXT:    s_lshr_b32 s4, s0, 24723; GFX6-NEXT:    s_lshl_b32 s0, s0, 24724; GFX6-NEXT:    s_min_i32 s9, s0, 0725; GFX6-NEXT:    s_lshr_b32 s5, s1, 8726; GFX6-NEXT:    s_lshr_b32 s6, s1, 16727; GFX6-NEXT:    s_lshr_b32 s7, s1, 24728; GFX6-NEXT:    s_lshl_b32 s1, s1, 24729; GFX6-NEXT:    s_max_i32 s8, s0, 0730; GFX6-NEXT:    s_sub_i32 s9, 0x80000000, s9731; GFX6-NEXT:    s_sub_i32 s8, 0x7fffffff, s8732; GFX6-NEXT:    s_max_i32 s1, s9, s1733; GFX6-NEXT:    s_min_i32 s1, s1, s8734; GFX6-NEXT:    s_add_i32 s0, s0, s1735; GFX6-NEXT:    s_lshl_b32 s1, s2, 24736; GFX6-NEXT:    s_min_i32 s8, s1, 0737; GFX6-NEXT:    s_lshl_b32 s2, s5, 24738; GFX6-NEXT:    s_max_i32 s5, s1, 0739; GFX6-NEXT:    s_sub_i32 s8, 0x80000000, s8740; GFX6-NEXT:    s_sub_i32 s5, 0x7fffffff, s5741; GFX6-NEXT:    s_max_i32 s2, s8, s2742; GFX6-NEXT:    s_min_i32 s2, s2, s5743; GFX6-NEXT:    s_add_i32 s1, s1, s2744; GFX6-NEXT:    s_lshl_b32 s2, s3, 24745; GFX6-NEXT:    s_lshl_b32 s3, s6, 24746; GFX6-NEXT:    s_min_i32 s6, s2, 0747; GFX6-NEXT:    s_max_i32 s5, s2, 0748; GFX6-NEXT:    s_sub_i32 s6, 0x80000000, s6749; GFX6-NEXT:    s_sub_i32 s5, 0x7fffffff, s5750; GFX6-NEXT:    s_max_i32 s3, s6, s3751; GFX6-NEXT:    s_min_i32 s3, s3, s5752; GFX6-NEXT:    s_add_i32 s2, s2, s3753; GFX6-NEXT:    s_lshl_b32 s3, s4, 24754; GFX6-NEXT:    s_min_i32 s6, s3, 0755; GFX6-NEXT:    s_ashr_i32 s1, s1, 24756; GFX6-NEXT:    s_lshl_b32 s4, s7, 24757; GFX6-NEXT:    s_max_i32 s5, s3, 0758; GFX6-NEXT:    s_sub_i32 s6, 0x80000000, s6759; GFX6-NEXT:    s_ashr_i32 s0, s0, 24760; GFX6-NEXT:    s_sub_i32 s5, 0x7fffffff, s5761; GFX6-NEXT:    s_max_i32 s4, s6, s4762; GFX6-NEXT:    s_and_b32 s1, s1, 0xff763; GFX6-NEXT:    s_ashr_i32 s2, s2, 24764; GFX6-NEXT:    s_min_i32 s4, s4, s5765; GFX6-NEXT:    s_and_b32 s0, s0, 0xff766; GFX6-NEXT:    s_lshl_b32 s1, s1, 8767; GFX6-NEXT:    s_add_i32 s3, s3, s4768; GFX6-NEXT:    s_or_b32 s0, s0, s1769; GFX6-NEXT:    s_and_b32 s1, s2, 0xff770; GFX6-NEXT:    s_ashr_i32 s3, s3, 24771; GFX6-NEXT:    s_lshl_b32 s1, s1, 16772; GFX6-NEXT:    s_or_b32 s0, s0, s1773; GFX6-NEXT:    s_and_b32 s1, s3, 0xff774; GFX6-NEXT:    s_lshl_b32 s1, s1, 24775; GFX6-NEXT:    s_or_b32 s0, s0, s1776; GFX6-NEXT:    ; return to shader part epilog777;778; GFX8-LABEL: s_saddsat_v4i8:779; GFX8:       ; %bb.0:780; GFX8-NEXT:    s_lshr_b32 s2, s0, 8781; GFX8-NEXT:    s_lshr_b32 s3, s0, 16782; GFX8-NEXT:    s_lshr_b32 s4, s0, 24783; GFX8-NEXT:    s_lshl_b32 s0, s0, 8784; GFX8-NEXT:    s_sext_i32_i16 s8, s0785; GFX8-NEXT:    s_max_i32 s9, s8, 0786; GFX8-NEXT:    s_min_i32 s8, s8, 0787; GFX8-NEXT:    s_lshr_b32 s5, s1, 8788; GFX8-NEXT:    s_lshr_b32 s6, s1, 16789; GFX8-NEXT:    s_lshr_b32 s7, s1, 24790; GFX8-NEXT:    s_lshl_b32 s1, s1, 8791; GFX8-NEXT:    s_sub_i32 s8, 0x8000, s8792; GFX8-NEXT:    s_sext_i32_i16 s8, s8793; GFX8-NEXT:    s_sext_i32_i16 s1, s1794; GFX8-NEXT:    s_sub_i32 s9, 0x7fff, s9795; GFX8-NEXT:    s_max_i32 s1, s8, s1796; GFX8-NEXT:    s_sext_i32_i16 s1, s1797; GFX8-NEXT:    s_sext_i32_i16 s8, s9798; GFX8-NEXT:    s_min_i32 s1, s1, s8799; GFX8-NEXT:    s_add_i32 s0, s0, s1800; GFX8-NEXT:    s_lshl_b32 s1, s2, 8801; GFX8-NEXT:    s_lshl_b32 s2, s5, 8802; GFX8-NEXT:    s_sext_i32_i16 s5, s1803; GFX8-NEXT:    s_max_i32 s8, s5, 0804; GFX8-NEXT:    s_min_i32 s5, s5, 0805; GFX8-NEXT:    s_sub_i32 s5, 0x8000, s5806; GFX8-NEXT:    s_sext_i32_i16 s5, s5807; GFX8-NEXT:    s_sext_i32_i16 s2, s2808; GFX8-NEXT:    s_sub_i32 s8, 0x7fff, s8809; GFX8-NEXT:    s_max_i32 s2, s5, s2810; GFX8-NEXT:    s_sext_i32_i16 s2, s2811; GFX8-NEXT:    s_sext_i32_i16 s5, s8812; GFX8-NEXT:    s_min_i32 s2, s2, s5813; GFX8-NEXT:    s_add_i32 s1, s1, s2814; GFX8-NEXT:    s_lshl_b32 s2, s3, 8815; GFX8-NEXT:    s_sext_i32_i16 s5, s2816; GFX8-NEXT:    s_lshl_b32 s3, s6, 8817; GFX8-NEXT:    s_max_i32 s6, s5, 0818; GFX8-NEXT:    s_min_i32 s5, s5, 0819; GFX8-NEXT:    s_sub_i32 s5, 0x8000, s5820; GFX8-NEXT:    s_sext_i32_i16 s5, s5821; GFX8-NEXT:    s_sext_i32_i16 s3, s3822; GFX8-NEXT:    s_sub_i32 s6, 0x7fff, s6823; GFX8-NEXT:    s_max_i32 s3, s5, s3824; GFX8-NEXT:    s_sext_i32_i16 s3, s3825; GFX8-NEXT:    s_sext_i32_i16 s5, s6826; GFX8-NEXT:    s_min_i32 s3, s3, s5827; GFX8-NEXT:    s_add_i32 s2, s2, s3828; GFX8-NEXT:    s_lshl_b32 s3, s4, 8829; GFX8-NEXT:    s_sext_i32_i16 s5, s3830; GFX8-NEXT:    s_max_i32 s6, s5, 0831; GFX8-NEXT:    s_min_i32 s5, s5, 0832; GFX8-NEXT:    s_lshl_b32 s4, s7, 8833; GFX8-NEXT:    s_sub_i32 s5, 0x8000, s5834; GFX8-NEXT:    s_sext_i32_i16 s5, s5835; GFX8-NEXT:    s_sext_i32_i16 s4, s4836; GFX8-NEXT:    s_sext_i32_i16 s1, s1837; GFX8-NEXT:    s_sub_i32 s6, 0x7fff, s6838; GFX8-NEXT:    s_max_i32 s4, s5, s4839; GFX8-NEXT:    s_sext_i32_i16 s0, s0840; GFX8-NEXT:    s_ashr_i32 s1, s1, 8841; GFX8-NEXT:    s_sext_i32_i16 s4, s4842; GFX8-NEXT:    s_sext_i32_i16 s5, s6843; GFX8-NEXT:    s_ashr_i32 s0, s0, 8844; GFX8-NEXT:    s_sext_i32_i16 s2, s2845; GFX8-NEXT:    s_min_i32 s4, s4, s5846; GFX8-NEXT:    s_and_b32 s1, s1, 0xff847; GFX8-NEXT:    s_ashr_i32 s2, s2, 8848; GFX8-NEXT:    s_add_i32 s3, s3, s4849; GFX8-NEXT:    s_and_b32 s0, s0, 0xff850; GFX8-NEXT:    s_lshl_b32 s1, s1, 8851; GFX8-NEXT:    s_sext_i32_i16 s3, s3852; GFX8-NEXT:    s_or_b32 s0, s0, s1853; GFX8-NEXT:    s_and_b32 s1, s2, 0xff854; GFX8-NEXT:    s_ashr_i32 s3, s3, 8855; GFX8-NEXT:    s_lshl_b32 s1, s1, 16856; GFX8-NEXT:    s_or_b32 s0, s0, s1857; GFX8-NEXT:    s_and_b32 s1, s3, 0xff858; GFX8-NEXT:    s_lshl_b32 s1, s1, 24859; GFX8-NEXT:    s_or_b32 s0, s0, s1860; GFX8-NEXT:    ; return to shader part epilog861;862; GFX9-LABEL: s_saddsat_v4i8:863; GFX9:       ; %bb.0:864; GFX9-NEXT:    s_lshr_b32 s2, s0, 8865; GFX9-NEXT:    s_lshr_b32 s3, s0, 16866; GFX9-NEXT:    s_lshr_b32 s4, s0, 24867; GFX9-NEXT:    s_pack_ll_b32_b16 s0, s0, s2868; GFX9-NEXT:    s_pack_ll_b32_b16 s2, s3, s4869; GFX9-NEXT:    s_lshr_b32 s4, s0, 16870; GFX9-NEXT:    s_lshl_b32 s0, s0, 0x80008871; GFX9-NEXT:    s_lshl_b32 s4, s4, 8872; GFX9-NEXT:    s_lshr_b32 s5, s1, 8873; GFX9-NEXT:    s_pack_ll_b32_b16 s0, s0, s4874; GFX9-NEXT:    s_lshr_b32 s4, s2, 16875; GFX9-NEXT:    s_lshr_b32 s6, s1, 16876; GFX9-NEXT:    s_lshr_b32 s7, s1, 24877; GFX9-NEXT:    s_pack_ll_b32_b16 s1, s1, s5878; GFX9-NEXT:    s_lshl_b32 s2, s2, 0x80008879; GFX9-NEXT:    s_lshl_b32 s4, s4, 8880; GFX9-NEXT:    s_pack_ll_b32_b16 s2, s2, s4881; GFX9-NEXT:    s_lshr_b32 s4, s1, 16882; GFX9-NEXT:    s_pack_ll_b32_b16 s3, s6, s7883; GFX9-NEXT:    s_lshl_b32 s1, s1, 0x80008884; GFX9-NEXT:    s_lshl_b32 s4, s4, 8885; GFX9-NEXT:    s_pack_ll_b32_b16 s1, s1, s4886; GFX9-NEXT:    s_lshr_b32 s4, s3, 16887; GFX9-NEXT:    s_lshl_b32 s3, s3, 0x80008888; GFX9-NEXT:    s_lshl_b32 s4, s4, 8889; GFX9-NEXT:    s_pack_ll_b32_b16 s3, s3, s4890; GFX9-NEXT:    v_mov_b32_e32 v0, s1891; GFX9-NEXT:    v_pk_add_i16 v0, s0, v0 clamp892; GFX9-NEXT:    v_mov_b32_e32 v1, s3893; GFX9-NEXT:    v_pk_add_i16 v1, s2, v1 clamp894; GFX9-NEXT:    v_pk_ashrrev_i16 v0, 8, v0 op_sel_hi:[0,1]895; GFX9-NEXT:    v_mov_b32_e32 v3, 8896; GFX9-NEXT:    v_pk_ashrrev_i16 v1, 8, v1 op_sel_hi:[0,1]897; GFX9-NEXT:    v_mov_b32_e32 v2, 0xff898; GFX9-NEXT:    v_lshlrev_b32_sdwa v3, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2899; GFX9-NEXT:    v_and_or_b32 v0, v0, v2, v3900; GFX9-NEXT:    v_and_b32_e32 v2, 0xff, v1901; GFX9-NEXT:    v_mov_b32_e32 v3, 24902; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 16, v2903; GFX9-NEXT:    v_lshlrev_b32_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2904; GFX9-NEXT:    v_or3_b32 v0, v0, v2, v1905; GFX9-NEXT:    v_readfirstlane_b32 s0, v0906; GFX9-NEXT:    ; return to shader part epilog907;908; GFX10-LABEL: s_saddsat_v4i8:909; GFX10:       ; %bb.0:910; GFX10-NEXT:    s_lshr_b32 s2, s0, 8911; GFX10-NEXT:    s_lshr_b32 s3, s0, 16912; GFX10-NEXT:    s_lshr_b32 s4, s0, 24913; GFX10-NEXT:    s_lshr_b32 s5, s1, 8914; GFX10-NEXT:    s_pack_ll_b32_b16 s0, s0, s2915; GFX10-NEXT:    s_pack_ll_b32_b16 s2, s3, s4916; GFX10-NEXT:    s_lshr_b32 s6, s1, 16917; GFX10-NEXT:    s_lshr_b32 s7, s1, 24918; GFX10-NEXT:    s_pack_ll_b32_b16 s1, s1, s5919; GFX10-NEXT:    s_lshr_b32 s4, s0, 16920; GFX10-NEXT:    s_lshr_b32 s5, s2, 16921; GFX10-NEXT:    s_pack_ll_b32_b16 s3, s6, s7922; GFX10-NEXT:    s_lshl_b32 s0, s0, 0x80008923; GFX10-NEXT:    s_lshl_b32 s4, s4, 8924; GFX10-NEXT:    s_lshl_b32 s2, s2, 0x80008925; GFX10-NEXT:    s_lshl_b32 s5, s5, 8926; GFX10-NEXT:    s_pack_ll_b32_b16 s0, s0, s4927; GFX10-NEXT:    s_pack_ll_b32_b16 s2, s2, s5928; GFX10-NEXT:    s_lshr_b32 s4, s1, 16929; GFX10-NEXT:    s_lshr_b32 s5, s3, 16930; GFX10-NEXT:    s_lshl_b32 s1, s1, 0x80008931; GFX10-NEXT:    s_lshl_b32 s4, s4, 8932; GFX10-NEXT:    s_lshl_b32 s3, s3, 0x80008933; GFX10-NEXT:    s_lshl_b32 s5, s5, 8934; GFX10-NEXT:    s_pack_ll_b32_b16 s1, s1, s4935; GFX10-NEXT:    s_pack_ll_b32_b16 s3, s3, s5936; GFX10-NEXT:    v_pk_add_i16 v0, s0, s1 clamp937; GFX10-NEXT:    v_pk_add_i16 v1, s2, s3 clamp938; GFX10-NEXT:    v_mov_b32_e32 v2, 8939; GFX10-NEXT:    v_mov_b32_e32 v4, 24940; GFX10-NEXT:    v_pk_ashrrev_i16 v0, 8, v0 op_sel_hi:[0,1]941; GFX10-NEXT:    v_pk_ashrrev_i16 v1, 8, v1 op_sel_hi:[0,1]942; GFX10-NEXT:    v_lshlrev_b32_sdwa v2, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2943; GFX10-NEXT:    v_and_b32_e32 v3, 0xff, v1944; GFX10-NEXT:    v_lshlrev_b32_sdwa v1, v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2945; GFX10-NEXT:    v_and_or_b32 v0, 0xff, v0, v2946; GFX10-NEXT:    v_lshlrev_b32_e32 v2, 16, v3947; GFX10-NEXT:    v_or3_b32 v0, v0, v2, v1948; GFX10-NEXT:    v_readfirstlane_b32 s0, v0949; GFX10-NEXT:    ; return to shader part epilog950;951; GFX11-LABEL: s_saddsat_v4i8:952; GFX11:       ; %bb.0:953; GFX11-NEXT:    s_lshr_b32 s2, s0, 8954; GFX11-NEXT:    s_lshr_b32 s3, s0, 24955; GFX11-NEXT:    s_lshr_b32 s4, s1, 8956; GFX11-NEXT:    s_lshr_b32 s5, s1, 24957; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s0, s2958; GFX11-NEXT:    s_pack_hl_b32_b16 s0, s0, s3959; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s1, s4960; GFX11-NEXT:    s_lshr_b32 s4, s2, 16961; GFX11-NEXT:    s_pack_hl_b32_b16 s1, s1, s5962; GFX11-NEXT:    s_lshr_b32 s5, s3, 16963; GFX11-NEXT:    s_lshl_b32 s2, s2, 0x80008964; GFX11-NEXT:    s_lshl_b32 s4, s4, 8965; GFX11-NEXT:    s_lshl_b32 s3, s3, 0x80008966; GFX11-NEXT:    s_lshl_b32 s5, s5, 8967; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s4968; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s3, s5969; GFX11-NEXT:    s_lshr_b32 s4, s0, 16970; GFX11-NEXT:    s_lshr_b32 s5, s1, 16971; GFX11-NEXT:    v_pk_add_i16 v0, s2, s3 clamp972; GFX11-NEXT:    s_lshl_b32 s0, s0, 0x80008973; GFX11-NEXT:    s_lshl_b32 s4, s4, 8974; GFX11-NEXT:    s_lshl_b32 s1, s1, 0x80008975; GFX11-NEXT:    s_lshl_b32 s2, s5, 8976; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s4977; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s2978; GFX11-NEXT:    v_pk_ashrrev_i16 v0, 8, v0 op_sel_hi:[0,1]979; GFX11-NEXT:    v_pk_add_i16 v1, s0, s1 clamp980; GFX11-NEXT:    v_bfe_u32 v2, v0, 16, 8981; GFX11-NEXT:    v_pk_ashrrev_i16 v1, 8, v1 op_sel_hi:[0,1]982; GFX11-NEXT:    v_lshlrev_b32_e32 v2, 8, v2983; GFX11-NEXT:    v_and_b32_e32 v3, 0xff, v1984; GFX11-NEXT:    v_bfe_u32 v1, v1, 16, 8985; GFX11-NEXT:    v_and_or_b32 v0, 0xff, v0, v2986; GFX11-NEXT:    v_lshlrev_b32_e32 v2, 16, v3987; GFX11-NEXT:    v_lshlrev_b32_e32 v1, 24, v1988; GFX11-NEXT:    v_or3_b32 v0, v0, v2, v1989; GFX11-NEXT:    v_readfirstlane_b32 s0, v0990; GFX11-NEXT:    ; return to shader part epilog991  %lhs = bitcast i32 %lhs.arg to <4 x i8>992  %rhs = bitcast i32 %rhs.arg to <4 x i8>993  %result = call <4 x i8> @llvm.sadd.sat.v4i8(<4 x i8> %lhs, <4 x i8> %rhs)994  %cast.result = bitcast <4 x i8> %result to i32995  ret i32 %cast.result996}997 998define i24 @v_saddsat_i24(i24 %lhs, i24 %rhs) {999; GFX6-LABEL: v_saddsat_i24:1000; GFX6:       ; %bb.0:1001; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1002; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 8, v01003; GFX6-NEXT:    v_min_i32_e32 v3, 0, v01004; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 8, v11005; GFX6-NEXT:    v_max_i32_e32 v2, 0, v01006; GFX6-NEXT:    v_sub_i32_e32 v3, vcc, 0x80000000, v31007; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, 0x7fffffff, v21008; GFX6-NEXT:    v_max_i32_e32 v1, v3, v11009; GFX6-NEXT:    v_min_i32_e32 v1, v1, v21010; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v11011; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 8, v01012; GFX6-NEXT:    s_setpc_b64 s[30:31]1013;1014; GFX8-LABEL: v_saddsat_i24:1015; GFX8:       ; %bb.0:1016; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1017; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v0, v11018; GFX8-NEXT:    v_bfe_i32 v3, v2, 0, 241019; GFX8-NEXT:    v_bfe_i32 v0, v0, 0, 241020; GFX8-NEXT:    v_cmp_lt_i32_e64 s[4:5], v3, v01021; GFX8-NEXT:    v_bfe_i32 v0, v1, 0, 241022; GFX8-NEXT:    v_cmp_gt_i32_e64 s[6:7], 0, v01023; GFX8-NEXT:    v_ashrrev_i32_e32 v0, 23, v31024; GFX8-NEXT:    v_add_u32_e32 v0, vcc, 0xff800000, v01025; GFX8-NEXT:    s_xor_b64 vcc, s[6:7], s[4:5]1026; GFX8-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc1027; GFX8-NEXT:    s_setpc_b64 s[30:31]1028;1029; GFX9-LABEL: v_saddsat_i24:1030; GFX9:       ; %bb.0:1031; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1032; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 8, v01033; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 8, v11034; GFX9-NEXT:    v_add_i32 v0, v0, v1 clamp1035; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 8, v01036; GFX9-NEXT:    s_setpc_b64 s[30:31]1037;1038; GFX10PLUS-LABEL: v_saddsat_i24:1039; GFX10PLUS:       ; %bb.0:1040; GFX10PLUS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1041; GFX10PLUS-NEXT:    v_lshlrev_b32_e32 v0, 8, v01042; GFX10PLUS-NEXT:    v_lshlrev_b32_e32 v1, 8, v11043; GFX10PLUS-NEXT:    v_add_nc_i32 v0, v0, v1 clamp1044; GFX10PLUS-NEXT:    v_ashrrev_i32_e32 v0, 8, v01045; GFX10PLUS-NEXT:    s_setpc_b64 s[30:31]1046  %result = call i24 @llvm.sadd.sat.i24(i24 %lhs, i24 %rhs)1047  ret i24 %result1048}1049 1050define amdgpu_ps i24 @s_saddsat_i24(i24 inreg %lhs, i24 inreg %rhs) {1051; GFX6-LABEL: s_saddsat_i24:1052; GFX6:       ; %bb.0:1053; GFX6-NEXT:    s_lshl_b32 s0, s0, 81054; GFX6-NEXT:    s_min_i32 s3, s0, 01055; GFX6-NEXT:    s_lshl_b32 s1, s1, 81056; GFX6-NEXT:    s_max_i32 s2, s0, 01057; GFX6-NEXT:    s_sub_i32 s3, 0x80000000, s31058; GFX6-NEXT:    s_sub_i32 s2, 0x7fffffff, s21059; GFX6-NEXT:    s_max_i32 s1, s3, s11060; GFX6-NEXT:    s_min_i32 s1, s1, s21061; GFX6-NEXT:    s_add_i32 s0, s0, s11062; GFX6-NEXT:    s_ashr_i32 s0, s0, 81063; GFX6-NEXT:    ; return to shader part epilog1064;1065; GFX8-LABEL: s_saddsat_i24:1066; GFX8:       ; %bb.0:1067; GFX8-NEXT:    s_add_i32 s2, s0, s11068; GFX8-NEXT:    s_bfe_i32 s3, s2, 0x1800001069; GFX8-NEXT:    s_bfe_i32 s0, s0, 0x1800001070; GFX8-NEXT:    s_cmp_lt_i32 s3, s01071; GFX8-NEXT:    s_cselect_b32 s0, 1, 01072; GFX8-NEXT:    s_bfe_i32 s1, s1, 0x1800001073; GFX8-NEXT:    s_cmp_lt_i32 s1, 01074; GFX8-NEXT:    s_cselect_b32 s1, 1, 01075; GFX8-NEXT:    s_xor_b32 s0, s1, s01076; GFX8-NEXT:    s_ashr_i32 s1, s3, 231077; GFX8-NEXT:    s_add_i32 s1, s1, 0xff8000001078; GFX8-NEXT:    s_cmp_lg_u32 s0, 01079; GFX8-NEXT:    s_cselect_b32 s0, s1, s21080; GFX8-NEXT:    ; return to shader part epilog1081;1082; GFX9-LABEL: s_saddsat_i24:1083; GFX9:       ; %bb.0:1084; GFX9-NEXT:    s_lshl_b32 s1, s1, 81085; GFX9-NEXT:    s_lshl_b32 s0, s0, 81086; GFX9-NEXT:    v_mov_b32_e32 v0, s11087; GFX9-NEXT:    v_add_i32 v0, s0, v0 clamp1088; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 8, v01089; GFX9-NEXT:    v_readfirstlane_b32 s0, v01090; GFX9-NEXT:    ; return to shader part epilog1091;1092; GFX10PLUS-LABEL: s_saddsat_i24:1093; GFX10PLUS:       ; %bb.0:1094; GFX10PLUS-NEXT:    s_lshl_b32 s0, s0, 81095; GFX10PLUS-NEXT:    s_lshl_b32 s1, s1, 81096; GFX10PLUS-NEXT:    v_add_nc_i32 v0, s0, s1 clamp1097; GFX10PLUS-NEXT:    v_ashrrev_i32_e32 v0, 8, v01098; GFX10PLUS-NEXT:    v_readfirstlane_b32 s0, v01099; GFX10PLUS-NEXT:    ; return to shader part epilog1100  %result = call i24 @llvm.sadd.sat.i24(i24 %lhs, i24 %rhs)1101  ret i24 %result1102}1103 1104define i32 @v_saddsat_i32(i32 %lhs, i32 %rhs) {1105; GFX6-LABEL: v_saddsat_i32:1106; GFX6:       ; %bb.0:1107; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1108; GFX6-NEXT:    v_min_i32_e32 v3, 0, v01109; GFX6-NEXT:    v_max_i32_e32 v2, 0, v01110; GFX6-NEXT:    v_sub_i32_e32 v3, vcc, 0x80000000, v31111; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, 0x7fffffff, v21112; GFX6-NEXT:    v_max_i32_e32 v1, v3, v11113; GFX6-NEXT:    v_min_i32_e32 v1, v1, v21114; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v11115; GFX6-NEXT:    s_setpc_b64 s[30:31]1116;1117; GFX8-LABEL: v_saddsat_i32:1118; GFX8:       ; %bb.0:1119; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1120; GFX8-NEXT:    v_min_i32_e32 v3, 0, v01121; GFX8-NEXT:    v_max_i32_e32 v2, 0, v01122; GFX8-NEXT:    v_sub_u32_e32 v3, vcc, 0x80000000, v31123; GFX8-NEXT:    v_sub_u32_e32 v2, vcc, 0x7fffffff, v21124; GFX8-NEXT:    v_max_i32_e32 v1, v3, v11125; GFX8-NEXT:    v_min_i32_e32 v1, v1, v21126; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v0, v11127; GFX8-NEXT:    s_setpc_b64 s[30:31]1128;1129; GFX9-LABEL: v_saddsat_i32:1130; GFX9:       ; %bb.0:1131; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1132; GFX9-NEXT:    v_add_i32 v0, v0, v1 clamp1133; GFX9-NEXT:    s_setpc_b64 s[30:31]1134;1135; GFX10PLUS-LABEL: v_saddsat_i32:1136; GFX10PLUS:       ; %bb.0:1137; GFX10PLUS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1138; GFX10PLUS-NEXT:    v_add_nc_i32 v0, v0, v1 clamp1139; GFX10PLUS-NEXT:    s_setpc_b64 s[30:31]1140  %result = call i32 @llvm.sadd.sat.i32(i32 %lhs, i32 %rhs)1141  ret i32 %result1142}1143 1144define amdgpu_ps i32 @s_saddsat_i32(i32 inreg %lhs, i32 inreg %rhs) {1145; GFX6-LABEL: s_saddsat_i32:1146; GFX6:       ; %bb.0:1147; GFX6-NEXT:    s_min_i32 s3, s0, 01148; GFX6-NEXT:    s_max_i32 s2, s0, 01149; GFX6-NEXT:    s_sub_i32 s3, 0x80000000, s31150; GFX6-NEXT:    s_sub_i32 s2, 0x7fffffff, s21151; GFX6-NEXT:    s_max_i32 s1, s3, s11152; GFX6-NEXT:    s_min_i32 s1, s1, s21153; GFX6-NEXT:    s_add_i32 s0, s0, s11154; GFX6-NEXT:    ; return to shader part epilog1155;1156; GFX8-LABEL: s_saddsat_i32:1157; GFX8:       ; %bb.0:1158; GFX8-NEXT:    s_min_i32 s3, s0, 01159; GFX8-NEXT:    s_max_i32 s2, s0, 01160; GFX8-NEXT:    s_sub_i32 s3, 0x80000000, s31161; GFX8-NEXT:    s_sub_i32 s2, 0x7fffffff, s21162; GFX8-NEXT:    s_max_i32 s1, s3, s11163; GFX8-NEXT:    s_min_i32 s1, s1, s21164; GFX8-NEXT:    s_add_i32 s0, s0, s11165; GFX8-NEXT:    ; return to shader part epilog1166;1167; GFX9-LABEL: s_saddsat_i32:1168; GFX9:       ; %bb.0:1169; GFX9-NEXT:    v_mov_b32_e32 v0, s11170; GFX9-NEXT:    v_add_i32 v0, s0, v0 clamp1171; GFX9-NEXT:    v_readfirstlane_b32 s0, v01172; GFX9-NEXT:    ; return to shader part epilog1173;1174; GFX10PLUS-LABEL: s_saddsat_i32:1175; GFX10PLUS:       ; %bb.0:1176; GFX10PLUS-NEXT:    v_add_nc_i32 v0, s0, s1 clamp1177; GFX10PLUS-NEXT:    v_readfirstlane_b32 s0, v01178; GFX10PLUS-NEXT:    ; return to shader part epilog1179  %result = call i32 @llvm.sadd.sat.i32(i32 %lhs, i32 %rhs)1180  ret i32 %result1181}1182 1183define amdgpu_ps float @saddsat_i32_sv(i32 inreg %lhs, i32 %rhs) {1184; GFX6-LABEL: saddsat_i32_sv:1185; GFX6:       ; %bb.0:1186; GFX6-NEXT:    s_min_i32 s2, s0, 01187; GFX6-NEXT:    s_max_i32 s1, s0, 01188; GFX6-NEXT:    s_sub_i32 s2, 0x80000000, s21189; GFX6-NEXT:    s_sub_i32 s1, 0x7fffffff, s11190; GFX6-NEXT:    v_max_i32_e32 v0, s2, v01191; GFX6-NEXT:    v_min_i32_e32 v0, s1, v01192; GFX6-NEXT:    v_add_i32_e32 v0, vcc, s0, v01193; GFX6-NEXT:    ; return to shader part epilog1194;1195; GFX8-LABEL: saddsat_i32_sv:1196; GFX8:       ; %bb.0:1197; GFX8-NEXT:    s_min_i32 s2, s0, 01198; GFX8-NEXT:    s_max_i32 s1, s0, 01199; GFX8-NEXT:    s_sub_i32 s2, 0x80000000, s21200; GFX8-NEXT:    s_sub_i32 s1, 0x7fffffff, s11201; GFX8-NEXT:    v_max_i32_e32 v0, s2, v01202; GFX8-NEXT:    v_min_i32_e32 v0, s1, v01203; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v01204; GFX8-NEXT:    ; return to shader part epilog1205;1206; GFX9-LABEL: saddsat_i32_sv:1207; GFX9:       ; %bb.0:1208; GFX9-NEXT:    v_add_i32 v0, s0, v0 clamp1209; GFX9-NEXT:    ; return to shader part epilog1210;1211; GFX10PLUS-LABEL: saddsat_i32_sv:1212; GFX10PLUS:       ; %bb.0:1213; GFX10PLUS-NEXT:    v_add_nc_i32 v0, s0, v0 clamp1214; GFX10PLUS-NEXT:    ; return to shader part epilog1215  %result = call i32 @llvm.sadd.sat.i32(i32 %lhs, i32 %rhs)1216  %cast = bitcast i32 %result to float1217  ret float %cast1218}1219 1220define amdgpu_ps float @saddsat_i32_vs(i32 %lhs, i32 inreg %rhs) {1221; GFX6-LABEL: saddsat_i32_vs:1222; GFX6:       ; %bb.0:1223; GFX6-NEXT:    v_min_i32_e32 v2, 0, v01224; GFX6-NEXT:    v_max_i32_e32 v1, 0, v01225; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, 0x80000000, v21226; GFX6-NEXT:    v_sub_i32_e32 v1, vcc, 0x7fffffff, v11227; GFX6-NEXT:    v_max_i32_e32 v2, s0, v21228; GFX6-NEXT:    v_min_i32_e32 v1, v2, v11229; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v11230; GFX6-NEXT:    ; return to shader part epilog1231;1232; GFX8-LABEL: saddsat_i32_vs:1233; GFX8:       ; %bb.0:1234; GFX8-NEXT:    v_min_i32_e32 v2, 0, v01235; GFX8-NEXT:    v_max_i32_e32 v1, 0, v01236; GFX8-NEXT:    v_sub_u32_e32 v2, vcc, 0x80000000, v21237; GFX8-NEXT:    v_sub_u32_e32 v1, vcc, 0x7fffffff, v11238; GFX8-NEXT:    v_max_i32_e32 v2, s0, v21239; GFX8-NEXT:    v_min_i32_e32 v1, v2, v11240; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v0, v11241; GFX8-NEXT:    ; return to shader part epilog1242;1243; GFX9-LABEL: saddsat_i32_vs:1244; GFX9:       ; %bb.0:1245; GFX9-NEXT:    v_add_i32 v0, v0, s0 clamp1246; GFX9-NEXT:    ; return to shader part epilog1247;1248; GFX10PLUS-LABEL: saddsat_i32_vs:1249; GFX10PLUS:       ; %bb.0:1250; GFX10PLUS-NEXT:    v_add_nc_i32 v0, v0, s0 clamp1251; GFX10PLUS-NEXT:    ; return to shader part epilog1252  %result = call i32 @llvm.sadd.sat.i32(i32 %lhs, i32 %rhs)1253  %cast = bitcast i32 %result to float1254  ret float %cast1255}1256 1257define <2 x i32> @v_saddsat_v2i32(<2 x i32> %lhs, <2 x i32> %rhs) {1258; GFX6-LABEL: v_saddsat_v2i32:1259; GFX6:       ; %bb.0:1260; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1261; GFX6-NEXT:    v_min_i32_e32 v5, 0, v01262; GFX6-NEXT:    v_max_i32_e32 v4, 0, v01263; GFX6-NEXT:    v_sub_i32_e32 v5, vcc, 0x80000000, v51264; GFX6-NEXT:    v_sub_i32_e32 v4, vcc, 0x7fffffff, v41265; GFX6-NEXT:    v_max_i32_e32 v2, v5, v21266; GFX6-NEXT:    v_min_i32_e32 v2, v2, v41267; GFX6-NEXT:    v_min_i32_e32 v4, 0, v11268; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v21269; GFX6-NEXT:    v_max_i32_e32 v2, 0, v11270; GFX6-NEXT:    v_sub_i32_e32 v4, vcc, 0x80000000, v41271; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, 0x7fffffff, v21272; GFX6-NEXT:    v_max_i32_e32 v3, v4, v31273; GFX6-NEXT:    v_min_i32_e32 v2, v3, v21274; GFX6-NEXT:    v_add_i32_e32 v1, vcc, v1, v21275; GFX6-NEXT:    s_setpc_b64 s[30:31]1276;1277; GFX8-LABEL: v_saddsat_v2i32:1278; GFX8:       ; %bb.0:1279; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1280; GFX8-NEXT:    v_min_i32_e32 v5, 0, v01281; GFX8-NEXT:    v_max_i32_e32 v4, 0, v01282; GFX8-NEXT:    v_sub_u32_e32 v5, vcc, 0x80000000, v51283; GFX8-NEXT:    v_sub_u32_e32 v4, vcc, 0x7fffffff, v41284; GFX8-NEXT:    v_max_i32_e32 v2, v5, v21285; GFX8-NEXT:    v_min_i32_e32 v2, v2, v41286; GFX8-NEXT:    v_min_i32_e32 v4, 0, v11287; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v0, v21288; GFX8-NEXT:    v_max_i32_e32 v2, 0, v11289; GFX8-NEXT:    v_sub_u32_e32 v4, vcc, 0x80000000, v41290; GFX8-NEXT:    v_sub_u32_e32 v2, vcc, 0x7fffffff, v21291; GFX8-NEXT:    v_max_i32_e32 v3, v4, v31292; GFX8-NEXT:    v_min_i32_e32 v2, v3, v21293; GFX8-NEXT:    v_add_u32_e32 v1, vcc, v1, v21294; GFX8-NEXT:    s_setpc_b64 s[30:31]1295;1296; GFX9-LABEL: v_saddsat_v2i32:1297; GFX9:       ; %bb.0:1298; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1299; GFX9-NEXT:    v_add_i32 v0, v0, v2 clamp1300; GFX9-NEXT:    v_add_i32 v1, v1, v3 clamp1301; GFX9-NEXT:    s_setpc_b64 s[30:31]1302;1303; GFX10PLUS-LABEL: v_saddsat_v2i32:1304; GFX10PLUS:       ; %bb.0:1305; GFX10PLUS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1306; GFX10PLUS-NEXT:    v_add_nc_i32 v0, v0, v2 clamp1307; GFX10PLUS-NEXT:    v_add_nc_i32 v1, v1, v3 clamp1308; GFX10PLUS-NEXT:    s_setpc_b64 s[30:31]1309  %result = call <2 x i32> @llvm.sadd.sat.v2i32(<2 x i32> %lhs, <2 x i32> %rhs)1310  ret <2 x i32> %result1311}1312 1313define amdgpu_ps <2 x i32> @s_saddsat_v2i32(<2 x i32> inreg %lhs, <2 x i32> inreg %rhs) {1314; GFX6-LABEL: s_saddsat_v2i32:1315; GFX6:       ; %bb.0:1316; GFX6-NEXT:    s_min_i32 s5, s0, 01317; GFX6-NEXT:    s_max_i32 s4, s0, 01318; GFX6-NEXT:    s_sub_i32 s5, 0x80000000, s51319; GFX6-NEXT:    s_sub_i32 s4, 0x7fffffff, s41320; GFX6-NEXT:    s_max_i32 s2, s5, s21321; GFX6-NEXT:    s_min_i32 s2, s2, s41322; GFX6-NEXT:    s_min_i32 s4, s1, 01323; GFX6-NEXT:    s_add_i32 s0, s0, s21324; GFX6-NEXT:    s_max_i32 s2, s1, 01325; GFX6-NEXT:    s_sub_i32 s4, 0x80000000, s41326; GFX6-NEXT:    s_sub_i32 s2, 0x7fffffff, s21327; GFX6-NEXT:    s_max_i32 s3, s4, s31328; GFX6-NEXT:    s_min_i32 s2, s3, s21329; GFX6-NEXT:    s_add_i32 s1, s1, s21330; GFX6-NEXT:    ; return to shader part epilog1331;1332; GFX8-LABEL: s_saddsat_v2i32:1333; GFX8:       ; %bb.0:1334; GFX8-NEXT:    s_min_i32 s5, s0, 01335; GFX8-NEXT:    s_max_i32 s4, s0, 01336; GFX8-NEXT:    s_sub_i32 s5, 0x80000000, s51337; GFX8-NEXT:    s_sub_i32 s4, 0x7fffffff, s41338; GFX8-NEXT:    s_max_i32 s2, s5, s21339; GFX8-NEXT:    s_min_i32 s2, s2, s41340; GFX8-NEXT:    s_min_i32 s4, s1, 01341; GFX8-NEXT:    s_add_i32 s0, s0, s21342; GFX8-NEXT:    s_max_i32 s2, s1, 01343; GFX8-NEXT:    s_sub_i32 s4, 0x80000000, s41344; GFX8-NEXT:    s_sub_i32 s2, 0x7fffffff, s21345; GFX8-NEXT:    s_max_i32 s3, s4, s31346; GFX8-NEXT:    s_min_i32 s2, s3, s21347; GFX8-NEXT:    s_add_i32 s1, s1, s21348; GFX8-NEXT:    ; return to shader part epilog1349;1350; GFX9-LABEL: s_saddsat_v2i32:1351; GFX9:       ; %bb.0:1352; GFX9-NEXT:    v_mov_b32_e32 v0, s21353; GFX9-NEXT:    v_mov_b32_e32 v1, s31354; GFX9-NEXT:    v_add_i32 v0, s0, v0 clamp1355; GFX9-NEXT:    v_add_i32 v1, s1, v1 clamp1356; GFX9-NEXT:    v_readfirstlane_b32 s0, v01357; GFX9-NEXT:    v_readfirstlane_b32 s1, v11358; GFX9-NEXT:    ; return to shader part epilog1359;1360; GFX10PLUS-LABEL: s_saddsat_v2i32:1361; GFX10PLUS:       ; %bb.0:1362; GFX10PLUS-NEXT:    v_add_nc_i32 v0, s0, s2 clamp1363; GFX10PLUS-NEXT:    v_add_nc_i32 v1, s1, s3 clamp1364; GFX10PLUS-NEXT:    v_readfirstlane_b32 s0, v01365; GFX10PLUS-NEXT:    v_readfirstlane_b32 s1, v11366; GFX10PLUS-NEXT:    ; return to shader part epilog1367  %result = call <2 x i32> @llvm.sadd.sat.v2i32(<2 x i32> %lhs, <2 x i32> %rhs)1368  ret <2 x i32> %result1369}1370 1371define <3 x i32> @v_saddsat_v3i32(<3 x i32> %lhs, <3 x i32> %rhs) {1372; GFX6-LABEL: v_saddsat_v3i32:1373; GFX6:       ; %bb.0:1374; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1375; GFX6-NEXT:    v_min_i32_e32 v8, 0, v01376; GFX6-NEXT:    v_max_i32_e32 v6, 0, v01377; GFX6-NEXT:    v_sub_i32_e32 v8, vcc, 0x80000000, v81378; GFX6-NEXT:    v_sub_i32_e32 v6, vcc, 0x7fffffff, v61379; GFX6-NEXT:    v_max_i32_e32 v3, v8, v31380; GFX6-NEXT:    v_min_i32_e32 v3, v3, v61381; GFX6-NEXT:    v_min_i32_e32 v6, 0, v11382; GFX6-NEXT:    v_bfrev_b32_e32 v7, -21383; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v31384; GFX6-NEXT:    v_max_i32_e32 v3, 0, v11385; GFX6-NEXT:    v_sub_i32_e32 v6, vcc, 0x80000000, v61386; GFX6-NEXT:    v_sub_i32_e32 v3, vcc, v7, v31387; GFX6-NEXT:    v_max_i32_e32 v4, v6, v41388; GFX6-NEXT:    v_min_i32_e32 v3, v4, v31389; GFX6-NEXT:    v_min_i32_e32 v4, 0, v21390; GFX6-NEXT:    v_add_i32_e32 v1, vcc, v1, v31391; GFX6-NEXT:    v_max_i32_e32 v3, 0, v21392; GFX6-NEXT:    v_sub_i32_e32 v4, vcc, 0x80000000, v41393; GFX6-NEXT:    v_sub_i32_e32 v3, vcc, 0x7fffffff, v31394; GFX6-NEXT:    v_max_i32_e32 v4, v4, v51395; GFX6-NEXT:    v_min_i32_e32 v3, v4, v31396; GFX6-NEXT:    v_add_i32_e32 v2, vcc, v2, v31397; GFX6-NEXT:    s_setpc_b64 s[30:31]1398;1399; GFX8-LABEL: v_saddsat_v3i32:1400; GFX8:       ; %bb.0:1401; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1402; GFX8-NEXT:    v_min_i32_e32 v8, 0, v01403; GFX8-NEXT:    v_max_i32_e32 v6, 0, v01404; GFX8-NEXT:    v_sub_u32_e32 v8, vcc, 0x80000000, v81405; GFX8-NEXT:    v_sub_u32_e32 v6, vcc, 0x7fffffff, v61406; GFX8-NEXT:    v_max_i32_e32 v3, v8, v31407; GFX8-NEXT:    v_min_i32_e32 v3, v3, v61408; GFX8-NEXT:    v_min_i32_e32 v6, 0, v11409; GFX8-NEXT:    v_bfrev_b32_e32 v7, -21410; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v0, v31411; GFX8-NEXT:    v_max_i32_e32 v3, 0, v11412; GFX8-NEXT:    v_sub_u32_e32 v6, vcc, 0x80000000, v61413; GFX8-NEXT:    v_sub_u32_e32 v3, vcc, v7, v31414; GFX8-NEXT:    v_max_i32_e32 v4, v6, v41415; GFX8-NEXT:    v_min_i32_e32 v3, v4, v31416; GFX8-NEXT:    v_min_i32_e32 v4, 0, v21417; GFX8-NEXT:    v_add_u32_e32 v1, vcc, v1, v31418; GFX8-NEXT:    v_max_i32_e32 v3, 0, v21419; GFX8-NEXT:    v_sub_u32_e32 v4, vcc, 0x80000000, v41420; GFX8-NEXT:    v_sub_u32_e32 v3, vcc, 0x7fffffff, v31421; GFX8-NEXT:    v_max_i32_e32 v4, v4, v51422; GFX8-NEXT:    v_min_i32_e32 v3, v4, v31423; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v2, v31424; GFX8-NEXT:    s_setpc_b64 s[30:31]1425;1426; GFX9-LABEL: v_saddsat_v3i32:1427; GFX9:       ; %bb.0:1428; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1429; GFX9-NEXT:    v_add_i32 v0, v0, v3 clamp1430; GFX9-NEXT:    v_add_i32 v1, v1, v4 clamp1431; GFX9-NEXT:    v_add_i32 v2, v2, v5 clamp1432; GFX9-NEXT:    s_setpc_b64 s[30:31]1433;1434; GFX10PLUS-LABEL: v_saddsat_v3i32:1435; GFX10PLUS:       ; %bb.0:1436; GFX10PLUS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1437; GFX10PLUS-NEXT:    v_add_nc_i32 v0, v0, v3 clamp1438; GFX10PLUS-NEXT:    v_add_nc_i32 v1, v1, v4 clamp1439; GFX10PLUS-NEXT:    v_add_nc_i32 v2, v2, v5 clamp1440; GFX10PLUS-NEXT:    s_setpc_b64 s[30:31]1441  %result = call <3 x i32> @llvm.sadd.sat.v3i32(<3 x i32> %lhs, <3 x i32> %rhs)1442  ret <3 x i32> %result1443}1444 1445define amdgpu_ps <3 x i32> @s_saddsat_v3i32(<3 x i32> inreg %lhs, <3 x i32> inreg %rhs) {1446; GFX6-LABEL: s_saddsat_v3i32:1447; GFX6:       ; %bb.0:1448; GFX6-NEXT:    s_min_i32 s7, s0, 01449; GFX6-NEXT:    s_max_i32 s6, s0, 01450; GFX6-NEXT:    s_sub_i32 s7, 0x80000000, s71451; GFX6-NEXT:    s_sub_i32 s6, 0x7fffffff, s61452; GFX6-NEXT:    s_max_i32 s3, s7, s31453; GFX6-NEXT:    s_min_i32 s3, s3, s61454; GFX6-NEXT:    s_min_i32 s6, s1, 01455; GFX6-NEXT:    s_add_i32 s0, s0, s31456; GFX6-NEXT:    s_max_i32 s3, s1, 01457; GFX6-NEXT:    s_sub_i32 s6, 0x80000000, s61458; GFX6-NEXT:    s_sub_i32 s3, 0x7fffffff, s31459; GFX6-NEXT:    s_max_i32 s4, s6, s41460; GFX6-NEXT:    s_min_i32 s3, s4, s31461; GFX6-NEXT:    s_min_i32 s4, s2, 01462; GFX6-NEXT:    s_add_i32 s1, s1, s31463; GFX6-NEXT:    s_max_i32 s3, s2, 01464; GFX6-NEXT:    s_sub_i32 s4, 0x80000000, s41465; GFX6-NEXT:    s_sub_i32 s3, 0x7fffffff, s31466; GFX6-NEXT:    s_max_i32 s4, s4, s51467; GFX6-NEXT:    s_min_i32 s3, s4, s31468; GFX6-NEXT:    s_add_i32 s2, s2, s31469; GFX6-NEXT:    ; return to shader part epilog1470;1471; GFX8-LABEL: s_saddsat_v3i32:1472; GFX8:       ; %bb.0:1473; GFX8-NEXT:    s_min_i32 s7, s0, 01474; GFX8-NEXT:    s_max_i32 s6, s0, 01475; GFX8-NEXT:    s_sub_i32 s7, 0x80000000, s71476; GFX8-NEXT:    s_sub_i32 s6, 0x7fffffff, s61477; GFX8-NEXT:    s_max_i32 s3, s7, s31478; GFX8-NEXT:    s_min_i32 s3, s3, s61479; GFX8-NEXT:    s_min_i32 s6, s1, 01480; GFX8-NEXT:    s_add_i32 s0, s0, s31481; GFX8-NEXT:    s_max_i32 s3, s1, 01482; GFX8-NEXT:    s_sub_i32 s6, 0x80000000, s61483; GFX8-NEXT:    s_sub_i32 s3, 0x7fffffff, s31484; GFX8-NEXT:    s_max_i32 s4, s6, s41485; GFX8-NEXT:    s_min_i32 s3, s4, s31486; GFX8-NEXT:    s_min_i32 s4, s2, 01487; GFX8-NEXT:    s_add_i32 s1, s1, s31488; GFX8-NEXT:    s_max_i32 s3, s2, 01489; GFX8-NEXT:    s_sub_i32 s4, 0x80000000, s41490; GFX8-NEXT:    s_sub_i32 s3, 0x7fffffff, s31491; GFX8-NEXT:    s_max_i32 s4, s4, s51492; GFX8-NEXT:    s_min_i32 s3, s4, s31493; GFX8-NEXT:    s_add_i32 s2, s2, s31494; GFX8-NEXT:    ; return to shader part epilog1495;1496; GFX9-LABEL: s_saddsat_v3i32:1497; GFX9:       ; %bb.0:1498; GFX9-NEXT:    v_mov_b32_e32 v0, s31499; GFX9-NEXT:    v_mov_b32_e32 v1, s41500; GFX9-NEXT:    v_mov_b32_e32 v2, s51501; GFX9-NEXT:    v_add_i32 v0, s0, v0 clamp1502; GFX9-NEXT:    v_add_i32 v1, s1, v1 clamp1503; GFX9-NEXT:    v_add_i32 v2, s2, v2 clamp1504; GFX9-NEXT:    v_readfirstlane_b32 s0, v01505; GFX9-NEXT:    v_readfirstlane_b32 s1, v11506; GFX9-NEXT:    v_readfirstlane_b32 s2, v21507; GFX9-NEXT:    ; return to shader part epilog1508;1509; GFX10PLUS-LABEL: s_saddsat_v3i32:1510; GFX10PLUS:       ; %bb.0:1511; GFX10PLUS-NEXT:    v_add_nc_i32 v0, s0, s3 clamp1512; GFX10PLUS-NEXT:    v_add_nc_i32 v1, s1, s4 clamp1513; GFX10PLUS-NEXT:    v_add_nc_i32 v2, s2, s5 clamp1514; GFX10PLUS-NEXT:    v_readfirstlane_b32 s0, v01515; GFX10PLUS-NEXT:    v_readfirstlane_b32 s1, v11516; GFX10PLUS-NEXT:    v_readfirstlane_b32 s2, v21517; GFX10PLUS-NEXT:    ; return to shader part epilog1518  %result = call <3 x i32> @llvm.sadd.sat.v3i32(<3 x i32> %lhs, <3 x i32> %rhs)1519  ret <3 x i32> %result1520}1521 1522define <4 x i32> @v_saddsat_v4i32(<4 x i32> %lhs, <4 x i32> %rhs) {1523; GFX6-LABEL: v_saddsat_v4i32:1524; GFX6:       ; %bb.0:1525; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1526; GFX6-NEXT:    v_min_i32_e32 v10, 0, v01527; GFX6-NEXT:    v_bfrev_b32_e32 v11, 11528; GFX6-NEXT:    v_max_i32_e32 v8, 0, v01529; GFX6-NEXT:    v_sub_i32_e32 v10, vcc, v11, v101530; GFX6-NEXT:    v_sub_i32_e32 v8, vcc, 0x7fffffff, v81531; GFX6-NEXT:    v_max_i32_e32 v4, v10, v41532; GFX6-NEXT:    v_min_i32_e32 v4, v4, v81533; GFX6-NEXT:    v_min_i32_e32 v8, 0, v11534; GFX6-NEXT:    v_bfrev_b32_e32 v9, -21535; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v41536; GFX6-NEXT:    v_max_i32_e32 v4, 0, v11537; GFX6-NEXT:    v_sub_i32_e32 v8, vcc, 0x80000000, v81538; GFX6-NEXT:    v_sub_i32_e32 v4, vcc, v9, v41539; GFX6-NEXT:    v_max_i32_e32 v5, v8, v51540; GFX6-NEXT:    v_min_i32_e32 v4, v5, v41541; GFX6-NEXT:    v_min_i32_e32 v5, 0, v21542; GFX6-NEXT:    v_add_i32_e32 v1, vcc, v1, v41543; GFX6-NEXT:    v_max_i32_e32 v4, 0, v21544; GFX6-NEXT:    v_sub_i32_e32 v5, vcc, 0x80000000, v51545; GFX6-NEXT:    v_sub_i32_e32 v4, vcc, v9, v41546; GFX6-NEXT:    v_max_i32_e32 v5, v5, v61547; GFX6-NEXT:    v_min_i32_e32 v4, v5, v41548; GFX6-NEXT:    v_min_i32_e32 v5, 0, v31549; GFX6-NEXT:    v_add_i32_e32 v2, vcc, v2, v41550; GFX6-NEXT:    v_max_i32_e32 v4, 0, v31551; GFX6-NEXT:    v_sub_i32_e32 v5, vcc, 0x80000000, v51552; GFX6-NEXT:    v_sub_i32_e32 v4, vcc, 0x7fffffff, v41553; GFX6-NEXT:    v_max_i32_e32 v5, v5, v71554; GFX6-NEXT:    v_min_i32_e32 v4, v5, v41555; GFX6-NEXT:    v_add_i32_e32 v3, vcc, v3, v41556; GFX6-NEXT:    s_setpc_b64 s[30:31]1557;1558; GFX8-LABEL: v_saddsat_v4i32:1559; GFX8:       ; %bb.0:1560; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1561; GFX8-NEXT:    v_min_i32_e32 v10, 0, v01562; GFX8-NEXT:    v_bfrev_b32_e32 v11, 11563; GFX8-NEXT:    v_max_i32_e32 v8, 0, v01564; GFX8-NEXT:    v_sub_u32_e32 v10, vcc, v11, v101565; GFX8-NEXT:    v_sub_u32_e32 v8, vcc, 0x7fffffff, v81566; GFX8-NEXT:    v_max_i32_e32 v4, v10, v41567; GFX8-NEXT:    v_min_i32_e32 v4, v4, v81568; GFX8-NEXT:    v_min_i32_e32 v8, 0, v11569; GFX8-NEXT:    v_bfrev_b32_e32 v9, -21570; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v0, v41571; GFX8-NEXT:    v_max_i32_e32 v4, 0, v11572; GFX8-NEXT:    v_sub_u32_e32 v8, vcc, 0x80000000, v81573; GFX8-NEXT:    v_sub_u32_e32 v4, vcc, v9, v41574; GFX8-NEXT:    v_max_i32_e32 v5, v8, v51575; GFX8-NEXT:    v_min_i32_e32 v4, v5, v41576; GFX8-NEXT:    v_min_i32_e32 v5, 0, v21577; GFX8-NEXT:    v_add_u32_e32 v1, vcc, v1, v41578; GFX8-NEXT:    v_max_i32_e32 v4, 0, v21579; GFX8-NEXT:    v_sub_u32_e32 v5, vcc, 0x80000000, v51580; GFX8-NEXT:    v_sub_u32_e32 v4, vcc, v9, v41581; GFX8-NEXT:    v_max_i32_e32 v5, v5, v61582; GFX8-NEXT:    v_min_i32_e32 v4, v5, v41583; GFX8-NEXT:    v_min_i32_e32 v5, 0, v31584; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v2, v41585; GFX8-NEXT:    v_max_i32_e32 v4, 0, v31586; GFX8-NEXT:    v_sub_u32_e32 v5, vcc, 0x80000000, v51587; GFX8-NEXT:    v_sub_u32_e32 v4, vcc, 0x7fffffff, v41588; GFX8-NEXT:    v_max_i32_e32 v5, v5, v71589; GFX8-NEXT:    v_min_i32_e32 v4, v5, v41590; GFX8-NEXT:    v_add_u32_e32 v3, vcc, v3, v41591; GFX8-NEXT:    s_setpc_b64 s[30:31]1592;1593; GFX9-LABEL: v_saddsat_v4i32:1594; GFX9:       ; %bb.0:1595; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1596; GFX9-NEXT:    v_add_i32 v0, v0, v4 clamp1597; GFX9-NEXT:    v_add_i32 v1, v1, v5 clamp1598; GFX9-NEXT:    v_add_i32 v2, v2, v6 clamp1599; GFX9-NEXT:    v_add_i32 v3, v3, v7 clamp1600; GFX9-NEXT:    s_setpc_b64 s[30:31]1601;1602; GFX10PLUS-LABEL: v_saddsat_v4i32:1603; GFX10PLUS:       ; %bb.0:1604; GFX10PLUS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1605; GFX10PLUS-NEXT:    v_add_nc_i32 v0, v0, v4 clamp1606; GFX10PLUS-NEXT:    v_add_nc_i32 v1, v1, v5 clamp1607; GFX10PLUS-NEXT:    v_add_nc_i32 v2, v2, v6 clamp1608; GFX10PLUS-NEXT:    v_add_nc_i32 v3, v3, v7 clamp1609; GFX10PLUS-NEXT:    s_setpc_b64 s[30:31]1610  %result = call <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32> %lhs, <4 x i32> %rhs)1611  ret <4 x i32> %result1612}1613 1614define amdgpu_ps <4 x i32> @s_saddsat_v4i32(<4 x i32> inreg %lhs, <4 x i32> inreg %rhs) {1615; GFX6-LABEL: s_saddsat_v4i32:1616; GFX6:       ; %bb.0:1617; GFX6-NEXT:    s_min_i32 s9, s0, 01618; GFX6-NEXT:    s_max_i32 s8, s0, 01619; GFX6-NEXT:    s_sub_i32 s9, 0x80000000, s91620; GFX6-NEXT:    s_sub_i32 s8, 0x7fffffff, s81621; GFX6-NEXT:    s_max_i32 s4, s9, s41622; GFX6-NEXT:    s_min_i32 s4, s4, s81623; GFX6-NEXT:    s_min_i32 s8, s1, 01624; GFX6-NEXT:    s_add_i32 s0, s0, s41625; GFX6-NEXT:    s_max_i32 s4, s1, 01626; GFX6-NEXT:    s_sub_i32 s8, 0x80000000, s81627; GFX6-NEXT:    s_sub_i32 s4, 0x7fffffff, s41628; GFX6-NEXT:    s_max_i32 s5, s8, s51629; GFX6-NEXT:    s_min_i32 s4, s5, s41630; GFX6-NEXT:    s_min_i32 s5, s2, 01631; GFX6-NEXT:    s_add_i32 s1, s1, s41632; GFX6-NEXT:    s_max_i32 s4, s2, 01633; GFX6-NEXT:    s_sub_i32 s5, 0x80000000, s51634; GFX6-NEXT:    s_sub_i32 s4, 0x7fffffff, s41635; GFX6-NEXT:    s_max_i32 s5, s5, s61636; GFX6-NEXT:    s_min_i32 s4, s5, s41637; GFX6-NEXT:    s_min_i32 s5, s3, 01638; GFX6-NEXT:    s_add_i32 s2, s2, s41639; GFX6-NEXT:    s_max_i32 s4, s3, 01640; GFX6-NEXT:    s_sub_i32 s5, 0x80000000, s51641; GFX6-NEXT:    s_sub_i32 s4, 0x7fffffff, s41642; GFX6-NEXT:    s_max_i32 s5, s5, s71643; GFX6-NEXT:    s_min_i32 s4, s5, s41644; GFX6-NEXT:    s_add_i32 s3, s3, s41645; GFX6-NEXT:    ; return to shader part epilog1646;1647; GFX8-LABEL: s_saddsat_v4i32:1648; GFX8:       ; %bb.0:1649; GFX8-NEXT:    s_min_i32 s9, s0, 01650; GFX8-NEXT:    s_max_i32 s8, s0, 01651; GFX8-NEXT:    s_sub_i32 s9, 0x80000000, s91652; GFX8-NEXT:    s_sub_i32 s8, 0x7fffffff, s81653; GFX8-NEXT:    s_max_i32 s4, s9, s41654; GFX8-NEXT:    s_min_i32 s4, s4, s81655; GFX8-NEXT:    s_min_i32 s8, s1, 01656; GFX8-NEXT:    s_add_i32 s0, s0, s41657; GFX8-NEXT:    s_max_i32 s4, s1, 01658; GFX8-NEXT:    s_sub_i32 s8, 0x80000000, s81659; GFX8-NEXT:    s_sub_i32 s4, 0x7fffffff, s41660; GFX8-NEXT:    s_max_i32 s5, s8, s51661; GFX8-NEXT:    s_min_i32 s4, s5, s41662; GFX8-NEXT:    s_min_i32 s5, s2, 01663; GFX8-NEXT:    s_add_i32 s1, s1, s41664; GFX8-NEXT:    s_max_i32 s4, s2, 01665; GFX8-NEXT:    s_sub_i32 s5, 0x80000000, s51666; GFX8-NEXT:    s_sub_i32 s4, 0x7fffffff, s41667; GFX8-NEXT:    s_max_i32 s5, s5, s61668; GFX8-NEXT:    s_min_i32 s4, s5, s41669; GFX8-NEXT:    s_min_i32 s5, s3, 01670; GFX8-NEXT:    s_add_i32 s2, s2, s41671; GFX8-NEXT:    s_max_i32 s4, s3, 01672; GFX8-NEXT:    s_sub_i32 s5, 0x80000000, s51673; GFX8-NEXT:    s_sub_i32 s4, 0x7fffffff, s41674; GFX8-NEXT:    s_max_i32 s5, s5, s71675; GFX8-NEXT:    s_min_i32 s4, s5, s41676; GFX8-NEXT:    s_add_i32 s3, s3, s41677; GFX8-NEXT:    ; return to shader part epilog1678;1679; GFX9-LABEL: s_saddsat_v4i32:1680; GFX9:       ; %bb.0:1681; GFX9-NEXT:    v_mov_b32_e32 v0, s41682; GFX9-NEXT:    v_mov_b32_e32 v1, s51683; GFX9-NEXT:    v_mov_b32_e32 v2, s61684; GFX9-NEXT:    v_mov_b32_e32 v3, s71685; GFX9-NEXT:    v_add_i32 v0, s0, v0 clamp1686; GFX9-NEXT:    v_add_i32 v1, s1, v1 clamp1687; GFX9-NEXT:    v_add_i32 v2, s2, v2 clamp1688; GFX9-NEXT:    v_add_i32 v3, s3, v3 clamp1689; GFX9-NEXT:    v_readfirstlane_b32 s0, v01690; GFX9-NEXT:    v_readfirstlane_b32 s1, v11691; GFX9-NEXT:    v_readfirstlane_b32 s2, v21692; GFX9-NEXT:    v_readfirstlane_b32 s3, v31693; GFX9-NEXT:    ; return to shader part epilog1694;1695; GFX10PLUS-LABEL: s_saddsat_v4i32:1696; GFX10PLUS:       ; %bb.0:1697; GFX10PLUS-NEXT:    v_add_nc_i32 v0, s0, s4 clamp1698; GFX10PLUS-NEXT:    v_add_nc_i32 v1, s1, s5 clamp1699; GFX10PLUS-NEXT:    v_add_nc_i32 v2, s2, s6 clamp1700; GFX10PLUS-NEXT:    v_add_nc_i32 v3, s3, s7 clamp1701; GFX10PLUS-NEXT:    v_readfirstlane_b32 s0, v01702; GFX10PLUS-NEXT:    v_readfirstlane_b32 s1, v11703; GFX10PLUS-NEXT:    v_readfirstlane_b32 s2, v21704; GFX10PLUS-NEXT:    v_readfirstlane_b32 s3, v31705; GFX10PLUS-NEXT:    ; return to shader part epilog1706  %result = call <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32> %lhs, <4 x i32> %rhs)1707  ret <4 x i32> %result1708}1709 1710define <5 x i32> @v_saddsat_v5i32(<5 x i32> %lhs, <5 x i32> %rhs) {1711; GFX6-LABEL: v_saddsat_v5i32:1712; GFX6:       ; %bb.0:1713; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1714; GFX6-NEXT:    v_min_i32_e32 v12, 0, v01715; GFX6-NEXT:    v_bfrev_b32_e32 v13, 11716; GFX6-NEXT:    v_max_i32_e32 v10, 0, v01717; GFX6-NEXT:    v_sub_i32_e32 v12, vcc, v13, v121718; GFX6-NEXT:    v_sub_i32_e32 v10, vcc, 0x7fffffff, v101719; GFX6-NEXT:    v_max_i32_e32 v5, v12, v51720; GFX6-NEXT:    v_min_i32_e32 v5, v5, v101721; GFX6-NEXT:    v_min_i32_e32 v10, 0, v11722; GFX6-NEXT:    v_bfrev_b32_e32 v11, -21723; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v51724; GFX6-NEXT:    v_max_i32_e32 v5, 0, v11725; GFX6-NEXT:    v_sub_i32_e32 v10, vcc, v13, v101726; GFX6-NEXT:    v_sub_i32_e32 v5, vcc, v11, v51727; GFX6-NEXT:    v_max_i32_e32 v6, v10, v61728; GFX6-NEXT:    v_min_i32_e32 v5, v6, v51729; GFX6-NEXT:    v_min_i32_e32 v6, 0, v21730; GFX6-NEXT:    v_add_i32_e32 v1, vcc, v1, v51731; GFX6-NEXT:    v_max_i32_e32 v5, 0, v21732; GFX6-NEXT:    v_sub_i32_e32 v6, vcc, 0x80000000, v61733; GFX6-NEXT:    v_sub_i32_e32 v5, vcc, v11, v51734; GFX6-NEXT:    v_max_i32_e32 v6, v6, v71735; GFX6-NEXT:    v_min_i32_e32 v5, v6, v51736; GFX6-NEXT:    v_min_i32_e32 v6, 0, v31737; GFX6-NEXT:    v_add_i32_e32 v2, vcc, v2, v51738; GFX6-NEXT:    v_max_i32_e32 v5, 0, v31739; GFX6-NEXT:    v_sub_i32_e32 v6, vcc, 0x80000000, v61740; GFX6-NEXT:    v_sub_i32_e32 v5, vcc, v11, v51741; GFX6-NEXT:    v_max_i32_e32 v6, v6, v81742; GFX6-NEXT:    v_min_i32_e32 v5, v6, v51743; GFX6-NEXT:    v_min_i32_e32 v6, 0, v41744; GFX6-NEXT:    v_add_i32_e32 v3, vcc, v3, v51745; GFX6-NEXT:    v_max_i32_e32 v5, 0, v41746; GFX6-NEXT:    v_sub_i32_e32 v6, vcc, 0x80000000, v61747; GFX6-NEXT:    v_sub_i32_e32 v5, vcc, 0x7fffffff, v51748; GFX6-NEXT:    v_max_i32_e32 v6, v6, v91749; GFX6-NEXT:    v_min_i32_e32 v5, v6, v51750; GFX6-NEXT:    v_add_i32_e32 v4, vcc, v4, v51751; GFX6-NEXT:    s_setpc_b64 s[30:31]1752;1753; GFX8-LABEL: v_saddsat_v5i32:1754; GFX8:       ; %bb.0:1755; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1756; GFX8-NEXT:    v_min_i32_e32 v12, 0, v01757; GFX8-NEXT:    v_bfrev_b32_e32 v13, 11758; GFX8-NEXT:    v_max_i32_e32 v10, 0, v01759; GFX8-NEXT:    v_sub_u32_e32 v12, vcc, v13, v121760; GFX8-NEXT:    v_sub_u32_e32 v10, vcc, 0x7fffffff, v101761; GFX8-NEXT:    v_max_i32_e32 v5, v12, v51762; GFX8-NEXT:    v_min_i32_e32 v5, v5, v101763; GFX8-NEXT:    v_min_i32_e32 v10, 0, v11764; GFX8-NEXT:    v_bfrev_b32_e32 v11, -21765; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v0, v51766; GFX8-NEXT:    v_max_i32_e32 v5, 0, v11767; GFX8-NEXT:    v_sub_u32_e32 v10, vcc, v13, v101768; GFX8-NEXT:    v_sub_u32_e32 v5, vcc, v11, v51769; GFX8-NEXT:    v_max_i32_e32 v6, v10, v61770; GFX8-NEXT:    v_min_i32_e32 v5, v6, v51771; GFX8-NEXT:    v_min_i32_e32 v6, 0, v21772; GFX8-NEXT:    v_add_u32_e32 v1, vcc, v1, v51773; GFX8-NEXT:    v_max_i32_e32 v5, 0, v21774; GFX8-NEXT:    v_sub_u32_e32 v6, vcc, 0x80000000, v61775; GFX8-NEXT:    v_sub_u32_e32 v5, vcc, v11, v51776; GFX8-NEXT:    v_max_i32_e32 v6, v6, v71777; GFX8-NEXT:    v_min_i32_e32 v5, v6, v51778; GFX8-NEXT:    v_min_i32_e32 v6, 0, v31779; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v2, v51780; GFX8-NEXT:    v_max_i32_e32 v5, 0, v31781; GFX8-NEXT:    v_sub_u32_e32 v6, vcc, 0x80000000, v61782; GFX8-NEXT:    v_sub_u32_e32 v5, vcc, v11, v51783; GFX8-NEXT:    v_max_i32_e32 v6, v6, v81784; GFX8-NEXT:    v_min_i32_e32 v5, v6, v51785; GFX8-NEXT:    v_min_i32_e32 v6, 0, v41786; GFX8-NEXT:    v_add_u32_e32 v3, vcc, v3, v51787; GFX8-NEXT:    v_max_i32_e32 v5, 0, v41788; GFX8-NEXT:    v_sub_u32_e32 v6, vcc, 0x80000000, v61789; GFX8-NEXT:    v_sub_u32_e32 v5, vcc, 0x7fffffff, v51790; GFX8-NEXT:    v_max_i32_e32 v6, v6, v91791; GFX8-NEXT:    v_min_i32_e32 v5, v6, v51792; GFX8-NEXT:    v_add_u32_e32 v4, vcc, v4, v51793; GFX8-NEXT:    s_setpc_b64 s[30:31]1794;1795; GFX9-LABEL: v_saddsat_v5i32:1796; GFX9:       ; %bb.0:1797; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1798; GFX9-NEXT:    v_add_i32 v0, v0, v5 clamp1799; GFX9-NEXT:    v_add_i32 v1, v1, v6 clamp1800; GFX9-NEXT:    v_add_i32 v2, v2, v7 clamp1801; GFX9-NEXT:    v_add_i32 v3, v3, v8 clamp1802; GFX9-NEXT:    v_add_i32 v4, v4, v9 clamp1803; GFX9-NEXT:    s_setpc_b64 s[30:31]1804;1805; GFX10PLUS-LABEL: v_saddsat_v5i32:1806; GFX10PLUS:       ; %bb.0:1807; GFX10PLUS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1808; GFX10PLUS-NEXT:    v_add_nc_i32 v0, v0, v5 clamp1809; GFX10PLUS-NEXT:    v_add_nc_i32 v1, v1, v6 clamp1810; GFX10PLUS-NEXT:    v_add_nc_i32 v2, v2, v7 clamp1811; GFX10PLUS-NEXT:    v_add_nc_i32 v3, v3, v8 clamp1812; GFX10PLUS-NEXT:    v_add_nc_i32 v4, v4, v9 clamp1813; GFX10PLUS-NEXT:    s_setpc_b64 s[30:31]1814  %result = call <5 x i32> @llvm.sadd.sat.v5i32(<5 x i32> %lhs, <5 x i32> %rhs)1815  ret <5 x i32> %result1816}1817 1818define amdgpu_ps <5 x i32> @s_saddsat_v5i32(<5 x i32> inreg %lhs, <5 x i32> inreg %rhs) {1819; GFX6-LABEL: s_saddsat_v5i32:1820; GFX6:       ; %bb.0:1821; GFX6-NEXT:    s_min_i32 s11, s0, 01822; GFX6-NEXT:    s_max_i32 s10, s0, 01823; GFX6-NEXT:    s_sub_i32 s11, 0x80000000, s111824; GFX6-NEXT:    s_sub_i32 s10, 0x7fffffff, s101825; GFX6-NEXT:    s_max_i32 s5, s11, s51826; GFX6-NEXT:    s_min_i32 s5, s5, s101827; GFX6-NEXT:    s_min_i32 s10, s1, 01828; GFX6-NEXT:    s_add_i32 s0, s0, s51829; GFX6-NEXT:    s_max_i32 s5, s1, 01830; GFX6-NEXT:    s_sub_i32 s10, 0x80000000, s101831; GFX6-NEXT:    s_sub_i32 s5, 0x7fffffff, s51832; GFX6-NEXT:    s_max_i32 s6, s10, s61833; GFX6-NEXT:    s_min_i32 s5, s6, s51834; GFX6-NEXT:    s_min_i32 s6, s2, 01835; GFX6-NEXT:    s_add_i32 s1, s1, s51836; GFX6-NEXT:    s_max_i32 s5, s2, 01837; GFX6-NEXT:    s_sub_i32 s6, 0x80000000, s61838; GFX6-NEXT:    s_sub_i32 s5, 0x7fffffff, s51839; GFX6-NEXT:    s_max_i32 s6, s6, s71840; GFX6-NEXT:    s_min_i32 s5, s6, s51841; GFX6-NEXT:    s_min_i32 s6, s3, 01842; GFX6-NEXT:    s_add_i32 s2, s2, s51843; GFX6-NEXT:    s_max_i32 s5, s3, 01844; GFX6-NEXT:    s_sub_i32 s6, 0x80000000, s61845; GFX6-NEXT:    s_sub_i32 s5, 0x7fffffff, s51846; GFX6-NEXT:    s_max_i32 s6, s6, s81847; GFX6-NEXT:    s_min_i32 s5, s6, s51848; GFX6-NEXT:    s_min_i32 s6, s4, 01849; GFX6-NEXT:    s_add_i32 s3, s3, s51850; GFX6-NEXT:    s_max_i32 s5, s4, 01851; GFX6-NEXT:    s_sub_i32 s6, 0x80000000, s61852; GFX6-NEXT:    s_sub_i32 s5, 0x7fffffff, s51853; GFX6-NEXT:    s_max_i32 s6, s6, s91854; GFX6-NEXT:    s_min_i32 s5, s6, s51855; GFX6-NEXT:    s_add_i32 s4, s4, s51856; GFX6-NEXT:    ; return to shader part epilog1857;1858; GFX8-LABEL: s_saddsat_v5i32:1859; GFX8:       ; %bb.0:1860; GFX8-NEXT:    s_min_i32 s11, s0, 01861; GFX8-NEXT:    s_max_i32 s10, s0, 01862; GFX8-NEXT:    s_sub_i32 s11, 0x80000000, s111863; GFX8-NEXT:    s_sub_i32 s10, 0x7fffffff, s101864; GFX8-NEXT:    s_max_i32 s5, s11, s51865; GFX8-NEXT:    s_min_i32 s5, s5, s101866; GFX8-NEXT:    s_min_i32 s10, s1, 01867; GFX8-NEXT:    s_add_i32 s0, s0, s51868; GFX8-NEXT:    s_max_i32 s5, s1, 01869; GFX8-NEXT:    s_sub_i32 s10, 0x80000000, s101870; GFX8-NEXT:    s_sub_i32 s5, 0x7fffffff, s51871; GFX8-NEXT:    s_max_i32 s6, s10, s61872; GFX8-NEXT:    s_min_i32 s5, s6, s51873; GFX8-NEXT:    s_min_i32 s6, s2, 01874; GFX8-NEXT:    s_add_i32 s1, s1, s51875; GFX8-NEXT:    s_max_i32 s5, s2, 01876; GFX8-NEXT:    s_sub_i32 s6, 0x80000000, s61877; GFX8-NEXT:    s_sub_i32 s5, 0x7fffffff, s51878; GFX8-NEXT:    s_max_i32 s6, s6, s71879; GFX8-NEXT:    s_min_i32 s5, s6, s51880; GFX8-NEXT:    s_min_i32 s6, s3, 01881; GFX8-NEXT:    s_add_i32 s2, s2, s51882; GFX8-NEXT:    s_max_i32 s5, s3, 01883; GFX8-NEXT:    s_sub_i32 s6, 0x80000000, s61884; GFX8-NEXT:    s_sub_i32 s5, 0x7fffffff, s51885; GFX8-NEXT:    s_max_i32 s6, s6, s81886; GFX8-NEXT:    s_min_i32 s5, s6, s51887; GFX8-NEXT:    s_min_i32 s6, s4, 01888; GFX8-NEXT:    s_add_i32 s3, s3, s51889; GFX8-NEXT:    s_max_i32 s5, s4, 01890; GFX8-NEXT:    s_sub_i32 s6, 0x80000000, s61891; GFX8-NEXT:    s_sub_i32 s5, 0x7fffffff, s51892; GFX8-NEXT:    s_max_i32 s6, s6, s91893; GFX8-NEXT:    s_min_i32 s5, s6, s51894; GFX8-NEXT:    s_add_i32 s4, s4, s51895; GFX8-NEXT:    ; return to shader part epilog1896;1897; GFX9-LABEL: s_saddsat_v5i32:1898; GFX9:       ; %bb.0:1899; GFX9-NEXT:    v_mov_b32_e32 v0, s51900; GFX9-NEXT:    v_mov_b32_e32 v1, s61901; GFX9-NEXT:    v_mov_b32_e32 v2, s71902; GFX9-NEXT:    v_mov_b32_e32 v3, s81903; GFX9-NEXT:    v_mov_b32_e32 v4, s91904; GFX9-NEXT:    v_add_i32 v0, s0, v0 clamp1905; GFX9-NEXT:    v_add_i32 v1, s1, v1 clamp1906; GFX9-NEXT:    v_add_i32 v2, s2, v2 clamp1907; GFX9-NEXT:    v_add_i32 v3, s3, v3 clamp1908; GFX9-NEXT:    v_add_i32 v4, s4, v4 clamp1909; GFX9-NEXT:    v_readfirstlane_b32 s0, v01910; GFX9-NEXT:    v_readfirstlane_b32 s1, v11911; GFX9-NEXT:    v_readfirstlane_b32 s2, v21912; GFX9-NEXT:    v_readfirstlane_b32 s3, v31913; GFX9-NEXT:    v_readfirstlane_b32 s4, v41914; GFX9-NEXT:    ; return to shader part epilog1915;1916; GFX10PLUS-LABEL: s_saddsat_v5i32:1917; GFX10PLUS:       ; %bb.0:1918; GFX10PLUS-NEXT:    v_add_nc_i32 v0, s0, s5 clamp1919; GFX10PLUS-NEXT:    v_add_nc_i32 v1, s1, s6 clamp1920; GFX10PLUS-NEXT:    v_add_nc_i32 v2, s2, s7 clamp1921; GFX10PLUS-NEXT:    v_add_nc_i32 v3, s3, s8 clamp1922; GFX10PLUS-NEXT:    v_add_nc_i32 v4, s4, s9 clamp1923; GFX10PLUS-NEXT:    v_readfirstlane_b32 s0, v01924; GFX10PLUS-NEXT:    v_readfirstlane_b32 s1, v11925; GFX10PLUS-NEXT:    v_readfirstlane_b32 s2, v21926; GFX10PLUS-NEXT:    v_readfirstlane_b32 s3, v31927; GFX10PLUS-NEXT:    v_readfirstlane_b32 s4, v41928; GFX10PLUS-NEXT:    ; return to shader part epilog1929  %result = call <5 x i32> @llvm.sadd.sat.v5i32(<5 x i32> %lhs, <5 x i32> %rhs)1930  ret <5 x i32> %result1931}1932 1933define <16 x i32> @v_saddsat_v16i32(<16 x i32> %lhs, <16 x i32> %rhs) {1934; GFX6-LABEL: v_saddsat_v16i32:1935; GFX6:       ; %bb.0:1936; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1937; GFX6-NEXT:    v_min_i32_e32 v32, 0, v01938; GFX6-NEXT:    v_bfrev_b32_e32 v31, 11939; GFX6-NEXT:    v_sub_i32_e32 v32, vcc, v31, v321940; GFX6-NEXT:    v_max_i32_e32 v32, v32, v161941; GFX6-NEXT:    v_max_i32_e32 v33, 0, v01942; GFX6-NEXT:    v_bfrev_b32_e32 v16, -21943; GFX6-NEXT:    v_sub_i32_e32 v33, vcc, v16, v331944; GFX6-NEXT:    v_min_i32_e32 v32, v32, v331945; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v321946; GFX6-NEXT:    v_min_i32_e32 v32, 0, v11947; GFX6-NEXT:    v_sub_i32_e32 v32, vcc, v31, v321948; GFX6-NEXT:    v_max_i32_e32 v17, v32, v171949; GFX6-NEXT:    v_max_i32_e32 v32, 0, v11950; GFX6-NEXT:    v_sub_i32_e32 v32, vcc, v16, v321951; GFX6-NEXT:    v_min_i32_e32 v17, v17, v321952; GFX6-NEXT:    v_add_i32_e32 v1, vcc, v1, v171953; GFX6-NEXT:    v_min_i32_e32 v17, 0, v21954; GFX6-NEXT:    v_sub_i32_e32 v17, vcc, v31, v171955; GFX6-NEXT:    v_max_i32_e32 v17, v17, v181956; GFX6-NEXT:    v_max_i32_e32 v18, 0, v21957; GFX6-NEXT:    v_sub_i32_e32 v18, vcc, v16, v181958; GFX6-NEXT:    v_min_i32_e32 v17, v17, v181959; GFX6-NEXT:    v_add_i32_e32 v2, vcc, v2, v171960; GFX6-NEXT:    v_min_i32_e32 v17, 0, v31961; GFX6-NEXT:    v_sub_i32_e32 v17, vcc, v31, v171962; GFX6-NEXT:    v_max_i32_e32 v17, v17, v191963; GFX6-NEXT:    buffer_load_dword v19, off, s[0:3], s321964; GFX6-NEXT:    v_max_i32_e32 v18, 0, v31965; GFX6-NEXT:    v_sub_i32_e32 v18, vcc, v16, v181966; GFX6-NEXT:    v_min_i32_e32 v17, v17, v181967; GFX6-NEXT:    v_add_i32_e32 v3, vcc, v3, v171968; GFX6-NEXT:    v_min_i32_e32 v17, 0, v41969; GFX6-NEXT:    v_sub_i32_e32 v17, vcc, v31, v171970; GFX6-NEXT:    v_max_i32_e32 v18, 0, v41971; GFX6-NEXT:    v_max_i32_e32 v17, v17, v201972; GFX6-NEXT:    v_sub_i32_e32 v18, vcc, v16, v181973; GFX6-NEXT:    v_min_i32_e32 v17, v17, v181974; GFX6-NEXT:    v_add_i32_e32 v4, vcc, v4, v171975; GFX6-NEXT:    v_min_i32_e32 v17, 0, v51976; GFX6-NEXT:    v_sub_i32_e32 v17, vcc, v31, v171977; GFX6-NEXT:    v_max_i32_e32 v18, 0, v51978; GFX6-NEXT:    v_max_i32_e32 v17, v17, v211979; GFX6-NEXT:    v_sub_i32_e32 v18, vcc, v16, v181980; GFX6-NEXT:    v_min_i32_e32 v17, v17, v181981; GFX6-NEXT:    v_add_i32_e32 v5, vcc, v5, v171982; GFX6-NEXT:    v_min_i32_e32 v17, 0, v61983; GFX6-NEXT:    v_sub_i32_e32 v17, vcc, v31, v171984; GFX6-NEXT:    v_max_i32_e32 v18, 0, v61985; GFX6-NEXT:    v_max_i32_e32 v17, v17, v221986; GFX6-NEXT:    v_sub_i32_e32 v18, vcc, v16, v181987; GFX6-NEXT:    v_min_i32_e32 v17, v17, v181988; GFX6-NEXT:    v_add_i32_e32 v6, vcc, v6, v171989; GFX6-NEXT:    v_min_i32_e32 v17, 0, v71990; GFX6-NEXT:    v_sub_i32_e32 v17, vcc, v31, v171991; GFX6-NEXT:    v_max_i32_e32 v18, 0, v71992; GFX6-NEXT:    v_max_i32_e32 v17, v17, v231993; GFX6-NEXT:    v_sub_i32_e32 v18, vcc, v16, v181994; GFX6-NEXT:    v_min_i32_e32 v17, v17, v181995; GFX6-NEXT:    v_add_i32_e32 v7, vcc, v7, v171996; GFX6-NEXT:    v_min_i32_e32 v17, 0, v81997; GFX6-NEXT:    v_sub_i32_e32 v17, vcc, v31, v171998; GFX6-NEXT:    v_max_i32_e32 v18, 0, v81999; GFX6-NEXT:    v_max_i32_e32 v17, v17, v242000; GFX6-NEXT:    v_sub_i32_e32 v18, vcc, v16, v182001; GFX6-NEXT:    v_min_i32_e32 v17, v17, v182002; GFX6-NEXT:    v_add_i32_e32 v8, vcc, v8, v172003; GFX6-NEXT:    v_min_i32_e32 v17, 0, v92004; GFX6-NEXT:    v_sub_i32_e32 v17, vcc, v31, v172005; GFX6-NEXT:    v_max_i32_e32 v18, 0, v92006; GFX6-NEXT:    v_max_i32_e32 v17, v17, v252007; GFX6-NEXT:    v_sub_i32_e32 v18, vcc, v16, v182008; GFX6-NEXT:    v_min_i32_e32 v17, v17, v182009; GFX6-NEXT:    v_add_i32_e32 v9, vcc, v9, v172010; GFX6-NEXT:    v_min_i32_e32 v17, 0, v102011; GFX6-NEXT:    v_sub_i32_e32 v17, vcc, v31, v172012; GFX6-NEXT:    v_max_i32_e32 v18, 0, v102013; GFX6-NEXT:    v_max_i32_e32 v17, v17, v262014; GFX6-NEXT:    v_sub_i32_e32 v18, vcc, v16, v182015; GFX6-NEXT:    v_min_i32_e32 v17, v17, v182016; GFX6-NEXT:    v_add_i32_e32 v10, vcc, v10, v172017; GFX6-NEXT:    v_min_i32_e32 v17, 0, v112018; GFX6-NEXT:    v_sub_i32_e32 v17, vcc, v31, v172019; GFX6-NEXT:    v_max_i32_e32 v18, 0, v112020; GFX6-NEXT:    v_max_i32_e32 v17, v17, v272021; GFX6-NEXT:    v_sub_i32_e32 v18, vcc, v16, v182022; GFX6-NEXT:    v_min_i32_e32 v17, v17, v182023; GFX6-NEXT:    v_add_i32_e32 v11, vcc, v11, v172024; GFX6-NEXT:    v_min_i32_e32 v17, 0, v122025; GFX6-NEXT:    v_sub_i32_e32 v17, vcc, v31, v172026; GFX6-NEXT:    v_max_i32_e32 v18, 0, v122027; GFX6-NEXT:    v_max_i32_e32 v17, v17, v282028; GFX6-NEXT:    v_sub_i32_e32 v18, vcc, v16, v182029; GFX6-NEXT:    v_min_i32_e32 v17, v17, v182030; GFX6-NEXT:    v_add_i32_e32 v12, vcc, v12, v172031; GFX6-NEXT:    v_min_i32_e32 v17, 0, v132032; GFX6-NEXT:    v_sub_i32_e32 v17, vcc, v31, v172033; GFX6-NEXT:    v_max_i32_e32 v18, 0, v132034; GFX6-NEXT:    v_max_i32_e32 v17, v17, v292035; GFX6-NEXT:    v_sub_i32_e32 v18, vcc, v16, v182036; GFX6-NEXT:    v_min_i32_e32 v17, v17, v182037; GFX6-NEXT:    v_add_i32_e32 v13, vcc, v13, v172038; GFX6-NEXT:    v_min_i32_e32 v17, 0, v142039; GFX6-NEXT:    v_sub_i32_e32 v17, vcc, v31, v172040; GFX6-NEXT:    v_max_i32_e32 v18, 0, v142041; GFX6-NEXT:    v_max_i32_e32 v17, v17, v302042; GFX6-NEXT:    v_sub_i32_e32 v18, vcc, v16, v182043; GFX6-NEXT:    v_min_i32_e32 v17, v17, v182044; GFX6-NEXT:    v_add_i32_e32 v14, vcc, v14, v172045; GFX6-NEXT:    v_max_i32_e32 v17, 0, v152046; GFX6-NEXT:    v_sub_i32_e32 v16, vcc, v16, v172047; GFX6-NEXT:    v_min_i32_e32 v17, 0, v152048; GFX6-NEXT:    v_sub_i32_e32 v17, vcc, v31, v172049; GFX6-NEXT:    s_waitcnt vmcnt(0)2050; GFX6-NEXT:    v_max_i32_e32 v17, v17, v192051; GFX6-NEXT:    v_min_i32_e32 v16, v17, v162052; GFX6-NEXT:    v_add_i32_e32 v15, vcc, v15, v162053; GFX6-NEXT:    s_setpc_b64 s[30:31]2054;2055; GFX8-LABEL: v_saddsat_v16i32:2056; GFX8:       ; %bb.0:2057; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2058; GFX8-NEXT:    v_min_i32_e32 v32, 0, v02059; GFX8-NEXT:    v_bfrev_b32_e32 v31, 12060; GFX8-NEXT:    v_sub_u32_e32 v32, vcc, v31, v322061; GFX8-NEXT:    v_max_i32_e32 v32, v32, v162062; GFX8-NEXT:    v_max_i32_e32 v33, 0, v02063; GFX8-NEXT:    v_bfrev_b32_e32 v16, -22064; GFX8-NEXT:    v_sub_u32_e32 v33, vcc, v16, v332065; GFX8-NEXT:    v_min_i32_e32 v32, v32, v332066; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v0, v322067; GFX8-NEXT:    v_min_i32_e32 v32, 0, v12068; GFX8-NEXT:    v_sub_u32_e32 v32, vcc, v31, v322069; GFX8-NEXT:    v_max_i32_e32 v17, v32, v172070; GFX8-NEXT:    v_max_i32_e32 v32, 0, v12071; GFX8-NEXT:    v_sub_u32_e32 v32, vcc, v16, v322072; GFX8-NEXT:    v_min_i32_e32 v17, v17, v322073; GFX8-NEXT:    v_add_u32_e32 v1, vcc, v1, v172074; GFX8-NEXT:    v_min_i32_e32 v17, 0, v22075; GFX8-NEXT:    v_sub_u32_e32 v17, vcc, v31, v172076; GFX8-NEXT:    v_max_i32_e32 v17, v17, v182077; GFX8-NEXT:    v_max_i32_e32 v18, 0, v22078; GFX8-NEXT:    v_sub_u32_e32 v18, vcc, v16, v182079; GFX8-NEXT:    v_min_i32_e32 v17, v17, v182080; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v2, v172081; GFX8-NEXT:    v_min_i32_e32 v17, 0, v32082; GFX8-NEXT:    v_sub_u32_e32 v17, vcc, v31, v172083; GFX8-NEXT:    v_max_i32_e32 v17, v17, v192084; GFX8-NEXT:    buffer_load_dword v19, off, s[0:3], s322085; GFX8-NEXT:    v_max_i32_e32 v18, 0, v32086; GFX8-NEXT:    v_sub_u32_e32 v18, vcc, v16, v182087; GFX8-NEXT:    v_min_i32_e32 v17, v17, v182088; GFX8-NEXT:    v_add_u32_e32 v3, vcc, v3, v172089; GFX8-NEXT:    v_min_i32_e32 v17, 0, v42090; GFX8-NEXT:    v_sub_u32_e32 v17, vcc, v31, v172091; GFX8-NEXT:    v_max_i32_e32 v18, 0, v42092; GFX8-NEXT:    v_max_i32_e32 v17, v17, v202093; GFX8-NEXT:    v_sub_u32_e32 v18, vcc, v16, v182094; GFX8-NEXT:    v_min_i32_e32 v17, v17, v182095; GFX8-NEXT:    v_add_u32_e32 v4, vcc, v4, v172096; GFX8-NEXT:    v_min_i32_e32 v17, 0, v52097; GFX8-NEXT:    v_sub_u32_e32 v17, vcc, v31, v172098; GFX8-NEXT:    v_max_i32_e32 v18, 0, v52099; GFX8-NEXT:    v_max_i32_e32 v17, v17, v212100; GFX8-NEXT:    v_sub_u32_e32 v18, vcc, v16, v182101; GFX8-NEXT:    v_min_i32_e32 v17, v17, v182102; GFX8-NEXT:    v_add_u32_e32 v5, vcc, v5, v172103; GFX8-NEXT:    v_min_i32_e32 v17, 0, v62104; GFX8-NEXT:    v_sub_u32_e32 v17, vcc, v31, v172105; GFX8-NEXT:    v_max_i32_e32 v18, 0, v62106; GFX8-NEXT:    v_max_i32_e32 v17, v17, v222107; GFX8-NEXT:    v_sub_u32_e32 v18, vcc, v16, v182108; GFX8-NEXT:    v_min_i32_e32 v17, v17, v182109; GFX8-NEXT:    v_add_u32_e32 v6, vcc, v6, v172110; GFX8-NEXT:    v_min_i32_e32 v17, 0, v72111; GFX8-NEXT:    v_sub_u32_e32 v17, vcc, v31, v172112; GFX8-NEXT:    v_max_i32_e32 v18, 0, v72113; GFX8-NEXT:    v_max_i32_e32 v17, v17, v232114; GFX8-NEXT:    v_sub_u32_e32 v18, vcc, v16, v182115; GFX8-NEXT:    v_min_i32_e32 v17, v17, v182116; GFX8-NEXT:    v_add_u32_e32 v7, vcc, v7, v172117; GFX8-NEXT:    v_min_i32_e32 v17, 0, v82118; GFX8-NEXT:    v_sub_u32_e32 v17, vcc, v31, v172119; GFX8-NEXT:    v_max_i32_e32 v18, 0, v82120; GFX8-NEXT:    v_max_i32_e32 v17, v17, v242121; GFX8-NEXT:    v_sub_u32_e32 v18, vcc, v16, v182122; GFX8-NEXT:    v_min_i32_e32 v17, v17, v182123; GFX8-NEXT:    v_add_u32_e32 v8, vcc, v8, v172124; GFX8-NEXT:    v_min_i32_e32 v17, 0, v92125; GFX8-NEXT:    v_sub_u32_e32 v17, vcc, v31, v172126; GFX8-NEXT:    v_max_i32_e32 v18, 0, v92127; GFX8-NEXT:    v_max_i32_e32 v17, v17, v252128; GFX8-NEXT:    v_sub_u32_e32 v18, vcc, v16, v182129; GFX8-NEXT:    v_min_i32_e32 v17, v17, v182130; GFX8-NEXT:    v_add_u32_e32 v9, vcc, v9, v172131; GFX8-NEXT:    v_min_i32_e32 v17, 0, v102132; GFX8-NEXT:    v_sub_u32_e32 v17, vcc, v31, v172133; GFX8-NEXT:    v_max_i32_e32 v18, 0, v102134; GFX8-NEXT:    v_max_i32_e32 v17, v17, v262135; GFX8-NEXT:    v_sub_u32_e32 v18, vcc, v16, v182136; GFX8-NEXT:    v_min_i32_e32 v17, v17, v182137; GFX8-NEXT:    v_add_u32_e32 v10, vcc, v10, v172138; GFX8-NEXT:    v_min_i32_e32 v17, 0, v112139; GFX8-NEXT:    v_sub_u32_e32 v17, vcc, v31, v172140; GFX8-NEXT:    v_max_i32_e32 v18, 0, v112141; GFX8-NEXT:    v_max_i32_e32 v17, v17, v272142; GFX8-NEXT:    v_sub_u32_e32 v18, vcc, v16, v182143; GFX8-NEXT:    v_min_i32_e32 v17, v17, v182144; GFX8-NEXT:    v_add_u32_e32 v11, vcc, v11, v172145; GFX8-NEXT:    v_min_i32_e32 v17, 0, v122146; GFX8-NEXT:    v_sub_u32_e32 v17, vcc, v31, v172147; GFX8-NEXT:    v_max_i32_e32 v18, 0, v122148; GFX8-NEXT:    v_max_i32_e32 v17, v17, v282149; GFX8-NEXT:    v_sub_u32_e32 v18, vcc, v16, v182150; GFX8-NEXT:    v_min_i32_e32 v17, v17, v182151; GFX8-NEXT:    v_add_u32_e32 v12, vcc, v12, v172152; GFX8-NEXT:    v_min_i32_e32 v17, 0, v132153; GFX8-NEXT:    v_sub_u32_e32 v17, vcc, v31, v172154; GFX8-NEXT:    v_max_i32_e32 v18, 0, v132155; GFX8-NEXT:    v_max_i32_e32 v17, v17, v292156; GFX8-NEXT:    v_sub_u32_e32 v18, vcc, v16, v182157; GFX8-NEXT:    v_min_i32_e32 v17, v17, v182158; GFX8-NEXT:    v_add_u32_e32 v13, vcc, v13, v172159; GFX8-NEXT:    v_min_i32_e32 v17, 0, v142160; GFX8-NEXT:    v_sub_u32_e32 v17, vcc, v31, v172161; GFX8-NEXT:    v_max_i32_e32 v18, 0, v142162; GFX8-NEXT:    v_max_i32_e32 v17, v17, v302163; GFX8-NEXT:    v_sub_u32_e32 v18, vcc, v16, v182164; GFX8-NEXT:    v_min_i32_e32 v17, v17, v182165; GFX8-NEXT:    v_add_u32_e32 v14, vcc, v14, v172166; GFX8-NEXT:    v_max_i32_e32 v17, 0, v152167; GFX8-NEXT:    v_sub_u32_e32 v16, vcc, v16, v172168; GFX8-NEXT:    v_min_i32_e32 v17, 0, v152169; GFX8-NEXT:    v_sub_u32_e32 v17, vcc, v31, v172170; GFX8-NEXT:    s_waitcnt vmcnt(0)2171; GFX8-NEXT:    v_max_i32_e32 v17, v17, v192172; GFX8-NEXT:    v_min_i32_e32 v16, v17, v162173; GFX8-NEXT:    v_add_u32_e32 v15, vcc, v15, v162174; GFX8-NEXT:    s_setpc_b64 s[30:31]2175;2176; GFX9-LABEL: v_saddsat_v16i32:2177; GFX9:       ; %bb.0:2178; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2179; GFX9-NEXT:    v_add_i32 v0, v0, v16 clamp2180; GFX9-NEXT:    buffer_load_dword v16, off, s[0:3], s322181; GFX9-NEXT:    v_add_i32 v1, v1, v17 clamp2182; GFX9-NEXT:    v_add_i32 v2, v2, v18 clamp2183; GFX9-NEXT:    v_add_i32 v3, v3, v19 clamp2184; GFX9-NEXT:    v_add_i32 v4, v4, v20 clamp2185; GFX9-NEXT:    v_add_i32 v5, v5, v21 clamp2186; GFX9-NEXT:    v_add_i32 v6, v6, v22 clamp2187; GFX9-NEXT:    v_add_i32 v7, v7, v23 clamp2188; GFX9-NEXT:    v_add_i32 v8, v8, v24 clamp2189; GFX9-NEXT:    v_add_i32 v9, v9, v25 clamp2190; GFX9-NEXT:    v_add_i32 v10, v10, v26 clamp2191; GFX9-NEXT:    v_add_i32 v11, v11, v27 clamp2192; GFX9-NEXT:    v_add_i32 v12, v12, v28 clamp2193; GFX9-NEXT:    v_add_i32 v13, v13, v29 clamp2194; GFX9-NEXT:    v_add_i32 v14, v14, v30 clamp2195; GFX9-NEXT:    s_waitcnt vmcnt(0)2196; GFX9-NEXT:    v_add_i32 v15, v15, v16 clamp2197; GFX9-NEXT:    s_setpc_b64 s[30:31]2198;2199; GFX10-LABEL: v_saddsat_v16i32:2200; GFX10:       ; %bb.0:2201; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2202; GFX10-NEXT:    buffer_load_dword v31, off, s[0:3], s322203; GFX10-NEXT:    v_add_nc_i32 v0, v0, v16 clamp2204; GFX10-NEXT:    v_add_nc_i32 v1, v1, v17 clamp2205; GFX10-NEXT:    v_add_nc_i32 v2, v2, v18 clamp2206; GFX10-NEXT:    v_add_nc_i32 v3, v3, v19 clamp2207; GFX10-NEXT:    v_add_nc_i32 v4, v4, v20 clamp2208; GFX10-NEXT:    v_add_nc_i32 v5, v5, v21 clamp2209; GFX10-NEXT:    v_add_nc_i32 v6, v6, v22 clamp2210; GFX10-NEXT:    v_add_nc_i32 v7, v7, v23 clamp2211; GFX10-NEXT:    v_add_nc_i32 v8, v8, v24 clamp2212; GFX10-NEXT:    v_add_nc_i32 v9, v9, v25 clamp2213; GFX10-NEXT:    v_add_nc_i32 v10, v10, v26 clamp2214; GFX10-NEXT:    v_add_nc_i32 v11, v11, v27 clamp2215; GFX10-NEXT:    v_add_nc_i32 v12, v12, v28 clamp2216; GFX10-NEXT:    v_add_nc_i32 v13, v13, v29 clamp2217; GFX10-NEXT:    v_add_nc_i32 v14, v14, v30 clamp2218; GFX10-NEXT:    s_waitcnt vmcnt(0)2219; GFX10-NEXT:    v_add_nc_i32 v15, v15, v31 clamp2220; GFX10-NEXT:    s_setpc_b64 s[30:31]2221;2222; GFX11-LABEL: v_saddsat_v16i32:2223; GFX11:       ; %bb.0:2224; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2225; GFX11-NEXT:    scratch_load_b32 v31, off, s322226; GFX11-NEXT:    v_add_nc_i32 v0, v0, v16 clamp2227; GFX11-NEXT:    v_add_nc_i32 v1, v1, v17 clamp2228; GFX11-NEXT:    v_add_nc_i32 v2, v2, v18 clamp2229; GFX11-NEXT:    v_add_nc_i32 v3, v3, v19 clamp2230; GFX11-NEXT:    v_add_nc_i32 v4, v4, v20 clamp2231; GFX11-NEXT:    v_add_nc_i32 v5, v5, v21 clamp2232; GFX11-NEXT:    v_add_nc_i32 v6, v6, v22 clamp2233; GFX11-NEXT:    v_add_nc_i32 v7, v7, v23 clamp2234; GFX11-NEXT:    v_add_nc_i32 v8, v8, v24 clamp2235; GFX11-NEXT:    v_add_nc_i32 v9, v9, v25 clamp2236; GFX11-NEXT:    v_add_nc_i32 v10, v10, v26 clamp2237; GFX11-NEXT:    v_add_nc_i32 v11, v11, v27 clamp2238; GFX11-NEXT:    v_add_nc_i32 v12, v12, v28 clamp2239; GFX11-NEXT:    v_add_nc_i32 v13, v13, v29 clamp2240; GFX11-NEXT:    v_add_nc_i32 v14, v14, v30 clamp2241; GFX11-NEXT:    s_waitcnt vmcnt(0)2242; GFX11-NEXT:    v_add_nc_i32 v15, v15, v31 clamp2243; GFX11-NEXT:    s_setpc_b64 s[30:31]2244  %result = call <16 x i32> @llvm.sadd.sat.v16i32(<16 x i32> %lhs, <16 x i32> %rhs)2245  ret <16 x i32> %result2246}2247 2248define amdgpu_ps <16 x i32> @s_saddsat_v16i32(<16 x i32> inreg %lhs, <16 x i32> inreg %rhs) {2249; GFX6-LABEL: s_saddsat_v16i32:2250; GFX6:       ; %bb.0:2251; GFX6-NEXT:    s_min_i32 s33, s0, 02252; GFX6-NEXT:    s_max_i32 s32, s0, 02253; GFX6-NEXT:    s_sub_i32 s33, 0x80000000, s332254; GFX6-NEXT:    s_sub_i32 s32, 0x7fffffff, s322255; GFX6-NEXT:    s_max_i32 s16, s33, s162256; GFX6-NEXT:    s_min_i32 s16, s16, s322257; GFX6-NEXT:    s_min_i32 s32, s1, 02258; GFX6-NEXT:    s_add_i32 s0, s0, s162259; GFX6-NEXT:    s_max_i32 s16, s1, 02260; GFX6-NEXT:    s_sub_i32 s32, 0x80000000, s322261; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162262; GFX6-NEXT:    s_max_i32 s17, s32, s172263; GFX6-NEXT:    s_min_i32 s16, s17, s162264; GFX6-NEXT:    s_min_i32 s17, s2, 02265; GFX6-NEXT:    s_add_i32 s1, s1, s162266; GFX6-NEXT:    s_max_i32 s16, s2, 02267; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s172268; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162269; GFX6-NEXT:    s_max_i32 s17, s17, s182270; GFX6-NEXT:    s_min_i32 s16, s17, s162271; GFX6-NEXT:    s_min_i32 s17, s3, 02272; GFX6-NEXT:    s_add_i32 s2, s2, s162273; GFX6-NEXT:    s_max_i32 s16, s3, 02274; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s172275; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162276; GFX6-NEXT:    s_max_i32 s17, s17, s192277; GFX6-NEXT:    s_min_i32 s16, s17, s162278; GFX6-NEXT:    s_min_i32 s17, s4, 02279; GFX6-NEXT:    s_add_i32 s3, s3, s162280; GFX6-NEXT:    s_max_i32 s16, s4, 02281; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s172282; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162283; GFX6-NEXT:    s_max_i32 s17, s17, s202284; GFX6-NEXT:    s_min_i32 s16, s17, s162285; GFX6-NEXT:    s_min_i32 s17, s5, 02286; GFX6-NEXT:    s_add_i32 s4, s4, s162287; GFX6-NEXT:    s_max_i32 s16, s5, 02288; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s172289; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162290; GFX6-NEXT:    s_max_i32 s17, s17, s212291; GFX6-NEXT:    s_min_i32 s16, s17, s162292; GFX6-NEXT:    s_min_i32 s17, s6, 02293; GFX6-NEXT:    s_add_i32 s5, s5, s162294; GFX6-NEXT:    s_max_i32 s16, s6, 02295; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s172296; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162297; GFX6-NEXT:    s_max_i32 s17, s17, s222298; GFX6-NEXT:    s_min_i32 s16, s17, s162299; GFX6-NEXT:    s_min_i32 s17, s7, 02300; GFX6-NEXT:    s_add_i32 s6, s6, s162301; GFX6-NEXT:    s_max_i32 s16, s7, 02302; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s172303; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162304; GFX6-NEXT:    s_max_i32 s17, s17, s232305; GFX6-NEXT:    s_min_i32 s16, s17, s162306; GFX6-NEXT:    s_min_i32 s17, s8, 02307; GFX6-NEXT:    s_add_i32 s7, s7, s162308; GFX6-NEXT:    s_max_i32 s16, s8, 02309; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s172310; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162311; GFX6-NEXT:    s_max_i32 s17, s17, s242312; GFX6-NEXT:    s_min_i32 s16, s17, s162313; GFX6-NEXT:    s_min_i32 s17, s9, 02314; GFX6-NEXT:    s_add_i32 s8, s8, s162315; GFX6-NEXT:    s_max_i32 s16, s9, 02316; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s172317; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162318; GFX6-NEXT:    s_max_i32 s17, s17, s252319; GFX6-NEXT:    s_min_i32 s16, s17, s162320; GFX6-NEXT:    s_min_i32 s17, s10, 02321; GFX6-NEXT:    s_add_i32 s9, s9, s162322; GFX6-NEXT:    s_max_i32 s16, s10, 02323; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s172324; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162325; GFX6-NEXT:    s_max_i32 s17, s17, s262326; GFX6-NEXT:    s_min_i32 s16, s17, s162327; GFX6-NEXT:    s_min_i32 s17, s11, 02328; GFX6-NEXT:    s_add_i32 s10, s10, s162329; GFX6-NEXT:    s_max_i32 s16, s11, 02330; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s172331; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162332; GFX6-NEXT:    s_max_i32 s17, s17, s272333; GFX6-NEXT:    s_min_i32 s16, s17, s162334; GFX6-NEXT:    s_min_i32 s17, s12, 02335; GFX6-NEXT:    s_add_i32 s11, s11, s162336; GFX6-NEXT:    s_max_i32 s16, s12, 02337; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s172338; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162339; GFX6-NEXT:    s_max_i32 s17, s17, s282340; GFX6-NEXT:    s_min_i32 s16, s17, s162341; GFX6-NEXT:    s_min_i32 s17, s13, 02342; GFX6-NEXT:    s_add_i32 s12, s12, s162343; GFX6-NEXT:    s_max_i32 s16, s13, 02344; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s172345; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162346; GFX6-NEXT:    s_max_i32 s17, s17, s292347; GFX6-NEXT:    s_min_i32 s16, s17, s162348; GFX6-NEXT:    s_min_i32 s17, s14, 02349; GFX6-NEXT:    s_add_i32 s13, s13, s162350; GFX6-NEXT:    s_max_i32 s16, s14, 02351; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s172352; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162353; GFX6-NEXT:    s_max_i32 s17, s17, s302354; GFX6-NEXT:    s_min_i32 s16, s17, s162355; GFX6-NEXT:    s_min_i32 s17, s15, 02356; GFX6-NEXT:    s_add_i32 s14, s14, s162357; GFX6-NEXT:    s_max_i32 s16, s15, 02358; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s172359; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s162360; GFX6-NEXT:    s_max_i32 s17, s17, s312361; GFX6-NEXT:    s_min_i32 s16, s17, s162362; GFX6-NEXT:    s_add_i32 s15, s15, s162363; GFX6-NEXT:    ; return to shader part epilog2364;2365; GFX8-LABEL: s_saddsat_v16i32:2366; GFX8:       ; %bb.0:2367; GFX8-NEXT:    s_min_i32 s33, s0, 02368; GFX8-NEXT:    s_max_i32 s32, s0, 02369; GFX8-NEXT:    s_sub_i32 s33, 0x80000000, s332370; GFX8-NEXT:    s_sub_i32 s32, 0x7fffffff, s322371; GFX8-NEXT:    s_max_i32 s16, s33, s162372; GFX8-NEXT:    s_min_i32 s16, s16, s322373; GFX8-NEXT:    s_min_i32 s32, s1, 02374; GFX8-NEXT:    s_add_i32 s0, s0, s162375; GFX8-NEXT:    s_max_i32 s16, s1, 02376; GFX8-NEXT:    s_sub_i32 s32, 0x80000000, s322377; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162378; GFX8-NEXT:    s_max_i32 s17, s32, s172379; GFX8-NEXT:    s_min_i32 s16, s17, s162380; GFX8-NEXT:    s_min_i32 s17, s2, 02381; GFX8-NEXT:    s_add_i32 s1, s1, s162382; GFX8-NEXT:    s_max_i32 s16, s2, 02383; GFX8-NEXT:    s_sub_i32 s17, 0x80000000, s172384; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162385; GFX8-NEXT:    s_max_i32 s17, s17, s182386; GFX8-NEXT:    s_min_i32 s16, s17, s162387; GFX8-NEXT:    s_min_i32 s17, s3, 02388; GFX8-NEXT:    s_add_i32 s2, s2, s162389; GFX8-NEXT:    s_max_i32 s16, s3, 02390; GFX8-NEXT:    s_sub_i32 s17, 0x80000000, s172391; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162392; GFX8-NEXT:    s_max_i32 s17, s17, s192393; GFX8-NEXT:    s_min_i32 s16, s17, s162394; GFX8-NEXT:    s_min_i32 s17, s4, 02395; GFX8-NEXT:    s_add_i32 s3, s3, s162396; GFX8-NEXT:    s_max_i32 s16, s4, 02397; GFX8-NEXT:    s_sub_i32 s17, 0x80000000, s172398; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162399; GFX8-NEXT:    s_max_i32 s17, s17, s202400; GFX8-NEXT:    s_min_i32 s16, s17, s162401; GFX8-NEXT:    s_min_i32 s17, s5, 02402; GFX8-NEXT:    s_add_i32 s4, s4, s162403; GFX8-NEXT:    s_max_i32 s16, s5, 02404; GFX8-NEXT:    s_sub_i32 s17, 0x80000000, s172405; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162406; GFX8-NEXT:    s_max_i32 s17, s17, s212407; GFX8-NEXT:    s_min_i32 s16, s17, s162408; GFX8-NEXT:    s_min_i32 s17, s6, 02409; GFX8-NEXT:    s_add_i32 s5, s5, s162410; GFX8-NEXT:    s_max_i32 s16, s6, 02411; GFX8-NEXT:    s_sub_i32 s17, 0x80000000, s172412; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162413; GFX8-NEXT:    s_max_i32 s17, s17, s222414; GFX8-NEXT:    s_min_i32 s16, s17, s162415; GFX8-NEXT:    s_min_i32 s17, s7, 02416; GFX8-NEXT:    s_add_i32 s6, s6, s162417; GFX8-NEXT:    s_max_i32 s16, s7, 02418; GFX8-NEXT:    s_sub_i32 s17, 0x80000000, s172419; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162420; GFX8-NEXT:    s_max_i32 s17, s17, s232421; GFX8-NEXT:    s_min_i32 s16, s17, s162422; GFX8-NEXT:    s_min_i32 s17, s8, 02423; GFX8-NEXT:    s_add_i32 s7, s7, s162424; GFX8-NEXT:    s_max_i32 s16, s8, 02425; GFX8-NEXT:    s_sub_i32 s17, 0x80000000, s172426; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162427; GFX8-NEXT:    s_max_i32 s17, s17, s242428; GFX8-NEXT:    s_min_i32 s16, s17, s162429; GFX8-NEXT:    s_min_i32 s17, s9, 02430; GFX8-NEXT:    s_add_i32 s8, s8, s162431; GFX8-NEXT:    s_max_i32 s16, s9, 02432; GFX8-NEXT:    s_sub_i32 s17, 0x80000000, s172433; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162434; GFX8-NEXT:    s_max_i32 s17, s17, s252435; GFX8-NEXT:    s_min_i32 s16, s17, s162436; GFX8-NEXT:    s_min_i32 s17, s10, 02437; GFX8-NEXT:    s_add_i32 s9, s9, s162438; GFX8-NEXT:    s_max_i32 s16, s10, 02439; GFX8-NEXT:    s_sub_i32 s17, 0x80000000, s172440; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162441; GFX8-NEXT:    s_max_i32 s17, s17, s262442; GFX8-NEXT:    s_min_i32 s16, s17, s162443; GFX8-NEXT:    s_min_i32 s17, s11, 02444; GFX8-NEXT:    s_add_i32 s10, s10, s162445; GFX8-NEXT:    s_max_i32 s16, s11, 02446; GFX8-NEXT:    s_sub_i32 s17, 0x80000000, s172447; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162448; GFX8-NEXT:    s_max_i32 s17, s17, s272449; GFX8-NEXT:    s_min_i32 s16, s17, s162450; GFX8-NEXT:    s_min_i32 s17, s12, 02451; GFX8-NEXT:    s_add_i32 s11, s11, s162452; GFX8-NEXT:    s_max_i32 s16, s12, 02453; GFX8-NEXT:    s_sub_i32 s17, 0x80000000, s172454; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162455; GFX8-NEXT:    s_max_i32 s17, s17, s282456; GFX8-NEXT:    s_min_i32 s16, s17, s162457; GFX8-NEXT:    s_min_i32 s17, s13, 02458; GFX8-NEXT:    s_add_i32 s12, s12, s162459; GFX8-NEXT:    s_max_i32 s16, s13, 02460; GFX8-NEXT:    s_sub_i32 s17, 0x80000000, s172461; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162462; GFX8-NEXT:    s_max_i32 s17, s17, s292463; GFX8-NEXT:    s_min_i32 s16, s17, s162464; GFX8-NEXT:    s_min_i32 s17, s14, 02465; GFX8-NEXT:    s_add_i32 s13, s13, s162466; GFX8-NEXT:    s_max_i32 s16, s14, 02467; GFX8-NEXT:    s_sub_i32 s17, 0x80000000, s172468; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162469; GFX8-NEXT:    s_max_i32 s17, s17, s302470; GFX8-NEXT:    s_min_i32 s16, s17, s162471; GFX8-NEXT:    s_min_i32 s17, s15, 02472; GFX8-NEXT:    s_add_i32 s14, s14, s162473; GFX8-NEXT:    s_max_i32 s16, s15, 02474; GFX8-NEXT:    s_sub_i32 s17, 0x80000000, s172475; GFX8-NEXT:    s_sub_i32 s16, 0x7fffffff, s162476; GFX8-NEXT:    s_max_i32 s17, s17, s312477; GFX8-NEXT:    s_min_i32 s16, s17, s162478; GFX8-NEXT:    s_add_i32 s15, s15, s162479; GFX8-NEXT:    ; return to shader part epilog2480;2481; GFX9-LABEL: s_saddsat_v16i32:2482; GFX9:       ; %bb.0:2483; GFX9-NEXT:    v_mov_b32_e32 v0, s162484; GFX9-NEXT:    v_mov_b32_e32 v1, s172485; GFX9-NEXT:    v_mov_b32_e32 v2, s182486; GFX9-NEXT:    v_mov_b32_e32 v3, s192487; GFX9-NEXT:    v_mov_b32_e32 v4, s202488; GFX9-NEXT:    v_mov_b32_e32 v5, s212489; GFX9-NEXT:    v_mov_b32_e32 v6, s222490; GFX9-NEXT:    v_mov_b32_e32 v7, s232491; GFX9-NEXT:    v_mov_b32_e32 v8, s242492; GFX9-NEXT:    v_mov_b32_e32 v9, s252493; GFX9-NEXT:    v_mov_b32_e32 v10, s262494; GFX9-NEXT:    v_mov_b32_e32 v11, s272495; GFX9-NEXT:    v_mov_b32_e32 v12, s282496; GFX9-NEXT:    v_mov_b32_e32 v13, s292497; GFX9-NEXT:    v_mov_b32_e32 v14, s302498; GFX9-NEXT:    v_mov_b32_e32 v15, s312499; GFX9-NEXT:    v_add_i32 v0, s0, v0 clamp2500; GFX9-NEXT:    v_add_i32 v1, s1, v1 clamp2501; GFX9-NEXT:    v_add_i32 v2, s2, v2 clamp2502; GFX9-NEXT:    v_add_i32 v3, s3, v3 clamp2503; GFX9-NEXT:    v_add_i32 v4, s4, v4 clamp2504; GFX9-NEXT:    v_add_i32 v5, s5, v5 clamp2505; GFX9-NEXT:    v_add_i32 v6, s6, v6 clamp2506; GFX9-NEXT:    v_add_i32 v7, s7, v7 clamp2507; GFX9-NEXT:    v_add_i32 v8, s8, v8 clamp2508; GFX9-NEXT:    v_add_i32 v9, s9, v9 clamp2509; GFX9-NEXT:    v_add_i32 v10, s10, v10 clamp2510; GFX9-NEXT:    v_add_i32 v11, s11, v11 clamp2511; GFX9-NEXT:    v_add_i32 v12, s12, v12 clamp2512; GFX9-NEXT:    v_add_i32 v13, s13, v13 clamp2513; GFX9-NEXT:    v_add_i32 v14, s14, v14 clamp2514; GFX9-NEXT:    v_add_i32 v15, s15, v15 clamp2515; GFX9-NEXT:    v_readfirstlane_b32 s0, v02516; GFX9-NEXT:    v_readfirstlane_b32 s1, v12517; GFX9-NEXT:    v_readfirstlane_b32 s2, v22518; GFX9-NEXT:    v_readfirstlane_b32 s3, v32519; GFX9-NEXT:    v_readfirstlane_b32 s4, v42520; GFX9-NEXT:    v_readfirstlane_b32 s5, v52521; GFX9-NEXT:    v_readfirstlane_b32 s6, v62522; GFX9-NEXT:    v_readfirstlane_b32 s7, v72523; GFX9-NEXT:    v_readfirstlane_b32 s8, v82524; GFX9-NEXT:    v_readfirstlane_b32 s9, v92525; GFX9-NEXT:    v_readfirstlane_b32 s10, v102526; GFX9-NEXT:    v_readfirstlane_b32 s11, v112527; GFX9-NEXT:    v_readfirstlane_b32 s12, v122528; GFX9-NEXT:    v_readfirstlane_b32 s13, v132529; GFX9-NEXT:    v_readfirstlane_b32 s14, v142530; GFX9-NEXT:    v_readfirstlane_b32 s15, v152531; GFX9-NEXT:    ; return to shader part epilog2532;2533; GFX10PLUS-LABEL: s_saddsat_v16i32:2534; GFX10PLUS:       ; %bb.0:2535; GFX10PLUS-NEXT:    v_add_nc_i32 v0, s0, s16 clamp2536; GFX10PLUS-NEXT:    v_add_nc_i32 v1, s1, s17 clamp2537; GFX10PLUS-NEXT:    v_add_nc_i32 v2, s2, s18 clamp2538; GFX10PLUS-NEXT:    v_add_nc_i32 v3, s3, s19 clamp2539; GFX10PLUS-NEXT:    v_add_nc_i32 v4, s4, s20 clamp2540; GFX10PLUS-NEXT:    v_add_nc_i32 v5, s5, s21 clamp2541; GFX10PLUS-NEXT:    v_add_nc_i32 v6, s6, s22 clamp2542; GFX10PLUS-NEXT:    v_add_nc_i32 v7, s7, s23 clamp2543; GFX10PLUS-NEXT:    v_add_nc_i32 v8, s8, s24 clamp2544; GFX10PLUS-NEXT:    v_add_nc_i32 v9, s9, s25 clamp2545; GFX10PLUS-NEXT:    v_add_nc_i32 v10, s10, s26 clamp2546; GFX10PLUS-NEXT:    v_add_nc_i32 v11, s11, s27 clamp2547; GFX10PLUS-NEXT:    v_add_nc_i32 v12, s12, s28 clamp2548; GFX10PLUS-NEXT:    v_add_nc_i32 v13, s13, s29 clamp2549; GFX10PLUS-NEXT:    v_add_nc_i32 v14, s14, s30 clamp2550; GFX10PLUS-NEXT:    v_add_nc_i32 v15, s15, s31 clamp2551; GFX10PLUS-NEXT:    v_readfirstlane_b32 s0, v02552; GFX10PLUS-NEXT:    v_readfirstlane_b32 s1, v12553; GFX10PLUS-NEXT:    v_readfirstlane_b32 s2, v22554; GFX10PLUS-NEXT:    v_readfirstlane_b32 s3, v32555; GFX10PLUS-NEXT:    v_readfirstlane_b32 s4, v42556; GFX10PLUS-NEXT:    v_readfirstlane_b32 s5, v52557; GFX10PLUS-NEXT:    v_readfirstlane_b32 s6, v62558; GFX10PLUS-NEXT:    v_readfirstlane_b32 s7, v72559; GFX10PLUS-NEXT:    v_readfirstlane_b32 s8, v82560; GFX10PLUS-NEXT:    v_readfirstlane_b32 s9, v92561; GFX10PLUS-NEXT:    v_readfirstlane_b32 s10, v102562; GFX10PLUS-NEXT:    v_readfirstlane_b32 s11, v112563; GFX10PLUS-NEXT:    v_readfirstlane_b32 s12, v122564; GFX10PLUS-NEXT:    v_readfirstlane_b32 s13, v132565; GFX10PLUS-NEXT:    v_readfirstlane_b32 s14, v142566; GFX10PLUS-NEXT:    v_readfirstlane_b32 s15, v152567; GFX10PLUS-NEXT:    ; return to shader part epilog2568  %result = call <16 x i32> @llvm.sadd.sat.v16i32(<16 x i32> %lhs, <16 x i32> %rhs)2569  ret <16 x i32> %result2570}2571 2572define i16 @v_saddsat_i16(i16 %lhs, i16 %rhs) {2573; GFX6-LABEL: v_saddsat_i16:2574; GFX6:       ; %bb.0:2575; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2576; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 16, v02577; GFX6-NEXT:    v_min_i32_e32 v3, 0, v02578; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v12579; GFX6-NEXT:    v_max_i32_e32 v2, 0, v02580; GFX6-NEXT:    v_sub_i32_e32 v3, vcc, 0x80000000, v32581; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, 0x7fffffff, v22582; GFX6-NEXT:    v_max_i32_e32 v1, v3, v12583; GFX6-NEXT:    v_min_i32_e32 v1, v1, v22584; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v12585; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 16, v02586; GFX6-NEXT:    s_setpc_b64 s[30:31]2587;2588; GFX8-LABEL: v_saddsat_i16:2589; GFX8:       ; %bb.0:2590; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2591; GFX8-NEXT:    v_min_i16_e32 v3, 0, v02592; GFX8-NEXT:    v_max_i16_e32 v2, 0, v02593; GFX8-NEXT:    v_sub_u16_e32 v3, 0x8000, v32594; GFX8-NEXT:    v_sub_u16_e32 v2, 0x7fff, v22595; GFX8-NEXT:    v_max_i16_e32 v1, v3, v12596; GFX8-NEXT:    v_min_i16_e32 v1, v1, v22597; GFX8-NEXT:    v_add_u16_e32 v0, v0, v12598; GFX8-NEXT:    s_setpc_b64 s[30:31]2599;2600; GFX9-LABEL: v_saddsat_i16:2601; GFX9:       ; %bb.0:2602; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2603; GFX9-NEXT:    v_add_i16 v0, v0, v1 clamp2604; GFX9-NEXT:    s_setpc_b64 s[30:31]2605;2606; GFX10PLUS-LABEL: v_saddsat_i16:2607; GFX10PLUS:       ; %bb.0:2608; GFX10PLUS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2609; GFX10PLUS-NEXT:    v_add_nc_i16 v0, v0, v1 clamp2610; GFX10PLUS-NEXT:    s_setpc_b64 s[30:31]2611  %result = call i16 @llvm.sadd.sat.i16(i16 %lhs, i16 %rhs)2612  ret i16 %result2613}2614 2615define amdgpu_ps i16 @s_saddsat_i16(i16 inreg %lhs, i16 inreg %rhs) {2616; GFX6-LABEL: s_saddsat_i16:2617; GFX6:       ; %bb.0:2618; GFX6-NEXT:    s_lshl_b32 s0, s0, 162619; GFX6-NEXT:    s_min_i32 s3, s0, 02620; GFX6-NEXT:    s_lshl_b32 s1, s1, 162621; GFX6-NEXT:    s_max_i32 s2, s0, 02622; GFX6-NEXT:    s_sub_i32 s3, 0x80000000, s32623; GFX6-NEXT:    s_sub_i32 s2, 0x7fffffff, s22624; GFX6-NEXT:    s_max_i32 s1, s3, s12625; GFX6-NEXT:    s_min_i32 s1, s1, s22626; GFX6-NEXT:    s_add_i32 s0, s0, s12627; GFX6-NEXT:    s_ashr_i32 s0, s0, 162628; GFX6-NEXT:    ; return to shader part epilog2629;2630; GFX8-LABEL: s_saddsat_i16:2631; GFX8:       ; %bb.0:2632; GFX8-NEXT:    s_sext_i32_i16 s2, s02633; GFX8-NEXT:    s_max_i32 s3, s2, 02634; GFX8-NEXT:    s_min_i32 s2, s2, 02635; GFX8-NEXT:    s_sub_i32 s2, 0x8000, s22636; GFX8-NEXT:    s_sext_i32_i16 s2, s22637; GFX8-NEXT:    s_sext_i32_i16 s1, s12638; GFX8-NEXT:    s_sub_i32 s3, 0x7fff, s32639; GFX8-NEXT:    s_max_i32 s1, s2, s12640; GFX8-NEXT:    s_sext_i32_i16 s1, s12641; GFX8-NEXT:    s_sext_i32_i16 s2, s32642; GFX8-NEXT:    s_min_i32 s1, s1, s22643; GFX8-NEXT:    s_add_i32 s0, s0, s12644; GFX8-NEXT:    ; return to shader part epilog2645;2646; GFX9-LABEL: s_saddsat_i16:2647; GFX9:       ; %bb.0:2648; GFX9-NEXT:    v_mov_b32_e32 v0, s12649; GFX9-NEXT:    v_add_i16 v0, s0, v0 clamp2650; GFX9-NEXT:    v_readfirstlane_b32 s0, v02651; GFX9-NEXT:    ; return to shader part epilog2652;2653; GFX10PLUS-LABEL: s_saddsat_i16:2654; GFX10PLUS:       ; %bb.0:2655; GFX10PLUS-NEXT:    v_add_nc_i16 v0, s0, s1 clamp2656; GFX10PLUS-NEXT:    v_readfirstlane_b32 s0, v02657; GFX10PLUS-NEXT:    ; return to shader part epilog2658  %result = call i16 @llvm.sadd.sat.i16(i16 %lhs, i16 %rhs)2659  ret i16 %result2660}2661 2662define amdgpu_ps half @saddsat_i16_sv(i16 inreg %lhs, i16 %rhs) {2663; GFX6-LABEL: saddsat_i16_sv:2664; GFX6:       ; %bb.0:2665; GFX6-NEXT:    s_lshl_b32 s0, s0, 162666; GFX6-NEXT:    s_min_i32 s2, s0, 02667; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 16, v02668; GFX6-NEXT:    s_max_i32 s1, s0, 02669; GFX6-NEXT:    s_sub_i32 s2, 0x80000000, s22670; GFX6-NEXT:    s_sub_i32 s1, 0x7fffffff, s12671; GFX6-NEXT:    v_max_i32_e32 v0, s2, v02672; GFX6-NEXT:    v_min_i32_e32 v0, s1, v02673; GFX6-NEXT:    v_add_i32_e32 v0, vcc, s0, v02674; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 16, v02675; GFX6-NEXT:    ; return to shader part epilog2676;2677; GFX8-LABEL: saddsat_i16_sv:2678; GFX8:       ; %bb.0:2679; GFX8-NEXT:    s_sext_i32_i16 s1, s02680; GFX8-NEXT:    s_max_i32 s2, s1, 02681; GFX8-NEXT:    s_min_i32 s1, s1, 02682; GFX8-NEXT:    s_sub_i32 s1, 0x8000, s12683; GFX8-NEXT:    s_sub_i32 s2, 0x7fff, s22684; GFX8-NEXT:    v_max_i16_e32 v0, s1, v02685; GFX8-NEXT:    v_min_i16_e32 v0, s2, v02686; GFX8-NEXT:    v_add_u16_e32 v0, s0, v02687; GFX8-NEXT:    ; return to shader part epilog2688;2689; GFX9-LABEL: saddsat_i16_sv:2690; GFX9:       ; %bb.0:2691; GFX9-NEXT:    v_add_i16 v0, s0, v0 clamp2692; GFX9-NEXT:    ; return to shader part epilog2693;2694; GFX10PLUS-LABEL: saddsat_i16_sv:2695; GFX10PLUS:       ; %bb.0:2696; GFX10PLUS-NEXT:    v_add_nc_i16 v0, s0, v0 clamp2697; GFX10PLUS-NEXT:    ; return to shader part epilog2698  %result = call i16 @llvm.sadd.sat.i16(i16 %lhs, i16 %rhs)2699  %cast = bitcast i16 %result to half2700  ret half %cast2701}2702 2703define amdgpu_ps half @saddsat_i16_vs(i16 %lhs, i16 inreg %rhs) {2704; GFX6-LABEL: saddsat_i16_vs:2705; GFX6:       ; %bb.0:2706; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 16, v02707; GFX6-NEXT:    v_min_i32_e32 v2, 0, v02708; GFX6-NEXT:    s_lshl_b32 s0, s0, 162709; GFX6-NEXT:    v_max_i32_e32 v1, 0, v02710; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, 0x80000000, v22711; GFX6-NEXT:    v_sub_i32_e32 v1, vcc, 0x7fffffff, v12712; GFX6-NEXT:    v_max_i32_e32 v2, s0, v22713; GFX6-NEXT:    v_min_i32_e32 v1, v2, v12714; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v12715; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 16, v02716; GFX6-NEXT:    ; return to shader part epilog2717;2718; GFX8-LABEL: saddsat_i16_vs:2719; GFX8:       ; %bb.0:2720; GFX8-NEXT:    v_min_i16_e32 v2, 0, v02721; GFX8-NEXT:    v_max_i16_e32 v1, 0, v02722; GFX8-NEXT:    v_sub_u16_e32 v2, 0x8000, v22723; GFX8-NEXT:    v_sub_u16_e32 v1, 0x7fff, v12724; GFX8-NEXT:    v_max_i16_e32 v2, s0, v22725; GFX8-NEXT:    v_min_i16_e32 v1, v2, v12726; GFX8-NEXT:    v_add_u16_e32 v0, v0, v12727; GFX8-NEXT:    ; return to shader part epilog2728;2729; GFX9-LABEL: saddsat_i16_vs:2730; GFX9:       ; %bb.0:2731; GFX9-NEXT:    v_add_i16 v0, v0, s0 clamp2732; GFX9-NEXT:    ; return to shader part epilog2733;2734; GFX10PLUS-LABEL: saddsat_i16_vs:2735; GFX10PLUS:       ; %bb.0:2736; GFX10PLUS-NEXT:    v_add_nc_i16 v0, v0, s0 clamp2737; GFX10PLUS-NEXT:    ; return to shader part epilog2738  %result = call i16 @llvm.sadd.sat.i16(i16 %lhs, i16 %rhs)2739  %cast = bitcast i16 %result to half2740  ret half %cast2741}2742 2743define <2 x i16> @v_saddsat_v2i16(<2 x i16> %lhs, <2 x i16> %rhs) {2744; GFX6-LABEL: v_saddsat_v2i16:2745; GFX6:       ; %bb.0:2746; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2747; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 16, v02748; GFX6-NEXT:    v_min_i32_e32 v5, 0, v02749; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 16, v22750; GFX6-NEXT:    v_max_i32_e32 v4, 0, v02751; GFX6-NEXT:    v_sub_i32_e32 v5, vcc, 0x80000000, v52752; GFX6-NEXT:    v_sub_i32_e32 v4, vcc, 0x7fffffff, v42753; GFX6-NEXT:    v_max_i32_e32 v2, v5, v22754; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v12755; GFX6-NEXT:    v_min_i32_e32 v2, v2, v42756; GFX6-NEXT:    v_min_i32_e32 v4, 0, v12757; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v22758; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 16, v32759; GFX6-NEXT:    v_max_i32_e32 v3, 0, v12760; GFX6-NEXT:    v_sub_i32_e32 v4, vcc, 0x80000000, v42761; GFX6-NEXT:    v_sub_i32_e32 v3, vcc, 0x7fffffff, v32762; GFX6-NEXT:    v_max_i32_e32 v2, v4, v22763; GFX6-NEXT:    v_min_i32_e32 v2, v2, v32764; GFX6-NEXT:    v_add_i32_e32 v1, vcc, v1, v22765; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 16, v02766; GFX6-NEXT:    v_ashrrev_i32_e32 v1, 16, v12767; GFX6-NEXT:    s_setpc_b64 s[30:31]2768;2769; GFX8-LABEL: v_saddsat_v2i16:2770; GFX8:       ; %bb.0:2771; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2772; GFX8-NEXT:    v_min_i16_e32 v3, 0, v02773; GFX8-NEXT:    v_max_i16_e32 v2, 0, v02774; GFX8-NEXT:    v_sub_u16_e32 v3, 0x8000, v32775; GFX8-NEXT:    v_sub_u16_e32 v2, 0x7fff, v22776; GFX8-NEXT:    v_max_i16_e32 v3, v3, v12777; GFX8-NEXT:    v_min_i16_e32 v2, v3, v22778; GFX8-NEXT:    v_mov_b32_e32 v3, 02779; GFX8-NEXT:    v_max_i16_sdwa v4, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2780; GFX8-NEXT:    v_min_i16_sdwa v3, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2781; GFX8-NEXT:    v_sub_u16_e32 v3, 0x8000, v32782; GFX8-NEXT:    v_sub_u16_e32 v4, 0x7fff, v42783; GFX8-NEXT:    v_max_i16_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12784; GFX8-NEXT:    v_min_i16_e32 v1, v1, v42785; GFX8-NEXT:    v_add_u16_e32 v2, v0, v22786; GFX8-NEXT:    v_add_u16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2787; GFX8-NEXT:    v_or_b32_e32 v0, v2, v02788; GFX8-NEXT:    s_setpc_b64 s[30:31]2789;2790; GFX9-LABEL: v_saddsat_v2i16:2791; GFX9:       ; %bb.0:2792; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2793; GFX9-NEXT:    v_pk_add_i16 v0, v0, v1 clamp2794; GFX9-NEXT:    s_setpc_b64 s[30:31]2795;2796; GFX10PLUS-LABEL: v_saddsat_v2i16:2797; GFX10PLUS:       ; %bb.0:2798; GFX10PLUS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2799; GFX10PLUS-NEXT:    v_pk_add_i16 v0, v0, v1 clamp2800; GFX10PLUS-NEXT:    s_setpc_b64 s[30:31]2801  %result = call <2 x i16> @llvm.sadd.sat.v2i16(<2 x i16> %lhs, <2 x i16> %rhs)2802  ret <2 x i16> %result2803}2804 2805define amdgpu_ps i32 @s_saddsat_v2i16(<2 x i16> inreg %lhs, <2 x i16> inreg %rhs) {2806; GFX6-LABEL: s_saddsat_v2i16:2807; GFX6:       ; %bb.0:2808; GFX6-NEXT:    s_lshl_b32 s0, s0, 162809; GFX6-NEXT:    s_min_i32 s5, s0, 02810; GFX6-NEXT:    s_lshl_b32 s2, s2, 162811; GFX6-NEXT:    s_max_i32 s4, s0, 02812; GFX6-NEXT:    s_sub_i32 s5, 0x80000000, s52813; GFX6-NEXT:    s_sub_i32 s4, 0x7fffffff, s42814; GFX6-NEXT:    s_max_i32 s2, s5, s22815; GFX6-NEXT:    s_lshl_b32 s1, s1, 162816; GFX6-NEXT:    s_min_i32 s2, s2, s42817; GFX6-NEXT:    s_min_i32 s4, s1, 02818; GFX6-NEXT:    s_add_i32 s0, s0, s22819; GFX6-NEXT:    s_lshl_b32 s2, s3, 162820; GFX6-NEXT:    s_max_i32 s3, s1, 02821; GFX6-NEXT:    s_sub_i32 s4, 0x80000000, s42822; GFX6-NEXT:    s_sub_i32 s3, 0x7fffffff, s32823; GFX6-NEXT:    s_max_i32 s2, s4, s22824; GFX6-NEXT:    s_min_i32 s2, s2, s32825; GFX6-NEXT:    s_add_i32 s1, s1, s22826; GFX6-NEXT:    s_ashr_i32 s1, s1, 162827; GFX6-NEXT:    s_ashr_i32 s0, s0, 162828; GFX6-NEXT:    s_and_b32 s1, s1, 0xffff2829; GFX6-NEXT:    s_and_b32 s0, s0, 0xffff2830; GFX6-NEXT:    s_lshl_b32 s1, s1, 162831; GFX6-NEXT:    s_or_b32 s0, s0, s12832; GFX6-NEXT:    ; return to shader part epilog2833;2834; GFX8-LABEL: s_saddsat_v2i16:2835; GFX8:       ; %bb.0:2836; GFX8-NEXT:    s_sext_i32_i16 s4, s02837; GFX8-NEXT:    s_max_i32 s5, s4, 02838; GFX8-NEXT:    s_min_i32 s4, s4, 02839; GFX8-NEXT:    s_sub_i32 s4, 0x8000, s42840; GFX8-NEXT:    s_lshr_b32 s3, s1, 162841; GFX8-NEXT:    s_sext_i32_i16 s4, s42842; GFX8-NEXT:    s_sext_i32_i16 s1, s12843; GFX8-NEXT:    s_sub_i32 s5, 0x7fff, s52844; GFX8-NEXT:    s_max_i32 s1, s4, s12845; GFX8-NEXT:    s_sext_i32_i16 s1, s12846; GFX8-NEXT:    s_sext_i32_i16 s4, s52847; GFX8-NEXT:    s_lshr_b32 s2, s0, 162848; GFX8-NEXT:    s_min_i32 s1, s1, s42849; GFX8-NEXT:    s_add_i32 s0, s0, s12850; GFX8-NEXT:    s_sext_i32_i16 s1, s22851; GFX8-NEXT:    s_max_i32 s4, s1, 02852; GFX8-NEXT:    s_min_i32 s1, s1, 02853; GFX8-NEXT:    s_sub_i32 s1, 0x8000, s12854; GFX8-NEXT:    s_sext_i32_i16 s1, s12855; GFX8-NEXT:    s_sext_i32_i16 s3, s32856; GFX8-NEXT:    s_sub_i32 s4, 0x7fff, s42857; GFX8-NEXT:    s_max_i32 s1, s1, s32858; GFX8-NEXT:    s_sext_i32_i16 s1, s12859; GFX8-NEXT:    s_sext_i32_i16 s3, s42860; GFX8-NEXT:    s_min_i32 s1, s1, s32861; GFX8-NEXT:    s_add_i32 s2, s2, s12862; GFX8-NEXT:    s_and_b32 s1, 0xffff, s22863; GFX8-NEXT:    s_and_b32 s0, 0xffff, s02864; GFX8-NEXT:    s_lshl_b32 s1, s1, 162865; GFX8-NEXT:    s_or_b32 s0, s0, s12866; GFX8-NEXT:    ; return to shader part epilog2867;2868; GFX9-LABEL: s_saddsat_v2i16:2869; GFX9:       ; %bb.0:2870; GFX9-NEXT:    v_mov_b32_e32 v0, s12871; GFX9-NEXT:    v_pk_add_i16 v0, s0, v0 clamp2872; GFX9-NEXT:    v_readfirstlane_b32 s0, v02873; GFX9-NEXT:    ; return to shader part epilog2874;2875; GFX10PLUS-LABEL: s_saddsat_v2i16:2876; GFX10PLUS:       ; %bb.0:2877; GFX10PLUS-NEXT:    v_pk_add_i16 v0, s0, s1 clamp2878; GFX10PLUS-NEXT:    v_readfirstlane_b32 s0, v02879; GFX10PLUS-NEXT:    ; return to shader part epilog2880  %result = call <2 x i16> @llvm.sadd.sat.v2i16(<2 x i16> %lhs, <2 x i16> %rhs)2881  %cast = bitcast <2 x i16> %result to i322882  ret i32 %cast2883}2884 2885define amdgpu_ps float @saddsat_v2i16_sv(<2 x i16> inreg %lhs, <2 x i16> %rhs) {2886; GFX6-LABEL: saddsat_v2i16_sv:2887; GFX6:       ; %bb.0:2888; GFX6-NEXT:    s_lshl_b32 s0, s0, 162889; GFX6-NEXT:    s_min_i32 s3, s0, 02890; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 16, v02891; GFX6-NEXT:    s_max_i32 s2, s0, 02892; GFX6-NEXT:    s_sub_i32 s3, 0x80000000, s32893; GFX6-NEXT:    s_sub_i32 s2, 0x7fffffff, s22894; GFX6-NEXT:    v_max_i32_e32 v0, s3, v02895; GFX6-NEXT:    v_min_i32_e32 v0, s2, v02896; GFX6-NEXT:    v_add_i32_e32 v0, vcc, s0, v02897; GFX6-NEXT:    s_lshl_b32 s0, s1, 162898; GFX6-NEXT:    s_min_i32 s2, s0, 02899; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v12900; GFX6-NEXT:    s_max_i32 s1, s0, 02901; GFX6-NEXT:    s_sub_i32 s2, 0x80000000, s22902; GFX6-NEXT:    s_sub_i32 s1, 0x7fffffff, s12903; GFX6-NEXT:    v_max_i32_e32 v1, s2, v12904; GFX6-NEXT:    v_min_i32_e32 v1, s1, v12905; GFX6-NEXT:    v_add_i32_e32 v1, vcc, s0, v12906; GFX6-NEXT:    v_ashrrev_i32_e32 v1, 16, v12907; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 16, v02908; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v12909; GFX6-NEXT:    v_and_b32_e32 v0, 0xffff, v02910; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v12911; GFX6-NEXT:    v_or_b32_e32 v0, v0, v12912; GFX6-NEXT:    ; return to shader part epilog2913;2914; GFX8-LABEL: saddsat_v2i16_sv:2915; GFX8:       ; %bb.0:2916; GFX8-NEXT:    s_sext_i32_i16 s2, s02917; GFX8-NEXT:    s_max_i32 s3, s2, 02918; GFX8-NEXT:    s_min_i32 s2, s2, 02919; GFX8-NEXT:    s_lshr_b32 s1, s0, 162920; GFX8-NEXT:    s_sub_i32 s2, 0x8000, s22921; GFX8-NEXT:    s_sub_i32 s3, 0x7fff, s32922; GFX8-NEXT:    v_max_i16_e32 v1, s2, v02923; GFX8-NEXT:    s_sext_i32_i16 s2, s12924; GFX8-NEXT:    v_min_i16_e32 v1, s3, v12925; GFX8-NEXT:    s_max_i32 s3, s2, 02926; GFX8-NEXT:    s_min_i32 s2, s2, 02927; GFX8-NEXT:    s_sub_i32 s2, 0x8000, s22928; GFX8-NEXT:    v_mov_b32_e32 v2, s22929; GFX8-NEXT:    s_sub_i32 s3, 0x7fff, s32930; GFX8-NEXT:    v_max_i16_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12931; GFX8-NEXT:    v_min_i16_e32 v0, s3, v02932; GFX8-NEXT:    v_mov_b32_e32 v2, s12933; GFX8-NEXT:    v_add_u16_e32 v1, s0, v12934; GFX8-NEXT:    v_add_u16_sdwa v0, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD2935; GFX8-NEXT:    v_or_b32_e32 v0, v1, v02936; GFX8-NEXT:    ; return to shader part epilog2937;2938; GFX9-LABEL: saddsat_v2i16_sv:2939; GFX9:       ; %bb.0:2940; GFX9-NEXT:    v_pk_add_i16 v0, s0, v0 clamp2941; GFX9-NEXT:    ; return to shader part epilog2942;2943; GFX10PLUS-LABEL: saddsat_v2i16_sv:2944; GFX10PLUS:       ; %bb.0:2945; GFX10PLUS-NEXT:    v_pk_add_i16 v0, s0, v0 clamp2946; GFX10PLUS-NEXT:    ; return to shader part epilog2947  %result = call <2 x i16> @llvm.sadd.sat.v2i16(<2 x i16> %lhs, <2 x i16> %rhs)2948  %cast = bitcast <2 x i16> %result to float2949  ret float %cast2950}2951 2952define amdgpu_ps float @saddsat_v2i16_vs(<2 x i16> %lhs, <2 x i16> inreg %rhs) {2953; GFX6-LABEL: saddsat_v2i16_vs:2954; GFX6:       ; %bb.0:2955; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 16, v02956; GFX6-NEXT:    v_min_i32_e32 v4, 0, v02957; GFX6-NEXT:    v_bfrev_b32_e32 v5, 12958; GFX6-NEXT:    s_lshl_b32 s0, s0, 162959; GFX6-NEXT:    v_max_i32_e32 v2, 0, v02960; GFX6-NEXT:    v_sub_i32_e32 v4, vcc, v5, v42961; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, 0x7fffffff, v22962; GFX6-NEXT:    v_max_i32_e32 v4, s0, v42963; GFX6-NEXT:    v_min_i32_e32 v2, v4, v22964; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v12965; GFX6-NEXT:    v_bfrev_b32_e32 v3, -22966; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v22967; GFX6-NEXT:    v_max_i32_e32 v2, 0, v12968; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, v3, v22969; GFX6-NEXT:    v_min_i32_e32 v3, 0, v12970; GFX6-NEXT:    s_lshl_b32 s0, s1, 162971; GFX6-NEXT:    v_sub_i32_e32 v3, vcc, 0x80000000, v32972; GFX6-NEXT:    v_max_i32_e32 v3, s0, v32973; GFX6-NEXT:    v_min_i32_e32 v2, v3, v22974; GFX6-NEXT:    v_add_i32_e32 v1, vcc, v1, v22975; GFX6-NEXT:    v_ashrrev_i32_e32 v1, 16, v12976; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 16, v02977; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v12978; GFX6-NEXT:    v_and_b32_e32 v0, 0xffff, v02979; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v12980; GFX6-NEXT:    v_or_b32_e32 v0, v0, v12981; GFX6-NEXT:    ; return to shader part epilog2982;2983; GFX8-LABEL: saddsat_v2i16_vs:2984; GFX8:       ; %bb.0:2985; GFX8-NEXT:    v_min_i16_e32 v2, 0, v02986; GFX8-NEXT:    v_max_i16_e32 v1, 0, v02987; GFX8-NEXT:    v_sub_u16_e32 v2, 0x8000, v22988; GFX8-NEXT:    v_sub_u16_e32 v1, 0x7fff, v12989; GFX8-NEXT:    v_max_i16_e32 v2, s0, v22990; GFX8-NEXT:    v_min_i16_e32 v1, v2, v12991; GFX8-NEXT:    v_mov_b32_e32 v2, 02992; GFX8-NEXT:    v_max_i16_sdwa v3, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2993; GFX8-NEXT:    v_min_i16_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2994; GFX8-NEXT:    s_lshr_b32 s1, s0, 162995; GFX8-NEXT:    v_sub_u16_e32 v2, 0x8000, v22996; GFX8-NEXT:    v_sub_u16_e32 v3, 0x7fff, v32997; GFX8-NEXT:    v_max_i16_e32 v2, s1, v22998; GFX8-NEXT:    v_min_i16_e32 v2, v2, v32999; GFX8-NEXT:    v_add_u16_e32 v1, v0, v13000; GFX8-NEXT:    v_add_u16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3001; GFX8-NEXT:    v_or_b32_e32 v0, v1, v03002; GFX8-NEXT:    ; return to shader part epilog3003;3004; GFX9-LABEL: saddsat_v2i16_vs:3005; GFX9:       ; %bb.0:3006; GFX9-NEXT:    v_pk_add_i16 v0, v0, s0 clamp3007; GFX9-NEXT:    ; return to shader part epilog3008;3009; GFX10PLUS-LABEL: saddsat_v2i16_vs:3010; GFX10PLUS:       ; %bb.0:3011; GFX10PLUS-NEXT:    v_pk_add_i16 v0, v0, s0 clamp3012; GFX10PLUS-NEXT:    ; return to shader part epilog3013  %result = call <2 x i16> @llvm.sadd.sat.v2i16(<2 x i16> %lhs, <2 x i16> %rhs)3014  %cast = bitcast <2 x i16> %result to float3015  ret float %cast3016}3017 3018; FIXME: v3i16 insert/extract3019; define <3 x i16> @v_saddsat_v3i16(<3 x i16> %lhs, <3 x i16> %rhs) {3020;   %result = call <3 x i16> @llvm.sadd.sat.v3i16(<3 x i16> %lhs, <3 x i16> %rhs)3021;   ret <3 x i16> %result3022; }3023 3024; define amdgpu_ps <3 x i16> @s_saddsat_v3i16(<3 x i16> inreg %lhs, <3 x i16> inreg %rhs) {3025;   %result = call <3 x i16> @llvm.sadd.sat.v3i16(<3 x i16> %lhs, <3 x i16> %rhs)3026;   ret <3 x i16> %result3027; }3028 3029define <2 x float> @v_saddsat_v4i16(<4 x i16> %lhs, <4 x i16> %rhs) {3030; GFX6-LABEL: v_saddsat_v4i16:3031; GFX6:       ; %bb.0:3032; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3033; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 16, v03034; GFX6-NEXT:    v_min_i32_e32 v10, 0, v03035; GFX6-NEXT:    v_bfrev_b32_e32 v11, 13036; GFX6-NEXT:    v_lshlrev_b32_e32 v4, 16, v43037; GFX6-NEXT:    v_max_i32_e32 v8, 0, v03038; GFX6-NEXT:    v_sub_i32_e32 v10, vcc, v11, v103039; GFX6-NEXT:    v_sub_i32_e32 v8, vcc, 0x7fffffff, v83040; GFX6-NEXT:    v_max_i32_e32 v4, v10, v43041; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v13042; GFX6-NEXT:    v_min_i32_e32 v4, v4, v83043; GFX6-NEXT:    v_min_i32_e32 v8, 0, v13044; GFX6-NEXT:    v_bfrev_b32_e32 v9, -23045; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v43046; GFX6-NEXT:    v_lshlrev_b32_e32 v4, 16, v53047; GFX6-NEXT:    v_max_i32_e32 v5, 0, v13048; GFX6-NEXT:    v_sub_i32_e32 v8, vcc, v11, v83049; GFX6-NEXT:    v_sub_i32_e32 v5, vcc, v9, v53050; GFX6-NEXT:    v_max_i32_e32 v4, v8, v43051; GFX6-NEXT:    v_min_i32_e32 v4, v4, v53052; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 16, v23053; GFX6-NEXT:    v_add_i32_e32 v1, vcc, v1, v43054; GFX6-NEXT:    v_lshlrev_b32_e32 v4, 16, v63055; GFX6-NEXT:    v_min_i32_e32 v6, 0, v23056; GFX6-NEXT:    v_max_i32_e32 v5, 0, v23057; GFX6-NEXT:    v_sub_i32_e32 v6, vcc, v11, v63058; GFX6-NEXT:    v_sub_i32_e32 v5, vcc, v9, v53059; GFX6-NEXT:    v_max_i32_e32 v4, v6, v43060; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 16, v33061; GFX6-NEXT:    v_min_i32_e32 v4, v4, v53062; GFX6-NEXT:    v_min_i32_e32 v6, 0, v33063; GFX6-NEXT:    v_add_i32_e32 v2, vcc, v2, v43064; GFX6-NEXT:    v_lshlrev_b32_e32 v4, 16, v73065; GFX6-NEXT:    v_max_i32_e32 v5, 0, v33066; GFX6-NEXT:    v_sub_i32_e32 v6, vcc, v11, v63067; GFX6-NEXT:    v_sub_i32_e32 v5, vcc, v9, v53068; GFX6-NEXT:    v_max_i32_e32 v4, v6, v43069; GFX6-NEXT:    v_ashrrev_i32_e32 v1, 16, v13070; GFX6-NEXT:    v_min_i32_e32 v4, v4, v53071; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 16, v03072; GFX6-NEXT:    v_add_i32_e32 v3, vcc, v3, v43073; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v13074; GFX6-NEXT:    v_ashrrev_i32_e32 v2, 16, v23075; GFX6-NEXT:    v_ashrrev_i32_e32 v3, 16, v33076; GFX6-NEXT:    v_and_b32_e32 v0, 0xffff, v03077; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v13078; GFX6-NEXT:    v_or_b32_e32 v0, v0, v13079; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v23080; GFX6-NEXT:    v_and_b32_e32 v2, 0xffff, v33081; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 16, v23082; GFX6-NEXT:    v_or_b32_e32 v1, v1, v23083; GFX6-NEXT:    s_setpc_b64 s[30:31]3084;3085; GFX8-LABEL: v_saddsat_v4i16:3086; GFX8:       ; %bb.0:3087; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3088; GFX8-NEXT:    v_min_i16_e32 v5, 0, v03089; GFX8-NEXT:    v_max_i16_e32 v4, 0, v03090; GFX8-NEXT:    v_sub_u16_e32 v5, 0x8000, v53091; GFX8-NEXT:    v_sub_u16_e32 v4, 0x7fff, v43092; GFX8-NEXT:    v_max_i16_e32 v5, v5, v23093; GFX8-NEXT:    v_min_i16_e32 v4, v5, v43094; GFX8-NEXT:    v_mov_b32_e32 v5, 03095; GFX8-NEXT:    v_min_i16_sdwa v7, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3096; GFX8-NEXT:    v_max_i16_sdwa v6, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3097; GFX8-NEXT:    v_sub_u16_e32 v7, 0x8000, v73098; GFX8-NEXT:    v_sub_u16_e32 v6, 0x7fff, v63099; GFX8-NEXT:    v_max_i16_sdwa v2, v7, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13100; GFX8-NEXT:    v_min_i16_e32 v7, 0, v13101; GFX8-NEXT:    v_min_i16_e32 v2, v2, v63102; GFX8-NEXT:    v_max_i16_e32 v6, 0, v13103; GFX8-NEXT:    v_sub_u16_e32 v7, 0x8000, v73104; GFX8-NEXT:    v_sub_u16_e32 v6, 0x7fff, v63105; GFX8-NEXT:    v_max_i16_e32 v7, v7, v33106; GFX8-NEXT:    v_min_i16_e32 v6, v7, v63107; GFX8-NEXT:    v_max_i16_sdwa v7, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3108; GFX8-NEXT:    v_min_i16_sdwa v5, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3109; GFX8-NEXT:    v_sub_u16_e32 v5, 0x8000, v53110; GFX8-NEXT:    v_sub_u16_e32 v7, 0x7fff, v73111; GFX8-NEXT:    v_max_i16_sdwa v3, v5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13112; GFX8-NEXT:    v_min_i16_e32 v3, v3, v73113; GFX8-NEXT:    v_add_u16_e32 v4, v0, v43114; GFX8-NEXT:    v_add_u16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3115; GFX8-NEXT:    v_add_u16_e32 v2, v1, v63116; GFX8-NEXT:    v_add_u16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3117; GFX8-NEXT:    v_or_b32_e32 v0, v4, v03118; GFX8-NEXT:    v_or_b32_e32 v1, v2, v13119; GFX8-NEXT:    s_setpc_b64 s[30:31]3120;3121; GFX9-LABEL: v_saddsat_v4i16:3122; GFX9:       ; %bb.0:3123; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3124; GFX9-NEXT:    v_pk_add_i16 v0, v0, v2 clamp3125; GFX9-NEXT:    v_pk_add_i16 v1, v1, v3 clamp3126; GFX9-NEXT:    s_setpc_b64 s[30:31]3127;3128; GFX10PLUS-LABEL: v_saddsat_v4i16:3129; GFX10PLUS:       ; %bb.0:3130; GFX10PLUS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3131; GFX10PLUS-NEXT:    v_pk_add_i16 v0, v0, v2 clamp3132; GFX10PLUS-NEXT:    v_pk_add_i16 v1, v1, v3 clamp3133; GFX10PLUS-NEXT:    s_setpc_b64 s[30:31]3134  %result = call <4 x i16> @llvm.sadd.sat.v4i16(<4 x i16> %lhs, <4 x i16> %rhs)3135  %cast = bitcast <4 x i16> %result to <2 x float>3136  ret <2 x float> %cast3137}3138 3139define amdgpu_ps <2 x i32> @s_saddsat_v4i16(<4 x i16> inreg %lhs, <4 x i16> inreg %rhs) {3140; GFX6-LABEL: s_saddsat_v4i16:3141; GFX6:       ; %bb.0:3142; GFX6-NEXT:    s_lshl_b32 s0, s0, 163143; GFX6-NEXT:    s_min_i32 s9, s0, 03144; GFX6-NEXT:    s_lshl_b32 s4, s4, 163145; GFX6-NEXT:    s_max_i32 s8, s0, 03146; GFX6-NEXT:    s_sub_i32 s9, 0x80000000, s93147; GFX6-NEXT:    s_sub_i32 s8, 0x7fffffff, s83148; GFX6-NEXT:    s_max_i32 s4, s9, s43149; GFX6-NEXT:    s_lshl_b32 s1, s1, 163150; GFX6-NEXT:    s_min_i32 s4, s4, s83151; GFX6-NEXT:    s_min_i32 s8, s1, 03152; GFX6-NEXT:    s_add_i32 s0, s0, s43153; GFX6-NEXT:    s_lshl_b32 s4, s5, 163154; GFX6-NEXT:    s_max_i32 s5, s1, 03155; GFX6-NEXT:    s_sub_i32 s8, 0x80000000, s83156; GFX6-NEXT:    s_sub_i32 s5, 0x7fffffff, s53157; GFX6-NEXT:    s_max_i32 s4, s8, s43158; GFX6-NEXT:    s_min_i32 s4, s4, s53159; GFX6-NEXT:    s_lshl_b32 s2, s2, 163160; GFX6-NEXT:    s_add_i32 s1, s1, s43161; GFX6-NEXT:    s_lshl_b32 s4, s6, 163162; GFX6-NEXT:    s_min_i32 s6, s2, 03163; GFX6-NEXT:    s_max_i32 s5, s2, 03164; GFX6-NEXT:    s_sub_i32 s6, 0x80000000, s63165; GFX6-NEXT:    s_sub_i32 s5, 0x7fffffff, s53166; GFX6-NEXT:    s_max_i32 s4, s6, s43167; GFX6-NEXT:    s_lshl_b32 s3, s3, 163168; GFX6-NEXT:    s_min_i32 s4, s4, s53169; GFX6-NEXT:    s_min_i32 s6, s3, 03170; GFX6-NEXT:    s_add_i32 s2, s2, s43171; GFX6-NEXT:    s_lshl_b32 s4, s7, 163172; GFX6-NEXT:    s_max_i32 s5, s3, 03173; GFX6-NEXT:    s_sub_i32 s6, 0x80000000, s63174; GFX6-NEXT:    s_sub_i32 s5, 0x7fffffff, s53175; GFX6-NEXT:    s_max_i32 s4, s6, s43176; GFX6-NEXT:    s_ashr_i32 s1, s1, 163177; GFX6-NEXT:    s_min_i32 s4, s4, s53178; GFX6-NEXT:    s_ashr_i32 s0, s0, 163179; GFX6-NEXT:    s_add_i32 s3, s3, s43180; GFX6-NEXT:    s_and_b32 s1, s1, 0xffff3181; GFX6-NEXT:    s_ashr_i32 s2, s2, 163182; GFX6-NEXT:    s_ashr_i32 s3, s3, 163183; GFX6-NEXT:    s_and_b32 s0, s0, 0xffff3184; GFX6-NEXT:    s_lshl_b32 s1, s1, 163185; GFX6-NEXT:    s_or_b32 s0, s0, s13186; GFX6-NEXT:    s_and_b32 s1, s2, 0xffff3187; GFX6-NEXT:    s_and_b32 s2, s3, 0xffff3188; GFX6-NEXT:    s_lshl_b32 s2, s2, 163189; GFX6-NEXT:    s_or_b32 s1, s1, s23190; GFX6-NEXT:    ; return to shader part epilog3191;3192; GFX8-LABEL: s_saddsat_v4i16:3193; GFX8:       ; %bb.0:3194; GFX8-NEXT:    s_sext_i32_i16 s8, s03195; GFX8-NEXT:    s_max_i32 s9, s8, 03196; GFX8-NEXT:    s_min_i32 s8, s8, 03197; GFX8-NEXT:    s_sub_i32 s8, 0x8000, s83198; GFX8-NEXT:    s_lshr_b32 s6, s2, 163199; GFX8-NEXT:    s_sext_i32_i16 s8, s83200; GFX8-NEXT:    s_sext_i32_i16 s2, s23201; GFX8-NEXT:    s_sub_i32 s9, 0x7fff, s93202; GFX8-NEXT:    s_max_i32 s2, s8, s23203; GFX8-NEXT:    s_sext_i32_i16 s2, s23204; GFX8-NEXT:    s_sext_i32_i16 s8, s93205; GFX8-NEXT:    s_lshr_b32 s4, s0, 163206; GFX8-NEXT:    s_min_i32 s2, s2, s83207; GFX8-NEXT:    s_add_i32 s0, s0, s23208; GFX8-NEXT:    s_sext_i32_i16 s2, s43209; GFX8-NEXT:    s_max_i32 s8, s2, 03210; GFX8-NEXT:    s_min_i32 s2, s2, 03211; GFX8-NEXT:    s_sub_i32 s2, 0x8000, s23212; GFX8-NEXT:    s_sext_i32_i16 s2, s23213; GFX8-NEXT:    s_sext_i32_i16 s6, s63214; GFX8-NEXT:    s_sub_i32 s8, 0x7fff, s83215; GFX8-NEXT:    s_max_i32 s2, s2, s63216; GFX8-NEXT:    s_sext_i32_i16 s2, s23217; GFX8-NEXT:    s_sext_i32_i16 s6, s83218; GFX8-NEXT:    s_min_i32 s2, s2, s63219; GFX8-NEXT:    s_add_i32 s4, s4, s23220; GFX8-NEXT:    s_sext_i32_i16 s2, s13221; GFX8-NEXT:    s_max_i32 s6, s2, 03222; GFX8-NEXT:    s_min_i32 s2, s2, 03223; GFX8-NEXT:    s_sub_i32 s2, 0x8000, s23224; GFX8-NEXT:    s_lshr_b32 s7, s3, 163225; GFX8-NEXT:    s_sext_i32_i16 s2, s23226; GFX8-NEXT:    s_sext_i32_i16 s3, s33227; GFX8-NEXT:    s_sub_i32 s6, 0x7fff, s63228; GFX8-NEXT:    s_max_i32 s2, s2, s33229; GFX8-NEXT:    s_sext_i32_i16 s2, s23230; GFX8-NEXT:    s_sext_i32_i16 s3, s63231; GFX8-NEXT:    s_lshr_b32 s5, s1, 163232; GFX8-NEXT:    s_min_i32 s2, s2, s33233; GFX8-NEXT:    s_add_i32 s1, s1, s23234; GFX8-NEXT:    s_sext_i32_i16 s2, s53235; GFX8-NEXT:    s_max_i32 s3, s2, 03236; GFX8-NEXT:    s_min_i32 s2, s2, 03237; GFX8-NEXT:    s_sub_i32 s2, 0x8000, s23238; GFX8-NEXT:    s_sext_i32_i16 s2, s23239; GFX8-NEXT:    s_sext_i32_i16 s6, s73240; GFX8-NEXT:    s_sub_i32 s3, 0x7fff, s33241; GFX8-NEXT:    s_max_i32 s2, s2, s63242; GFX8-NEXT:    s_sext_i32_i16 s2, s23243; GFX8-NEXT:    s_sext_i32_i16 s3, s33244; GFX8-NEXT:    s_min_i32 s2, s2, s33245; GFX8-NEXT:    s_add_i32 s5, s5, s23246; GFX8-NEXT:    s_and_b32 s2, 0xffff, s43247; GFX8-NEXT:    s_and_b32 s0, 0xffff, s03248; GFX8-NEXT:    s_lshl_b32 s2, s2, 163249; GFX8-NEXT:    s_or_b32 s0, s0, s23250; GFX8-NEXT:    s_and_b32 s2, 0xffff, s53251; GFX8-NEXT:    s_and_b32 s1, 0xffff, s13252; GFX8-NEXT:    s_lshl_b32 s2, s2, 163253; GFX8-NEXT:    s_or_b32 s1, s1, s23254; GFX8-NEXT:    ; return to shader part epilog3255;3256; GFX9-LABEL: s_saddsat_v4i16:3257; GFX9:       ; %bb.0:3258; GFX9-NEXT:    v_mov_b32_e32 v0, s23259; GFX9-NEXT:    v_mov_b32_e32 v1, s33260; GFX9-NEXT:    v_pk_add_i16 v0, s0, v0 clamp3261; GFX9-NEXT:    v_pk_add_i16 v1, s1, v1 clamp3262; GFX9-NEXT:    v_readfirstlane_b32 s0, v03263; GFX9-NEXT:    v_readfirstlane_b32 s1, v13264; GFX9-NEXT:    ; return to shader part epilog3265;3266; GFX10PLUS-LABEL: s_saddsat_v4i16:3267; GFX10PLUS:       ; %bb.0:3268; GFX10PLUS-NEXT:    v_pk_add_i16 v0, s0, s2 clamp3269; GFX10PLUS-NEXT:    v_pk_add_i16 v1, s1, s3 clamp3270; GFX10PLUS-NEXT:    v_readfirstlane_b32 s0, v03271; GFX10PLUS-NEXT:    v_readfirstlane_b32 s1, v13272; GFX10PLUS-NEXT:    ; return to shader part epilog3273  %result = call <4 x i16> @llvm.sadd.sat.v4i16(<4 x i16> %lhs, <4 x i16> %rhs)3274  %cast = bitcast <4 x i16> %result to <2 x i32>3275  ret <2 x i32> %cast3276}3277 3278; FIXME3279; define <5 x i16> @v_saddsat_v5i16(<5 x i16> %lhs, <5 x i16> %rhs) {3280;   %result = call <5 x i16> @llvm.sadd.sat.v5i16(<5 x i16> %lhs, <5 x i16> %rhs)3281;   ret <5 x i16> %result3282; }3283 3284; define amdgpu_ps <5 x i16> @s_saddsat_v5i16(<5 x i16> inreg %lhs, <5 x i16> inreg %rhs) {3285;   %result = call <5 x i16> @llvm.sadd.sat.v5i16(<5 x i16> %lhs, <5 x i16> %rhs)3286;   ret <5 x i16> %result3287; }3288 3289define <3 x float> @v_saddsat_v6i16(<6 x i16> %lhs, <6 x i16> %rhs) {3290; GFX6-LABEL: v_saddsat_v6i16:3291; GFX6:       ; %bb.0:3292; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3293; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 16, v03294; GFX6-NEXT:    v_min_i32_e32 v14, 0, v03295; GFX6-NEXT:    v_bfrev_b32_e32 v15, 13296; GFX6-NEXT:    v_lshlrev_b32_e32 v6, 16, v63297; GFX6-NEXT:    v_max_i32_e32 v12, 0, v03298; GFX6-NEXT:    v_sub_i32_e32 v14, vcc, v15, v143299; GFX6-NEXT:    v_sub_i32_e32 v12, vcc, 0x7fffffff, v123300; GFX6-NEXT:    v_max_i32_e32 v6, v14, v63301; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v13302; GFX6-NEXT:    v_min_i32_e32 v6, v6, v123303; GFX6-NEXT:    v_min_i32_e32 v12, 0, v13304; GFX6-NEXT:    v_bfrev_b32_e32 v13, -23305; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v63306; GFX6-NEXT:    v_lshlrev_b32_e32 v6, 16, v73307; GFX6-NEXT:    v_max_i32_e32 v7, 0, v13308; GFX6-NEXT:    v_sub_i32_e32 v12, vcc, v15, v123309; GFX6-NEXT:    v_sub_i32_e32 v7, vcc, v13, v73310; GFX6-NEXT:    v_max_i32_e32 v6, v12, v63311; GFX6-NEXT:    v_min_i32_e32 v6, v6, v73312; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 16, v23313; GFX6-NEXT:    v_add_i32_e32 v1, vcc, v1, v63314; GFX6-NEXT:    v_lshlrev_b32_e32 v6, 16, v83315; GFX6-NEXT:    v_min_i32_e32 v8, 0, v23316; GFX6-NEXT:    v_max_i32_e32 v7, 0, v23317; GFX6-NEXT:    v_sub_i32_e32 v8, vcc, v15, v83318; GFX6-NEXT:    v_sub_i32_e32 v7, vcc, v13, v73319; GFX6-NEXT:    v_max_i32_e32 v6, v8, v63320; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 16, v33321; GFX6-NEXT:    v_min_i32_e32 v6, v6, v73322; GFX6-NEXT:    v_min_i32_e32 v8, 0, v33323; GFX6-NEXT:    v_add_i32_e32 v2, vcc, v2, v63324; GFX6-NEXT:    v_lshlrev_b32_e32 v6, 16, v93325; GFX6-NEXT:    v_max_i32_e32 v7, 0, v33326; GFX6-NEXT:    v_sub_i32_e32 v8, vcc, v15, v83327; GFX6-NEXT:    v_sub_i32_e32 v7, vcc, v13, v73328; GFX6-NEXT:    v_max_i32_e32 v6, v8, v63329; GFX6-NEXT:    v_lshlrev_b32_e32 v4, 16, v43330; GFX6-NEXT:    v_min_i32_e32 v6, v6, v73331; GFX6-NEXT:    v_min_i32_e32 v8, 0, v43332; GFX6-NEXT:    v_add_i32_e32 v3, vcc, v3, v63333; GFX6-NEXT:    v_lshlrev_b32_e32 v6, 16, v103334; GFX6-NEXT:    v_max_i32_e32 v7, 0, v43335; GFX6-NEXT:    v_sub_i32_e32 v8, vcc, v15, v83336; GFX6-NEXT:    v_sub_i32_e32 v7, vcc, v13, v73337; GFX6-NEXT:    v_max_i32_e32 v6, v8, v63338; GFX6-NEXT:    v_lshlrev_b32_e32 v5, 16, v53339; GFX6-NEXT:    v_min_i32_e32 v6, v6, v73340; GFX6-NEXT:    v_min_i32_e32 v8, 0, v53341; GFX6-NEXT:    v_add_i32_e32 v4, vcc, v4, v63342; GFX6-NEXT:    v_lshlrev_b32_e32 v6, 16, v113343; GFX6-NEXT:    v_max_i32_e32 v7, 0, v53344; GFX6-NEXT:    v_sub_i32_e32 v8, vcc, v15, v83345; GFX6-NEXT:    v_ashrrev_i32_e32 v1, 16, v13346; GFX6-NEXT:    v_sub_i32_e32 v7, vcc, v13, v73347; GFX6-NEXT:    v_max_i32_e32 v6, v8, v63348; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 16, v03349; GFX6-NEXT:    v_min_i32_e32 v6, v6, v73350; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v13351; GFX6-NEXT:    v_ashrrev_i32_e32 v2, 16, v23352; GFX6-NEXT:    v_ashrrev_i32_e32 v3, 16, v33353; GFX6-NEXT:    v_add_i32_e32 v5, vcc, v5, v63354; GFX6-NEXT:    v_and_b32_e32 v0, 0xffff, v03355; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v13356; GFX6-NEXT:    v_ashrrev_i32_e32 v5, 16, v53357; GFX6-NEXT:    v_or_b32_e32 v0, v0, v13358; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v23359; GFX6-NEXT:    v_and_b32_e32 v2, 0xffff, v33360; GFX6-NEXT:    v_ashrrev_i32_e32 v4, 16, v43361; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 16, v23362; GFX6-NEXT:    v_and_b32_e32 v3, 0xffff, v53363; GFX6-NEXT:    v_or_b32_e32 v1, v1, v23364; GFX6-NEXT:    v_and_b32_e32 v2, 0xffff, v43365; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 16, v33366; GFX6-NEXT:    v_or_b32_e32 v2, v2, v33367; GFX6-NEXT:    s_setpc_b64 s[30:31]3368;3369; GFX8-LABEL: v_saddsat_v6i16:3370; GFX8:       ; %bb.0:3371; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3372; GFX8-NEXT:    v_min_i16_e32 v7, 0, v03373; GFX8-NEXT:    v_max_i16_e32 v6, 0, v03374; GFX8-NEXT:    v_sub_u16_e32 v7, 0x8000, v73375; GFX8-NEXT:    v_sub_u16_e32 v6, 0x7fff, v63376; GFX8-NEXT:    v_max_i16_e32 v7, v7, v33377; GFX8-NEXT:    v_min_i16_e32 v6, v7, v63378; GFX8-NEXT:    v_mov_b32_e32 v7, 03379; GFX8-NEXT:    v_min_i16_sdwa v9, v0, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3380; GFX8-NEXT:    v_max_i16_sdwa v8, v0, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3381; GFX8-NEXT:    v_sub_u16_e32 v9, 0x8000, v93382; GFX8-NEXT:    v_sub_u16_e32 v8, 0x7fff, v83383; GFX8-NEXT:    v_max_i16_sdwa v3, v9, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13384; GFX8-NEXT:    v_min_i16_e32 v9, 0, v13385; GFX8-NEXT:    v_min_i16_e32 v3, v3, v83386; GFX8-NEXT:    v_max_i16_e32 v8, 0, v13387; GFX8-NEXT:    v_sub_u16_e32 v9, 0x8000, v93388; GFX8-NEXT:    v_sub_u16_e32 v8, 0x7fff, v83389; GFX8-NEXT:    v_max_i16_e32 v9, v9, v43390; GFX8-NEXT:    v_min_i16_sdwa v10, v1, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3391; GFX8-NEXT:    v_min_i16_e32 v8, v9, v83392; GFX8-NEXT:    v_max_i16_sdwa v9, v1, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3393; GFX8-NEXT:    v_sub_u16_e32 v10, 0x8000, v103394; GFX8-NEXT:    v_sub_u16_e32 v9, 0x7fff, v93395; GFX8-NEXT:    v_max_i16_sdwa v4, v10, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13396; GFX8-NEXT:    v_min_i16_e32 v10, 0, v23397; GFX8-NEXT:    v_min_i16_e32 v4, v4, v93398; GFX8-NEXT:    v_max_i16_e32 v9, 0, v23399; GFX8-NEXT:    v_sub_u16_e32 v10, 0x8000, v103400; GFX8-NEXT:    v_sub_u16_e32 v9, 0x7fff, v93401; GFX8-NEXT:    v_max_i16_e32 v10, v10, v53402; GFX8-NEXT:    v_min_i16_e32 v9, v10, v93403; GFX8-NEXT:    v_max_i16_sdwa v10, v2, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3404; GFX8-NEXT:    v_min_i16_sdwa v7, v2, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3405; GFX8-NEXT:    v_sub_u16_e32 v7, 0x8000, v73406; GFX8-NEXT:    v_sub_u16_e32 v10, 0x7fff, v103407; GFX8-NEXT:    v_max_i16_sdwa v5, v7, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13408; GFX8-NEXT:    v_min_i16_e32 v5, v5, v103409; GFX8-NEXT:    v_add_u16_e32 v6, v0, v63410; GFX8-NEXT:    v_add_u16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3411; GFX8-NEXT:    v_add_u16_e32 v3, v1, v83412; GFX8-NEXT:    v_add_u16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3413; GFX8-NEXT:    v_or_b32_e32 v1, v3, v13414; GFX8-NEXT:    v_add_u16_e32 v3, v2, v93415; GFX8-NEXT:    v_add_u16_sdwa v2, v2, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3416; GFX8-NEXT:    v_or_b32_e32 v0, v6, v03417; GFX8-NEXT:    v_or_b32_e32 v2, v3, v23418; GFX8-NEXT:    s_setpc_b64 s[30:31]3419;3420; GFX9-LABEL: v_saddsat_v6i16:3421; GFX9:       ; %bb.0:3422; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3423; GFX9-NEXT:    v_pk_add_i16 v0, v0, v3 clamp3424; GFX9-NEXT:    v_pk_add_i16 v1, v1, v4 clamp3425; GFX9-NEXT:    v_pk_add_i16 v2, v2, v5 clamp3426; GFX9-NEXT:    s_setpc_b64 s[30:31]3427;3428; GFX10PLUS-LABEL: v_saddsat_v6i16:3429; GFX10PLUS:       ; %bb.0:3430; GFX10PLUS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3431; GFX10PLUS-NEXT:    v_pk_add_i16 v0, v0, v3 clamp3432; GFX10PLUS-NEXT:    v_pk_add_i16 v1, v1, v4 clamp3433; GFX10PLUS-NEXT:    v_pk_add_i16 v2, v2, v5 clamp3434; GFX10PLUS-NEXT:    s_setpc_b64 s[30:31]3435  %result = call <6 x i16> @llvm.sadd.sat.v6i16(<6 x i16> %lhs, <6 x i16> %rhs)3436  %cast = bitcast <6 x i16> %result to <3 x float>3437  ret <3 x float> %cast3438}3439 3440define amdgpu_ps <3 x i32> @s_saddsat_v6i16(<6 x i16> inreg %lhs, <6 x i16> inreg %rhs) {3441; GFX6-LABEL: s_saddsat_v6i16:3442; GFX6:       ; %bb.0:3443; GFX6-NEXT:    s_lshl_b32 s0, s0, 163444; GFX6-NEXT:    s_min_i32 s13, s0, 03445; GFX6-NEXT:    s_lshl_b32 s6, s6, 163446; GFX6-NEXT:    s_max_i32 s12, s0, 03447; GFX6-NEXT:    s_sub_i32 s13, 0x80000000, s133448; GFX6-NEXT:    s_sub_i32 s12, 0x7fffffff, s123449; GFX6-NEXT:    s_max_i32 s6, s13, s63450; GFX6-NEXT:    s_lshl_b32 s1, s1, 163451; GFX6-NEXT:    s_min_i32 s6, s6, s123452; GFX6-NEXT:    s_min_i32 s12, s1, 03453; GFX6-NEXT:    s_add_i32 s0, s0, s63454; GFX6-NEXT:    s_lshl_b32 s6, s7, 163455; GFX6-NEXT:    s_max_i32 s7, s1, 03456; GFX6-NEXT:    s_sub_i32 s12, 0x80000000, s123457; GFX6-NEXT:    s_sub_i32 s7, 0x7fffffff, s73458; GFX6-NEXT:    s_max_i32 s6, s12, s63459; GFX6-NEXT:    s_min_i32 s6, s6, s73460; GFX6-NEXT:    s_lshl_b32 s2, s2, 163461; GFX6-NEXT:    s_add_i32 s1, s1, s63462; GFX6-NEXT:    s_lshl_b32 s6, s8, 163463; GFX6-NEXT:    s_min_i32 s8, s2, 03464; GFX6-NEXT:    s_max_i32 s7, s2, 03465; GFX6-NEXT:    s_sub_i32 s8, 0x80000000, s83466; GFX6-NEXT:    s_sub_i32 s7, 0x7fffffff, s73467; GFX6-NEXT:    s_max_i32 s6, s8, s63468; GFX6-NEXT:    s_lshl_b32 s3, s3, 163469; GFX6-NEXT:    s_min_i32 s6, s6, s73470; GFX6-NEXT:    s_min_i32 s8, s3, 03471; GFX6-NEXT:    s_add_i32 s2, s2, s63472; GFX6-NEXT:    s_lshl_b32 s6, s9, 163473; GFX6-NEXT:    s_max_i32 s7, s3, 03474; GFX6-NEXT:    s_sub_i32 s8, 0x80000000, s83475; GFX6-NEXT:    s_sub_i32 s7, 0x7fffffff, s73476; GFX6-NEXT:    s_max_i32 s6, s8, s63477; GFX6-NEXT:    s_lshl_b32 s4, s4, 163478; GFX6-NEXT:    s_min_i32 s6, s6, s73479; GFX6-NEXT:    s_min_i32 s8, s4, 03480; GFX6-NEXT:    s_add_i32 s3, s3, s63481; GFX6-NEXT:    s_lshl_b32 s6, s10, 163482; GFX6-NEXT:    s_max_i32 s7, s4, 03483; GFX6-NEXT:    s_sub_i32 s8, 0x80000000, s83484; GFX6-NEXT:    s_sub_i32 s7, 0x7fffffff, s73485; GFX6-NEXT:    s_max_i32 s6, s8, s63486; GFX6-NEXT:    s_lshl_b32 s5, s5, 163487; GFX6-NEXT:    s_min_i32 s6, s6, s73488; GFX6-NEXT:    s_min_i32 s8, s5, 03489; GFX6-NEXT:    s_add_i32 s4, s4, s63490; GFX6-NEXT:    s_lshl_b32 s6, s11, 163491; GFX6-NEXT:    s_max_i32 s7, s5, 03492; GFX6-NEXT:    s_sub_i32 s8, 0x80000000, s83493; GFX6-NEXT:    s_ashr_i32 s1, s1, 163494; GFX6-NEXT:    s_sub_i32 s7, 0x7fffffff, s73495; GFX6-NEXT:    s_max_i32 s6, s8, s63496; GFX6-NEXT:    s_ashr_i32 s0, s0, 163497; GFX6-NEXT:    s_min_i32 s6, s6, s73498; GFX6-NEXT:    s_and_b32 s1, s1, 0xffff3499; GFX6-NEXT:    s_ashr_i32 s2, s2, 163500; GFX6-NEXT:    s_ashr_i32 s3, s3, 163501; GFX6-NEXT:    s_add_i32 s5, s5, s63502; GFX6-NEXT:    s_and_b32 s0, s0, 0xffff3503; GFX6-NEXT:    s_lshl_b32 s1, s1, 163504; GFX6-NEXT:    s_ashr_i32 s5, s5, 163505; GFX6-NEXT:    s_or_b32 s0, s0, s13506; GFX6-NEXT:    s_and_b32 s1, s2, 0xffff3507; GFX6-NEXT:    s_and_b32 s2, s3, 0xffff3508; GFX6-NEXT:    s_ashr_i32 s4, s4, 163509; GFX6-NEXT:    s_lshl_b32 s2, s2, 163510; GFX6-NEXT:    s_and_b32 s3, s5, 0xffff3511; GFX6-NEXT:    s_or_b32 s1, s1, s23512; GFX6-NEXT:    s_and_b32 s2, s4, 0xffff3513; GFX6-NEXT:    s_lshl_b32 s3, s3, 163514; GFX6-NEXT:    s_or_b32 s2, s2, s33515; GFX6-NEXT:    ; return to shader part epilog3516;3517; GFX8-LABEL: s_saddsat_v6i16:3518; GFX8:       ; %bb.0:3519; GFX8-NEXT:    s_sext_i32_i16 s12, s03520; GFX8-NEXT:    s_max_i32 s13, s12, 03521; GFX8-NEXT:    s_min_i32 s12, s12, 03522; GFX8-NEXT:    s_sub_i32 s12, 0x8000, s123523; GFX8-NEXT:    s_lshr_b32 s9, s3, 163524; GFX8-NEXT:    s_sext_i32_i16 s12, s123525; GFX8-NEXT:    s_sext_i32_i16 s3, s33526; GFX8-NEXT:    s_sub_i32 s13, 0x7fff, s133527; GFX8-NEXT:    s_max_i32 s3, s12, s33528; GFX8-NEXT:    s_sext_i32_i16 s3, s33529; GFX8-NEXT:    s_sext_i32_i16 s12, s133530; GFX8-NEXT:    s_lshr_b32 s6, s0, 163531; GFX8-NEXT:    s_min_i32 s3, s3, s123532; GFX8-NEXT:    s_add_i32 s0, s0, s33533; GFX8-NEXT:    s_sext_i32_i16 s3, s63534; GFX8-NEXT:    s_max_i32 s12, s3, 03535; GFX8-NEXT:    s_min_i32 s3, s3, 03536; GFX8-NEXT:    s_sub_i32 s3, 0x8000, s33537; GFX8-NEXT:    s_sext_i32_i16 s3, s33538; GFX8-NEXT:    s_sext_i32_i16 s9, s93539; GFX8-NEXT:    s_sub_i32 s12, 0x7fff, s123540; GFX8-NEXT:    s_max_i32 s3, s3, s93541; GFX8-NEXT:    s_sext_i32_i16 s3, s33542; GFX8-NEXT:    s_sext_i32_i16 s9, s123543; GFX8-NEXT:    s_min_i32 s3, s3, s93544; GFX8-NEXT:    s_add_i32 s6, s6, s33545; GFX8-NEXT:    s_sext_i32_i16 s3, s13546; GFX8-NEXT:    s_max_i32 s9, s3, 03547; GFX8-NEXT:    s_min_i32 s3, s3, 03548; GFX8-NEXT:    s_sub_i32 s3, 0x8000, s33549; GFX8-NEXT:    s_lshr_b32 s10, s4, 163550; GFX8-NEXT:    s_sext_i32_i16 s3, s33551; GFX8-NEXT:    s_sext_i32_i16 s4, s43552; GFX8-NEXT:    s_sub_i32 s9, 0x7fff, s93553; GFX8-NEXT:    s_max_i32 s3, s3, s43554; GFX8-NEXT:    s_sext_i32_i16 s3, s33555; GFX8-NEXT:    s_sext_i32_i16 s4, s93556; GFX8-NEXT:    s_lshr_b32 s7, s1, 163557; GFX8-NEXT:    s_min_i32 s3, s3, s43558; GFX8-NEXT:    s_add_i32 s1, s1, s33559; GFX8-NEXT:    s_sext_i32_i16 s3, s73560; GFX8-NEXT:    s_max_i32 s4, s3, 03561; GFX8-NEXT:    s_min_i32 s3, s3, 03562; GFX8-NEXT:    s_sub_i32 s3, 0x8000, s33563; GFX8-NEXT:    s_sext_i32_i16 s3, s33564; GFX8-NEXT:    s_sext_i32_i16 s9, s103565; GFX8-NEXT:    s_sub_i32 s4, 0x7fff, s43566; GFX8-NEXT:    s_max_i32 s3, s3, s93567; GFX8-NEXT:    s_sext_i32_i16 s3, s33568; GFX8-NEXT:    s_sext_i32_i16 s4, s43569; GFX8-NEXT:    s_min_i32 s3, s3, s43570; GFX8-NEXT:    s_add_i32 s7, s7, s33571; GFX8-NEXT:    s_sext_i32_i16 s3, s23572; GFX8-NEXT:    s_max_i32 s4, s3, 03573; GFX8-NEXT:    s_min_i32 s3, s3, 03574; GFX8-NEXT:    s_sub_i32 s3, 0x8000, s33575; GFX8-NEXT:    s_lshr_b32 s11, s5, 163576; GFX8-NEXT:    s_sext_i32_i16 s3, s33577; GFX8-NEXT:    s_sext_i32_i16 s5, s53578; GFX8-NEXT:    s_sub_i32 s4, 0x7fff, s43579; GFX8-NEXT:    s_max_i32 s3, s3, s53580; GFX8-NEXT:    s_sext_i32_i16 s3, s33581; GFX8-NEXT:    s_sext_i32_i16 s4, s43582; GFX8-NEXT:    s_lshr_b32 s8, s2, 163583; GFX8-NEXT:    s_min_i32 s3, s3, s43584; GFX8-NEXT:    s_add_i32 s2, s2, s33585; GFX8-NEXT:    s_sext_i32_i16 s3, s83586; GFX8-NEXT:    s_max_i32 s4, s3, 03587; GFX8-NEXT:    s_min_i32 s3, s3, 03588; GFX8-NEXT:    s_sub_i32 s3, 0x8000, s33589; GFX8-NEXT:    s_sext_i32_i16 s3, s33590; GFX8-NEXT:    s_sext_i32_i16 s5, s113591; GFX8-NEXT:    s_sub_i32 s4, 0x7fff, s43592; GFX8-NEXT:    s_max_i32 s3, s3, s53593; GFX8-NEXT:    s_sext_i32_i16 s3, s33594; GFX8-NEXT:    s_sext_i32_i16 s4, s43595; GFX8-NEXT:    s_min_i32 s3, s3, s43596; GFX8-NEXT:    s_add_i32 s8, s8, s33597; GFX8-NEXT:    s_and_b32 s3, 0xffff, s63598; GFX8-NEXT:    s_and_b32 s0, 0xffff, s03599; GFX8-NEXT:    s_lshl_b32 s3, s3, 163600; GFX8-NEXT:    s_or_b32 s0, s0, s33601; GFX8-NEXT:    s_and_b32 s3, 0xffff, s73602; GFX8-NEXT:    s_and_b32 s1, 0xffff, s13603; GFX8-NEXT:    s_lshl_b32 s3, s3, 163604; GFX8-NEXT:    s_or_b32 s1, s1, s33605; GFX8-NEXT:    s_and_b32 s3, 0xffff, s83606; GFX8-NEXT:    s_and_b32 s2, 0xffff, s23607; GFX8-NEXT:    s_lshl_b32 s3, s3, 163608; GFX8-NEXT:    s_or_b32 s2, s2, s33609; GFX8-NEXT:    ; return to shader part epilog3610;3611; GFX9-LABEL: s_saddsat_v6i16:3612; GFX9:       ; %bb.0:3613; GFX9-NEXT:    v_mov_b32_e32 v0, s33614; GFX9-NEXT:    v_mov_b32_e32 v1, s43615; GFX9-NEXT:    v_mov_b32_e32 v2, s53616; GFX9-NEXT:    v_pk_add_i16 v0, s0, v0 clamp3617; GFX9-NEXT:    v_pk_add_i16 v1, s1, v1 clamp3618; GFX9-NEXT:    v_pk_add_i16 v2, s2, v2 clamp3619; GFX9-NEXT:    v_readfirstlane_b32 s0, v03620; GFX9-NEXT:    v_readfirstlane_b32 s1, v13621; GFX9-NEXT:    v_readfirstlane_b32 s2, v23622; GFX9-NEXT:    ; return to shader part epilog3623;3624; GFX10PLUS-LABEL: s_saddsat_v6i16:3625; GFX10PLUS:       ; %bb.0:3626; GFX10PLUS-NEXT:    v_pk_add_i16 v0, s0, s3 clamp3627; GFX10PLUS-NEXT:    v_pk_add_i16 v1, s1, s4 clamp3628; GFX10PLUS-NEXT:    v_pk_add_i16 v2, s2, s5 clamp3629; GFX10PLUS-NEXT:    v_readfirstlane_b32 s0, v03630; GFX10PLUS-NEXT:    v_readfirstlane_b32 s1, v13631; GFX10PLUS-NEXT:    v_readfirstlane_b32 s2, v23632; GFX10PLUS-NEXT:    ; return to shader part epilog3633  %result = call <6 x i16> @llvm.sadd.sat.v6i16(<6 x i16> %lhs, <6 x i16> %rhs)3634  %cast = bitcast <6 x i16> %result to <3 x i32>3635  ret <3 x i32> %cast3636}3637 3638define <4 x float> @v_saddsat_v8i16(<8 x i16> %lhs, <8 x i16> %rhs) {3639; GFX6-LABEL: v_saddsat_v8i16:3640; GFX6:       ; %bb.0:3641; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3642; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 16, v03643; GFX6-NEXT:    v_min_i32_e32 v18, 0, v03644; GFX6-NEXT:    v_bfrev_b32_e32 v19, 13645; GFX6-NEXT:    v_lshlrev_b32_e32 v8, 16, v83646; GFX6-NEXT:    v_max_i32_e32 v16, 0, v03647; GFX6-NEXT:    v_bfrev_b32_e32 v17, -23648; GFX6-NEXT:    v_sub_i32_e32 v18, vcc, v19, v183649; GFX6-NEXT:    v_sub_i32_e32 v16, vcc, v17, v163650; GFX6-NEXT:    v_max_i32_e32 v8, v18, v83651; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v13652; GFX6-NEXT:    v_min_i32_e32 v8, v8, v163653; GFX6-NEXT:    v_min_i32_e32 v16, 0, v13654; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v83655; GFX6-NEXT:    v_lshlrev_b32_e32 v8, 16, v93656; GFX6-NEXT:    v_max_i32_e32 v9, 0, v13657; GFX6-NEXT:    v_sub_i32_e32 v16, vcc, v19, v163658; GFX6-NEXT:    v_sub_i32_e32 v9, vcc, v17, v93659; GFX6-NEXT:    v_max_i32_e32 v8, v16, v83660; GFX6-NEXT:    v_min_i32_e32 v8, v8, v93661; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 16, v23662; GFX6-NEXT:    v_add_i32_e32 v1, vcc, v1, v83663; GFX6-NEXT:    v_lshlrev_b32_e32 v8, 16, v103664; GFX6-NEXT:    v_min_i32_e32 v10, 0, v23665; GFX6-NEXT:    v_max_i32_e32 v9, 0, v23666; GFX6-NEXT:    v_sub_i32_e32 v10, vcc, v19, v103667; GFX6-NEXT:    v_sub_i32_e32 v9, vcc, v17, v93668; GFX6-NEXT:    v_max_i32_e32 v8, v10, v83669; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 16, v33670; GFX6-NEXT:    v_min_i32_e32 v8, v8, v93671; GFX6-NEXT:    v_min_i32_e32 v10, 0, v33672; GFX6-NEXT:    v_add_i32_e32 v2, vcc, v2, v83673; GFX6-NEXT:    v_lshlrev_b32_e32 v8, 16, v113674; GFX6-NEXT:    v_max_i32_e32 v9, 0, v33675; GFX6-NEXT:    v_sub_i32_e32 v10, vcc, v19, v103676; GFX6-NEXT:    v_sub_i32_e32 v9, vcc, v17, v93677; GFX6-NEXT:    v_max_i32_e32 v8, v10, v83678; GFX6-NEXT:    v_lshlrev_b32_e32 v4, 16, v43679; GFX6-NEXT:    v_min_i32_e32 v8, v8, v93680; GFX6-NEXT:    v_min_i32_e32 v10, 0, v43681; GFX6-NEXT:    v_add_i32_e32 v3, vcc, v3, v83682; GFX6-NEXT:    v_lshlrev_b32_e32 v8, 16, v123683; GFX6-NEXT:    v_max_i32_e32 v9, 0, v43684; GFX6-NEXT:    v_sub_i32_e32 v10, vcc, v19, v103685; GFX6-NEXT:    v_sub_i32_e32 v9, vcc, v17, v93686; GFX6-NEXT:    v_max_i32_e32 v8, v10, v83687; GFX6-NEXT:    v_lshlrev_b32_e32 v5, 16, v53688; GFX6-NEXT:    v_min_i32_e32 v8, v8, v93689; GFX6-NEXT:    v_min_i32_e32 v10, 0, v53690; GFX6-NEXT:    v_add_i32_e32 v4, vcc, v4, v83691; GFX6-NEXT:    v_lshlrev_b32_e32 v8, 16, v133692; GFX6-NEXT:    v_max_i32_e32 v9, 0, v53693; GFX6-NEXT:    v_sub_i32_e32 v10, vcc, v19, v103694; GFX6-NEXT:    v_sub_i32_e32 v9, vcc, v17, v93695; GFX6-NEXT:    v_max_i32_e32 v8, v10, v83696; GFX6-NEXT:    v_lshlrev_b32_e32 v6, 16, v63697; GFX6-NEXT:    v_min_i32_e32 v8, v8, v93698; GFX6-NEXT:    v_min_i32_e32 v10, 0, v63699; GFX6-NEXT:    v_add_i32_e32 v5, vcc, v5, v83700; GFX6-NEXT:    v_lshlrev_b32_e32 v8, 16, v143701; GFX6-NEXT:    v_max_i32_e32 v9, 0, v63702; GFX6-NEXT:    v_sub_i32_e32 v10, vcc, v19, v103703; GFX6-NEXT:    v_sub_i32_e32 v9, vcc, v17, v93704; GFX6-NEXT:    v_max_i32_e32 v8, v10, v83705; GFX6-NEXT:    v_lshlrev_b32_e32 v7, 16, v73706; GFX6-NEXT:    v_min_i32_e32 v8, v8, v93707; GFX6-NEXT:    v_min_i32_e32 v10, 0, v73708; GFX6-NEXT:    v_ashrrev_i32_e32 v1, 16, v13709; GFX6-NEXT:    v_add_i32_e32 v6, vcc, v6, v83710; GFX6-NEXT:    v_lshlrev_b32_e32 v8, 16, v153711; GFX6-NEXT:    v_max_i32_e32 v9, 0, v73712; GFX6-NEXT:    v_sub_i32_e32 v10, vcc, v19, v103713; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 16, v03714; GFX6-NEXT:    v_sub_i32_e32 v9, vcc, v17, v93715; GFX6-NEXT:    v_max_i32_e32 v8, v10, v83716; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v13717; GFX6-NEXT:    v_ashrrev_i32_e32 v2, 16, v23718; GFX6-NEXT:    v_ashrrev_i32_e32 v3, 16, v33719; GFX6-NEXT:    v_min_i32_e32 v8, v8, v93720; GFX6-NEXT:    v_and_b32_e32 v0, 0xffff, v03721; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v13722; GFX6-NEXT:    v_ashrrev_i32_e32 v5, 16, v53723; GFX6-NEXT:    v_add_i32_e32 v7, vcc, v7, v83724; GFX6-NEXT:    v_or_b32_e32 v0, v0, v13725; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v23726; GFX6-NEXT:    v_and_b32_e32 v2, 0xffff, v33727; GFX6-NEXT:    v_ashrrev_i32_e32 v4, 16, v43728; GFX6-NEXT:    v_ashrrev_i32_e32 v7, 16, v73729; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 16, v23730; GFX6-NEXT:    v_and_b32_e32 v3, 0xffff, v53731; GFX6-NEXT:    v_ashrrev_i32_e32 v6, 16, v63732; GFX6-NEXT:    v_or_b32_e32 v1, v1, v23733; GFX6-NEXT:    v_and_b32_e32 v2, 0xffff, v43734; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 16, v33735; GFX6-NEXT:    v_and_b32_e32 v4, 0xffff, v73736; GFX6-NEXT:    v_or_b32_e32 v2, v2, v33737; GFX6-NEXT:    v_and_b32_e32 v3, 0xffff, v63738; GFX6-NEXT:    v_lshlrev_b32_e32 v4, 16, v43739; GFX6-NEXT:    v_or_b32_e32 v3, v3, v43740; GFX6-NEXT:    s_setpc_b64 s[30:31]3741;3742; GFX8-LABEL: v_saddsat_v8i16:3743; GFX8:       ; %bb.0:3744; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3745; GFX8-NEXT:    v_min_i16_e32 v9, 0, v03746; GFX8-NEXT:    v_max_i16_e32 v8, 0, v03747; GFX8-NEXT:    v_sub_u16_e32 v9, 0x8000, v93748; GFX8-NEXT:    v_sub_u16_e32 v8, 0x7fff, v83749; GFX8-NEXT:    v_max_i16_e32 v9, v9, v43750; GFX8-NEXT:    v_min_i16_e32 v8, v9, v83751; GFX8-NEXT:    v_mov_b32_e32 v9, 03752; GFX8-NEXT:    v_min_i16_sdwa v11, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3753; GFX8-NEXT:    v_max_i16_sdwa v10, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3754; GFX8-NEXT:    v_sub_u16_e32 v11, 0x8000, v113755; GFX8-NEXT:    v_sub_u16_e32 v10, 0x7fff, v103756; GFX8-NEXT:    v_max_i16_sdwa v4, v11, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13757; GFX8-NEXT:    v_min_i16_e32 v11, 0, v13758; GFX8-NEXT:    v_min_i16_e32 v4, v4, v103759; GFX8-NEXT:    v_max_i16_e32 v10, 0, v13760; GFX8-NEXT:    v_sub_u16_e32 v11, 0x8000, v113761; GFX8-NEXT:    v_sub_u16_e32 v10, 0x7fff, v103762; GFX8-NEXT:    v_max_i16_e32 v11, v11, v53763; GFX8-NEXT:    v_min_i16_sdwa v12, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3764; GFX8-NEXT:    v_min_i16_e32 v10, v11, v103765; GFX8-NEXT:    v_max_i16_sdwa v11, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3766; GFX8-NEXT:    v_sub_u16_e32 v12, 0x8000, v123767; GFX8-NEXT:    v_sub_u16_e32 v11, 0x7fff, v113768; GFX8-NEXT:    v_max_i16_sdwa v5, v12, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13769; GFX8-NEXT:    v_min_i16_e32 v12, 0, v23770; GFX8-NEXT:    v_min_i16_e32 v5, v5, v113771; GFX8-NEXT:    v_max_i16_e32 v11, 0, v23772; GFX8-NEXT:    v_sub_u16_e32 v12, 0x8000, v123773; GFX8-NEXT:    v_sub_u16_e32 v11, 0x7fff, v113774; GFX8-NEXT:    v_max_i16_e32 v12, v12, v63775; GFX8-NEXT:    v_min_i16_sdwa v13, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3776; GFX8-NEXT:    v_min_i16_e32 v11, v12, v113777; GFX8-NEXT:    v_max_i16_sdwa v12, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3778; GFX8-NEXT:    v_sub_u16_e32 v13, 0x8000, v133779; GFX8-NEXT:    v_sub_u16_e32 v12, 0x7fff, v123780; GFX8-NEXT:    v_max_i16_sdwa v6, v13, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13781; GFX8-NEXT:    v_min_i16_e32 v13, 0, v33782; GFX8-NEXT:    v_min_i16_e32 v6, v6, v123783; GFX8-NEXT:    v_max_i16_e32 v12, 0, v33784; GFX8-NEXT:    v_sub_u16_e32 v13, 0x8000, v133785; GFX8-NEXT:    v_sub_u16_e32 v12, 0x7fff, v123786; GFX8-NEXT:    v_max_i16_e32 v13, v13, v73787; GFX8-NEXT:    v_min_i16_e32 v12, v13, v123788; GFX8-NEXT:    v_max_i16_sdwa v13, v3, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3789; GFX8-NEXT:    v_min_i16_sdwa v9, v3, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3790; GFX8-NEXT:    v_sub_u16_e32 v9, 0x8000, v93791; GFX8-NEXT:    v_sub_u16_e32 v13, 0x7fff, v133792; GFX8-NEXT:    v_max_i16_sdwa v7, v9, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13793; GFX8-NEXT:    v_add_u16_e32 v8, v0, v83794; GFX8-NEXT:    v_add_u16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3795; GFX8-NEXT:    v_add_u16_e32 v4, v1, v103796; GFX8-NEXT:    v_add_u16_sdwa v1, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3797; GFX8-NEXT:    v_min_i16_e32 v7, v7, v133798; GFX8-NEXT:    v_or_b32_e32 v1, v4, v13799; GFX8-NEXT:    v_add_u16_e32 v4, v2, v113800; GFX8-NEXT:    v_add_u16_sdwa v2, v2, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3801; GFX8-NEXT:    v_or_b32_e32 v2, v4, v23802; GFX8-NEXT:    v_add_u16_e32 v4, v3, v123803; GFX8-NEXT:    v_add_u16_sdwa v3, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3804; GFX8-NEXT:    v_or_b32_e32 v0, v8, v03805; GFX8-NEXT:    v_or_b32_e32 v3, v4, v33806; GFX8-NEXT:    s_setpc_b64 s[30:31]3807;3808; GFX9-LABEL: v_saddsat_v8i16:3809; GFX9:       ; %bb.0:3810; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3811; GFX9-NEXT:    v_pk_add_i16 v0, v0, v4 clamp3812; GFX9-NEXT:    v_pk_add_i16 v1, v1, v5 clamp3813; GFX9-NEXT:    v_pk_add_i16 v2, v2, v6 clamp3814; GFX9-NEXT:    v_pk_add_i16 v3, v3, v7 clamp3815; GFX9-NEXT:    s_setpc_b64 s[30:31]3816;3817; GFX10PLUS-LABEL: v_saddsat_v8i16:3818; GFX10PLUS:       ; %bb.0:3819; GFX10PLUS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3820; GFX10PLUS-NEXT:    v_pk_add_i16 v0, v0, v4 clamp3821; GFX10PLUS-NEXT:    v_pk_add_i16 v1, v1, v5 clamp3822; GFX10PLUS-NEXT:    v_pk_add_i16 v2, v2, v6 clamp3823; GFX10PLUS-NEXT:    v_pk_add_i16 v3, v3, v7 clamp3824; GFX10PLUS-NEXT:    s_setpc_b64 s[30:31]3825  %result = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> %lhs, <8 x i16> %rhs)3826  %cast = bitcast <8 x i16> %result to <4 x float>3827  ret <4 x float> %cast3828}3829 3830define amdgpu_ps <4 x i32> @s_saddsat_v8i16(<8 x i16> inreg %lhs, <8 x i16> inreg %rhs) {3831; GFX6-LABEL: s_saddsat_v8i16:3832; GFX6:       ; %bb.0:3833; GFX6-NEXT:    s_lshl_b32 s0, s0, 163834; GFX6-NEXT:    s_min_i32 s17, s0, 03835; GFX6-NEXT:    s_lshl_b32 s8, s8, 163836; GFX6-NEXT:    s_max_i32 s16, s0, 03837; GFX6-NEXT:    s_sub_i32 s17, 0x80000000, s173838; GFX6-NEXT:    s_sub_i32 s16, 0x7fffffff, s163839; GFX6-NEXT:    s_max_i32 s8, s17, s83840; GFX6-NEXT:    s_lshl_b32 s1, s1, 163841; GFX6-NEXT:    s_min_i32 s8, s8, s163842; GFX6-NEXT:    s_min_i32 s16, s1, 03843; GFX6-NEXT:    s_add_i32 s0, s0, s83844; GFX6-NEXT:    s_lshl_b32 s8, s9, 163845; GFX6-NEXT:    s_max_i32 s9, s1, 03846; GFX6-NEXT:    s_sub_i32 s16, 0x80000000, s163847; GFX6-NEXT:    s_sub_i32 s9, 0x7fffffff, s93848; GFX6-NEXT:    s_max_i32 s8, s16, s83849; GFX6-NEXT:    s_min_i32 s8, s8, s93850; GFX6-NEXT:    s_lshl_b32 s2, s2, 163851; GFX6-NEXT:    s_add_i32 s1, s1, s83852; GFX6-NEXT:    s_lshl_b32 s8, s10, 163853; GFX6-NEXT:    s_min_i32 s10, s2, 03854; GFX6-NEXT:    s_max_i32 s9, s2, 03855; GFX6-NEXT:    s_sub_i32 s10, 0x80000000, s103856; GFX6-NEXT:    s_sub_i32 s9, 0x7fffffff, s93857; GFX6-NEXT:    s_max_i32 s8, s10, s83858; GFX6-NEXT:    s_lshl_b32 s3, s3, 163859; GFX6-NEXT:    s_min_i32 s8, s8, s93860; GFX6-NEXT:    s_min_i32 s10, s3, 03861; GFX6-NEXT:    s_add_i32 s2, s2, s83862; GFX6-NEXT:    s_lshl_b32 s8, s11, 163863; GFX6-NEXT:    s_max_i32 s9, s3, 03864; GFX6-NEXT:    s_sub_i32 s10, 0x80000000, s103865; GFX6-NEXT:    s_sub_i32 s9, 0x7fffffff, s93866; GFX6-NEXT:    s_max_i32 s8, s10, s83867; GFX6-NEXT:    s_lshl_b32 s4, s4, 163868; GFX6-NEXT:    s_min_i32 s8, s8, s93869; GFX6-NEXT:    s_min_i32 s10, s4, 03870; GFX6-NEXT:    s_add_i32 s3, s3, s83871; GFX6-NEXT:    s_lshl_b32 s8, s12, 163872; GFX6-NEXT:    s_max_i32 s9, s4, 03873; GFX6-NEXT:    s_sub_i32 s10, 0x80000000, s103874; GFX6-NEXT:    s_sub_i32 s9, 0x7fffffff, s93875; GFX6-NEXT:    s_max_i32 s8, s10, s83876; GFX6-NEXT:    s_lshl_b32 s5, s5, 163877; GFX6-NEXT:    s_min_i32 s8, s8, s93878; GFX6-NEXT:    s_min_i32 s10, s5, 03879; GFX6-NEXT:    s_add_i32 s4, s4, s83880; GFX6-NEXT:    s_lshl_b32 s8, s13, 163881; GFX6-NEXT:    s_max_i32 s9, s5, 03882; GFX6-NEXT:    s_sub_i32 s10, 0x80000000, s103883; GFX6-NEXT:    s_sub_i32 s9, 0x7fffffff, s93884; GFX6-NEXT:    s_max_i32 s8, s10, s83885; GFX6-NEXT:    s_lshl_b32 s6, s6, 163886; GFX6-NEXT:    s_min_i32 s8, s8, s93887; GFX6-NEXT:    s_min_i32 s10, s6, 03888; GFX6-NEXT:    s_add_i32 s5, s5, s83889; GFX6-NEXT:    s_lshl_b32 s8, s14, 163890; GFX6-NEXT:    s_max_i32 s9, s6, 03891; GFX6-NEXT:    s_sub_i32 s10, 0x80000000, s103892; GFX6-NEXT:    s_sub_i32 s9, 0x7fffffff, s93893; GFX6-NEXT:    s_max_i32 s8, s10, s83894; GFX6-NEXT:    s_lshl_b32 s7, s7, 163895; GFX6-NEXT:    s_min_i32 s8, s8, s93896; GFX6-NEXT:    s_min_i32 s10, s7, 03897; GFX6-NEXT:    s_ashr_i32 s1, s1, 163898; GFX6-NEXT:    s_add_i32 s6, s6, s83899; GFX6-NEXT:    s_lshl_b32 s8, s15, 163900; GFX6-NEXT:    s_max_i32 s9, s7, 03901; GFX6-NEXT:    s_sub_i32 s10, 0x80000000, s103902; GFX6-NEXT:    s_ashr_i32 s0, s0, 163903; GFX6-NEXT:    s_sub_i32 s9, 0x7fffffff, s93904; GFX6-NEXT:    s_max_i32 s8, s10, s83905; GFX6-NEXT:    s_and_b32 s1, s1, 0xffff3906; GFX6-NEXT:    s_ashr_i32 s2, s2, 163907; GFX6-NEXT:    s_ashr_i32 s3, s3, 163908; GFX6-NEXT:    s_min_i32 s8, s8, s93909; GFX6-NEXT:    s_and_b32 s0, s0, 0xffff3910; GFX6-NEXT:    s_lshl_b32 s1, s1, 163911; GFX6-NEXT:    s_ashr_i32 s5, s5, 163912; GFX6-NEXT:    s_add_i32 s7, s7, s83913; GFX6-NEXT:    s_or_b32 s0, s0, s13914; GFX6-NEXT:    s_and_b32 s1, s2, 0xffff3915; GFX6-NEXT:    s_and_b32 s2, s3, 0xffff3916; GFX6-NEXT:    s_ashr_i32 s4, s4, 163917; GFX6-NEXT:    s_ashr_i32 s7, s7, 163918; GFX6-NEXT:    s_lshl_b32 s2, s2, 163919; GFX6-NEXT:    s_and_b32 s3, s5, 0xffff3920; GFX6-NEXT:    s_ashr_i32 s6, s6, 163921; GFX6-NEXT:    s_or_b32 s1, s1, s23922; GFX6-NEXT:    s_and_b32 s2, s4, 0xffff3923; GFX6-NEXT:    s_lshl_b32 s3, s3, 163924; GFX6-NEXT:    s_and_b32 s4, s7, 0xffff3925; GFX6-NEXT:    s_or_b32 s2, s2, s33926; GFX6-NEXT:    s_and_b32 s3, s6, 0xffff3927; GFX6-NEXT:    s_lshl_b32 s4, s4, 163928; GFX6-NEXT:    s_or_b32 s3, s3, s43929; GFX6-NEXT:    ; return to shader part epilog3930;3931; GFX8-LABEL: s_saddsat_v8i16:3932; GFX8:       ; %bb.0:3933; GFX8-NEXT:    s_sext_i32_i16 s16, s03934; GFX8-NEXT:    s_max_i32 s17, s16, 03935; GFX8-NEXT:    s_min_i32 s16, s16, 03936; GFX8-NEXT:    s_sub_i32 s16, 0x8000, s163937; GFX8-NEXT:    s_lshr_b32 s12, s4, 163938; GFX8-NEXT:    s_sext_i32_i16 s16, s163939; GFX8-NEXT:    s_sext_i32_i16 s4, s43940; GFX8-NEXT:    s_sub_i32 s17, 0x7fff, s173941; GFX8-NEXT:    s_max_i32 s4, s16, s43942; GFX8-NEXT:    s_sext_i32_i16 s4, s43943; GFX8-NEXT:    s_sext_i32_i16 s16, s173944; GFX8-NEXT:    s_lshr_b32 s8, s0, 163945; GFX8-NEXT:    s_min_i32 s4, s4, s163946; GFX8-NEXT:    s_add_i32 s0, s0, s43947; GFX8-NEXT:    s_sext_i32_i16 s4, s83948; GFX8-NEXT:    s_max_i32 s16, s4, 03949; GFX8-NEXT:    s_min_i32 s4, s4, 03950; GFX8-NEXT:    s_sub_i32 s4, 0x8000, s43951; GFX8-NEXT:    s_sext_i32_i16 s4, s43952; GFX8-NEXT:    s_sext_i32_i16 s12, s123953; GFX8-NEXT:    s_sub_i32 s16, 0x7fff, s163954; GFX8-NEXT:    s_max_i32 s4, s4, s123955; GFX8-NEXT:    s_sext_i32_i16 s4, s43956; GFX8-NEXT:    s_sext_i32_i16 s12, s163957; GFX8-NEXT:    s_min_i32 s4, s4, s123958; GFX8-NEXT:    s_add_i32 s8, s8, s43959; GFX8-NEXT:    s_sext_i32_i16 s4, s13960; GFX8-NEXT:    s_max_i32 s12, s4, 03961; GFX8-NEXT:    s_min_i32 s4, s4, 03962; GFX8-NEXT:    s_sub_i32 s4, 0x8000, s43963; GFX8-NEXT:    s_lshr_b32 s13, s5, 163964; GFX8-NEXT:    s_sext_i32_i16 s4, s43965; GFX8-NEXT:    s_sext_i32_i16 s5, s53966; GFX8-NEXT:    s_sub_i32 s12, 0x7fff, s123967; GFX8-NEXT:    s_max_i32 s4, s4, s53968; GFX8-NEXT:    s_sext_i32_i16 s4, s43969; GFX8-NEXT:    s_sext_i32_i16 s5, s123970; GFX8-NEXT:    s_lshr_b32 s9, s1, 163971; GFX8-NEXT:    s_min_i32 s4, s4, s53972; GFX8-NEXT:    s_add_i32 s1, s1, s43973; GFX8-NEXT:    s_sext_i32_i16 s4, s93974; GFX8-NEXT:    s_max_i32 s5, s4, 03975; GFX8-NEXT:    s_min_i32 s4, s4, 03976; GFX8-NEXT:    s_sub_i32 s4, 0x8000, s43977; GFX8-NEXT:    s_sext_i32_i16 s4, s43978; GFX8-NEXT:    s_sext_i32_i16 s12, s133979; GFX8-NEXT:    s_sub_i32 s5, 0x7fff, s53980; GFX8-NEXT:    s_max_i32 s4, s4, s123981; GFX8-NEXT:    s_sext_i32_i16 s4, s43982; GFX8-NEXT:    s_sext_i32_i16 s5, s53983; GFX8-NEXT:    s_min_i32 s4, s4, s53984; GFX8-NEXT:    s_add_i32 s9, s9, s43985; GFX8-NEXT:    s_sext_i32_i16 s4, s23986; GFX8-NEXT:    s_max_i32 s5, s4, 03987; GFX8-NEXT:    s_min_i32 s4, s4, 03988; GFX8-NEXT:    s_sub_i32 s4, 0x8000, s43989; GFX8-NEXT:    s_lshr_b32 s14, s6, 163990; GFX8-NEXT:    s_sext_i32_i16 s4, s43991; GFX8-NEXT:    s_sext_i32_i16 s6, s63992; GFX8-NEXT:    s_sub_i32 s5, 0x7fff, s53993; GFX8-NEXT:    s_max_i32 s4, s4, s63994; GFX8-NEXT:    s_sext_i32_i16 s4, s43995; GFX8-NEXT:    s_sext_i32_i16 s5, s53996; GFX8-NEXT:    s_lshr_b32 s10, s2, 163997; GFX8-NEXT:    s_min_i32 s4, s4, s53998; GFX8-NEXT:    s_add_i32 s2, s2, s43999; GFX8-NEXT:    s_sext_i32_i16 s4, s104000; GFX8-NEXT:    s_max_i32 s5, s4, 04001; GFX8-NEXT:    s_min_i32 s4, s4, 04002; GFX8-NEXT:    s_sub_i32 s4, 0x8000, s44003; GFX8-NEXT:    s_sext_i32_i16 s4, s44004; GFX8-NEXT:    s_sext_i32_i16 s6, s144005; GFX8-NEXT:    s_sub_i32 s5, 0x7fff, s54006; GFX8-NEXT:    s_max_i32 s4, s4, s64007; GFX8-NEXT:    s_sext_i32_i16 s4, s44008; GFX8-NEXT:    s_sext_i32_i16 s5, s54009; GFX8-NEXT:    s_min_i32 s4, s4, s54010; GFX8-NEXT:    s_add_i32 s10, s10, s44011; GFX8-NEXT:    s_sext_i32_i16 s4, s34012; GFX8-NEXT:    s_max_i32 s5, s4, 04013; GFX8-NEXT:    s_min_i32 s4, s4, 04014; GFX8-NEXT:    s_sub_i32 s4, 0x8000, s44015; GFX8-NEXT:    s_sext_i32_i16 s4, s44016; GFX8-NEXT:    s_sext_i32_i16 s6, s74017; GFX8-NEXT:    s_sub_i32 s5, 0x7fff, s54018; GFX8-NEXT:    s_max_i32 s4, s4, s64019; GFX8-NEXT:    s_sext_i32_i16 s4, s44020; GFX8-NEXT:    s_sext_i32_i16 s5, s54021; GFX8-NEXT:    s_lshr_b32 s11, s3, 164022; GFX8-NEXT:    s_min_i32 s4, s4, s54023; GFX8-NEXT:    s_add_i32 s3, s3, s44024; GFX8-NEXT:    s_sext_i32_i16 s4, s114025; GFX8-NEXT:    s_max_i32 s5, s4, 04026; GFX8-NEXT:    s_min_i32 s4, s4, 04027; GFX8-NEXT:    s_lshr_b32 s15, s7, 164028; GFX8-NEXT:    s_sub_i32 s4, 0x8000, s44029; GFX8-NEXT:    s_sext_i32_i16 s4, s44030; GFX8-NEXT:    s_sext_i32_i16 s6, s154031; GFX8-NEXT:    s_sub_i32 s5, 0x7fff, s54032; GFX8-NEXT:    s_max_i32 s4, s4, s64033; GFX8-NEXT:    s_sext_i32_i16 s4, s44034; GFX8-NEXT:    s_sext_i32_i16 s5, s54035; GFX8-NEXT:    s_min_i32 s4, s4, s54036; GFX8-NEXT:    s_add_i32 s11, s11, s44037; GFX8-NEXT:    s_and_b32 s4, 0xffff, s84038; GFX8-NEXT:    s_and_b32 s0, 0xffff, s04039; GFX8-NEXT:    s_lshl_b32 s4, s4, 164040; GFX8-NEXT:    s_or_b32 s0, s0, s44041; GFX8-NEXT:    s_and_b32 s4, 0xffff, s94042; GFX8-NEXT:    s_and_b32 s1, 0xffff, s14043; GFX8-NEXT:    s_lshl_b32 s4, s4, 164044; GFX8-NEXT:    s_or_b32 s1, s1, s44045; GFX8-NEXT:    s_and_b32 s4, 0xffff, s104046; GFX8-NEXT:    s_and_b32 s2, 0xffff, s24047; GFX8-NEXT:    s_lshl_b32 s4, s4, 164048; GFX8-NEXT:    s_or_b32 s2, s2, s44049; GFX8-NEXT:    s_and_b32 s4, 0xffff, s114050; GFX8-NEXT:    s_and_b32 s3, 0xffff, s34051; GFX8-NEXT:    s_lshl_b32 s4, s4, 164052; GFX8-NEXT:    s_or_b32 s3, s3, s44053; GFX8-NEXT:    ; return to shader part epilog4054;4055; GFX9-LABEL: s_saddsat_v8i16:4056; GFX9:       ; %bb.0:4057; GFX9-NEXT:    v_mov_b32_e32 v0, s44058; GFX9-NEXT:    v_mov_b32_e32 v1, s54059; GFX9-NEXT:    v_mov_b32_e32 v2, s64060; GFX9-NEXT:    v_mov_b32_e32 v3, s74061; GFX9-NEXT:    v_pk_add_i16 v0, s0, v0 clamp4062; GFX9-NEXT:    v_pk_add_i16 v1, s1, v1 clamp4063; GFX9-NEXT:    v_pk_add_i16 v2, s2, v2 clamp4064; GFX9-NEXT:    v_pk_add_i16 v3, s3, v3 clamp4065; GFX9-NEXT:    v_readfirstlane_b32 s0, v04066; GFX9-NEXT:    v_readfirstlane_b32 s1, v14067; GFX9-NEXT:    v_readfirstlane_b32 s2, v24068; GFX9-NEXT:    v_readfirstlane_b32 s3, v34069; GFX9-NEXT:    ; return to shader part epilog4070;4071; GFX10PLUS-LABEL: s_saddsat_v8i16:4072; GFX10PLUS:       ; %bb.0:4073; GFX10PLUS-NEXT:    v_pk_add_i16 v0, s0, s4 clamp4074; GFX10PLUS-NEXT:    v_pk_add_i16 v1, s1, s5 clamp4075; GFX10PLUS-NEXT:    v_pk_add_i16 v2, s2, s6 clamp4076; GFX10PLUS-NEXT:    v_pk_add_i16 v3, s3, s7 clamp4077; GFX10PLUS-NEXT:    v_readfirstlane_b32 s0, v04078; GFX10PLUS-NEXT:    v_readfirstlane_b32 s1, v14079; GFX10PLUS-NEXT:    v_readfirstlane_b32 s2, v24080; GFX10PLUS-NEXT:    v_readfirstlane_b32 s3, v34081; GFX10PLUS-NEXT:    ; return to shader part epilog4082  %result = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> %lhs, <8 x i16> %rhs)4083  %cast = bitcast <8 x i16> %result to <4 x i32>4084  ret <4 x i32> %cast4085}4086 4087define i48 @v_saddsat_i48(i48 %lhs, i48 %rhs) {4088; GFX6-LABEL: v_saddsat_i48:4089; GFX6:       ; %bb.0:4090; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4091; GFX6-NEXT:    v_add_i32_e32 v4, vcc, v0, v24092; GFX6-NEXT:    v_addc_u32_e32 v6, vcc, v1, v3, vcc4093; GFX6-NEXT:    v_bfe_i32 v5, v4, 0, 164094; GFX6-NEXT:    v_bfe_i32 v1, v0, 0, 164095; GFX6-NEXT:    v_bfe_i32 v3, v2, 0, 164096; GFX6-NEXT:    v_cmp_lt_i64_e64 s[4:5], v[4:5], v[0:1]4097; GFX6-NEXT:    v_cmp_gt_i64_e64 s[6:7], 0, v[2:3]4098; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 31, v54099; GFX6-NEXT:    v_add_i32_e32 v2, vcc, 0xffff8000, v04100; GFX6-NEXT:    v_ashrrev_i32_e32 v1, 15, v54101; GFX6-NEXT:    s_xor_b64 vcc, s[6:7], s[4:5]4102; GFX6-NEXT:    v_cndmask_b32_e32 v0, v4, v1, vcc4103; GFX6-NEXT:    v_cndmask_b32_e32 v1, v6, v2, vcc4104; GFX6-NEXT:    s_setpc_b64 s[30:31]4105;4106; GFX8-LABEL: v_saddsat_i48:4107; GFX8:       ; %bb.0:4108; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4109; GFX8-NEXT:    v_add_u32_e32 v4, vcc, v0, v24110; GFX8-NEXT:    v_addc_u32_e32 v6, vcc, v1, v3, vcc4111; GFX8-NEXT:    v_bfe_i32 v5, v4, 0, 164112; GFX8-NEXT:    v_bfe_i32 v1, v0, 0, 164113; GFX8-NEXT:    v_bfe_i32 v3, v2, 0, 164114; GFX8-NEXT:    v_cmp_lt_i64_e64 s[4:5], v[4:5], v[0:1]4115; GFX8-NEXT:    v_cmp_gt_i64_e64 s[6:7], 0, v[2:3]4116; GFX8-NEXT:    v_ashrrev_i32_e32 v0, 31, v54117; GFX8-NEXT:    v_add_u32_e32 v2, vcc, 0xffff8000, v04118; GFX8-NEXT:    v_ashrrev_i32_e32 v1, 15, v54119; GFX8-NEXT:    s_xor_b64 vcc, s[6:7], s[4:5]4120; GFX8-NEXT:    v_cndmask_b32_e32 v0, v4, v1, vcc4121; GFX8-NEXT:    v_cndmask_b32_e32 v1, v6, v2, vcc4122; GFX8-NEXT:    s_setpc_b64 s[30:31]4123;4124; GFX9-LABEL: v_saddsat_i48:4125; GFX9:       ; %bb.0:4126; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4127; GFX9-NEXT:    v_lshlrev_b64 v[0:1], 16, v[0:1]4128; GFX9-NEXT:    v_lshlrev_b64 v[2:3], 16, v[2:3]4129; GFX9-NEXT:    v_add_co_u32_e32 v4, vcc, v0, v24130; GFX9-NEXT:    v_addc_co_u32_e32 v5, vcc, v1, v3, vcc4131; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, v[4:5], v[0:1]4132; GFX9-NEXT:    v_cmp_gt_i64_e64 s[4:5], 0, v[2:3]4133; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 31, v54134; GFX9-NEXT:    v_add_u32_e32 v1, 0x80000000, v04135; GFX9-NEXT:    s_xor_b64 vcc, s[4:5], vcc4136; GFX9-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc4137; GFX9-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc4138; GFX9-NEXT:    v_ashrrev_i64 v[0:1], 16, v[0:1]4139; GFX9-NEXT:    s_setpc_b64 s[30:31]4140;4141; GFX10-LABEL: v_saddsat_i48:4142; GFX10:       ; %bb.0:4143; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4144; GFX10-NEXT:    v_lshlrev_b64 v[0:1], 16, v[0:1]4145; GFX10-NEXT:    v_lshlrev_b64 v[2:3], 16, v[2:3]4146; GFX10-NEXT:    v_add_co_u32 v4, vcc_lo, v0, v24147; GFX10-NEXT:    v_add_co_ci_u32_e32 v5, vcc_lo, v1, v3, vcc_lo4148; GFX10-NEXT:    v_cmp_gt_i64_e32 vcc_lo, 0, v[2:3]4149; GFX10-NEXT:    v_ashrrev_i32_e32 v6, 31, v54150; GFX10-NEXT:    v_cmp_lt_i64_e64 s4, v[4:5], v[0:1]4151; GFX10-NEXT:    v_add_nc_u32_e32 v1, 0x80000000, v64152; GFX10-NEXT:    s_xor_b32 vcc_lo, vcc_lo, s44153; GFX10-NEXT:    v_cndmask_b32_e32 v0, v4, v6, vcc_lo4154; GFX10-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc_lo4155; GFX10-NEXT:    v_ashrrev_i64 v[0:1], 16, v[0:1]4156; GFX10-NEXT:    s_setpc_b64 s[30:31]4157;4158; GFX11-LABEL: v_saddsat_i48:4159; GFX11:       ; %bb.0:4160; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4161; GFX11-NEXT:    v_lshlrev_b64 v[0:1], 16, v[0:1]4162; GFX11-NEXT:    v_lshlrev_b64 v[2:3], 16, v[2:3]4163; GFX11-NEXT:    v_add_co_u32 v4, vcc_lo, v0, v24164; GFX11-NEXT:    v_add_co_ci_u32_e64 v5, null, v1, v3, vcc_lo4165; GFX11-NEXT:    v_cmp_gt_i64_e32 vcc_lo, 0, v[2:3]4166; GFX11-NEXT:    v_ashrrev_i32_e32 v6, 31, v54167; GFX11-NEXT:    v_cmp_lt_i64_e64 s0, v[4:5], v[0:1]4168; GFX11-NEXT:    v_add_nc_u32_e32 v1, 0x80000000, v64169; GFX11-NEXT:    s_xor_b32 vcc_lo, vcc_lo, s04170; GFX11-NEXT:    v_dual_cndmask_b32 v0, v4, v6 :: v_dual_cndmask_b32 v1, v5, v14171; GFX11-NEXT:    v_ashrrev_i64 v[0:1], 16, v[0:1]4172; GFX11-NEXT:    s_setpc_b64 s[30:31]4173  %result = call i48 @llvm.sadd.sat.i48(i48 %lhs, i48 %rhs)4174  ret i48 %result4175}4176 4177define amdgpu_ps i48 @s_saddsat_i48(i48 inreg %lhs, i48 inreg %rhs) {4178; GFX6-LABEL: s_saddsat_i48:4179; GFX6:       ; %bb.0:4180; GFX6-NEXT:    s_add_u32 s4, s0, s24181; GFX6-NEXT:    s_addc_u32 s3, s1, s34182; GFX6-NEXT:    s_bfe_i64 s[0:1], s[0:1], 0x3000004183; GFX6-NEXT:    v_mov_b32_e32 v0, s04184; GFX6-NEXT:    s_bfe_i64 s[6:7], s[4:5], 0x3000004185; GFX6-NEXT:    v_mov_b32_e32 v1, s14186; GFX6-NEXT:    s_bfe_i64 s[0:1], s[2:3], 0x3000004187; GFX6-NEXT:    v_cmp_lt_i64_e32 vcc, s[6:7], v[0:1]4188; GFX6-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[0:1], 04189; GFX6-NEXT:    s_ashr_i32 s2, s7, 314190; GFX6-NEXT:    s_ashr_i32 s5, s7, 154191; GFX6-NEXT:    s_addk_i32 s2, 0x80004192; GFX6-NEXT:    v_mov_b32_e32 v0, s54193; GFX6-NEXT:    v_mov_b32_e32 v1, s24194; GFX6-NEXT:    v_mov_b32_e32 v2, s44195; GFX6-NEXT:    v_mov_b32_e32 v3, s34196; GFX6-NEXT:    s_xor_b64 vcc, s[0:1], vcc4197; GFX6-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc4198; GFX6-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc4199; GFX6-NEXT:    v_readfirstlane_b32 s0, v04200; GFX6-NEXT:    v_readfirstlane_b32 s1, v14201; GFX6-NEXT:    ; return to shader part epilog4202;4203; GFX8-LABEL: s_saddsat_i48:4204; GFX8:       ; %bb.0:4205; GFX8-NEXT:    s_add_u32 s4, s0, s24206; GFX8-NEXT:    s_addc_u32 s3, s1, s34207; GFX8-NEXT:    s_bfe_i64 s[0:1], s[0:1], 0x3000004208; GFX8-NEXT:    v_mov_b32_e32 v0, s04209; GFX8-NEXT:    s_bfe_i64 s[6:7], s[4:5], 0x3000004210; GFX8-NEXT:    v_mov_b32_e32 v1, s14211; GFX8-NEXT:    s_bfe_i64 s[0:1], s[2:3], 0x3000004212; GFX8-NEXT:    v_cmp_lt_i64_e32 vcc, s[6:7], v[0:1]4213; GFX8-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[0:1], 04214; GFX8-NEXT:    s_ashr_i32 s2, s7, 314215; GFX8-NEXT:    s_ashr_i32 s5, s7, 154216; GFX8-NEXT:    s_addk_i32 s2, 0x80004217; GFX8-NEXT:    v_mov_b32_e32 v0, s54218; GFX8-NEXT:    v_mov_b32_e32 v1, s24219; GFX8-NEXT:    v_mov_b32_e32 v2, s44220; GFX8-NEXT:    v_mov_b32_e32 v3, s34221; GFX8-NEXT:    s_xor_b64 vcc, s[0:1], vcc4222; GFX8-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc4223; GFX8-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc4224; GFX8-NEXT:    v_readfirstlane_b32 s0, v04225; GFX8-NEXT:    v_readfirstlane_b32 s1, v14226; GFX8-NEXT:    ; return to shader part epilog4227;4228; GFX9-LABEL: s_saddsat_i48:4229; GFX9:       ; %bb.0:4230; GFX9-NEXT:    s_lshl_b64 s[0:1], s[0:1], 164231; GFX9-NEXT:    s_lshl_b64 s[2:3], s[2:3], 164232; GFX9-NEXT:    s_add_u32 s4, s0, s24233; GFX9-NEXT:    v_mov_b32_e32 v0, s04234; GFX9-NEXT:    s_addc_u32 s5, s1, s34235; GFX9-NEXT:    v_mov_b32_e32 v1, s14236; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1]4237; GFX9-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[2:3], 04238; GFX9-NEXT:    s_ashr_i32 s2, s5, 314239; GFX9-NEXT:    s_add_i32 s3, s2, 0x800000004240; GFX9-NEXT:    v_mov_b32_e32 v0, s24241; GFX9-NEXT:    v_mov_b32_e32 v1, s34242; GFX9-NEXT:    v_mov_b32_e32 v2, s44243; GFX9-NEXT:    v_mov_b32_e32 v3, s54244; GFX9-NEXT:    s_xor_b64 vcc, s[0:1], vcc4245; GFX9-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc4246; GFX9-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc4247; GFX9-NEXT:    v_ashrrev_i64 v[0:1], 16, v[0:1]4248; GFX9-NEXT:    v_readfirstlane_b32 s0, v04249; GFX9-NEXT:    v_readfirstlane_b32 s1, v14250; GFX9-NEXT:    ; return to shader part epilog4251;4252; GFX10-LABEL: s_saddsat_i48:4253; GFX10:       ; %bb.0:4254; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], 164255; GFX10-NEXT:    s_lshl_b64 s[2:3], s[2:3], 164256; GFX10-NEXT:    s_add_u32 s4, s0, s24257; GFX10-NEXT:    s_addc_u32 s5, s1, s34258; GFX10-NEXT:    v_mov_b32_e32 v0, s44259; GFX10-NEXT:    v_cmp_lt_i64_e64 s0, s[4:5], s[0:1]4260; GFX10-NEXT:    v_cmp_lt_i64_e64 s1, s[2:3], 04261; GFX10-NEXT:    v_mov_b32_e32 v1, s54262; GFX10-NEXT:    s_ashr_i32 s2, s5, 314263; GFX10-NEXT:    s_add_i32 s3, s2, 0x800000004264; GFX10-NEXT:    s_xor_b32 s0, s1, s04265; GFX10-NEXT:    v_cndmask_b32_e64 v0, v0, s2, s04266; GFX10-NEXT:    v_cndmask_b32_e64 v1, v1, s3, s04267; GFX10-NEXT:    v_ashrrev_i64 v[0:1], 16, v[0:1]4268; GFX10-NEXT:    v_readfirstlane_b32 s0, v04269; GFX10-NEXT:    v_readfirstlane_b32 s1, v14270; GFX10-NEXT:    ; return to shader part epilog4271;4272; GFX11-LABEL: s_saddsat_i48:4273; GFX11:       ; %bb.0:4274; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], 164275; GFX11-NEXT:    s_lshl_b64 s[2:3], s[2:3], 164276; GFX11-NEXT:    s_add_u32 s4, s0, s24277; GFX11-NEXT:    s_addc_u32 s5, s1, s34278; GFX11-NEXT:    v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s54279; GFX11-NEXT:    v_cmp_lt_i64_e64 s0, s[4:5], s[0:1]4280; GFX11-NEXT:    v_cmp_lt_i64_e64 s1, s[2:3], 04281; GFX11-NEXT:    s_ashr_i32 s2, s5, 314282; GFX11-NEXT:    s_add_i32 s3, s2, 0x800000004283; GFX11-NEXT:    s_xor_b32 s0, s1, s04284; GFX11-NEXT:    v_cndmask_b32_e64 v0, v0, s2, s04285; GFX11-NEXT:    v_cndmask_b32_e64 v1, v1, s3, s04286; GFX11-NEXT:    v_ashrrev_i64 v[0:1], 16, v[0:1]4287; GFX11-NEXT:    v_readfirstlane_b32 s0, v04288; GFX11-NEXT:    v_readfirstlane_b32 s1, v14289; GFX11-NEXT:    ; return to shader part epilog4290  %result = call i48 @llvm.sadd.sat.i48(i48 %lhs, i48 %rhs)4291  ret i48 %result4292}4293 4294define amdgpu_ps <2 x float> @saddsat_i48_sv(i48 inreg %lhs, i48 %rhs) {4295; GFX6-LABEL: saddsat_i48_sv:4296; GFX6:       ; %bb.0:4297; GFX6-NEXT:    v_mov_b32_e32 v3, s14298; GFX6-NEXT:    v_add_i32_e32 v2, vcc, s0, v04299; GFX6-NEXT:    v_addc_u32_e32 v4, vcc, v3, v1, vcc4300; GFX6-NEXT:    v_bfe_i32 v3, v2, 0, 164301; GFX6-NEXT:    s_bfe_i64 s[0:1], s[0:1], 0x3000004302; GFX6-NEXT:    v_bfe_i32 v1, v0, 0, 164303; GFX6-NEXT:    v_cmp_gt_i64_e64 s[0:1], s[0:1], v[2:3]4304; GFX6-NEXT:    v_cmp_gt_i64_e64 s[2:3], 0, v[0:1]4305; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 31, v34306; GFX6-NEXT:    v_ashrrev_i32_e32 v1, 15, v34307; GFX6-NEXT:    v_add_i32_e32 v3, vcc, 0xffff8000, v04308; GFX6-NEXT:    s_xor_b64 vcc, s[2:3], s[0:1]4309; GFX6-NEXT:    v_cndmask_b32_e32 v0, v2, v1, vcc4310; GFX6-NEXT:    v_cndmask_b32_e32 v1, v4, v3, vcc4311; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v14312; GFX6-NEXT:    ; return to shader part epilog4313;4314; GFX8-LABEL: saddsat_i48_sv:4315; GFX8:       ; %bb.0:4316; GFX8-NEXT:    v_mov_b32_e32 v3, s14317; GFX8-NEXT:    v_add_u32_e32 v2, vcc, s0, v04318; GFX8-NEXT:    v_addc_u32_e32 v4, vcc, v3, v1, vcc4319; GFX8-NEXT:    v_bfe_i32 v3, v2, 0, 164320; GFX8-NEXT:    s_bfe_i64 s[0:1], s[0:1], 0x3000004321; GFX8-NEXT:    v_bfe_i32 v1, v0, 0, 164322; GFX8-NEXT:    v_cmp_gt_i64_e64 s[0:1], s[0:1], v[2:3]4323; GFX8-NEXT:    v_cmp_gt_i64_e64 s[2:3], 0, v[0:1]4324; GFX8-NEXT:    v_ashrrev_i32_e32 v0, 31, v34325; GFX8-NEXT:    v_ashrrev_i32_e32 v1, 15, v34326; GFX8-NEXT:    v_add_u32_e32 v3, vcc, 0xffff8000, v04327; GFX8-NEXT:    s_xor_b64 vcc, s[2:3], s[0:1]4328; GFX8-NEXT:    v_cndmask_b32_e32 v0, v2, v1, vcc4329; GFX8-NEXT:    v_cndmask_b32_e32 v1, v4, v3, vcc4330; GFX8-NEXT:    v_and_b32_e32 v1, 0xffff, v14331; GFX8-NEXT:    ; return to shader part epilog4332;4333; GFX9-LABEL: saddsat_i48_sv:4334; GFX9:       ; %bb.0:4335; GFX9-NEXT:    v_lshlrev_b64 v[0:1], 16, v[0:1]4336; GFX9-NEXT:    s_lshl_b64 s[0:1], s[0:1], 164337; GFX9-NEXT:    v_mov_b32_e32 v3, s14338; GFX9-NEXT:    v_add_co_u32_e32 v2, vcc, s0, v04339; GFX9-NEXT:    v_addc_co_u32_e32 v3, vcc, v3, v1, vcc4340; GFX9-NEXT:    v_cmp_gt_i64_e32 vcc, s[0:1], v[2:3]4341; GFX9-NEXT:    v_cmp_gt_i64_e64 s[0:1], 0, v[0:1]4342; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 31, v34343; GFX9-NEXT:    v_add_u32_e32 v1, 0x80000000, v04344; GFX9-NEXT:    s_xor_b64 vcc, s[0:1], vcc4345; GFX9-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc4346; GFX9-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc4347; GFX9-NEXT:    v_ashrrev_i64 v[0:1], 16, v[0:1]4348; GFX9-NEXT:    v_and_b32_e32 v1, 0xffff, v14349; GFX9-NEXT:    ; return to shader part epilog4350;4351; GFX10-LABEL: saddsat_i48_sv:4352; GFX10:       ; %bb.0:4353; GFX10-NEXT:    v_lshlrev_b64 v[0:1], 16, v[0:1]4354; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], 164355; GFX10-NEXT:    v_add_co_u32 v2, vcc_lo, s0, v04356; GFX10-NEXT:    v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo4357; GFX10-NEXT:    v_ashrrev_i32_e32 v4, 31, v34358; GFX10-NEXT:    v_cmp_gt_i64_e32 vcc_lo, s[0:1], v[2:3]4359; GFX10-NEXT:    v_cmp_gt_i64_e64 s0, 0, v[0:1]4360; GFX10-NEXT:    v_add_nc_u32_e32 v1, 0x80000000, v44361; GFX10-NEXT:    s_xor_b32 vcc_lo, s0, vcc_lo4362; GFX10-NEXT:    v_cndmask_b32_e32 v0, v2, v4, vcc_lo4363; GFX10-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc_lo4364; GFX10-NEXT:    v_ashrrev_i64 v[0:1], 16, v[0:1]4365; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v14366; GFX10-NEXT:    ; return to shader part epilog4367;4368; GFX11-LABEL: saddsat_i48_sv:4369; GFX11:       ; %bb.0:4370; GFX11-NEXT:    v_lshlrev_b64 v[0:1], 16, v[0:1]4371; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], 164372; GFX11-NEXT:    v_add_co_u32 v2, vcc_lo, s0, v04373; GFX11-NEXT:    v_add_co_ci_u32_e64 v3, null, s1, v1, vcc_lo4374; GFX11-NEXT:    v_ashrrev_i32_e32 v4, 31, v34375; GFX11-NEXT:    v_cmp_gt_i64_e32 vcc_lo, s[0:1], v[2:3]4376; GFX11-NEXT:    v_cmp_gt_i64_e64 s0, 0, v[0:1]4377; GFX11-NEXT:    v_add_nc_u32_e32 v1, 0x80000000, v44378; GFX11-NEXT:    s_xor_b32 vcc_lo, s0, vcc_lo4379; GFX11-NEXT:    v_dual_cndmask_b32 v0, v2, v4 :: v_dual_cndmask_b32 v1, v3, v14380; GFX11-NEXT:    v_ashrrev_i64 v[0:1], 16, v[0:1]4381; GFX11-NEXT:    v_and_b32_e32 v1, 0xffff, v14382; GFX11-NEXT:    ; return to shader part epilog4383  %result = call i48 @llvm.sadd.sat.i48(i48 %lhs, i48 %rhs)4384  %ext.result = zext i48 %result to i644385  %cast = bitcast i64 %ext.result to <2 x float>4386  ret <2 x float> %cast4387}4388 4389define amdgpu_ps <2 x float> @saddsat_i48_vs(i48 %lhs, i48 inreg %rhs) {4390; GFX6-LABEL: saddsat_i48_vs:4391; GFX6:       ; %bb.0:4392; GFX6-NEXT:    v_mov_b32_e32 v3, s14393; GFX6-NEXT:    v_add_i32_e32 v2, vcc, s0, v04394; GFX6-NEXT:    v_addc_u32_e32 v4, vcc, v1, v3, vcc4395; GFX6-NEXT:    v_bfe_i32 v3, v2, 0, 164396; GFX6-NEXT:    v_bfe_i32 v1, v0, 0, 164397; GFX6-NEXT:    s_bfe_i64 s[0:1], s[0:1], 0x3000004398; GFX6-NEXT:    v_cmp_lt_i64_e64 s[2:3], v[2:3], v[0:1]4399; GFX6-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[0:1], 04400; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 31, v34401; GFX6-NEXT:    v_ashrrev_i32_e32 v1, 15, v34402; GFX6-NEXT:    v_add_i32_e32 v3, vcc, 0xffff8000, v04403; GFX6-NEXT:    s_xor_b64 vcc, s[0:1], s[2:3]4404; GFX6-NEXT:    v_cndmask_b32_e32 v0, v2, v1, vcc4405; GFX6-NEXT:    v_cndmask_b32_e32 v1, v4, v3, vcc4406; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v14407; GFX6-NEXT:    ; return to shader part epilog4408;4409; GFX8-LABEL: saddsat_i48_vs:4410; GFX8:       ; %bb.0:4411; GFX8-NEXT:    v_mov_b32_e32 v3, s14412; GFX8-NEXT:    v_add_u32_e32 v2, vcc, s0, v04413; GFX8-NEXT:    v_addc_u32_e32 v4, vcc, v1, v3, vcc4414; GFX8-NEXT:    v_bfe_i32 v3, v2, 0, 164415; GFX8-NEXT:    v_bfe_i32 v1, v0, 0, 164416; GFX8-NEXT:    s_bfe_i64 s[0:1], s[0:1], 0x3000004417; GFX8-NEXT:    v_cmp_lt_i64_e64 s[2:3], v[2:3], v[0:1]4418; GFX8-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[0:1], 04419; GFX8-NEXT:    v_ashrrev_i32_e32 v0, 31, v34420; GFX8-NEXT:    v_ashrrev_i32_e32 v1, 15, v34421; GFX8-NEXT:    v_add_u32_e32 v3, vcc, 0xffff8000, v04422; GFX8-NEXT:    s_xor_b64 vcc, s[0:1], s[2:3]4423; GFX8-NEXT:    v_cndmask_b32_e32 v0, v2, v1, vcc4424; GFX8-NEXT:    v_cndmask_b32_e32 v1, v4, v3, vcc4425; GFX8-NEXT:    v_and_b32_e32 v1, 0xffff, v14426; GFX8-NEXT:    ; return to shader part epilog4427;4428; GFX9-LABEL: saddsat_i48_vs:4429; GFX9:       ; %bb.0:4430; GFX9-NEXT:    v_lshlrev_b64 v[0:1], 16, v[0:1]4431; GFX9-NEXT:    s_lshl_b64 s[0:1], s[0:1], 164432; GFX9-NEXT:    v_mov_b32_e32 v3, s14433; GFX9-NEXT:    v_add_co_u32_e32 v2, vcc, s0, v04434; GFX9-NEXT:    v_addc_co_u32_e32 v3, vcc, v1, v3, vcc4435; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, v[2:3], v[0:1]4436; GFX9-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[0:1], 04437; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 31, v34438; GFX9-NEXT:    v_add_u32_e32 v1, 0x80000000, v04439; GFX9-NEXT:    s_xor_b64 vcc, s[0:1], vcc4440; GFX9-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc4441; GFX9-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc4442; GFX9-NEXT:    v_ashrrev_i64 v[0:1], 16, v[0:1]4443; GFX9-NEXT:    v_and_b32_e32 v1, 0xffff, v14444; GFX9-NEXT:    ; return to shader part epilog4445;4446; GFX10-LABEL: saddsat_i48_vs:4447; GFX10:       ; %bb.0:4448; GFX10-NEXT:    v_lshlrev_b64 v[0:1], 16, v[0:1]4449; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], 164450; GFX10-NEXT:    v_add_co_u32 v2, vcc_lo, v0, s04451; GFX10-NEXT:    v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo4452; GFX10-NEXT:    v_cmp_lt_i64_e64 s0, s[0:1], 04453; GFX10-NEXT:    v_ashrrev_i32_e32 v4, 31, v34454; GFX10-NEXT:    v_cmp_lt_i64_e32 vcc_lo, v[2:3], v[0:1]4455; GFX10-NEXT:    v_add_nc_u32_e32 v1, 0x80000000, v44456; GFX10-NEXT:    s_xor_b32 vcc_lo, s0, vcc_lo4457; GFX10-NEXT:    v_cndmask_b32_e32 v0, v2, v4, vcc_lo4458; GFX10-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc_lo4459; GFX10-NEXT:    v_ashrrev_i64 v[0:1], 16, v[0:1]4460; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v14461; GFX10-NEXT:    ; return to shader part epilog4462;4463; GFX11-LABEL: saddsat_i48_vs:4464; GFX11:       ; %bb.0:4465; GFX11-NEXT:    v_lshlrev_b64 v[0:1], 16, v[0:1]4466; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], 164467; GFX11-NEXT:    v_add_co_u32 v2, vcc_lo, v0, s04468; GFX11-NEXT:    v_add_co_ci_u32_e64 v3, null, s1, v1, vcc_lo4469; GFX11-NEXT:    v_cmp_lt_i64_e64 s0, s[0:1], 04470; GFX11-NEXT:    v_ashrrev_i32_e32 v4, 31, v34471; GFX11-NEXT:    v_cmp_lt_i64_e32 vcc_lo, v[2:3], v[0:1]4472; GFX11-NEXT:    v_add_nc_u32_e32 v1, 0x80000000, v44473; GFX11-NEXT:    s_xor_b32 vcc_lo, s0, vcc_lo4474; GFX11-NEXT:    v_dual_cndmask_b32 v0, v2, v4 :: v_dual_cndmask_b32 v1, v3, v14475; GFX11-NEXT:    v_ashrrev_i64 v[0:1], 16, v[0:1]4476; GFX11-NEXT:    v_and_b32_e32 v1, 0xffff, v14477; GFX11-NEXT:    ; return to shader part epilog4478  %result = call i48 @llvm.sadd.sat.i48(i48 %lhs, i48 %rhs)4479  %ext.result = zext i48 %result to i644480  %cast = bitcast i64 %ext.result to <2 x float>4481  ret <2 x float> %cast4482}4483 4484define i64 @v_saddsat_i64(i64 %lhs, i64 %rhs) {4485; GFX6-LABEL: v_saddsat_i64:4486; GFX6:       ; %bb.0:4487; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4488; GFX6-NEXT:    v_add_i32_e32 v4, vcc, v0, v24489; GFX6-NEXT:    v_addc_u32_e32 v5, vcc, v1, v3, vcc4490; GFX6-NEXT:    v_cmp_lt_i64_e64 s[4:5], v[4:5], v[0:1]4491; GFX6-NEXT:    v_cmp_gt_i64_e64 s[6:7], 0, v[2:3]4492; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 31, v54493; GFX6-NEXT:    v_add_i32_e32 v1, vcc, 0x80000000, v04494; GFX6-NEXT:    s_xor_b64 vcc, s[6:7], s[4:5]4495; GFX6-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc4496; GFX6-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc4497; GFX6-NEXT:    s_setpc_b64 s[30:31]4498;4499; GFX8-LABEL: v_saddsat_i64:4500; GFX8:       ; %bb.0:4501; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4502; GFX8-NEXT:    v_add_u32_e32 v4, vcc, v0, v24503; GFX8-NEXT:    v_addc_u32_e32 v5, vcc, v1, v3, vcc4504; GFX8-NEXT:    v_cmp_lt_i64_e64 s[4:5], v[4:5], v[0:1]4505; GFX8-NEXT:    v_cmp_gt_i64_e64 s[6:7], 0, v[2:3]4506; GFX8-NEXT:    v_ashrrev_i32_e32 v0, 31, v54507; GFX8-NEXT:    v_add_u32_e32 v1, vcc, 0x80000000, v04508; GFX8-NEXT:    s_xor_b64 vcc, s[6:7], s[4:5]4509; GFX8-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc4510; GFX8-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc4511; GFX8-NEXT:    s_setpc_b64 s[30:31]4512;4513; GFX9-LABEL: v_saddsat_i64:4514; GFX9:       ; %bb.0:4515; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4516; GFX9-NEXT:    v_add_co_u32_e32 v4, vcc, v0, v24517; GFX9-NEXT:    v_addc_co_u32_e32 v5, vcc, v1, v3, vcc4518; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, v[4:5], v[0:1]4519; GFX9-NEXT:    v_cmp_gt_i64_e64 s[4:5], 0, v[2:3]4520; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 31, v54521; GFX9-NEXT:    v_add_u32_e32 v1, 0x80000000, v04522; GFX9-NEXT:    s_xor_b64 vcc, s[4:5], vcc4523; GFX9-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc4524; GFX9-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc4525; GFX9-NEXT:    s_setpc_b64 s[30:31]4526;4527; GFX10-LABEL: v_saddsat_i64:4528; GFX10:       ; %bb.0:4529; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4530; GFX10-NEXT:    v_add_co_u32 v4, vcc_lo, v0, v24531; GFX10-NEXT:    v_add_co_ci_u32_e32 v5, vcc_lo, v1, v3, vcc_lo4532; GFX10-NEXT:    v_cmp_gt_i64_e64 s4, 0, v[2:3]4533; GFX10-NEXT:    v_ashrrev_i32_e32 v6, 31, v54534; GFX10-NEXT:    v_cmp_lt_i64_e32 vcc_lo, v[4:5], v[0:1]4535; GFX10-NEXT:    v_add_nc_u32_e32 v1, 0x80000000, v64536; GFX10-NEXT:    s_xor_b32 vcc_lo, s4, vcc_lo4537; GFX10-NEXT:    v_cndmask_b32_e32 v0, v4, v6, vcc_lo4538; GFX10-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc_lo4539; GFX10-NEXT:    s_setpc_b64 s[30:31]4540;4541; GFX11-LABEL: v_saddsat_i64:4542; GFX11:       ; %bb.0:4543; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4544; GFX11-NEXT:    v_add_co_u32 v4, vcc_lo, v0, v24545; GFX11-NEXT:    v_add_co_ci_u32_e64 v5, null, v1, v3, vcc_lo4546; GFX11-NEXT:    v_cmp_gt_i64_e64 s0, 0, v[2:3]4547; GFX11-NEXT:    v_ashrrev_i32_e32 v6, 31, v54548; GFX11-NEXT:    v_cmp_lt_i64_e32 vcc_lo, v[4:5], v[0:1]4549; GFX11-NEXT:    v_add_nc_u32_e32 v1, 0x80000000, v64550; GFX11-NEXT:    s_xor_b32 vcc_lo, s0, vcc_lo4551; GFX11-NEXT:    v_dual_cndmask_b32 v0, v4, v6 :: v_dual_cndmask_b32 v1, v5, v14552; GFX11-NEXT:    s_setpc_b64 s[30:31]4553  %result = call i64 @llvm.sadd.sat.i64(i64 %lhs, i64 %rhs)4554  ret i64 %result4555}4556 4557define amdgpu_ps i64 @s_saddsat_i64(i64 inreg %lhs, i64 inreg %rhs) {4558; GFX6-LABEL: s_saddsat_i64:4559; GFX6:       ; %bb.0:4560; GFX6-NEXT:    s_add_u32 s4, s0, s24561; GFX6-NEXT:    v_mov_b32_e32 v0, s04562; GFX6-NEXT:    s_addc_u32 s5, s1, s34563; GFX6-NEXT:    v_mov_b32_e32 v1, s14564; GFX6-NEXT:    v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1]4565; GFX6-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[2:3], 04566; GFX6-NEXT:    s_ashr_i32 s2, s5, 314567; GFX6-NEXT:    s_add_i32 s3, s2, 0x800000004568; GFX6-NEXT:    v_mov_b32_e32 v0, s24569; GFX6-NEXT:    v_mov_b32_e32 v1, s34570; GFX6-NEXT:    v_mov_b32_e32 v2, s44571; GFX6-NEXT:    v_mov_b32_e32 v3, s54572; GFX6-NEXT:    s_xor_b64 vcc, s[0:1], vcc4573; GFX6-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc4574; GFX6-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc4575; GFX6-NEXT:    v_readfirstlane_b32 s0, v04576; GFX6-NEXT:    v_readfirstlane_b32 s1, v14577; GFX6-NEXT:    ; return to shader part epilog4578;4579; GFX8-LABEL: s_saddsat_i64:4580; GFX8:       ; %bb.0:4581; GFX8-NEXT:    s_add_u32 s4, s0, s24582; GFX8-NEXT:    v_mov_b32_e32 v0, s04583; GFX8-NEXT:    s_addc_u32 s5, s1, s34584; GFX8-NEXT:    v_mov_b32_e32 v1, s14585; GFX8-NEXT:    v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1]4586; GFX8-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[2:3], 04587; GFX8-NEXT:    s_ashr_i32 s2, s5, 314588; GFX8-NEXT:    s_add_i32 s3, s2, 0x800000004589; GFX8-NEXT:    v_mov_b32_e32 v0, s24590; GFX8-NEXT:    v_mov_b32_e32 v1, s34591; GFX8-NEXT:    v_mov_b32_e32 v2, s44592; GFX8-NEXT:    v_mov_b32_e32 v3, s54593; GFX8-NEXT:    s_xor_b64 vcc, s[0:1], vcc4594; GFX8-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc4595; GFX8-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc4596; GFX8-NEXT:    v_readfirstlane_b32 s0, v04597; GFX8-NEXT:    v_readfirstlane_b32 s1, v14598; GFX8-NEXT:    ; return to shader part epilog4599;4600; GFX9-LABEL: s_saddsat_i64:4601; GFX9:       ; %bb.0:4602; GFX9-NEXT:    s_add_u32 s4, s0, s24603; GFX9-NEXT:    v_mov_b32_e32 v0, s04604; GFX9-NEXT:    s_addc_u32 s5, s1, s34605; GFX9-NEXT:    v_mov_b32_e32 v1, s14606; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1]4607; GFX9-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[2:3], 04608; GFX9-NEXT:    s_ashr_i32 s2, s5, 314609; GFX9-NEXT:    s_add_i32 s3, s2, 0x800000004610; GFX9-NEXT:    v_mov_b32_e32 v0, s24611; GFX9-NEXT:    v_mov_b32_e32 v1, s34612; GFX9-NEXT:    v_mov_b32_e32 v2, s44613; GFX9-NEXT:    v_mov_b32_e32 v3, s54614; GFX9-NEXT:    s_xor_b64 vcc, s[0:1], vcc4615; GFX9-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc4616; GFX9-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc4617; GFX9-NEXT:    v_readfirstlane_b32 s0, v04618; GFX9-NEXT:    v_readfirstlane_b32 s1, v14619; GFX9-NEXT:    ; return to shader part epilog4620;4621; GFX10-LABEL: s_saddsat_i64:4622; GFX10:       ; %bb.0:4623; GFX10-NEXT:    s_add_u32 s4, s0, s24624; GFX10-NEXT:    s_addc_u32 s5, s1, s34625; GFX10-NEXT:    v_mov_b32_e32 v0, s44626; GFX10-NEXT:    v_cmp_lt_i64_e64 s0, s[4:5], s[0:1]4627; GFX10-NEXT:    v_cmp_lt_i64_e64 s1, s[2:3], 04628; GFX10-NEXT:    v_mov_b32_e32 v1, s54629; GFX10-NEXT:    s_ashr_i32 s2, s5, 314630; GFX10-NEXT:    s_add_i32 s3, s2, 0x800000004631; GFX10-NEXT:    s_xor_b32 s0, s1, s04632; GFX10-NEXT:    v_cndmask_b32_e64 v0, v0, s2, s04633; GFX10-NEXT:    v_cndmask_b32_e64 v1, v1, s3, s04634; GFX10-NEXT:    v_readfirstlane_b32 s0, v04635; GFX10-NEXT:    v_readfirstlane_b32 s1, v14636; GFX10-NEXT:    ; return to shader part epilog4637;4638; GFX11-LABEL: s_saddsat_i64:4639; GFX11:       ; %bb.0:4640; GFX11-NEXT:    s_add_u32 s4, s0, s24641; GFX11-NEXT:    s_addc_u32 s5, s1, s34642; GFX11-NEXT:    v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s54643; GFX11-NEXT:    v_cmp_lt_i64_e64 s0, s[4:5], s[0:1]4644; GFX11-NEXT:    v_cmp_lt_i64_e64 s1, s[2:3], 04645; GFX11-NEXT:    s_ashr_i32 s2, s5, 314646; GFX11-NEXT:    s_add_i32 s3, s2, 0x800000004647; GFX11-NEXT:    s_xor_b32 s0, s1, s04648; GFX11-NEXT:    v_cndmask_b32_e64 v0, v0, s2, s04649; GFX11-NEXT:    v_cndmask_b32_e64 v1, v1, s3, s04650; GFX11-NEXT:    v_readfirstlane_b32 s0, v04651; GFX11-NEXT:    v_readfirstlane_b32 s1, v14652; GFX11-NEXT:    ; return to shader part epilog4653  %result = call i64 @llvm.sadd.sat.i64(i64 %lhs, i64 %rhs)4654  ret i64 %result4655}4656 4657define amdgpu_ps <2 x float> @saddsat_i64_sv(i64 inreg %lhs, i64 %rhs) {4658; GFX6-LABEL: saddsat_i64_sv:4659; GFX6:       ; %bb.0:4660; GFX6-NEXT:    v_mov_b32_e32 v3, s14661; GFX6-NEXT:    v_add_i32_e32 v2, vcc, s0, v04662; GFX6-NEXT:    v_addc_u32_e32 v3, vcc, v3, v1, vcc4663; GFX6-NEXT:    v_cmp_gt_i64_e64 s[0:1], s[0:1], v[2:3]4664; GFX6-NEXT:    v_cmp_gt_i64_e64 s[2:3], 0, v[0:1]4665; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 31, v34666; GFX6-NEXT:    v_add_i32_e32 v1, vcc, 0x80000000, v04667; GFX6-NEXT:    s_xor_b64 vcc, s[2:3], s[0:1]4668; GFX6-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc4669; GFX6-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc4670; GFX6-NEXT:    ; return to shader part epilog4671;4672; GFX8-LABEL: saddsat_i64_sv:4673; GFX8:       ; %bb.0:4674; GFX8-NEXT:    v_mov_b32_e32 v3, s14675; GFX8-NEXT:    v_add_u32_e32 v2, vcc, s0, v04676; GFX8-NEXT:    v_addc_u32_e32 v3, vcc, v3, v1, vcc4677; GFX8-NEXT:    v_cmp_gt_i64_e64 s[0:1], s[0:1], v[2:3]4678; GFX8-NEXT:    v_cmp_gt_i64_e64 s[2:3], 0, v[0:1]4679; GFX8-NEXT:    v_ashrrev_i32_e32 v0, 31, v34680; GFX8-NEXT:    v_add_u32_e32 v1, vcc, 0x80000000, v04681; GFX8-NEXT:    s_xor_b64 vcc, s[2:3], s[0:1]4682; GFX8-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc4683; GFX8-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc4684; GFX8-NEXT:    ; return to shader part epilog4685;4686; GFX9-LABEL: saddsat_i64_sv:4687; GFX9:       ; %bb.0:4688; GFX9-NEXT:    v_mov_b32_e32 v3, s14689; GFX9-NEXT:    v_add_co_u32_e32 v2, vcc, s0, v04690; GFX9-NEXT:    v_addc_co_u32_e32 v3, vcc, v3, v1, vcc4691; GFX9-NEXT:    v_cmp_gt_i64_e32 vcc, s[0:1], v[2:3]4692; GFX9-NEXT:    v_cmp_gt_i64_e64 s[0:1], 0, v[0:1]4693; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 31, v34694; GFX9-NEXT:    v_add_u32_e32 v1, 0x80000000, v04695; GFX9-NEXT:    s_xor_b64 vcc, s[0:1], vcc4696; GFX9-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc4697; GFX9-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc4698; GFX9-NEXT:    ; return to shader part epilog4699;4700; GFX10-LABEL: saddsat_i64_sv:4701; GFX10:       ; %bb.0:4702; GFX10-NEXT:    v_add_co_u32 v2, vcc_lo, s0, v04703; GFX10-NEXT:    v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo4704; GFX10-NEXT:    v_ashrrev_i32_e32 v4, 31, v34705; GFX10-NEXT:    v_cmp_gt_i64_e32 vcc_lo, s[0:1], v[2:3]4706; GFX10-NEXT:    v_cmp_gt_i64_e64 s0, 0, v[0:1]4707; GFX10-NEXT:    v_add_nc_u32_e32 v1, 0x80000000, v44708; GFX10-NEXT:    s_xor_b32 vcc_lo, s0, vcc_lo4709; GFX10-NEXT:    v_cndmask_b32_e32 v0, v2, v4, vcc_lo4710; GFX10-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc_lo4711; GFX10-NEXT:    ; return to shader part epilog4712;4713; GFX11-LABEL: saddsat_i64_sv:4714; GFX11:       ; %bb.0:4715; GFX11-NEXT:    v_add_co_u32 v2, vcc_lo, s0, v04716; GFX11-NEXT:    v_add_co_ci_u32_e64 v3, null, s1, v1, vcc_lo4717; GFX11-NEXT:    v_ashrrev_i32_e32 v4, 31, v34718; GFX11-NEXT:    v_cmp_gt_i64_e32 vcc_lo, s[0:1], v[2:3]4719; GFX11-NEXT:    v_cmp_gt_i64_e64 s0, 0, v[0:1]4720; GFX11-NEXT:    v_add_nc_u32_e32 v1, 0x80000000, v44721; GFX11-NEXT:    s_xor_b32 vcc_lo, s0, vcc_lo4722; GFX11-NEXT:    v_dual_cndmask_b32 v0, v2, v4 :: v_dual_cndmask_b32 v1, v3, v14723; GFX11-NEXT:    ; return to shader part epilog4724  %result = call i64 @llvm.sadd.sat.i64(i64 %lhs, i64 %rhs)4725  %cast = bitcast i64 %result to <2 x float>4726  ret <2 x float> %cast4727}4728 4729define amdgpu_ps <2 x float> @saddsat_i64_vs(i64 %lhs, i64 inreg %rhs) {4730; GFX6-LABEL: saddsat_i64_vs:4731; GFX6:       ; %bb.0:4732; GFX6-NEXT:    v_mov_b32_e32 v3, s14733; GFX6-NEXT:    v_add_i32_e32 v2, vcc, s0, v04734; GFX6-NEXT:    v_addc_u32_e32 v3, vcc, v1, v3, vcc4735; GFX6-NEXT:    v_cmp_lt_i64_e64 s[2:3], v[2:3], v[0:1]4736; GFX6-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[0:1], 04737; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 31, v34738; GFX6-NEXT:    v_add_i32_e32 v1, vcc, 0x80000000, v04739; GFX6-NEXT:    s_xor_b64 vcc, s[0:1], s[2:3]4740; GFX6-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc4741; GFX6-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc4742; GFX6-NEXT:    ; return to shader part epilog4743;4744; GFX8-LABEL: saddsat_i64_vs:4745; GFX8:       ; %bb.0:4746; GFX8-NEXT:    v_mov_b32_e32 v3, s14747; GFX8-NEXT:    v_add_u32_e32 v2, vcc, s0, v04748; GFX8-NEXT:    v_addc_u32_e32 v3, vcc, v1, v3, vcc4749; GFX8-NEXT:    v_cmp_lt_i64_e64 s[2:3], v[2:3], v[0:1]4750; GFX8-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[0:1], 04751; GFX8-NEXT:    v_ashrrev_i32_e32 v0, 31, v34752; GFX8-NEXT:    v_add_u32_e32 v1, vcc, 0x80000000, v04753; GFX8-NEXT:    s_xor_b64 vcc, s[0:1], s[2:3]4754; GFX8-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc4755; GFX8-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc4756; GFX8-NEXT:    ; return to shader part epilog4757;4758; GFX9-LABEL: saddsat_i64_vs:4759; GFX9:       ; %bb.0:4760; GFX9-NEXT:    v_mov_b32_e32 v3, s14761; GFX9-NEXT:    v_add_co_u32_e32 v2, vcc, s0, v04762; GFX9-NEXT:    v_addc_co_u32_e32 v3, vcc, v1, v3, vcc4763; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, v[2:3], v[0:1]4764; GFX9-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[0:1], 04765; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 31, v34766; GFX9-NEXT:    v_add_u32_e32 v1, 0x80000000, v04767; GFX9-NEXT:    s_xor_b64 vcc, s[0:1], vcc4768; GFX9-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc4769; GFX9-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc4770; GFX9-NEXT:    ; return to shader part epilog4771;4772; GFX10-LABEL: saddsat_i64_vs:4773; GFX10:       ; %bb.0:4774; GFX10-NEXT:    v_add_co_u32 v2, vcc_lo, v0, s04775; GFX10-NEXT:    v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo4776; GFX10-NEXT:    v_cmp_lt_i64_e64 s0, s[0:1], 04777; GFX10-NEXT:    v_ashrrev_i32_e32 v4, 31, v34778; GFX10-NEXT:    v_cmp_lt_i64_e32 vcc_lo, v[2:3], v[0:1]4779; GFX10-NEXT:    v_add_nc_u32_e32 v1, 0x80000000, v44780; GFX10-NEXT:    s_xor_b32 vcc_lo, s0, vcc_lo4781; GFX10-NEXT:    v_cndmask_b32_e32 v0, v2, v4, vcc_lo4782; GFX10-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc_lo4783; GFX10-NEXT:    ; return to shader part epilog4784;4785; GFX11-LABEL: saddsat_i64_vs:4786; GFX11:       ; %bb.0:4787; GFX11-NEXT:    v_add_co_u32 v2, vcc_lo, v0, s04788; GFX11-NEXT:    v_add_co_ci_u32_e64 v3, null, s1, v1, vcc_lo4789; GFX11-NEXT:    v_cmp_lt_i64_e64 s0, s[0:1], 04790; GFX11-NEXT:    v_ashrrev_i32_e32 v4, 31, v34791; GFX11-NEXT:    v_cmp_lt_i64_e32 vcc_lo, v[2:3], v[0:1]4792; GFX11-NEXT:    v_add_nc_u32_e32 v1, 0x80000000, v44793; GFX11-NEXT:    s_xor_b32 vcc_lo, s0, vcc_lo4794; GFX11-NEXT:    v_dual_cndmask_b32 v0, v2, v4 :: v_dual_cndmask_b32 v1, v3, v14795; GFX11-NEXT:    ; return to shader part epilog4796  %result = call i64 @llvm.sadd.sat.i64(i64 %lhs, i64 %rhs)4797  %cast = bitcast i64 %result to <2 x float>4798  ret <2 x float> %cast4799}4800 4801define <2 x i64> @v_saddsat_v2i64(<2 x i64> %lhs, <2 x i64> %rhs) {4802; GFX6-LABEL: v_saddsat_v2i64:4803; GFX6:       ; %bb.0:4804; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4805; GFX6-NEXT:    v_add_i32_e32 v8, vcc, v0, v44806; GFX6-NEXT:    v_addc_u32_e32 v9, vcc, v1, v5, vcc4807; GFX6-NEXT:    v_cmp_lt_i64_e64 s[4:5], v[8:9], v[0:1]4808; GFX6-NEXT:    v_cmp_gt_i64_e64 s[6:7], 0, v[4:5]4809; GFX6-NEXT:    v_ashrrev_i32_e32 v0, 31, v94810; GFX6-NEXT:    v_bfrev_b32_e32 v1, 14811; GFX6-NEXT:    v_add_i32_e32 v1, vcc, v0, v14812; GFX6-NEXT:    s_xor_b64 vcc, s[6:7], s[4:5]4813; GFX6-NEXT:    v_cndmask_b32_e32 v0, v8, v0, vcc4814; GFX6-NEXT:    v_cndmask_b32_e32 v1, v9, v1, vcc4815; GFX6-NEXT:    v_add_i32_e32 v4, vcc, v2, v64816; GFX6-NEXT:    v_addc_u32_e32 v5, vcc, v3, v7, vcc4817; GFX6-NEXT:    v_cmp_lt_i64_e64 s[4:5], v[4:5], v[2:3]4818; GFX6-NEXT:    v_cmp_gt_i64_e64 s[6:7], 0, v[6:7]4819; GFX6-NEXT:    v_ashrrev_i32_e32 v2, 31, v54820; GFX6-NEXT:    v_add_i32_e32 v3, vcc, 0x80000000, v24821; GFX6-NEXT:    s_xor_b64 vcc, s[6:7], s[4:5]4822; GFX6-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc4823; GFX6-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc4824; GFX6-NEXT:    s_setpc_b64 s[30:31]4825;4826; GFX8-LABEL: v_saddsat_v2i64:4827; GFX8:       ; %bb.0:4828; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4829; GFX8-NEXT:    v_add_u32_e32 v8, vcc, v0, v44830; GFX8-NEXT:    v_addc_u32_e32 v9, vcc, v1, v5, vcc4831; GFX8-NEXT:    v_cmp_lt_i64_e64 s[4:5], v[8:9], v[0:1]4832; GFX8-NEXT:    v_cmp_gt_i64_e64 s[6:7], 0, v[4:5]4833; GFX8-NEXT:    v_ashrrev_i32_e32 v0, 31, v94834; GFX8-NEXT:    v_bfrev_b32_e32 v1, 14835; GFX8-NEXT:    v_add_u32_e32 v1, vcc, v0, v14836; GFX8-NEXT:    s_xor_b64 vcc, s[6:7], s[4:5]4837; GFX8-NEXT:    v_cndmask_b32_e32 v0, v8, v0, vcc4838; GFX8-NEXT:    v_cndmask_b32_e32 v1, v9, v1, vcc4839; GFX8-NEXT:    v_add_u32_e32 v4, vcc, v2, v64840; GFX8-NEXT:    v_addc_u32_e32 v5, vcc, v3, v7, vcc4841; GFX8-NEXT:    v_cmp_lt_i64_e64 s[4:5], v[4:5], v[2:3]4842; GFX8-NEXT:    v_cmp_gt_i64_e64 s[6:7], 0, v[6:7]4843; GFX8-NEXT:    v_ashrrev_i32_e32 v2, 31, v54844; GFX8-NEXT:    v_add_u32_e32 v3, vcc, 0x80000000, v24845; GFX8-NEXT:    s_xor_b64 vcc, s[6:7], s[4:5]4846; GFX8-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc4847; GFX8-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc4848; GFX8-NEXT:    s_setpc_b64 s[30:31]4849;4850; GFX9-LABEL: v_saddsat_v2i64:4851; GFX9:       ; %bb.0:4852; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4853; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v0, v44854; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v1, v5, vcc4855; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, v[8:9], v[0:1]4856; GFX9-NEXT:    v_cmp_gt_i64_e64 s[4:5], 0, v[4:5]4857; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 31, v94858; GFX9-NEXT:    v_add_u32_e32 v1, 0x80000000, v04859; GFX9-NEXT:    s_xor_b64 vcc, s[4:5], vcc4860; GFX9-NEXT:    v_cndmask_b32_e32 v0, v8, v0, vcc4861; GFX9-NEXT:    v_cndmask_b32_e32 v1, v9, v1, vcc4862; GFX9-NEXT:    v_add_co_u32_e32 v4, vcc, v2, v64863; GFX9-NEXT:    v_addc_co_u32_e32 v5, vcc, v3, v7, vcc4864; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, v[4:5], v[2:3]4865; GFX9-NEXT:    v_cmp_gt_i64_e64 s[4:5], 0, v[6:7]4866; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 31, v54867; GFX9-NEXT:    v_add_u32_e32 v3, 0x80000000, v24868; GFX9-NEXT:    s_xor_b64 vcc, s[4:5], vcc4869; GFX9-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc4870; GFX9-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc4871; GFX9-NEXT:    s_setpc_b64 s[30:31]4872;4873; GFX10-LABEL: v_saddsat_v2i64:4874; GFX10:       ; %bb.0:4875; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4876; GFX10-NEXT:    v_add_co_u32 v8, vcc_lo, v0, v44877; GFX10-NEXT:    v_add_co_ci_u32_e32 v9, vcc_lo, v1, v5, vcc_lo4878; GFX10-NEXT:    v_add_co_u32 v10, vcc_lo, v2, v64879; GFX10-NEXT:    v_add_co_ci_u32_e32 v11, vcc_lo, v3, v7, vcc_lo4880; GFX10-NEXT:    v_ashrrev_i32_e32 v12, 31, v94881; GFX10-NEXT:    v_cmp_lt_i64_e32 vcc_lo, v[8:9], v[0:1]4882; GFX10-NEXT:    v_cmp_gt_i64_e64 s4, 0, v[4:5]4883; GFX10-NEXT:    v_ashrrev_i32_e32 v4, 31, v114884; GFX10-NEXT:    v_cmp_lt_i64_e64 s5, v[10:11], v[2:3]4885; GFX10-NEXT:    v_cmp_gt_i64_e64 s6, 0, v[6:7]4886; GFX10-NEXT:    v_add_nc_u32_e32 v1, 0x80000000, v124887; GFX10-NEXT:    v_add_nc_u32_e32 v3, 0x80000000, v44888; GFX10-NEXT:    s_xor_b32 vcc_lo, s4, vcc_lo4889; GFX10-NEXT:    v_cndmask_b32_e32 v0, v8, v12, vcc_lo4890; GFX10-NEXT:    v_cndmask_b32_e32 v1, v9, v1, vcc_lo4891; GFX10-NEXT:    s_xor_b32 vcc_lo, s6, s54892; GFX10-NEXT:    v_cndmask_b32_e32 v2, v10, v4, vcc_lo4893; GFX10-NEXT:    v_cndmask_b32_e32 v3, v11, v3, vcc_lo4894; GFX10-NEXT:    s_setpc_b64 s[30:31]4895;4896; GFX11-LABEL: v_saddsat_v2i64:4897; GFX11:       ; %bb.0:4898; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4899; GFX11-NEXT:    v_add_co_u32 v8, vcc_lo, v0, v44900; GFX11-NEXT:    v_add_co_ci_u32_e64 v9, null, v1, v5, vcc_lo4901; GFX11-NEXT:    v_add_co_u32 v10, vcc_lo, v2, v64902; GFX11-NEXT:    v_add_co_ci_u32_e64 v11, null, v3, v7, vcc_lo4903; GFX11-NEXT:    v_ashrrev_i32_e32 v12, 31, v94904; GFX11-NEXT:    v_cmp_lt_i64_e32 vcc_lo, v[8:9], v[0:1]4905; GFX11-NEXT:    v_cmp_gt_i64_e64 s0, 0, v[4:5]4906; GFX11-NEXT:    v_ashrrev_i32_e32 v4, 31, v114907; GFX11-NEXT:    v_cmp_lt_i64_e64 s1, v[10:11], v[2:3]4908; GFX11-NEXT:    v_cmp_gt_i64_e64 s2, 0, v[6:7]4909; GFX11-NEXT:    v_add_nc_u32_e32 v1, 0x80000000, v124910; GFX11-NEXT:    v_add_nc_u32_e32 v3, 0x80000000, v44911; GFX11-NEXT:    s_xor_b32 vcc_lo, s0, vcc_lo4912; GFX11-NEXT:    v_dual_cndmask_b32 v0, v8, v12 :: v_dual_cndmask_b32 v1, v9, v14913; GFX11-NEXT:    s_xor_b32 vcc_lo, s2, s14914; GFX11-NEXT:    v_dual_cndmask_b32 v2, v10, v4 :: v_dual_cndmask_b32 v3, v11, v34915; GFX11-NEXT:    s_setpc_b64 s[30:31]4916  %result = call <2 x i64> @llvm.sadd.sat.v2i64(<2 x i64> %lhs, <2 x i64> %rhs)4917  ret <2 x i64> %result4918}4919 4920define amdgpu_ps <2 x i64> @s_saddsat_v2i64(<2 x i64> inreg %lhs, <2 x i64> inreg %rhs) {4921; GFX6-LABEL: s_saddsat_v2i64:4922; GFX6:       ; %bb.0:4923; GFX6-NEXT:    s_add_u32 s8, s0, s44924; GFX6-NEXT:    v_mov_b32_e32 v0, s04925; GFX6-NEXT:    s_addc_u32 s9, s1, s54926; GFX6-NEXT:    v_mov_b32_e32 v1, s14927; GFX6-NEXT:    v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1]4928; GFX6-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[4:5], 04929; GFX6-NEXT:    s_ashr_i32 s4, s9, 314930; GFX6-NEXT:    s_add_i32 s5, s4, 0x800000004931; GFX6-NEXT:    v_mov_b32_e32 v0, s44932; GFX6-NEXT:    v_mov_b32_e32 v1, s54933; GFX6-NEXT:    v_mov_b32_e32 v2, s84934; GFX6-NEXT:    v_mov_b32_e32 v3, s94935; GFX6-NEXT:    s_xor_b64 vcc, s[0:1], vcc4936; GFX6-NEXT:    v_cndmask_b32_e32 v2, v2, v0, vcc4937; GFX6-NEXT:    v_cndmask_b32_e32 v3, v3, v1, vcc4938; GFX6-NEXT:    s_add_u32 s0, s2, s64939; GFX6-NEXT:    v_mov_b32_e32 v0, s24940; GFX6-NEXT:    s_addc_u32 s1, s3, s74941; GFX6-NEXT:    v_mov_b32_e32 v1, s34942; GFX6-NEXT:    v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1]4943; GFX6-NEXT:    v_cmp_lt_i64_e64 s[2:3], s[6:7], 04944; GFX6-NEXT:    s_ashr_i32 s4, s1, 314945; GFX6-NEXT:    s_add_i32 s5, s4, 0x800000004946; GFX6-NEXT:    v_mov_b32_e32 v0, s44947; GFX6-NEXT:    v_mov_b32_e32 v1, s54948; GFX6-NEXT:    v_mov_b32_e32 v4, s04949; GFX6-NEXT:    v_mov_b32_e32 v5, s14950; GFX6-NEXT:    s_xor_b64 vcc, s[2:3], vcc4951; GFX6-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc4952; GFX6-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc4953; GFX6-NEXT:    v_readfirstlane_b32 s0, v24954; GFX6-NEXT:    v_readfirstlane_b32 s1, v34955; GFX6-NEXT:    v_readfirstlane_b32 s2, v04956; GFX6-NEXT:    v_readfirstlane_b32 s3, v14957; GFX6-NEXT:    ; return to shader part epilog4958;4959; GFX8-LABEL: s_saddsat_v2i64:4960; GFX8:       ; %bb.0:4961; GFX8-NEXT:    s_add_u32 s8, s0, s44962; GFX8-NEXT:    v_mov_b32_e32 v0, s04963; GFX8-NEXT:    s_addc_u32 s9, s1, s54964; GFX8-NEXT:    v_mov_b32_e32 v1, s14965; GFX8-NEXT:    v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1]4966; GFX8-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[4:5], 04967; GFX8-NEXT:    s_ashr_i32 s4, s9, 314968; GFX8-NEXT:    s_add_i32 s5, s4, 0x800000004969; GFX8-NEXT:    v_mov_b32_e32 v0, s44970; GFX8-NEXT:    v_mov_b32_e32 v1, s54971; GFX8-NEXT:    v_mov_b32_e32 v2, s84972; GFX8-NEXT:    v_mov_b32_e32 v3, s94973; GFX8-NEXT:    s_xor_b64 vcc, s[0:1], vcc4974; GFX8-NEXT:    v_cndmask_b32_e32 v2, v2, v0, vcc4975; GFX8-NEXT:    v_cndmask_b32_e32 v3, v3, v1, vcc4976; GFX8-NEXT:    s_add_u32 s0, s2, s64977; GFX8-NEXT:    v_mov_b32_e32 v0, s24978; GFX8-NEXT:    s_addc_u32 s1, s3, s74979; GFX8-NEXT:    v_mov_b32_e32 v1, s34980; GFX8-NEXT:    v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1]4981; GFX8-NEXT:    v_cmp_lt_i64_e64 s[2:3], s[6:7], 04982; GFX8-NEXT:    s_ashr_i32 s4, s1, 314983; GFX8-NEXT:    s_add_i32 s5, s4, 0x800000004984; GFX8-NEXT:    v_mov_b32_e32 v0, s44985; GFX8-NEXT:    v_mov_b32_e32 v1, s54986; GFX8-NEXT:    v_mov_b32_e32 v4, s04987; GFX8-NEXT:    v_mov_b32_e32 v5, s14988; GFX8-NEXT:    s_xor_b64 vcc, s[2:3], vcc4989; GFX8-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc4990; GFX8-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc4991; GFX8-NEXT:    v_readfirstlane_b32 s0, v24992; GFX8-NEXT:    v_readfirstlane_b32 s1, v34993; GFX8-NEXT:    v_readfirstlane_b32 s2, v04994; GFX8-NEXT:    v_readfirstlane_b32 s3, v14995; GFX8-NEXT:    ; return to shader part epilog4996;4997; GFX9-LABEL: s_saddsat_v2i64:4998; GFX9:       ; %bb.0:4999; GFX9-NEXT:    s_add_u32 s8, s0, s45000; GFX9-NEXT:    v_mov_b32_e32 v0, s05001; GFX9-NEXT:    s_addc_u32 s9, s1, s55002; GFX9-NEXT:    v_mov_b32_e32 v1, s15003; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1]5004; GFX9-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[4:5], 05005; GFX9-NEXT:    s_ashr_i32 s4, s9, 315006; GFX9-NEXT:    s_add_i32 s5, s4, 0x800000005007; GFX9-NEXT:    v_mov_b32_e32 v0, s45008; GFX9-NEXT:    v_mov_b32_e32 v1, s55009; GFX9-NEXT:    v_mov_b32_e32 v2, s85010; GFX9-NEXT:    v_mov_b32_e32 v3, s95011; GFX9-NEXT:    s_xor_b64 vcc, s[0:1], vcc5012; GFX9-NEXT:    v_cndmask_b32_e32 v2, v2, v0, vcc5013; GFX9-NEXT:    v_cndmask_b32_e32 v3, v3, v1, vcc5014; GFX9-NEXT:    s_add_u32 s0, s2, s65015; GFX9-NEXT:    v_mov_b32_e32 v0, s25016; GFX9-NEXT:    s_addc_u32 s1, s3, s75017; GFX9-NEXT:    v_mov_b32_e32 v1, s35018; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1]5019; GFX9-NEXT:    v_cmp_lt_i64_e64 s[2:3], s[6:7], 05020; GFX9-NEXT:    s_ashr_i32 s4, s1, 315021; GFX9-NEXT:    s_add_i32 s5, s4, 0x800000005022; GFX9-NEXT:    v_mov_b32_e32 v0, s45023; GFX9-NEXT:    v_mov_b32_e32 v1, s55024; GFX9-NEXT:    v_mov_b32_e32 v4, s05025; GFX9-NEXT:    v_mov_b32_e32 v5, s15026; GFX9-NEXT:    s_xor_b64 vcc, s[2:3], vcc5027; GFX9-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc5028; GFX9-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc5029; GFX9-NEXT:    v_readfirstlane_b32 s0, v25030; GFX9-NEXT:    v_readfirstlane_b32 s1, v35031; GFX9-NEXT:    v_readfirstlane_b32 s2, v05032; GFX9-NEXT:    v_readfirstlane_b32 s3, v15033; GFX9-NEXT:    ; return to shader part epilog5034;5035; GFX10-LABEL: s_saddsat_v2i64:5036; GFX10:       ; %bb.0:5037; GFX10-NEXT:    s_add_u32 s8, s0, s45038; GFX10-NEXT:    s_addc_u32 s9, s1, s55039; GFX10-NEXT:    v_mov_b32_e32 v0, s85040; GFX10-NEXT:    v_cmp_lt_i64_e64 s0, s[8:9], s[0:1]5041; GFX10-NEXT:    v_cmp_lt_i64_e64 s1, s[4:5], 05042; GFX10-NEXT:    s_ashr_i32 s4, s9, 315043; GFX10-NEXT:    v_mov_b32_e32 v1, s95044; GFX10-NEXT:    s_add_i32 s8, s4, 0x800000005045; GFX10-NEXT:    s_xor_b32 s5, s1, s05046; GFX10-NEXT:    s_add_u32 s0, s2, s65047; GFX10-NEXT:    s_addc_u32 s1, s3, s75048; GFX10-NEXT:    v_mov_b32_e32 v2, s05049; GFX10-NEXT:    v_cmp_lt_i64_e64 s2, s[0:1], s[2:3]5050; GFX10-NEXT:    v_cmp_lt_i64_e64 s3, s[6:7], 05051; GFX10-NEXT:    v_mov_b32_e32 v3, s15052; GFX10-NEXT:    v_cndmask_b32_e64 v0, v0, s4, s55053; GFX10-NEXT:    s_ashr_i32 s4, s1, 315054; GFX10-NEXT:    v_cndmask_b32_e64 v1, v1, s8, s55055; GFX10-NEXT:    s_add_i32 s0, s4, 0x800000005056; GFX10-NEXT:    s_xor_b32 s1, s3, s25057; GFX10-NEXT:    v_cndmask_b32_e64 v2, v2, s4, s15058; GFX10-NEXT:    v_cndmask_b32_e64 v3, v3, s0, s15059; GFX10-NEXT:    v_readfirstlane_b32 s0, v05060; GFX10-NEXT:    v_readfirstlane_b32 s1, v15061; GFX10-NEXT:    v_readfirstlane_b32 s2, v25062; GFX10-NEXT:    v_readfirstlane_b32 s3, v35063; GFX10-NEXT:    ; return to shader part epilog5064;5065; GFX11-LABEL: s_saddsat_v2i64:5066; GFX11:       ; %bb.0:5067; GFX11-NEXT:    s_add_u32 s8, s0, s45068; GFX11-NEXT:    s_addc_u32 s9, s1, s55069; GFX11-NEXT:    v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s95070; GFX11-NEXT:    v_cmp_lt_i64_e64 s0, s[8:9], s[0:1]5071; GFX11-NEXT:    v_cmp_lt_i64_e64 s1, s[4:5], 05072; GFX11-NEXT:    s_ashr_i32 s4, s9, 315073; GFX11-NEXT:    s_add_i32 s8, s4, 0x800000005074; GFX11-NEXT:    s_xor_b32 s5, s1, s05075; GFX11-NEXT:    s_add_u32 s0, s2, s65076; GFX11-NEXT:    s_addc_u32 s1, s3, s75077; GFX11-NEXT:    v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s15078; GFX11-NEXT:    v_cmp_lt_i64_e64 s2, s[0:1], s[2:3]5079; GFX11-NEXT:    v_cmp_lt_i64_e64 s3, s[6:7], 05080; GFX11-NEXT:    v_cndmask_b32_e64 v0, v0, s4, s55081; GFX11-NEXT:    s_ashr_i32 s4, s1, 315082; GFX11-NEXT:    v_cndmask_b32_e64 v1, v1, s8, s55083; GFX11-NEXT:    s_add_i32 s0, s4, 0x800000005084; GFX11-NEXT:    s_xor_b32 s1, s3, s25085; GFX11-NEXT:    v_cndmask_b32_e64 v2, v2, s4, s15086; GFX11-NEXT:    v_cndmask_b32_e64 v3, v3, s0, s15087; GFX11-NEXT:    v_readfirstlane_b32 s0, v05088; GFX11-NEXT:    v_readfirstlane_b32 s1, v15089; GFX11-NEXT:    v_readfirstlane_b32 s2, v25090; GFX11-NEXT:    v_readfirstlane_b32 s3, v35091; GFX11-NEXT:    ; return to shader part epilog5092  %result = call <2 x i64> @llvm.sadd.sat.v2i64(<2 x i64> %lhs, <2 x i64> %rhs)5093  ret <2 x i64> %result5094}5095 5096define amdgpu_ps i128 @s_saddsat_i128(i128 inreg %lhs, i128 inreg %rhs) {5097; GFX6-LABEL: s_saddsat_i128:5098; GFX6:       ; %bb.0:5099; GFX6-NEXT:    s_add_u32 s4, s0, s45100; GFX6-NEXT:    v_mov_b32_e32 v0, s05101; GFX6-NEXT:    s_addc_u32 s5, s1, s55102; GFX6-NEXT:    v_mov_b32_e32 v1, s15103; GFX6-NEXT:    s_addc_u32 s8, s2, s65104; GFX6-NEXT:    v_mov_b32_e32 v2, s25105; GFX6-NEXT:    v_cmp_lt_u64_e32 vcc, s[4:5], v[0:1]5106; GFX6-NEXT:    s_addc_u32 s9, s3, s75107; GFX6-NEXT:    v_mov_b32_e32 v3, s35108; GFX6-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc5109; GFX6-NEXT:    v_cmp_lt_i64_e32 vcc, s[8:9], v[2:3]5110; GFX6-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[6:7], 05111; GFX6-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5112; GFX6-NEXT:    v_cmp_eq_u64_e32 vcc, s[8:9], v[2:3]5113; GFX6-NEXT:    v_mov_b32_e32 v2, s45114; GFX6-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc5115; GFX6-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[0:1]5116; GFX6-NEXT:    v_cmp_eq_u64_e64 s[0:1], s[6:7], 05117; GFX6-NEXT:    v_mov_b32_e32 v3, s55118; GFX6-NEXT:    v_cndmask_b32_e64 v1, v1, 0, s[0:1]5119; GFX6-NEXT:    v_xor_b32_e32 v0, v1, v05120; GFX6-NEXT:    s_ashr_i32 s0, s9, 315121; GFX6-NEXT:    v_and_b32_e32 v0, 1, v05122; GFX6-NEXT:    s_add_i32 s1, s0, 0x800000005123; GFX6-NEXT:    v_mov_b32_e32 v1, s05124; GFX6-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v05125; GFX6-NEXT:    v_cndmask_b32_e32 v0, v2, v1, vcc5126; GFX6-NEXT:    v_cndmask_b32_e32 v2, v3, v1, vcc5127; GFX6-NEXT:    v_mov_b32_e32 v3, s15128; GFX6-NEXT:    v_mov_b32_e32 v4, s85129; GFX6-NEXT:    v_mov_b32_e32 v5, s95130; GFX6-NEXT:    v_cndmask_b32_e32 v1, v4, v1, vcc5131; GFX6-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc5132; GFX6-NEXT:    v_readfirstlane_b32 s0, v05133; GFX6-NEXT:    v_readfirstlane_b32 s1, v25134; GFX6-NEXT:    v_readfirstlane_b32 s2, v15135; GFX6-NEXT:    v_readfirstlane_b32 s3, v35136; GFX6-NEXT:    ; return to shader part epilog5137;5138; GFX8-LABEL: s_saddsat_i128:5139; GFX8:       ; %bb.0:5140; GFX8-NEXT:    s_add_u32 s4, s0, s45141; GFX8-NEXT:    s_addc_u32 s5, s1, s55142; GFX8-NEXT:    v_mov_b32_e32 v0, s05143; GFX8-NEXT:    s_addc_u32 s8, s2, s65144; GFX8-NEXT:    v_mov_b32_e32 v1, s15145; GFX8-NEXT:    s_addc_u32 s9, s3, s75146; GFX8-NEXT:    v_mov_b32_e32 v2, s25147; GFX8-NEXT:    v_cmp_lt_u64_e32 vcc, s[4:5], v[0:1]5148; GFX8-NEXT:    v_mov_b32_e32 v3, s35149; GFX8-NEXT:    s_cmp_eq_u64 s[8:9], s[2:3]5150; GFX8-NEXT:    s_cselect_b32 s0, 1, 05151; GFX8-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc5152; GFX8-NEXT:    v_cmp_lt_i64_e32 vcc, s[8:9], v[2:3]5153; GFX8-NEXT:    s_and_b32 s0, 1, s05154; GFX8-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5155; GFX8-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s05156; GFX8-NEXT:    s_cmp_eq_u64 s[6:7], 05157; GFX8-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[6:7], 05158; GFX8-NEXT:    s_cselect_b32 s2, 1, 05159; GFX8-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc5160; GFX8-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[0:1]5161; GFX8-NEXT:    s_and_b32 s0, 1, s25162; GFX8-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, s05163; GFX8-NEXT:    v_cndmask_b32_e64 v1, v1, 0, s[0:1]5164; GFX8-NEXT:    v_xor_b32_e32 v0, v1, v05165; GFX8-NEXT:    s_ashr_i32 s0, s9, 315166; GFX8-NEXT:    v_and_b32_e32 v0, 1, v05167; GFX8-NEXT:    s_add_i32 s1, s0, 0x800000005168; GFX8-NEXT:    v_mov_b32_e32 v1, s05169; GFX8-NEXT:    v_mov_b32_e32 v2, s45170; GFX8-NEXT:    v_mov_b32_e32 v3, s55171; GFX8-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v05172; GFX8-NEXT:    v_cndmask_b32_e32 v0, v2, v1, vcc5173; GFX8-NEXT:    v_cndmask_b32_e32 v2, v3, v1, vcc5174; GFX8-NEXT:    v_mov_b32_e32 v3, s15175; GFX8-NEXT:    v_mov_b32_e32 v4, s85176; GFX8-NEXT:    v_mov_b32_e32 v5, s95177; GFX8-NEXT:    v_cndmask_b32_e32 v1, v4, v1, vcc5178; GFX8-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc5179; GFX8-NEXT:    v_readfirstlane_b32 s0, v05180; GFX8-NEXT:    v_readfirstlane_b32 s1, v25181; GFX8-NEXT:    v_readfirstlane_b32 s2, v15182; GFX8-NEXT:    v_readfirstlane_b32 s3, v35183; GFX8-NEXT:    ; return to shader part epilog5184;5185; GFX9-LABEL: s_saddsat_i128:5186; GFX9:       ; %bb.0:5187; GFX9-NEXT:    s_add_u32 s4, s0, s45188; GFX9-NEXT:    s_addc_u32 s5, s1, s55189; GFX9-NEXT:    v_mov_b32_e32 v0, s05190; GFX9-NEXT:    s_addc_u32 s8, s2, s65191; GFX9-NEXT:    v_mov_b32_e32 v1, s15192; GFX9-NEXT:    s_addc_u32 s9, s3, s75193; GFX9-NEXT:    v_mov_b32_e32 v2, s25194; GFX9-NEXT:    v_cmp_lt_u64_e32 vcc, s[4:5], v[0:1]5195; GFX9-NEXT:    v_mov_b32_e32 v3, s35196; GFX9-NEXT:    s_cmp_eq_u64 s[8:9], s[2:3]5197; GFX9-NEXT:    s_cselect_b32 s0, 1, 05198; GFX9-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc5199; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, s[8:9], v[2:3]5200; GFX9-NEXT:    s_and_b32 s0, 1, s05201; GFX9-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5202; GFX9-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s05203; GFX9-NEXT:    s_cmp_eq_u64 s[6:7], 05204; GFX9-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[6:7], 05205; GFX9-NEXT:    s_cselect_b32 s2, 1, 05206; GFX9-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc5207; GFX9-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[0:1]5208; GFX9-NEXT:    s_and_b32 s0, 1, s25209; GFX9-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, s05210; GFX9-NEXT:    v_cndmask_b32_e64 v1, v1, 0, s[0:1]5211; GFX9-NEXT:    v_xor_b32_e32 v0, v1, v05212; GFX9-NEXT:    s_ashr_i32 s0, s9, 315213; GFX9-NEXT:    v_and_b32_e32 v0, 1, v05214; GFX9-NEXT:    s_add_i32 s1, s0, 0x800000005215; GFX9-NEXT:    v_mov_b32_e32 v1, s05216; GFX9-NEXT:    v_mov_b32_e32 v2, s45217; GFX9-NEXT:    v_mov_b32_e32 v3, s55218; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v05219; GFX9-NEXT:    v_cndmask_b32_e32 v0, v2, v1, vcc5220; GFX9-NEXT:    v_cndmask_b32_e32 v2, v3, v1, vcc5221; GFX9-NEXT:    v_mov_b32_e32 v3, s15222; GFX9-NEXT:    v_mov_b32_e32 v4, s85223; GFX9-NEXT:    v_mov_b32_e32 v5, s95224; GFX9-NEXT:    v_cndmask_b32_e32 v1, v4, v1, vcc5225; GFX9-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc5226; GFX9-NEXT:    v_readfirstlane_b32 s0, v05227; GFX9-NEXT:    v_readfirstlane_b32 s1, v25228; GFX9-NEXT:    v_readfirstlane_b32 s2, v15229; GFX9-NEXT:    v_readfirstlane_b32 s3, v35230; GFX9-NEXT:    ; return to shader part epilog5231;5232; GFX10-LABEL: s_saddsat_i128:5233; GFX10:       ; %bb.0:5234; GFX10-NEXT:    s_add_u32 s4, s0, s45235; GFX10-NEXT:    s_addc_u32 s5, s1, s55236; GFX10-NEXT:    s_addc_u32 s8, s2, s65237; GFX10-NEXT:    v_cmp_lt_u64_e64 s0, s[4:5], s[0:1]5238; GFX10-NEXT:    s_addc_u32 s9, s3, s75239; GFX10-NEXT:    s_cmp_eq_u64 s[8:9], s[2:3]5240; GFX10-NEXT:    v_mov_b32_e32 v3, s95241; GFX10-NEXT:    s_cselect_b32 s10, 1, 05242; GFX10-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s05243; GFX10-NEXT:    v_cmp_lt_i64_e64 s0, s[8:9], s[2:3]5244; GFX10-NEXT:    v_cmp_lt_i64_e64 s2, s[6:7], 05245; GFX10-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s05246; GFX10-NEXT:    s_and_b32 s0, 1, s105247; GFX10-NEXT:    s_cmp_eq_u64 s[6:7], 05248; GFX10-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s25249; GFX10-NEXT:    s_cselect_b32 s1, 1, 05250; GFX10-NEXT:    v_cmp_ne_u32_e64 vcc_lo, 0, s05251; GFX10-NEXT:    s_and_b32 s1, 1, s15252; GFX10-NEXT:    v_cmp_ne_u32_e64 s0, 0, s15253; GFX10-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc_lo5254; GFX10-NEXT:    v_cndmask_b32_e64 v1, v2, 0, s05255; GFX10-NEXT:    v_mov_b32_e32 v2, s55256; GFX10-NEXT:    s_ashr_i32 s0, s9, 315257; GFX10-NEXT:    s_add_i32 s1, s0, 0x800000005258; GFX10-NEXT:    v_xor_b32_e32 v0, v1, v05259; GFX10-NEXT:    v_mov_b32_e32 v1, s45260; GFX10-NEXT:    v_and_b32_e32 v0, 1, v05261; GFX10-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v05262; GFX10-NEXT:    v_mov_b32_e32 v0, s85263; GFX10-NEXT:    v_cndmask_b32_e64 v1, v1, s0, vcc_lo5264; GFX10-NEXT:    v_cndmask_b32_e64 v2, v2, s0, vcc_lo5265; GFX10-NEXT:    v_cndmask_b32_e64 v0, v0, s0, vcc_lo5266; GFX10-NEXT:    v_cndmask_b32_e64 v3, v3, s1, vcc_lo5267; GFX10-NEXT:    v_readfirstlane_b32 s0, v15268; GFX10-NEXT:    v_readfirstlane_b32 s1, v25269; GFX10-NEXT:    v_readfirstlane_b32 s2, v05270; GFX10-NEXT:    v_readfirstlane_b32 s3, v35271; GFX10-NEXT:    ; return to shader part epilog5272;5273; GFX11-LABEL: s_saddsat_i128:5274; GFX11:       ; %bb.0:5275; GFX11-NEXT:    s_add_u32 s4, s0, s45276; GFX11-NEXT:    s_addc_u32 s5, s1, s55277; GFX11-NEXT:    s_addc_u32 s8, s2, s65278; GFX11-NEXT:    v_cmp_lt_u64_e64 s0, s[4:5], s[0:1]5279; GFX11-NEXT:    s_addc_u32 s9, s3, s75280; GFX11-NEXT:    s_cmp_eq_u64 s[8:9], s[2:3]5281; GFX11-NEXT:    v_mov_b32_e32 v3, s95282; GFX11-NEXT:    s_cselect_b32 s10, 1, 05283; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s05284; GFX11-NEXT:    v_cmp_lt_i64_e64 s0, s[8:9], s[2:3]5285; GFX11-NEXT:    v_cmp_lt_i64_e64 s2, s[6:7], 05286; GFX11-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s05287; GFX11-NEXT:    s_and_b32 s0, 1, s105288; GFX11-NEXT:    s_cmp_eq_u64 s[6:7], 05289; GFX11-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s25290; GFX11-NEXT:    s_cselect_b32 s1, 1, 05291; GFX11-NEXT:    v_cmp_ne_u32_e64 vcc_lo, 0, s05292; GFX11-NEXT:    s_and_b32 s1, 1, s15293; GFX11-NEXT:    v_cmp_ne_u32_e64 s0, 0, s15294; GFX11-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc_lo5295; GFX11-NEXT:    v_cndmask_b32_e64 v1, v2, 0, s05296; GFX11-NEXT:    v_mov_b32_e32 v2, s55297; GFX11-NEXT:    s_ashr_i32 s0, s9, 315298; GFX11-NEXT:    s_add_i32 s1, s0, 0x800000005299; GFX11-NEXT:    v_xor_b32_e32 v0, v1, v05300; GFX11-NEXT:    v_dual_mov_b32 v1, s4 :: v_dual_and_b32 v0, 1, v05301; GFX11-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v05302; GFX11-NEXT:    v_mov_b32_e32 v0, s85303; GFX11-NEXT:    v_cndmask_b32_e64 v1, v1, s0, vcc_lo5304; GFX11-NEXT:    v_cndmask_b32_e64 v2, v2, s0, vcc_lo5305; GFX11-NEXT:    v_cndmask_b32_e64 v0, v0, s0, vcc_lo5306; GFX11-NEXT:    v_cndmask_b32_e64 v3, v3, s1, vcc_lo5307; GFX11-NEXT:    v_readfirstlane_b32 s0, v15308; GFX11-NEXT:    v_readfirstlane_b32 s1, v25309; GFX11-NEXT:    v_readfirstlane_b32 s2, v05310; GFX11-NEXT:    v_readfirstlane_b32 s3, v35311; GFX11-NEXT:    ; return to shader part epilog5312  %result = call i128 @llvm.sadd.sat.i128(i128 %lhs, i128 %rhs)5313  ret i128 %result5314}5315 5316define amdgpu_ps <4 x float> @saddsat_i128_sv(i128 inreg %lhs, i128 %rhs) {5317; GFX6-LABEL: saddsat_i128_sv:5318; GFX6:       ; %bb.0:5319; GFX6-NEXT:    v_mov_b32_e32 v4, s15320; GFX6-NEXT:    v_add_i32_e32 v0, vcc, s0, v05321; GFX6-NEXT:    v_addc_u32_e32 v1, vcc, v4, v1, vcc5322; GFX6-NEXT:    v_mov_b32_e32 v4, s25323; GFX6-NEXT:    v_mov_b32_e32 v5, s35324; GFX6-NEXT:    v_addc_u32_e32 v4, vcc, v4, v2, vcc5325; GFX6-NEXT:    v_addc_u32_e32 v5, vcc, v5, v3, vcc5326; GFX6-NEXT:    v_cmp_gt_u64_e32 vcc, s[0:1], v[0:1]5327; GFX6-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc5328; GFX6-NEXT:    v_cmp_gt_i64_e32 vcc, s[2:3], v[4:5]5329; GFX6-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc5330; GFX6-NEXT:    v_cmp_eq_u64_e32 vcc, s[2:3], v[4:5]5331; GFX6-NEXT:    v_cndmask_b32_e32 v6, v7, v6, vcc5332; GFX6-NEXT:    v_cmp_gt_i64_e32 vcc, 0, v[2:3]5333; GFX6-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc5334; GFX6-NEXT:    v_cmp_eq_u64_e32 vcc, 0, v[2:3]5335; GFX6-NEXT:    v_ashrrev_i32_e32 v3, 31, v55336; GFX6-NEXT:    v_cndmask_b32_e64 v2, v7, 0, vcc5337; GFX6-NEXT:    v_xor_b32_e32 v2, v2, v65338; GFX6-NEXT:    v_bfrev_b32_e32 v6, 15339; GFX6-NEXT:    v_add_i32_e32 v6, vcc, v3, v65340; GFX6-NEXT:    v_and_b32_e32 v2, 1, v25341; GFX6-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v25342; GFX6-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc5343; GFX6-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc5344; GFX6-NEXT:    v_cndmask_b32_e32 v2, v4, v3, vcc5345; GFX6-NEXT:    v_cndmask_b32_e32 v3, v5, v6, vcc5346; GFX6-NEXT:    ; return to shader part epilog5347;5348; GFX8-LABEL: saddsat_i128_sv:5349; GFX8:       ; %bb.0:5350; GFX8-NEXT:    v_mov_b32_e32 v4, s15351; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v05352; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, v4, v1, vcc5353; GFX8-NEXT:    v_mov_b32_e32 v4, s25354; GFX8-NEXT:    v_mov_b32_e32 v5, s35355; GFX8-NEXT:    v_addc_u32_e32 v4, vcc, v4, v2, vcc5356; GFX8-NEXT:    v_addc_u32_e32 v5, vcc, v5, v3, vcc5357; GFX8-NEXT:    v_cmp_gt_u64_e32 vcc, s[0:1], v[0:1]5358; GFX8-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc5359; GFX8-NEXT:    v_cmp_gt_i64_e32 vcc, s[2:3], v[4:5]5360; GFX8-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc5361; GFX8-NEXT:    v_cmp_eq_u64_e32 vcc, s[2:3], v[4:5]5362; GFX8-NEXT:    v_cndmask_b32_e32 v6, v7, v6, vcc5363; GFX8-NEXT:    v_cmp_gt_i64_e32 vcc, 0, v[2:3]5364; GFX8-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc5365; GFX8-NEXT:    v_cmp_eq_u64_e32 vcc, 0, v[2:3]5366; GFX8-NEXT:    v_ashrrev_i32_e32 v3, 31, v55367; GFX8-NEXT:    v_cndmask_b32_e64 v2, v7, 0, vcc5368; GFX8-NEXT:    v_xor_b32_e32 v2, v2, v65369; GFX8-NEXT:    v_bfrev_b32_e32 v6, 15370; GFX8-NEXT:    v_add_u32_e32 v6, vcc, v3, v65371; GFX8-NEXT:    v_and_b32_e32 v2, 1, v25372; GFX8-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v25373; GFX8-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc5374; GFX8-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc5375; GFX8-NEXT:    v_cndmask_b32_e32 v2, v4, v3, vcc5376; GFX8-NEXT:    v_cndmask_b32_e32 v3, v5, v6, vcc5377; GFX8-NEXT:    ; return to shader part epilog5378;5379; GFX9-LABEL: saddsat_i128_sv:5380; GFX9:       ; %bb.0:5381; GFX9-NEXT:    v_mov_b32_e32 v4, s15382; GFX9-NEXT:    v_add_co_u32_e32 v0, vcc, s0, v05383; GFX9-NEXT:    v_addc_co_u32_e32 v1, vcc, v4, v1, vcc5384; GFX9-NEXT:    v_mov_b32_e32 v4, s25385; GFX9-NEXT:    v_mov_b32_e32 v5, s35386; GFX9-NEXT:    v_addc_co_u32_e32 v4, vcc, v4, v2, vcc5387; GFX9-NEXT:    v_addc_co_u32_e32 v5, vcc, v5, v3, vcc5388; GFX9-NEXT:    v_cmp_gt_u64_e32 vcc, s[0:1], v[0:1]5389; GFX9-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc5390; GFX9-NEXT:    v_cmp_gt_i64_e32 vcc, s[2:3], v[4:5]5391; GFX9-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc5392; GFX9-NEXT:    v_cmp_eq_u64_e32 vcc, s[2:3], v[4:5]5393; GFX9-NEXT:    v_cndmask_b32_e32 v6, v7, v6, vcc5394; GFX9-NEXT:    v_cmp_gt_i64_e32 vcc, 0, v[2:3]5395; GFX9-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc5396; GFX9-NEXT:    v_cmp_eq_u64_e32 vcc, 0, v[2:3]5397; GFX9-NEXT:    v_ashrrev_i32_e32 v3, 31, v55398; GFX9-NEXT:    v_cndmask_b32_e64 v2, v7, 0, vcc5399; GFX9-NEXT:    v_xor_b32_e32 v2, v2, v65400; GFX9-NEXT:    v_and_b32_e32 v2, 1, v25401; GFX9-NEXT:    v_add_u32_e32 v6, 0x80000000, v35402; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v25403; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc5404; GFX9-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc5405; GFX9-NEXT:    v_cndmask_b32_e32 v2, v4, v3, vcc5406; GFX9-NEXT:    v_cndmask_b32_e32 v3, v5, v6, vcc5407; GFX9-NEXT:    ; return to shader part epilog5408;5409; GFX10-LABEL: saddsat_i128_sv:5410; GFX10:       ; %bb.0:5411; GFX10-NEXT:    v_add_co_u32 v0, vcc_lo, s0, v05412; GFX10-NEXT:    v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo5413; GFX10-NEXT:    v_add_co_ci_u32_e32 v4, vcc_lo, s2, v2, vcc_lo5414; GFX10-NEXT:    v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo5415; GFX10-NEXT:    v_cmp_gt_u64_e32 vcc_lo, s[0:1], v[0:1]5416; GFX10-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc_lo5417; GFX10-NEXT:    v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[4:5]5418; GFX10-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc_lo5419; GFX10-NEXT:    v_cmp_gt_i64_e32 vcc_lo, 0, v[2:3]5420; GFX10-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc_lo5421; GFX10-NEXT:    v_cmp_eq_u64_e32 vcc_lo, s[2:3], v[4:5]5422; GFX10-NEXT:    v_cndmask_b32_e32 v6, v7, v6, vcc_lo5423; GFX10-NEXT:    v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]5424; GFX10-NEXT:    v_ashrrev_i32_e32 v3, 31, v55425; GFX10-NEXT:    v_cndmask_b32_e64 v2, v8, 0, vcc_lo5426; GFX10-NEXT:    v_xor_b32_e32 v2, v2, v65427; GFX10-NEXT:    v_add_nc_u32_e32 v6, 0x80000000, v35428; GFX10-NEXT:    v_and_b32_e32 v2, 1, v25429; GFX10-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v25430; GFX10-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc_lo5431; GFX10-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc_lo5432; GFX10-NEXT:    v_cndmask_b32_e32 v2, v4, v3, vcc_lo5433; GFX10-NEXT:    v_cndmask_b32_e32 v3, v5, v6, vcc_lo5434; GFX10-NEXT:    ; return to shader part epilog5435;5436; GFX11-LABEL: saddsat_i128_sv:5437; GFX11:       ; %bb.0:5438; GFX11-NEXT:    v_add_co_u32 v0, vcc_lo, s0, v05439; GFX11-NEXT:    v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo5440; GFX11-NEXT:    v_add_co_ci_u32_e32 v4, vcc_lo, s2, v2, vcc_lo5441; GFX11-NEXT:    v_add_co_ci_u32_e64 v5, null, s3, v3, vcc_lo5442; GFX11-NEXT:    v_cmp_gt_u64_e32 vcc_lo, s[0:1], v[0:1]5443; GFX11-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc_lo5444; GFX11-NEXT:    v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[4:5]5445; GFX11-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc_lo5446; GFX11-NEXT:    v_cmp_gt_i64_e32 vcc_lo, 0, v[2:3]5447; GFX11-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc_lo5448; GFX11-NEXT:    v_cmp_eq_u64_e32 vcc_lo, s[2:3], v[4:5]5449; GFX11-NEXT:    v_cndmask_b32_e32 v6, v7, v6, vcc_lo5450; GFX11-NEXT:    v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]5451; GFX11-NEXT:    v_ashrrev_i32_e32 v3, 31, v55452; GFX11-NEXT:    v_cndmask_b32_e64 v2, v8, 0, vcc_lo5453; GFX11-NEXT:    v_xor_b32_e32 v2, v2, v65454; GFX11-NEXT:    v_add_nc_u32_e32 v6, 0x80000000, v35455; GFX11-NEXT:    v_and_b32_e32 v2, 1, v25456; GFX11-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v25457; GFX11-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc_lo5458; GFX11-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc_lo5459; GFX11-NEXT:    v_dual_cndmask_b32 v2, v4, v3 :: v_dual_cndmask_b32 v3, v5, v65460; GFX11-NEXT:    ; return to shader part epilog5461  %result = call i128 @llvm.sadd.sat.i128(i128 %lhs, i128 %rhs)5462  %cast = bitcast i128 %result to <4 x float>5463  ret <4 x float> %cast5464}5465 5466define amdgpu_ps <4 x float> @saddsat_i128_vs(i128 %lhs, i128 inreg %rhs) {5467; GFX6-LABEL: saddsat_i128_vs:5468; GFX6:       ; %bb.0:5469; GFX6-NEXT:    v_mov_b32_e32 v5, s15470; GFX6-NEXT:    v_add_i32_e32 v4, vcc, s0, v05471; GFX6-NEXT:    v_addc_u32_e32 v5, vcc, v1, v5, vcc5472; GFX6-NEXT:    v_mov_b32_e32 v6, s25473; GFX6-NEXT:    v_mov_b32_e32 v7, s35474; GFX6-NEXT:    v_addc_u32_e32 v6, vcc, v2, v6, vcc5475; GFX6-NEXT:    v_addc_u32_e32 v7, vcc, v3, v7, vcc5476; GFX6-NEXT:    v_cmp_lt_u64_e32 vcc, v[4:5], v[0:1]5477; GFX6-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[2:3], 05478; GFX6-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc5479; GFX6-NEXT:    v_cmp_lt_i64_e32 vcc, v[6:7], v[2:3]5480; GFX6-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5481; GFX6-NEXT:    v_cmp_eq_u64_e32 vcc, v[6:7], v[2:3]5482; GFX6-NEXT:    v_ashrrev_i32_e32 v2, 31, v75483; GFX6-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc5484; GFX6-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[0:1]5485; GFX6-NEXT:    v_cmp_eq_u64_e64 s[0:1], s[2:3], 05486; GFX6-NEXT:    v_cndmask_b32_e64 v1, v1, 0, s[0:1]5487; GFX6-NEXT:    v_xor_b32_e32 v0, v1, v05488; GFX6-NEXT:    v_bfrev_b32_e32 v1, 15489; GFX6-NEXT:    v_add_i32_e32 v3, vcc, v2, v15490; GFX6-NEXT:    v_and_b32_e32 v0, 1, v05491; GFX6-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v05492; GFX6-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc5493; GFX6-NEXT:    v_cndmask_b32_e32 v1, v5, v2, vcc5494; GFX6-NEXT:    v_cndmask_b32_e32 v2, v6, v2, vcc5495; GFX6-NEXT:    v_cndmask_b32_e32 v3, v7, v3, vcc5496; GFX6-NEXT:    ; return to shader part epilog5497;5498; GFX8-LABEL: saddsat_i128_vs:5499; GFX8:       ; %bb.0:5500; GFX8-NEXT:    v_mov_b32_e32 v5, s15501; GFX8-NEXT:    v_add_u32_e32 v4, vcc, s0, v05502; GFX8-NEXT:    v_addc_u32_e32 v5, vcc, v1, v5, vcc5503; GFX8-NEXT:    v_mov_b32_e32 v6, s25504; GFX8-NEXT:    v_mov_b32_e32 v7, s35505; GFX8-NEXT:    v_addc_u32_e32 v6, vcc, v2, v6, vcc5506; GFX8-NEXT:    v_addc_u32_e32 v7, vcc, v3, v7, vcc5507; GFX8-NEXT:    v_cmp_lt_u64_e32 vcc, v[4:5], v[0:1]5508; GFX8-NEXT:    s_cmp_eq_u64 s[2:3], 05509; GFX8-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc5510; GFX8-NEXT:    v_cmp_lt_i64_e32 vcc, v[6:7], v[2:3]5511; GFX8-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[2:3], 05512; GFX8-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5513; GFX8-NEXT:    v_cmp_eq_u64_e32 vcc, v[6:7], v[2:3]5514; GFX8-NEXT:    s_cselect_b32 s4, 1, 05515; GFX8-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc5516; GFX8-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[0:1]5517; GFX8-NEXT:    s_and_b32 s0, 1, s45518; GFX8-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, s05519; GFX8-NEXT:    v_cndmask_b32_e64 v1, v1, 0, s[0:1]5520; GFX8-NEXT:    v_xor_b32_e32 v0, v1, v05521; GFX8-NEXT:    v_ashrrev_i32_e32 v2, 31, v75522; GFX8-NEXT:    v_bfrev_b32_e32 v1, 15523; GFX8-NEXT:    v_add_u32_e32 v3, vcc, v2, v15524; GFX8-NEXT:    v_and_b32_e32 v0, 1, v05525; GFX8-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v05526; GFX8-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc5527; GFX8-NEXT:    v_cndmask_b32_e32 v1, v5, v2, vcc5528; GFX8-NEXT:    v_cndmask_b32_e32 v2, v6, v2, vcc5529; GFX8-NEXT:    v_cndmask_b32_e32 v3, v7, v3, vcc5530; GFX8-NEXT:    ; return to shader part epilog5531;5532; GFX9-LABEL: saddsat_i128_vs:5533; GFX9:       ; %bb.0:5534; GFX9-NEXT:    v_mov_b32_e32 v5, s15535; GFX9-NEXT:    v_add_co_u32_e32 v4, vcc, s0, v05536; GFX9-NEXT:    v_addc_co_u32_e32 v5, vcc, v1, v5, vcc5537; GFX9-NEXT:    v_mov_b32_e32 v6, s25538; GFX9-NEXT:    v_mov_b32_e32 v7, s35539; GFX9-NEXT:    v_addc_co_u32_e32 v6, vcc, v2, v6, vcc5540; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, v3, v7, vcc5541; GFX9-NEXT:    v_cmp_lt_u64_e32 vcc, v[4:5], v[0:1]5542; GFX9-NEXT:    s_cmp_eq_u64 s[2:3], 05543; GFX9-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc5544; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, v[6:7], v[2:3]5545; GFX9-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[2:3], 05546; GFX9-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5547; GFX9-NEXT:    v_cmp_eq_u64_e32 vcc, v[6:7], v[2:3]5548; GFX9-NEXT:    s_cselect_b32 s4, 1, 05549; GFX9-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc5550; GFX9-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[0:1]5551; GFX9-NEXT:    s_and_b32 s0, 1, s45552; GFX9-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, s05553; GFX9-NEXT:    v_cndmask_b32_e64 v1, v1, 0, s[0:1]5554; GFX9-NEXT:    v_xor_b32_e32 v0, v1, v05555; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 31, v75556; GFX9-NEXT:    v_and_b32_e32 v0, 1, v05557; GFX9-NEXT:    v_add_u32_e32 v3, 0x80000000, v25558; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v05559; GFX9-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc5560; GFX9-NEXT:    v_cndmask_b32_e32 v1, v5, v2, vcc5561; GFX9-NEXT:    v_cndmask_b32_e32 v2, v6, v2, vcc5562; GFX9-NEXT:    v_cndmask_b32_e32 v3, v7, v3, vcc5563; GFX9-NEXT:    ; return to shader part epilog5564;5565; GFX10-LABEL: saddsat_i128_vs:5566; GFX10:       ; %bb.0:5567; GFX10-NEXT:    v_add_co_u32 v4, vcc_lo, v0, s05568; GFX10-NEXT:    v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo5569; GFX10-NEXT:    v_add_co_ci_u32_e32 v6, vcc_lo, s2, v2, vcc_lo5570; GFX10-NEXT:    v_add_co_ci_u32_e32 v7, vcc_lo, s3, v3, vcc_lo5571; GFX10-NEXT:    v_cmp_lt_u64_e32 vcc_lo, v[4:5], v[0:1]5572; GFX10-NEXT:    s_cmp_eq_u64 s[2:3], 05573; GFX10-NEXT:    v_cmp_lt_i64_e64 s1, s[2:3], 05574; GFX10-NEXT:    s_cselect_b32 s0, 1, 05575; GFX10-NEXT:    s_and_b32 s0, 1, s05576; GFX10-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo5577; GFX10-NEXT:    v_cmp_lt_i64_e32 vcc_lo, v[6:7], v[2:3]5578; GFX10-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s15579; GFX10-NEXT:    v_cmp_ne_u32_e64 s0, 0, s05580; GFX10-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo5581; GFX10-NEXT:    v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]5582; GFX10-NEXT:    v_ashrrev_i32_e32 v2, 31, v75583; GFX10-NEXT:    v_add_nc_u32_e32 v3, 0x80000000, v25584; GFX10-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc_lo5585; GFX10-NEXT:    v_cndmask_b32_e64 v1, v8, 0, s05586; GFX10-NEXT:    v_xor_b32_e32 v0, v1, v05587; GFX10-NEXT:    v_and_b32_e32 v0, 1, v05588; GFX10-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v05589; GFX10-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc_lo5590; GFX10-NEXT:    v_cndmask_b32_e32 v1, v5, v2, vcc_lo5591; GFX10-NEXT:    v_cndmask_b32_e32 v2, v6, v2, vcc_lo5592; GFX10-NEXT:    v_cndmask_b32_e32 v3, v7, v3, vcc_lo5593; GFX10-NEXT:    ; return to shader part epilog5594;5595; GFX11-LABEL: saddsat_i128_vs:5596; GFX11:       ; %bb.0:5597; GFX11-NEXT:    v_add_co_u32 v4, vcc_lo, v0, s05598; GFX11-NEXT:    v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo5599; GFX11-NEXT:    v_add_co_ci_u32_e32 v6, vcc_lo, s2, v2, vcc_lo5600; GFX11-NEXT:    v_add_co_ci_u32_e64 v7, null, s3, v3, vcc_lo5601; GFX11-NEXT:    v_cmp_lt_u64_e32 vcc_lo, v[4:5], v[0:1]5602; GFX11-NEXT:    s_cmp_eq_u64 s[2:3], 05603; GFX11-NEXT:    v_cmp_lt_i64_e64 s1, s[2:3], 05604; GFX11-NEXT:    s_cselect_b32 s0, 1, 05605; GFX11-NEXT:    s_and_b32 s0, 1, s05606; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo5607; GFX11-NEXT:    v_cmp_lt_i64_e32 vcc_lo, v[6:7], v[2:3]5608; GFX11-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s15609; GFX11-NEXT:    v_cmp_ne_u32_e64 s0, 0, s05610; GFX11-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo5611; GFX11-NEXT:    v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]5612; GFX11-NEXT:    v_ashrrev_i32_e32 v2, 31, v75613; GFX11-NEXT:    v_dual_cndmask_b32 v0, v1, v0 :: v_dual_add_nc_u32 v3, 0x80000000, v25614; GFX11-NEXT:    v_cndmask_b32_e64 v1, v8, 0, s05615; GFX11-NEXT:    v_xor_b32_e32 v0, v1, v05616; GFX11-NEXT:    v_and_b32_e32 v0, 1, v05617; GFX11-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v05618; GFX11-NEXT:    v_dual_cndmask_b32 v0, v4, v2 :: v_dual_cndmask_b32 v3, v7, v35619; GFX11-NEXT:    v_cndmask_b32_e32 v1, v5, v2, vcc_lo5620; GFX11-NEXT:    v_cndmask_b32_e32 v2, v6, v2, vcc_lo5621; GFX11-NEXT:    ; return to shader part epilog5622  %result = call i128 @llvm.sadd.sat.i128(i128 %lhs, i128 %rhs)5623  %cast = bitcast i128 %result to <4 x float>5624  ret <4 x float> %cast5625}5626 5627define <2 x i128> @v_saddsat_v2i128(<2 x i128> %lhs, <2 x i128> %rhs) {5628; GFX6-LABEL: v_saddsat_v2i128:5629; GFX6:       ; %bb.0:5630; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5631; GFX6-NEXT:    v_add_i32_e32 v8, vcc, v0, v85632; GFX6-NEXT:    v_addc_u32_e32 v9, vcc, v1, v9, vcc5633; GFX6-NEXT:    v_addc_u32_e32 v16, vcc, v2, v10, vcc5634; GFX6-NEXT:    v_addc_u32_e32 v17, vcc, v3, v11, vcc5635; GFX6-NEXT:    v_cmp_lt_u64_e32 vcc, v[8:9], v[0:1]5636; GFX6-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc5637; GFX6-NEXT:    v_cmp_lt_i64_e32 vcc, v[16:17], v[2:3]5638; GFX6-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5639; GFX6-NEXT:    v_cmp_eq_u64_e32 vcc, v[16:17], v[2:3]5640; GFX6-NEXT:    v_ashrrev_i32_e32 v2, 31, v175641; GFX6-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc5642; GFX6-NEXT:    v_cmp_gt_i64_e32 vcc, 0, v[10:11]5643; GFX6-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5644; GFX6-NEXT:    v_cmp_eq_u64_e32 vcc, 0, v[10:11]5645; GFX6-NEXT:    v_cndmask_b32_e64 v1, v1, 0, vcc5646; GFX6-NEXT:    v_xor_b32_e32 v0, v1, v05647; GFX6-NEXT:    v_bfrev_b32_e32 v1, 15648; GFX6-NEXT:    v_add_i32_e32 v3, vcc, v2, v15649; GFX6-NEXT:    v_and_b32_e32 v0, 1, v05650; GFX6-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v05651; GFX6-NEXT:    v_cndmask_b32_e32 v0, v8, v2, vcc5652; GFX6-NEXT:    v_cndmask_b32_e32 v1, v9, v2, vcc5653; GFX6-NEXT:    v_cndmask_b32_e32 v2, v16, v2, vcc5654; GFX6-NEXT:    v_cndmask_b32_e32 v3, v17, v3, vcc5655; GFX6-NEXT:    v_add_i32_e32 v8, vcc, v4, v125656; GFX6-NEXT:    v_addc_u32_e32 v9, vcc, v5, v13, vcc5657; GFX6-NEXT:    v_addc_u32_e32 v10, vcc, v6, v14, vcc5658; GFX6-NEXT:    v_addc_u32_e32 v11, vcc, v7, v15, vcc5659; GFX6-NEXT:    v_cmp_lt_u64_e32 vcc, v[8:9], v[4:5]5660; GFX6-NEXT:    v_cndmask_b32_e64 v4, 0, 1, vcc5661; GFX6-NEXT:    v_cmp_lt_i64_e32 vcc, v[10:11], v[6:7]5662; GFX6-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc5663; GFX6-NEXT:    v_cmp_eq_u64_e32 vcc, v[10:11], v[6:7]5664; GFX6-NEXT:    v_ashrrev_i32_e32 v6, 31, v115665; GFX6-NEXT:    v_cndmask_b32_e32 v4, v5, v4, vcc5666; GFX6-NEXT:    v_cmp_gt_i64_e32 vcc, 0, v[14:15]5667; GFX6-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc5668; GFX6-NEXT:    v_cmp_eq_u64_e32 vcc, 0, v[14:15]5669; GFX6-NEXT:    v_cndmask_b32_e64 v5, v5, 0, vcc5670; GFX6-NEXT:    v_xor_b32_e32 v4, v5, v45671; GFX6-NEXT:    v_add_i32_e32 v7, vcc, 0x80000000, v65672; GFX6-NEXT:    v_and_b32_e32 v4, 1, v45673; GFX6-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v45674; GFX6-NEXT:    v_cndmask_b32_e32 v4, v8, v6, vcc5675; GFX6-NEXT:    v_cndmask_b32_e32 v5, v9, v6, vcc5676; GFX6-NEXT:    v_cndmask_b32_e32 v6, v10, v6, vcc5677; GFX6-NEXT:    v_cndmask_b32_e32 v7, v11, v7, vcc5678; GFX6-NEXT:    s_setpc_b64 s[30:31]5679;5680; GFX8-LABEL: v_saddsat_v2i128:5681; GFX8:       ; %bb.0:5682; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5683; GFX8-NEXT:    v_add_u32_e32 v8, vcc, v0, v85684; GFX8-NEXT:    v_addc_u32_e32 v9, vcc, v1, v9, vcc5685; GFX8-NEXT:    v_addc_u32_e32 v16, vcc, v2, v10, vcc5686; GFX8-NEXT:    v_addc_u32_e32 v17, vcc, v3, v11, vcc5687; GFX8-NEXT:    v_cmp_lt_u64_e32 vcc, v[8:9], v[0:1]5688; GFX8-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc5689; GFX8-NEXT:    v_cmp_lt_i64_e32 vcc, v[16:17], v[2:3]5690; GFX8-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5691; GFX8-NEXT:    v_cmp_eq_u64_e32 vcc, v[16:17], v[2:3]5692; GFX8-NEXT:    v_ashrrev_i32_e32 v2, 31, v175693; GFX8-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc5694; GFX8-NEXT:    v_cmp_gt_i64_e32 vcc, 0, v[10:11]5695; GFX8-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5696; GFX8-NEXT:    v_cmp_eq_u64_e32 vcc, 0, v[10:11]5697; GFX8-NEXT:    v_cndmask_b32_e64 v1, v1, 0, vcc5698; GFX8-NEXT:    v_xor_b32_e32 v0, v1, v05699; GFX8-NEXT:    v_bfrev_b32_e32 v1, 15700; GFX8-NEXT:    v_add_u32_e32 v3, vcc, v2, v15701; GFX8-NEXT:    v_and_b32_e32 v0, 1, v05702; GFX8-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v05703; GFX8-NEXT:    v_cndmask_b32_e32 v0, v8, v2, vcc5704; GFX8-NEXT:    v_cndmask_b32_e32 v1, v9, v2, vcc5705; GFX8-NEXT:    v_cndmask_b32_e32 v2, v16, v2, vcc5706; GFX8-NEXT:    v_cndmask_b32_e32 v3, v17, v3, vcc5707; GFX8-NEXT:    v_add_u32_e32 v8, vcc, v4, v125708; GFX8-NEXT:    v_addc_u32_e32 v9, vcc, v5, v13, vcc5709; GFX8-NEXT:    v_addc_u32_e32 v10, vcc, v6, v14, vcc5710; GFX8-NEXT:    v_addc_u32_e32 v11, vcc, v7, v15, vcc5711; GFX8-NEXT:    v_cmp_lt_u64_e32 vcc, v[8:9], v[4:5]5712; GFX8-NEXT:    v_cndmask_b32_e64 v4, 0, 1, vcc5713; GFX8-NEXT:    v_cmp_lt_i64_e32 vcc, v[10:11], v[6:7]5714; GFX8-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc5715; GFX8-NEXT:    v_cmp_eq_u64_e32 vcc, v[10:11], v[6:7]5716; GFX8-NEXT:    v_ashrrev_i32_e32 v6, 31, v115717; GFX8-NEXT:    v_cndmask_b32_e32 v4, v5, v4, vcc5718; GFX8-NEXT:    v_cmp_gt_i64_e32 vcc, 0, v[14:15]5719; GFX8-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc5720; GFX8-NEXT:    v_cmp_eq_u64_e32 vcc, 0, v[14:15]5721; GFX8-NEXT:    v_cndmask_b32_e64 v5, v5, 0, vcc5722; GFX8-NEXT:    v_xor_b32_e32 v4, v5, v45723; GFX8-NEXT:    v_add_u32_e32 v7, vcc, 0x80000000, v65724; GFX8-NEXT:    v_and_b32_e32 v4, 1, v45725; GFX8-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v45726; GFX8-NEXT:    v_cndmask_b32_e32 v4, v8, v6, vcc5727; GFX8-NEXT:    v_cndmask_b32_e32 v5, v9, v6, vcc5728; GFX8-NEXT:    v_cndmask_b32_e32 v6, v10, v6, vcc5729; GFX8-NEXT:    v_cndmask_b32_e32 v7, v11, v7, vcc5730; GFX8-NEXT:    s_setpc_b64 s[30:31]5731;5732; GFX9-LABEL: v_saddsat_v2i128:5733; GFX9:       ; %bb.0:5734; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5735; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v0, v85736; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v1, v9, vcc5737; GFX9-NEXT:    v_addc_co_u32_e32 v16, vcc, v2, v10, vcc5738; GFX9-NEXT:    v_addc_co_u32_e32 v17, vcc, v3, v11, vcc5739; GFX9-NEXT:    v_cmp_lt_u64_e32 vcc, v[8:9], v[0:1]5740; GFX9-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc5741; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, v[16:17], v[2:3]5742; GFX9-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5743; GFX9-NEXT:    v_cmp_eq_u64_e32 vcc, v[16:17], v[2:3]5744; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 31, v175745; GFX9-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc5746; GFX9-NEXT:    v_cmp_gt_i64_e32 vcc, 0, v[10:11]5747; GFX9-NEXT:    v_add_u32_e32 v3, 0x80000000, v25748; GFX9-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5749; GFX9-NEXT:    v_cmp_eq_u64_e32 vcc, 0, v[10:11]5750; GFX9-NEXT:    v_cndmask_b32_e64 v1, v1, 0, vcc5751; GFX9-NEXT:    v_xor_b32_e32 v0, v1, v05752; GFX9-NEXT:    v_and_b32_e32 v0, 1, v05753; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v05754; GFX9-NEXT:    v_cndmask_b32_e32 v0, v8, v2, vcc5755; GFX9-NEXT:    v_cndmask_b32_e32 v1, v9, v2, vcc5756; GFX9-NEXT:    v_cndmask_b32_e32 v2, v16, v2, vcc5757; GFX9-NEXT:    v_cndmask_b32_e32 v3, v17, v3, vcc5758; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v4, v125759; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v5, v13, vcc5760; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v6, v14, vcc5761; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, v7, v15, vcc5762; GFX9-NEXT:    v_cmp_lt_u64_e32 vcc, v[8:9], v[4:5]5763; GFX9-NEXT:    v_cndmask_b32_e64 v4, 0, 1, vcc5764; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, v[10:11], v[6:7]5765; GFX9-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc5766; GFX9-NEXT:    v_cmp_eq_u64_e32 vcc, v[10:11], v[6:7]5767; GFX9-NEXT:    v_ashrrev_i32_e32 v6, 31, v115768; GFX9-NEXT:    v_cndmask_b32_e32 v4, v5, v4, vcc5769; GFX9-NEXT:    v_cmp_gt_i64_e32 vcc, 0, v[14:15]5770; GFX9-NEXT:    v_add_u32_e32 v7, 0x80000000, v65771; GFX9-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc5772; GFX9-NEXT:    v_cmp_eq_u64_e32 vcc, 0, v[14:15]5773; GFX9-NEXT:    v_cndmask_b32_e64 v5, v5, 0, vcc5774; GFX9-NEXT:    v_xor_b32_e32 v4, v5, v45775; GFX9-NEXT:    v_and_b32_e32 v4, 1, v45776; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v45777; GFX9-NEXT:    v_cndmask_b32_e32 v4, v8, v6, vcc5778; GFX9-NEXT:    v_cndmask_b32_e32 v5, v9, v6, vcc5779; GFX9-NEXT:    v_cndmask_b32_e32 v6, v10, v6, vcc5780; GFX9-NEXT:    v_cndmask_b32_e32 v7, v11, v7, vcc5781; GFX9-NEXT:    s_setpc_b64 s[30:31]5782;5783; GFX10-LABEL: v_saddsat_v2i128:5784; GFX10:       ; %bb.0:5785; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5786; GFX10-NEXT:    v_add_co_u32 v8, vcc_lo, v0, v85787; GFX10-NEXT:    v_add_co_ci_u32_e32 v9, vcc_lo, v1, v9, vcc_lo5788; GFX10-NEXT:    v_add_co_ci_u32_e32 v16, vcc_lo, v2, v10, vcc_lo5789; GFX10-NEXT:    v_add_co_ci_u32_e32 v17, vcc_lo, v3, v11, vcc_lo5790; GFX10-NEXT:    v_cmp_lt_u64_e32 vcc_lo, v[8:9], v[0:1]5791; GFX10-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo5792; GFX10-NEXT:    v_cmp_lt_i64_e32 vcc_lo, v[16:17], v[2:3]5793; GFX10-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo5794; GFX10-NEXT:    v_cmp_eq_u64_e32 vcc_lo, v[16:17], v[2:3]5795; GFX10-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc_lo5796; GFX10-NEXT:    v_cmp_gt_i64_e32 vcc_lo, 0, v[10:11]5797; GFX10-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo5798; GFX10-NEXT:    v_add_co_u32 v12, vcc_lo, v4, v125799; GFX10-NEXT:    v_add_co_ci_u32_e32 v13, vcc_lo, v5, v13, vcc_lo5800; GFX10-NEXT:    v_add_co_ci_u32_e32 v18, vcc_lo, v6, v14, vcc_lo5801; GFX10-NEXT:    v_add_co_ci_u32_e32 v19, vcc_lo, v7, v15, vcc_lo5802; GFX10-NEXT:    v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11]5803; GFX10-NEXT:    v_cndmask_b32_e64 v1, v1, 0, vcc_lo5804; GFX10-NEXT:    v_cmp_lt_u64_e32 vcc_lo, v[12:13], v[4:5]5805; GFX10-NEXT:    v_xor_b32_e32 v0, v1, v05806; GFX10-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc_lo5807; GFX10-NEXT:    v_cmp_lt_i64_e32 vcc_lo, v[18:19], v[6:7]5808; GFX10-NEXT:    v_and_b32_e32 v0, 1, v05809; GFX10-NEXT:    v_cndmask_b32_e64 v3, 0, 1, vcc_lo5810; GFX10-NEXT:    v_cmp_gt_i64_e32 vcc_lo, 0, v[14:15]5811; GFX10-NEXT:    v_cndmask_b32_e64 v4, 0, 1, vcc_lo5812; GFX10-NEXT:    v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[6:7]5813; GFX10-NEXT:    v_ashrrev_i32_e32 v6, 31, v195814; GFX10-NEXT:    v_cndmask_b32_e32 v1, v3, v2, vcc_lo5815; GFX10-NEXT:    v_cmp_eq_u64_e32 vcc_lo, 0, v[14:15]5816; GFX10-NEXT:    v_add_nc_u32_e32 v7, 0x80000000, v65817; GFX10-NEXT:    v_cndmask_b32_e64 v2, v4, 0, vcc_lo5818; GFX10-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v05819; GFX10-NEXT:    v_xor_b32_e32 v1, v2, v15820; GFX10-NEXT:    v_ashrrev_i32_e32 v2, 31, v175821; GFX10-NEXT:    v_and_b32_e32 v3, 1, v15822; GFX10-NEXT:    v_add_nc_u32_e32 v4, 0x80000000, v25823; GFX10-NEXT:    v_cndmask_b32_e32 v0, v8, v2, vcc_lo5824; GFX10-NEXT:    v_cndmask_b32_e32 v1, v9, v2, vcc_lo5825; GFX10-NEXT:    v_cndmask_b32_e32 v2, v16, v2, vcc_lo5826; GFX10-NEXT:    v_cmp_ne_u32_e64 s4, 0, v35827; GFX10-NEXT:    v_cndmask_b32_e32 v3, v17, v4, vcc_lo5828; GFX10-NEXT:    v_cndmask_b32_e64 v4, v12, v6, s45829; GFX10-NEXT:    v_cndmask_b32_e64 v5, v13, v6, s45830; GFX10-NEXT:    v_cndmask_b32_e64 v6, v18, v6, s45831; GFX10-NEXT:    v_cndmask_b32_e64 v7, v19, v7, s45832; GFX10-NEXT:    s_setpc_b64 s[30:31]5833;5834; GFX11-LABEL: v_saddsat_v2i128:5835; GFX11:       ; %bb.0:5836; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5837; GFX11-NEXT:    v_add_co_u32 v8, vcc_lo, v0, v85838; GFX11-NEXT:    v_add_co_ci_u32_e32 v9, vcc_lo, v1, v9, vcc_lo5839; GFX11-NEXT:    v_add_co_ci_u32_e32 v16, vcc_lo, v2, v10, vcc_lo5840; GFX11-NEXT:    v_add_co_ci_u32_e64 v17, null, v3, v11, vcc_lo5841; GFX11-NEXT:    v_cmp_lt_u64_e32 vcc_lo, v[8:9], v[0:1]5842; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo5843; GFX11-NEXT:    v_cmp_lt_i64_e32 vcc_lo, v[16:17], v[2:3]5844; GFX11-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo5845; GFX11-NEXT:    v_cmp_eq_u64_e32 vcc_lo, v[16:17], v[2:3]5846; GFX11-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc_lo5847; GFX11-NEXT:    v_cmp_gt_i64_e32 vcc_lo, 0, v[10:11]5848; GFX11-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo5849; GFX11-NEXT:    v_add_co_u32 v12, vcc_lo, v4, v125850; GFX11-NEXT:    v_add_co_ci_u32_e32 v13, vcc_lo, v5, v13, vcc_lo5851; GFX11-NEXT:    v_add_co_ci_u32_e32 v18, vcc_lo, v6, v14, vcc_lo5852; GFX11-NEXT:    v_add_co_ci_u32_e64 v19, null, v7, v15, vcc_lo5853; GFX11-NEXT:    v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11]5854; GFX11-NEXT:    v_cndmask_b32_e64 v1, v1, 0, vcc_lo5855; GFX11-NEXT:    v_cmp_lt_u64_e32 vcc_lo, v[12:13], v[4:5]5856; GFX11-NEXT:    v_xor_b32_e32 v0, v1, v05857; GFX11-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc_lo5858; GFX11-NEXT:    v_cmp_lt_i64_e32 vcc_lo, v[18:19], v[6:7]5859; GFX11-NEXT:    v_cndmask_b32_e64 v3, 0, 1, vcc_lo5860; GFX11-NEXT:    v_cmp_gt_i64_e32 vcc_lo, 0, v[14:15]5861; GFX11-NEXT:    v_cndmask_b32_e64 v4, 0, 1, vcc_lo5862; GFX11-NEXT:    v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[6:7]5863; GFX11-NEXT:    v_ashrrev_i32_e32 v6, 31, v195864; GFX11-NEXT:    v_cndmask_b32_e32 v1, v3, v2, vcc_lo5865; GFX11-NEXT:    v_cmp_eq_u64_e32 vcc_lo, 0, v[14:15]5866; GFX11-NEXT:    v_add_nc_u32_e32 v7, 0x80000000, v65867; GFX11-NEXT:    v_cndmask_b32_e64 v2, v4, 0, vcc_lo5868; GFX11-NEXT:    v_xor_b32_e32 v1, v2, v15869; GFX11-NEXT:    v_ashrrev_i32_e32 v2, 31, v175870; GFX11-NEXT:    v_and_b32_e32 v0, 1, v05871; GFX11-NEXT:    v_add_nc_u32_e32 v4, 0x80000000, v25872; GFX11-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v05873; GFX11-NEXT:    v_dual_cndmask_b32 v0, v8, v2 :: v_dual_and_b32 v3, 1, v15874; GFX11-NEXT:    v_cmp_ne_u32_e64 s0, 0, v35875; GFX11-NEXT:    v_cndmask_b32_e32 v1, v9, v2, vcc_lo5876; GFX11-NEXT:    v_dual_cndmask_b32 v2, v16, v2 :: v_dual_cndmask_b32 v3, v17, v45877; GFX11-NEXT:    v_cndmask_b32_e64 v4, v12, v6, s05878; GFX11-NEXT:    v_cndmask_b32_e64 v5, v13, v6, s05879; GFX11-NEXT:    v_cndmask_b32_e64 v6, v18, v6, s05880; GFX11-NEXT:    v_cndmask_b32_e64 v7, v19, v7, s05881; GFX11-NEXT:    s_setpc_b64 s[30:31]5882  %result = call <2 x i128> @llvm.sadd.sat.v2i128(<2 x i128> %lhs, <2 x i128> %rhs)5883  ret <2 x i128> %result5884}5885 5886define amdgpu_ps <2 x i128> @s_saddsat_v2i128(<2 x i128> inreg %lhs, <2 x i128> inreg %rhs) {5887; GFX6-LABEL: s_saddsat_v2i128:5888; GFX6:       ; %bb.0:5889; GFX6-NEXT:    s_add_u32 s8, s0, s85890; GFX6-NEXT:    v_mov_b32_e32 v0, s05891; GFX6-NEXT:    s_addc_u32 s9, s1, s95892; GFX6-NEXT:    v_mov_b32_e32 v1, s15893; GFX6-NEXT:    s_addc_u32 s16, s2, s105894; GFX6-NEXT:    v_mov_b32_e32 v2, s25895; GFX6-NEXT:    v_cmp_lt_u64_e32 vcc, s[8:9], v[0:1]5896; GFX6-NEXT:    s_addc_u32 s17, s3, s115897; GFX6-NEXT:    v_mov_b32_e32 v3, s35898; GFX6-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc5899; GFX6-NEXT:    v_cmp_lt_i64_e32 vcc, s[16:17], v[2:3]5900; GFX6-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[10:11], 05901; GFX6-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5902; GFX6-NEXT:    v_cmp_eq_u64_e32 vcc, s[16:17], v[2:3]5903; GFX6-NEXT:    v_mov_b32_e32 v2, s85904; GFX6-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc5905; GFX6-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[0:1]5906; GFX6-NEXT:    v_cmp_eq_u64_e64 s[0:1], s[10:11], 05907; GFX6-NEXT:    v_mov_b32_e32 v3, s95908; GFX6-NEXT:    v_cndmask_b32_e64 v1, v1, 0, s[0:1]5909; GFX6-NEXT:    v_xor_b32_e32 v0, v1, v05910; GFX6-NEXT:    s_ashr_i32 s0, s17, 315911; GFX6-NEXT:    v_and_b32_e32 v0, 1, v05912; GFX6-NEXT:    s_add_i32 s1, s0, 0x800000005913; GFX6-NEXT:    v_mov_b32_e32 v1, s05914; GFX6-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v05915; GFX6-NEXT:    v_cndmask_b32_e32 v4, v2, v1, vcc5916; GFX6-NEXT:    v_cndmask_b32_e32 v5, v3, v1, vcc5917; GFX6-NEXT:    v_mov_b32_e32 v0, s15918; GFX6-NEXT:    v_mov_b32_e32 v2, s165919; GFX6-NEXT:    v_mov_b32_e32 v3, s175920; GFX6-NEXT:    v_cndmask_b32_e32 v6, v2, v1, vcc5921; GFX6-NEXT:    v_cndmask_b32_e32 v7, v3, v0, vcc5922; GFX6-NEXT:    s_add_u32 s0, s4, s125923; GFX6-NEXT:    v_mov_b32_e32 v0, s45924; GFX6-NEXT:    s_addc_u32 s1, s5, s135925; GFX6-NEXT:    v_mov_b32_e32 v1, s55926; GFX6-NEXT:    s_addc_u32 s2, s6, s145927; GFX6-NEXT:    v_mov_b32_e32 v2, s65928; GFX6-NEXT:    v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]5929; GFX6-NEXT:    s_addc_u32 s3, s7, s155930; GFX6-NEXT:    v_mov_b32_e32 v3, s75931; GFX6-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc5932; GFX6-NEXT:    v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]5933; GFX6-NEXT:    v_cmp_lt_i64_e64 s[4:5], s[14:15], 05934; GFX6-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5935; GFX6-NEXT:    v_cmp_eq_u64_e32 vcc, s[2:3], v[2:3]5936; GFX6-NEXT:    v_mov_b32_e32 v2, s05937; GFX6-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc5938; GFX6-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[4:5]5939; GFX6-NEXT:    v_cmp_eq_u64_e64 s[4:5], s[14:15], 05940; GFX6-NEXT:    v_mov_b32_e32 v3, s15941; GFX6-NEXT:    v_cndmask_b32_e64 v1, v1, 0, s[4:5]5942; GFX6-NEXT:    v_xor_b32_e32 v0, v1, v05943; GFX6-NEXT:    s_ashr_i32 s4, s3, 315944; GFX6-NEXT:    v_and_b32_e32 v0, 1, v05945; GFX6-NEXT:    s_add_i32 s5, s4, 0x800000005946; GFX6-NEXT:    v_mov_b32_e32 v1, s45947; GFX6-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v05948; GFX6-NEXT:    v_cndmask_b32_e32 v0, v2, v1, vcc5949; GFX6-NEXT:    v_cndmask_b32_e32 v2, v3, v1, vcc5950; GFX6-NEXT:    v_mov_b32_e32 v3, s55951; GFX6-NEXT:    v_mov_b32_e32 v8, s25952; GFX6-NEXT:    v_mov_b32_e32 v9, s35953; GFX6-NEXT:    v_cndmask_b32_e32 v1, v8, v1, vcc5954; GFX6-NEXT:    v_cndmask_b32_e32 v3, v9, v3, vcc5955; GFX6-NEXT:    v_readfirstlane_b32 s0, v45956; GFX6-NEXT:    v_readfirstlane_b32 s1, v55957; GFX6-NEXT:    v_readfirstlane_b32 s2, v65958; GFX6-NEXT:    v_readfirstlane_b32 s3, v75959; GFX6-NEXT:    v_readfirstlane_b32 s4, v05960; GFX6-NEXT:    v_readfirstlane_b32 s5, v25961; GFX6-NEXT:    v_readfirstlane_b32 s6, v15962; GFX6-NEXT:    v_readfirstlane_b32 s7, v35963; GFX6-NEXT:    ; return to shader part epilog5964;5965; GFX8-LABEL: s_saddsat_v2i128:5966; GFX8:       ; %bb.0:5967; GFX8-NEXT:    s_add_u32 s8, s0, s85968; GFX8-NEXT:    s_addc_u32 s9, s1, s95969; GFX8-NEXT:    v_mov_b32_e32 v0, s05970; GFX8-NEXT:    s_addc_u32 s16, s2, s105971; GFX8-NEXT:    v_mov_b32_e32 v1, s15972; GFX8-NEXT:    s_addc_u32 s17, s3, s115973; GFX8-NEXT:    v_mov_b32_e32 v2, s25974; GFX8-NEXT:    v_cmp_lt_u64_e32 vcc, s[8:9], v[0:1]5975; GFX8-NEXT:    v_mov_b32_e32 v3, s35976; GFX8-NEXT:    s_cmp_eq_u64 s[16:17], s[2:3]5977; GFX8-NEXT:    s_cselect_b32 s0, 1, 05978; GFX8-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc5979; GFX8-NEXT:    v_cmp_lt_i64_e32 vcc, s[16:17], v[2:3]5980; GFX8-NEXT:    s_and_b32 s0, 1, s05981; GFX8-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc5982; GFX8-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s05983; GFX8-NEXT:    s_cmp_eq_u64 s[10:11], 05984; GFX8-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[10:11], 05985; GFX8-NEXT:    s_cselect_b32 s2, 1, 05986; GFX8-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc5987; GFX8-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[0:1]5988; GFX8-NEXT:    s_and_b32 s0, 1, s25989; GFX8-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, s05990; GFX8-NEXT:    v_cndmask_b32_e64 v1, v1, 0, s[0:1]5991; GFX8-NEXT:    v_xor_b32_e32 v0, v1, v05992; GFX8-NEXT:    s_ashr_i32 s0, s17, 315993; GFX8-NEXT:    v_and_b32_e32 v0, 1, v05994; GFX8-NEXT:    s_add_i32 s1, s0, 0x800000005995; GFX8-NEXT:    v_mov_b32_e32 v1, s05996; GFX8-NEXT:    v_mov_b32_e32 v2, s85997; GFX8-NEXT:    v_mov_b32_e32 v3, s95998; GFX8-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v05999; GFX8-NEXT:    v_cndmask_b32_e32 v4, v2, v1, vcc6000; GFX8-NEXT:    v_cndmask_b32_e32 v5, v3, v1, vcc6001; GFX8-NEXT:    v_mov_b32_e32 v0, s16002; GFX8-NEXT:    v_mov_b32_e32 v2, s166003; GFX8-NEXT:    v_mov_b32_e32 v3, s176004; GFX8-NEXT:    s_add_u32 s0, s4, s126005; GFX8-NEXT:    v_cndmask_b32_e32 v6, v2, v1, vcc6006; GFX8-NEXT:    v_cndmask_b32_e32 v7, v3, v0, vcc6007; GFX8-NEXT:    s_addc_u32 s1, s5, s136008; GFX8-NEXT:    v_mov_b32_e32 v0, s46009; GFX8-NEXT:    s_addc_u32 s2, s6, s146010; GFX8-NEXT:    v_mov_b32_e32 v1, s56011; GFX8-NEXT:    s_addc_u32 s3, s7, s156012; GFX8-NEXT:    v_mov_b32_e32 v2, s66013; GFX8-NEXT:    v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]6014; GFX8-NEXT:    v_mov_b32_e32 v3, s76015; GFX8-NEXT:    s_cmp_eq_u64 s[2:3], s[6:7]6016; GFX8-NEXT:    s_cselect_b32 s4, 1, 06017; GFX8-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc6018; GFX8-NEXT:    v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]6019; GFX8-NEXT:    s_and_b32 s4, 1, s46020; GFX8-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc6021; GFX8-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s46022; GFX8-NEXT:    s_cmp_eq_u64 s[14:15], 06023; GFX8-NEXT:    v_cmp_lt_i64_e64 s[4:5], s[14:15], 06024; GFX8-NEXT:    s_cselect_b32 s6, 1, 06025; GFX8-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc6026; GFX8-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[4:5]6027; GFX8-NEXT:    s_and_b32 s4, 1, s66028; GFX8-NEXT:    v_cmp_ne_u32_e64 s[4:5], 0, s46029; GFX8-NEXT:    v_cndmask_b32_e64 v1, v1, 0, s[4:5]6030; GFX8-NEXT:    v_xor_b32_e32 v0, v1, v06031; GFX8-NEXT:    s_ashr_i32 s4, s3, 316032; GFX8-NEXT:    v_and_b32_e32 v0, 1, v06033; GFX8-NEXT:    s_add_i32 s5, s4, 0x800000006034; GFX8-NEXT:    v_mov_b32_e32 v1, s46035; GFX8-NEXT:    v_mov_b32_e32 v2, s06036; GFX8-NEXT:    v_mov_b32_e32 v3, s16037; GFX8-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v06038; GFX8-NEXT:    v_cndmask_b32_e32 v0, v2, v1, vcc6039; GFX8-NEXT:    v_cndmask_b32_e32 v2, v3, v1, vcc6040; GFX8-NEXT:    v_mov_b32_e32 v3, s56041; GFX8-NEXT:    v_mov_b32_e32 v8, s26042; GFX8-NEXT:    v_mov_b32_e32 v9, s36043; GFX8-NEXT:    v_cndmask_b32_e32 v1, v8, v1, vcc6044; GFX8-NEXT:    v_cndmask_b32_e32 v3, v9, v3, vcc6045; GFX8-NEXT:    v_readfirstlane_b32 s0, v46046; GFX8-NEXT:    v_readfirstlane_b32 s1, v56047; GFX8-NEXT:    v_readfirstlane_b32 s2, v66048; GFX8-NEXT:    v_readfirstlane_b32 s3, v76049; GFX8-NEXT:    v_readfirstlane_b32 s4, v06050; GFX8-NEXT:    v_readfirstlane_b32 s5, v26051; GFX8-NEXT:    v_readfirstlane_b32 s6, v16052; GFX8-NEXT:    v_readfirstlane_b32 s7, v36053; GFX8-NEXT:    ; return to shader part epilog6054;6055; GFX9-LABEL: s_saddsat_v2i128:6056; GFX9:       ; %bb.0:6057; GFX9-NEXT:    s_add_u32 s8, s0, s86058; GFX9-NEXT:    s_addc_u32 s9, s1, s96059; GFX9-NEXT:    v_mov_b32_e32 v0, s06060; GFX9-NEXT:    s_addc_u32 s16, s2, s106061; GFX9-NEXT:    v_mov_b32_e32 v1, s16062; GFX9-NEXT:    s_addc_u32 s17, s3, s116063; GFX9-NEXT:    v_mov_b32_e32 v2, s26064; GFX9-NEXT:    v_cmp_lt_u64_e32 vcc, s[8:9], v[0:1]6065; GFX9-NEXT:    v_mov_b32_e32 v3, s36066; GFX9-NEXT:    s_cmp_eq_u64 s[16:17], s[2:3]6067; GFX9-NEXT:    s_cselect_b32 s0, 1, 06068; GFX9-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc6069; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, s[16:17], v[2:3]6070; GFX9-NEXT:    s_and_b32 s0, 1, s06071; GFX9-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc6072; GFX9-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s06073; GFX9-NEXT:    s_cmp_eq_u64 s[10:11], 06074; GFX9-NEXT:    v_cmp_lt_i64_e64 s[0:1], s[10:11], 06075; GFX9-NEXT:    s_cselect_b32 s2, 1, 06076; GFX9-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc6077; GFX9-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[0:1]6078; GFX9-NEXT:    s_and_b32 s0, 1, s26079; GFX9-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, s06080; GFX9-NEXT:    v_cndmask_b32_e64 v1, v1, 0, s[0:1]6081; GFX9-NEXT:    v_xor_b32_e32 v0, v1, v06082; GFX9-NEXT:    s_ashr_i32 s0, s17, 316083; GFX9-NEXT:    v_and_b32_e32 v0, 1, v06084; GFX9-NEXT:    s_add_i32 s1, s0, 0x800000006085; GFX9-NEXT:    v_mov_b32_e32 v1, s06086; GFX9-NEXT:    v_mov_b32_e32 v2, s86087; GFX9-NEXT:    v_mov_b32_e32 v3, s96088; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v06089; GFX9-NEXT:    v_cndmask_b32_e32 v4, v2, v1, vcc6090; GFX9-NEXT:    v_cndmask_b32_e32 v5, v3, v1, vcc6091; GFX9-NEXT:    v_mov_b32_e32 v0, s16092; GFX9-NEXT:    v_mov_b32_e32 v2, s166093; GFX9-NEXT:    v_mov_b32_e32 v3, s176094; GFX9-NEXT:    s_add_u32 s0, s4, s126095; GFX9-NEXT:    v_cndmask_b32_e32 v6, v2, v1, vcc6096; GFX9-NEXT:    v_cndmask_b32_e32 v7, v3, v0, vcc6097; GFX9-NEXT:    s_addc_u32 s1, s5, s136098; GFX9-NEXT:    v_mov_b32_e32 v0, s46099; GFX9-NEXT:    s_addc_u32 s2, s6, s146100; GFX9-NEXT:    v_mov_b32_e32 v1, s56101; GFX9-NEXT:    s_addc_u32 s3, s7, s156102; GFX9-NEXT:    v_mov_b32_e32 v2, s66103; GFX9-NEXT:    v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]6104; GFX9-NEXT:    v_mov_b32_e32 v3, s76105; GFX9-NEXT:    s_cmp_eq_u64 s[2:3], s[6:7]6106; GFX9-NEXT:    s_cselect_b32 s4, 1, 06107; GFX9-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc6108; GFX9-NEXT:    v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]6109; GFX9-NEXT:    s_and_b32 s4, 1, s46110; GFX9-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc6111; GFX9-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s46112; GFX9-NEXT:    s_cmp_eq_u64 s[14:15], 06113; GFX9-NEXT:    v_cmp_lt_i64_e64 s[4:5], s[14:15], 06114; GFX9-NEXT:    s_cselect_b32 s6, 1, 06115; GFX9-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc6116; GFX9-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[4:5]6117; GFX9-NEXT:    s_and_b32 s4, 1, s66118; GFX9-NEXT:    v_cmp_ne_u32_e64 s[4:5], 0, s46119; GFX9-NEXT:    v_cndmask_b32_e64 v1, v1, 0, s[4:5]6120; GFX9-NEXT:    v_xor_b32_e32 v0, v1, v06121; GFX9-NEXT:    s_ashr_i32 s4, s3, 316122; GFX9-NEXT:    v_and_b32_e32 v0, 1, v06123; GFX9-NEXT:    s_add_i32 s5, s4, 0x800000006124; GFX9-NEXT:    v_mov_b32_e32 v1, s46125; GFX9-NEXT:    v_mov_b32_e32 v2, s06126; GFX9-NEXT:    v_mov_b32_e32 v3, s16127; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v06128; GFX9-NEXT:    v_cndmask_b32_e32 v0, v2, v1, vcc6129; GFX9-NEXT:    v_cndmask_b32_e32 v2, v3, v1, vcc6130; GFX9-NEXT:    v_mov_b32_e32 v3, s56131; GFX9-NEXT:    v_mov_b32_e32 v8, s26132; GFX9-NEXT:    v_mov_b32_e32 v9, s36133; GFX9-NEXT:    v_cndmask_b32_e32 v1, v8, v1, vcc6134; GFX9-NEXT:    v_cndmask_b32_e32 v3, v9, v3, vcc6135; GFX9-NEXT:    v_readfirstlane_b32 s0, v46136; GFX9-NEXT:    v_readfirstlane_b32 s1, v56137; GFX9-NEXT:    v_readfirstlane_b32 s2, v66138; GFX9-NEXT:    v_readfirstlane_b32 s3, v76139; GFX9-NEXT:    v_readfirstlane_b32 s4, v06140; GFX9-NEXT:    v_readfirstlane_b32 s5, v26141; GFX9-NEXT:    v_readfirstlane_b32 s6, v16142; GFX9-NEXT:    v_readfirstlane_b32 s7, v36143; GFX9-NEXT:    ; return to shader part epilog6144;6145; GFX10-LABEL: s_saddsat_v2i128:6146; GFX10:       ; %bb.0:6147; GFX10-NEXT:    s_add_u32 s8, s0, s86148; GFX10-NEXT:    s_addc_u32 s9, s1, s96149; GFX10-NEXT:    s_addc_u32 s16, s2, s106150; GFX10-NEXT:    v_cmp_lt_u64_e64 s0, s[8:9], s[0:1]6151; GFX10-NEXT:    s_addc_u32 s17, s3, s116152; GFX10-NEXT:    s_cmp_eq_u64 s[16:17], s[2:3]6153; GFX10-NEXT:    v_mov_b32_e32 v4, s176154; GFX10-NEXT:    s_cselect_b32 s18, 1, 06155; GFX10-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s06156; GFX10-NEXT:    v_cmp_lt_i64_e64 s0, s[16:17], s[2:3]6157; GFX10-NEXT:    v_cmp_lt_i64_e64 s2, s[10:11], 06158; GFX10-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s06159; GFX10-NEXT:    s_and_b32 s0, 1, s186160; GFX10-NEXT:    s_cmp_eq_u64 s[10:11], 06161; GFX10-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s26162; GFX10-NEXT:    s_cselect_b32 s1, 1, 06163; GFX10-NEXT:    v_cmp_ne_u32_e64 vcc_lo, 0, s06164; GFX10-NEXT:    s_and_b32 s1, 1, s16165; GFX10-NEXT:    s_ashr_i32 s10, s17, 316166; GFX10-NEXT:    v_cmp_ne_u32_e64 s0, 0, s16167; GFX10-NEXT:    s_add_i32 s11, s10, 0x800000006168; GFX10-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc_lo6169; GFX10-NEXT:    v_cndmask_b32_e64 v1, v2, 0, s06170; GFX10-NEXT:    s_add_u32 s0, s4, s126171; GFX10-NEXT:    s_addc_u32 s1, s5, s136172; GFX10-NEXT:    s_addc_u32 s2, s6, s146173; GFX10-NEXT:    v_cmp_lt_u64_e64 s4, s[0:1], s[4:5]6174; GFX10-NEXT:    s_addc_u32 s3, s7, s156175; GFX10-NEXT:    v_xor_b32_e32 v0, v1, v06176; GFX10-NEXT:    s_cmp_eq_u64 s[2:3], s[6:7]6177; GFX10-NEXT:    v_mov_b32_e32 v5, s06178; GFX10-NEXT:    s_cselect_b32 s12, 1, 06179; GFX10-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s46180; GFX10-NEXT:    v_cmp_lt_i64_e64 s4, s[2:3], s[6:7]6181; GFX10-NEXT:    v_cmp_lt_i64_e64 s6, s[14:15], 06182; GFX10-NEXT:    v_and_b32_e32 v0, 1, v06183; GFX10-NEXT:    v_mov_b32_e32 v6, s26184; GFX10-NEXT:    v_mov_b32_e32 v7, s36185; GFX10-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s46186; GFX10-NEXT:    s_and_b32 s4, 1, s126187; GFX10-NEXT:    s_cmp_eq_u64 s[14:15], 06188; GFX10-NEXT:    v_cndmask_b32_e64 v3, 0, 1, s66189; GFX10-NEXT:    s_cselect_b32 s5, 1, 06190; GFX10-NEXT:    v_cmp_ne_u32_e64 vcc_lo, 0, s46191; GFX10-NEXT:    s_and_b32 s5, 1, s56192; GFX10-NEXT:    v_cmp_ne_u32_e64 s4, 0, s56193; GFX10-NEXT:    v_cndmask_b32_e32 v1, v2, v1, vcc_lo6194; GFX10-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v06195; GFX10-NEXT:    v_mov_b32_e32 v0, s96196; GFX10-NEXT:    v_cndmask_b32_e64 v2, v3, 0, s46197; GFX10-NEXT:    v_mov_b32_e32 v3, s86198; GFX10-NEXT:    s_ashr_i32 s4, s3, 316199; GFX10-NEXT:    v_cndmask_b32_e64 v4, v4, s11, vcc_lo6200; GFX10-NEXT:    v_cndmask_b32_e64 v0, v0, s10, vcc_lo6201; GFX10-NEXT:    v_xor_b32_e32 v1, v2, v16202; GFX10-NEXT:    v_mov_b32_e32 v2, s166203; GFX10-NEXT:    v_cndmask_b32_e64 v3, v3, s10, vcc_lo6204; GFX10-NEXT:    s_add_i32 s0, s4, 0x800000006205; GFX10-NEXT:    v_readfirstlane_b32 s3, v46206; GFX10-NEXT:    v_and_b32_e32 v1, 1, v16207; GFX10-NEXT:    v_cndmask_b32_e64 v2, v2, s10, vcc_lo6208; GFX10-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v16209; GFX10-NEXT:    v_mov_b32_e32 v1, s16210; GFX10-NEXT:    v_readfirstlane_b32 s1, v06211; GFX10-NEXT:    v_readfirstlane_b32 s2, v26212; GFX10-NEXT:    v_cndmask_b32_e64 v5, v5, s4, vcc_lo6213; GFX10-NEXT:    v_cndmask_b32_e64 v1, v1, s4, vcc_lo6214; GFX10-NEXT:    v_cndmask_b32_e64 v6, v6, s4, vcc_lo6215; GFX10-NEXT:    v_cndmask_b32_e64 v7, v7, s0, vcc_lo6216; GFX10-NEXT:    v_readfirstlane_b32 s0, v36217; GFX10-NEXT:    v_readfirstlane_b32 s4, v56218; GFX10-NEXT:    v_readfirstlane_b32 s5, v16219; GFX10-NEXT:    v_readfirstlane_b32 s6, v66220; GFX10-NEXT:    v_readfirstlane_b32 s7, v76221; GFX10-NEXT:    ; return to shader part epilog6222;6223; GFX11-LABEL: s_saddsat_v2i128:6224; GFX11:       ; %bb.0:6225; GFX11-NEXT:    s_add_u32 s8, s0, s86226; GFX11-NEXT:    s_addc_u32 s9, s1, s96227; GFX11-NEXT:    s_addc_u32 s16, s2, s106228; GFX11-NEXT:    v_cmp_lt_u64_e64 s0, s[8:9], s[0:1]6229; GFX11-NEXT:    s_addc_u32 s17, s3, s116230; GFX11-NEXT:    s_cmp_eq_u64 s[16:17], s[2:3]6231; GFX11-NEXT:    s_cselect_b32 s18, 1, 06232; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s06233; GFX11-NEXT:    v_cmp_lt_i64_e64 s0, s[16:17], s[2:3]6234; GFX11-NEXT:    v_cmp_lt_i64_e64 s2, s[10:11], 06235; GFX11-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s06236; GFX11-NEXT:    s_and_b32 s0, 1, s186237; GFX11-NEXT:    s_cmp_eq_u64 s[10:11], 06238; GFX11-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s26239; GFX11-NEXT:    s_cselect_b32 s1, 1, 06240; GFX11-NEXT:    v_cmp_ne_u32_e64 vcc_lo, 0, s06241; GFX11-NEXT:    s_and_b32 s1, 1, s16242; GFX11-NEXT:    s_ashr_i32 s10, s17, 316243; GFX11-NEXT:    v_cmp_ne_u32_e64 s0, 0, s16244; GFX11-NEXT:    s_add_i32 s11, s10, 0x800000006245; GFX11-NEXT:    v_cndmask_b32_e32 v0, v1, v0, vcc_lo6246; GFX11-NEXT:    v_cndmask_b32_e64 v1, v2, 0, s06247; GFX11-NEXT:    s_add_u32 s0, s4, s126248; GFX11-NEXT:    s_addc_u32 s1, s5, s136249; GFX11-NEXT:    s_addc_u32 s2, s6, s146250; GFX11-NEXT:    v_cmp_lt_u64_e64 s4, s[0:1], s[4:5]6251; GFX11-NEXT:    s_addc_u32 s3, s7, s156252; GFX11-NEXT:    v_xor_b32_e32 v0, v1, v06253; GFX11-NEXT:    s_cmp_eq_u64 s[2:3], s[6:7]6254; GFX11-NEXT:    v_mov_b32_e32 v4, s176255; GFX11-NEXT:    s_cselect_b32 s12, 1, 06256; GFX11-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s46257; GFX11-NEXT:    v_cmp_lt_i64_e64 s4, s[2:3], s[6:7]6258; GFX11-NEXT:    v_cmp_lt_i64_e64 s6, s[14:15], 06259; GFX11-NEXT:    v_and_b32_e32 v0, 1, v06260; GFX11-NEXT:    v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v7, s36261; GFX11-NEXT:    v_mov_b32_e32 v5, s06262; GFX11-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s46263; GFX11-NEXT:    s_and_b32 s4, 1, s126264; GFX11-NEXT:    s_cmp_eq_u64 s[14:15], 06265; GFX11-NEXT:    v_cndmask_b32_e64 v3, 0, 1, s66266; GFX11-NEXT:    s_cselect_b32 s5, 1, 06267; GFX11-NEXT:    v_cmp_ne_u32_e64 vcc_lo, 0, s46268; GFX11-NEXT:    s_and_b32 s5, 1, s56269; GFX11-NEXT:    v_cmp_ne_u32_e64 s4, 0, s56270; GFX11-NEXT:    v_cndmask_b32_e32 v1, v2, v1, vcc_lo6271; GFX11-NEXT:    v_cndmask_b32_e64 v2, v3, 0, s46272; GFX11-NEXT:    v_mov_b32_e32 v3, s86273; GFX11-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v06274; GFX11-NEXT:    s_ashr_i32 s4, s3, 316275; GFX11-NEXT:    v_xor_b32_e32 v1, v2, v16276; GFX11-NEXT:    v_mov_b32_e32 v0, s96277; GFX11-NEXT:    v_mov_b32_e32 v2, s166278; GFX11-NEXT:    v_cndmask_b32_e64 v3, v3, s10, vcc_lo6279; GFX11-NEXT:    v_cndmask_b32_e64 v4, v4, s11, vcc_lo6280; GFX11-NEXT:    v_and_b32_e32 v1, 1, v16281; GFX11-NEXT:    v_cndmask_b32_e64 v0, v0, s10, vcc_lo6282; GFX11-NEXT:    v_cndmask_b32_e64 v2, v2, s10, vcc_lo6283; GFX11-NEXT:    s_add_i32 s0, s4, 0x800000006284; GFX11-NEXT:    v_readfirstlane_b32 s3, v46285; GFX11-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v16286; GFX11-NEXT:    v_mov_b32_e32 v1, s16287; GFX11-NEXT:    v_readfirstlane_b32 s1, v06288; GFX11-NEXT:    v_readfirstlane_b32 s2, v26289; GFX11-NEXT:    v_cndmask_b32_e64 v5, v5, s4, vcc_lo6290; GFX11-NEXT:    v_cndmask_b32_e64 v1, v1, s4, vcc_lo6291; GFX11-NEXT:    v_cndmask_b32_e64 v6, v6, s4, vcc_lo6292; GFX11-NEXT:    v_cndmask_b32_e64 v7, v7, s0, vcc_lo6293; GFX11-NEXT:    v_readfirstlane_b32 s0, v36294; GFX11-NEXT:    v_readfirstlane_b32 s4, v56295; GFX11-NEXT:    v_readfirstlane_b32 s5, v16296; GFX11-NEXT:    v_readfirstlane_b32 s6, v66297; GFX11-NEXT:    v_readfirstlane_b32 s7, v76298; GFX11-NEXT:    ; return to shader part epilog6299  %result = call <2 x i128> @llvm.sadd.sat.v2i128(<2 x i128> %lhs, <2 x i128> %rhs)6300  ret <2 x i128> %result6301}6302 6303declare i7 @llvm.sadd.sat.i7(i7, i7) #06304declare i8 @llvm.sadd.sat.i8(i8, i8) #06305declare <2 x i8> @llvm.sadd.sat.v2i8(<2 x i8>, <2 x i8>) #06306declare <4 x i8> @llvm.sadd.sat.v4i8(<4 x i8>, <4 x i8>) #06307 6308declare i16 @llvm.sadd.sat.i16(i16, i16) #06309declare <2 x i16> @llvm.sadd.sat.v2i16(<2 x i16>, <2 x i16>) #06310declare <3 x i16> @llvm.sadd.sat.v3i16(<3 x i16>, <3 x i16>) #06311declare <4 x i16> @llvm.sadd.sat.v4i16(<4 x i16>, <4 x i16>) #06312declare <5 x i16> @llvm.sadd.sat.v5i16(<5 x i16>, <5 x i16>) #06313declare <6 x i16> @llvm.sadd.sat.v6i16(<6 x i16>, <6 x i16>) #06314declare <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16>, <8 x i16>) #06315 6316declare i24 @llvm.sadd.sat.i24(i24, i24) #06317 6318declare i32 @llvm.sadd.sat.i32(i32, i32) #06319declare <2 x i32> @llvm.sadd.sat.v2i32(<2 x i32>, <2 x i32>) #06320declare <3 x i32> @llvm.sadd.sat.v3i32(<3 x i32>, <3 x i32>) #06321declare <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32>, <4 x i32>) #06322declare <5 x i32> @llvm.sadd.sat.v5i32(<5 x i32>, <5 x i32>) #06323declare <16 x i32> @llvm.sadd.sat.v16i32(<16 x i32>, <16 x i32>) #06324 6325declare i48 @llvm.sadd.sat.i48(i48, i48) #06326 6327declare i64 @llvm.sadd.sat.i64(i64, i64) #06328declare <2 x i64> @llvm.sadd.sat.v2i64(<2 x i64>, <2 x i64>) #06329 6330declare i128 @llvm.sadd.sat.i128(i128, i128) #06331declare <2 x i128> @llvm.sadd.sat.v2i128(<2 x i128>, <2 x i128>) #06332 6333attributes #0 = { nounwind readnone speculatable willreturn }6334