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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck --check-prefix=GFX9 %s3; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=hawaii < %s | FileCheck --check-prefix=GFX7 %s4; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 < %s | FileCheck --check-prefix=GFX10 %s5; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 < %s | FileCheck --check-prefix=GFX11 %s6 7; FIXME:8; XUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=tahiti < %s | FileCheck --check-prefix=GFX6 %s9 10define amdgpu_kernel void @store_lds_v4i32(ptr addrspace(3) %out, <4 x i32> %x) {11; GFX9-LABEL: store_lds_v4i32:12; GFX9: ; %bb.0:13; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x1014; GFX9-NEXT: s_load_dword s6, s[4:5], 0x015; GFX9-NEXT: s_waitcnt lgkmcnt(0)16; GFX9-NEXT: v_mov_b32_e32 v0, s017; GFX9-NEXT: v_mov_b32_e32 v1, s118; GFX9-NEXT: v_mov_b32_e32 v2, s219; GFX9-NEXT: v_mov_b32_e32 v3, s320; GFX9-NEXT: v_mov_b32_e32 v4, s621; GFX9-NEXT: ds_write_b128 v4, v[0:3]22; GFX9-NEXT: s_endpgm23;24; GFX7-LABEL: store_lds_v4i32:25; GFX7: ; %bb.0:26; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x427; GFX7-NEXT: s_load_dword s4, s[4:5], 0x028; GFX7-NEXT: s_mov_b32 m0, -129; GFX7-NEXT: s_waitcnt lgkmcnt(0)30; GFX7-NEXT: v_mov_b32_e32 v0, s031; GFX7-NEXT: v_mov_b32_e32 v1, s132; GFX7-NEXT: v_mov_b32_e32 v2, s233; GFX7-NEXT: v_mov_b32_e32 v3, s334; GFX7-NEXT: v_mov_b32_e32 v4, s435; GFX7-NEXT: ds_write_b128 v4, v[0:3]36; GFX7-NEXT: s_endpgm37;38; GFX10-LABEL: store_lds_v4i32:39; GFX10: ; %bb.0:40; GFX10-NEXT: s_clause 0x141; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x1042; GFX10-NEXT: s_load_dword s6, s[4:5], 0x043; GFX10-NEXT: s_waitcnt lgkmcnt(0)44; GFX10-NEXT: v_mov_b32_e32 v0, s045; GFX10-NEXT: v_mov_b32_e32 v1, s146; GFX10-NEXT: v_mov_b32_e32 v2, s247; GFX10-NEXT: v_mov_b32_e32 v3, s348; GFX10-NEXT: v_mov_b32_e32 v4, s649; GFX10-NEXT: ds_write_b128 v4, v[0:3]50; GFX10-NEXT: s_endpgm51;52; GFX11-LABEL: store_lds_v4i32:53; GFX11: ; %bb.0:54; GFX11-NEXT: s_clause 0x155; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x1056; GFX11-NEXT: s_load_b32 s4, s[4:5], 0x057; GFX11-NEXT: s_waitcnt lgkmcnt(0)58; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s159; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s360; GFX11-NEXT: v_mov_b32_e32 v4, s461; GFX11-NEXT: ds_store_b128 v4, v[0:3]62; GFX11-NEXT: s_endpgm63 store <4 x i32> %x, ptr addrspace(3) %out64 ret void65}66 67define amdgpu_kernel void @store_lds_v4i32_align1(ptr addrspace(3) %out, <4 x i32> %x) {68; GFX9-LABEL: store_lds_v4i32_align1:69; GFX9: ; %bb.0:70; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x1071; GFX9-NEXT: s_load_dword s6, s[4:5], 0x072; GFX9-NEXT: s_waitcnt lgkmcnt(0)73; GFX9-NEXT: s_and_b32 s5, 0xffff, s074; GFX9-NEXT: v_mov_b32_e32 v0, s075; GFX9-NEXT: v_mov_b32_e32 v1, s676; GFX9-NEXT: s_lshr_b32 s5, s5, 877; GFX9-NEXT: s_lshr_b32 s4, s0, 1678; GFX9-NEXT: ds_write_b8 v1, v079; GFX9-NEXT: v_mov_b32_e32 v0, s580; GFX9-NEXT: ds_write_b8 v1, v0 offset:181; GFX9-NEXT: s_lshr_b32 s0, s0, 2482; GFX9-NEXT: v_mov_b32_e32 v0, s483; GFX9-NEXT: ds_write_b8 v1, v0 offset:284; GFX9-NEXT: v_mov_b32_e32 v0, s085; GFX9-NEXT: s_and_b32 s4, 0xffff, s186; GFX9-NEXT: ds_write_b8 v1, v0 offset:387; GFX9-NEXT: s_lshr_b32 s4, s4, 888; GFX9-NEXT: v_mov_b32_e32 v0, s189; GFX9-NEXT: s_lshr_b32 s0, s1, 1690; GFX9-NEXT: ds_write_b8 v1, v0 offset:491; GFX9-NEXT: v_mov_b32_e32 v0, s492; GFX9-NEXT: ds_write_b8 v1, v0 offset:593; GFX9-NEXT: s_lshr_b32 s1, s1, 2494; GFX9-NEXT: v_mov_b32_e32 v0, s095; GFX9-NEXT: ds_write_b8 v1, v0 offset:696; GFX9-NEXT: v_mov_b32_e32 v0, s197; GFX9-NEXT: s_and_b32 s1, 0xffff, s298; GFX9-NEXT: ds_write_b8 v1, v0 offset:799; GFX9-NEXT: s_lshr_b32 s1, s1, 8100; GFX9-NEXT: v_mov_b32_e32 v0, s2101; GFX9-NEXT: s_lshr_b32 s0, s2, 16102; GFX9-NEXT: ds_write_b8 v1, v0 offset:8103; GFX9-NEXT: v_mov_b32_e32 v0, s1104; GFX9-NEXT: ds_write_b8 v1, v0 offset:9105; GFX9-NEXT: s_lshr_b32 s1, s2, 24106; GFX9-NEXT: v_mov_b32_e32 v0, s0107; GFX9-NEXT: ds_write_b8 v1, v0 offset:10108; GFX9-NEXT: v_mov_b32_e32 v0, s1109; GFX9-NEXT: s_and_b32 s1, 0xffff, s3110; GFX9-NEXT: ds_write_b8 v1, v0 offset:11111; GFX9-NEXT: s_lshr_b32 s1, s1, 8112; GFX9-NEXT: v_mov_b32_e32 v0, s3113; GFX9-NEXT: s_lshr_b32 s0, s3, 16114; GFX9-NEXT: ds_write_b8 v1, v0 offset:12115; GFX9-NEXT: v_mov_b32_e32 v0, s1116; GFX9-NEXT: ds_write_b8 v1, v0 offset:13117; GFX9-NEXT: s_lshr_b32 s1, s3, 24118; GFX9-NEXT: v_mov_b32_e32 v0, s0119; GFX9-NEXT: ds_write_b8 v1, v0 offset:14120; GFX9-NEXT: v_mov_b32_e32 v0, s1121; GFX9-NEXT: ds_write_b8 v1, v0 offset:15122; GFX9-NEXT: s_endpgm123;124; GFX7-LABEL: store_lds_v4i32_align1:125; GFX7: ; %bb.0:126; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4127; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0128; GFX7-NEXT: s_mov_b32 m0, -1129; GFX7-NEXT: s_waitcnt lgkmcnt(0)130; GFX7-NEXT: s_bfe_u32 s6, s0, 0x80008131; GFX7-NEXT: v_mov_b32_e32 v0, s0132; GFX7-NEXT: v_mov_b32_e32 v1, s4133; GFX7-NEXT: s_lshr_b32 s5, s0, 16134; GFX7-NEXT: ds_write_b8 v1, v0135; GFX7-NEXT: v_mov_b32_e32 v0, s6136; GFX7-NEXT: ds_write_b8 v1, v0 offset:1137; GFX7-NEXT: s_lshr_b32 s0, s0, 24138; GFX7-NEXT: v_mov_b32_e32 v0, s5139; GFX7-NEXT: ds_write_b8 v1, v0 offset:2140; GFX7-NEXT: v_mov_b32_e32 v0, s0141; GFX7-NEXT: ds_write_b8 v1, v0 offset:3142; GFX7-NEXT: s_bfe_u32 s4, s1, 0x80008143; GFX7-NEXT: v_mov_b32_e32 v0, s1144; GFX7-NEXT: s_lshr_b32 s0, s1, 16145; GFX7-NEXT: ds_write_b8 v1, v0 offset:4146; GFX7-NEXT: v_mov_b32_e32 v0, s4147; GFX7-NEXT: ds_write_b8 v1, v0 offset:5148; GFX7-NEXT: s_lshr_b32 s1, s1, 24149; GFX7-NEXT: v_mov_b32_e32 v0, s0150; GFX7-NEXT: ds_write_b8 v1, v0 offset:6151; GFX7-NEXT: v_mov_b32_e32 v0, s1152; GFX7-NEXT: ds_write_b8 v1, v0 offset:7153; GFX7-NEXT: s_bfe_u32 s1, s2, 0x80008154; GFX7-NEXT: v_mov_b32_e32 v0, s2155; GFX7-NEXT: s_lshr_b32 s0, s2, 16156; GFX7-NEXT: ds_write_b8 v1, v0 offset:8157; GFX7-NEXT: v_mov_b32_e32 v0, s1158; GFX7-NEXT: ds_write_b8 v1, v0 offset:9159; GFX7-NEXT: s_lshr_b32 s1, s2, 24160; GFX7-NEXT: v_mov_b32_e32 v0, s0161; GFX7-NEXT: ds_write_b8 v1, v0 offset:10162; GFX7-NEXT: v_mov_b32_e32 v0, s1163; GFX7-NEXT: ds_write_b8 v1, v0 offset:11164; GFX7-NEXT: s_bfe_u32 s1, s3, 0x80008165; GFX7-NEXT: v_mov_b32_e32 v0, s3166; GFX7-NEXT: s_lshr_b32 s0, s3, 16167; GFX7-NEXT: ds_write_b8 v1, v0 offset:12168; GFX7-NEXT: v_mov_b32_e32 v0, s1169; GFX7-NEXT: ds_write_b8 v1, v0 offset:13170; GFX7-NEXT: s_lshr_b32 s1, s3, 24171; GFX7-NEXT: v_mov_b32_e32 v0, s0172; GFX7-NEXT: ds_write_b8 v1, v0 offset:14173; GFX7-NEXT: v_mov_b32_e32 v0, s1174; GFX7-NEXT: ds_write_b8 v1, v0 offset:15175; GFX7-NEXT: s_endpgm176;177; GFX10-LABEL: store_lds_v4i32_align1:178; GFX10: ; %bb.0:179; GFX10-NEXT: s_clause 0x1180; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10181; GFX10-NEXT: s_load_dword s6, s[4:5], 0x0182; GFX10-NEXT: s_waitcnt lgkmcnt(0)183; GFX10-NEXT: s_lshr_b32 s4, s0, 16184; GFX10-NEXT: v_mov_b32_e32 v0, s0185; GFX10-NEXT: v_mov_b32_e32 v1, s6186; GFX10-NEXT: s_and_b32 s5, 0xffff, s0187; GFX10-NEXT: s_lshr_b32 s0, s0, 24188; GFX10-NEXT: s_and_b32 s7, 0xffff, s1189; GFX10-NEXT: v_mov_b32_e32 v2, s1190; GFX10-NEXT: s_lshr_b32 s6, s1, 16191; GFX10-NEXT: v_mov_b32_e32 v4, s4192; GFX10-NEXT: s_lshr_b32 s8, s2, 16193; GFX10-NEXT: s_lshr_b32 s5, s5, 8194; GFX10-NEXT: v_mov_b32_e32 v5, s0195; GFX10-NEXT: s_lshr_b32 s0, s7, 8196; GFX10-NEXT: v_mov_b32_e32 v6, s6197; GFX10-NEXT: v_mov_b32_e32 v8, s5198; GFX10-NEXT: v_mov_b32_e32 v9, s0199; GFX10-NEXT: ds_write_b8 v1, v0200; GFX10-NEXT: ds_write_b8 v1, v2 offset:4201; GFX10-NEXT: ds_write_b8 v1, v4 offset:2202; GFX10-NEXT: ds_write_b8 v1, v5 offset:3203; GFX10-NEXT: ds_write_b8 v1, v6 offset:6204; GFX10-NEXT: ds_write_b8 v1, v8 offset:1205; GFX10-NEXT: ds_write_b8 v1, v9 offset:5206; GFX10-NEXT: v_mov_b32_e32 v0, s8207; GFX10-NEXT: s_lshr_b32 s1, s1, 24208; GFX10-NEXT: s_and_b32 s9, 0xffff, s2209; GFX10-NEXT: s_lshr_b32 s0, s2, 24210; GFX10-NEXT: v_mov_b32_e32 v7, s1211; GFX10-NEXT: s_lshr_b32 s1, s9, 8212; GFX10-NEXT: v_mov_b32_e32 v3, s2213; GFX10-NEXT: ds_write_b8 v1, v0 offset:10214; GFX10-NEXT: v_mov_b32_e32 v0, s0215; GFX10-NEXT: s_and_b32 s0, 0xffff, s3216; GFX10-NEXT: v_mov_b32_e32 v10, s1217; GFX10-NEXT: s_lshr_b32 s0, s0, 8218; GFX10-NEXT: s_lshr_b32 s1, s3, 16219; GFX10-NEXT: v_mov_b32_e32 v2, s3220; GFX10-NEXT: ds_write_b8 v1, v7 offset:7221; GFX10-NEXT: ds_write_b8 v1, v3 offset:8222; GFX10-NEXT: ds_write_b8 v1, v10 offset:9223; GFX10-NEXT: v_mov_b32_e32 v3, s0224; GFX10-NEXT: s_lshr_b32 s0, s3, 24225; GFX10-NEXT: v_mov_b32_e32 v4, s1226; GFX10-NEXT: v_mov_b32_e32 v5, s0227; GFX10-NEXT: ds_write_b8 v1, v0 offset:11228; GFX10-NEXT: ds_write_b8 v1, v2 offset:12229; GFX10-NEXT: ds_write_b8 v1, v3 offset:13230; GFX10-NEXT: ds_write_b8 v1, v4 offset:14231; GFX10-NEXT: ds_write_b8 v1, v5 offset:15232; GFX10-NEXT: s_endpgm233;234; GFX11-LABEL: store_lds_v4i32_align1:235; GFX11: ; %bb.0:236; GFX11-NEXT: s_clause 0x1237; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x10238; GFX11-NEXT: s_load_b32 s4, s[4:5], 0x0239; GFX11-NEXT: s_waitcnt lgkmcnt(0)240; GFX11-NEXT: s_and_b32 s6, 0xffff, s0241; GFX11-NEXT: s_lshr_b32 s5, s0, 16242; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s4243; GFX11-NEXT: s_lshr_b32 s0, s0, 24244; GFX11-NEXT: s_lshr_b32 s4, s1, 16245; GFX11-NEXT: s_and_b32 s7, 0xffff, s1246; GFX11-NEXT: s_lshr_b32 s6, s6, 8247; GFX11-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v3, s2248; GFX11-NEXT: s_lshr_b32 s1, s1, 24249; GFX11-NEXT: v_dual_mov_b32 v4, s5 :: v_dual_mov_b32 v5, s0250; GFX11-NEXT: s_lshr_b32 s0, s7, 8251; GFX11-NEXT: v_dual_mov_b32 v6, s4 :: v_dual_mov_b32 v7, s6252; GFX11-NEXT: s_and_b32 s9, 0xffff, s2253; GFX11-NEXT: v_dual_mov_b32 v8, s1 :: v_dual_mov_b32 v9, s0254; GFX11-NEXT: s_lshr_b32 s0, s2, 24255; GFX11-NEXT: s_lshr_b32 s1, s9, 8256; GFX11-NEXT: ds_store_b8 v1, v0257; GFX11-NEXT: ds_store_b8 v1, v7 offset:1258; GFX11-NEXT: ds_store_b8 v1, v4 offset:2259; GFX11-NEXT: ds_store_b8 v1, v5 offset:3260; GFX11-NEXT: ds_store_b8 v1, v2 offset:4261; GFX11-NEXT: ds_store_b8 v1, v9 offset:5262; GFX11-NEXT: ds_store_b8 v1, v6 offset:6263; GFX11-NEXT: ds_store_b8 v1, v8 offset:7264; GFX11-NEXT: v_mov_b32_e32 v4, s0265; GFX11-NEXT: s_and_b32 s0, 0xffff, s3266; GFX11-NEXT: s_lshr_b32 s8, s2, 16267; GFX11-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v5, s3268; GFX11-NEXT: s_lshr_b32 s0, s0, 8269; GFX11-NEXT: s_lshr_b32 s1, s3, 16270; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)271; GFX11-NEXT: v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v7, s1272; GFX11-NEXT: v_mov_b32_e32 v6, s0273; GFX11-NEXT: s_lshr_b32 s0, s3, 24274; GFX11-NEXT: v_mov_b32_e32 v8, s0275; GFX11-NEXT: ds_store_b8 v1, v3 offset:8276; GFX11-NEXT: ds_store_b8 v1, v0 offset:9277; GFX11-NEXT: ds_store_b8 v1, v2 offset:10278; GFX11-NEXT: ds_store_b8 v1, v4 offset:11279; GFX11-NEXT: ds_store_b8 v1, v5 offset:12280; GFX11-NEXT: ds_store_b8 v1, v6 offset:13281; GFX11-NEXT: ds_store_b8 v1, v7 offset:14282; GFX11-NEXT: ds_store_b8 v1, v8 offset:15283; GFX11-NEXT: s_endpgm284 store <4 x i32> %x, ptr addrspace(3) %out, align 1285 ret void286}287 288define amdgpu_kernel void @store_lds_v4i32_align2(ptr addrspace(3) %out, <4 x i32> %x) {289; GFX9-LABEL: store_lds_v4i32_align2:290; GFX9: ; %bb.0:291; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10292; GFX9-NEXT: s_load_dword s6, s[4:5], 0x0293; GFX9-NEXT: s_waitcnt lgkmcnt(0)294; GFX9-NEXT: s_lshr_b32 s4, s0, 16295; GFX9-NEXT: v_mov_b32_e32 v0, s0296; GFX9-NEXT: v_mov_b32_e32 v1, s6297; GFX9-NEXT: ds_write_b16 v1, v0298; GFX9-NEXT: v_mov_b32_e32 v0, s4299; GFX9-NEXT: ds_write_b16 v1, v0 offset:2300; GFX9-NEXT: s_lshr_b32 s0, s1, 16301; GFX9-NEXT: v_mov_b32_e32 v0, s1302; GFX9-NEXT: ds_write_b16 v1, v0 offset:4303; GFX9-NEXT: v_mov_b32_e32 v0, s0304; GFX9-NEXT: ds_write_b16 v1, v0 offset:6305; GFX9-NEXT: s_lshr_b32 s0, s2, 16306; GFX9-NEXT: v_mov_b32_e32 v0, s2307; GFX9-NEXT: ds_write_b16 v1, v0 offset:8308; GFX9-NEXT: v_mov_b32_e32 v0, s0309; GFX9-NEXT: ds_write_b16 v1, v0 offset:10310; GFX9-NEXT: s_lshr_b32 s0, s3, 16311; GFX9-NEXT: v_mov_b32_e32 v0, s3312; GFX9-NEXT: ds_write_b16 v1, v0 offset:12313; GFX9-NEXT: v_mov_b32_e32 v0, s0314; GFX9-NEXT: ds_write_b16 v1, v0 offset:14315; GFX9-NEXT: s_endpgm316;317; GFX7-LABEL: store_lds_v4i32_align2:318; GFX7: ; %bb.0:319; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4320; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0321; GFX7-NEXT: s_mov_b32 m0, -1322; GFX7-NEXT: s_waitcnt lgkmcnt(0)323; GFX7-NEXT: s_lshr_b32 s5, s0, 16324; GFX7-NEXT: v_mov_b32_e32 v0, s0325; GFX7-NEXT: v_mov_b32_e32 v1, s4326; GFX7-NEXT: ds_write_b16 v1, v0327; GFX7-NEXT: v_mov_b32_e32 v0, s5328; GFX7-NEXT: ds_write_b16 v1, v0 offset:2329; GFX7-NEXT: s_lshr_b32 s0, s1, 16330; GFX7-NEXT: v_mov_b32_e32 v0, s1331; GFX7-NEXT: ds_write_b16 v1, v0 offset:4332; GFX7-NEXT: v_mov_b32_e32 v0, s0333; GFX7-NEXT: ds_write_b16 v1, v0 offset:6334; GFX7-NEXT: s_lshr_b32 s0, s2, 16335; GFX7-NEXT: v_mov_b32_e32 v0, s2336; GFX7-NEXT: ds_write_b16 v1, v0 offset:8337; GFX7-NEXT: v_mov_b32_e32 v0, s0338; GFX7-NEXT: ds_write_b16 v1, v0 offset:10339; GFX7-NEXT: s_lshr_b32 s0, s3, 16340; GFX7-NEXT: v_mov_b32_e32 v0, s3341; GFX7-NEXT: ds_write_b16 v1, v0 offset:12342; GFX7-NEXT: v_mov_b32_e32 v0, s0343; GFX7-NEXT: ds_write_b16 v1, v0 offset:14344; GFX7-NEXT: s_endpgm345;346; GFX10-LABEL: store_lds_v4i32_align2:347; GFX10: ; %bb.0:348; GFX10-NEXT: s_clause 0x1349; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10350; GFX10-NEXT: s_load_dword s6, s[4:5], 0x0351; GFX10-NEXT: s_waitcnt lgkmcnt(0)352; GFX10-NEXT: v_mov_b32_e32 v0, s0353; GFX10-NEXT: v_mov_b32_e32 v1, s6354; GFX10-NEXT: v_mov_b32_e32 v2, s1355; GFX10-NEXT: s_lshr_b32 s4, s0, 16356; GFX10-NEXT: v_mov_b32_e32 v3, s2357; GFX10-NEXT: s_lshr_b32 s0, s1, 16358; GFX10-NEXT: s_lshr_b32 s1, s2, 16359; GFX10-NEXT: s_lshr_b32 s2, s3, 16360; GFX10-NEXT: v_mov_b32_e32 v4, s3361; GFX10-NEXT: v_mov_b32_e32 v5, s4362; GFX10-NEXT: v_mov_b32_e32 v6, s0363; GFX10-NEXT: v_mov_b32_e32 v7, s1364; GFX10-NEXT: v_mov_b32_e32 v8, s2365; GFX10-NEXT: ds_write_b16 v1, v0366; GFX10-NEXT: ds_write_b16 v1, v2 offset:4367; GFX10-NEXT: ds_write_b16 v1, v3 offset:8368; GFX10-NEXT: ds_write_b16 v1, v4 offset:12369; GFX10-NEXT: ds_write_b16 v1, v5 offset:2370; GFX10-NEXT: ds_write_b16 v1, v6 offset:6371; GFX10-NEXT: ds_write_b16 v1, v7 offset:10372; GFX10-NEXT: ds_write_b16 v1, v8 offset:14373; GFX10-NEXT: s_endpgm374;375; GFX11-LABEL: store_lds_v4i32_align2:376; GFX11: ; %bb.0:377; GFX11-NEXT: s_clause 0x1378; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x10379; GFX11-NEXT: s_load_b32 s4, s[4:5], 0x0380; GFX11-NEXT: s_waitcnt lgkmcnt(0)381; GFX11-NEXT: s_lshr_b32 s5, s0, 16382; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s4383; GFX11-NEXT: s_lshr_b32 s0, s1, 16384; GFX11-NEXT: v_dual_mov_b32 v4, s3 :: v_dual_mov_b32 v5, s5385; GFX11-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v3, s2386; GFX11-NEXT: s_lshr_b32 s1, s2, 16387; GFX11-NEXT: s_lshr_b32 s2, s3, 16388; GFX11-NEXT: v_dual_mov_b32 v6, s0 :: v_dual_mov_b32 v7, s1389; GFX11-NEXT: v_mov_b32_e32 v8, s2390; GFX11-NEXT: ds_store_b16 v1, v0391; GFX11-NEXT: ds_store_b16 v1, v5 offset:2392; GFX11-NEXT: ds_store_b16 v1, v2 offset:4393; GFX11-NEXT: ds_store_b16 v1, v6 offset:6394; GFX11-NEXT: ds_store_b16 v1, v3 offset:8395; GFX11-NEXT: ds_store_b16 v1, v7 offset:10396; GFX11-NEXT: ds_store_b16 v1, v4 offset:12397; GFX11-NEXT: ds_store_b16 v1, v8 offset:14398; GFX11-NEXT: s_endpgm399 store <4 x i32> %x, ptr addrspace(3) %out, align 2400 ret void401}402 403define amdgpu_kernel void @store_lds_v4i32_align4(ptr addrspace(3) %out, <4 x i32> %x) {404; GFX9-LABEL: store_lds_v4i32_align4:405; GFX9: ; %bb.0:406; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10407; GFX9-NEXT: s_load_dword s6, s[4:5], 0x0408; GFX9-NEXT: s_waitcnt lgkmcnt(0)409; GFX9-NEXT: v_mov_b32_e32 v0, s0410; GFX9-NEXT: v_mov_b32_e32 v1, s6411; GFX9-NEXT: v_mov_b32_e32 v2, s1412; GFX9-NEXT: v_mov_b32_e32 v3, s2413; GFX9-NEXT: ds_write2_b32 v1, v0, v2 offset1:1414; GFX9-NEXT: v_mov_b32_e32 v0, s3415; GFX9-NEXT: ds_write2_b32 v1, v3, v0 offset0:2 offset1:3416; GFX9-NEXT: s_endpgm417;418; GFX7-LABEL: store_lds_v4i32_align4:419; GFX7: ; %bb.0:420; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4421; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0422; GFX7-NEXT: s_mov_b32 m0, -1423; GFX7-NEXT: s_waitcnt lgkmcnt(0)424; GFX7-NEXT: v_mov_b32_e32 v0, s0425; GFX7-NEXT: v_mov_b32_e32 v1, s4426; GFX7-NEXT: v_mov_b32_e32 v2, s1427; GFX7-NEXT: ds_write2_b32 v1, v0, v2 offset1:1428; GFX7-NEXT: v_mov_b32_e32 v0, s2429; GFX7-NEXT: v_mov_b32_e32 v2, s3430; GFX7-NEXT: ds_write2_b32 v1, v0, v2 offset0:2 offset1:3431; GFX7-NEXT: s_endpgm432;433; GFX10-LABEL: store_lds_v4i32_align4:434; GFX10: ; %bb.0:435; GFX10-NEXT: s_clause 0x1436; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10437; GFX10-NEXT: s_load_dword s6, s[4:5], 0x0438; GFX10-NEXT: s_waitcnt lgkmcnt(0)439; GFX10-NEXT: v_mov_b32_e32 v0, s0440; GFX10-NEXT: v_mov_b32_e32 v1, s6441; GFX10-NEXT: v_mov_b32_e32 v2, s1442; GFX10-NEXT: v_mov_b32_e32 v3, s2443; GFX10-NEXT: v_mov_b32_e32 v4, s3444; GFX10-NEXT: ds_write2_b32 v1, v0, v2 offset1:1445; GFX10-NEXT: ds_write2_b32 v1, v3, v4 offset0:2 offset1:3446; GFX10-NEXT: s_endpgm447;448; GFX11-LABEL: store_lds_v4i32_align4:449; GFX11: ; %bb.0:450; GFX11-NEXT: s_clause 0x1451; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x10452; GFX11-NEXT: s_load_b32 s4, s[4:5], 0x0453; GFX11-NEXT: s_waitcnt lgkmcnt(0)454; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s4455; GFX11-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v3, s2456; GFX11-NEXT: v_mov_b32_e32 v4, s3457; GFX11-NEXT: ds_store_2addr_b32 v1, v0, v2 offset1:1458; GFX11-NEXT: ds_store_2addr_b32 v1, v3, v4 offset0:2 offset1:3459; GFX11-NEXT: s_endpgm460 store <4 x i32> %x, ptr addrspace(3) %out, align 4461 ret void462}463 464define amdgpu_kernel void @store_lds_v4i32_align8(ptr addrspace(3) %out, <4 x i32> %x) {465; GFX9-LABEL: store_lds_v4i32_align8:466; GFX9: ; %bb.0:467; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10468; GFX9-NEXT: s_load_dword s6, s[4:5], 0x0469; GFX9-NEXT: s_waitcnt lgkmcnt(0)470; GFX9-NEXT: v_mov_b32_e32 v0, s0471; GFX9-NEXT: v_mov_b32_e32 v1, s1472; GFX9-NEXT: v_mov_b32_e32 v2, s2473; GFX9-NEXT: v_mov_b32_e32 v3, s3474; GFX9-NEXT: v_mov_b32_e32 v4, s6475; GFX9-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset1:1476; GFX9-NEXT: s_endpgm477;478; GFX7-LABEL: store_lds_v4i32_align8:479; GFX7: ; %bb.0:480; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4481; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0482; GFX7-NEXT: s_mov_b32 m0, -1483; GFX7-NEXT: s_waitcnt lgkmcnt(0)484; GFX7-NEXT: v_mov_b32_e32 v0, s0485; GFX7-NEXT: v_mov_b32_e32 v1, s1486; GFX7-NEXT: v_mov_b32_e32 v2, s2487; GFX7-NEXT: v_mov_b32_e32 v3, s3488; GFX7-NEXT: v_mov_b32_e32 v4, s4489; GFX7-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset1:1490; GFX7-NEXT: s_endpgm491;492; GFX10-LABEL: store_lds_v4i32_align8:493; GFX10: ; %bb.0:494; GFX10-NEXT: s_clause 0x1495; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10496; GFX10-NEXT: s_load_dword s6, s[4:5], 0x0497; GFX10-NEXT: s_waitcnt lgkmcnt(0)498; GFX10-NEXT: v_mov_b32_e32 v0, s0499; GFX10-NEXT: v_mov_b32_e32 v1, s6500; GFX10-NEXT: v_mov_b32_e32 v2, s1501; GFX10-NEXT: v_mov_b32_e32 v3, s2502; GFX10-NEXT: v_mov_b32_e32 v4, s3503; GFX10-NEXT: ds_write2_b32 v1, v0, v2 offset1:1504; GFX10-NEXT: ds_write2_b32 v1, v3, v4 offset0:2 offset1:3505; GFX10-NEXT: s_endpgm506;507; GFX11-LABEL: store_lds_v4i32_align8:508; GFX11: ; %bb.0:509; GFX11-NEXT: s_clause 0x1510; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x10511; GFX11-NEXT: s_load_b32 s4, s[4:5], 0x0512; GFX11-NEXT: s_waitcnt lgkmcnt(0)513; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1514; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3515; GFX11-NEXT: v_mov_b32_e32 v4, s4516; GFX11-NEXT: ds_store_2addr_b64 v4, v[0:1], v[2:3] offset1:1517; GFX11-NEXT: s_endpgm518 store <4 x i32> %x, ptr addrspace(3) %out, align 8519 ret void520}521 522define amdgpu_kernel void @store_lds_v4i32_align16(ptr addrspace(3) %out, <4 x i32> %x) {523; GFX9-LABEL: store_lds_v4i32_align16:524; GFX9: ; %bb.0:525; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10526; GFX9-NEXT: s_load_dword s6, s[4:5], 0x0527; GFX9-NEXT: s_waitcnt lgkmcnt(0)528; GFX9-NEXT: v_mov_b32_e32 v0, s0529; GFX9-NEXT: v_mov_b32_e32 v1, s1530; GFX9-NEXT: v_mov_b32_e32 v2, s2531; GFX9-NEXT: v_mov_b32_e32 v3, s3532; GFX9-NEXT: v_mov_b32_e32 v4, s6533; GFX9-NEXT: ds_write_b128 v4, v[0:3]534; GFX9-NEXT: s_endpgm535;536; GFX7-LABEL: store_lds_v4i32_align16:537; GFX7: ; %bb.0:538; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4539; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0540; GFX7-NEXT: s_mov_b32 m0, -1541; GFX7-NEXT: s_waitcnt lgkmcnt(0)542; GFX7-NEXT: v_mov_b32_e32 v0, s0543; GFX7-NEXT: v_mov_b32_e32 v1, s1544; GFX7-NEXT: v_mov_b32_e32 v2, s2545; GFX7-NEXT: v_mov_b32_e32 v3, s3546; GFX7-NEXT: v_mov_b32_e32 v4, s4547; GFX7-NEXT: ds_write_b128 v4, v[0:3]548; GFX7-NEXT: s_endpgm549;550; GFX10-LABEL: store_lds_v4i32_align16:551; GFX10: ; %bb.0:552; GFX10-NEXT: s_clause 0x1553; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10554; GFX10-NEXT: s_load_dword s6, s[4:5], 0x0555; GFX10-NEXT: s_waitcnt lgkmcnt(0)556; GFX10-NEXT: v_mov_b32_e32 v0, s0557; GFX10-NEXT: v_mov_b32_e32 v1, s1558; GFX10-NEXT: v_mov_b32_e32 v2, s2559; GFX10-NEXT: v_mov_b32_e32 v3, s3560; GFX10-NEXT: v_mov_b32_e32 v4, s6561; GFX10-NEXT: ds_write_b128 v4, v[0:3]562; GFX10-NEXT: s_endpgm563;564; GFX11-LABEL: store_lds_v4i32_align16:565; GFX11: ; %bb.0:566; GFX11-NEXT: s_clause 0x1567; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x10568; GFX11-NEXT: s_load_b32 s4, s[4:5], 0x0569; GFX11-NEXT: s_waitcnt lgkmcnt(0)570; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1571; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3572; GFX11-NEXT: v_mov_b32_e32 v4, s4573; GFX11-NEXT: ds_store_b128 v4, v[0:3]574; GFX11-NEXT: s_endpgm575 store <4 x i32> %x, ptr addrspace(3) %out, align 16576 ret void577}578