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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa --global-isel -new-reg-bank-select < %s | FileCheck --check-prefix=PREGFX9 %s3; RUN: llc -mtriple=amdgcn-amd-amdhsa --global-isel -new-reg-bank-select -mcpu=hawaii < %s | FileCheck --check-prefix=PREGFX9 %s4; RUN: llc -mtriple=amdgcn-amd-amdhsa --global-isel -new-reg-bank-select -mcpu=fiji < %s | FileCheck --check-prefix=PREGFX9 %s5; RUN: llc -mtriple=amdgcn-amd-amdhsa --global-isel -new-reg-bank-select -mcpu=gfx90a < %s | FileCheck --check-prefix=PREGFX9 %s6; RUN: llc -mtriple=amdgcn-amd-amdhsa --global-isel -new-reg-bank-select -mcpu=gfx1030 < %s | FileCheck --check-prefix=GFX10PLUS %s7; RUN: llc -mtriple=amdgcn-amd-amdhsa --global-isel -new-reg-bank-select -mcpu=gfx1100 < %s | FileCheck --check-prefix=GFX10PLUS %s8 9define i32 @check_v_bfe(i16 %a) {10; PREGFX9-LABEL: check_v_bfe:11; PREGFX9: ; %bb.0: ; %entry12; PREGFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13; PREGFX9-NEXT: v_bfe_i32 v0, v0, 0, 1614; PREGFX9-NEXT: s_setpc_b64 s[30:31]15;16; GFX10PLUS-LABEL: check_v_bfe:17; GFX10PLUS: ; %bb.0: ; %entry18; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)19; GFX10PLUS-NEXT: v_bfe_i32 v0, v0, 0, 1620; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]21entry:22 %res = sext i16 %a to i3223 ret i32 %res24}25