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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck %s --check-prefix=GFX123 4define amdgpu_ps void @test_swmmac_f32_16x16x32_f16_index_key(<8 x half> %A, <16 x half> %B, <8 x float> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {5; GFX12-LABEL: test_swmmac_f32_16x16x32_f16_index_key:6; GFX12: ; %bb.0: ; %bb7; GFX12-NEXT: global_load_b32 v20, v[20:21], off8; GFX12-NEXT: v_dual_mov_b32 v33, v19 :: v_dual_mov_b32 v32, v189; GFX12-NEXT: v_dual_mov_b32 v31, v17 :: v_dual_mov_b32 v30, v1610; GFX12-NEXT: v_dual_mov_b32 v29, v15 :: v_dual_mov_b32 v28, v1411; GFX12-NEXT: v_dual_mov_b32 v27, v13 :: v_dual_mov_b32 v26, v1212; GFX12-NEXT: s_wait_loadcnt 0x013; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)14; GFX12-NEXT: v_swmmac_f32_16x16x32_f16 v[26:33], v[0:3], v[4:11], v2015; GFX12-NEXT: v_swmmac_f32_16x16x32_f16 v[12:19], v[0:3], v[4:11], v20 index_key:116; GFX12-NEXT: s_clause 0x117; GFX12-NEXT: global_store_b128 v[22:23], v[26:29], off18; GFX12-NEXT: global_store_b128 v[22:23], v[30:33], off offset:1619; GFX12-NEXT: s_clause 0x120; GFX12-NEXT: global_store_b128 v[24:25], v[12:15], off21; GFX12-NEXT: global_store_b128 v[24:25], v[16:19], off offset:1622; GFX12-NEXT: s_endpgm23bb:24 %IndexVec = load <2 x i16>, ptr addrspace(1) %IndexVecPtr, align 425 %Index0 = extractelement <2 x i16> %IndexVec, i32 026 %res0 = call <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.f16.v8f32.v8f16.v16f16.v8f32.i16(<8 x half> %A, <16 x half> %B, <8 x float> %C, i16 %Index0)27 store <8 x float> %res0, ptr addrspace(1) %out028 %Index1 = extractelement <2 x i16> %IndexVec, i32 129 %res1 = call <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.f16.v8f32.v8f16.v16f16.v8f32.i16(<8 x half> %A, <16 x half> %B, <8 x float> %C, i16 %Index1)30 store <8 x float> %res1, ptr addrspace(1) %out131 ret void32}33 34define amdgpu_ps void @test_swmmac_f32_16x16x32_bf16_index_key(<8 x i16> %A, <16 x i16> %B, <8 x float> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {35; GFX12-LABEL: test_swmmac_f32_16x16x32_bf16_index_key:36; GFX12: ; %bb.0: ; %bb37; GFX12-NEXT: global_load_b32 v20, v[20:21], off38; GFX12-NEXT: v_dual_mov_b32 v33, v19 :: v_dual_mov_b32 v32, v1839; GFX12-NEXT: v_dual_mov_b32 v31, v17 :: v_dual_mov_b32 v30, v1640; GFX12-NEXT: v_dual_mov_b32 v29, v15 :: v_dual_mov_b32 v28, v1441; GFX12-NEXT: v_dual_mov_b32 v27, v13 :: v_dual_mov_b32 v26, v1242; GFX12-NEXT: s_wait_loadcnt 0x043; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)44; GFX12-NEXT: v_swmmac_f32_16x16x32_bf16 v[26:33], v[0:3], v[4:11], v2045; GFX12-NEXT: v_swmmac_f32_16x16x32_bf16 v[12:19], v[0:3], v[4:11], v20 index_key:146; GFX12-NEXT: s_clause 0x147; GFX12-NEXT: global_store_b128 v[22:23], v[26:29], off48; GFX12-NEXT: global_store_b128 v[22:23], v[30:33], off offset:1649; GFX12-NEXT: s_clause 0x150; GFX12-NEXT: global_store_b128 v[24:25], v[12:15], off51; GFX12-NEXT: global_store_b128 v[24:25], v[16:19], off offset:1652; GFX12-NEXT: s_endpgm53bb:54 %IndexVec = load <2 x i16>, ptr addrspace(1) %IndexVecPtr, align 455 %Index0 = extractelement <2 x i16> %IndexVec, i32 056 %res0 = call <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.bf16.v8f32.v8i16.v16i16.v8f32.i16(<8 x i16> %A, <16 x i16> %B, <8 x float> %C, i16 %Index0)57 store <8 x float> %res0, ptr addrspace(1) %out058 %Index1 = extractelement <2 x i16> %IndexVec, i32 159 %res1 = call <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.bf16.v8f32.v8i16.v16i16.v8f32.i16(<8 x i16> %A, <16 x i16> %B, <8 x float> %C, i16 %Index1)60 store <8 x float> %res1, ptr addrspace(1) %out161 ret void62}63 64define amdgpu_ps void @test_swmmac_f16_16x16x32_f16_index_key(<8 x half> %A, <16 x half> %B, <8 x half> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {65; GFX12-LABEL: test_swmmac_f16_16x16x32_f16_index_key:66; GFX12: ; %bb.0: ; %bb67; GFX12-NEXT: global_load_b32 v16, v[16:17], off68; GFX12-NEXT: v_dual_mov_b32 v25, v15 :: v_dual_mov_b32 v24, v1469; GFX12-NEXT: v_dual_mov_b32 v23, v13 :: v_dual_mov_b32 v22, v1270; GFX12-NEXT: s_wait_loadcnt 0x071; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)72; GFX12-NEXT: v_swmmac_f16_16x16x32_f16 v[22:25], v[0:3], v[4:11], v1673; GFX12-NEXT: v_swmmac_f16_16x16x32_f16 v[12:15], v[0:3], v[4:11], v16 index_key:174; GFX12-NEXT: global_store_b128 v[18:19], v[22:25], off75; GFX12-NEXT: global_store_b128 v[20:21], v[12:15], off76; GFX12-NEXT: s_endpgm77bb:78 %IndexVec = load <2 x i16>, ptr addrspace(1) %IndexVecPtr, align 479 %Index0 = extractelement <2 x i16> %IndexVec, i32 080 %res0 = call <8 x half> @llvm.amdgcn.swmmac.f16.16x16x32.f16.v8f16.v8f16.v16f16.v8f16.i16(<8 x half> %A, <16 x half> %B, <8 x half> %C, i16 %Index0)81 store <8 x half> %res0, ptr addrspace(1) %out082 %Index1 = extractelement <2 x i16> %IndexVec, i32 183 %res1 = call <8 x half> @llvm.amdgcn.swmmac.f16.16x16x32.f16.v8f16.v8f16.v16f16.v8f16.i16(<8 x half> %A, <16 x half> %B, <8 x half> %C, i16 %Index1)84 store <8 x half> %res1, ptr addrspace(1) %out185 ret void86}87 88define amdgpu_ps void @test_swmmac_bf16_16x16x32_bf16_index_key(<8 x i16> %A, <16 x i16> %B, <8 x i16> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {89; GFX12-LABEL: test_swmmac_bf16_16x16x32_bf16_index_key:90; GFX12: ; %bb.0: ; %bb91; GFX12-NEXT: global_load_b32 v16, v[16:17], off92; GFX12-NEXT: v_dual_mov_b32 v25, v15 :: v_dual_mov_b32 v24, v1493; GFX12-NEXT: v_dual_mov_b32 v23, v13 :: v_dual_mov_b32 v22, v1294; GFX12-NEXT: s_wait_loadcnt 0x095; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)96; GFX12-NEXT: v_swmmac_bf16_16x16x32_bf16 v[22:25], v[0:3], v[4:11], v1697; GFX12-NEXT: v_swmmac_bf16_16x16x32_bf16 v[12:15], v[0:3], v[4:11], v16 index_key:198; GFX12-NEXT: global_store_b128 v[18:19], v[22:25], off99; GFX12-NEXT: global_store_b128 v[20:21], v[12:15], off100; GFX12-NEXT: s_endpgm101bb:102 %IndexVec = load <2 x i16>, ptr addrspace(1) %IndexVecPtr, align 4103 %Index0 = extractelement <2 x i16> %IndexVec, i32 0104 %res0 = call <8 x i16> @llvm.amdgcn.swmmac.bf16.16x16x32.bf16.v8i16.v8i16.v16i16.v8i16.i16(<8 x i16> %A, <16 x i16> %B, <8 x i16> %C, i16 %Index0)105 store <8 x i16> %res0, ptr addrspace(1) %out0106 %Index1 = extractelement <2 x i16> %IndexVec, i32 1107 %res1 = call <8 x i16> @llvm.amdgcn.swmmac.bf16.16x16x32.bf16.v8i16.v8i16.v16i16.v8i16.i16(<8 x i16> %A, <16 x i16> %B, <8 x i16> %C, i16 %Index1)108 store <8 x i16> %res1, ptr addrspace(1) %out1109 ret void110}111 112define amdgpu_ps void @test_swmmac_i32_16x16x32_iu8_index_key(<2 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {113; GFX12-LABEL: test_swmmac_i32_16x16x32_iu8_index_key:114; GFX12: ; %bb.0: ; %bb115; GFX12-NEXT: global_load_b32 v14, v[14:15], off116; GFX12-NEXT: v_dual_mov_b32 v27, v13 :: v_dual_mov_b32 v26, v12117; GFX12-NEXT: v_dual_mov_b32 v25, v11 :: v_dual_mov_b32 v24, v10118; GFX12-NEXT: v_dual_mov_b32 v23, v9 :: v_dual_mov_b32 v22, v8119; GFX12-NEXT: v_dual_mov_b32 v21, v7 :: v_dual_mov_b32 v20, v6120; GFX12-NEXT: s_wait_loadcnt 0x0121; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)122; GFX12-NEXT: v_swmmac_i32_16x16x32_iu8 v[20:27], v[0:1], v[2:5], v14123; GFX12-NEXT: v_swmmac_i32_16x16x32_iu8 v[6:13], v[0:1], v[2:5], v14 index_key:1124; GFX12-NEXT: s_clause 0x1125; GFX12-NEXT: global_store_b128 v[16:17], v[20:23], off126; GFX12-NEXT: global_store_b128 v[16:17], v[24:27], off offset:16127; GFX12-NEXT: s_clause 0x1128; GFX12-NEXT: global_store_b128 v[18:19], v[6:9], off129; GFX12-NEXT: global_store_b128 v[18:19], v[10:13], off offset:16130; GFX12-NEXT: s_endpgm131bb:132 %IndexVec = load <2 x i16>, ptr addrspace(1) %IndexVecPtr, align 4133 %Index0 = extractelement <2 x i16> %IndexVec, i32 0134 %res0 = call <8 x i32> @llvm.amdgcn.swmmac.i32.16x16x32.iu8.v8i32.v2i32.v4i32.v8i32.i16(i1 0, <2 x i32> %A, i1 0, <4 x i32> %B, <8 x i32> %C, i16 %Index0, i1 0)135 store <8 x i32> %res0, ptr addrspace(1) %out0136 %Index1 = extractelement <2 x i16> %IndexVec, i32 1137 %res1 = call <8 x i32> @llvm.amdgcn.swmmac.i32.16x16x32.iu8.v8i32.v2i32.v4i32.v8i32.i16(i1 0, <2 x i32> %A, i1 0, <4 x i32> %B, <8 x i32> %C, i16 %Index1, i1 0)138 store <8 x i32> %res1, ptr addrspace(1) %out1139 ret void140}141 142define amdgpu_ps void @test_swmmac_i32_16x16x32_iu4_index_key(i32 %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {143; GFX12-LABEL: test_swmmac_i32_16x16x32_iu4_index_key:144; GFX12: ; %bb.0: ; %bb145; GFX12-NEXT: global_load_b32 v11, v[11:12], off146; GFX12-NEXT: v_dual_mov_b32 v24, v10 :: v_dual_mov_b32 v23, v9147; GFX12-NEXT: v_dual_mov_b32 v22, v8 :: v_dual_mov_b32 v21, v7148; GFX12-NEXT: v_dual_mov_b32 v20, v6 :: v_dual_mov_b32 v19, v5149; GFX12-NEXT: v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v17, v3150; GFX12-NEXT: s_wait_loadcnt 0x0151; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)152; GFX12-NEXT: v_swmmac_i32_16x16x32_iu4 v[17:24], v0, v[1:2], v11153; GFX12-NEXT: v_swmmac_i32_16x16x32_iu4 v[3:10], v0, v[1:2], v11 index_key:1154; GFX12-NEXT: s_clause 0x1155; GFX12-NEXT: global_store_b128 v[13:14], v[17:20], off156; GFX12-NEXT: global_store_b128 v[13:14], v[21:24], off offset:16157; GFX12-NEXT: s_clause 0x1158; GFX12-NEXT: global_store_b128 v[15:16], v[3:6], off159; GFX12-NEXT: global_store_b128 v[15:16], v[7:10], off offset:16160; GFX12-NEXT: s_endpgm161bb:162 %IndexVec = load <2 x i16>, ptr addrspace(1) %IndexVecPtr, align 4163 %Index0 = extractelement <2 x i16> %IndexVec, i32 0164 %res0 = call <8 x i32> @llvm.amdgcn.swmmac.i32.16x16x32.iu4.v8i32.i32.v2i32.v8i32.i16(i1 0, i32 %A, i1 0, <2 x i32> %B, <8 x i32> %C, i16 %Index0, i1 0)165 store <8 x i32> %res0, ptr addrspace(1) %out0166 %Index1 = extractelement <2 x i16> %IndexVec, i32 1167 %res1 = call <8 x i32> @llvm.amdgcn.swmmac.i32.16x16x32.iu4.v8i32.i32.v2i32.v8i32.i16(i1 0, i32 %A, i1 0, <2 x i32> %B, <8 x i32> %C, i16 %Index1, i1 0)168 store <8 x i32> %res1, ptr addrspace(1) %out1169 ret void170}171 172define amdgpu_ps void @test_swmmac_f32_16x16x32_fp8_fp8_index_key(<2 x i32> %A, <4 x i32> %B, <8 x float> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {173; GFX12-LABEL: test_swmmac_f32_16x16x32_fp8_fp8_index_key:174; GFX12: ; %bb.0: ; %bb175; GFX12-NEXT: global_load_b32 v14, v[14:15], off176; GFX12-NEXT: v_dual_mov_b32 v27, v13 :: v_dual_mov_b32 v26, v12177; GFX12-NEXT: v_dual_mov_b32 v25, v11 :: v_dual_mov_b32 v24, v10178; GFX12-NEXT: v_dual_mov_b32 v23, v9 :: v_dual_mov_b32 v22, v8179; GFX12-NEXT: v_dual_mov_b32 v21, v7 :: v_dual_mov_b32 v20, v6180; GFX12-NEXT: s_wait_loadcnt 0x0181; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)182; GFX12-NEXT: v_swmmac_f32_16x16x32_fp8_fp8 v[20:27], v[0:1], v[2:5], v14183; GFX12-NEXT: v_swmmac_f32_16x16x32_fp8_fp8 v[6:13], v[0:1], v[2:5], v14 index_key:1184; GFX12-NEXT: s_clause 0x1185; GFX12-NEXT: global_store_b128 v[16:17], v[20:23], off186; GFX12-NEXT: global_store_b128 v[16:17], v[24:27], off offset:16187; GFX12-NEXT: s_clause 0x1188; GFX12-NEXT: global_store_b128 v[18:19], v[6:9], off189; GFX12-NEXT: global_store_b128 v[18:19], v[10:13], off offset:16190; GFX12-NEXT: s_endpgm191bb:192 %IndexVec = load <2 x i16>, ptr addrspace(1) %IndexVecPtr, align 4193 %Index0 = extractelement <2 x i16> %IndexVec, i32 0194 %res0 = call <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.fp8.fp8.v8f32.v2i32.v4i32.v8f32.i16(<2 x i32> %A, <4 x i32> %B, <8 x float> %C, i16 %Index0)195 store <8 x float> %res0, ptr addrspace(1) %out0196 %Index1 = extractelement <2 x i16> %IndexVec, i32 1197 %res1 = call <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.fp8.fp8.v8f32.v2i32.v4i32.v8f32.i16(<2 x i32> %A, <4 x i32> %B, <8 x float> %C, i16 %Index1)198 store <8 x float> %res1, ptr addrspace(1) %out1199 ret void200}201 202define amdgpu_ps void @test_swmmac_f32_16x16x32_fp8_bf8_index_key(<2 x i32> %A, <4 x i32> %B, <8 x float> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {203; GFX12-LABEL: test_swmmac_f32_16x16x32_fp8_bf8_index_key:204; GFX12: ; %bb.0: ; %bb205; GFX12-NEXT: global_load_b32 v14, v[14:15], off206; GFX12-NEXT: v_dual_mov_b32 v27, v13 :: v_dual_mov_b32 v26, v12207; GFX12-NEXT: v_dual_mov_b32 v25, v11 :: v_dual_mov_b32 v24, v10208; GFX12-NEXT: v_dual_mov_b32 v23, v9 :: v_dual_mov_b32 v22, v8209; GFX12-NEXT: v_dual_mov_b32 v21, v7 :: v_dual_mov_b32 v20, v6210; GFX12-NEXT: s_wait_loadcnt 0x0211; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)212; GFX12-NEXT: v_swmmac_f32_16x16x32_fp8_bf8 v[20:27], v[0:1], v[2:5], v14213; GFX12-NEXT: v_swmmac_f32_16x16x32_fp8_bf8 v[6:13], v[0:1], v[2:5], v14 index_key:1214; GFX12-NEXT: s_clause 0x1215; GFX12-NEXT: global_store_b128 v[16:17], v[20:23], off216; GFX12-NEXT: global_store_b128 v[16:17], v[24:27], off offset:16217; GFX12-NEXT: s_clause 0x1218; GFX12-NEXT: global_store_b128 v[18:19], v[6:9], off219; GFX12-NEXT: global_store_b128 v[18:19], v[10:13], off offset:16220; GFX12-NEXT: s_endpgm221bb:222 %IndexVec = load <2 x i16>, ptr addrspace(1) %IndexVecPtr, align 4223 %Index0 = extractelement <2 x i16> %IndexVec, i32 0224 %res0 = call <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.fp8.bf8.v8f32.v2i32.v4i32.v8f32.i16(<2 x i32> %A, <4 x i32> %B, <8 x float> %C, i16 %Index0)225 store <8 x float> %res0, ptr addrspace(1) %out0226 %Index1 = extractelement <2 x i16> %IndexVec, i32 1227 %res1 = call <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.fp8.bf8.v8f32.v2i32.v4i32.v8f32.i16(<2 x i32> %A, <4 x i32> %B, <8 x float> %C, i16 %Index1)228 store <8 x float> %res1, ptr addrspace(1) %out1229 ret void230}231 232define amdgpu_ps void @test_swmmac_f32_16x16x32_bf8_fp8_index_key(<2 x i32> %A, <4 x i32> %B, <8 x float> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {233; GFX12-LABEL: test_swmmac_f32_16x16x32_bf8_fp8_index_key:234; GFX12: ; %bb.0: ; %bb235; GFX12-NEXT: global_load_b32 v14, v[14:15], off236; GFX12-NEXT: v_dual_mov_b32 v27, v13 :: v_dual_mov_b32 v26, v12237; GFX12-NEXT: v_dual_mov_b32 v25, v11 :: v_dual_mov_b32 v24, v10238; GFX12-NEXT: v_dual_mov_b32 v23, v9 :: v_dual_mov_b32 v22, v8239; GFX12-NEXT: v_dual_mov_b32 v21, v7 :: v_dual_mov_b32 v20, v6240; GFX12-NEXT: s_wait_loadcnt 0x0241; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)242; GFX12-NEXT: v_swmmac_f32_16x16x32_bf8_fp8 v[20:27], v[0:1], v[2:5], v14243; GFX12-NEXT: v_swmmac_f32_16x16x32_bf8_fp8 v[6:13], v[0:1], v[2:5], v14 index_key:1244; GFX12-NEXT: s_clause 0x1245; GFX12-NEXT: global_store_b128 v[16:17], v[20:23], off246; GFX12-NEXT: global_store_b128 v[16:17], v[24:27], off offset:16247; GFX12-NEXT: s_clause 0x1248; GFX12-NEXT: global_store_b128 v[18:19], v[6:9], off249; GFX12-NEXT: global_store_b128 v[18:19], v[10:13], off offset:16250; GFX12-NEXT: s_endpgm251bb:252 %IndexVec = load <2 x i16>, ptr addrspace(1) %IndexVecPtr, align 4253 %Index0 = extractelement <2 x i16> %IndexVec, i32 0254 %res0 = call <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.bf8.fp8.v8f32.v2i32.v4i32.v8f32.i16(<2 x i32> %A, <4 x i32> %B, <8 x float> %C, i16 %Index0)255 store <8 x float> %res0, ptr addrspace(1) %out0256 %Index1 = extractelement <2 x i16> %IndexVec, i32 1257 %res1 = call <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.bf8.fp8.v8f32.v2i32.v4i32.v8f32.i16(<2 x i32> %A, <4 x i32> %B, <8 x float> %C, i16 %Index1)258 store <8 x float> %res1, ptr addrspace(1) %out1259 ret void260}261 262define amdgpu_ps void @test_swmmac_f32_16x16x32_bf8_bf8_index_key(<2 x i32> %A, <4 x i32> %B, <8 x float> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {263; GFX12-LABEL: test_swmmac_f32_16x16x32_bf8_bf8_index_key:264; GFX12: ; %bb.0: ; %bb265; GFX12-NEXT: global_load_b32 v14, v[14:15], off266; GFX12-NEXT: v_dual_mov_b32 v27, v13 :: v_dual_mov_b32 v26, v12267; GFX12-NEXT: v_dual_mov_b32 v25, v11 :: v_dual_mov_b32 v24, v10268; GFX12-NEXT: v_dual_mov_b32 v23, v9 :: v_dual_mov_b32 v22, v8269; GFX12-NEXT: v_dual_mov_b32 v21, v7 :: v_dual_mov_b32 v20, v6270; GFX12-NEXT: s_wait_loadcnt 0x0271; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)272; GFX12-NEXT: v_swmmac_f32_16x16x32_bf8_bf8 v[20:27], v[0:1], v[2:5], v14273; GFX12-NEXT: v_swmmac_f32_16x16x32_bf8_bf8 v[6:13], v[0:1], v[2:5], v14 index_key:1274; GFX12-NEXT: s_clause 0x1275; GFX12-NEXT: global_store_b128 v[16:17], v[20:23], off276; GFX12-NEXT: global_store_b128 v[16:17], v[24:27], off offset:16277; GFX12-NEXT: s_clause 0x1278; GFX12-NEXT: global_store_b128 v[18:19], v[6:9], off279; GFX12-NEXT: global_store_b128 v[18:19], v[10:13], off offset:16280; GFX12-NEXT: s_endpgm281bb:282 %IndexVec = load <2 x i16>, ptr addrspace(1) %IndexVecPtr, align 4283 %Index0 = extractelement <2 x i16> %IndexVec, i32 0284 %res0 = call <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.bf8.bf8.v8f32.v2i32.v4i32.v8f32.i16(<2 x i32> %A, <4 x i32> %B, <8 x float> %C, i16 %Index0)285 store <8 x float> %res0, ptr addrspace(1) %out0286 %Index1 = extractelement <2 x i16> %IndexVec, i32 1287 %res1 = call <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.bf8.bf8.v8f32.v2i32.v4i32.v8f32.i16(<2 x i32> %A, <4 x i32> %B, <8 x float> %C, i16 %Index1)288 store <8 x float> %res1, ptr addrspace(1) %out1289 ret void290}291 292declare <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.f16.v8f32.v8f16.v16f16.v8f32.i16(<8 x half>, <16 x half>, <8 x float>, i16)293declare <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.bf16.v8f32.v8i16.v16i16.v8f32.i16(<8 x i16>, <16 x i16>, <8 x float>, i16)294declare <8 x half> @llvm.amdgcn.swmmac.f16.16x16x32.f16.v8f16.v8f16.v16f16.v8f16.i16(<8 x half>, <16 x half>, <8 x half>, i16)295declare <8 x i16> @llvm.amdgcn.swmmac.bf16.16x16x32.bf16.v8i16.v8i16.v16i16.v8i16.i16(<8 x i16>, <16 x i16>, <8 x i16>, i16)296declare <8 x i32> @llvm.amdgcn.swmmac.i32.16x16x32.iu8.v8i32.v2i32.v4i32.v8i32.i16(i1 immarg, <2 x i32>, i1 immarg, <4 x i32>, <8 x i32>, i16 %Index, i1 immarg)297declare <8 x i32> @llvm.amdgcn.swmmac.i32.16x16x32.iu4.v8i32.i32.v2i32.v8i32.i16(i1 immarg, i32, i1 immarg, <2 x i32>, <8 x i32>, i16 %Index, i1 immarg)298declare <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.fp8.fp8.v8f32.v2i32.v4i32.v8f32.i16(<2 x i32>, <4 x i32>, <8 x float>, i16)299declare <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.fp8.bf8.v8f32.v2i32.v4i32.v8f32.i16(<2 x i32>, <4 x i32>, <8 x float>, i16)300declare <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.bf8.fp8.v8f32.v2i32.v4i32.v8f32.i16(<2 x i32>, <4 x i32>, <8 x float>, i16)301declare <8 x float> @llvm.amdgcn.swmmac.f32.16x16x32.bf8.bf8.v8f32.v2i32.v4i32.v8f32.i16(<2 x i32>, <4 x i32>, <8 x float>, i16)302