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1; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=VI -check-prefix=GCN %s2 3; FIXME: Need to handle non-uniform case for function below (load without gep).4; GCN-LABEL: {{^}}v_test_add_i16:5; VI: flat_load_ushort [[A:v[0-9]+]]6; VI: flat_load_ushort [[B:v[0-9]+]]7; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[A]], [[B]]8; VI-NEXT: buffer_store_short [[ADD]]9define amdgpu_kernel void @v_test_add_i16(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {10 %tid = call i32 @llvm.amdgcn.workitem.id.x()11 %gep.out = getelementptr inbounds i16, ptr addrspace(1) %out, i32 %tid12 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid13 %gep.in1 = getelementptr inbounds i16, ptr addrspace(1) %in1, i32 %tid14 %a = load volatile i16, ptr addrspace(1) %gep.in015 %b = load volatile i16, ptr addrspace(1) %gep.in116 %add = add i16 %a, %b17 store i16 %add, ptr addrspace(1) %out18 ret void19}20 21; FIXME: Need to handle non-uniform case for function below (load without gep).22; GCN-LABEL: {{^}}v_test_add_i16_constant:23; VI: flat_load_ushort [[A:v[0-9]+]]24; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0x7b, [[A]]25; VI-NEXT: buffer_store_short [[ADD]]26define amdgpu_kernel void @v_test_add_i16_constant(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {27 %tid = call i32 @llvm.amdgcn.workitem.id.x()28 %gep.out = getelementptr inbounds i16, ptr addrspace(1) %out, i32 %tid29 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid30 %a = load volatile i16, ptr addrspace(1) %gep.in031 %add = add i16 %a, 12332 store i16 %add, ptr addrspace(1) %out33 ret void34}35 36; FIXME: Need to handle non-uniform case for function below (load without gep).37; GCN-LABEL: {{^}}v_test_add_i16_neg_constant:38; VI: flat_load_ushort [[A:v[0-9]+]]39; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0xfcb3, [[A]]40; VI-NEXT: buffer_store_short [[ADD]]41define amdgpu_kernel void @v_test_add_i16_neg_constant(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {42 %tid = call i32 @llvm.amdgcn.workitem.id.x()43 %gep.out = getelementptr inbounds i16, ptr addrspace(1) %out, i32 %tid44 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid45 %a = load volatile i16, ptr addrspace(1) %gep.in046 %add = add i16 %a, -84547 store i16 %add, ptr addrspace(1) %out48 ret void49}50 51; FIXME: Need to handle non-uniform case for function below (load without gep).52; GCN-LABEL: {{^}}v_test_add_i16_inline_neg1:53; VI: flat_load_ushort [[A:v[0-9]+]]54; VI: v_add_u16_e32 [[ADD:v[0-9]+]], -1, [[A]]55; VI-NEXT: buffer_store_short [[ADD]]56define amdgpu_kernel void @v_test_add_i16_inline_neg1(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {57 %tid = call i32 @llvm.amdgcn.workitem.id.x()58 %gep.out = getelementptr inbounds i16, ptr addrspace(1) %out, i32 %tid59 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid60 %a = load volatile i16, ptr addrspace(1) %gep.in061 %add = add i16 %a, -162 store i16 %add, ptr addrspace(1) %out63 ret void64}65 66; FIXME: Need to handle non-uniform case for function below (load without gep).67; GCN-LABEL: {{^}}v_test_add_i16_zext_to_i32:68; VI: flat_load_ushort [[A:v[0-9]+]]69; VI: flat_load_ushort [[B:v[0-9]+]]70; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[A]], [[B]]71; VI-NEXT: buffer_store_dword [[ADD]]72define amdgpu_kernel void @v_test_add_i16_zext_to_i32(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {73 %tid = call i32 @llvm.amdgcn.workitem.id.x()74 %gep.out = getelementptr inbounds i32, ptr addrspace(1) %out, i32 %tid75 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid76 %gep.in1 = getelementptr inbounds i16, ptr addrspace(1) %in1, i32 %tid77 %a = load volatile i16, ptr addrspace(1) %gep.in078 %b = load volatile i16, ptr addrspace(1) %gep.in179 %add = add i16 %a, %b80 %ext = zext i16 %add to i3281 store i32 %ext, ptr addrspace(1) %out82 ret void83}84 85; FIXME: Need to handle non-uniform case for function below (load without gep).86; GCN-LABEL: {{^}}v_test_add_i16_zext_to_i64:87; VI: flat_load_ushort [[A:v[0-9]+]]88; VI: flat_load_ushort [[B:v[0-9]+]]89; VI-DAG: v_add_u16_e32 v[[ADD:[0-9]+]], [[A]], [[B]]90; VI: buffer_store_dwordx2 v[[[ADD]]:{{[0-9]+\]}}, off, {{s\[[0-9]+:[0-9]+\]}}, 0{{$}}91define amdgpu_kernel void @v_test_add_i16_zext_to_i64(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {92 %tid = call i32 @llvm.amdgcn.workitem.id.x()93 %gep.out = getelementptr inbounds i64, ptr addrspace(1) %out, i32 %tid94 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid95 %gep.in1 = getelementptr inbounds i16, ptr addrspace(1) %in1, i32 %tid96 %a = load volatile i16, ptr addrspace(1) %gep.in097 %b = load volatile i16, ptr addrspace(1) %gep.in198 %add = add i16 %a, %b99 %ext = zext i16 %add to i64100 store i64 %ext, ptr addrspace(1) %out101 ret void102}103 104; FIXME: Need to handle non-uniform case for function below (load without gep).105; GCN-LABEL: {{^}}v_test_add_i16_sext_to_i32:106; VI: flat_load_ushort [[A:v[0-9]+]]107; VI: flat_load_ushort [[B:v[0-9]+]]108; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[A]], [[B]]109; VI-NEXT: v_bfe_i32 [[SEXT:v[0-9]+]], [[ADD]], 0, 16110; VI-NEXT: buffer_store_dword [[SEXT]]111define amdgpu_kernel void @v_test_add_i16_sext_to_i32(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {112 %tid = call i32 @llvm.amdgcn.workitem.id.x()113 %gep.out = getelementptr inbounds i32, ptr addrspace(1) %out, i32 %tid114 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid115 %gep.in1 = getelementptr inbounds i16, ptr addrspace(1) %in1, i32 %tid116 %a = load i16, ptr addrspace(1) %gep.in0117 %b = load i16, ptr addrspace(1) %gep.in1118 %add = add i16 %a, %b119 %ext = sext i16 %add to i32120 store i32 %ext, ptr addrspace(1) %out121 ret void122}123 124; FIXME: Need to handle non-uniform case for function below (load without gep).125; GCN-LABEL: {{^}}v_test_add_i16_sext_to_i64:126; VI: flat_load_ushort [[A:v[0-9]+]]127; VI: flat_load_ushort [[B:v[0-9]+]]128; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[A]], [[B]]129; VI-NEXT: v_bfe_i32 v[[LO:[0-9]+]], [[ADD]], 0, 16130; VI-NEXT: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]]131; VI-NEXT: buffer_store_dwordx2 v[[[LO]]:[[HI]]]132define amdgpu_kernel void @v_test_add_i16_sext_to_i64(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {133 %tid = call i32 @llvm.amdgcn.workitem.id.x()134 %gep.out = getelementptr inbounds i64, ptr addrspace(1) %out, i32 %tid135 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid136 %gep.in1 = getelementptr inbounds i16, ptr addrspace(1) %in1, i32 %tid137 %a = load i16, ptr addrspace(1) %gep.in0138 %b = load i16, ptr addrspace(1) %gep.in1139 %add = add i16 %a, %b140 %ext = sext i16 %add to i64141 store i64 %ext, ptr addrspace(1) %out142 ret void143}144 145declare i32 @llvm.amdgcn.workitem.id.x() #0146 147attributes #0 = { nounwind readnone }148attributes #1 = { nounwind }149