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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=VI %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s7 8; FIXME: Need to handle non-uniform case for function below (load without gep).9; FIXME: VI or should be unnecessary10define amdgpu_kernel void @v_test_add_v2i16(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {11; VI-LABEL: v_test_add_v2i16:12; VI: ; %bb.0:13; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2414; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x3415; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v016; VI-NEXT: s_waitcnt lgkmcnt(0)17; VI-NEXT: v_mov_b32_e32 v1, s318; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v219; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc20; VI-NEXT: v_mov_b32_e32 v3, s521; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v222; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc23; VI-NEXT: flat_load_dword v4, v[0:1] glc24; VI-NEXT: s_waitcnt vmcnt(0)25; VI-NEXT: flat_load_dword v2, v[2:3] glc26; VI-NEXT: s_waitcnt vmcnt(0)27; VI-NEXT: v_mov_b32_e32 v0, s028; VI-NEXT: v_mov_b32_e32 v1, s129; VI-NEXT: v_add_u16_e32 v3, v4, v230; VI-NEXT: v_add_u16_sdwa v2, v4, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_131; VI-NEXT: v_or_b32_e32 v2, v3, v232; VI-NEXT: flat_store_dword v[0:1], v233; VI-NEXT: s_endpgm34;35; GFX9-LABEL: v_test_add_v2i16:36; GFX9: ; %bb.0:37; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2438; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3439; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v040; GFX9-NEXT: s_waitcnt lgkmcnt(0)41; GFX9-NEXT: global_load_dword v1, v0, s[2:3] glc42; GFX9-NEXT: s_waitcnt vmcnt(0)43; GFX9-NEXT: global_load_dword v2, v0, s[6:7] glc44; GFX9-NEXT: s_waitcnt vmcnt(0)45; GFX9-NEXT: v_mov_b32_e32 v0, 046; GFX9-NEXT: v_pk_add_u16 v1, v1, v247; GFX9-NEXT: global_store_dword v0, v1, s[0:1]48; GFX9-NEXT: s_endpgm49;50; GFX10-LABEL: v_test_add_v2i16:51; GFX10: ; %bb.0:52; GFX10-NEXT: s_clause 0x153; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2454; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3455; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v056; GFX10-NEXT: s_waitcnt lgkmcnt(0)57; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc58; GFX10-NEXT: s_waitcnt vmcnt(0)59; GFX10-NEXT: global_load_dword v2, v0, s[6:7] glc dlc60; GFX10-NEXT: s_waitcnt vmcnt(0)61; GFX10-NEXT: v_mov_b32_e32 v0, 062; GFX10-NEXT: v_pk_add_u16 v1, v1, v263; GFX10-NEXT: global_store_dword v0, v1, s[0:1]64; GFX10-NEXT: s_endpgm65;66; GFX11-LABEL: v_test_add_v2i16:67; GFX11: ; %bb.0:68; GFX11-NEXT: s_clause 0x169; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2470; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x3471; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v072; GFX11-NEXT: v_mov_b32_e32 v2, 073; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)74; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v075; GFX11-NEXT: s_waitcnt lgkmcnt(0)76; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc77; GFX11-NEXT: s_waitcnt vmcnt(0)78; GFX11-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc79; GFX11-NEXT: s_waitcnt vmcnt(0)80; GFX11-NEXT: v_pk_add_u16 v0, v1, v081; GFX11-NEXT: global_store_b32 v2, v0, s[0:1]82; GFX11-NEXT: s_endpgm83 %tid = call i32 @llvm.amdgcn.workitem.id.x()84 %gep.out = getelementptr inbounds <2 x i16>, ptr addrspace(1) %out, i32 %tid85 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid86 %gep.in1 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in1, i32 %tid87 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in088 %b = load volatile <2 x i16>, ptr addrspace(1) %gep.in189 %add = add <2 x i16> %a, %b90 store <2 x i16> %add, ptr addrspace(1) %out91 ret void92}93 94define amdgpu_kernel void @s_test_add_v2i16(ptr addrspace(1) %out, ptr addrspace(4) %in0, ptr addrspace(4) %in1) #1 {95; VI-LABEL: s_test_add_v2i16:96; VI: ; %bb.0:97; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2498; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x3499; VI-NEXT: s_waitcnt lgkmcnt(0)100; VI-NEXT: s_load_dword s2, s[2:3], 0x0101; VI-NEXT: s_load_dword s3, s[4:5], 0x0102; VI-NEXT: v_mov_b32_e32 v0, s0103; VI-NEXT: v_mov_b32_e32 v1, s1104; VI-NEXT: s_waitcnt lgkmcnt(0)105; VI-NEXT: s_add_i32 s0, s2, s3106; VI-NEXT: s_lshr_b32 s1, s3, 16107; VI-NEXT: s_lshr_b32 s2, s2, 16108; VI-NEXT: s_add_i32 s2, s2, s1109; VI-NEXT: s_and_b32 s0, s0, 0xffff110; VI-NEXT: s_lshl_b32 s1, s2, 16111; VI-NEXT: s_or_b32 s0, s0, s1112; VI-NEXT: v_mov_b32_e32 v2, s0113; VI-NEXT: flat_store_dword v[0:1], v2114; VI-NEXT: s_endpgm115;116; GFX9-LABEL: s_test_add_v2i16:117; GFX9: ; %bb.0:118; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34119; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24120; GFX9-NEXT: v_mov_b32_e32 v0, 0121; GFX9-NEXT: s_waitcnt lgkmcnt(0)122; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0123; GFX9-NEXT: s_load_dword s5, s[2:3], 0x0124; GFX9-NEXT: s_waitcnt lgkmcnt(0)125; GFX9-NEXT: v_mov_b32_e32 v1, s4126; GFX9-NEXT: v_pk_add_u16 v1, s5, v1127; GFX9-NEXT: global_store_dword v0, v1, s[0:1]128; GFX9-NEXT: s_endpgm129;130; GFX10-LABEL: s_test_add_v2i16:131; GFX10: ; %bb.0:132; GFX10-NEXT: s_clause 0x1133; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24134; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34135; GFX10-NEXT: v_mov_b32_e32 v0, 0136; GFX10-NEXT: s_waitcnt lgkmcnt(0)137; GFX10-NEXT: s_load_dword s4, s[2:3], 0x0138; GFX10-NEXT: s_load_dword s5, s[6:7], 0x0139; GFX10-NEXT: s_waitcnt lgkmcnt(0)140; GFX10-NEXT: v_pk_add_u16 v1, s4, s5141; GFX10-NEXT: global_store_dword v0, v1, s[0:1]142; GFX10-NEXT: s_endpgm143;144; GFX11-LABEL: s_test_add_v2i16:145; GFX11: ; %bb.0:146; GFX11-NEXT: s_clause 0x1147; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24148; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34149; GFX11-NEXT: v_mov_b32_e32 v0, 0150; GFX11-NEXT: s_waitcnt lgkmcnt(0)151; GFX11-NEXT: s_load_b32 s2, s[2:3], 0x0152; GFX11-NEXT: s_load_b32 s3, s[4:5], 0x0153; GFX11-NEXT: s_waitcnt lgkmcnt(0)154; GFX11-NEXT: v_pk_add_u16 v1, s2, s3155; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]156; GFX11-NEXT: s_endpgm157 %a = load <2 x i16>, ptr addrspace(4) %in0158 %b = load <2 x i16>, ptr addrspace(4) %in1159 %add = add <2 x i16> %a, %b160 store <2 x i16> %add, ptr addrspace(1) %out161 ret void162}163 164define amdgpu_kernel void @s_test_add_self_v2i16(ptr addrspace(1) %out, ptr addrspace(4) %in0) #1 {165; VI-LABEL: s_test_add_self_v2i16:166; VI: ; %bb.0:167; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24168; VI-NEXT: s_waitcnt lgkmcnt(0)169; VI-NEXT: s_load_dword s2, s[2:3], 0x0170; VI-NEXT: v_mov_b32_e32 v1, s1171; VI-NEXT: v_mov_b32_e32 v0, s0172; VI-NEXT: s_waitcnt lgkmcnt(0)173; VI-NEXT: s_lshr_b32 s1, s2, 16174; VI-NEXT: s_add_i32 s0, s2, s2175; VI-NEXT: s_add_i32 s1, s1, s1176; VI-NEXT: s_and_b32 s0, s0, 0xffff177; VI-NEXT: s_lshl_b32 s1, s1, 16178; VI-NEXT: s_or_b32 s0, s0, s1179; VI-NEXT: v_mov_b32_e32 v2, s0180; VI-NEXT: flat_store_dword v[0:1], v2181; VI-NEXT: s_endpgm182;183; GFX9-LABEL: s_test_add_self_v2i16:184; GFX9: ; %bb.0:185; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24186; GFX9-NEXT: v_mov_b32_e32 v0, 0187; GFX9-NEXT: s_waitcnt lgkmcnt(0)188; GFX9-NEXT: s_load_dword s2, s[2:3], 0x0189; GFX9-NEXT: s_waitcnt lgkmcnt(0)190; GFX9-NEXT: v_pk_add_u16 v1, s2, s2191; GFX9-NEXT: global_store_dword v0, v1, s[0:1]192; GFX9-NEXT: s_endpgm193;194; GFX10-LABEL: s_test_add_self_v2i16:195; GFX10: ; %bb.0:196; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24197; GFX10-NEXT: v_mov_b32_e32 v0, 0198; GFX10-NEXT: s_waitcnt lgkmcnt(0)199; GFX10-NEXT: s_load_dword s2, s[2:3], 0x0200; GFX10-NEXT: s_waitcnt lgkmcnt(0)201; GFX10-NEXT: v_pk_add_u16 v1, s2, s2202; GFX10-NEXT: global_store_dword v0, v1, s[0:1]203; GFX10-NEXT: s_endpgm204;205; GFX11-LABEL: s_test_add_self_v2i16:206; GFX11: ; %bb.0:207; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24208; GFX11-NEXT: v_mov_b32_e32 v0, 0209; GFX11-NEXT: s_waitcnt lgkmcnt(0)210; GFX11-NEXT: s_load_b32 s2, s[2:3], 0x0211; GFX11-NEXT: s_waitcnt lgkmcnt(0)212; GFX11-NEXT: v_pk_add_u16 v1, s2, s2213; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]214; GFX11-NEXT: s_endpgm215 %a = load <2 x i16>, ptr addrspace(4) %in0216 %add = add <2 x i16> %a, %a217 store <2 x i16> %add, ptr addrspace(1) %out218 ret void219}220 221; FIXME: VI should not scalarize arg access.222define amdgpu_kernel void @s_test_add_v2i16_kernarg(ptr addrspace(1) %out, <2 x i16> %a, <2 x i16> %b) #1 {223; VI-LABEL: s_test_add_v2i16_kernarg:224; VI: ; %bb.0:225; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24226; VI-NEXT: s_waitcnt lgkmcnt(0)227; VI-NEXT: s_lshr_b32 s4, s3, 16228; VI-NEXT: s_lshr_b32 s5, s2, 16229; VI-NEXT: s_add_i32 s2, s2, s3230; VI-NEXT: s_add_i32 s5, s5, s4231; VI-NEXT: s_and_b32 s2, s2, 0xffff232; VI-NEXT: s_lshl_b32 s3, s5, 16233; VI-NEXT: s_or_b32 s2, s2, s3234; VI-NEXT: v_mov_b32_e32 v0, s0235; VI-NEXT: v_mov_b32_e32 v1, s1236; VI-NEXT: v_mov_b32_e32 v2, s2237; VI-NEXT: flat_store_dword v[0:1], v2238; VI-NEXT: s_endpgm239;240; GFX9-LABEL: s_test_add_v2i16_kernarg:241; GFX9: ; %bb.0:242; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24243; GFX9-NEXT: v_mov_b32_e32 v0, 0244; GFX9-NEXT: s_waitcnt lgkmcnt(0)245; GFX9-NEXT: v_mov_b32_e32 v1, s3246; GFX9-NEXT: v_pk_add_u16 v1, s2, v1247; GFX9-NEXT: global_store_dword v0, v1, s[0:1]248; GFX9-NEXT: s_endpgm249;250; GFX10-LABEL: s_test_add_v2i16_kernarg:251; GFX10: ; %bb.0:252; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24253; GFX10-NEXT: v_mov_b32_e32 v0, 0254; GFX10-NEXT: s_waitcnt lgkmcnt(0)255; GFX10-NEXT: v_pk_add_u16 v1, s2, s3256; GFX10-NEXT: global_store_dword v0, v1, s[0:1]257; GFX10-NEXT: s_endpgm258;259; GFX11-LABEL: s_test_add_v2i16_kernarg:260; GFX11: ; %bb.0:261; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24262; GFX11-NEXT: v_mov_b32_e32 v0, 0263; GFX11-NEXT: s_waitcnt lgkmcnt(0)264; GFX11-NEXT: v_pk_add_u16 v1, s2, s3265; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]266; GFX11-NEXT: s_endpgm267 %add = add <2 x i16> %a, %b268 store <2 x i16> %add, ptr addrspace(1) %out269 ret void270}271 272; FIXME: Eliminate or with sdwa273define amdgpu_kernel void @v_test_add_v2i16_constant(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {274; VI-LABEL: v_test_add_v2i16_constant:275; VI: ; %bb.0:276; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24277; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0278; VI-NEXT: v_mov_b32_e32 v3, 0x1c8279; VI-NEXT: s_waitcnt lgkmcnt(0)280; VI-NEXT: v_mov_b32_e32 v1, s3281; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0282; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc283; VI-NEXT: flat_load_dword v2, v[0:1] glc284; VI-NEXT: s_waitcnt vmcnt(0)285; VI-NEXT: v_mov_b32_e32 v0, s0286; VI-NEXT: v_mov_b32_e32 v1, s1287; VI-NEXT: v_add_u16_e32 v4, 0x7b, v2288; VI-NEXT: v_add_u16_sdwa v2, v2, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD289; VI-NEXT: v_or_b32_e32 v2, v4, v2290; VI-NEXT: flat_store_dword v[0:1], v2291; VI-NEXT: s_endpgm292;293; GFX9-LABEL: v_test_add_v2i16_constant:294; GFX9: ; %bb.0:295; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24296; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0297; GFX9-NEXT: v_mov_b32_e32 v1, 0298; GFX9-NEXT: s_waitcnt lgkmcnt(0)299; GFX9-NEXT: global_load_dword v0, v0, s[2:3] glc300; GFX9-NEXT: s_waitcnt vmcnt(0)301; GFX9-NEXT: s_mov_b32 s2, 0x1c8007b302; GFX9-NEXT: v_pk_add_u16 v0, v0, s2303; GFX9-NEXT: global_store_dword v1, v0, s[0:1]304; GFX9-NEXT: s_endpgm305;306; GFX10-LABEL: v_test_add_v2i16_constant:307; GFX10: ; %bb.0:308; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24309; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0310; GFX10-NEXT: v_mov_b32_e32 v1, 0311; GFX10-NEXT: s_waitcnt lgkmcnt(0)312; GFX10-NEXT: global_load_dword v0, v0, s[2:3] glc dlc313; GFX10-NEXT: s_waitcnt vmcnt(0)314; GFX10-NEXT: v_pk_add_u16 v0, 0x1c8007b, v0315; GFX10-NEXT: global_store_dword v1, v0, s[0:1]316; GFX10-NEXT: s_endpgm317;318; GFX11-LABEL: v_test_add_v2i16_constant:319; GFX11: ; %bb.0:320; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24321; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0322; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)323; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0324; GFX11-NEXT: s_waitcnt lgkmcnt(0)325; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] glc dlc326; GFX11-NEXT: s_waitcnt vmcnt(0)327; GFX11-NEXT: v_pk_add_u16 v0, 0x1c8007b, v0328; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]329; GFX11-NEXT: s_endpgm330 %tid = call i32 @llvm.amdgcn.workitem.id.x()331 %gep.out = getelementptr inbounds <2 x i16>, ptr addrspace(1) %out, i32 %tid332 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid333 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0334 %add = add <2 x i16> %a, <i16 123, i16 456>335 store <2 x i16> %add, ptr addrspace(1) %out336 ret void337}338 339; FIXME: Need to handle non-uniform case for function below (load without gep).340define amdgpu_kernel void @v_test_add_v2i16_neg_constant(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {341; VI-LABEL: v_test_add_v2i16_neg_constant:342; VI: ; %bb.0:343; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24344; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0345; VI-NEXT: v_mov_b32_e32 v3, 0xfffffc21346; VI-NEXT: s_waitcnt lgkmcnt(0)347; VI-NEXT: v_mov_b32_e32 v1, s3348; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0349; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc350; VI-NEXT: flat_load_dword v2, v[0:1] glc351; VI-NEXT: s_waitcnt vmcnt(0)352; VI-NEXT: v_mov_b32_e32 v0, s0353; VI-NEXT: v_mov_b32_e32 v1, s1354; VI-NEXT: v_add_u16_e32 v4, 0xfcb3, v2355; VI-NEXT: v_add_u16_sdwa v2, v2, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD356; VI-NEXT: v_or_b32_e32 v2, v4, v2357; VI-NEXT: flat_store_dword v[0:1], v2358; VI-NEXT: s_endpgm359;360; GFX9-LABEL: v_test_add_v2i16_neg_constant:361; GFX9: ; %bb.0:362; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24363; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0364; GFX9-NEXT: v_mov_b32_e32 v1, 0365; GFX9-NEXT: s_waitcnt lgkmcnt(0)366; GFX9-NEXT: global_load_dword v0, v0, s[2:3] glc367; GFX9-NEXT: s_waitcnt vmcnt(0)368; GFX9-NEXT: s_mov_b32 s2, 0xfc21fcb3369; GFX9-NEXT: v_pk_add_u16 v0, v0, s2370; GFX9-NEXT: global_store_dword v1, v0, s[0:1]371; GFX9-NEXT: s_endpgm372;373; GFX10-LABEL: v_test_add_v2i16_neg_constant:374; GFX10: ; %bb.0:375; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24376; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0377; GFX10-NEXT: v_mov_b32_e32 v1, 0378; GFX10-NEXT: s_waitcnt lgkmcnt(0)379; GFX10-NEXT: global_load_dword v0, v0, s[2:3] glc dlc380; GFX10-NEXT: s_waitcnt vmcnt(0)381; GFX10-NEXT: v_pk_add_u16 v0, 0xfc21fcb3, v0382; GFX10-NEXT: global_store_dword v1, v0, s[0:1]383; GFX10-NEXT: s_endpgm384;385; GFX11-LABEL: v_test_add_v2i16_neg_constant:386; GFX11: ; %bb.0:387; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24388; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0389; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)390; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0391; GFX11-NEXT: s_waitcnt lgkmcnt(0)392; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] glc dlc393; GFX11-NEXT: s_waitcnt vmcnt(0)394; GFX11-NEXT: v_pk_add_u16 v0, 0xfc21fcb3, v0395; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]396; GFX11-NEXT: s_endpgm397 %tid = call i32 @llvm.amdgcn.workitem.id.x()398 %gep.out = getelementptr inbounds <2 x i16>, ptr addrspace(1) %out, i32 %tid399 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid400 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0401 %add = add <2 x i16> %a, <i16 -845, i16 -991>402 store <2 x i16> %add, ptr addrspace(1) %out403 ret void404}405 406define amdgpu_kernel void @v_test_add_v2i16_inline_neg1(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {407; VI-LABEL: v_test_add_v2i16_inline_neg1:408; VI: ; %bb.0:409; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24410; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0411; VI-NEXT: v_mov_b32_e32 v3, -1412; VI-NEXT: s_waitcnt lgkmcnt(0)413; VI-NEXT: v_mov_b32_e32 v1, s3414; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0415; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc416; VI-NEXT: flat_load_dword v2, v[0:1] glc417; VI-NEXT: s_waitcnt vmcnt(0)418; VI-NEXT: v_mov_b32_e32 v0, s0419; VI-NEXT: v_mov_b32_e32 v1, s1420; VI-NEXT: v_add_u16_e32 v4, -1, v2421; VI-NEXT: v_add_u16_sdwa v2, v2, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD422; VI-NEXT: v_or_b32_e32 v2, v4, v2423; VI-NEXT: flat_store_dword v[0:1], v2424; VI-NEXT: s_endpgm425;426; GFX9-LABEL: v_test_add_v2i16_inline_neg1:427; GFX9: ; %bb.0:428; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24429; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0430; GFX9-NEXT: v_mov_b32_e32 v1, 0431; GFX9-NEXT: s_waitcnt lgkmcnt(0)432; GFX9-NEXT: global_load_dword v0, v0, s[2:3] glc433; GFX9-NEXT: s_waitcnt vmcnt(0)434; GFX9-NEXT: v_pk_add_u16 v0, v0, -1435; GFX9-NEXT: global_store_dword v1, v0, s[0:1]436; GFX9-NEXT: s_endpgm437;438; GFX10-LABEL: v_test_add_v2i16_inline_neg1:439; GFX10: ; %bb.0:440; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24441; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0442; GFX10-NEXT: v_mov_b32_e32 v1, 0443; GFX10-NEXT: s_waitcnt lgkmcnt(0)444; GFX10-NEXT: global_load_dword v0, v0, s[2:3] glc dlc445; GFX10-NEXT: s_waitcnt vmcnt(0)446; GFX10-NEXT: v_pk_add_u16 v0, v0, -1447; GFX10-NEXT: global_store_dword v1, v0, s[0:1]448; GFX10-NEXT: s_endpgm449;450; GFX11-LABEL: v_test_add_v2i16_inline_neg1:451; GFX11: ; %bb.0:452; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24453; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0454; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)455; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0456; GFX11-NEXT: s_waitcnt lgkmcnt(0)457; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] glc dlc458; GFX11-NEXT: s_waitcnt vmcnt(0)459; GFX11-NEXT: v_pk_add_u16 v0, v0, -1460; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]461; GFX11-NEXT: s_endpgm462 %tid = call i32 @llvm.amdgcn.workitem.id.x()463 %gep.out = getelementptr inbounds <2 x i16>, ptr addrspace(1) %out, i32 %tid464 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid465 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0466 %add = add <2 x i16> %a, <i16 -1, i16 -1>467 store <2 x i16> %add, ptr addrspace(1) %out468 ret void469}470 471define amdgpu_kernel void @v_test_add_v2i16_inline_lo_zero_hi(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {472; VI-LABEL: v_test_add_v2i16_inline_lo_zero_hi:473; VI: ; %bb.0:474; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24475; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0476; VI-NEXT: s_waitcnt lgkmcnt(0)477; VI-NEXT: v_mov_b32_e32 v1, s3478; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0479; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc480; VI-NEXT: flat_load_dword v2, v[0:1] glc481; VI-NEXT: s_waitcnt vmcnt(0)482; VI-NEXT: v_mov_b32_e32 v0, s0483; VI-NEXT: v_mov_b32_e32 v1, s1484; VI-NEXT: v_and_b32_e32 v3, 0xffff0000, v2485; VI-NEXT: v_add_u16_e32 v2, 32, v2486; VI-NEXT: v_or_b32_e32 v2, v2, v3487; VI-NEXT: flat_store_dword v[0:1], v2488; VI-NEXT: s_endpgm489;490; GFX9-LABEL: v_test_add_v2i16_inline_lo_zero_hi:491; GFX9: ; %bb.0:492; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24493; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0494; GFX9-NEXT: v_mov_b32_e32 v1, 0495; GFX9-NEXT: s_waitcnt lgkmcnt(0)496; GFX9-NEXT: global_load_dword v0, v0, s[2:3] glc497; GFX9-NEXT: s_waitcnt vmcnt(0)498; GFX9-NEXT: v_pk_add_u16 v0, v0, 32499; GFX9-NEXT: global_store_dword v1, v0, s[0:1]500; GFX9-NEXT: s_endpgm501;502; GFX10-LABEL: v_test_add_v2i16_inline_lo_zero_hi:503; GFX10: ; %bb.0:504; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24505; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0506; GFX10-NEXT: v_mov_b32_e32 v1, 0507; GFX10-NEXT: s_waitcnt lgkmcnt(0)508; GFX10-NEXT: global_load_dword v0, v0, s[2:3] glc dlc509; GFX10-NEXT: s_waitcnt vmcnt(0)510; GFX10-NEXT: v_pk_add_u16 v0, v0, 32511; GFX10-NEXT: global_store_dword v1, v0, s[0:1]512; GFX10-NEXT: s_endpgm513;514; GFX11-LABEL: v_test_add_v2i16_inline_lo_zero_hi:515; GFX11: ; %bb.0:516; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24517; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0518; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)519; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0520; GFX11-NEXT: s_waitcnt lgkmcnt(0)521; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] glc dlc522; GFX11-NEXT: s_waitcnt vmcnt(0)523; GFX11-NEXT: v_pk_add_u16 v0, v0, 32524; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]525; GFX11-NEXT: s_endpgm526 %tid = call i32 @llvm.amdgcn.workitem.id.x()527 %gep.out = getelementptr inbounds <2 x i16>, ptr addrspace(1) %out, i32 %tid528 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid529 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0530 %add = add <2 x i16> %a, <i16 32, i16 0>531 store <2 x i16> %add, ptr addrspace(1) %out532 ret void533}534 535; The high element gives fp536define amdgpu_kernel void @v_test_add_v2i16_inline_fp_split(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {537; VI-LABEL: v_test_add_v2i16_inline_fp_split:538; VI: ; %bb.0:539; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24540; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0541; VI-NEXT: v_mov_b32_e32 v3, 0x3f80542; VI-NEXT: s_waitcnt lgkmcnt(0)543; VI-NEXT: v_mov_b32_e32 v1, s3544; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0545; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc546; VI-NEXT: flat_load_dword v2, v[0:1] glc547; VI-NEXT: s_waitcnt vmcnt(0)548; VI-NEXT: v_mov_b32_e32 v0, s0549; VI-NEXT: v_mov_b32_e32 v1, s1550; VI-NEXT: v_add_u16_sdwa v3, v2, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD551; VI-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD552; VI-NEXT: flat_store_dword v[0:1], v2553; VI-NEXT: s_endpgm554;555; GFX9-LABEL: v_test_add_v2i16_inline_fp_split:556; GFX9: ; %bb.0:557; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24558; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0559; GFX9-NEXT: v_mov_b32_e32 v1, 0560; GFX9-NEXT: s_waitcnt lgkmcnt(0)561; GFX9-NEXT: global_load_dword v0, v0, s[2:3] glc562; GFX9-NEXT: s_waitcnt vmcnt(0)563; GFX9-NEXT: v_pk_add_u16 v0, v0, 1.0564; GFX9-NEXT: global_store_dword v1, v0, s[0:1]565; GFX9-NEXT: s_endpgm566;567; GFX10-LABEL: v_test_add_v2i16_inline_fp_split:568; GFX10: ; %bb.0:569; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24570; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0571; GFX10-NEXT: v_mov_b32_e32 v1, 0572; GFX10-NEXT: s_waitcnt lgkmcnt(0)573; GFX10-NEXT: global_load_dword v0, v0, s[2:3] glc dlc574; GFX10-NEXT: s_waitcnt vmcnt(0)575; GFX10-NEXT: v_pk_add_u16 v0, v0, 1.0576; GFX10-NEXT: global_store_dword v1, v0, s[0:1]577; GFX10-NEXT: s_endpgm578;579; GFX11-LABEL: v_test_add_v2i16_inline_fp_split:580; GFX11: ; %bb.0:581; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24582; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0583; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)584; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0585; GFX11-NEXT: s_waitcnt lgkmcnt(0)586; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] glc dlc587; GFX11-NEXT: s_waitcnt vmcnt(0)588; GFX11-NEXT: v_pk_add_u16 v0, v0, 1.0589; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]590; GFX11-NEXT: s_endpgm591 %tid = call i32 @llvm.amdgcn.workitem.id.x()592 %gep.out = getelementptr inbounds <2 x i16>, ptr addrspace(1) %out, i32 %tid593 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid594 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0595 %add = add <2 x i16> %a, <i16 0, i16 16256>596 store <2 x i16> %add, ptr addrspace(1) %out597 ret void598}599 600; FIXME: Need to handle non-uniform case for function below (load without gep).601define amdgpu_kernel void @v_test_add_v2i16_zext_to_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {602; VI-LABEL: v_test_add_v2i16_zext_to_v2i32:603; VI: ; %bb.0:604; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24605; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34606; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0607; VI-NEXT: s_waitcnt lgkmcnt(0)608; VI-NEXT: v_mov_b32_e32 v1, s3609; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v2610; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc611; VI-NEXT: v_mov_b32_e32 v3, s5612; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v2613; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc614; VI-NEXT: flat_load_dword v4, v[0:1] glc615; VI-NEXT: s_waitcnt vmcnt(0)616; VI-NEXT: flat_load_dword v3, v[2:3] glc617; VI-NEXT: s_waitcnt vmcnt(0)618; VI-NEXT: v_mov_b32_e32 v0, s0619; VI-NEXT: v_mov_b32_e32 v1, s1620; VI-NEXT: v_add_u16_e32 v2, v4, v3621; VI-NEXT: v_add_u16_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1622; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]623; VI-NEXT: s_endpgm624;625; GFX9-LABEL: v_test_add_v2i16_zext_to_v2i32:626; GFX9: ; %bb.0:627; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24628; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34629; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0630; GFX9-NEXT: v_mov_b32_e32 v3, 0631; GFX9-NEXT: s_waitcnt lgkmcnt(0)632; GFX9-NEXT: global_load_dword v1, v0, s[2:3] glc633; GFX9-NEXT: s_waitcnt vmcnt(0)634; GFX9-NEXT: global_load_dword v2, v0, s[6:7] glc635; GFX9-NEXT: s_waitcnt vmcnt(0)636; GFX9-NEXT: v_pk_add_u16 v0, v1, v2637; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v0638; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0639; GFX9-NEXT: global_store_dwordx2 v3, v[0:1], s[0:1]640; GFX9-NEXT: s_endpgm641;642; GFX10-LABEL: v_test_add_v2i16_zext_to_v2i32:643; GFX10: ; %bb.0:644; GFX10-NEXT: s_clause 0x1645; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24646; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34647; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0648; GFX10-NEXT: s_waitcnt lgkmcnt(0)649; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc650; GFX10-NEXT: s_waitcnt vmcnt(0)651; GFX10-NEXT: global_load_dword v2, v0, s[6:7] glc dlc652; GFX10-NEXT: s_waitcnt vmcnt(0)653; GFX10-NEXT: v_pk_add_u16 v0, v1, v2654; GFX10-NEXT: v_mov_b32_e32 v2, 0655; GFX10-NEXT: v_lshrrev_b32_e32 v1, 16, v0656; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0657; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]658; GFX10-NEXT: s_endpgm659;660; GFX11-TRUE16-LABEL: v_test_add_v2i16_zext_to_v2i32:661; GFX11-TRUE16: ; %bb.0:662; GFX11-TRUE16-NEXT: s_clause 0x1663; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24664; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34665; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v0666; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)667; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0668; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)669; GFX11-TRUE16-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc670; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)671; GFX11-TRUE16-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc672; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)673; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v1, v0674; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0675; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)676; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v2677; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.h678; GFX11-TRUE16-NEXT: global_store_b64 v3, v[0:1], s[0:1]679; GFX11-TRUE16-NEXT: s_endpgm680;681; GFX11-FAKE16-LABEL: v_test_add_v2i16_zext_to_v2i32:682; GFX11-FAKE16: ; %bb.0:683; GFX11-FAKE16-NEXT: s_clause 0x1684; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24685; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34686; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0687; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, 0688; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)689; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0690; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)691; GFX11-FAKE16-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc692; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)693; GFX11-FAKE16-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc694; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)695; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, v1, v0696; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)697; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0698; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0699; GFX11-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]700; GFX11-FAKE16-NEXT: s_endpgm701 %tid = call i32 @llvm.amdgcn.workitem.id.x()702 %gep.out = getelementptr inbounds <2 x i32>, ptr addrspace(1) %out, i32 %tid703 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid704 %gep.in1 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in1, i32 %tid705 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0706 %b = load volatile <2 x i16>, ptr addrspace(1) %gep.in1707 %add = add <2 x i16> %a, %b708 %ext = zext <2 x i16> %add to <2 x i32>709 store <2 x i32> %ext, ptr addrspace(1) %out710 ret void711}712 713; FIXME: Need to handle non-uniform case for function below (load without gep).714define amdgpu_kernel void @v_test_add_v2i16_zext_to_v2i64(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {715; VI-LABEL: v_test_add_v2i16_zext_to_v2i64:716; VI: ; %bb.0:717; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24718; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34719; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0720; VI-NEXT: s_waitcnt lgkmcnt(0)721; VI-NEXT: v_mov_b32_e32 v1, s3722; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v2723; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc724; VI-NEXT: v_mov_b32_e32 v3, s5725; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v2726; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc727; VI-NEXT: flat_load_dword v6, v[0:1] glc728; VI-NEXT: s_waitcnt vmcnt(0)729; VI-NEXT: flat_load_dword v2, v[2:3] glc730; VI-NEXT: s_waitcnt vmcnt(0)731; VI-NEXT: v_mov_b32_e32 v1, 0732; VI-NEXT: v_mov_b32_e32 v4, s0733; VI-NEXT: v_mov_b32_e32 v5, s1734; VI-NEXT: v_mov_b32_e32 v3, v1735; VI-NEXT: v_add_u16_e32 v0, v6, v2736; VI-NEXT: v_add_u16_sdwa v2, v6, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1737; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]738; VI-NEXT: s_endpgm739;740; GFX9-LABEL: v_test_add_v2i16_zext_to_v2i64:741; GFX9: ; %bb.0:742; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24743; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34744; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0745; GFX9-NEXT: v_mov_b32_e32 v1, 0746; GFX9-NEXT: s_waitcnt lgkmcnt(0)747; GFX9-NEXT: global_load_dword v2, v0, s[2:3] glc748; GFX9-NEXT: s_waitcnt vmcnt(0)749; GFX9-NEXT: global_load_dword v3, v0, s[6:7] glc750; GFX9-NEXT: s_waitcnt vmcnt(0)751; GFX9-NEXT: v_pk_add_u16 v0, v2, v3752; GFX9-NEXT: v_alignbit_b32 v2, 0, v0, 16753; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0754; GFX9-NEXT: v_mov_b32_e32 v3, v1755; GFX9-NEXT: global_store_dwordx4 v1, v[0:3], s[0:1]756; GFX9-NEXT: s_endpgm757;758; GFX10-LABEL: v_test_add_v2i16_zext_to_v2i64:759; GFX10: ; %bb.0:760; GFX10-NEXT: s_clause 0x1761; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24762; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34763; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0764; GFX10-NEXT: s_waitcnt lgkmcnt(0)765; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc766; GFX10-NEXT: s_waitcnt vmcnt(0)767; GFX10-NEXT: global_load_dword v2, v0, s[6:7] glc dlc768; GFX10-NEXT: s_waitcnt vmcnt(0)769; GFX10-NEXT: v_pk_add_u16 v0, v1, v2770; GFX10-NEXT: v_mov_b32_e32 v1, 0771; GFX10-NEXT: v_alignbit_b32 v2, 0, v0, 16772; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0773; GFX10-NEXT: v_mov_b32_e32 v3, v1774; GFX10-NEXT: global_store_dwordx4 v1, v[0:3], s[0:1]775; GFX10-NEXT: s_endpgm776;777; GFX11-TRUE16-LABEL: v_test_add_v2i16_zext_to_v2i64:778; GFX11-TRUE16: ; %bb.0:779; GFX11-TRUE16-NEXT: s_clause 0x1780; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24781; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34782; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0783; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, 0784; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)785; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0786; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)787; GFX11-TRUE16-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc788; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)789; GFX11-TRUE16-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc790; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)791; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v1, v0792; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0793; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)794; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.h795; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.h796; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, v1797; GFX11-TRUE16-NEXT: global_store_b128 v1, v[0:3], s[0:1]798; GFX11-TRUE16-NEXT: s_endpgm799;800; GFX11-FAKE16-LABEL: v_test_add_v2i16_zext_to_v2i64:801; GFX11-FAKE16: ; %bb.0:802; GFX11-FAKE16-NEXT: s_clause 0x1803; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24804; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34805; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0806; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)807; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0808; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)809; GFX11-FAKE16-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc810; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)811; GFX11-FAKE16-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc812; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)813; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, v1, v0814; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, 0815; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)816; GFX11-FAKE16-NEXT: v_alignbit_b32 v2, 0, v0, 16817; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_and_b32 v0, 0xffff, v0818; GFX11-FAKE16-NEXT: global_store_b128 v1, v[0:3], s[0:1]819; GFX11-FAKE16-NEXT: s_endpgm820 %tid = call i32 @llvm.amdgcn.workitem.id.x()821 %gep.out = getelementptr inbounds <2 x i64>, ptr addrspace(1) %out, i32 %tid822 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid823 %gep.in1 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in1, i32 %tid824 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0825 %b = load volatile <2 x i16>, ptr addrspace(1) %gep.in1826 %add = add <2 x i16> %a, %b827 %ext = zext <2 x i16> %add to <2 x i64>828 store <2 x i64> %ext, ptr addrspace(1) %out829 ret void830}831 832; FIXME: Need to handle non-uniform case for function below (load without gep).833define amdgpu_kernel void @v_test_add_v2i16_sext_to_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {834; VI-LABEL: v_test_add_v2i16_sext_to_v2i32:835; VI: ; %bb.0:836; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24837; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34838; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0839; VI-NEXT: s_waitcnt lgkmcnt(0)840; VI-NEXT: v_mov_b32_e32 v1, s3841; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v2842; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc843; VI-NEXT: v_mov_b32_e32 v3, s5844; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v2845; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc846; VI-NEXT: flat_load_dword v4, v[0:1] glc847; VI-NEXT: s_waitcnt vmcnt(0)848; VI-NEXT: flat_load_dword v2, v[2:3] glc849; VI-NEXT: s_waitcnt vmcnt(0)850; VI-NEXT: v_mov_b32_e32 v0, s0851; VI-NEXT: v_mov_b32_e32 v1, s1852; VI-NEXT: v_add_u16_sdwa v3, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1853; VI-NEXT: v_add_u16_e32 v2, v4, v2854; VI-NEXT: v_bfe_i32 v2, v2, 0, 16855; VI-NEXT: v_bfe_i32 v3, v3, 0, 16856; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]857; VI-NEXT: s_endpgm858;859; GFX9-LABEL: v_test_add_v2i16_sext_to_v2i32:860; GFX9: ; %bb.0:861; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24862; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34863; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0864; GFX9-NEXT: v_mov_b32_e32 v3, 0865; GFX9-NEXT: s_waitcnt lgkmcnt(0)866; GFX9-NEXT: global_load_dword v1, v0, s[2:3] glc867; GFX9-NEXT: s_waitcnt vmcnt(0)868; GFX9-NEXT: global_load_dword v2, v0, s[6:7] glc869; GFX9-NEXT: s_waitcnt vmcnt(0)870; GFX9-NEXT: v_pk_add_u16 v0, v1, v2871; GFX9-NEXT: v_ashrrev_i32_e32 v1, 16, v0872; GFX9-NEXT: v_bfe_i32 v0, v0, 0, 16873; GFX9-NEXT: global_store_dwordx2 v3, v[0:1], s[0:1]874; GFX9-NEXT: s_endpgm875;876; GFX10-LABEL: v_test_add_v2i16_sext_to_v2i32:877; GFX10: ; %bb.0:878; GFX10-NEXT: s_clause 0x1879; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24880; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34881; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0882; GFX10-NEXT: s_waitcnt lgkmcnt(0)883; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc884; GFX10-NEXT: s_waitcnt vmcnt(0)885; GFX10-NEXT: global_load_dword v2, v0, s[6:7] glc dlc886; GFX10-NEXT: s_waitcnt vmcnt(0)887; GFX10-NEXT: v_pk_add_u16 v0, v1, v2888; GFX10-NEXT: v_mov_b32_e32 v2, 0889; GFX10-NEXT: v_ashrrev_i32_e32 v1, 16, v0890; GFX10-NEXT: v_bfe_i32 v0, v0, 0, 16891; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]892; GFX10-NEXT: s_endpgm893;894; GFX11-LABEL: v_test_add_v2i16_sext_to_v2i32:895; GFX11: ; %bb.0:896; GFX11-NEXT: s_clause 0x1897; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24898; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34899; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0900; GFX11-NEXT: v_mov_b32_e32 v2, 0901; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)902; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0903; GFX11-NEXT: s_waitcnt lgkmcnt(0)904; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc905; GFX11-NEXT: s_waitcnt vmcnt(0)906; GFX11-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc907; GFX11-NEXT: s_waitcnt vmcnt(0)908; GFX11-NEXT: v_pk_add_u16 v0, v1, v0909; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)910; GFX11-NEXT: v_ashrrev_i32_e32 v1, 16, v0911; GFX11-NEXT: v_bfe_i32 v0, v0, 0, 16912; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]913; GFX11-NEXT: s_endpgm914 %tid = call i32 @llvm.amdgcn.workitem.id.x()915 %gep.out = getelementptr inbounds <2 x i32>, ptr addrspace(1) %out, i32 %tid916 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid917 %gep.in1 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in1, i32 %tid918 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0919 %b = load volatile <2 x i16>, ptr addrspace(1) %gep.in1920 %add = add <2 x i16> %a, %b921 %ext = sext <2 x i16> %add to <2 x i32>922 store <2 x i32> %ext, ptr addrspace(1) %out923 ret void924}925 926; FIXME: Need to handle non-uniform case for function below (load without gep).927define amdgpu_kernel void @v_test_add_v2i16_sext_to_v2i64(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {928; VI-LABEL: v_test_add_v2i16_sext_to_v2i64:929; VI: ; %bb.0:930; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24931; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34932; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0933; VI-NEXT: s_waitcnt lgkmcnt(0)934; VI-NEXT: v_mov_b32_e32 v1, s3935; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v2936; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc937; VI-NEXT: v_mov_b32_e32 v3, s5938; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v2939; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc940; VI-NEXT: flat_load_dword v0, v[0:1]941; VI-NEXT: flat_load_dword v1, v[2:3]942; VI-NEXT: v_mov_b32_e32 v4, s0943; VI-NEXT: v_mov_b32_e32 v5, s1944; VI-NEXT: s_waitcnt vmcnt(0)945; VI-NEXT: v_add_u16_sdwa v2, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1946; VI-NEXT: v_add_u16_e32 v0, v0, v1947; VI-NEXT: v_bfe_i32 v0, v0, 0, 16948; VI-NEXT: v_bfe_i32 v2, v2, 0, 16949; VI-NEXT: v_ashrrev_i32_e32 v1, 31, v0950; VI-NEXT: v_ashrrev_i32_e32 v3, 31, v2951; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]952; VI-NEXT: s_endpgm953;954; GFX9-LABEL: v_test_add_v2i16_sext_to_v2i64:955; GFX9: ; %bb.0:956; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24957; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34958; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0959; GFX9-NEXT: v_mov_b32_e32 v4, 0960; GFX9-NEXT: s_waitcnt lgkmcnt(0)961; GFX9-NEXT: global_load_dword v1, v0, s[2:3]962; GFX9-NEXT: global_load_dword v2, v0, s[6:7]963; GFX9-NEXT: s_waitcnt vmcnt(0)964; GFX9-NEXT: v_pk_add_u16 v1, v1, v2965; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v1966; GFX9-NEXT: v_bfe_i32 v0, v1, 0, 16967; GFX9-NEXT: v_bfe_i32 v2, v2, 0, 16968; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0969; GFX9-NEXT: v_ashrrev_i32_e32 v3, 31, v2970; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]971; GFX9-NEXT: s_endpgm972;973; GFX10-LABEL: v_test_add_v2i16_sext_to_v2i64:974; GFX10: ; %bb.0:975; GFX10-NEXT: s_clause 0x1976; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24977; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34978; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0979; GFX10-NEXT: v_mov_b32_e32 v4, 0980; GFX10-NEXT: s_waitcnt lgkmcnt(0)981; GFX10-NEXT: s_clause 0x1982; GFX10-NEXT: global_load_dword v1, v0, s[2:3]983; GFX10-NEXT: global_load_dword v2, v0, s[6:7]984; GFX10-NEXT: s_waitcnt vmcnt(0)985; GFX10-NEXT: v_pk_add_u16 v0, v1, v2986; GFX10-NEXT: v_lshrrev_b32_e32 v1, 16, v0987; GFX10-NEXT: v_bfe_i32 v0, v0, 0, 16988; GFX10-NEXT: v_bfe_i32 v2, v1, 0, 16989; GFX10-NEXT: v_ashrrev_i32_e32 v1, 31, v0990; GFX10-NEXT: v_ashrrev_i32_e32 v3, 31, v2991; GFX10-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]992; GFX10-NEXT: s_endpgm993;994; GFX11-TRUE16-LABEL: v_test_add_v2i16_sext_to_v2i64:995; GFX11-TRUE16: ; %bb.0:996; GFX11-TRUE16-NEXT: s_clause 0x1997; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24998; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34999; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01000; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, 01001; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)1002; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01003; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1004; GFX11-TRUE16-NEXT: s_clause 0x11005; GFX11-TRUE16-NEXT: global_load_b32 v1, v0, s[2:3]1006; GFX11-TRUE16-NEXT: global_load_b32 v0, v0, s[4:5]1007; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1008; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v1, v01009; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 01010; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)1011; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.h1012; GFX11-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 161013; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1014; GFX11-TRUE16-NEXT: v_bfe_i32 v2, v1, 0, 161015; GFX11-TRUE16-NEXT: v_ashrrev_i32_e32 v1, 31, v01016; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)1017; GFX11-TRUE16-NEXT: v_ashrrev_i32_e32 v3, 31, v21018; GFX11-TRUE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]1019; GFX11-TRUE16-NEXT: s_endpgm1020;1021; GFX11-FAKE16-LABEL: v_test_add_v2i16_sext_to_v2i64:1022; GFX11-FAKE16: ; %bb.0:1023; GFX11-FAKE16-NEXT: s_clause 0x11024; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241025; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x341026; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01027; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, 01028; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)1029; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01030; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1031; GFX11-FAKE16-NEXT: s_clause 0x11032; GFX11-FAKE16-NEXT: global_load_b32 v1, v0, s[2:3]1033; GFX11-FAKE16-NEXT: global_load_b32 v0, v0, s[4:5]1034; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1035; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, v1, v01036; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1037; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v01038; GFX11-FAKE16-NEXT: v_bfe_i32 v0, v0, 0, 161039; GFX11-FAKE16-NEXT: v_bfe_i32 v2, v1, 0, 161040; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1041; GFX11-FAKE16-NEXT: v_ashrrev_i32_e32 v1, 31, v01042; GFX11-FAKE16-NEXT: v_ashrrev_i32_e32 v3, 31, v21043; GFX11-FAKE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]1044; GFX11-FAKE16-NEXT: s_endpgm1045 %tid = call i32 @llvm.amdgcn.workitem.id.x()1046 %gep.out = getelementptr inbounds <2 x i64>, ptr addrspace(1) %out, i32 %tid1047 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid1048 %gep.in1 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in1, i32 %tid1049 %a = load <2 x i16>, ptr addrspace(1) %gep.in01050 %b = load <2 x i16>, ptr addrspace(1) %gep.in11051 %add = add <2 x i16> %a, %b1052 %ext = sext <2 x i16> %add to <2 x i64>1053 store <2 x i64> %ext, ptr addrspace(1) %out1054 ret void1055}1056 1057define <2 x i16> @add_inline_imm_neg1_0(<2 x i16> %x) {1058; VI-LABEL: add_inline_imm_neg1_0:1059; VI: ; %bb.0:1060; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1061; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v01062; VI-NEXT: v_add_u16_e32 v0, -1, v01063; VI-NEXT: v_or_b32_e32 v0, v0, v11064; VI-NEXT: s_setpc_b64 s[30:31]1065;1066; GFX9-LABEL: add_inline_imm_neg1_0:1067; GFX9: ; %bb.0:1068; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1069; GFX9-NEXT: v_pk_sub_u16 v0, v0, 11070; GFX9-NEXT: s_setpc_b64 s[30:31]1071;1072; GFX10-LABEL: add_inline_imm_neg1_0:1073; GFX10: ; %bb.0:1074; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1075; GFX10-NEXT: v_pk_sub_u16 v0, v0, 11076; GFX10-NEXT: s_setpc_b64 s[30:31]1077;1078; GFX11-LABEL: add_inline_imm_neg1_0:1079; GFX11: ; %bb.0:1080; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1081; GFX11-NEXT: v_pk_sub_u16 v0, v0, 11082; GFX11-NEXT: s_setpc_b64 s[30:31]1083 %y = add <2 x i16> %x, <i16 -1, i16 0>1084 ret <2 x i16> %y1085}1086 1087define <2 x i16> @add_inline_imm_1_0(<2 x i16> %x) {1088; VI-LABEL: add_inline_imm_1_0:1089; VI: ; %bb.0:1090; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1091; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v01092; VI-NEXT: v_add_u16_e32 v0, 1, v01093; VI-NEXT: v_or_b32_e32 v0, v0, v11094; VI-NEXT: s_setpc_b64 s[30:31]1095;1096; GFX9-LABEL: add_inline_imm_1_0:1097; GFX9: ; %bb.0:1098; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1099; GFX9-NEXT: v_pk_add_u16 v0, v0, 11100; GFX9-NEXT: s_setpc_b64 s[30:31]1101;1102; GFX10-LABEL: add_inline_imm_1_0:1103; GFX10: ; %bb.0:1104; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1105; GFX10-NEXT: v_pk_add_u16 v0, v0, 11106; GFX10-NEXT: s_setpc_b64 s[30:31]1107;1108; GFX11-LABEL: add_inline_imm_1_0:1109; GFX11: ; %bb.0:1110; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1111; GFX11-NEXT: v_pk_add_u16 v0, v0, 11112; GFX11-NEXT: s_setpc_b64 s[30:31]1113 %y = add <2 x i16> %x, <i16 1, i16 0>1114 ret <2 x i16> %y1115}1116 1117declare i32 @llvm.amdgcn.workitem.id.x() #01118 1119attributes #0 = { nounwind readnone }1120attributes #1 = { nounwind }1121