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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck %s --check-prefix=GFX93; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck %s --check-prefix=GFX104; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck %s --check-prefix=GFX115 6define amdgpu_kernel void @test0() {7; GFX9-LABEL: test0:8; GFX9: ; %bb.0:9; GFX9-NEXT: s_endpgm10;11; GFX10-LABEL: test0:12; GFX10: ; %bb.0:13; GFX10-NEXT: s_endpgm14;15; GFX11-LABEL: test0:16; GFX11: ; %bb.0:17; GFX11-NEXT: s_endpgm18 tail call void @llvm.amdgcn.endpgm()19 unreachable20}21 22define void @test1() {23; GFX9-LABEL: test1:24; GFX9: ; %bb.0:25; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)26; GFX9-NEXT: s_endpgm27;28; GFX10-LABEL: test1:29; GFX10: ; %bb.0:30; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)31; GFX10-NEXT: s_endpgm32;33; GFX11-LABEL: test1:34; GFX11: ; %bb.0:35; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)36; GFX11-NEXT: s_endpgm37 tail call void @llvm.amdgcn.endpgm()38 unreachable39}40 41define amdgpu_kernel void @test2(ptr %p, i32 %x) {42; GFX9-LABEL: test2:43; GFX9: ; %bb.0:44; GFX9-NEXT: s_load_dword s0, s[4:5], 0x2c45; GFX9-NEXT: s_waitcnt lgkmcnt(0)46; GFX9-NEXT: s_cmp_lt_i32 s0, 147; GFX9-NEXT: s_cbranch_scc0 .LBB2_248; GFX9-NEXT: ; %bb.1: ; %else49; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2450; GFX9-NEXT: v_mov_b32_e32 v2, s051; GFX9-NEXT: s_waitcnt lgkmcnt(0)52; GFX9-NEXT: v_mov_b32_e32 v0, s253; GFX9-NEXT: v_mov_b32_e32 v1, s354; GFX9-NEXT: flat_store_dword v[0:1], v255; GFX9-NEXT: s_endpgm56; GFX9-NEXT: .LBB2_2: ; %then57; GFX9-NEXT: s_endpgm58;59; GFX10-LABEL: test2:60; GFX10: ; %bb.0:61; GFX10-NEXT: s_load_dword s0, s[4:5], 0x2c62; GFX10-NEXT: s_waitcnt lgkmcnt(0)63; GFX10-NEXT: s_cmp_lt_i32 s0, 164; GFX10-NEXT: s_cbranch_scc0 .LBB2_265; GFX10-NEXT: ; %bb.1: ; %else66; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2467; GFX10-NEXT: v_mov_b32_e32 v2, s068; GFX10-NEXT: s_waitcnt lgkmcnt(0)69; GFX10-NEXT: v_mov_b32_e32 v0, s270; GFX10-NEXT: v_mov_b32_e32 v1, s371; GFX10-NEXT: flat_store_dword v[0:1], v272; GFX10-NEXT: s_endpgm73; GFX10-NEXT: .LBB2_2: ; %then74; GFX10-NEXT: s_endpgm75;76; GFX11-LABEL: test2:77; GFX11: ; %bb.0:78; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x2c79; GFX11-NEXT: s_waitcnt lgkmcnt(0)80; GFX11-NEXT: s_cmp_lt_i32 s0, 181; GFX11-NEXT: s_cbranch_scc0 .LBB2_282; GFX11-NEXT: ; %bb.1: ; %else83; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x2484; GFX11-NEXT: v_mov_b32_e32 v2, s085; GFX11-NEXT: s_waitcnt lgkmcnt(0)86; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s387; GFX11-NEXT: flat_store_b32 v[0:1], v288; GFX11-NEXT: s_endpgm89; GFX11-NEXT: .LBB2_2: ; %then90; GFX11-NEXT: s_endpgm91 %cond = icmp sgt i32 %x, 092 br i1 %cond, label %then, label %else93 94then:95 tail call void @llvm.amdgcn.endpgm()96 unreachable97 98else:99 store i32 %x, ptr %p100 ret void101}102 103declare void @llvm.amdgcn.endpgm()104