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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52 3; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=SI %s4; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=VI %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s7; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s8 9define <12 x float> @bitcast_v12i32_to_v12f32(<12 x i32> %a, i32 %b) {10; SI-LABEL: bitcast_v12i32_to_v12f32:11; SI: ; %bb.0:12; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1214; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc15; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]16; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]17; SI-NEXT: s_cbranch_execz .LBB0_218; SI-NEXT: ; %bb.1: ; %cmp.true19; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v1120; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v1021; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v922; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v823; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v724; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v625; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v526; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v427; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v328; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v229; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v130; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v031; SI-NEXT: .LBB0_2: ; %end32; SI-NEXT: s_or_b64 exec, exec, s[4:5]33; SI-NEXT: s_setpc_b64 s[30:31]34;35; VI-LABEL: bitcast_v12i32_to_v12f32:36; VI: ; %bb.0:37; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)38; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1239; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc40; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]41; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]42; VI-NEXT: s_cbranch_execz .LBB0_243; VI-NEXT: ; %bb.1: ; %cmp.true44; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v1145; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v1046; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v947; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v848; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v749; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v650; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v551; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v452; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v353; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v254; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v155; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v056; VI-NEXT: .LBB0_2: ; %end57; VI-NEXT: s_or_b64 exec, exec, s[4:5]58; VI-NEXT: s_setpc_b64 s[30:31]59;60; GFX9-LABEL: bitcast_v12i32_to_v12f32:61; GFX9: ; %bb.0:62; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)63; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1264; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc65; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]66; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]67; GFX9-NEXT: s_cbranch_execz .LBB0_268; GFX9-NEXT: ; %bb.1: ; %cmp.true69; GFX9-NEXT: v_add_u32_e32 v11, 3, v1170; GFX9-NEXT: v_add_u32_e32 v10, 3, v1071; GFX9-NEXT: v_add_u32_e32 v9, 3, v972; GFX9-NEXT: v_add_u32_e32 v8, 3, v873; GFX9-NEXT: v_add_u32_e32 v7, 3, v774; GFX9-NEXT: v_add_u32_e32 v6, 3, v675; GFX9-NEXT: v_add_u32_e32 v5, 3, v576; GFX9-NEXT: v_add_u32_e32 v4, 3, v477; GFX9-NEXT: v_add_u32_e32 v3, 3, v378; GFX9-NEXT: v_add_u32_e32 v2, 3, v279; GFX9-NEXT: v_add_u32_e32 v1, 3, v180; GFX9-NEXT: v_add_u32_e32 v0, 3, v081; GFX9-NEXT: .LBB0_2: ; %end82; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]83; GFX9-NEXT: s_setpc_b64 s[30:31]84;85; GFX11-LABEL: bitcast_v12i32_to_v12f32:86; GFX11: ; %bb.0:87; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)88; GFX11-NEXT: s_mov_b32 s0, exec_lo89; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v1290; GFX11-NEXT: s_xor_b32 s0, exec_lo, s091; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)92; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s093; GFX11-NEXT: s_cbranch_execz .LBB0_294; GFX11-NEXT: ; %bb.1: ; %cmp.true95; GFX11-NEXT: v_add_nc_u32_e32 v11, 3, v1196; GFX11-NEXT: v_add_nc_u32_e32 v10, 3, v1097; GFX11-NEXT: v_add_nc_u32_e32 v9, 3, v998; GFX11-NEXT: v_add_nc_u32_e32 v8, 3, v899; GFX11-NEXT: v_add_nc_u32_e32 v7, 3, v7100; GFX11-NEXT: v_add_nc_u32_e32 v6, 3, v6101; GFX11-NEXT: v_add_nc_u32_e32 v5, 3, v5102; GFX11-NEXT: v_add_nc_u32_e32 v4, 3, v4103; GFX11-NEXT: v_add_nc_u32_e32 v3, 3, v3104; GFX11-NEXT: v_add_nc_u32_e32 v2, 3, v2105; GFX11-NEXT: v_add_nc_u32_e32 v1, 3, v1106; GFX11-NEXT: v_add_nc_u32_e32 v0, 3, v0107; GFX11-NEXT: .LBB0_2: ; %end108; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0109; GFX11-NEXT: s_setpc_b64 s[30:31]110 %cmp = icmp eq i32 %b, 0111 br i1 %cmp, label %cmp.true, label %cmp.false112 113cmp.true:114 %a1 = add <12 x i32> %a, splat (i32 3)115 %a2 = bitcast <12 x i32> %a1 to <12 x float>116 br label %end117 118cmp.false:119 %a3 = bitcast <12 x i32> %a to <12 x float>120 br label %end121 122end:123 %phi = phi <12 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]124 ret <12 x float> %phi125}126 127define inreg <12 x float> @bitcast_v12i32_to_v12f32_scalar(<12 x i32> inreg %a, i32 inreg %b) {128; SI-LABEL: bitcast_v12i32_to_v12f32_scalar:129; SI: ; %bb.0:130; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)131; SI-NEXT: s_cmp_lg_u32 s28, 0132; SI-NEXT: s_cbranch_scc0 .LBB1_4133; SI-NEXT: ; %bb.1: ; %cmp.false134; SI-NEXT: s_cbranch_execnz .LBB1_3135; SI-NEXT: .LBB1_2: ; %cmp.true136; SI-NEXT: s_add_i32 s27, s27, 3137; SI-NEXT: s_add_i32 s26, s26, 3138; SI-NEXT: s_add_i32 s25, s25, 3139; SI-NEXT: s_add_i32 s24, s24, 3140; SI-NEXT: s_add_i32 s23, s23, 3141; SI-NEXT: s_add_i32 s22, s22, 3142; SI-NEXT: s_add_i32 s21, s21, 3143; SI-NEXT: s_add_i32 s20, s20, 3144; SI-NEXT: s_add_i32 s19, s19, 3145; SI-NEXT: s_add_i32 s18, s18, 3146; SI-NEXT: s_add_i32 s17, s17, 3147; SI-NEXT: s_add_i32 s16, s16, 3148; SI-NEXT: .LBB1_3: ; %end149; SI-NEXT: v_mov_b32_e32 v0, s16150; SI-NEXT: v_mov_b32_e32 v1, s17151; SI-NEXT: v_mov_b32_e32 v2, s18152; SI-NEXT: v_mov_b32_e32 v3, s19153; SI-NEXT: v_mov_b32_e32 v4, s20154; SI-NEXT: v_mov_b32_e32 v5, s21155; SI-NEXT: v_mov_b32_e32 v6, s22156; SI-NEXT: v_mov_b32_e32 v7, s23157; SI-NEXT: v_mov_b32_e32 v8, s24158; SI-NEXT: v_mov_b32_e32 v9, s25159; SI-NEXT: v_mov_b32_e32 v10, s26160; SI-NEXT: v_mov_b32_e32 v11, s27161; SI-NEXT: s_setpc_b64 s[30:31]162; SI-NEXT: .LBB1_4:163; SI-NEXT: s_branch .LBB1_2164;165; VI-LABEL: bitcast_v12i32_to_v12f32_scalar:166; VI: ; %bb.0:167; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)168; VI-NEXT: s_cmp_lg_u32 s28, 0169; VI-NEXT: s_cbranch_scc0 .LBB1_4170; VI-NEXT: ; %bb.1: ; %cmp.false171; VI-NEXT: s_cbranch_execnz .LBB1_3172; VI-NEXT: .LBB1_2: ; %cmp.true173; VI-NEXT: s_add_i32 s27, s27, 3174; VI-NEXT: s_add_i32 s26, s26, 3175; VI-NEXT: s_add_i32 s25, s25, 3176; VI-NEXT: s_add_i32 s24, s24, 3177; VI-NEXT: s_add_i32 s23, s23, 3178; VI-NEXT: s_add_i32 s22, s22, 3179; VI-NEXT: s_add_i32 s21, s21, 3180; VI-NEXT: s_add_i32 s20, s20, 3181; VI-NEXT: s_add_i32 s19, s19, 3182; VI-NEXT: s_add_i32 s18, s18, 3183; VI-NEXT: s_add_i32 s17, s17, 3184; VI-NEXT: s_add_i32 s16, s16, 3185; VI-NEXT: .LBB1_3: ; %end186; VI-NEXT: v_mov_b32_e32 v0, s16187; VI-NEXT: v_mov_b32_e32 v1, s17188; VI-NEXT: v_mov_b32_e32 v2, s18189; VI-NEXT: v_mov_b32_e32 v3, s19190; VI-NEXT: v_mov_b32_e32 v4, s20191; VI-NEXT: v_mov_b32_e32 v5, s21192; VI-NEXT: v_mov_b32_e32 v6, s22193; VI-NEXT: v_mov_b32_e32 v7, s23194; VI-NEXT: v_mov_b32_e32 v8, s24195; VI-NEXT: v_mov_b32_e32 v9, s25196; VI-NEXT: v_mov_b32_e32 v10, s26197; VI-NEXT: v_mov_b32_e32 v11, s27198; VI-NEXT: s_setpc_b64 s[30:31]199; VI-NEXT: .LBB1_4:200; VI-NEXT: s_branch .LBB1_2201;202; GFX9-LABEL: bitcast_v12i32_to_v12f32_scalar:203; GFX9: ; %bb.0:204; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)205; GFX9-NEXT: s_cmp_lg_u32 s28, 0206; GFX9-NEXT: s_cbranch_scc0 .LBB1_4207; GFX9-NEXT: ; %bb.1: ; %cmp.false208; GFX9-NEXT: s_cbranch_execnz .LBB1_3209; GFX9-NEXT: .LBB1_2: ; %cmp.true210; GFX9-NEXT: s_add_i32 s27, s27, 3211; GFX9-NEXT: s_add_i32 s26, s26, 3212; GFX9-NEXT: s_add_i32 s25, s25, 3213; GFX9-NEXT: s_add_i32 s24, s24, 3214; GFX9-NEXT: s_add_i32 s23, s23, 3215; GFX9-NEXT: s_add_i32 s22, s22, 3216; GFX9-NEXT: s_add_i32 s21, s21, 3217; GFX9-NEXT: s_add_i32 s20, s20, 3218; GFX9-NEXT: s_add_i32 s19, s19, 3219; GFX9-NEXT: s_add_i32 s18, s18, 3220; GFX9-NEXT: s_add_i32 s17, s17, 3221; GFX9-NEXT: s_add_i32 s16, s16, 3222; GFX9-NEXT: .LBB1_3: ; %end223; GFX9-NEXT: v_mov_b32_e32 v0, s16224; GFX9-NEXT: v_mov_b32_e32 v1, s17225; GFX9-NEXT: v_mov_b32_e32 v2, s18226; GFX9-NEXT: v_mov_b32_e32 v3, s19227; GFX9-NEXT: v_mov_b32_e32 v4, s20228; GFX9-NEXT: v_mov_b32_e32 v5, s21229; GFX9-NEXT: v_mov_b32_e32 v6, s22230; GFX9-NEXT: v_mov_b32_e32 v7, s23231; GFX9-NEXT: v_mov_b32_e32 v8, s24232; GFX9-NEXT: v_mov_b32_e32 v9, s25233; GFX9-NEXT: v_mov_b32_e32 v10, s26234; GFX9-NEXT: v_mov_b32_e32 v11, s27235; GFX9-NEXT: s_setpc_b64 s[30:31]236; GFX9-NEXT: .LBB1_4:237; GFX9-NEXT: s_branch .LBB1_2238;239; GFX11-LABEL: bitcast_v12i32_to_v12f32_scalar:240; GFX11: ; %bb.0:241; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)242; GFX11-NEXT: s_cmp_lg_u32 s24, 0243; GFX11-NEXT: s_mov_b32 s4, 0244; GFX11-NEXT: s_cbranch_scc0 .LBB1_4245; GFX11-NEXT: ; %bb.1: ; %Flow246; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s4247; GFX11-NEXT: s_cbranch_vccnz .LBB1_3248; GFX11-NEXT: .LBB1_2: ; %cmp.true249; GFX11-NEXT: s_add_i32 s23, s23, 3250; GFX11-NEXT: s_add_i32 s22, s22, 3251; GFX11-NEXT: s_add_i32 s21, s21, 3252; GFX11-NEXT: s_add_i32 s20, s20, 3253; GFX11-NEXT: s_add_i32 s19, s19, 3254; GFX11-NEXT: s_add_i32 s18, s18, 3255; GFX11-NEXT: s_add_i32 s17, s17, 3256; GFX11-NEXT: s_add_i32 s16, s16, 3257; GFX11-NEXT: s_add_i32 s3, s3, 3258; GFX11-NEXT: s_add_i32 s2, s2, 3259; GFX11-NEXT: s_add_i32 s1, s1, 3260; GFX11-NEXT: s_add_i32 s0, s0, 3261; GFX11-NEXT: .LBB1_3: ; %end262; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)263; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1264; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3265; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17266; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19267; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21268; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23269; GFX11-NEXT: s_setpc_b64 s[30:31]270; GFX11-NEXT: .LBB1_4:271; GFX11-NEXT: s_branch .LBB1_2272 %cmp = icmp eq i32 %b, 0273 br i1 %cmp, label %cmp.true, label %cmp.false274 275cmp.true:276 %a1 = add <12 x i32> %a, splat (i32 3)277 %a2 = bitcast <12 x i32> %a1 to <12 x float>278 br label %end279 280cmp.false:281 %a3 = bitcast <12 x i32> %a to <12 x float>282 br label %end283 284end:285 %phi = phi <12 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]286 ret <12 x float> %phi287}288 289define <12 x i32> @bitcast_v12f32_to_v12i32(<12 x float> %a, i32 %b) {290; SI-LABEL: bitcast_v12f32_to_v12i32:291; SI: ; %bb.0:292; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)293; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12294; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc295; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]296; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]297; SI-NEXT: s_cbranch_execz .LBB2_2298; SI-NEXT: ; %bb.1: ; %cmp.true299; SI-NEXT: v_add_f32_e32 v11, 1.0, v11300; SI-NEXT: v_add_f32_e32 v10, 1.0, v10301; SI-NEXT: v_add_f32_e32 v9, 1.0, v9302; SI-NEXT: v_add_f32_e32 v8, 1.0, v8303; SI-NEXT: v_add_f32_e32 v7, 1.0, v7304; SI-NEXT: v_add_f32_e32 v6, 1.0, v6305; SI-NEXT: v_add_f32_e32 v5, 1.0, v5306; SI-NEXT: v_add_f32_e32 v4, 1.0, v4307; SI-NEXT: v_add_f32_e32 v3, 1.0, v3308; SI-NEXT: v_add_f32_e32 v2, 1.0, v2309; SI-NEXT: v_add_f32_e32 v1, 1.0, v1310; SI-NEXT: v_add_f32_e32 v0, 1.0, v0311; SI-NEXT: .LBB2_2: ; %end312; SI-NEXT: s_or_b64 exec, exec, s[4:5]313; SI-NEXT: s_setpc_b64 s[30:31]314;315; VI-LABEL: bitcast_v12f32_to_v12i32:316; VI: ; %bb.0:317; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)318; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12319; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc320; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]321; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]322; VI-NEXT: s_cbranch_execz .LBB2_2323; VI-NEXT: ; %bb.1: ; %cmp.true324; VI-NEXT: v_add_f32_e32 v11, 1.0, v11325; VI-NEXT: v_add_f32_e32 v10, 1.0, v10326; VI-NEXT: v_add_f32_e32 v9, 1.0, v9327; VI-NEXT: v_add_f32_e32 v8, 1.0, v8328; VI-NEXT: v_add_f32_e32 v7, 1.0, v7329; VI-NEXT: v_add_f32_e32 v6, 1.0, v6330; VI-NEXT: v_add_f32_e32 v5, 1.0, v5331; VI-NEXT: v_add_f32_e32 v4, 1.0, v4332; VI-NEXT: v_add_f32_e32 v3, 1.0, v3333; VI-NEXT: v_add_f32_e32 v2, 1.0, v2334; VI-NEXT: v_add_f32_e32 v1, 1.0, v1335; VI-NEXT: v_add_f32_e32 v0, 1.0, v0336; VI-NEXT: .LBB2_2: ; %end337; VI-NEXT: s_or_b64 exec, exec, s[4:5]338; VI-NEXT: s_setpc_b64 s[30:31]339;340; GFX9-LABEL: bitcast_v12f32_to_v12i32:341; GFX9: ; %bb.0:342; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)343; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12344; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc345; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]346; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]347; GFX9-NEXT: s_cbranch_execz .LBB2_2348; GFX9-NEXT: ; %bb.1: ; %cmp.true349; GFX9-NEXT: v_add_f32_e32 v11, 1.0, v11350; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v10351; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v9352; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v8353; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v7354; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v6355; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v5356; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v4357; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v3358; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v2359; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v1360; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v0361; GFX9-NEXT: .LBB2_2: ; %end362; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]363; GFX9-NEXT: s_setpc_b64 s[30:31]364;365; GFX11-LABEL: bitcast_v12f32_to_v12i32:366; GFX11: ; %bb.0:367; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)368; GFX11-NEXT: s_mov_b32 s0, exec_lo369; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v12370; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0371; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)372; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0373; GFX11-NEXT: ; %bb.1: ; %cmp.true374; GFX11-NEXT: v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v10375; GFX11-NEXT: v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v8376; GFX11-NEXT: v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v6377; GFX11-NEXT: v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v4378; GFX11-NEXT: v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v2379; GFX11-NEXT: v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v0380; GFX11-NEXT: ; %bb.2: ; %end381; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0382; GFX11-NEXT: s_setpc_b64 s[30:31]383 %cmp = icmp eq i32 %b, 0384 br i1 %cmp, label %cmp.true, label %cmp.false385 386cmp.true:387 %a1 = fadd <12 x float> %a, splat (float 1.000000e+00)388 %a2 = bitcast <12 x float> %a1 to <12 x i32>389 br label %end390 391cmp.false:392 %a3 = bitcast <12 x float> %a to <12 x i32>393 br label %end394 395end:396 %phi = phi <12 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]397 ret <12 x i32> %phi398}399 400define inreg <12 x i32> @bitcast_v12f32_to_v12i32_scalar(<12 x float> inreg %a, i32 inreg %b) {401; SI-LABEL: bitcast_v12f32_to_v12i32_scalar:402; SI: ; %bb.0:403; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)404; SI-NEXT: s_cmp_lg_u32 s28, 0405; SI-NEXT: s_cbranch_scc0 .LBB3_3406; SI-NEXT: ; %bb.1: ; %cmp.false407; SI-NEXT: s_cbranch_execnz .LBB3_4408; SI-NEXT: .LBB3_2: ; %cmp.true409; SI-NEXT: v_add_f32_e64 v11, s27, 1.0410; SI-NEXT: v_add_f32_e64 v10, s26, 1.0411; SI-NEXT: v_add_f32_e64 v9, s25, 1.0412; SI-NEXT: v_add_f32_e64 v8, s24, 1.0413; SI-NEXT: v_add_f32_e64 v7, s23, 1.0414; SI-NEXT: v_add_f32_e64 v6, s22, 1.0415; SI-NEXT: v_add_f32_e64 v5, s21, 1.0416; SI-NEXT: v_add_f32_e64 v4, s20, 1.0417; SI-NEXT: v_add_f32_e64 v3, s19, 1.0418; SI-NEXT: v_add_f32_e64 v2, s18, 1.0419; SI-NEXT: v_add_f32_e64 v1, s17, 1.0420; SI-NEXT: v_add_f32_e64 v0, s16, 1.0421; SI-NEXT: s_setpc_b64 s[30:31]422; SI-NEXT: .LBB3_3:423; SI-NEXT: s_branch .LBB3_2424; SI-NEXT: .LBB3_4:425; SI-NEXT: v_mov_b32_e32 v0, s16426; SI-NEXT: v_mov_b32_e32 v1, s17427; SI-NEXT: v_mov_b32_e32 v2, s18428; SI-NEXT: v_mov_b32_e32 v3, s19429; SI-NEXT: v_mov_b32_e32 v4, s20430; SI-NEXT: v_mov_b32_e32 v5, s21431; SI-NEXT: v_mov_b32_e32 v6, s22432; SI-NEXT: v_mov_b32_e32 v7, s23433; SI-NEXT: v_mov_b32_e32 v8, s24434; SI-NEXT: v_mov_b32_e32 v9, s25435; SI-NEXT: v_mov_b32_e32 v10, s26436; SI-NEXT: v_mov_b32_e32 v11, s27437; SI-NEXT: s_setpc_b64 s[30:31]438;439; VI-LABEL: bitcast_v12f32_to_v12i32_scalar:440; VI: ; %bb.0:441; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)442; VI-NEXT: s_cmp_lg_u32 s28, 0443; VI-NEXT: s_cbranch_scc0 .LBB3_3444; VI-NEXT: ; %bb.1: ; %cmp.false445; VI-NEXT: s_cbranch_execnz .LBB3_4446; VI-NEXT: .LBB3_2: ; %cmp.true447; VI-NEXT: v_add_f32_e64 v11, s27, 1.0448; VI-NEXT: v_add_f32_e64 v10, s26, 1.0449; VI-NEXT: v_add_f32_e64 v9, s25, 1.0450; VI-NEXT: v_add_f32_e64 v8, s24, 1.0451; VI-NEXT: v_add_f32_e64 v7, s23, 1.0452; VI-NEXT: v_add_f32_e64 v6, s22, 1.0453; VI-NEXT: v_add_f32_e64 v5, s21, 1.0454; VI-NEXT: v_add_f32_e64 v4, s20, 1.0455; VI-NEXT: v_add_f32_e64 v3, s19, 1.0456; VI-NEXT: v_add_f32_e64 v2, s18, 1.0457; VI-NEXT: v_add_f32_e64 v1, s17, 1.0458; VI-NEXT: v_add_f32_e64 v0, s16, 1.0459; VI-NEXT: s_setpc_b64 s[30:31]460; VI-NEXT: .LBB3_3:461; VI-NEXT: s_branch .LBB3_2462; VI-NEXT: .LBB3_4:463; VI-NEXT: v_mov_b32_e32 v0, s16464; VI-NEXT: v_mov_b32_e32 v1, s17465; VI-NEXT: v_mov_b32_e32 v2, s18466; VI-NEXT: v_mov_b32_e32 v3, s19467; VI-NEXT: v_mov_b32_e32 v4, s20468; VI-NEXT: v_mov_b32_e32 v5, s21469; VI-NEXT: v_mov_b32_e32 v6, s22470; VI-NEXT: v_mov_b32_e32 v7, s23471; VI-NEXT: v_mov_b32_e32 v8, s24472; VI-NEXT: v_mov_b32_e32 v9, s25473; VI-NEXT: v_mov_b32_e32 v10, s26474; VI-NEXT: v_mov_b32_e32 v11, s27475; VI-NEXT: s_setpc_b64 s[30:31]476;477; GFX9-LABEL: bitcast_v12f32_to_v12i32_scalar:478; GFX9: ; %bb.0:479; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)480; GFX9-NEXT: s_cmp_lg_u32 s28, 0481; GFX9-NEXT: s_cbranch_scc0 .LBB3_3482; GFX9-NEXT: ; %bb.1: ; %cmp.false483; GFX9-NEXT: s_cbranch_execnz .LBB3_4484; GFX9-NEXT: .LBB3_2: ; %cmp.true485; GFX9-NEXT: v_add_f32_e64 v11, s27, 1.0486; GFX9-NEXT: v_add_f32_e64 v10, s26, 1.0487; GFX9-NEXT: v_add_f32_e64 v9, s25, 1.0488; GFX9-NEXT: v_add_f32_e64 v8, s24, 1.0489; GFX9-NEXT: v_add_f32_e64 v7, s23, 1.0490; GFX9-NEXT: v_add_f32_e64 v6, s22, 1.0491; GFX9-NEXT: v_add_f32_e64 v5, s21, 1.0492; GFX9-NEXT: v_add_f32_e64 v4, s20, 1.0493; GFX9-NEXT: v_add_f32_e64 v3, s19, 1.0494; GFX9-NEXT: v_add_f32_e64 v2, s18, 1.0495; GFX9-NEXT: v_add_f32_e64 v1, s17, 1.0496; GFX9-NEXT: v_add_f32_e64 v0, s16, 1.0497; GFX9-NEXT: s_setpc_b64 s[30:31]498; GFX9-NEXT: .LBB3_3:499; GFX9-NEXT: s_branch .LBB3_2500; GFX9-NEXT: .LBB3_4:501; GFX9-NEXT: v_mov_b32_e32 v0, s16502; GFX9-NEXT: v_mov_b32_e32 v1, s17503; GFX9-NEXT: v_mov_b32_e32 v2, s18504; GFX9-NEXT: v_mov_b32_e32 v3, s19505; GFX9-NEXT: v_mov_b32_e32 v4, s20506; GFX9-NEXT: v_mov_b32_e32 v5, s21507; GFX9-NEXT: v_mov_b32_e32 v6, s22508; GFX9-NEXT: v_mov_b32_e32 v7, s23509; GFX9-NEXT: v_mov_b32_e32 v8, s24510; GFX9-NEXT: v_mov_b32_e32 v9, s25511; GFX9-NEXT: v_mov_b32_e32 v10, s26512; GFX9-NEXT: v_mov_b32_e32 v11, s27513; GFX9-NEXT: s_setpc_b64 s[30:31]514;515; GFX11-LABEL: bitcast_v12f32_to_v12i32_scalar:516; GFX11: ; %bb.0:517; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)518; GFX11-NEXT: s_mov_b32 s15, s3519; GFX11-NEXT: s_mov_b32 s14, s2520; GFX11-NEXT: s_mov_b32 s13, s1521; GFX11-NEXT: s_mov_b32 s12, s0522; GFX11-NEXT: s_cmp_lg_u32 s24, 0523; GFX11-NEXT: s_mov_b32 s0, 0524; GFX11-NEXT: s_cbranch_scc0 .LBB3_3525; GFX11-NEXT: ; %bb.1: ; %Flow526; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s0527; GFX11-NEXT: s_cbranch_vccnz .LBB3_4528; GFX11-NEXT: .LBB3_2: ; %cmp.true529; GFX11-NEXT: v_add_f32_e64 v11, s23, 1.0530; GFX11-NEXT: v_add_f32_e64 v10, s22, 1.0531; GFX11-NEXT: v_add_f32_e64 v9, s21, 1.0532; GFX11-NEXT: v_add_f32_e64 v8, s20, 1.0533; GFX11-NEXT: v_add_f32_e64 v7, s19, 1.0534; GFX11-NEXT: v_add_f32_e64 v6, s18, 1.0535; GFX11-NEXT: v_add_f32_e64 v5, s17, 1.0536; GFX11-NEXT: v_add_f32_e64 v4, s16, 1.0537; GFX11-NEXT: v_add_f32_e64 v3, s15, 1.0538; GFX11-NEXT: v_add_f32_e64 v2, s14, 1.0539; GFX11-NEXT: v_add_f32_e64 v1, s13, 1.0540; GFX11-NEXT: v_add_f32_e64 v0, s12, 1.0541; GFX11-NEXT: s_setpc_b64 s[30:31]542; GFX11-NEXT: .LBB3_3:543; GFX11-NEXT: s_branch .LBB3_2544; GFX11-NEXT: .LBB3_4:545; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s13546; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s15547; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17548; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19549; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21550; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23551; GFX11-NEXT: s_setpc_b64 s[30:31]552 %cmp = icmp eq i32 %b, 0553 br i1 %cmp, label %cmp.true, label %cmp.false554 555cmp.true:556 %a1 = fadd <12 x float> %a, splat (float 1.000000e+00)557 %a2 = bitcast <12 x float> %a1 to <12 x i32>558 br label %end559 560cmp.false:561 %a3 = bitcast <12 x float> %a to <12 x i32>562 br label %end563 564end:565 %phi = phi <12 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]566 ret <12 x i32> %phi567}568 569define <6 x double> @bitcast_v12i32_to_v6f64(<12 x i32> %a, i32 %b) {570; SI-LABEL: bitcast_v12i32_to_v6f64:571; SI: ; %bb.0:572; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)573; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12574; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc575; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]576; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]577; SI-NEXT: s_cbranch_execz .LBB4_2578; SI-NEXT: ; %bb.1: ; %cmp.true579; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v11580; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10581; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v9582; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8583; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7584; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6585; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5586; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4587; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3588; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2589; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1590; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0591; SI-NEXT: .LBB4_2: ; %end592; SI-NEXT: s_or_b64 exec, exec, s[4:5]593; SI-NEXT: s_setpc_b64 s[30:31]594;595; VI-LABEL: bitcast_v12i32_to_v6f64:596; VI: ; %bb.0:597; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)598; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12599; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc600; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]601; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]602; VI-NEXT: s_cbranch_execz .LBB4_2603; VI-NEXT: ; %bb.1: ; %cmp.true604; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v11605; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10606; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9607; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8608; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7609; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6610; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5611; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4612; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3613; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2614; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1615; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0616; VI-NEXT: .LBB4_2: ; %end617; VI-NEXT: s_or_b64 exec, exec, s[4:5]618; VI-NEXT: s_setpc_b64 s[30:31]619;620; GFX9-LABEL: bitcast_v12i32_to_v6f64:621; GFX9: ; %bb.0:622; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)623; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12624; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc625; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]626; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]627; GFX9-NEXT: s_cbranch_execz .LBB4_2628; GFX9-NEXT: ; %bb.1: ; %cmp.true629; GFX9-NEXT: v_add_u32_e32 v11, 3, v11630; GFX9-NEXT: v_add_u32_e32 v10, 3, v10631; GFX9-NEXT: v_add_u32_e32 v9, 3, v9632; GFX9-NEXT: v_add_u32_e32 v8, 3, v8633; GFX9-NEXT: v_add_u32_e32 v7, 3, v7634; GFX9-NEXT: v_add_u32_e32 v6, 3, v6635; GFX9-NEXT: v_add_u32_e32 v5, 3, v5636; GFX9-NEXT: v_add_u32_e32 v4, 3, v4637; GFX9-NEXT: v_add_u32_e32 v3, 3, v3638; GFX9-NEXT: v_add_u32_e32 v2, 3, v2639; GFX9-NEXT: v_add_u32_e32 v1, 3, v1640; GFX9-NEXT: v_add_u32_e32 v0, 3, v0641; GFX9-NEXT: .LBB4_2: ; %end642; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]643; GFX9-NEXT: s_setpc_b64 s[30:31]644;645; GFX11-LABEL: bitcast_v12i32_to_v6f64:646; GFX11: ; %bb.0:647; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)648; GFX11-NEXT: s_mov_b32 s0, exec_lo649; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v12650; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0651; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)652; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0653; GFX11-NEXT: s_cbranch_execz .LBB4_2654; GFX11-NEXT: ; %bb.1: ; %cmp.true655; GFX11-NEXT: v_add_nc_u32_e32 v11, 3, v11656; GFX11-NEXT: v_add_nc_u32_e32 v10, 3, v10657; GFX11-NEXT: v_add_nc_u32_e32 v9, 3, v9658; GFX11-NEXT: v_add_nc_u32_e32 v8, 3, v8659; GFX11-NEXT: v_add_nc_u32_e32 v7, 3, v7660; GFX11-NEXT: v_add_nc_u32_e32 v6, 3, v6661; GFX11-NEXT: v_add_nc_u32_e32 v5, 3, v5662; GFX11-NEXT: v_add_nc_u32_e32 v4, 3, v4663; GFX11-NEXT: v_add_nc_u32_e32 v3, 3, v3664; GFX11-NEXT: v_add_nc_u32_e32 v2, 3, v2665; GFX11-NEXT: v_add_nc_u32_e32 v1, 3, v1666; GFX11-NEXT: v_add_nc_u32_e32 v0, 3, v0667; GFX11-NEXT: .LBB4_2: ; %end668; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0669; GFX11-NEXT: s_setpc_b64 s[30:31]670 %cmp = icmp eq i32 %b, 0671 br i1 %cmp, label %cmp.true, label %cmp.false672 673cmp.true:674 %a1 = add <12 x i32> %a, splat (i32 3)675 %a2 = bitcast <12 x i32> %a1 to <6 x double>676 br label %end677 678cmp.false:679 %a3 = bitcast <12 x i32> %a to <6 x double>680 br label %end681 682end:683 %phi = phi <6 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]684 ret <6 x double> %phi685}686 687define inreg <6 x double> @bitcast_v12i32_to_v6f64_scalar(<12 x i32> inreg %a, i32 inreg %b) {688; SI-LABEL: bitcast_v12i32_to_v6f64_scalar:689; SI: ; %bb.0:690; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)691; SI-NEXT: s_cmp_lg_u32 s28, 0692; SI-NEXT: s_cbranch_scc0 .LBB5_4693; SI-NEXT: ; %bb.1: ; %cmp.false694; SI-NEXT: s_cbranch_execnz .LBB5_3695; SI-NEXT: .LBB5_2: ; %cmp.true696; SI-NEXT: s_add_i32 s27, s27, 3697; SI-NEXT: s_add_i32 s26, s26, 3698; SI-NEXT: s_add_i32 s25, s25, 3699; SI-NEXT: s_add_i32 s24, s24, 3700; SI-NEXT: s_add_i32 s23, s23, 3701; SI-NEXT: s_add_i32 s22, s22, 3702; SI-NEXT: s_add_i32 s21, s21, 3703; SI-NEXT: s_add_i32 s20, s20, 3704; SI-NEXT: s_add_i32 s19, s19, 3705; SI-NEXT: s_add_i32 s18, s18, 3706; SI-NEXT: s_add_i32 s17, s17, 3707; SI-NEXT: s_add_i32 s16, s16, 3708; SI-NEXT: .LBB5_3: ; %end709; SI-NEXT: v_mov_b32_e32 v0, s16710; SI-NEXT: v_mov_b32_e32 v1, s17711; SI-NEXT: v_mov_b32_e32 v2, s18712; SI-NEXT: v_mov_b32_e32 v3, s19713; SI-NEXT: v_mov_b32_e32 v4, s20714; SI-NEXT: v_mov_b32_e32 v5, s21715; SI-NEXT: v_mov_b32_e32 v6, s22716; SI-NEXT: v_mov_b32_e32 v7, s23717; SI-NEXT: v_mov_b32_e32 v8, s24718; SI-NEXT: v_mov_b32_e32 v9, s25719; SI-NEXT: v_mov_b32_e32 v10, s26720; SI-NEXT: v_mov_b32_e32 v11, s27721; SI-NEXT: s_setpc_b64 s[30:31]722; SI-NEXT: .LBB5_4:723; SI-NEXT: s_branch .LBB5_2724;725; VI-LABEL: bitcast_v12i32_to_v6f64_scalar:726; VI: ; %bb.0:727; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)728; VI-NEXT: s_cmp_lg_u32 s28, 0729; VI-NEXT: s_cbranch_scc0 .LBB5_4730; VI-NEXT: ; %bb.1: ; %cmp.false731; VI-NEXT: s_cbranch_execnz .LBB5_3732; VI-NEXT: .LBB5_2: ; %cmp.true733; VI-NEXT: s_add_i32 s27, s27, 3734; VI-NEXT: s_add_i32 s26, s26, 3735; VI-NEXT: s_add_i32 s25, s25, 3736; VI-NEXT: s_add_i32 s24, s24, 3737; VI-NEXT: s_add_i32 s23, s23, 3738; VI-NEXT: s_add_i32 s22, s22, 3739; VI-NEXT: s_add_i32 s21, s21, 3740; VI-NEXT: s_add_i32 s20, s20, 3741; VI-NEXT: s_add_i32 s19, s19, 3742; VI-NEXT: s_add_i32 s18, s18, 3743; VI-NEXT: s_add_i32 s17, s17, 3744; VI-NEXT: s_add_i32 s16, s16, 3745; VI-NEXT: .LBB5_3: ; %end746; VI-NEXT: v_mov_b32_e32 v0, s16747; VI-NEXT: v_mov_b32_e32 v1, s17748; VI-NEXT: v_mov_b32_e32 v2, s18749; VI-NEXT: v_mov_b32_e32 v3, s19750; VI-NEXT: v_mov_b32_e32 v4, s20751; VI-NEXT: v_mov_b32_e32 v5, s21752; VI-NEXT: v_mov_b32_e32 v6, s22753; VI-NEXT: v_mov_b32_e32 v7, s23754; VI-NEXT: v_mov_b32_e32 v8, s24755; VI-NEXT: v_mov_b32_e32 v9, s25756; VI-NEXT: v_mov_b32_e32 v10, s26757; VI-NEXT: v_mov_b32_e32 v11, s27758; VI-NEXT: s_setpc_b64 s[30:31]759; VI-NEXT: .LBB5_4:760; VI-NEXT: s_branch .LBB5_2761;762; GFX9-LABEL: bitcast_v12i32_to_v6f64_scalar:763; GFX9: ; %bb.0:764; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)765; GFX9-NEXT: s_cmp_lg_u32 s28, 0766; GFX9-NEXT: s_cbranch_scc0 .LBB5_4767; GFX9-NEXT: ; %bb.1: ; %cmp.false768; GFX9-NEXT: s_cbranch_execnz .LBB5_3769; GFX9-NEXT: .LBB5_2: ; %cmp.true770; GFX9-NEXT: s_add_i32 s27, s27, 3771; GFX9-NEXT: s_add_i32 s26, s26, 3772; GFX9-NEXT: s_add_i32 s25, s25, 3773; GFX9-NEXT: s_add_i32 s24, s24, 3774; GFX9-NEXT: s_add_i32 s23, s23, 3775; GFX9-NEXT: s_add_i32 s22, s22, 3776; GFX9-NEXT: s_add_i32 s21, s21, 3777; GFX9-NEXT: s_add_i32 s20, s20, 3778; GFX9-NEXT: s_add_i32 s19, s19, 3779; GFX9-NEXT: s_add_i32 s18, s18, 3780; GFX9-NEXT: s_add_i32 s17, s17, 3781; GFX9-NEXT: s_add_i32 s16, s16, 3782; GFX9-NEXT: .LBB5_3: ; %end783; GFX9-NEXT: v_mov_b32_e32 v0, s16784; GFX9-NEXT: v_mov_b32_e32 v1, s17785; GFX9-NEXT: v_mov_b32_e32 v2, s18786; GFX9-NEXT: v_mov_b32_e32 v3, s19787; GFX9-NEXT: v_mov_b32_e32 v4, s20788; GFX9-NEXT: v_mov_b32_e32 v5, s21789; GFX9-NEXT: v_mov_b32_e32 v6, s22790; GFX9-NEXT: v_mov_b32_e32 v7, s23791; GFX9-NEXT: v_mov_b32_e32 v8, s24792; GFX9-NEXT: v_mov_b32_e32 v9, s25793; GFX9-NEXT: v_mov_b32_e32 v10, s26794; GFX9-NEXT: v_mov_b32_e32 v11, s27795; GFX9-NEXT: s_setpc_b64 s[30:31]796; GFX9-NEXT: .LBB5_4:797; GFX9-NEXT: s_branch .LBB5_2798;799; GFX11-LABEL: bitcast_v12i32_to_v6f64_scalar:800; GFX11: ; %bb.0:801; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)802; GFX11-NEXT: s_cmp_lg_u32 s24, 0803; GFX11-NEXT: s_mov_b32 s4, 0804; GFX11-NEXT: s_cbranch_scc0 .LBB5_4805; GFX11-NEXT: ; %bb.1: ; %Flow806; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s4807; GFX11-NEXT: s_cbranch_vccnz .LBB5_3808; GFX11-NEXT: .LBB5_2: ; %cmp.true809; GFX11-NEXT: s_add_i32 s23, s23, 3810; GFX11-NEXT: s_add_i32 s22, s22, 3811; GFX11-NEXT: s_add_i32 s21, s21, 3812; GFX11-NEXT: s_add_i32 s20, s20, 3813; GFX11-NEXT: s_add_i32 s19, s19, 3814; GFX11-NEXT: s_add_i32 s18, s18, 3815; GFX11-NEXT: s_add_i32 s17, s17, 3816; GFX11-NEXT: s_add_i32 s16, s16, 3817; GFX11-NEXT: s_add_i32 s3, s3, 3818; GFX11-NEXT: s_add_i32 s2, s2, 3819; GFX11-NEXT: s_add_i32 s1, s1, 3820; GFX11-NEXT: s_add_i32 s0, s0, 3821; GFX11-NEXT: .LBB5_3: ; %end822; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)823; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1824; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3825; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17826; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19827; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21828; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23829; GFX11-NEXT: s_setpc_b64 s[30:31]830; GFX11-NEXT: .LBB5_4:831; GFX11-NEXT: s_branch .LBB5_2832 %cmp = icmp eq i32 %b, 0833 br i1 %cmp, label %cmp.true, label %cmp.false834 835cmp.true:836 %a1 = add <12 x i32> %a, splat (i32 3)837 %a2 = bitcast <12 x i32> %a1 to <6 x double>838 br label %end839 840cmp.false:841 %a3 = bitcast <12 x i32> %a to <6 x double>842 br label %end843 844end:845 %phi = phi <6 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]846 ret <6 x double> %phi847}848 849define <12 x i32> @bitcast_v6f64_to_v12i32(<6 x double> %a, i32 %b) {850; SI-LABEL: bitcast_v6f64_to_v12i32:851; SI: ; %bb.0:852; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)853; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12854; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc855; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]856; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]857; SI-NEXT: s_cbranch_execz .LBB6_2858; SI-NEXT: ; %bb.1: ; %cmp.true859; SI-NEXT: v_add_f64 v[10:11], v[10:11], 1.0860; SI-NEXT: v_add_f64 v[8:9], v[8:9], 1.0861; SI-NEXT: v_add_f64 v[6:7], v[6:7], 1.0862; SI-NEXT: v_add_f64 v[4:5], v[4:5], 1.0863; SI-NEXT: v_add_f64 v[2:3], v[2:3], 1.0864; SI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0865; SI-NEXT: .LBB6_2: ; %end866; SI-NEXT: s_or_b64 exec, exec, s[4:5]867; SI-NEXT: s_setpc_b64 s[30:31]868;869; VI-LABEL: bitcast_v6f64_to_v12i32:870; VI: ; %bb.0:871; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)872; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12873; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc874; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]875; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]876; VI-NEXT: s_cbranch_execz .LBB6_2877; VI-NEXT: ; %bb.1: ; %cmp.true878; VI-NEXT: v_add_f64 v[10:11], v[10:11], 1.0879; VI-NEXT: v_add_f64 v[8:9], v[8:9], 1.0880; VI-NEXT: v_add_f64 v[6:7], v[6:7], 1.0881; VI-NEXT: v_add_f64 v[4:5], v[4:5], 1.0882; VI-NEXT: v_add_f64 v[2:3], v[2:3], 1.0883; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0884; VI-NEXT: .LBB6_2: ; %end885; VI-NEXT: s_or_b64 exec, exec, s[4:5]886; VI-NEXT: s_setpc_b64 s[30:31]887;888; GFX9-LABEL: bitcast_v6f64_to_v12i32:889; GFX9: ; %bb.0:890; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)891; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12892; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc893; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]894; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]895; GFX9-NEXT: s_cbranch_execz .LBB6_2896; GFX9-NEXT: ; %bb.1: ; %cmp.true897; GFX9-NEXT: v_add_f64 v[10:11], v[10:11], 1.0898; GFX9-NEXT: v_add_f64 v[8:9], v[8:9], 1.0899; GFX9-NEXT: v_add_f64 v[6:7], v[6:7], 1.0900; GFX9-NEXT: v_add_f64 v[4:5], v[4:5], 1.0901; GFX9-NEXT: v_add_f64 v[2:3], v[2:3], 1.0902; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.0903; GFX9-NEXT: .LBB6_2: ; %end904; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]905; GFX9-NEXT: s_setpc_b64 s[30:31]906;907; GFX11-LABEL: bitcast_v6f64_to_v12i32:908; GFX11: ; %bb.0:909; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)910; GFX11-NEXT: s_mov_b32 s0, exec_lo911; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v12912; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0913; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)914; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0915; GFX11-NEXT: s_cbranch_execz .LBB6_2916; GFX11-NEXT: ; %bb.1: ; %cmp.true917; GFX11-NEXT: v_add_f64 v[10:11], v[10:11], 1.0918; GFX11-NEXT: v_add_f64 v[8:9], v[8:9], 1.0919; GFX11-NEXT: v_add_f64 v[6:7], v[6:7], 1.0920; GFX11-NEXT: v_add_f64 v[4:5], v[4:5], 1.0921; GFX11-NEXT: v_add_f64 v[2:3], v[2:3], 1.0922; GFX11-NEXT: v_add_f64 v[0:1], v[0:1], 1.0923; GFX11-NEXT: .LBB6_2: ; %end924; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0925; GFX11-NEXT: s_setpc_b64 s[30:31]926 %cmp = icmp eq i32 %b, 0927 br i1 %cmp, label %cmp.true, label %cmp.false928 929cmp.true:930 %a1 = fadd <6 x double> %a, splat (double 1.000000e+00)931 %a2 = bitcast <6 x double> %a1 to <12 x i32>932 br label %end933 934cmp.false:935 %a3 = bitcast <6 x double> %a to <12 x i32>936 br label %end937 938end:939 %phi = phi <12 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]940 ret <12 x i32> %phi941}942 943define inreg <12 x i32> @bitcast_v6f64_to_v12i32_scalar(<6 x double> inreg %a, i32 inreg %b) {944; SI-LABEL: bitcast_v6f64_to_v12i32_scalar:945; SI: ; %bb.0:946; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)947; SI-NEXT: s_cmp_lg_u32 s28, 0948; SI-NEXT: s_cbranch_scc0 .LBB7_3949; SI-NEXT: ; %bb.1: ; %cmp.false950; SI-NEXT: s_cbranch_execnz .LBB7_4951; SI-NEXT: .LBB7_2: ; %cmp.true952; SI-NEXT: v_add_f64 v[10:11], s[26:27], 1.0953; SI-NEXT: v_add_f64 v[8:9], s[24:25], 1.0954; SI-NEXT: v_add_f64 v[6:7], s[22:23], 1.0955; SI-NEXT: v_add_f64 v[4:5], s[20:21], 1.0956; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0957; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0958; SI-NEXT: s_setpc_b64 s[30:31]959; SI-NEXT: .LBB7_3:960; SI-NEXT: s_branch .LBB7_2961; SI-NEXT: .LBB7_4:962; SI-NEXT: v_mov_b32_e32 v0, s16963; SI-NEXT: v_mov_b32_e32 v1, s17964; SI-NEXT: v_mov_b32_e32 v2, s18965; SI-NEXT: v_mov_b32_e32 v3, s19966; SI-NEXT: v_mov_b32_e32 v4, s20967; SI-NEXT: v_mov_b32_e32 v5, s21968; SI-NEXT: v_mov_b32_e32 v6, s22969; SI-NEXT: v_mov_b32_e32 v7, s23970; SI-NEXT: v_mov_b32_e32 v8, s24971; SI-NEXT: v_mov_b32_e32 v9, s25972; SI-NEXT: v_mov_b32_e32 v10, s26973; SI-NEXT: v_mov_b32_e32 v11, s27974; SI-NEXT: s_setpc_b64 s[30:31]975;976; VI-LABEL: bitcast_v6f64_to_v12i32_scalar:977; VI: ; %bb.0:978; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)979; VI-NEXT: s_cmp_lg_u32 s28, 0980; VI-NEXT: s_cbranch_scc0 .LBB7_3981; VI-NEXT: ; %bb.1: ; %cmp.false982; VI-NEXT: s_cbranch_execnz .LBB7_4983; VI-NEXT: .LBB7_2: ; %cmp.true984; VI-NEXT: v_add_f64 v[10:11], s[26:27], 1.0985; VI-NEXT: v_add_f64 v[8:9], s[24:25], 1.0986; VI-NEXT: v_add_f64 v[6:7], s[22:23], 1.0987; VI-NEXT: v_add_f64 v[4:5], s[20:21], 1.0988; VI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0989; VI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0990; VI-NEXT: s_setpc_b64 s[30:31]991; VI-NEXT: .LBB7_3:992; VI-NEXT: s_branch .LBB7_2993; VI-NEXT: .LBB7_4:994; VI-NEXT: v_mov_b32_e32 v0, s16995; VI-NEXT: v_mov_b32_e32 v1, s17996; VI-NEXT: v_mov_b32_e32 v2, s18997; VI-NEXT: v_mov_b32_e32 v3, s19998; VI-NEXT: v_mov_b32_e32 v4, s20999; VI-NEXT: v_mov_b32_e32 v5, s211000; VI-NEXT: v_mov_b32_e32 v6, s221001; VI-NEXT: v_mov_b32_e32 v7, s231002; VI-NEXT: v_mov_b32_e32 v8, s241003; VI-NEXT: v_mov_b32_e32 v9, s251004; VI-NEXT: v_mov_b32_e32 v10, s261005; VI-NEXT: v_mov_b32_e32 v11, s271006; VI-NEXT: s_setpc_b64 s[30:31]1007;1008; GFX9-LABEL: bitcast_v6f64_to_v12i32_scalar:1009; GFX9: ; %bb.0:1010; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1011; GFX9-NEXT: s_cmp_lg_u32 s28, 01012; GFX9-NEXT: s_cbranch_scc0 .LBB7_31013; GFX9-NEXT: ; %bb.1: ; %cmp.false1014; GFX9-NEXT: s_cbranch_execnz .LBB7_41015; GFX9-NEXT: .LBB7_2: ; %cmp.true1016; GFX9-NEXT: v_add_f64 v[10:11], s[26:27], 1.01017; GFX9-NEXT: v_add_f64 v[8:9], s[24:25], 1.01018; GFX9-NEXT: v_add_f64 v[6:7], s[22:23], 1.01019; GFX9-NEXT: v_add_f64 v[4:5], s[20:21], 1.01020; GFX9-NEXT: v_add_f64 v[2:3], s[18:19], 1.01021; GFX9-NEXT: v_add_f64 v[0:1], s[16:17], 1.01022; GFX9-NEXT: s_setpc_b64 s[30:31]1023; GFX9-NEXT: .LBB7_3:1024; GFX9-NEXT: s_branch .LBB7_21025; GFX9-NEXT: .LBB7_4:1026; GFX9-NEXT: v_mov_b32_e32 v0, s161027; GFX9-NEXT: v_mov_b32_e32 v1, s171028; GFX9-NEXT: v_mov_b32_e32 v2, s181029; GFX9-NEXT: v_mov_b32_e32 v3, s191030; GFX9-NEXT: v_mov_b32_e32 v4, s201031; GFX9-NEXT: v_mov_b32_e32 v5, s211032; GFX9-NEXT: v_mov_b32_e32 v6, s221033; GFX9-NEXT: v_mov_b32_e32 v7, s231034; GFX9-NEXT: v_mov_b32_e32 v8, s241035; GFX9-NEXT: v_mov_b32_e32 v9, s251036; GFX9-NEXT: v_mov_b32_e32 v10, s261037; GFX9-NEXT: v_mov_b32_e32 v11, s271038; GFX9-NEXT: s_setpc_b64 s[30:31]1039;1040; GFX11-LABEL: bitcast_v6f64_to_v12i32_scalar:1041; GFX11: ; %bb.0:1042; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1043; GFX11-NEXT: s_mov_b32 s15, s31044; GFX11-NEXT: s_mov_b32 s14, s21045; GFX11-NEXT: s_mov_b32 s13, s11046; GFX11-NEXT: s_mov_b32 s12, s01047; GFX11-NEXT: s_cmp_lg_u32 s24, 01048; GFX11-NEXT: s_mov_b32 s0, 01049; GFX11-NEXT: s_cbranch_scc0 .LBB7_31050; GFX11-NEXT: ; %bb.1: ; %Flow1051; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s01052; GFX11-NEXT: s_cbranch_vccnz .LBB7_41053; GFX11-NEXT: .LBB7_2: ; %cmp.true1054; GFX11-NEXT: v_add_f64 v[10:11], s[22:23], 1.01055; GFX11-NEXT: v_add_f64 v[8:9], s[20:21], 1.01056; GFX11-NEXT: v_add_f64 v[6:7], s[18:19], 1.01057; GFX11-NEXT: v_add_f64 v[4:5], s[16:17], 1.01058; GFX11-NEXT: v_add_f64 v[2:3], s[14:15], 1.01059; GFX11-NEXT: v_add_f64 v[0:1], s[12:13], 1.01060; GFX11-NEXT: s_setpc_b64 s[30:31]1061; GFX11-NEXT: .LBB7_3:1062; GFX11-NEXT: s_branch .LBB7_21063; GFX11-NEXT: .LBB7_4:1064; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s131065; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s151066; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s171067; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s191068; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s211069; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s231070; GFX11-NEXT: s_setpc_b64 s[30:31]1071 %cmp = icmp eq i32 %b, 01072 br i1 %cmp, label %cmp.true, label %cmp.false1073 1074cmp.true:1075 %a1 = fadd <6 x double> %a, splat (double 1.000000e+00)1076 %a2 = bitcast <6 x double> %a1 to <12 x i32>1077 br label %end1078 1079cmp.false:1080 %a3 = bitcast <6 x double> %a to <12 x i32>1081 br label %end1082 1083end:1084 %phi = phi <12 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]1085 ret <12 x i32> %phi1086}1087 1088define <6 x i64> @bitcast_v12i32_to_v6i64(<12 x i32> %a, i32 %b) {1089; SI-LABEL: bitcast_v12i32_to_v6i64:1090; SI: ; %bb.0:1091; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1092; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v121093; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc1094; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1095; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1096; SI-NEXT: s_cbranch_execz .LBB8_21097; SI-NEXT: ; %bb.1: ; %cmp.true1098; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v111099; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v101100; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v91101; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v81102; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v71103; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v61104; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v51105; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v41106; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v31107; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v21108; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v11109; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v01110; SI-NEXT: .LBB8_2: ; %end1111; SI-NEXT: s_or_b64 exec, exec, s[4:5]1112; SI-NEXT: s_setpc_b64 s[30:31]1113;1114; VI-LABEL: bitcast_v12i32_to_v6i64:1115; VI: ; %bb.0:1116; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1117; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v121118; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc1119; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1120; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1121; VI-NEXT: s_cbranch_execz .LBB8_21122; VI-NEXT: ; %bb.1: ; %cmp.true1123; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v111124; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v101125; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v91126; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v81127; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v71128; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v61129; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v51130; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v41131; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v31132; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v21133; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v11134; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v01135; VI-NEXT: .LBB8_2: ; %end1136; VI-NEXT: s_or_b64 exec, exec, s[4:5]1137; VI-NEXT: s_setpc_b64 s[30:31]1138;1139; GFX9-LABEL: bitcast_v12i32_to_v6i64:1140; GFX9: ; %bb.0:1141; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1142; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v121143; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc1144; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1145; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1146; GFX9-NEXT: s_cbranch_execz .LBB8_21147; GFX9-NEXT: ; %bb.1: ; %cmp.true1148; GFX9-NEXT: v_add_u32_e32 v11, 3, v111149; GFX9-NEXT: v_add_u32_e32 v10, 3, v101150; GFX9-NEXT: v_add_u32_e32 v9, 3, v91151; GFX9-NEXT: v_add_u32_e32 v8, 3, v81152; GFX9-NEXT: v_add_u32_e32 v7, 3, v71153; GFX9-NEXT: v_add_u32_e32 v6, 3, v61154; GFX9-NEXT: v_add_u32_e32 v5, 3, v51155; GFX9-NEXT: v_add_u32_e32 v4, 3, v41156; GFX9-NEXT: v_add_u32_e32 v3, 3, v31157; GFX9-NEXT: v_add_u32_e32 v2, 3, v21158; GFX9-NEXT: v_add_u32_e32 v1, 3, v11159; GFX9-NEXT: v_add_u32_e32 v0, 3, v01160; GFX9-NEXT: .LBB8_2: ; %end1161; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]1162; GFX9-NEXT: s_setpc_b64 s[30:31]1163;1164; GFX11-LABEL: bitcast_v12i32_to_v6i64:1165; GFX11: ; %bb.0:1166; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1167; GFX11-NEXT: s_mov_b32 s0, exec_lo1168; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v121169; GFX11-NEXT: s_xor_b32 s0, exec_lo, s01170; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1171; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s01172; GFX11-NEXT: s_cbranch_execz .LBB8_21173; GFX11-NEXT: ; %bb.1: ; %cmp.true1174; GFX11-NEXT: v_add_nc_u32_e32 v11, 3, v111175; GFX11-NEXT: v_add_nc_u32_e32 v10, 3, v101176; GFX11-NEXT: v_add_nc_u32_e32 v9, 3, v91177; GFX11-NEXT: v_add_nc_u32_e32 v8, 3, v81178; GFX11-NEXT: v_add_nc_u32_e32 v7, 3, v71179; GFX11-NEXT: v_add_nc_u32_e32 v6, 3, v61180; GFX11-NEXT: v_add_nc_u32_e32 v5, 3, v51181; GFX11-NEXT: v_add_nc_u32_e32 v4, 3, v41182; GFX11-NEXT: v_add_nc_u32_e32 v3, 3, v31183; GFX11-NEXT: v_add_nc_u32_e32 v2, 3, v21184; GFX11-NEXT: v_add_nc_u32_e32 v1, 3, v11185; GFX11-NEXT: v_add_nc_u32_e32 v0, 3, v01186; GFX11-NEXT: .LBB8_2: ; %end1187; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s01188; GFX11-NEXT: s_setpc_b64 s[30:31]1189 %cmp = icmp eq i32 %b, 01190 br i1 %cmp, label %cmp.true, label %cmp.false1191 1192cmp.true:1193 %a1 = add <12 x i32> %a, splat (i32 3)1194 %a2 = bitcast <12 x i32> %a1 to <6 x i64>1195 br label %end1196 1197cmp.false:1198 %a3 = bitcast <12 x i32> %a to <6 x i64>1199 br label %end1200 1201end:1202 %phi = phi <6 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]1203 ret <6 x i64> %phi1204}1205 1206define inreg <6 x i64> @bitcast_v12i32_to_v6i64_scalar(<12 x i32> inreg %a, i32 inreg %b) {1207; SI-LABEL: bitcast_v12i32_to_v6i64_scalar:1208; SI: ; %bb.0:1209; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1210; SI-NEXT: s_cmp_lg_u32 s28, 01211; SI-NEXT: s_cbranch_scc0 .LBB9_41212; SI-NEXT: ; %bb.1: ; %cmp.false1213; SI-NEXT: s_cbranch_execnz .LBB9_31214; SI-NEXT: .LBB9_2: ; %cmp.true1215; SI-NEXT: s_add_i32 s27, s27, 31216; SI-NEXT: s_add_i32 s26, s26, 31217; SI-NEXT: s_add_i32 s25, s25, 31218; SI-NEXT: s_add_i32 s24, s24, 31219; SI-NEXT: s_add_i32 s23, s23, 31220; SI-NEXT: s_add_i32 s22, s22, 31221; SI-NEXT: s_add_i32 s21, s21, 31222; SI-NEXT: s_add_i32 s20, s20, 31223; SI-NEXT: s_add_i32 s19, s19, 31224; SI-NEXT: s_add_i32 s18, s18, 31225; SI-NEXT: s_add_i32 s17, s17, 31226; SI-NEXT: s_add_i32 s16, s16, 31227; SI-NEXT: .LBB9_3: ; %end1228; SI-NEXT: v_mov_b32_e32 v0, s161229; SI-NEXT: v_mov_b32_e32 v1, s171230; SI-NEXT: v_mov_b32_e32 v2, s181231; SI-NEXT: v_mov_b32_e32 v3, s191232; SI-NEXT: v_mov_b32_e32 v4, s201233; SI-NEXT: v_mov_b32_e32 v5, s211234; SI-NEXT: v_mov_b32_e32 v6, s221235; SI-NEXT: v_mov_b32_e32 v7, s231236; SI-NEXT: v_mov_b32_e32 v8, s241237; SI-NEXT: v_mov_b32_e32 v9, s251238; SI-NEXT: v_mov_b32_e32 v10, s261239; SI-NEXT: v_mov_b32_e32 v11, s271240; SI-NEXT: s_setpc_b64 s[30:31]1241; SI-NEXT: .LBB9_4:1242; SI-NEXT: s_branch .LBB9_21243;1244; VI-LABEL: bitcast_v12i32_to_v6i64_scalar:1245; VI: ; %bb.0:1246; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1247; VI-NEXT: s_cmp_lg_u32 s28, 01248; VI-NEXT: s_cbranch_scc0 .LBB9_41249; VI-NEXT: ; %bb.1: ; %cmp.false1250; VI-NEXT: s_cbranch_execnz .LBB9_31251; VI-NEXT: .LBB9_2: ; %cmp.true1252; VI-NEXT: s_add_i32 s27, s27, 31253; VI-NEXT: s_add_i32 s26, s26, 31254; VI-NEXT: s_add_i32 s25, s25, 31255; VI-NEXT: s_add_i32 s24, s24, 31256; VI-NEXT: s_add_i32 s23, s23, 31257; VI-NEXT: s_add_i32 s22, s22, 31258; VI-NEXT: s_add_i32 s21, s21, 31259; VI-NEXT: s_add_i32 s20, s20, 31260; VI-NEXT: s_add_i32 s19, s19, 31261; VI-NEXT: s_add_i32 s18, s18, 31262; VI-NEXT: s_add_i32 s17, s17, 31263; VI-NEXT: s_add_i32 s16, s16, 31264; VI-NEXT: .LBB9_3: ; %end1265; VI-NEXT: v_mov_b32_e32 v0, s161266; VI-NEXT: v_mov_b32_e32 v1, s171267; VI-NEXT: v_mov_b32_e32 v2, s181268; VI-NEXT: v_mov_b32_e32 v3, s191269; VI-NEXT: v_mov_b32_e32 v4, s201270; VI-NEXT: v_mov_b32_e32 v5, s211271; VI-NEXT: v_mov_b32_e32 v6, s221272; VI-NEXT: v_mov_b32_e32 v7, s231273; VI-NEXT: v_mov_b32_e32 v8, s241274; VI-NEXT: v_mov_b32_e32 v9, s251275; VI-NEXT: v_mov_b32_e32 v10, s261276; VI-NEXT: v_mov_b32_e32 v11, s271277; VI-NEXT: s_setpc_b64 s[30:31]1278; VI-NEXT: .LBB9_4:1279; VI-NEXT: s_branch .LBB9_21280;1281; GFX9-LABEL: bitcast_v12i32_to_v6i64_scalar:1282; GFX9: ; %bb.0:1283; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1284; GFX9-NEXT: s_cmp_lg_u32 s28, 01285; GFX9-NEXT: s_cbranch_scc0 .LBB9_41286; GFX9-NEXT: ; %bb.1: ; %cmp.false1287; GFX9-NEXT: s_cbranch_execnz .LBB9_31288; GFX9-NEXT: .LBB9_2: ; %cmp.true1289; GFX9-NEXT: s_add_i32 s27, s27, 31290; GFX9-NEXT: s_add_i32 s26, s26, 31291; GFX9-NEXT: s_add_i32 s25, s25, 31292; GFX9-NEXT: s_add_i32 s24, s24, 31293; GFX9-NEXT: s_add_i32 s23, s23, 31294; GFX9-NEXT: s_add_i32 s22, s22, 31295; GFX9-NEXT: s_add_i32 s21, s21, 31296; GFX9-NEXT: s_add_i32 s20, s20, 31297; GFX9-NEXT: s_add_i32 s19, s19, 31298; GFX9-NEXT: s_add_i32 s18, s18, 31299; GFX9-NEXT: s_add_i32 s17, s17, 31300; GFX9-NEXT: s_add_i32 s16, s16, 31301; GFX9-NEXT: .LBB9_3: ; %end1302; GFX9-NEXT: v_mov_b32_e32 v0, s161303; GFX9-NEXT: v_mov_b32_e32 v1, s171304; GFX9-NEXT: v_mov_b32_e32 v2, s181305; GFX9-NEXT: v_mov_b32_e32 v3, s191306; GFX9-NEXT: v_mov_b32_e32 v4, s201307; GFX9-NEXT: v_mov_b32_e32 v5, s211308; GFX9-NEXT: v_mov_b32_e32 v6, s221309; GFX9-NEXT: v_mov_b32_e32 v7, s231310; GFX9-NEXT: v_mov_b32_e32 v8, s241311; GFX9-NEXT: v_mov_b32_e32 v9, s251312; GFX9-NEXT: v_mov_b32_e32 v10, s261313; GFX9-NEXT: v_mov_b32_e32 v11, s271314; GFX9-NEXT: s_setpc_b64 s[30:31]1315; GFX9-NEXT: .LBB9_4:1316; GFX9-NEXT: s_branch .LBB9_21317;1318; GFX11-LABEL: bitcast_v12i32_to_v6i64_scalar:1319; GFX11: ; %bb.0:1320; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1321; GFX11-NEXT: s_cmp_lg_u32 s24, 01322; GFX11-NEXT: s_mov_b32 s4, 01323; GFX11-NEXT: s_cbranch_scc0 .LBB9_41324; GFX11-NEXT: ; %bb.1: ; %Flow1325; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s41326; GFX11-NEXT: s_cbranch_vccnz .LBB9_31327; GFX11-NEXT: .LBB9_2: ; %cmp.true1328; GFX11-NEXT: s_add_i32 s23, s23, 31329; GFX11-NEXT: s_add_i32 s22, s22, 31330; GFX11-NEXT: s_add_i32 s21, s21, 31331; GFX11-NEXT: s_add_i32 s20, s20, 31332; GFX11-NEXT: s_add_i32 s19, s19, 31333; GFX11-NEXT: s_add_i32 s18, s18, 31334; GFX11-NEXT: s_add_i32 s17, s17, 31335; GFX11-NEXT: s_add_i32 s16, s16, 31336; GFX11-NEXT: s_add_i32 s3, s3, 31337; GFX11-NEXT: s_add_i32 s2, s2, 31338; GFX11-NEXT: s_add_i32 s1, s1, 31339; GFX11-NEXT: s_add_i32 s0, s0, 31340; GFX11-NEXT: .LBB9_3: ; %end1341; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1342; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s11343; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s31344; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s171345; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s191346; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s211347; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s231348; GFX11-NEXT: s_setpc_b64 s[30:31]1349; GFX11-NEXT: .LBB9_4:1350; GFX11-NEXT: s_branch .LBB9_21351 %cmp = icmp eq i32 %b, 01352 br i1 %cmp, label %cmp.true, label %cmp.false1353 1354cmp.true:1355 %a1 = add <12 x i32> %a, splat (i32 3)1356 %a2 = bitcast <12 x i32> %a1 to <6 x i64>1357 br label %end1358 1359cmp.false:1360 %a3 = bitcast <12 x i32> %a to <6 x i64>1361 br label %end1362 1363end:1364 %phi = phi <6 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]1365 ret <6 x i64> %phi1366}1367 1368define <12 x i32> @bitcast_v6i64_to_v12i32(<6 x i64> %a, i32 %b) {1369; SI-LABEL: bitcast_v6i64_to_v12i32:1370; SI: ; %bb.0:1371; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1372; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v121373; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc1374; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1375; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1376; SI-NEXT: s_cbranch_execz .LBB10_21377; SI-NEXT: ; %bb.1: ; %cmp.true1378; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v101379; SI-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc1380; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v81381; SI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc1382; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v61383; SI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc1384; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v41385; SI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc1386; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v21387; SI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc1388; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v01389; SI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1390; SI-NEXT: .LBB10_2: ; %end1391; SI-NEXT: s_or_b64 exec, exec, s[4:5]1392; SI-NEXT: s_setpc_b64 s[30:31]1393;1394; VI-LABEL: bitcast_v6i64_to_v12i32:1395; VI: ; %bb.0:1396; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1397; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v121398; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc1399; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1400; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1401; VI-NEXT: s_cbranch_execz .LBB10_21402; VI-NEXT: ; %bb.1: ; %cmp.true1403; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v101404; VI-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc1405; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v81406; VI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc1407; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v61408; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc1409; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v41410; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc1411; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v21412; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc1413; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v01414; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1415; VI-NEXT: .LBB10_2: ; %end1416; VI-NEXT: s_or_b64 exec, exec, s[4:5]1417; VI-NEXT: s_setpc_b64 s[30:31]1418;1419; GFX9-LABEL: bitcast_v6i64_to_v12i32:1420; GFX9: ; %bb.0:1421; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1422; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v121423; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc1424; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1425; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1426; GFX9-NEXT: s_cbranch_execz .LBB10_21427; GFX9-NEXT: ; %bb.1: ; %cmp.true1428; GFX9-NEXT: v_add_co_u32_e32 v10, vcc, 3, v101429; GFX9-NEXT: v_addc_co_u32_e32 v11, vcc, 0, v11, vcc1430; GFX9-NEXT: v_add_co_u32_e32 v8, vcc, 3, v81431; GFX9-NEXT: v_addc_co_u32_e32 v9, vcc, 0, v9, vcc1432; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, 3, v61433; GFX9-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v7, vcc1434; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, 3, v41435; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc1436; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, 3, v21437; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc1438; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 3, v01439; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc1440; GFX9-NEXT: .LBB10_2: ; %end1441; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]1442; GFX9-NEXT: s_setpc_b64 s[30:31]1443;1444; GFX11-LABEL: bitcast_v6i64_to_v12i32:1445; GFX11: ; %bb.0:1446; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1447; GFX11-NEXT: s_mov_b32 s0, exec_lo1448; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v121449; GFX11-NEXT: s_xor_b32 s0, exec_lo, s01450; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1451; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s01452; GFX11-NEXT: s_cbranch_execz .LBB10_21453; GFX11-NEXT: ; %bb.1: ; %cmp.true1454; GFX11-NEXT: v_add_co_u32 v10, vcc_lo, v10, 31455; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1456; GFX11-NEXT: v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo1457; GFX11-NEXT: v_add_co_u32 v8, vcc_lo, v8, 31458; GFX11-NEXT: v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo1459; GFX11-NEXT: v_add_co_u32 v6, vcc_lo, v6, 31460; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1461; GFX11-NEXT: v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo1462; GFX11-NEXT: v_add_co_u32 v4, vcc_lo, v4, 31463; GFX11-NEXT: v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo1464; GFX11-NEXT: v_add_co_u32 v2, vcc_lo, v2, 31465; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1466; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo1467; GFX11-NEXT: v_add_co_u32 v0, vcc_lo, v0, 31468; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo1469; GFX11-NEXT: .LBB10_2: ; %end1470; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s01471; GFX11-NEXT: s_setpc_b64 s[30:31]1472 %cmp = icmp eq i32 %b, 01473 br i1 %cmp, label %cmp.true, label %cmp.false1474 1475cmp.true:1476 %a1 = add <6 x i64> %a, splat (i64 3)1477 %a2 = bitcast <6 x i64> %a1 to <12 x i32>1478 br label %end1479 1480cmp.false:1481 %a3 = bitcast <6 x i64> %a to <12 x i32>1482 br label %end1483 1484end:1485 %phi = phi <12 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]1486 ret <12 x i32> %phi1487}1488 1489define inreg <12 x i32> @bitcast_v6i64_to_v12i32_scalar(<6 x i64> inreg %a, i32 inreg %b) {1490; SI-LABEL: bitcast_v6i64_to_v12i32_scalar:1491; SI: ; %bb.0:1492; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1493; SI-NEXT: s_cmp_lg_u32 s28, 01494; SI-NEXT: s_cbranch_scc0 .LBB11_41495; SI-NEXT: ; %bb.1: ; %cmp.false1496; SI-NEXT: s_cbranch_execnz .LBB11_31497; SI-NEXT: .LBB11_2: ; %cmp.true1498; SI-NEXT: s_add_u32 s26, s26, 31499; SI-NEXT: s_addc_u32 s27, s27, 01500; SI-NEXT: s_add_u32 s24, s24, 31501; SI-NEXT: s_addc_u32 s25, s25, 01502; SI-NEXT: s_add_u32 s22, s22, 31503; SI-NEXT: s_addc_u32 s23, s23, 01504; SI-NEXT: s_add_u32 s20, s20, 31505; SI-NEXT: s_addc_u32 s21, s21, 01506; SI-NEXT: s_add_u32 s18, s18, 31507; SI-NEXT: s_addc_u32 s19, s19, 01508; SI-NEXT: s_add_u32 s16, s16, 31509; SI-NEXT: s_addc_u32 s17, s17, 01510; SI-NEXT: .LBB11_3: ; %end1511; SI-NEXT: v_mov_b32_e32 v0, s161512; SI-NEXT: v_mov_b32_e32 v1, s171513; SI-NEXT: v_mov_b32_e32 v2, s181514; SI-NEXT: v_mov_b32_e32 v3, s191515; SI-NEXT: v_mov_b32_e32 v4, s201516; SI-NEXT: v_mov_b32_e32 v5, s211517; SI-NEXT: v_mov_b32_e32 v6, s221518; SI-NEXT: v_mov_b32_e32 v7, s231519; SI-NEXT: v_mov_b32_e32 v8, s241520; SI-NEXT: v_mov_b32_e32 v9, s251521; SI-NEXT: v_mov_b32_e32 v10, s261522; SI-NEXT: v_mov_b32_e32 v11, s271523; SI-NEXT: s_setpc_b64 s[30:31]1524; SI-NEXT: .LBB11_4:1525; SI-NEXT: s_branch .LBB11_21526;1527; VI-LABEL: bitcast_v6i64_to_v12i32_scalar:1528; VI: ; %bb.0:1529; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1530; VI-NEXT: s_cmp_lg_u32 s28, 01531; VI-NEXT: s_cbranch_scc0 .LBB11_41532; VI-NEXT: ; %bb.1: ; %cmp.false1533; VI-NEXT: s_cbranch_execnz .LBB11_31534; VI-NEXT: .LBB11_2: ; %cmp.true1535; VI-NEXT: s_add_u32 s26, s26, 31536; VI-NEXT: s_addc_u32 s27, s27, 01537; VI-NEXT: s_add_u32 s24, s24, 31538; VI-NEXT: s_addc_u32 s25, s25, 01539; VI-NEXT: s_add_u32 s22, s22, 31540; VI-NEXT: s_addc_u32 s23, s23, 01541; VI-NEXT: s_add_u32 s20, s20, 31542; VI-NEXT: s_addc_u32 s21, s21, 01543; VI-NEXT: s_add_u32 s18, s18, 31544; VI-NEXT: s_addc_u32 s19, s19, 01545; VI-NEXT: s_add_u32 s16, s16, 31546; VI-NEXT: s_addc_u32 s17, s17, 01547; VI-NEXT: .LBB11_3: ; %end1548; VI-NEXT: v_mov_b32_e32 v0, s161549; VI-NEXT: v_mov_b32_e32 v1, s171550; VI-NEXT: v_mov_b32_e32 v2, s181551; VI-NEXT: v_mov_b32_e32 v3, s191552; VI-NEXT: v_mov_b32_e32 v4, s201553; VI-NEXT: v_mov_b32_e32 v5, s211554; VI-NEXT: v_mov_b32_e32 v6, s221555; VI-NEXT: v_mov_b32_e32 v7, s231556; VI-NEXT: v_mov_b32_e32 v8, s241557; VI-NEXT: v_mov_b32_e32 v9, s251558; VI-NEXT: v_mov_b32_e32 v10, s261559; VI-NEXT: v_mov_b32_e32 v11, s271560; VI-NEXT: s_setpc_b64 s[30:31]1561; VI-NEXT: .LBB11_4:1562; VI-NEXT: s_branch .LBB11_21563;1564; GFX9-LABEL: bitcast_v6i64_to_v12i32_scalar:1565; GFX9: ; %bb.0:1566; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1567; GFX9-NEXT: s_cmp_lg_u32 s28, 01568; GFX9-NEXT: s_cbranch_scc0 .LBB11_41569; GFX9-NEXT: ; %bb.1: ; %cmp.false1570; GFX9-NEXT: s_cbranch_execnz .LBB11_31571; GFX9-NEXT: .LBB11_2: ; %cmp.true1572; GFX9-NEXT: s_add_u32 s26, s26, 31573; GFX9-NEXT: s_addc_u32 s27, s27, 01574; GFX9-NEXT: s_add_u32 s24, s24, 31575; GFX9-NEXT: s_addc_u32 s25, s25, 01576; GFX9-NEXT: s_add_u32 s22, s22, 31577; GFX9-NEXT: s_addc_u32 s23, s23, 01578; GFX9-NEXT: s_add_u32 s20, s20, 31579; GFX9-NEXT: s_addc_u32 s21, s21, 01580; GFX9-NEXT: s_add_u32 s18, s18, 31581; GFX9-NEXT: s_addc_u32 s19, s19, 01582; GFX9-NEXT: s_add_u32 s16, s16, 31583; GFX9-NEXT: s_addc_u32 s17, s17, 01584; GFX9-NEXT: .LBB11_3: ; %end1585; GFX9-NEXT: v_mov_b32_e32 v0, s161586; GFX9-NEXT: v_mov_b32_e32 v1, s171587; GFX9-NEXT: v_mov_b32_e32 v2, s181588; GFX9-NEXT: v_mov_b32_e32 v3, s191589; GFX9-NEXT: v_mov_b32_e32 v4, s201590; GFX9-NEXT: v_mov_b32_e32 v5, s211591; GFX9-NEXT: v_mov_b32_e32 v6, s221592; GFX9-NEXT: v_mov_b32_e32 v7, s231593; GFX9-NEXT: v_mov_b32_e32 v8, s241594; GFX9-NEXT: v_mov_b32_e32 v9, s251595; GFX9-NEXT: v_mov_b32_e32 v10, s261596; GFX9-NEXT: v_mov_b32_e32 v11, s271597; GFX9-NEXT: s_setpc_b64 s[30:31]1598; GFX9-NEXT: .LBB11_4:1599; GFX9-NEXT: s_branch .LBB11_21600;1601; GFX11-LABEL: bitcast_v6i64_to_v12i32_scalar:1602; GFX11: ; %bb.0:1603; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1604; GFX11-NEXT: s_cmp_lg_u32 s24, 01605; GFX11-NEXT: s_mov_b32 s4, 01606; GFX11-NEXT: s_cbranch_scc0 .LBB11_41607; GFX11-NEXT: ; %bb.1: ; %Flow1608; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s41609; GFX11-NEXT: s_cbranch_vccnz .LBB11_31610; GFX11-NEXT: .LBB11_2: ; %cmp.true1611; GFX11-NEXT: s_add_u32 s22, s22, 31612; GFX11-NEXT: s_addc_u32 s23, s23, 01613; GFX11-NEXT: s_add_u32 s20, s20, 31614; GFX11-NEXT: s_addc_u32 s21, s21, 01615; GFX11-NEXT: s_add_u32 s18, s18, 31616; GFX11-NEXT: s_addc_u32 s19, s19, 01617; GFX11-NEXT: s_add_u32 s16, s16, 31618; GFX11-NEXT: s_addc_u32 s17, s17, 01619; GFX11-NEXT: s_add_u32 s2, s2, 31620; GFX11-NEXT: s_addc_u32 s3, s3, 01621; GFX11-NEXT: s_add_u32 s0, s0, 31622; GFX11-NEXT: s_addc_u32 s1, s1, 01623; GFX11-NEXT: .LBB11_3: ; %end1624; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1625; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s11626; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s31627; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s171628; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s191629; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s211630; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s231631; GFX11-NEXT: s_setpc_b64 s[30:31]1632; GFX11-NEXT: .LBB11_4:1633; GFX11-NEXT: s_branch .LBB11_21634 %cmp = icmp eq i32 %b, 01635 br i1 %cmp, label %cmp.true, label %cmp.false1636 1637cmp.true:1638 %a1 = add <6 x i64> %a, splat (i64 3)1639 %a2 = bitcast <6 x i64> %a1 to <12 x i32>1640 br label %end1641 1642cmp.false:1643 %a3 = bitcast <6 x i64> %a to <12 x i32>1644 br label %end1645 1646end:1647 %phi = phi <12 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]1648 ret <12 x i32> %phi1649}1650 1651define <24 x i16> @bitcast_v12i32_to_v24i16(<12 x i32> %a, i32 %b) {1652; SI-LABEL: bitcast_v12i32_to_v24i16:1653; SI: ; %bb.0:1654; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1655; SI-NEXT: v_mov_b32_e32 v22, v111656; SI-NEXT: v_mov_b32_e32 v20, v101657; SI-NEXT: v_mov_b32_e32 v18, v91658; SI-NEXT: v_mov_b32_e32 v16, v81659; SI-NEXT: v_mov_b32_e32 v14, v71660; SI-NEXT: v_mov_b32_e32 v24, v61661; SI-NEXT: v_mov_b32_e32 v10, v51662; SI-NEXT: v_mov_b32_e32 v8, v41663; SI-NEXT: v_mov_b32_e32 v6, v31664; SI-NEXT: v_mov_b32_e32 v4, v21665; SI-NEXT: v_mov_b32_e32 v2, v11666; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v121667; SI-NEXT: ; implicit-def: $vgpr11668; SI-NEXT: ; implicit-def: $vgpr31669; SI-NEXT: ; implicit-def: $vgpr51670; SI-NEXT: ; implicit-def: $vgpr71671; SI-NEXT: ; implicit-def: $vgpr91672; SI-NEXT: ; implicit-def: $vgpr111673; SI-NEXT: ; implicit-def: $vgpr131674; SI-NEXT: ; implicit-def: $vgpr151675; SI-NEXT: ; implicit-def: $vgpr171676; SI-NEXT: ; implicit-def: $vgpr191677; SI-NEXT: ; implicit-def: $vgpr211678; SI-NEXT: ; implicit-def: $vgpr231679; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc1680; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1681; SI-NEXT: s_cbranch_execz .LBB12_21682; SI-NEXT: ; %bb.1: ; %cmp.false1683; SI-NEXT: v_alignbit_b32 v21, v22, v20, 161684; SI-NEXT: v_alignbit_b32 v17, v18, v16, 161685; SI-NEXT: v_alignbit_b32 v13, v14, v24, 161686; SI-NEXT: v_alignbit_b32 v9, v10, v8, 161687; SI-NEXT: v_alignbit_b32 v5, v6, v4, 161688; SI-NEXT: v_alignbit_b32 v1, v2, v0, 161689; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v221690; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v181691; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v141692; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v101693; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v61694; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v21695; SI-NEXT: .LBB12_2: ; %Flow1696; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1697; SI-NEXT: s_cbranch_execz .LBB12_41698; SI-NEXT: ; %bb.3: ; %cmp.true1699; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v21700; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v01701; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v61702; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v41703; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v101704; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v81705; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v141706; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v241707; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v181708; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v161709; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v221710; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v201711; SI-NEXT: v_alignbit_b32 v21, v22, v20, 161712; SI-NEXT: v_alignbit_b32 v17, v18, v16, 161713; SI-NEXT: v_alignbit_b32 v13, v14, v24, 161714; SI-NEXT: v_alignbit_b32 v9, v10, v8, 161715; SI-NEXT: v_alignbit_b32 v5, v6, v4, 161716; SI-NEXT: v_alignbit_b32 v1, v2, v0, 161717; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v221718; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v181719; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v141720; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v101721; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v61722; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v21723; SI-NEXT: .LBB12_4: ; %end1724; SI-NEXT: s_or_b64 exec, exec, s[4:5]1725; SI-NEXT: v_mov_b32_e32 v12, v241726; SI-NEXT: s_setpc_b64 s[30:31]1727;1728; VI-LABEL: bitcast_v12i32_to_v24i16:1729; VI: ; %bb.0:1730; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1731; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v121732; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc1733; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1734; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1735; VI-NEXT: s_cbranch_execz .LBB12_21736; VI-NEXT: ; %bb.1: ; %cmp.true1737; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v111738; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v101739; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v91740; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v81741; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v71742; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v61743; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v51744; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v41745; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v31746; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v21747; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v11748; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v01749; VI-NEXT: .LBB12_2: ; %end1750; VI-NEXT: s_or_b64 exec, exec, s[4:5]1751; VI-NEXT: s_setpc_b64 s[30:31]1752;1753; GFX9-LABEL: bitcast_v12i32_to_v24i16:1754; GFX9: ; %bb.0:1755; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1756; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v121757; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc1758; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1759; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1760; GFX9-NEXT: s_cbranch_execz .LBB12_21761; GFX9-NEXT: ; %bb.1: ; %cmp.true1762; GFX9-NEXT: v_add_u32_e32 v11, 3, v111763; GFX9-NEXT: v_add_u32_e32 v10, 3, v101764; GFX9-NEXT: v_add_u32_e32 v9, 3, v91765; GFX9-NEXT: v_add_u32_e32 v8, 3, v81766; GFX9-NEXT: v_add_u32_e32 v7, 3, v71767; GFX9-NEXT: v_add_u32_e32 v6, 3, v61768; GFX9-NEXT: v_add_u32_e32 v5, 3, v51769; GFX9-NEXT: v_add_u32_e32 v4, 3, v41770; GFX9-NEXT: v_add_u32_e32 v3, 3, v31771; GFX9-NEXT: v_add_u32_e32 v2, 3, v21772; GFX9-NEXT: v_add_u32_e32 v1, 3, v11773; GFX9-NEXT: v_add_u32_e32 v0, 3, v01774; GFX9-NEXT: .LBB12_2: ; %end1775; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]1776; GFX9-NEXT: s_setpc_b64 s[30:31]1777;1778; GFX11-LABEL: bitcast_v12i32_to_v24i16:1779; GFX11: ; %bb.0:1780; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1781; GFX11-NEXT: s_mov_b32 s0, exec_lo1782; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v121783; GFX11-NEXT: s_xor_b32 s0, exec_lo, s01784; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1785; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s01786; GFX11-NEXT: s_cbranch_execz .LBB12_21787; GFX11-NEXT: ; %bb.1: ; %cmp.true1788; GFX11-NEXT: v_add_nc_u32_e32 v11, 3, v111789; GFX11-NEXT: v_add_nc_u32_e32 v10, 3, v101790; GFX11-NEXT: v_add_nc_u32_e32 v9, 3, v91791; GFX11-NEXT: v_add_nc_u32_e32 v8, 3, v81792; GFX11-NEXT: v_add_nc_u32_e32 v7, 3, v71793; GFX11-NEXT: v_add_nc_u32_e32 v6, 3, v61794; GFX11-NEXT: v_add_nc_u32_e32 v5, 3, v51795; GFX11-NEXT: v_add_nc_u32_e32 v4, 3, v41796; GFX11-NEXT: v_add_nc_u32_e32 v3, 3, v31797; GFX11-NEXT: v_add_nc_u32_e32 v2, 3, v21798; GFX11-NEXT: v_add_nc_u32_e32 v1, 3, v11799; GFX11-NEXT: v_add_nc_u32_e32 v0, 3, v01800; GFX11-NEXT: .LBB12_2: ; %end1801; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s01802; GFX11-NEXT: s_setpc_b64 s[30:31]1803 %cmp = icmp eq i32 %b, 01804 br i1 %cmp, label %cmp.true, label %cmp.false1805 1806cmp.true:1807 %a1 = add <12 x i32> %a, splat (i32 3)1808 %a2 = bitcast <12 x i32> %a1 to <24 x i16>1809 br label %end1810 1811cmp.false:1812 %a3 = bitcast <12 x i32> %a to <24 x i16>1813 br label %end1814 1815end:1816 %phi = phi <24 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]1817 ret <24 x i16> %phi1818}1819 1820define inreg <24 x i16> @bitcast_v12i32_to_v24i16_scalar(<12 x i32> inreg %a, i32 inreg %b) {1821; SI-LABEL: bitcast_v12i32_to_v24i16_scalar:1822; SI: ; %bb.0:1823; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1824; SI-NEXT: s_cmp_lg_u32 s28, 01825; SI-NEXT: s_cbranch_scc0 .LBB13_41826; SI-NEXT: ; %bb.1: ; %cmp.false1827; SI-NEXT: s_lshr_b32 s40, s27, 161828; SI-NEXT: s_lshr_b32 s41, s25, 161829; SI-NEXT: s_lshr_b32 s42, s23, 161830; SI-NEXT: s_lshr_b32 s43, s21, 161831; SI-NEXT: s_lshr_b32 s44, s19, 161832; SI-NEXT: s_lshr_b32 s45, s17, 161833; SI-NEXT: s_lshr_b64 s[4:5], s[26:27], 161834; SI-NEXT: s_lshr_b64 s[6:7], s[24:25], 161835; SI-NEXT: s_lshr_b64 s[8:9], s[22:23], 161836; SI-NEXT: s_lshr_b64 s[10:11], s[20:21], 161837; SI-NEXT: s_lshr_b64 s[12:13], s[18:19], 161838; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 161839; SI-NEXT: s_cbranch_execnz .LBB13_31840; SI-NEXT: .LBB13_2: ; %cmp.true1841; SI-NEXT: s_add_i32 s17, s17, 31842; SI-NEXT: s_add_i32 s16, s16, 31843; SI-NEXT: s_add_i32 s19, s19, 31844; SI-NEXT: s_add_i32 s18, s18, 31845; SI-NEXT: s_add_i32 s21, s21, 31846; SI-NEXT: s_add_i32 s20, s20, 31847; SI-NEXT: s_add_i32 s23, s23, 31848; SI-NEXT: s_add_i32 s22, s22, 31849; SI-NEXT: s_add_i32 s25, s25, 31850; SI-NEXT: s_add_i32 s24, s24, 31851; SI-NEXT: s_add_i32 s27, s27, 31852; SI-NEXT: s_add_i32 s26, s26, 31853; SI-NEXT: s_lshr_b64 s[4:5], s[26:27], 161854; SI-NEXT: s_lshr_b64 s[6:7], s[24:25], 161855; SI-NEXT: s_lshr_b64 s[8:9], s[22:23], 161856; SI-NEXT: s_lshr_b64 s[10:11], s[20:21], 161857; SI-NEXT: s_lshr_b64 s[12:13], s[18:19], 161858; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 161859; SI-NEXT: s_lshr_b32 s40, s27, 161860; SI-NEXT: s_lshr_b32 s41, s25, 161861; SI-NEXT: s_lshr_b32 s42, s23, 161862; SI-NEXT: s_lshr_b32 s43, s21, 161863; SI-NEXT: s_lshr_b32 s44, s19, 161864; SI-NEXT: s_lshr_b32 s45, s17, 161865; SI-NEXT: .LBB13_3: ; %end1866; SI-NEXT: v_mov_b32_e32 v0, s161867; SI-NEXT: v_mov_b32_e32 v1, s141868; SI-NEXT: v_mov_b32_e32 v2, s171869; SI-NEXT: v_mov_b32_e32 v3, s451870; SI-NEXT: v_mov_b32_e32 v4, s181871; SI-NEXT: v_mov_b32_e32 v5, s121872; SI-NEXT: v_mov_b32_e32 v6, s191873; SI-NEXT: v_mov_b32_e32 v7, s441874; SI-NEXT: v_mov_b32_e32 v8, s201875; SI-NEXT: v_mov_b32_e32 v9, s101876; SI-NEXT: v_mov_b32_e32 v10, s211877; SI-NEXT: v_mov_b32_e32 v11, s431878; SI-NEXT: v_mov_b32_e32 v12, s221879; SI-NEXT: v_mov_b32_e32 v13, s81880; SI-NEXT: v_mov_b32_e32 v14, s231881; SI-NEXT: v_mov_b32_e32 v15, s421882; SI-NEXT: v_mov_b32_e32 v16, s241883; SI-NEXT: v_mov_b32_e32 v17, s61884; SI-NEXT: v_mov_b32_e32 v18, s251885; SI-NEXT: v_mov_b32_e32 v19, s411886; SI-NEXT: v_mov_b32_e32 v20, s261887; SI-NEXT: v_mov_b32_e32 v21, s41888; SI-NEXT: v_mov_b32_e32 v22, s271889; SI-NEXT: v_mov_b32_e32 v23, s401890; SI-NEXT: s_setpc_b64 s[30:31]1891; SI-NEXT: .LBB13_4:1892; SI-NEXT: ; implicit-def: $sgpr141893; SI-NEXT: ; implicit-def: $sgpr451894; SI-NEXT: ; implicit-def: $sgpr121895; SI-NEXT: ; implicit-def: $sgpr441896; SI-NEXT: ; implicit-def: $sgpr101897; SI-NEXT: ; implicit-def: $sgpr431898; SI-NEXT: ; implicit-def: $sgpr81899; SI-NEXT: ; implicit-def: $sgpr421900; SI-NEXT: ; implicit-def: $sgpr61901; SI-NEXT: ; implicit-def: $sgpr411902; SI-NEXT: ; implicit-def: $sgpr41903; SI-NEXT: ; implicit-def: $sgpr401904; SI-NEXT: s_branch .LBB13_21905;1906; VI-LABEL: bitcast_v12i32_to_v24i16_scalar:1907; VI: ; %bb.0:1908; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1909; VI-NEXT: s_cmp_lg_u32 s28, 01910; VI-NEXT: s_cbranch_scc0 .LBB13_41911; VI-NEXT: ; %bb.1: ; %cmp.false1912; VI-NEXT: s_cbranch_execnz .LBB13_31913; VI-NEXT: .LBB13_2: ; %cmp.true1914; VI-NEXT: s_add_i32 s27, s27, 31915; VI-NEXT: s_add_i32 s26, s26, 31916; VI-NEXT: s_add_i32 s25, s25, 31917; VI-NEXT: s_add_i32 s24, s24, 31918; VI-NEXT: s_add_i32 s23, s23, 31919; VI-NEXT: s_add_i32 s22, s22, 31920; VI-NEXT: s_add_i32 s21, s21, 31921; VI-NEXT: s_add_i32 s20, s20, 31922; VI-NEXT: s_add_i32 s19, s19, 31923; VI-NEXT: s_add_i32 s18, s18, 31924; VI-NEXT: s_add_i32 s17, s17, 31925; VI-NEXT: s_add_i32 s16, s16, 31926; VI-NEXT: .LBB13_3: ; %end1927; VI-NEXT: v_mov_b32_e32 v0, s161928; VI-NEXT: v_mov_b32_e32 v1, s171929; VI-NEXT: v_mov_b32_e32 v2, s181930; VI-NEXT: v_mov_b32_e32 v3, s191931; VI-NEXT: v_mov_b32_e32 v4, s201932; VI-NEXT: v_mov_b32_e32 v5, s211933; VI-NEXT: v_mov_b32_e32 v6, s221934; VI-NEXT: v_mov_b32_e32 v7, s231935; VI-NEXT: v_mov_b32_e32 v8, s241936; VI-NEXT: v_mov_b32_e32 v9, s251937; VI-NEXT: v_mov_b32_e32 v10, s261938; VI-NEXT: v_mov_b32_e32 v11, s271939; VI-NEXT: s_setpc_b64 s[30:31]1940; VI-NEXT: .LBB13_4:1941; VI-NEXT: s_branch .LBB13_21942;1943; GFX9-LABEL: bitcast_v12i32_to_v24i16_scalar:1944; GFX9: ; %bb.0:1945; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1946; GFX9-NEXT: s_cmp_lg_u32 s28, 01947; GFX9-NEXT: s_cbranch_scc0 .LBB13_41948; GFX9-NEXT: ; %bb.1: ; %cmp.false1949; GFX9-NEXT: s_cbranch_execnz .LBB13_31950; GFX9-NEXT: .LBB13_2: ; %cmp.true1951; GFX9-NEXT: s_add_i32 s27, s27, 31952; GFX9-NEXT: s_add_i32 s26, s26, 31953; GFX9-NEXT: s_add_i32 s25, s25, 31954; GFX9-NEXT: s_add_i32 s24, s24, 31955; GFX9-NEXT: s_add_i32 s23, s23, 31956; GFX9-NEXT: s_add_i32 s22, s22, 31957; GFX9-NEXT: s_add_i32 s21, s21, 31958; GFX9-NEXT: s_add_i32 s20, s20, 31959; GFX9-NEXT: s_add_i32 s19, s19, 31960; GFX9-NEXT: s_add_i32 s18, s18, 31961; GFX9-NEXT: s_add_i32 s17, s17, 31962; GFX9-NEXT: s_add_i32 s16, s16, 31963; GFX9-NEXT: .LBB13_3: ; %end1964; GFX9-NEXT: v_mov_b32_e32 v0, s161965; GFX9-NEXT: v_mov_b32_e32 v1, s171966; GFX9-NEXT: v_mov_b32_e32 v2, s181967; GFX9-NEXT: v_mov_b32_e32 v3, s191968; GFX9-NEXT: v_mov_b32_e32 v4, s201969; GFX9-NEXT: v_mov_b32_e32 v5, s211970; GFX9-NEXT: v_mov_b32_e32 v6, s221971; GFX9-NEXT: v_mov_b32_e32 v7, s231972; GFX9-NEXT: v_mov_b32_e32 v8, s241973; GFX9-NEXT: v_mov_b32_e32 v9, s251974; GFX9-NEXT: v_mov_b32_e32 v10, s261975; GFX9-NEXT: v_mov_b32_e32 v11, s271976; GFX9-NEXT: s_setpc_b64 s[30:31]1977; GFX9-NEXT: .LBB13_4:1978; GFX9-NEXT: s_branch .LBB13_21979;1980; GFX11-LABEL: bitcast_v12i32_to_v24i16_scalar:1981; GFX11: ; %bb.0:1982; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1983; GFX11-NEXT: s_cmp_lg_u32 s24, 01984; GFX11-NEXT: s_mov_b32 s4, 01985; GFX11-NEXT: s_cbranch_scc0 .LBB13_41986; GFX11-NEXT: ; %bb.1: ; %Flow1987; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s41988; GFX11-NEXT: s_cbranch_vccnz .LBB13_31989; GFX11-NEXT: .LBB13_2: ; %cmp.true1990; GFX11-NEXT: s_add_i32 s23, s23, 31991; GFX11-NEXT: s_add_i32 s22, s22, 31992; GFX11-NEXT: s_add_i32 s21, s21, 31993; GFX11-NEXT: s_add_i32 s20, s20, 31994; GFX11-NEXT: s_add_i32 s19, s19, 31995; GFX11-NEXT: s_add_i32 s18, s18, 31996; GFX11-NEXT: s_add_i32 s17, s17, 31997; GFX11-NEXT: s_add_i32 s16, s16, 31998; GFX11-NEXT: s_add_i32 s3, s3, 31999; GFX11-NEXT: s_add_i32 s2, s2, 32000; GFX11-NEXT: s_add_i32 s1, s1, 32001; GFX11-NEXT: s_add_i32 s0, s0, 32002; GFX11-NEXT: .LBB13_3: ; %end2003; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2004; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s12005; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s32006; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s172007; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s192008; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s212009; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s232010; GFX11-NEXT: s_setpc_b64 s[30:31]2011; GFX11-NEXT: .LBB13_4:2012; GFX11-NEXT: s_branch .LBB13_22013 %cmp = icmp eq i32 %b, 02014 br i1 %cmp, label %cmp.true, label %cmp.false2015 2016cmp.true:2017 %a1 = add <12 x i32> %a, splat (i32 3)2018 %a2 = bitcast <12 x i32> %a1 to <24 x i16>2019 br label %end2020 2021cmp.false:2022 %a3 = bitcast <12 x i32> %a to <24 x i16>2023 br label %end2024 2025end:2026 %phi = phi <24 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]2027 ret <24 x i16> %phi2028}2029 2030define <12 x i32> @bitcast_v24i16_to_v12i32(<24 x i16> %a, i32 %b) {2031; SI-LABEL: bitcast_v24i16_to_v12i32:2032; SI: ; %bb.0:2033; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2034; SI-NEXT: v_mov_b32_e32 v30, v102035; SI-NEXT: v_mov_b32_e32 v29, v82036; SI-NEXT: v_mov_b32_e32 v28, v62037; SI-NEXT: v_mov_b32_e32 v27, v42038; SI-NEXT: v_mov_b32_e32 v26, v22039; SI-NEXT: v_mov_b32_e32 v25, v02040; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v242041; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v12042; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v32043; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v52044; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v72045; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v92046; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v112047; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v132048; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v152049; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v172050; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v192051; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v212052; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v232053; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr112054; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc2055; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]2056; SI-NEXT: s_cbranch_execnz .LBB14_32057; SI-NEXT: ; %bb.1: ; %Flow2058; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2059; SI-NEXT: s_cbranch_execnz .LBB14_42060; SI-NEXT: .LBB14_2: ; %end2061; SI-NEXT: s_or_b64 exec, exec, s[4:5]2062; SI-NEXT: s_setpc_b64 s[30:31]2063; SI-NEXT: .LBB14_3: ; %cmp.false2064; SI-NEXT: v_and_b32_e32 v0, 0xffff, v252065; SI-NEXT: v_and_b32_e32 v1, 0xffff, v262066; SI-NEXT: v_and_b32_e32 v2, 0xffff, v272067; SI-NEXT: v_and_b32_e32 v3, 0xffff, v282068; SI-NEXT: v_and_b32_e32 v4, 0xffff, v292069; SI-NEXT: v_and_b32_e32 v5, 0xffff, v302070; SI-NEXT: v_and_b32_e32 v6, 0xffff, v122071; SI-NEXT: v_and_b32_e32 v7, 0xffff, v142072; SI-NEXT: v_and_b32_e32 v8, 0xffff, v162073; SI-NEXT: v_and_b32_e32 v9, 0xffff, v182074; SI-NEXT: v_and_b32_e32 v10, 0xffff, v202075; SI-NEXT: v_and_b32_e32 v11, 0xffff, v222076; SI-NEXT: v_or_b32_e32 v0, v0, v382077; SI-NEXT: v_or_b32_e32 v1, v1, v372078; SI-NEXT: v_or_b32_e32 v2, v2, v362079; SI-NEXT: v_or_b32_e32 v3, v3, v352080; SI-NEXT: v_or_b32_e32 v4, v4, v342081; SI-NEXT: v_or_b32_e32 v5, v5, v332082; SI-NEXT: v_or_b32_e32 v6, v6, v322083; SI-NEXT: v_or_b32_e32 v7, v7, v312084; SI-NEXT: v_or_b32_e32 v8, v8, v242085; SI-NEXT: v_or_b32_e32 v9, v9, v172086; SI-NEXT: v_or_b32_e32 v10, v10, v152087; SI-NEXT: v_or_b32_e32 v11, v11, v132088; SI-NEXT: ; implicit-def: $vgpr252089; SI-NEXT: ; implicit-def: $vgpr262090; SI-NEXT: ; implicit-def: $vgpr272091; SI-NEXT: ; implicit-def: $vgpr282092; SI-NEXT: ; implicit-def: $vgpr292093; SI-NEXT: ; implicit-def: $vgpr302094; SI-NEXT: ; implicit-def: $vgpr122095; SI-NEXT: ; implicit-def: $vgpr142096; SI-NEXT: ; implicit-def: $vgpr162097; SI-NEXT: ; implicit-def: $vgpr182098; SI-NEXT: ; implicit-def: $vgpr202099; SI-NEXT: ; implicit-def: $vgpr222100; SI-NEXT: ; implicit-def: $vgpr382101; SI-NEXT: ; implicit-def: $vgpr372102; SI-NEXT: ; implicit-def: $vgpr362103; SI-NEXT: ; implicit-def: $vgpr352104; SI-NEXT: ; implicit-def: $vgpr342105; SI-NEXT: ; implicit-def: $vgpr332106; SI-NEXT: ; implicit-def: $vgpr322107; SI-NEXT: ; implicit-def: $vgpr312108; SI-NEXT: ; implicit-def: $vgpr242109; SI-NEXT: ; implicit-def: $vgpr172110; SI-NEXT: ; implicit-def: $vgpr152111; SI-NEXT: ; implicit-def: $vgpr132112; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2113; SI-NEXT: s_cbranch_execz .LBB14_22114; SI-NEXT: .LBB14_4: ; %cmp.true2115; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v252116; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v262117; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v272118; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v282119; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v292120; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v302121; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v122122; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v142123; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v162124; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v182125; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v202126; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v222127; SI-NEXT: v_and_b32_e32 v0, 0xffff, v02128; SI-NEXT: v_and_b32_e32 v1, 0xffff, v12129; SI-NEXT: v_and_b32_e32 v2, 0xffff, v22130; SI-NEXT: v_and_b32_e32 v3, 0xffff, v32131; SI-NEXT: v_and_b32_e32 v4, 0xffff, v42132; SI-NEXT: v_and_b32_e32 v5, 0xffff, v52133; SI-NEXT: v_and_b32_e32 v6, 0xffff, v62134; SI-NEXT: v_and_b32_e32 v7, 0xffff, v72135; SI-NEXT: v_and_b32_e32 v8, 0xffff, v82136; SI-NEXT: v_and_b32_e32 v9, 0xffff, v92137; SI-NEXT: v_and_b32_e32 v10, 0xffff, v102138; SI-NEXT: v_and_b32_e32 v11, 0xffff, v112139; SI-NEXT: v_or_b32_e32 v0, v38, v02140; SI-NEXT: s_mov_b32 s6, 0x300002141; SI-NEXT: v_or_b32_e32 v1, v37, v12142; SI-NEXT: v_or_b32_e32 v2, v36, v22143; SI-NEXT: v_or_b32_e32 v3, v35, v32144; SI-NEXT: v_or_b32_e32 v4, v34, v42145; SI-NEXT: v_or_b32_e32 v5, v33, v52146; SI-NEXT: v_or_b32_e32 v6, v32, v62147; SI-NEXT: v_or_b32_e32 v7, v31, v72148; SI-NEXT: v_or_b32_e32 v8, v24, v82149; SI-NEXT: v_or_b32_e32 v9, v17, v92150; SI-NEXT: v_or_b32_e32 v10, v15, v102151; SI-NEXT: v_or_b32_e32 v11, v13, v112152; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v02153; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v12154; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v22155; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v32156; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v42157; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v52158; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v62159; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v72160; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v82161; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v92162; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v102163; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v112164; SI-NEXT: s_or_b64 exec, exec, s[4:5]2165; SI-NEXT: s_setpc_b64 s[30:31]2166;2167; VI-LABEL: bitcast_v24i16_to_v12i32:2168; VI: ; %bb.0:2169; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2170; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v122171; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc2172; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]2173; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2174; VI-NEXT: s_cbranch_execz .LBB14_22175; VI-NEXT: ; %bb.1: ; %cmp.true2176; VI-NEXT: v_mov_b32_e32 v13, 32177; VI-NEXT: v_add_u16_e32 v12, 3, v112178; VI-NEXT: v_add_u16_sdwa v11, v11, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2179; VI-NEXT: v_or_b32_e32 v11, v12, v112180; VI-NEXT: v_add_u16_e32 v12, 3, v102181; VI-NEXT: v_add_u16_sdwa v10, v10, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2182; VI-NEXT: v_or_b32_e32 v10, v12, v102183; VI-NEXT: v_add_u16_e32 v12, 3, v92184; VI-NEXT: v_add_u16_sdwa v9, v9, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2185; VI-NEXT: v_or_b32_e32 v9, v12, v92186; VI-NEXT: v_add_u16_e32 v12, 3, v82187; VI-NEXT: v_add_u16_sdwa v8, v8, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2188; VI-NEXT: v_or_b32_e32 v8, v12, v82189; VI-NEXT: v_add_u16_e32 v12, 3, v72190; VI-NEXT: v_add_u16_sdwa v7, v7, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2191; VI-NEXT: v_or_b32_e32 v7, v12, v72192; VI-NEXT: v_add_u16_e32 v12, 3, v62193; VI-NEXT: v_add_u16_sdwa v6, v6, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2194; VI-NEXT: v_or_b32_e32 v6, v12, v62195; VI-NEXT: v_add_u16_e32 v12, 3, v52196; VI-NEXT: v_add_u16_sdwa v5, v5, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2197; VI-NEXT: v_or_b32_e32 v5, v12, v52198; VI-NEXT: v_add_u16_e32 v12, 3, v42199; VI-NEXT: v_add_u16_sdwa v4, v4, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2200; VI-NEXT: v_or_b32_e32 v4, v12, v42201; VI-NEXT: v_add_u16_e32 v12, 3, v32202; VI-NEXT: v_add_u16_sdwa v3, v3, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2203; VI-NEXT: v_or_b32_e32 v3, v12, v32204; VI-NEXT: v_add_u16_e32 v12, 3, v22205; VI-NEXT: v_add_u16_sdwa v2, v2, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2206; VI-NEXT: v_or_b32_e32 v2, v12, v22207; VI-NEXT: v_add_u16_e32 v12, 3, v12208; VI-NEXT: v_add_u16_sdwa v1, v1, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2209; VI-NEXT: v_or_b32_e32 v1, v12, v12210; VI-NEXT: v_add_u16_e32 v12, 3, v02211; VI-NEXT: v_add_u16_sdwa v0, v0, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2212; VI-NEXT: v_or_b32_e32 v0, v12, v02213; VI-NEXT: .LBB14_2: ; %end2214; VI-NEXT: s_or_b64 exec, exec, s[4:5]2215; VI-NEXT: s_setpc_b64 s[30:31]2216;2217; GFX9-LABEL: bitcast_v24i16_to_v12i32:2218; GFX9: ; %bb.0:2219; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2220; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v122221; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc2222; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]2223; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2224; GFX9-NEXT: s_cbranch_execz .LBB14_22225; GFX9-NEXT: ; %bb.1: ; %cmp.true2226; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]2227; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]2228; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]2229; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]2230; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]2231; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]2232; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]2233; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]2234; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]2235; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]2236; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]2237; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]2238; GFX9-NEXT: .LBB14_2: ; %end2239; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]2240; GFX9-NEXT: s_setpc_b64 s[30:31]2241;2242; GFX11-LABEL: bitcast_v24i16_to_v12i32:2243; GFX11: ; %bb.0:2244; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2245; GFX11-NEXT: s_mov_b32 s0, exec_lo2246; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v122247; GFX11-NEXT: s_xor_b32 s0, exec_lo, s02248; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2249; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s02250; GFX11-NEXT: s_cbranch_execz .LBB14_22251; GFX11-NEXT: ; %bb.1: ; %cmp.true2252; GFX11-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]2253; GFX11-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]2254; GFX11-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]2255; GFX11-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]2256; GFX11-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]2257; GFX11-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]2258; GFX11-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]2259; GFX11-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]2260; GFX11-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]2261; GFX11-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]2262; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]2263; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]2264; GFX11-NEXT: .LBB14_2: ; %end2265; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s02266; GFX11-NEXT: s_setpc_b64 s[30:31]2267 %cmp = icmp eq i32 %b, 02268 br i1 %cmp, label %cmp.true, label %cmp.false2269 2270cmp.true:2271 %a1 = add <24 x i16> %a, splat (i16 3)2272 %a2 = bitcast <24 x i16> %a1 to <12 x i32>2273 br label %end2274 2275cmp.false:2276 %a3 = bitcast <24 x i16> %a to <12 x i32>2277 br label %end2278 2279end:2280 %phi = phi <12 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]2281 ret <12 x i32> %phi2282}2283 2284define inreg <12 x i32> @bitcast_v24i16_to_v12i32_scalar(<24 x i16> inreg %a, i32 inreg %b) {2285; SI-LABEL: bitcast_v24i16_to_v12i32_scalar:2286; SI: ; %bb.0:2287; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2288; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v102289; SI-NEXT: v_mov_b32_e32 v12, v82290; SI-NEXT: v_mov_b32_e32 v13, v62291; SI-NEXT: v_mov_b32_e32 v14, v42292; SI-NEXT: v_mov_b32_e32 v15, v22293; SI-NEXT: v_mov_b32_e32 v16, v02294; SI-NEXT: s_and_b64 s[4:5], vcc, exec2295; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v12296; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v32297; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v52298; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v72299; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v92300; SI-NEXT: s_cbranch_scc0 .LBB15_42301; SI-NEXT: ; %bb.1: ; %cmp.false2302; SI-NEXT: s_and_b32 s4, s16, 0xffff2303; SI-NEXT: s_lshl_b32 s5, s17, 162304; SI-NEXT: s_or_b32 s4, s4, s52305; SI-NEXT: s_and_b32 s5, s18, 0xffff2306; SI-NEXT: s_lshl_b32 s6, s19, 162307; SI-NEXT: s_or_b32 s5, s5, s62308; SI-NEXT: s_and_b32 s6, s20, 0xffff2309; SI-NEXT: s_lshl_b32 s7, s21, 162310; SI-NEXT: s_or_b32 s6, s6, s72311; SI-NEXT: s_and_b32 s7, s22, 0xffff2312; SI-NEXT: s_lshl_b32 s8, s23, 162313; SI-NEXT: v_and_b32_e32 v0, 0xffff, v162314; SI-NEXT: s_or_b32 s7, s7, s82315; SI-NEXT: s_and_b32 s8, s24, 0xffff2316; SI-NEXT: s_lshl_b32 s9, s25, 162317; SI-NEXT: v_or_b32_e32 v7, v0, v212318; SI-NEXT: v_and_b32_e32 v0, 0xffff, v142319; SI-NEXT: s_or_b32 s8, s8, s92320; SI-NEXT: s_and_b32 s9, s26, 0xffff2321; SI-NEXT: s_lshl_b32 s10, s27, 162322; SI-NEXT: v_or_b32_e32 v9, v0, v192323; SI-NEXT: v_and_b32_e32 v0, 0xffff, v132324; SI-NEXT: s_or_b32 s9, s9, s102325; SI-NEXT: s_and_b32 s10, s28, 0xffff2326; SI-NEXT: s_lshl_b32 s11, s29, 162327; SI-NEXT: v_and_b32_e32 v1, 0xffff, v152328; SI-NEXT: v_or_b32_e32 v10, v0, v182329; SI-NEXT: v_and_b32_e32 v0, 0xffff, v122330; SI-NEXT: s_or_b32 s10, s10, s112331; SI-NEXT: v_or_b32_e32 v8, v1, v202332; SI-NEXT: v_or_b32_e32 v11, v0, v172333; SI-NEXT: v_mov_b32_e32 v0, s42334; SI-NEXT: v_mov_b32_e32 v1, s52335; SI-NEXT: v_mov_b32_e32 v2, s62336; SI-NEXT: v_mov_b32_e32 v3, s72337; SI-NEXT: v_mov_b32_e32 v4, s82338; SI-NEXT: v_mov_b32_e32 v5, s92339; SI-NEXT: v_mov_b32_e32 v6, s102340; SI-NEXT: s_cbranch_execnz .LBB15_32341; SI-NEXT: .LBB15_2: ; %cmp.true2342; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v162343; SI-NEXT: v_and_b32_e32 v0, 0xffff, v02344; SI-NEXT: v_or_b32_e32 v0, v21, v02345; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v02346; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v152347; SI-NEXT: v_and_b32_e32 v0, 0xffff, v02348; SI-NEXT: s_add_i32 s16, s16, 32349; SI-NEXT: v_or_b32_e32 v0, v20, v02350; SI-NEXT: s_and_b32 s4, s16, 0xffff2351; SI-NEXT: s_lshl_b32 s5, s17, 162352; SI-NEXT: s_add_i32 s18, s18, 32353; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v02354; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v142355; SI-NEXT: s_or_b32 s4, s5, s42356; SI-NEXT: s_and_b32 s5, s18, 0xffff2357; SI-NEXT: s_lshl_b32 s6, s19, 162358; SI-NEXT: s_add_i32 s20, s20, 32359; SI-NEXT: v_and_b32_e32 v0, 0xffff, v02360; SI-NEXT: s_or_b32 s5, s6, s52361; SI-NEXT: s_and_b32 s6, s20, 0xffff2362; SI-NEXT: s_lshl_b32 s7, s21, 162363; SI-NEXT: s_add_i32 s22, s22, 32364; SI-NEXT: v_or_b32_e32 v0, v19, v02365; SI-NEXT: s_or_b32 s6, s7, s62366; SI-NEXT: s_and_b32 s7, s22, 0xffff2367; SI-NEXT: s_lshl_b32 s8, s23, 162368; SI-NEXT: s_add_i32 s24, s24, 32369; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v02370; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v132371; SI-NEXT: s_or_b32 s7, s8, s72372; SI-NEXT: s_and_b32 s8, s24, 0xffff2373; SI-NEXT: s_lshl_b32 s9, s25, 162374; SI-NEXT: s_add_i32 s26, s26, 32375; SI-NEXT: v_and_b32_e32 v0, 0xffff, v02376; SI-NEXT: s_or_b32 s8, s9, s82377; SI-NEXT: s_and_b32 s9, s26, 0xffff2378; SI-NEXT: s_lshl_b32 s10, s27, 162379; SI-NEXT: s_add_i32 s28, s28, 32380; SI-NEXT: v_or_b32_e32 v0, v18, v02381; SI-NEXT: s_or_b32 s9, s10, s92382; SI-NEXT: s_and_b32 s10, s28, 0xffff2383; SI-NEXT: s_lshl_b32 s11, s29, 162384; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v02385; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v122386; SI-NEXT: s_or_b32 s10, s11, s102387; SI-NEXT: v_and_b32_e32 v0, 0xffff, v02388; SI-NEXT: s_add_i32 s4, s4, 0x300002389; SI-NEXT: s_add_i32 s5, s5, 0x300002390; SI-NEXT: s_add_i32 s6, s6, 0x300002391; SI-NEXT: s_add_i32 s7, s7, 0x300002392; SI-NEXT: s_add_i32 s8, s8, 0x300002393; SI-NEXT: s_add_i32 s9, s9, 0x300002394; SI-NEXT: s_add_i32 s10, s10, 0x300002395; SI-NEXT: v_or_b32_e32 v0, v17, v02396; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v02397; SI-NEXT: v_mov_b32_e32 v0, s42398; SI-NEXT: v_mov_b32_e32 v1, s52399; SI-NEXT: v_mov_b32_e32 v2, s62400; SI-NEXT: v_mov_b32_e32 v3, s72401; SI-NEXT: v_mov_b32_e32 v4, s82402; SI-NEXT: v_mov_b32_e32 v5, s92403; SI-NEXT: v_mov_b32_e32 v6, s102404; SI-NEXT: .LBB15_3: ; %end2405; SI-NEXT: s_setpc_b64 s[30:31]2406; SI-NEXT: .LBB15_4:2407; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr112408; SI-NEXT: s_branch .LBB15_22409;2410; VI-LABEL: bitcast_v24i16_to_v12i32_scalar:2411; VI: ; %bb.0:2412; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2413; VI-NEXT: s_cmp_lg_u32 s28, 02414; VI-NEXT: s_cbranch_scc0 .LBB15_42415; VI-NEXT: ; %bb.1: ; %cmp.false2416; VI-NEXT: s_cbranch_execnz .LBB15_32417; VI-NEXT: .LBB15_2: ; %cmp.true2418; VI-NEXT: s_add_i32 s5, s27, 32419; VI-NEXT: s_and_b32 s4, s27, 0xffff00002420; VI-NEXT: s_and_b32 s5, s5, 0xffff2421; VI-NEXT: s_or_b32 s4, s4, s52422; VI-NEXT: s_add_i32 s5, s26, 32423; VI-NEXT: s_add_i32 s27, s4, 0x300002424; VI-NEXT: s_and_b32 s4, s26, 0xffff00002425; VI-NEXT: s_and_b32 s5, s5, 0xffff2426; VI-NEXT: s_or_b32 s4, s4, s52427; VI-NEXT: s_add_i32 s5, s25, 32428; VI-NEXT: s_add_i32 s26, s4, 0x300002429; VI-NEXT: s_and_b32 s4, s25, 0xffff00002430; VI-NEXT: s_and_b32 s5, s5, 0xffff2431; VI-NEXT: s_or_b32 s4, s4, s52432; VI-NEXT: s_add_i32 s5, s24, 32433; VI-NEXT: s_add_i32 s25, s4, 0x300002434; VI-NEXT: s_and_b32 s4, s24, 0xffff00002435; VI-NEXT: s_and_b32 s5, s5, 0xffff2436; VI-NEXT: s_or_b32 s4, s4, s52437; VI-NEXT: s_add_i32 s5, s23, 32438; VI-NEXT: s_add_i32 s24, s4, 0x300002439; VI-NEXT: s_and_b32 s4, s23, 0xffff00002440; VI-NEXT: s_and_b32 s5, s5, 0xffff2441; VI-NEXT: s_or_b32 s4, s4, s52442; VI-NEXT: s_add_i32 s5, s22, 32443; VI-NEXT: s_add_i32 s23, s4, 0x300002444; VI-NEXT: s_and_b32 s4, s22, 0xffff00002445; VI-NEXT: s_and_b32 s5, s5, 0xffff2446; VI-NEXT: s_or_b32 s4, s4, s52447; VI-NEXT: s_add_i32 s5, s21, 32448; VI-NEXT: s_add_i32 s22, s4, 0x300002449; VI-NEXT: s_and_b32 s4, s21, 0xffff00002450; VI-NEXT: s_and_b32 s5, s5, 0xffff2451; VI-NEXT: s_or_b32 s4, s4, s52452; VI-NEXT: s_add_i32 s5, s20, 32453; VI-NEXT: s_add_i32 s21, s4, 0x300002454; VI-NEXT: s_and_b32 s4, s20, 0xffff00002455; VI-NEXT: s_and_b32 s5, s5, 0xffff2456; VI-NEXT: s_or_b32 s4, s4, s52457; VI-NEXT: s_add_i32 s5, s19, 32458; VI-NEXT: s_add_i32 s20, s4, 0x300002459; VI-NEXT: s_and_b32 s4, s19, 0xffff00002460; VI-NEXT: s_and_b32 s5, s5, 0xffff2461; VI-NEXT: s_or_b32 s4, s4, s52462; VI-NEXT: s_add_i32 s5, s18, 32463; VI-NEXT: s_add_i32 s19, s4, 0x300002464; VI-NEXT: s_and_b32 s4, s18, 0xffff00002465; VI-NEXT: s_and_b32 s5, s5, 0xffff2466; VI-NEXT: s_or_b32 s4, s4, s52467; VI-NEXT: s_add_i32 s5, s17, 32468; VI-NEXT: s_add_i32 s18, s4, 0x300002469; VI-NEXT: s_and_b32 s4, s17, 0xffff00002470; VI-NEXT: s_and_b32 s5, s5, 0xffff2471; VI-NEXT: s_or_b32 s4, s4, s52472; VI-NEXT: s_add_i32 s5, s16, 32473; VI-NEXT: s_add_i32 s17, s4, 0x300002474; VI-NEXT: s_and_b32 s4, s16, 0xffff00002475; VI-NEXT: s_and_b32 s5, s5, 0xffff2476; VI-NEXT: s_or_b32 s4, s4, s52477; VI-NEXT: s_add_i32 s16, s4, 0x300002478; VI-NEXT: .LBB15_3: ; %end2479; VI-NEXT: v_mov_b32_e32 v0, s162480; VI-NEXT: v_mov_b32_e32 v1, s172481; VI-NEXT: v_mov_b32_e32 v2, s182482; VI-NEXT: v_mov_b32_e32 v3, s192483; VI-NEXT: v_mov_b32_e32 v4, s202484; VI-NEXT: v_mov_b32_e32 v5, s212485; VI-NEXT: v_mov_b32_e32 v6, s222486; VI-NEXT: v_mov_b32_e32 v7, s232487; VI-NEXT: v_mov_b32_e32 v8, s242488; VI-NEXT: v_mov_b32_e32 v9, s252489; VI-NEXT: v_mov_b32_e32 v10, s262490; VI-NEXT: v_mov_b32_e32 v11, s272491; VI-NEXT: s_setpc_b64 s[30:31]2492; VI-NEXT: .LBB15_4:2493; VI-NEXT: s_branch .LBB15_22494;2495; GFX9-LABEL: bitcast_v24i16_to_v12i32_scalar:2496; GFX9: ; %bb.0:2497; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2498; GFX9-NEXT: s_cmp_lg_u32 s28, 02499; GFX9-NEXT: s_cbranch_scc0 .LBB15_32500; GFX9-NEXT: ; %bb.1: ; %cmp.false2501; GFX9-NEXT: s_cbranch_execnz .LBB15_42502; GFX9-NEXT: .LBB15_2: ; %cmp.true2503; GFX9-NEXT: v_pk_add_u16 v11, s27, 3 op_sel_hi:[1,0]2504; GFX9-NEXT: v_pk_add_u16 v10, s26, 3 op_sel_hi:[1,0]2505; GFX9-NEXT: v_pk_add_u16 v9, s25, 3 op_sel_hi:[1,0]2506; GFX9-NEXT: v_pk_add_u16 v8, s24, 3 op_sel_hi:[1,0]2507; GFX9-NEXT: v_pk_add_u16 v7, s23, 3 op_sel_hi:[1,0]2508; GFX9-NEXT: v_pk_add_u16 v6, s22, 3 op_sel_hi:[1,0]2509; GFX9-NEXT: v_pk_add_u16 v5, s21, 3 op_sel_hi:[1,0]2510; GFX9-NEXT: v_pk_add_u16 v4, s20, 3 op_sel_hi:[1,0]2511; GFX9-NEXT: v_pk_add_u16 v3, s19, 3 op_sel_hi:[1,0]2512; GFX9-NEXT: v_pk_add_u16 v2, s18, 3 op_sel_hi:[1,0]2513; GFX9-NEXT: v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]2514; GFX9-NEXT: v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]2515; GFX9-NEXT: s_setpc_b64 s[30:31]2516; GFX9-NEXT: .LBB15_3:2517; GFX9-NEXT: s_branch .LBB15_22518; GFX9-NEXT: .LBB15_4:2519; GFX9-NEXT: v_mov_b32_e32 v0, s162520; GFX9-NEXT: v_mov_b32_e32 v1, s172521; GFX9-NEXT: v_mov_b32_e32 v2, s182522; GFX9-NEXT: v_mov_b32_e32 v3, s192523; GFX9-NEXT: v_mov_b32_e32 v4, s202524; GFX9-NEXT: v_mov_b32_e32 v5, s212525; GFX9-NEXT: v_mov_b32_e32 v6, s222526; GFX9-NEXT: v_mov_b32_e32 v7, s232527; GFX9-NEXT: v_mov_b32_e32 v8, s242528; GFX9-NEXT: v_mov_b32_e32 v9, s252529; GFX9-NEXT: v_mov_b32_e32 v10, s262530; GFX9-NEXT: v_mov_b32_e32 v11, s272531; GFX9-NEXT: s_setpc_b64 s[30:31]2532;2533; GFX11-LABEL: bitcast_v24i16_to_v12i32_scalar:2534; GFX11: ; %bb.0:2535; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2536; GFX11-NEXT: s_mov_b32 s15, s32537; GFX11-NEXT: s_mov_b32 s14, s22538; GFX11-NEXT: s_mov_b32 s13, s12539; GFX11-NEXT: s_mov_b32 s12, s02540; GFX11-NEXT: s_cmp_lg_u32 s24, 02541; GFX11-NEXT: s_mov_b32 s0, 02542; GFX11-NEXT: s_cbranch_scc0 .LBB15_32543; GFX11-NEXT: ; %bb.1: ; %Flow2544; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s02545; GFX11-NEXT: s_cbranch_vccnz .LBB15_42546; GFX11-NEXT: .LBB15_2: ; %cmp.true2547; GFX11-NEXT: v_pk_add_u16 v11, s23, 3 op_sel_hi:[1,0]2548; GFX11-NEXT: v_pk_add_u16 v10, s22, 3 op_sel_hi:[1,0]2549; GFX11-NEXT: v_pk_add_u16 v9, s21, 3 op_sel_hi:[1,0]2550; GFX11-NEXT: v_pk_add_u16 v8, s20, 3 op_sel_hi:[1,0]2551; GFX11-NEXT: v_pk_add_u16 v7, s19, 3 op_sel_hi:[1,0]2552; GFX11-NEXT: v_pk_add_u16 v6, s18, 3 op_sel_hi:[1,0]2553; GFX11-NEXT: v_pk_add_u16 v5, s17, 3 op_sel_hi:[1,0]2554; GFX11-NEXT: v_pk_add_u16 v4, s16, 3 op_sel_hi:[1,0]2555; GFX11-NEXT: v_pk_add_u16 v3, s15, 3 op_sel_hi:[1,0]2556; GFX11-NEXT: v_pk_add_u16 v2, s14, 3 op_sel_hi:[1,0]2557; GFX11-NEXT: v_pk_add_u16 v1, s13, 3 op_sel_hi:[1,0]2558; GFX11-NEXT: v_pk_add_u16 v0, s12, 3 op_sel_hi:[1,0]2559; GFX11-NEXT: s_setpc_b64 s[30:31]2560; GFX11-NEXT: .LBB15_3:2561; GFX11-NEXT: s_branch .LBB15_22562; GFX11-NEXT: .LBB15_4:2563; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s132564; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s152565; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s172566; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s192567; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s212568; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s232569; GFX11-NEXT: s_setpc_b64 s[30:31]2570 %cmp = icmp eq i32 %b, 02571 br i1 %cmp, label %cmp.true, label %cmp.false2572 2573cmp.true:2574 %a1 = add <24 x i16> %a, splat (i16 3)2575 %a2 = bitcast <24 x i16> %a1 to <12 x i32>2576 br label %end2577 2578cmp.false:2579 %a3 = bitcast <24 x i16> %a to <12 x i32>2580 br label %end2581 2582end:2583 %phi = phi <12 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]2584 ret <12 x i32> %phi2585}2586 2587define <24 x half> @bitcast_v12i32_to_v24f16(<12 x i32> %a, i32 %b) {2588; SI-LABEL: bitcast_v12i32_to_v24f16:2589; SI: ; %bb.0:2590; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2591; SI-NEXT: v_mov_b32_e32 v35, v112592; SI-NEXT: v_mov_b32_e32 v34, v102593; SI-NEXT: v_mov_b32_e32 v33, v92594; SI-NEXT: v_mov_b32_e32 v32, v82595; SI-NEXT: v_mov_b32_e32 v31, v72596; SI-NEXT: v_mov_b32_e32 v30, v62597; SI-NEXT: v_mov_b32_e32 v29, v52598; SI-NEXT: v_mov_b32_e32 v28, v42599; SI-NEXT: v_mov_b32_e32 v27, v32600; SI-NEXT: v_mov_b32_e32 v26, v22601; SI-NEXT: v_mov_b32_e32 v25, v12602; SI-NEXT: v_mov_b32_e32 v24, v02603; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v122604; SI-NEXT: ; implicit-def: $vgpr02605; SI-NEXT: ; implicit-def: $vgpr12606; SI-NEXT: ; implicit-def: $vgpr22607; SI-NEXT: ; implicit-def: $vgpr32608; SI-NEXT: ; implicit-def: $vgpr42609; SI-NEXT: ; implicit-def: $vgpr52610; SI-NEXT: ; implicit-def: $vgpr62611; SI-NEXT: ; implicit-def: $vgpr72612; SI-NEXT: ; implicit-def: $vgpr82613; SI-NEXT: ; implicit-def: $vgpr92614; SI-NEXT: ; implicit-def: $vgpr102615; SI-NEXT: ; implicit-def: $vgpr112616; SI-NEXT: ; implicit-def: $vgpr122617; SI-NEXT: ; implicit-def: $vgpr132618; SI-NEXT: ; implicit-def: $vgpr142619; SI-NEXT: ; implicit-def: $vgpr152620; SI-NEXT: ; implicit-def: $vgpr162621; SI-NEXT: ; implicit-def: $vgpr172622; SI-NEXT: ; implicit-def: $vgpr182623; SI-NEXT: ; implicit-def: $vgpr192624; SI-NEXT: ; implicit-def: $vgpr202625; SI-NEXT: ; implicit-def: $vgpr212626; SI-NEXT: ; implicit-def: $vgpr222627; SI-NEXT: ; implicit-def: $vgpr232628; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc2629; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]2630; SI-NEXT: s_cbranch_execnz .LBB16_32631; SI-NEXT: ; %bb.1: ; %Flow2632; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2633; SI-NEXT: s_cbranch_execnz .LBB16_42634; SI-NEXT: .LBB16_2: ; %end2635; SI-NEXT: s_or_b64 exec, exec, s[4:5]2636; SI-NEXT: s_setpc_b64 s[30:31]2637; SI-NEXT: .LBB16_3: ; %cmp.false2638; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v352639; SI-NEXT: v_cvt_f32_f16_e32 v23, v02640; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v342641; SI-NEXT: v_cvt_f32_f16_e32 v21, v02642; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v332643; SI-NEXT: v_cvt_f32_f16_e32 v19, v02644; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v322645; SI-NEXT: v_cvt_f32_f16_e32 v17, v02646; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v312647; SI-NEXT: v_cvt_f32_f16_e32 v15, v02648; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v302649; SI-NEXT: v_cvt_f32_f16_e32 v13, v02650; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v292651; SI-NEXT: v_cvt_f32_f16_e32 v11, v02652; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v282653; SI-NEXT: v_cvt_f32_f16_e32 v9, v02654; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v272655; SI-NEXT: v_cvt_f32_f16_e32 v7, v02656; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v262657; SI-NEXT: v_cvt_f32_f16_e32 v5, v02658; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v252659; SI-NEXT: v_cvt_f32_f16_e32 v3, v02660; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v242661; SI-NEXT: v_cvt_f32_f16_e32 v1, v02662; SI-NEXT: v_cvt_f32_f16_e32 v22, v352663; SI-NEXT: v_cvt_f32_f16_e32 v20, v342664; SI-NEXT: v_cvt_f32_f16_e32 v18, v332665; SI-NEXT: v_cvt_f32_f16_e32 v16, v322666; SI-NEXT: v_cvt_f32_f16_e32 v14, v312667; SI-NEXT: v_cvt_f32_f16_e32 v12, v302668; SI-NEXT: v_cvt_f32_f16_e32 v10, v292669; SI-NEXT: v_cvt_f32_f16_e32 v8, v282670; SI-NEXT: v_cvt_f32_f16_e32 v6, v272671; SI-NEXT: v_cvt_f32_f16_e32 v4, v262672; SI-NEXT: v_cvt_f32_f16_e32 v2, v252673; SI-NEXT: v_cvt_f32_f16_e32 v0, v242674; SI-NEXT: ; implicit-def: $vgpr242675; SI-NEXT: ; implicit-def: $vgpr252676; SI-NEXT: ; implicit-def: $vgpr262677; SI-NEXT: ; implicit-def: $vgpr272678; SI-NEXT: ; implicit-def: $vgpr282679; SI-NEXT: ; implicit-def: $vgpr292680; SI-NEXT: ; implicit-def: $vgpr302681; SI-NEXT: ; implicit-def: $vgpr312682; SI-NEXT: ; implicit-def: $vgpr322683; SI-NEXT: ; implicit-def: $vgpr332684; SI-NEXT: ; implicit-def: $vgpr342685; SI-NEXT: ; implicit-def: $vgpr352686; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2687; SI-NEXT: s_cbranch_execz .LBB16_22688; SI-NEXT: .LBB16_4: ; %cmp.true2689; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v242690; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v252691; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v262692; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v272693; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v282694; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v292695; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v302696; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v312697; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v322698; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v332699; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v342700; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v352701; SI-NEXT: v_cvt_f32_f16_e32 v22, v232702; SI-NEXT: v_cvt_f32_f16_e32 v20, v212703; SI-NEXT: v_cvt_f32_f16_e32 v18, v192704; SI-NEXT: v_cvt_f32_f16_e32 v16, v172705; SI-NEXT: v_cvt_f32_f16_e32 v14, v152706; SI-NEXT: v_cvt_f32_f16_e32 v12, v132707; SI-NEXT: v_cvt_f32_f16_e32 v10, v112708; SI-NEXT: v_cvt_f32_f16_e32 v8, v92709; SI-NEXT: v_cvt_f32_f16_e32 v6, v72710; SI-NEXT: v_cvt_f32_f16_e32 v4, v52711; SI-NEXT: v_cvt_f32_f16_e32 v2, v32712; SI-NEXT: v_cvt_f32_f16_e32 v0, v12713; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v232714; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v212715; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v192716; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v172717; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v152718; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v132719; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v112720; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v92721; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v72722; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v52723; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v32724; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v12725; SI-NEXT: v_cvt_f32_f16_e32 v23, v232726; SI-NEXT: v_cvt_f32_f16_e32 v21, v212727; SI-NEXT: v_cvt_f32_f16_e32 v19, v192728; SI-NEXT: v_cvt_f32_f16_e32 v17, v172729; SI-NEXT: v_cvt_f32_f16_e32 v15, v152730; SI-NEXT: v_cvt_f32_f16_e32 v13, v132731; SI-NEXT: v_cvt_f32_f16_e32 v11, v112732; SI-NEXT: v_cvt_f32_f16_e32 v9, v92733; SI-NEXT: v_cvt_f32_f16_e32 v7, v72734; SI-NEXT: v_cvt_f32_f16_e32 v5, v52735; SI-NEXT: v_cvt_f32_f16_e32 v3, v32736; SI-NEXT: v_cvt_f32_f16_e32 v1, v12737; SI-NEXT: s_or_b64 exec, exec, s[4:5]2738; SI-NEXT: s_setpc_b64 s[30:31]2739;2740; VI-LABEL: bitcast_v12i32_to_v24f16:2741; VI: ; %bb.0:2742; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2743; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v122744; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc2745; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]2746; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2747; VI-NEXT: s_cbranch_execz .LBB16_22748; VI-NEXT: ; %bb.1: ; %cmp.true2749; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v112750; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v102751; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v92752; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v82753; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v72754; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v62755; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v52756; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v42757; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v32758; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v22759; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v12760; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v02761; VI-NEXT: .LBB16_2: ; %end2762; VI-NEXT: s_or_b64 exec, exec, s[4:5]2763; VI-NEXT: s_setpc_b64 s[30:31]2764;2765; GFX9-LABEL: bitcast_v12i32_to_v24f16:2766; GFX9: ; %bb.0:2767; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2768; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v122769; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc2770; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]2771; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2772; GFX9-NEXT: s_cbranch_execz .LBB16_22773; GFX9-NEXT: ; %bb.1: ; %cmp.true2774; GFX9-NEXT: v_add_u32_e32 v11, 3, v112775; GFX9-NEXT: v_add_u32_e32 v10, 3, v102776; GFX9-NEXT: v_add_u32_e32 v9, 3, v92777; GFX9-NEXT: v_add_u32_e32 v8, 3, v82778; GFX9-NEXT: v_add_u32_e32 v7, 3, v72779; GFX9-NEXT: v_add_u32_e32 v6, 3, v62780; GFX9-NEXT: v_add_u32_e32 v5, 3, v52781; GFX9-NEXT: v_add_u32_e32 v4, 3, v42782; GFX9-NEXT: v_add_u32_e32 v3, 3, v32783; GFX9-NEXT: v_add_u32_e32 v2, 3, v22784; GFX9-NEXT: v_add_u32_e32 v1, 3, v12785; GFX9-NEXT: v_add_u32_e32 v0, 3, v02786; GFX9-NEXT: .LBB16_2: ; %end2787; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]2788; GFX9-NEXT: s_setpc_b64 s[30:31]2789;2790; GFX11-LABEL: bitcast_v12i32_to_v24f16:2791; GFX11: ; %bb.0:2792; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2793; GFX11-NEXT: s_mov_b32 s0, exec_lo2794; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v122795; GFX11-NEXT: s_xor_b32 s0, exec_lo, s02796; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2797; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s02798; GFX11-NEXT: s_cbranch_execz .LBB16_22799; GFX11-NEXT: ; %bb.1: ; %cmp.true2800; GFX11-NEXT: v_add_nc_u32_e32 v11, 3, v112801; GFX11-NEXT: v_add_nc_u32_e32 v10, 3, v102802; GFX11-NEXT: v_add_nc_u32_e32 v9, 3, v92803; GFX11-NEXT: v_add_nc_u32_e32 v8, 3, v82804; GFX11-NEXT: v_add_nc_u32_e32 v7, 3, v72805; GFX11-NEXT: v_add_nc_u32_e32 v6, 3, v62806; GFX11-NEXT: v_add_nc_u32_e32 v5, 3, v52807; GFX11-NEXT: v_add_nc_u32_e32 v4, 3, v42808; GFX11-NEXT: v_add_nc_u32_e32 v3, 3, v32809; GFX11-NEXT: v_add_nc_u32_e32 v2, 3, v22810; GFX11-NEXT: v_add_nc_u32_e32 v1, 3, v12811; GFX11-NEXT: v_add_nc_u32_e32 v0, 3, v02812; GFX11-NEXT: .LBB16_2: ; %end2813; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s02814; GFX11-NEXT: s_setpc_b64 s[30:31]2815 %cmp = icmp eq i32 %b, 02816 br i1 %cmp, label %cmp.true, label %cmp.false2817 2818cmp.true:2819 %a1 = add <12 x i32> %a, splat (i32 3)2820 %a2 = bitcast <12 x i32> %a1 to <24 x half>2821 br label %end2822 2823cmp.false:2824 %a3 = bitcast <12 x i32> %a to <24 x half>2825 br label %end2826 2827end:2828 %phi = phi <24 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]2829 ret <24 x half> %phi2830}2831 2832define inreg <24 x half> @bitcast_v12i32_to_v24f16_scalar(<12 x i32> inreg %a, i32 inreg %b) {2833; SI-LABEL: bitcast_v12i32_to_v24f16_scalar:2834; SI: ; %bb.0:2835; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2836; SI-NEXT: s_cmp_lg_u32 s28, 02837; SI-NEXT: s_cbranch_scc0 .LBB17_42838; SI-NEXT: ; %bb.1: ; %cmp.false2839; SI-NEXT: s_lshr_b32 s4, s27, 162840; SI-NEXT: v_cvt_f32_f16_e32 v23, s42841; SI-NEXT: s_lshr_b32 s4, s26, 162842; SI-NEXT: v_cvt_f32_f16_e32 v21, s42843; SI-NEXT: s_lshr_b32 s4, s25, 162844; SI-NEXT: v_cvt_f32_f16_e32 v19, s42845; SI-NEXT: s_lshr_b32 s4, s24, 162846; SI-NEXT: v_cvt_f32_f16_e32 v17, s42847; SI-NEXT: s_lshr_b32 s4, s23, 162848; SI-NEXT: v_cvt_f32_f16_e32 v15, s42849; SI-NEXT: s_lshr_b32 s4, s22, 162850; SI-NEXT: v_cvt_f32_f16_e32 v13, s42851; SI-NEXT: s_lshr_b32 s4, s21, 162852; SI-NEXT: v_cvt_f32_f16_e32 v11, s42853; SI-NEXT: s_lshr_b32 s4, s20, 162854; SI-NEXT: v_cvt_f32_f16_e32 v9, s42855; SI-NEXT: s_lshr_b32 s4, s19, 162856; SI-NEXT: v_cvt_f32_f16_e32 v7, s42857; SI-NEXT: s_lshr_b32 s4, s18, 162858; SI-NEXT: v_cvt_f32_f16_e32 v5, s42859; SI-NEXT: s_lshr_b32 s4, s17, 162860; SI-NEXT: v_cvt_f32_f16_e32 v3, s42861; SI-NEXT: s_lshr_b32 s4, s16, 162862; SI-NEXT: v_cvt_f32_f16_e32 v1, s42863; SI-NEXT: v_cvt_f32_f16_e32 v22, s272864; SI-NEXT: v_cvt_f32_f16_e32 v20, s262865; SI-NEXT: v_cvt_f32_f16_e32 v18, s252866; SI-NEXT: v_cvt_f32_f16_e32 v16, s242867; SI-NEXT: v_cvt_f32_f16_e32 v14, s232868; SI-NEXT: v_cvt_f32_f16_e32 v12, s222869; SI-NEXT: v_cvt_f32_f16_e32 v10, s212870; SI-NEXT: v_cvt_f32_f16_e32 v8, s202871; SI-NEXT: v_cvt_f32_f16_e32 v6, s192872; SI-NEXT: v_cvt_f32_f16_e32 v4, s182873; SI-NEXT: v_cvt_f32_f16_e32 v2, s172874; SI-NEXT: v_cvt_f32_f16_e32 v0, s162875; SI-NEXT: s_cbranch_execnz .LBB17_32876; SI-NEXT: .LBB17_2: ; %cmp.true2877; SI-NEXT: s_add_i32 s27, s27, 32878; SI-NEXT: s_add_i32 s26, s26, 32879; SI-NEXT: s_lshr_b32 s4, s27, 162880; SI-NEXT: s_add_i32 s25, s25, 32881; SI-NEXT: v_cvt_f32_f16_e32 v23, s42882; SI-NEXT: s_lshr_b32 s4, s26, 162883; SI-NEXT: s_add_i32 s24, s24, 32884; SI-NEXT: v_cvt_f32_f16_e32 v21, s42885; SI-NEXT: s_lshr_b32 s4, s25, 162886; SI-NEXT: s_add_i32 s23, s23, 32887; SI-NEXT: v_cvt_f32_f16_e32 v19, s42888; SI-NEXT: s_lshr_b32 s4, s24, 162889; SI-NEXT: s_add_i32 s22, s22, 32890; SI-NEXT: v_cvt_f32_f16_e32 v17, s42891; SI-NEXT: s_lshr_b32 s4, s23, 162892; SI-NEXT: s_add_i32 s21, s21, 32893; SI-NEXT: v_cvt_f32_f16_e32 v15, s42894; SI-NEXT: s_lshr_b32 s4, s22, 162895; SI-NEXT: s_add_i32 s20, s20, 32896; SI-NEXT: v_cvt_f32_f16_e32 v13, s42897; SI-NEXT: s_lshr_b32 s4, s21, 162898; SI-NEXT: s_add_i32 s19, s19, 32899; SI-NEXT: v_cvt_f32_f16_e32 v11, s42900; SI-NEXT: s_lshr_b32 s4, s20, 162901; SI-NEXT: s_add_i32 s18, s18, 32902; SI-NEXT: v_cvt_f32_f16_e32 v9, s42903; SI-NEXT: s_lshr_b32 s4, s19, 162904; SI-NEXT: s_add_i32 s17, s17, 32905; SI-NEXT: v_cvt_f32_f16_e32 v7, s42906; SI-NEXT: s_lshr_b32 s4, s18, 162907; SI-NEXT: s_add_i32 s16, s16, 32908; SI-NEXT: v_cvt_f32_f16_e32 v5, s42909; SI-NEXT: s_lshr_b32 s4, s17, 162910; SI-NEXT: v_cvt_f32_f16_e32 v3, s42911; SI-NEXT: s_lshr_b32 s4, s16, 162912; SI-NEXT: v_cvt_f32_f16_e32 v22, s272913; SI-NEXT: v_cvt_f32_f16_e32 v20, s262914; SI-NEXT: v_cvt_f32_f16_e32 v18, s252915; SI-NEXT: v_cvt_f32_f16_e32 v16, s242916; SI-NEXT: v_cvt_f32_f16_e32 v14, s232917; SI-NEXT: v_cvt_f32_f16_e32 v12, s222918; SI-NEXT: v_cvt_f32_f16_e32 v10, s212919; SI-NEXT: v_cvt_f32_f16_e32 v8, s202920; SI-NEXT: v_cvt_f32_f16_e32 v6, s192921; SI-NEXT: v_cvt_f32_f16_e32 v4, s182922; SI-NEXT: v_cvt_f32_f16_e32 v2, s172923; SI-NEXT: v_cvt_f32_f16_e32 v0, s162924; SI-NEXT: v_cvt_f32_f16_e32 v1, s42925; SI-NEXT: .LBB17_3: ; %end2926; SI-NEXT: s_setpc_b64 s[30:31]2927; SI-NEXT: .LBB17_4:2928; SI-NEXT: ; implicit-def: $vgpr02929; SI-NEXT: ; implicit-def: $vgpr12930; SI-NEXT: ; implicit-def: $vgpr22931; SI-NEXT: ; implicit-def: $vgpr32932; SI-NEXT: ; implicit-def: $vgpr42933; SI-NEXT: ; implicit-def: $vgpr52934; SI-NEXT: ; implicit-def: $vgpr62935; SI-NEXT: ; implicit-def: $vgpr72936; SI-NEXT: ; implicit-def: $vgpr82937; SI-NEXT: ; implicit-def: $vgpr92938; SI-NEXT: ; implicit-def: $vgpr102939; SI-NEXT: ; implicit-def: $vgpr112940; SI-NEXT: ; implicit-def: $vgpr122941; SI-NEXT: ; implicit-def: $vgpr132942; SI-NEXT: ; implicit-def: $vgpr142943; SI-NEXT: ; implicit-def: $vgpr152944; SI-NEXT: ; implicit-def: $vgpr162945; SI-NEXT: ; implicit-def: $vgpr172946; SI-NEXT: ; implicit-def: $vgpr182947; SI-NEXT: ; implicit-def: $vgpr192948; SI-NEXT: ; implicit-def: $vgpr202949; SI-NEXT: ; implicit-def: $vgpr212950; SI-NEXT: ; implicit-def: $vgpr222951; SI-NEXT: ; implicit-def: $vgpr232952; SI-NEXT: s_branch .LBB17_22953;2954; VI-LABEL: bitcast_v12i32_to_v24f16_scalar:2955; VI: ; %bb.0:2956; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2957; VI-NEXT: s_cmp_lg_u32 s28, 02958; VI-NEXT: s_cbranch_scc0 .LBB17_42959; VI-NEXT: ; %bb.1: ; %cmp.false2960; VI-NEXT: s_cbranch_execnz .LBB17_32961; VI-NEXT: .LBB17_2: ; %cmp.true2962; VI-NEXT: s_add_i32 s27, s27, 32963; VI-NEXT: s_add_i32 s26, s26, 32964; VI-NEXT: s_add_i32 s25, s25, 32965; VI-NEXT: s_add_i32 s24, s24, 32966; VI-NEXT: s_add_i32 s23, s23, 32967; VI-NEXT: s_add_i32 s22, s22, 32968; VI-NEXT: s_add_i32 s21, s21, 32969; VI-NEXT: s_add_i32 s20, s20, 32970; VI-NEXT: s_add_i32 s19, s19, 32971; VI-NEXT: s_add_i32 s18, s18, 32972; VI-NEXT: s_add_i32 s17, s17, 32973; VI-NEXT: s_add_i32 s16, s16, 32974; VI-NEXT: .LBB17_3: ; %end2975; VI-NEXT: v_mov_b32_e32 v0, s162976; VI-NEXT: v_mov_b32_e32 v1, s172977; VI-NEXT: v_mov_b32_e32 v2, s182978; VI-NEXT: v_mov_b32_e32 v3, s192979; VI-NEXT: v_mov_b32_e32 v4, s202980; VI-NEXT: v_mov_b32_e32 v5, s212981; VI-NEXT: v_mov_b32_e32 v6, s222982; VI-NEXT: v_mov_b32_e32 v7, s232983; VI-NEXT: v_mov_b32_e32 v8, s242984; VI-NEXT: v_mov_b32_e32 v9, s252985; VI-NEXT: v_mov_b32_e32 v10, s262986; VI-NEXT: v_mov_b32_e32 v11, s272987; VI-NEXT: s_setpc_b64 s[30:31]2988; VI-NEXT: .LBB17_4:2989; VI-NEXT: s_branch .LBB17_22990;2991; GFX9-LABEL: bitcast_v12i32_to_v24f16_scalar:2992; GFX9: ; %bb.0:2993; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2994; GFX9-NEXT: s_cmp_lg_u32 s28, 02995; GFX9-NEXT: s_cbranch_scc0 .LBB17_42996; GFX9-NEXT: ; %bb.1: ; %cmp.false2997; GFX9-NEXT: s_cbranch_execnz .LBB17_32998; GFX9-NEXT: .LBB17_2: ; %cmp.true2999; GFX9-NEXT: s_add_i32 s27, s27, 33000; GFX9-NEXT: s_add_i32 s26, s26, 33001; GFX9-NEXT: s_add_i32 s25, s25, 33002; GFX9-NEXT: s_add_i32 s24, s24, 33003; GFX9-NEXT: s_add_i32 s23, s23, 33004; GFX9-NEXT: s_add_i32 s22, s22, 33005; GFX9-NEXT: s_add_i32 s21, s21, 33006; GFX9-NEXT: s_add_i32 s20, s20, 33007; GFX9-NEXT: s_add_i32 s19, s19, 33008; GFX9-NEXT: s_add_i32 s18, s18, 33009; GFX9-NEXT: s_add_i32 s17, s17, 33010; GFX9-NEXT: s_add_i32 s16, s16, 33011; GFX9-NEXT: .LBB17_3: ; %end3012; GFX9-NEXT: v_mov_b32_e32 v0, s163013; GFX9-NEXT: v_mov_b32_e32 v1, s173014; GFX9-NEXT: v_mov_b32_e32 v2, s183015; GFX9-NEXT: v_mov_b32_e32 v3, s193016; GFX9-NEXT: v_mov_b32_e32 v4, s203017; GFX9-NEXT: v_mov_b32_e32 v5, s213018; GFX9-NEXT: v_mov_b32_e32 v6, s223019; GFX9-NEXT: v_mov_b32_e32 v7, s233020; GFX9-NEXT: v_mov_b32_e32 v8, s243021; GFX9-NEXT: v_mov_b32_e32 v9, s253022; GFX9-NEXT: v_mov_b32_e32 v10, s263023; GFX9-NEXT: v_mov_b32_e32 v11, s273024; GFX9-NEXT: s_setpc_b64 s[30:31]3025; GFX9-NEXT: .LBB17_4:3026; GFX9-NEXT: s_branch .LBB17_23027;3028; GFX11-LABEL: bitcast_v12i32_to_v24f16_scalar:3029; GFX11: ; %bb.0:3030; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3031; GFX11-NEXT: s_cmp_lg_u32 s24, 03032; GFX11-NEXT: s_mov_b32 s4, 03033; GFX11-NEXT: s_cbranch_scc0 .LBB17_43034; GFX11-NEXT: ; %bb.1: ; %Flow3035; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s43036; GFX11-NEXT: s_cbranch_vccnz .LBB17_33037; GFX11-NEXT: .LBB17_2: ; %cmp.true3038; GFX11-NEXT: s_add_i32 s23, s23, 33039; GFX11-NEXT: s_add_i32 s22, s22, 33040; GFX11-NEXT: s_add_i32 s21, s21, 33041; GFX11-NEXT: s_add_i32 s20, s20, 33042; GFX11-NEXT: s_add_i32 s19, s19, 33043; GFX11-NEXT: s_add_i32 s18, s18, 33044; GFX11-NEXT: s_add_i32 s17, s17, 33045; GFX11-NEXT: s_add_i32 s16, s16, 33046; GFX11-NEXT: s_add_i32 s3, s3, 33047; GFX11-NEXT: s_add_i32 s2, s2, 33048; GFX11-NEXT: s_add_i32 s1, s1, 33049; GFX11-NEXT: s_add_i32 s0, s0, 33050; GFX11-NEXT: .LBB17_3: ; %end3051; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3052; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s13053; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s33054; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s173055; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s193056; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s213057; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s233058; GFX11-NEXT: s_setpc_b64 s[30:31]3059; GFX11-NEXT: .LBB17_4:3060; GFX11-NEXT: s_branch .LBB17_23061 %cmp = icmp eq i32 %b, 03062 br i1 %cmp, label %cmp.true, label %cmp.false3063 3064cmp.true:3065 %a1 = add <12 x i32> %a, splat (i32 3)3066 %a2 = bitcast <12 x i32> %a1 to <24 x half>3067 br label %end3068 3069cmp.false:3070 %a3 = bitcast <12 x i32> %a to <24 x half>3071 br label %end3072 3073end:3074 %phi = phi <24 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]3075 ret <24 x half> %phi3076}3077 3078define <12 x i32> @bitcast_v24f16_to_v12i32(<24 x half> %a, i32 %b) {3079; SI-LABEL: bitcast_v24f16_to_v12i32:3080; SI: ; %bb.0:3081; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3082; SI-NEXT: v_cvt_f16_f32_e32 v50, v13083; SI-NEXT: v_cvt_f16_f32_e32 v49, v03084; SI-NEXT: v_cvt_f16_f32_e32 v48, v33085; SI-NEXT: v_cvt_f16_f32_e32 v39, v23086; SI-NEXT: v_cvt_f16_f32_e32 v38, v53087; SI-NEXT: v_cvt_f16_f32_e32 v37, v43088; SI-NEXT: v_cvt_f16_f32_e32 v36, v73089; SI-NEXT: v_cvt_f16_f32_e32 v35, v63090; SI-NEXT: v_cvt_f16_f32_e32 v34, v93091; SI-NEXT: v_cvt_f16_f32_e32 v33, v83092; SI-NEXT: v_cvt_f16_f32_e32 v32, v113093; SI-NEXT: v_cvt_f16_f32_e32 v31, v103094; SI-NEXT: v_cvt_f16_f32_e32 v30, v133095; SI-NEXT: v_cvt_f16_f32_e32 v29, v123096; SI-NEXT: v_cvt_f16_f32_e32 v28, v153097; SI-NEXT: v_cvt_f16_f32_e32 v27, v143098; SI-NEXT: v_cvt_f16_f32_e32 v26, v173099; SI-NEXT: v_cvt_f16_f32_e32 v25, v163100; SI-NEXT: v_cvt_f16_f32_e32 v17, v193101; SI-NEXT: v_cvt_f16_f32_e32 v16, v183102; SI-NEXT: v_cvt_f16_f32_e32 v15, v213103; SI-NEXT: v_cvt_f16_f32_e32 v14, v203104; SI-NEXT: v_cvt_f16_f32_e32 v13, v233105; SI-NEXT: v_cvt_f16_f32_e32 v12, v223106; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v243107; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr113108; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc3109; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3110; SI-NEXT: s_cbranch_execnz .LBB18_33111; SI-NEXT: ; %bb.1: ; %Flow3112; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3113; SI-NEXT: s_cbranch_execnz .LBB18_43114; SI-NEXT: .LBB18_2: ; %end3115; SI-NEXT: s_or_b64 exec, exec, s[4:5]3116; SI-NEXT: s_setpc_b64 s[30:31]3117; SI-NEXT: .LBB18_3: ; %cmp.false3118; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v503119; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v483120; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v383121; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v363122; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v343123; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v323124; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v303125; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v283126; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v263127; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v173128; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v153129; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v133130; SI-NEXT: v_or_b32_e32 v0, v49, v03131; SI-NEXT: v_or_b32_e32 v1, v39, v13132; SI-NEXT: v_or_b32_e32 v2, v37, v23133; SI-NEXT: v_or_b32_e32 v3, v35, v33134; SI-NEXT: v_or_b32_e32 v4, v33, v43135; SI-NEXT: v_or_b32_e32 v5, v31, v53136; SI-NEXT: v_or_b32_e32 v6, v29, v63137; SI-NEXT: v_or_b32_e32 v7, v27, v73138; SI-NEXT: v_or_b32_e32 v8, v25, v83139; SI-NEXT: v_or_b32_e32 v9, v16, v93140; SI-NEXT: v_or_b32_e32 v10, v14, v103141; SI-NEXT: v_or_b32_e32 v11, v12, v113142; SI-NEXT: ; implicit-def: $vgpr503143; SI-NEXT: ; implicit-def: $vgpr493144; SI-NEXT: ; implicit-def: $vgpr483145; SI-NEXT: ; implicit-def: $vgpr393146; SI-NEXT: ; implicit-def: $vgpr383147; SI-NEXT: ; implicit-def: $vgpr373148; SI-NEXT: ; implicit-def: $vgpr363149; SI-NEXT: ; implicit-def: $vgpr353150; SI-NEXT: ; implicit-def: $vgpr343151; SI-NEXT: ; implicit-def: $vgpr333152; SI-NEXT: ; implicit-def: $vgpr323153; SI-NEXT: ; implicit-def: $vgpr313154; SI-NEXT: ; implicit-def: $vgpr303155; SI-NEXT: ; implicit-def: $vgpr293156; SI-NEXT: ; implicit-def: $vgpr283157; SI-NEXT: ; implicit-def: $vgpr273158; SI-NEXT: ; implicit-def: $vgpr263159; SI-NEXT: ; implicit-def: $vgpr253160; SI-NEXT: ; implicit-def: $vgpr173161; SI-NEXT: ; implicit-def: $vgpr163162; SI-NEXT: ; implicit-def: $vgpr153163; SI-NEXT: ; implicit-def: $vgpr143164; SI-NEXT: ; implicit-def: $vgpr133165; SI-NEXT: ; implicit-def: $vgpr123166; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3167; SI-NEXT: s_cbranch_execz .LBB18_23168; SI-NEXT: .LBB18_4: ; %cmp.true3169; SI-NEXT: v_cvt_f32_f16_e32 v0, v503170; SI-NEXT: v_cvt_f32_f16_e32 v2, v483171; SI-NEXT: v_cvt_f32_f16_e32 v1, v493172; SI-NEXT: v_cvt_f32_f16_e32 v3, v393173; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v03174; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v23175; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v13176; SI-NEXT: v_cvt_f16_f32_e32 v0, v03177; SI-NEXT: v_cvt_f16_f32_e32 v2, v23178; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v33179; SI-NEXT: v_cvt_f16_f32_e32 v1, v13180; SI-NEXT: v_cvt_f16_f32_e32 v3, v33181; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v03182; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v23183; SI-NEXT: v_or_b32_e32 v0, v1, v03184; SI-NEXT: v_or_b32_e32 v1, v3, v23185; SI-NEXT: v_cvt_f32_f16_e32 v2, v383186; SI-NEXT: v_cvt_f32_f16_e32 v3, v373187; SI-NEXT: v_cvt_f32_f16_e32 v4, v363188; SI-NEXT: v_cvt_f32_f16_e32 v5, v353189; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v23190; SI-NEXT: v_cvt_f16_f32_e32 v2, v23191; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v33192; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v43193; SI-NEXT: v_cvt_f16_f32_e32 v3, v33194; SI-NEXT: v_cvt_f16_f32_e32 v4, v43195; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v53196; SI-NEXT: v_cvt_f16_f32_e32 v5, v53197; SI-NEXT: v_cvt_f32_f16_e32 v6, v343198; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v23199; SI-NEXT: v_or_b32_e32 v2, v3, v23200; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v43201; SI-NEXT: v_or_b32_e32 v3, v5, v33202; SI-NEXT: v_cvt_f32_f16_e32 v4, v333203; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v63204; SI-NEXT: v_cvt_f32_f16_e32 v6, v323205; SI-NEXT: v_cvt_f16_f32_e32 v5, v53206; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v43207; SI-NEXT: v_cvt_f16_f32_e32 v4, v43208; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v63209; SI-NEXT: v_cvt_f16_f32_e32 v6, v63210; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v53211; SI-NEXT: v_cvt_f32_f16_e32 v7, v313212; SI-NEXT: v_or_b32_e32 v4, v4, v53213; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v63214; SI-NEXT: v_cvt_f32_f16_e32 v6, v303215; SI-NEXT: v_cvt_f32_f16_e32 v8, v293216; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v73217; SI-NEXT: v_cvt_f16_f32_e32 v7, v73218; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v63219; SI-NEXT: v_cvt_f16_f32_e32 v6, v63220; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v83221; SI-NEXT: v_cvt_f16_f32_e32 v8, v83222; SI-NEXT: v_or_b32_e32 v5, v7, v53223; SI-NEXT: v_cvt_f32_f16_e32 v7, v283224; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v63225; SI-NEXT: v_or_b32_e32 v6, v8, v63226; SI-NEXT: v_cvt_f32_f16_e32 v8, v273227; SI-NEXT: v_cvt_f32_f16_e32 v9, v263228; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v73229; SI-NEXT: v_cvt_f16_f32_e32 v7, v73230; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v83231; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v93232; SI-NEXT: v_cvt_f16_f32_e32 v8, v83233; SI-NEXT: v_cvt_f16_f32_e32 v9, v93234; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v73235; SI-NEXT: v_cvt_f32_f16_e32 v10, v253236; SI-NEXT: v_or_b32_e32 v7, v8, v73237; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v93238; SI-NEXT: v_cvt_f32_f16_e32 v9, v173239; SI-NEXT: v_cvt_f32_f16_e32 v11, v163240; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v103241; SI-NEXT: v_cvt_f16_f32_e32 v10, v103242; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v93243; SI-NEXT: v_cvt_f16_f32_e32 v9, v93244; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v113245; SI-NEXT: v_cvt_f16_f32_e32 v11, v113246; SI-NEXT: v_or_b32_e32 v8, v10, v83247; SI-NEXT: v_cvt_f32_f16_e32 v10, v153248; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v93249; SI-NEXT: v_or_b32_e32 v9, v11, v93250; SI-NEXT: v_cvt_f32_f16_e32 v11, v143251; SI-NEXT: v_cvt_f32_f16_e32 v13, v133252; SI-NEXT: v_cvt_f32_f16_e32 v12, v123253; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v103254; SI-NEXT: v_cvt_f16_f32_e32 v10, v103255; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v113256; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v133257; SI-NEXT: v_cvt_f16_f32_e32 v11, v113258; SI-NEXT: v_cvt_f16_f32_e32 v13, v133259; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v123260; SI-NEXT: v_cvt_f16_f32_e32 v12, v123261; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v103262; SI-NEXT: v_or_b32_e32 v10, v11, v103263; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v133264; SI-NEXT: v_or_b32_e32 v11, v12, v113265; SI-NEXT: s_or_b64 exec, exec, s[4:5]3266; SI-NEXT: s_setpc_b64 s[30:31]3267;3268; VI-LABEL: bitcast_v24f16_to_v12i32:3269; VI: ; %bb.0:3270; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3271; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v123272; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc3273; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3274; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3275; VI-NEXT: s_cbranch_execz .LBB18_23276; VI-NEXT: ; %bb.1: ; %cmp.true3277; VI-NEXT: v_mov_b32_e32 v12, 0x2003278; VI-NEXT: v_add_f16_sdwa v13, v11, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3279; VI-NEXT: v_add_f16_e32 v11, 0x200, v113280; VI-NEXT: v_or_b32_e32 v11, v11, v133281; VI-NEXT: v_add_f16_sdwa v13, v10, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3282; VI-NEXT: v_add_f16_e32 v10, 0x200, v103283; VI-NEXT: v_or_b32_e32 v10, v10, v133284; VI-NEXT: v_add_f16_sdwa v13, v9, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3285; VI-NEXT: v_add_f16_e32 v9, 0x200, v93286; VI-NEXT: v_or_b32_e32 v9, v9, v133287; VI-NEXT: v_add_f16_sdwa v13, v8, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3288; VI-NEXT: v_add_f16_e32 v8, 0x200, v83289; VI-NEXT: v_or_b32_e32 v8, v8, v133290; VI-NEXT: v_add_f16_sdwa v13, v7, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3291; VI-NEXT: v_add_f16_e32 v7, 0x200, v73292; VI-NEXT: v_or_b32_e32 v7, v7, v133293; VI-NEXT: v_add_f16_sdwa v13, v6, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3294; VI-NEXT: v_add_f16_e32 v6, 0x200, v63295; VI-NEXT: v_or_b32_e32 v6, v6, v133296; VI-NEXT: v_add_f16_sdwa v13, v5, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3297; VI-NEXT: v_add_f16_e32 v5, 0x200, v53298; VI-NEXT: v_or_b32_e32 v5, v5, v133299; VI-NEXT: v_add_f16_sdwa v13, v4, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3300; VI-NEXT: v_add_f16_e32 v4, 0x200, v43301; VI-NEXT: v_or_b32_e32 v4, v4, v133302; VI-NEXT: v_add_f16_sdwa v13, v3, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3303; VI-NEXT: v_add_f16_e32 v3, 0x200, v33304; VI-NEXT: v_or_b32_e32 v3, v3, v133305; VI-NEXT: v_add_f16_sdwa v13, v2, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3306; VI-NEXT: v_add_f16_e32 v2, 0x200, v23307; VI-NEXT: v_or_b32_e32 v2, v2, v133308; VI-NEXT: v_add_f16_sdwa v13, v1, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3309; VI-NEXT: v_add_f16_e32 v1, 0x200, v13310; VI-NEXT: v_add_f16_sdwa v12, v0, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3311; VI-NEXT: v_add_f16_e32 v0, 0x200, v03312; VI-NEXT: v_or_b32_e32 v1, v1, v133313; VI-NEXT: v_or_b32_e32 v0, v0, v123314; VI-NEXT: .LBB18_2: ; %end3315; VI-NEXT: s_or_b64 exec, exec, s[4:5]3316; VI-NEXT: s_setpc_b64 s[30:31]3317;3318; GFX9-LABEL: bitcast_v24f16_to_v12i32:3319; GFX9: ; %bb.0:3320; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3321; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v123322; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc3323; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3324; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3325; GFX9-NEXT: s_cbranch_execz .LBB18_23326; GFX9-NEXT: ; %bb.1: ; %cmp.true3327; GFX9-NEXT: s_movk_i32 s6, 0x2003328; GFX9-NEXT: v_pk_add_f16 v11, v11, s6 op_sel_hi:[1,0]3329; GFX9-NEXT: v_pk_add_f16 v10, v10, s6 op_sel_hi:[1,0]3330; GFX9-NEXT: v_pk_add_f16 v9, v9, s6 op_sel_hi:[1,0]3331; GFX9-NEXT: v_pk_add_f16 v8, v8, s6 op_sel_hi:[1,0]3332; GFX9-NEXT: v_pk_add_f16 v7, v7, s6 op_sel_hi:[1,0]3333; GFX9-NEXT: v_pk_add_f16 v6, v6, s6 op_sel_hi:[1,0]3334; GFX9-NEXT: v_pk_add_f16 v5, v5, s6 op_sel_hi:[1,0]3335; GFX9-NEXT: v_pk_add_f16 v4, v4, s6 op_sel_hi:[1,0]3336; GFX9-NEXT: v_pk_add_f16 v3, v3, s6 op_sel_hi:[1,0]3337; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0]3338; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0]3339; GFX9-NEXT: v_pk_add_f16 v0, v0, s6 op_sel_hi:[1,0]3340; GFX9-NEXT: .LBB18_2: ; %end3341; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]3342; GFX9-NEXT: s_setpc_b64 s[30:31]3343;3344; GFX11-LABEL: bitcast_v24f16_to_v12i32:3345; GFX11: ; %bb.0:3346; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3347; GFX11-NEXT: s_mov_b32 s0, exec_lo3348; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v123349; GFX11-NEXT: s_xor_b32 s0, exec_lo, s03350; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3351; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s03352; GFX11-NEXT: s_cbranch_execz .LBB18_23353; GFX11-NEXT: ; %bb.1: ; %cmp.true3354; GFX11-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]3355; GFX11-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]3356; GFX11-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]3357; GFX11-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]3358; GFX11-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]3359; GFX11-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]3360; GFX11-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]3361; GFX11-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]3362; GFX11-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]3363; GFX11-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]3364; GFX11-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]3365; GFX11-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]3366; GFX11-NEXT: .LBB18_2: ; %end3367; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s03368; GFX11-NEXT: s_setpc_b64 s[30:31]3369 %cmp = icmp eq i32 %b, 03370 br i1 %cmp, label %cmp.true, label %cmp.false3371 3372cmp.true:3373 %a1 = fadd <24 x half> %a, splat (half 0xH0200)3374 %a2 = bitcast <24 x half> %a1 to <12 x i32>3375 br label %end3376 3377cmp.false:3378 %a3 = bitcast <24 x half> %a to <12 x i32>3379 br label %end3380 3381end:3382 %phi = phi <12 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]3383 ret <12 x i32> %phi3384}3385 3386define inreg <12 x i32> @bitcast_v24f16_to_v12i32_scalar(<24 x half> inreg %a, i32 inreg %b) {3387; SI-LABEL: bitcast_v24f16_to_v12i32_scalar:3388; SI: ; %bb.0:3389; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3390; SI-NEXT: v_cvt_f16_f32_e32 v35, s173391; SI-NEXT: v_cvt_f16_f32_e32 v34, s163392; SI-NEXT: v_cvt_f16_f32_e32 v33, s193393; SI-NEXT: v_cvt_f16_f32_e32 v32, s183394; SI-NEXT: v_cvt_f16_f32_e32 v31, s213395; SI-NEXT: v_cvt_f16_f32_e32 v30, s203396; SI-NEXT: v_cvt_f16_f32_e32 v29, s233397; SI-NEXT: v_cvt_f16_f32_e32 v28, s223398; SI-NEXT: v_cvt_f16_f32_e32 v26, s253399; SI-NEXT: v_cvt_f16_f32_e32 v24, s243400; SI-NEXT: v_cvt_f16_f32_e32 v21, v13401; SI-NEXT: v_cvt_f16_f32_e32 v20, v03402; SI-NEXT: v_cvt_f16_f32_e32 v19, v33403; SI-NEXT: v_cvt_f16_f32_e32 v18, v23404; SI-NEXT: v_cvt_f16_f32_e32 v17, v53405; SI-NEXT: v_cvt_f16_f32_e32 v16, v43406; SI-NEXT: v_cvt_f16_f32_e32 v15, v73407; SI-NEXT: v_cvt_f16_f32_e32 v14, v63408; SI-NEXT: v_cvt_f16_f32_e32 v13, v93409; SI-NEXT: v_cvt_f16_f32_e32 v12, v83410; SI-NEXT: v_cvt_f16_f32_e32 v27, s273411; SI-NEXT: v_cvt_f16_f32_e32 v25, s263412; SI-NEXT: v_cvt_f16_f32_e32 v23, s293413; SI-NEXT: v_cvt_f16_f32_e32 v22, s283414; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v103415; SI-NEXT: s_and_b64 s[4:5], vcc, exec3416; SI-NEXT: s_cbranch_scc0 .LBB19_43417; SI-NEXT: ; %bb.1: ; %cmp.false3418; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v353419; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v333420; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v313421; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v293422; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v263423; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v273424; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v233425; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v213426; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v193427; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v173428; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v153429; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v133430; SI-NEXT: v_or_b32_e32 v0, v34, v03431; SI-NEXT: v_or_b32_e32 v1, v32, v13432; SI-NEXT: v_or_b32_e32 v2, v30, v23433; SI-NEXT: v_or_b32_e32 v3, v28, v33434; SI-NEXT: v_or_b32_e32 v4, v24, v43435; SI-NEXT: v_or_b32_e32 v5, v25, v53436; SI-NEXT: v_or_b32_e32 v6, v22, v63437; SI-NEXT: v_or_b32_e32 v7, v20, v73438; SI-NEXT: v_or_b32_e32 v8, v18, v83439; SI-NEXT: v_or_b32_e32 v9, v16, v93440; SI-NEXT: v_or_b32_e32 v10, v14, v103441; SI-NEXT: v_or_b32_e32 v11, v12, v113442; SI-NEXT: s_cbranch_execnz .LBB19_33443; SI-NEXT: .LBB19_2: ; %cmp.true3444; SI-NEXT: v_cvt_f32_f16_e32 v0, v353445; SI-NEXT: v_cvt_f32_f16_e32 v1, v343446; SI-NEXT: v_cvt_f32_f16_e32 v2, v333447; SI-NEXT: v_cvt_f32_f16_e32 v3, v323448; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v03449; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v13450; SI-NEXT: v_cvt_f16_f32_e32 v0, v03451; SI-NEXT: v_cvt_f16_f32_e32 v1, v13452; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v23453; SI-NEXT: v_cvt_f16_f32_e32 v2, v23454; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v03455; SI-NEXT: v_or_b32_e32 v0, v1, v03456; SI-NEXT: v_cvt_f32_f16_e32 v1, v313457; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v33458; SI-NEXT: v_cvt_f16_f32_e32 v3, v33459; SI-NEXT: v_cvt_f32_f16_e32 v5, v283460; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v13461; SI-NEXT: v_cvt_f16_f32_e32 v4, v13462; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v23463; SI-NEXT: v_cvt_f32_f16_e32 v2, v303464; SI-NEXT: v_or_b32_e32 v1, v3, v13465; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v43466; SI-NEXT: v_cvt_f32_f16_e32 v4, v293467; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v23468; SI-NEXT: v_cvt_f16_f32_e32 v2, v23469; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v53470; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v43471; SI-NEXT: v_cvt_f16_f32_e32 v4, v43472; SI-NEXT: v_cvt_f16_f32_e32 v5, v53473; SI-NEXT: v_cvt_f32_f16_e32 v6, v263474; SI-NEXT: v_or_b32_e32 v2, v2, v33475; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v43476; SI-NEXT: v_or_b32_e32 v3, v5, v33477; SI-NEXT: v_cvt_f32_f16_e32 v4, v243478; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v63479; SI-NEXT: v_cvt_f32_f16_e32 v6, v273480; SI-NEXT: v_cvt_f16_f32_e32 v5, v53481; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v43482; SI-NEXT: v_cvt_f16_f32_e32 v4, v43483; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v63484; SI-NEXT: v_cvt_f16_f32_e32 v6, v63485; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v53486; SI-NEXT: v_cvt_f32_f16_e32 v7, v253487; SI-NEXT: v_or_b32_e32 v4, v4, v53488; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v63489; SI-NEXT: v_cvt_f32_f16_e32 v6, v233490; SI-NEXT: v_cvt_f32_f16_e32 v8, v223491; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v73492; SI-NEXT: v_cvt_f16_f32_e32 v7, v73493; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v63494; SI-NEXT: v_cvt_f16_f32_e32 v6, v63495; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v83496; SI-NEXT: v_cvt_f16_f32_e32 v8, v83497; SI-NEXT: v_or_b32_e32 v5, v7, v53498; SI-NEXT: v_cvt_f32_f16_e32 v7, v213499; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v63500; SI-NEXT: v_or_b32_e32 v6, v8, v63501; SI-NEXT: v_cvt_f32_f16_e32 v8, v203502; SI-NEXT: v_cvt_f32_f16_e32 v9, v193503; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v73504; SI-NEXT: v_cvt_f16_f32_e32 v7, v73505; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v83506; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v93507; SI-NEXT: v_cvt_f16_f32_e32 v8, v83508; SI-NEXT: v_cvt_f16_f32_e32 v9, v93509; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v73510; SI-NEXT: v_cvt_f32_f16_e32 v10, v183511; SI-NEXT: v_or_b32_e32 v7, v8, v73512; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v93513; SI-NEXT: v_cvt_f32_f16_e32 v9, v173514; SI-NEXT: v_cvt_f32_f16_e32 v11, v163515; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v103516; SI-NEXT: v_cvt_f16_f32_e32 v10, v103517; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v93518; SI-NEXT: v_cvt_f16_f32_e32 v9, v93519; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v113520; SI-NEXT: v_cvt_f16_f32_e32 v11, v113521; SI-NEXT: v_or_b32_e32 v8, v10, v83522; SI-NEXT: v_cvt_f32_f16_e32 v10, v153523; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v93524; SI-NEXT: v_or_b32_e32 v9, v11, v93525; SI-NEXT: v_cvt_f32_f16_e32 v11, v143526; SI-NEXT: v_cvt_f32_f16_e32 v13, v133527; SI-NEXT: v_cvt_f32_f16_e32 v12, v123528; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v103529; SI-NEXT: v_cvt_f16_f32_e32 v10, v103530; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v113531; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v133532; SI-NEXT: v_cvt_f16_f32_e32 v11, v113533; SI-NEXT: v_cvt_f16_f32_e32 v13, v133534; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v123535; SI-NEXT: v_cvt_f16_f32_e32 v12, v123536; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v103537; SI-NEXT: v_or_b32_e32 v10, v11, v103538; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v133539; SI-NEXT: v_or_b32_e32 v11, v12, v113540; SI-NEXT: .LBB19_3: ; %end3541; SI-NEXT: s_setpc_b64 s[30:31]3542; SI-NEXT: .LBB19_4:3543; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr113544; SI-NEXT: s_branch .LBB19_23545;3546; VI-LABEL: bitcast_v24f16_to_v12i32_scalar:3547; VI: ; %bb.0:3548; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3549; VI-NEXT: s_cmp_lg_u32 s28, 03550; VI-NEXT: s_cbranch_scc0 .LBB19_33551; VI-NEXT: ; %bb.1: ; %cmp.false3552; VI-NEXT: s_cbranch_execnz .LBB19_43553; VI-NEXT: .LBB19_2: ; %cmp.true3554; VI-NEXT: s_lshr_b32 s4, s27, 163555; VI-NEXT: v_mov_b32_e32 v0, 0x2003556; VI-NEXT: v_mov_b32_e32 v1, s43557; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3558; VI-NEXT: v_add_f16_e32 v2, s27, v03559; VI-NEXT: s_lshr_b32 s4, s26, 163560; VI-NEXT: v_or_b32_e32 v11, v2, v13561; VI-NEXT: v_mov_b32_e32 v1, s43562; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3563; VI-NEXT: v_add_f16_e32 v2, s26, v03564; VI-NEXT: s_lshr_b32 s4, s25, 163565; VI-NEXT: v_or_b32_e32 v10, v2, v13566; VI-NEXT: v_mov_b32_e32 v1, s43567; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3568; VI-NEXT: v_add_f16_e32 v2, s25, v03569; VI-NEXT: s_lshr_b32 s4, s24, 163570; VI-NEXT: v_or_b32_e32 v9, v2, v13571; VI-NEXT: v_mov_b32_e32 v1, s43572; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3573; VI-NEXT: v_add_f16_e32 v2, s24, v03574; VI-NEXT: s_lshr_b32 s4, s23, 163575; VI-NEXT: v_or_b32_e32 v8, v2, v13576; VI-NEXT: v_mov_b32_e32 v1, s43577; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3578; VI-NEXT: v_add_f16_e32 v2, s23, v03579; VI-NEXT: s_lshr_b32 s4, s22, 163580; VI-NEXT: v_or_b32_e32 v7, v2, v13581; VI-NEXT: v_mov_b32_e32 v1, s43582; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3583; VI-NEXT: v_add_f16_e32 v2, s22, v03584; VI-NEXT: s_lshr_b32 s4, s21, 163585; VI-NEXT: v_or_b32_e32 v6, v2, v13586; VI-NEXT: v_mov_b32_e32 v1, s43587; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3588; VI-NEXT: v_add_f16_e32 v2, s21, v03589; VI-NEXT: s_lshr_b32 s4, s20, 163590; VI-NEXT: v_or_b32_e32 v5, v2, v13591; VI-NEXT: v_mov_b32_e32 v1, s43592; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3593; VI-NEXT: v_add_f16_e32 v2, s20, v03594; VI-NEXT: s_lshr_b32 s4, s19, 163595; VI-NEXT: v_or_b32_e32 v4, v2, v13596; VI-NEXT: v_mov_b32_e32 v1, s43597; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3598; VI-NEXT: v_add_f16_e32 v2, s19, v03599; VI-NEXT: s_lshr_b32 s4, s18, 163600; VI-NEXT: v_or_b32_e32 v3, v2, v13601; VI-NEXT: v_mov_b32_e32 v1, s43602; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3603; VI-NEXT: v_add_f16_e32 v2, s18, v03604; VI-NEXT: s_lshr_b32 s4, s17, 163605; VI-NEXT: v_or_b32_e32 v2, v2, v13606; VI-NEXT: v_mov_b32_e32 v1, s43607; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3608; VI-NEXT: v_add_f16_e32 v12, s17, v03609; VI-NEXT: s_lshr_b32 s4, s16, 163610; VI-NEXT: v_or_b32_e32 v1, v12, v13611; VI-NEXT: v_mov_b32_e32 v12, s43612; VI-NEXT: v_add_f16_sdwa v12, v12, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3613; VI-NEXT: v_add_f16_e32 v0, s16, v03614; VI-NEXT: v_or_b32_e32 v0, v0, v123615; VI-NEXT: s_setpc_b64 s[30:31]3616; VI-NEXT: .LBB19_3:3617; VI-NEXT: s_branch .LBB19_23618; VI-NEXT: .LBB19_4:3619; VI-NEXT: v_mov_b32_e32 v0, s163620; VI-NEXT: v_mov_b32_e32 v1, s173621; VI-NEXT: v_mov_b32_e32 v2, s183622; VI-NEXT: v_mov_b32_e32 v3, s193623; VI-NEXT: v_mov_b32_e32 v4, s203624; VI-NEXT: v_mov_b32_e32 v5, s213625; VI-NEXT: v_mov_b32_e32 v6, s223626; VI-NEXT: v_mov_b32_e32 v7, s233627; VI-NEXT: v_mov_b32_e32 v8, s243628; VI-NEXT: v_mov_b32_e32 v9, s253629; VI-NEXT: v_mov_b32_e32 v10, s263630; VI-NEXT: v_mov_b32_e32 v11, s273631; VI-NEXT: s_setpc_b64 s[30:31]3632;3633; GFX9-LABEL: bitcast_v24f16_to_v12i32_scalar:3634; GFX9: ; %bb.0:3635; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3636; GFX9-NEXT: s_cmp_lg_u32 s28, 03637; GFX9-NEXT: s_cbranch_scc0 .LBB19_33638; GFX9-NEXT: ; %bb.1: ; %cmp.false3639; GFX9-NEXT: s_cbranch_execnz .LBB19_43640; GFX9-NEXT: .LBB19_2: ; %cmp.true3641; GFX9-NEXT: v_mov_b32_e32 v0, 0x2003642; GFX9-NEXT: v_pk_add_f16 v11, s27, v0 op_sel_hi:[1,0]3643; GFX9-NEXT: v_pk_add_f16 v10, s26, v0 op_sel_hi:[1,0]3644; GFX9-NEXT: v_pk_add_f16 v9, s25, v0 op_sel_hi:[1,0]3645; GFX9-NEXT: v_pk_add_f16 v8, s24, v0 op_sel_hi:[1,0]3646; GFX9-NEXT: v_pk_add_f16 v7, s23, v0 op_sel_hi:[1,0]3647; GFX9-NEXT: v_pk_add_f16 v6, s22, v0 op_sel_hi:[1,0]3648; GFX9-NEXT: v_pk_add_f16 v5, s21, v0 op_sel_hi:[1,0]3649; GFX9-NEXT: v_pk_add_f16 v4, s20, v0 op_sel_hi:[1,0]3650; GFX9-NEXT: v_pk_add_f16 v3, s19, v0 op_sel_hi:[1,0]3651; GFX9-NEXT: v_pk_add_f16 v2, s18, v0 op_sel_hi:[1,0]3652; GFX9-NEXT: v_pk_add_f16 v1, s17, v0 op_sel_hi:[1,0]3653; GFX9-NEXT: v_pk_add_f16 v0, s16, v0 op_sel_hi:[1,0]3654; GFX9-NEXT: s_setpc_b64 s[30:31]3655; GFX9-NEXT: .LBB19_3:3656; GFX9-NEXT: s_branch .LBB19_23657; GFX9-NEXT: .LBB19_4:3658; GFX9-NEXT: v_mov_b32_e32 v0, s163659; GFX9-NEXT: v_mov_b32_e32 v1, s173660; GFX9-NEXT: v_mov_b32_e32 v2, s183661; GFX9-NEXT: v_mov_b32_e32 v3, s193662; GFX9-NEXT: v_mov_b32_e32 v4, s203663; GFX9-NEXT: v_mov_b32_e32 v5, s213664; GFX9-NEXT: v_mov_b32_e32 v6, s223665; GFX9-NEXT: v_mov_b32_e32 v7, s233666; GFX9-NEXT: v_mov_b32_e32 v8, s243667; GFX9-NEXT: v_mov_b32_e32 v9, s253668; GFX9-NEXT: v_mov_b32_e32 v10, s263669; GFX9-NEXT: v_mov_b32_e32 v11, s273670; GFX9-NEXT: s_setpc_b64 s[30:31]3671;3672; GFX11-LABEL: bitcast_v24f16_to_v12i32_scalar:3673; GFX11: ; %bb.0:3674; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3675; GFX11-NEXT: s_mov_b32 s15, s33676; GFX11-NEXT: s_mov_b32 s14, s23677; GFX11-NEXT: s_mov_b32 s13, s13678; GFX11-NEXT: s_mov_b32 s12, s03679; GFX11-NEXT: s_cmp_lg_u32 s24, 03680; GFX11-NEXT: s_mov_b32 s0, 03681; GFX11-NEXT: s_cbranch_scc0 .LBB19_33682; GFX11-NEXT: ; %bb.1: ; %Flow3683; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s03684; GFX11-NEXT: s_cbranch_vccnz .LBB19_43685; GFX11-NEXT: .LBB19_2: ; %cmp.true3686; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s23 op_sel_hi:[0,1]3687; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s22 op_sel_hi:[0,1]3688; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s21 op_sel_hi:[0,1]3689; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s20 op_sel_hi:[0,1]3690; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s19 op_sel_hi:[0,1]3691; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s18 op_sel_hi:[0,1]3692; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s17 op_sel_hi:[0,1]3693; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s16 op_sel_hi:[0,1]3694; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s15 op_sel_hi:[0,1]3695; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s14 op_sel_hi:[0,1]3696; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s13 op_sel_hi:[0,1]3697; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s12 op_sel_hi:[0,1]3698; GFX11-NEXT: s_setpc_b64 s[30:31]3699; GFX11-NEXT: .LBB19_3:3700; GFX11-NEXT: s_branch .LBB19_23701; GFX11-NEXT: .LBB19_4:3702; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s133703; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s153704; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s173705; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s193706; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s213707; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s233708; GFX11-NEXT: s_setpc_b64 s[30:31]3709 %cmp = icmp eq i32 %b, 03710 br i1 %cmp, label %cmp.true, label %cmp.false3711 3712cmp.true:3713 %a1 = fadd <24 x half> %a, splat (half 0xH0200)3714 %a2 = bitcast <24 x half> %a1 to <12 x i32>3715 br label %end3716 3717cmp.false:3718 %a3 = bitcast <24 x half> %a to <12 x i32>3719 br label %end3720 3721end:3722 %phi = phi <12 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]3723 ret <12 x i32> %phi3724}3725 3726define <6 x double> @bitcast_v12f32_to_v6f64(<12 x float> %a, i32 %b) {3727; SI-LABEL: bitcast_v12f32_to_v6f64:3728; SI: ; %bb.0:3729; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3730; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v123731; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc3732; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3733; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3734; SI-NEXT: s_cbranch_execz .LBB20_23735; SI-NEXT: ; %bb.1: ; %cmp.true3736; SI-NEXT: v_add_f32_e32 v11, 1.0, v113737; SI-NEXT: v_add_f32_e32 v10, 1.0, v103738; SI-NEXT: v_add_f32_e32 v9, 1.0, v93739; SI-NEXT: v_add_f32_e32 v8, 1.0, v83740; SI-NEXT: v_add_f32_e32 v7, 1.0, v73741; SI-NEXT: v_add_f32_e32 v6, 1.0, v63742; SI-NEXT: v_add_f32_e32 v5, 1.0, v53743; SI-NEXT: v_add_f32_e32 v4, 1.0, v43744; SI-NEXT: v_add_f32_e32 v3, 1.0, v33745; SI-NEXT: v_add_f32_e32 v2, 1.0, v23746; SI-NEXT: v_add_f32_e32 v1, 1.0, v13747; SI-NEXT: v_add_f32_e32 v0, 1.0, v03748; SI-NEXT: .LBB20_2: ; %end3749; SI-NEXT: s_or_b64 exec, exec, s[4:5]3750; SI-NEXT: s_setpc_b64 s[30:31]3751;3752; VI-LABEL: bitcast_v12f32_to_v6f64:3753; VI: ; %bb.0:3754; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3755; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v123756; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc3757; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3758; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3759; VI-NEXT: s_cbranch_execz .LBB20_23760; VI-NEXT: ; %bb.1: ; %cmp.true3761; VI-NEXT: v_add_f32_e32 v11, 1.0, v113762; VI-NEXT: v_add_f32_e32 v10, 1.0, v103763; VI-NEXT: v_add_f32_e32 v9, 1.0, v93764; VI-NEXT: v_add_f32_e32 v8, 1.0, v83765; VI-NEXT: v_add_f32_e32 v7, 1.0, v73766; VI-NEXT: v_add_f32_e32 v6, 1.0, v63767; VI-NEXT: v_add_f32_e32 v5, 1.0, v53768; VI-NEXT: v_add_f32_e32 v4, 1.0, v43769; VI-NEXT: v_add_f32_e32 v3, 1.0, v33770; VI-NEXT: v_add_f32_e32 v2, 1.0, v23771; VI-NEXT: v_add_f32_e32 v1, 1.0, v13772; VI-NEXT: v_add_f32_e32 v0, 1.0, v03773; VI-NEXT: .LBB20_2: ; %end3774; VI-NEXT: s_or_b64 exec, exec, s[4:5]3775; VI-NEXT: s_setpc_b64 s[30:31]3776;3777; GFX9-LABEL: bitcast_v12f32_to_v6f64:3778; GFX9: ; %bb.0:3779; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3780; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v123781; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc3782; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3783; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3784; GFX9-NEXT: s_cbranch_execz .LBB20_23785; GFX9-NEXT: ; %bb.1: ; %cmp.true3786; GFX9-NEXT: v_add_f32_e32 v11, 1.0, v113787; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v103788; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v93789; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v83790; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v73791; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v63792; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v53793; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v43794; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v33795; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v23796; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v13797; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v03798; GFX9-NEXT: .LBB20_2: ; %end3799; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]3800; GFX9-NEXT: s_setpc_b64 s[30:31]3801;3802; GFX11-LABEL: bitcast_v12f32_to_v6f64:3803; GFX11: ; %bb.0:3804; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3805; GFX11-NEXT: s_mov_b32 s0, exec_lo3806; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v123807; GFX11-NEXT: s_xor_b32 s0, exec_lo, s03808; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3809; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s03810; GFX11-NEXT: ; %bb.1: ; %cmp.true3811; GFX11-NEXT: v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v103812; GFX11-NEXT: v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v83813; GFX11-NEXT: v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v63814; GFX11-NEXT: v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v43815; GFX11-NEXT: v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v23816; GFX11-NEXT: v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v03817; GFX11-NEXT: ; %bb.2: ; %end3818; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s03819; GFX11-NEXT: s_setpc_b64 s[30:31]3820 %cmp = icmp eq i32 %b, 03821 br i1 %cmp, label %cmp.true, label %cmp.false3822 3823cmp.true:3824 %a1 = fadd <12 x float> %a, splat (float 1.000000e+00)3825 %a2 = bitcast <12 x float> %a1 to <6 x double>3826 br label %end3827 3828cmp.false:3829 %a3 = bitcast <12 x float> %a to <6 x double>3830 br label %end3831 3832end:3833 %phi = phi <6 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]3834 ret <6 x double> %phi3835}3836 3837define inreg <6 x double> @bitcast_v12f32_to_v6f64_scalar(<12 x float> inreg %a, i32 inreg %b) {3838; SI-LABEL: bitcast_v12f32_to_v6f64_scalar:3839; SI: ; %bb.0:3840; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3841; SI-NEXT: s_cmp_lg_u32 s28, 03842; SI-NEXT: s_cbranch_scc0 .LBB21_33843; SI-NEXT: ; %bb.1: ; %cmp.false3844; SI-NEXT: s_cbranch_execnz .LBB21_43845; SI-NEXT: .LBB21_2: ; %cmp.true3846; SI-NEXT: v_add_f32_e64 v11, s27, 1.03847; SI-NEXT: v_add_f32_e64 v10, s26, 1.03848; SI-NEXT: v_add_f32_e64 v9, s25, 1.03849; SI-NEXT: v_add_f32_e64 v8, s24, 1.03850; SI-NEXT: v_add_f32_e64 v7, s23, 1.03851; SI-NEXT: v_add_f32_e64 v6, s22, 1.03852; SI-NEXT: v_add_f32_e64 v5, s21, 1.03853; SI-NEXT: v_add_f32_e64 v4, s20, 1.03854; SI-NEXT: v_add_f32_e64 v3, s19, 1.03855; SI-NEXT: v_add_f32_e64 v2, s18, 1.03856; SI-NEXT: v_add_f32_e64 v1, s17, 1.03857; SI-NEXT: v_add_f32_e64 v0, s16, 1.03858; SI-NEXT: s_setpc_b64 s[30:31]3859; SI-NEXT: .LBB21_3:3860; SI-NEXT: s_branch .LBB21_23861; SI-NEXT: .LBB21_4:3862; SI-NEXT: v_mov_b32_e32 v0, s163863; SI-NEXT: v_mov_b32_e32 v1, s173864; SI-NEXT: v_mov_b32_e32 v2, s183865; SI-NEXT: v_mov_b32_e32 v3, s193866; SI-NEXT: v_mov_b32_e32 v4, s203867; SI-NEXT: v_mov_b32_e32 v5, s213868; SI-NEXT: v_mov_b32_e32 v6, s223869; SI-NEXT: v_mov_b32_e32 v7, s233870; SI-NEXT: v_mov_b32_e32 v8, s243871; SI-NEXT: v_mov_b32_e32 v9, s253872; SI-NEXT: v_mov_b32_e32 v10, s263873; SI-NEXT: v_mov_b32_e32 v11, s273874; SI-NEXT: v_mov_b32_e32 v12, s283875; SI-NEXT: v_mov_b32_e32 v13, s293876; SI-NEXT: v_mov_b32_e32 v14, s303877; SI-NEXT: v_mov_b32_e32 v15, s313878; SI-NEXT: s_setpc_b64 s[30:31]3879;3880; VI-LABEL: bitcast_v12f32_to_v6f64_scalar:3881; VI: ; %bb.0:3882; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3883; VI-NEXT: s_cmp_lg_u32 s28, 03884; VI-NEXT: s_cbranch_scc0 .LBB21_33885; VI-NEXT: ; %bb.1: ; %cmp.false3886; VI-NEXT: s_cbranch_execnz .LBB21_43887; VI-NEXT: .LBB21_2: ; %cmp.true3888; VI-NEXT: v_add_f32_e64 v11, s27, 1.03889; VI-NEXT: v_add_f32_e64 v10, s26, 1.03890; VI-NEXT: v_add_f32_e64 v9, s25, 1.03891; VI-NEXT: v_add_f32_e64 v8, s24, 1.03892; VI-NEXT: v_add_f32_e64 v7, s23, 1.03893; VI-NEXT: v_add_f32_e64 v6, s22, 1.03894; VI-NEXT: v_add_f32_e64 v5, s21, 1.03895; VI-NEXT: v_add_f32_e64 v4, s20, 1.03896; VI-NEXT: v_add_f32_e64 v3, s19, 1.03897; VI-NEXT: v_add_f32_e64 v2, s18, 1.03898; VI-NEXT: v_add_f32_e64 v1, s17, 1.03899; VI-NEXT: v_add_f32_e64 v0, s16, 1.03900; VI-NEXT: s_setpc_b64 s[30:31]3901; VI-NEXT: .LBB21_3:3902; VI-NEXT: s_branch .LBB21_23903; VI-NEXT: .LBB21_4:3904; VI-NEXT: v_mov_b32_e32 v0, s163905; VI-NEXT: v_mov_b32_e32 v1, s173906; VI-NEXT: v_mov_b32_e32 v2, s183907; VI-NEXT: v_mov_b32_e32 v3, s193908; VI-NEXT: v_mov_b32_e32 v4, s203909; VI-NEXT: v_mov_b32_e32 v5, s213910; VI-NEXT: v_mov_b32_e32 v6, s223911; VI-NEXT: v_mov_b32_e32 v7, s233912; VI-NEXT: v_mov_b32_e32 v8, s243913; VI-NEXT: v_mov_b32_e32 v9, s253914; VI-NEXT: v_mov_b32_e32 v10, s263915; VI-NEXT: v_mov_b32_e32 v11, s273916; VI-NEXT: v_mov_b32_e32 v12, s283917; VI-NEXT: v_mov_b32_e32 v13, s293918; VI-NEXT: v_mov_b32_e32 v14, s303919; VI-NEXT: v_mov_b32_e32 v15, s313920; VI-NEXT: s_setpc_b64 s[30:31]3921;3922; GFX9-LABEL: bitcast_v12f32_to_v6f64_scalar:3923; GFX9: ; %bb.0:3924; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3925; GFX9-NEXT: s_cmp_lg_u32 s28, 03926; GFX9-NEXT: s_cbranch_scc0 .LBB21_33927; GFX9-NEXT: ; %bb.1: ; %cmp.false3928; GFX9-NEXT: s_cbranch_execnz .LBB21_43929; GFX9-NEXT: .LBB21_2: ; %cmp.true3930; GFX9-NEXT: v_add_f32_e64 v11, s27, 1.03931; GFX9-NEXT: v_add_f32_e64 v10, s26, 1.03932; GFX9-NEXT: v_add_f32_e64 v9, s25, 1.03933; GFX9-NEXT: v_add_f32_e64 v8, s24, 1.03934; GFX9-NEXT: v_add_f32_e64 v7, s23, 1.03935; GFX9-NEXT: v_add_f32_e64 v6, s22, 1.03936; GFX9-NEXT: v_add_f32_e64 v5, s21, 1.03937; GFX9-NEXT: v_add_f32_e64 v4, s20, 1.03938; GFX9-NEXT: v_add_f32_e64 v3, s19, 1.03939; GFX9-NEXT: v_add_f32_e64 v2, s18, 1.03940; GFX9-NEXT: v_add_f32_e64 v1, s17, 1.03941; GFX9-NEXT: v_add_f32_e64 v0, s16, 1.03942; GFX9-NEXT: s_setpc_b64 s[30:31]3943; GFX9-NEXT: .LBB21_3:3944; GFX9-NEXT: s_branch .LBB21_23945; GFX9-NEXT: .LBB21_4:3946; GFX9-NEXT: v_mov_b32_e32 v0, s163947; GFX9-NEXT: v_mov_b32_e32 v1, s173948; GFX9-NEXT: v_mov_b32_e32 v2, s183949; GFX9-NEXT: v_mov_b32_e32 v3, s193950; GFX9-NEXT: v_mov_b32_e32 v4, s203951; GFX9-NEXT: v_mov_b32_e32 v5, s213952; GFX9-NEXT: v_mov_b32_e32 v6, s223953; GFX9-NEXT: v_mov_b32_e32 v7, s233954; GFX9-NEXT: v_mov_b32_e32 v8, s243955; GFX9-NEXT: v_mov_b32_e32 v9, s253956; GFX9-NEXT: v_mov_b32_e32 v10, s263957; GFX9-NEXT: v_mov_b32_e32 v11, s273958; GFX9-NEXT: v_mov_b32_e32 v12, s283959; GFX9-NEXT: v_mov_b32_e32 v13, s293960; GFX9-NEXT: v_mov_b32_e32 v14, s303961; GFX9-NEXT: v_mov_b32_e32 v15, s313962; GFX9-NEXT: s_setpc_b64 s[30:31]3963;3964; GFX11-LABEL: bitcast_v12f32_to_v6f64_scalar:3965; GFX11: ; %bb.0:3966; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3967; GFX11-NEXT: s_mov_b32 s15, s33968; GFX11-NEXT: s_mov_b32 s14, s23969; GFX11-NEXT: s_mov_b32 s13, s13970; GFX11-NEXT: s_mov_b32 s12, s03971; GFX11-NEXT: s_cmp_lg_u32 s24, 03972; GFX11-NEXT: s_mov_b32 s0, 03973; GFX11-NEXT: s_cbranch_scc0 .LBB21_33974; GFX11-NEXT: ; %bb.1: ; %Flow3975; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s03976; GFX11-NEXT: s_cbranch_vccnz .LBB21_43977; GFX11-NEXT: .LBB21_2: ; %cmp.true3978; GFX11-NEXT: v_add_f32_e64 v11, s23, 1.03979; GFX11-NEXT: v_add_f32_e64 v10, s22, 1.03980; GFX11-NEXT: v_add_f32_e64 v9, s21, 1.03981; GFX11-NEXT: v_add_f32_e64 v8, s20, 1.03982; GFX11-NEXT: v_add_f32_e64 v7, s19, 1.03983; GFX11-NEXT: v_add_f32_e64 v6, s18, 1.03984; GFX11-NEXT: v_add_f32_e64 v5, s17, 1.03985; GFX11-NEXT: v_add_f32_e64 v4, s16, 1.03986; GFX11-NEXT: v_add_f32_e64 v3, s15, 1.03987; GFX11-NEXT: v_add_f32_e64 v2, s14, 1.03988; GFX11-NEXT: v_add_f32_e64 v1, s13, 1.03989; GFX11-NEXT: v_add_f32_e64 v0, s12, 1.03990; GFX11-NEXT: s_setpc_b64 s[30:31]3991; GFX11-NEXT: .LBB21_3:3992; GFX11-NEXT: s_branch .LBB21_23993; GFX11-NEXT: .LBB21_4:3994; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s133995; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s153996; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s173997; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s193998; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s213999; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s234000; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s254001; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s274002; GFX11-NEXT: s_setpc_b64 s[30:31]4003 %cmp = icmp eq i32 %b, 04004 br i1 %cmp, label %cmp.true, label %cmp.false4005 4006cmp.true:4007 %a1 = fadd <12 x float> %a, splat (float 1.000000e+00)4008 %a2 = bitcast <12 x float> %a1 to <6 x double>4009 br label %end4010 4011cmp.false:4012 %a3 = bitcast <12 x float> %a to <6 x double>4013 br label %end4014 4015end:4016 %phi = phi <6 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]4017 ret <6 x double> %phi4018}4019 4020define <12 x float> @bitcast_v6f64_to_v12f32(<6 x double> %a, i32 %b) {4021; SI-LABEL: bitcast_v6f64_to_v12f32:4022; SI: ; %bb.0:4023; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4024; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124025; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc4026; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4027; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4028; SI-NEXT: s_cbranch_execz .LBB22_24029; SI-NEXT: ; %bb.1: ; %cmp.true4030; SI-NEXT: v_add_f64 v[10:11], v[10:11], 1.04031; SI-NEXT: v_add_f64 v[8:9], v[8:9], 1.04032; SI-NEXT: v_add_f64 v[6:7], v[6:7], 1.04033; SI-NEXT: v_add_f64 v[4:5], v[4:5], 1.04034; SI-NEXT: v_add_f64 v[2:3], v[2:3], 1.04035; SI-NEXT: v_add_f64 v[0:1], v[0:1], 1.04036; SI-NEXT: .LBB22_2: ; %end4037; SI-NEXT: s_or_b64 exec, exec, s[4:5]4038; SI-NEXT: s_setpc_b64 s[30:31]4039;4040; VI-LABEL: bitcast_v6f64_to_v12f32:4041; VI: ; %bb.0:4042; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4043; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124044; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc4045; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4046; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4047; VI-NEXT: s_cbranch_execz .LBB22_24048; VI-NEXT: ; %bb.1: ; %cmp.true4049; VI-NEXT: v_add_f64 v[10:11], v[10:11], 1.04050; VI-NEXT: v_add_f64 v[8:9], v[8:9], 1.04051; VI-NEXT: v_add_f64 v[6:7], v[6:7], 1.04052; VI-NEXT: v_add_f64 v[4:5], v[4:5], 1.04053; VI-NEXT: v_add_f64 v[2:3], v[2:3], 1.04054; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.04055; VI-NEXT: .LBB22_2: ; %end4056; VI-NEXT: s_or_b64 exec, exec, s[4:5]4057; VI-NEXT: s_setpc_b64 s[30:31]4058;4059; GFX9-LABEL: bitcast_v6f64_to_v12f32:4060; GFX9: ; %bb.0:4061; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4062; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124063; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc4064; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4065; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4066; GFX9-NEXT: s_cbranch_execz .LBB22_24067; GFX9-NEXT: ; %bb.1: ; %cmp.true4068; GFX9-NEXT: v_add_f64 v[10:11], v[10:11], 1.04069; GFX9-NEXT: v_add_f64 v[8:9], v[8:9], 1.04070; GFX9-NEXT: v_add_f64 v[6:7], v[6:7], 1.04071; GFX9-NEXT: v_add_f64 v[4:5], v[4:5], 1.04072; GFX9-NEXT: v_add_f64 v[2:3], v[2:3], 1.04073; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.04074; GFX9-NEXT: .LBB22_2: ; %end4075; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]4076; GFX9-NEXT: s_setpc_b64 s[30:31]4077;4078; GFX11-LABEL: bitcast_v6f64_to_v12f32:4079; GFX11: ; %bb.0:4080; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4081; GFX11-NEXT: s_mov_b32 s0, exec_lo4082; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v124083; GFX11-NEXT: s_xor_b32 s0, exec_lo, s04084; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)4085; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s04086; GFX11-NEXT: s_cbranch_execz .LBB22_24087; GFX11-NEXT: ; %bb.1: ; %cmp.true4088; GFX11-NEXT: v_add_f64 v[10:11], v[10:11], 1.04089; GFX11-NEXT: v_add_f64 v[8:9], v[8:9], 1.04090; GFX11-NEXT: v_add_f64 v[6:7], v[6:7], 1.04091; GFX11-NEXT: v_add_f64 v[4:5], v[4:5], 1.04092; GFX11-NEXT: v_add_f64 v[2:3], v[2:3], 1.04093; GFX11-NEXT: v_add_f64 v[0:1], v[0:1], 1.04094; GFX11-NEXT: .LBB22_2: ; %end4095; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s04096; GFX11-NEXT: s_setpc_b64 s[30:31]4097 %cmp = icmp eq i32 %b, 04098 br i1 %cmp, label %cmp.true, label %cmp.false4099 4100cmp.true:4101 %a1 = fadd <6 x double> %a, splat (double 1.000000e+00)4102 %a2 = bitcast <6 x double> %a1 to <12 x float>4103 br label %end4104 4105cmp.false:4106 %a3 = bitcast <6 x double> %a to <12 x float>4107 br label %end4108 4109end:4110 %phi = phi <12 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]4111 ret <12 x float> %phi4112}4113 4114define inreg <12 x float> @bitcast_v6f64_to_v12f32_scalar(<6 x double> inreg %a, i32 inreg %b) {4115; SI-LABEL: bitcast_v6f64_to_v12f32_scalar:4116; SI: ; %bb.0:4117; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4118; SI-NEXT: s_cmp_lg_u32 s28, 04119; SI-NEXT: s_cbranch_scc0 .LBB23_34120; SI-NEXT: ; %bb.1: ; %cmp.false4121; SI-NEXT: s_cbranch_execnz .LBB23_44122; SI-NEXT: .LBB23_2: ; %cmp.true4123; SI-NEXT: v_add_f64 v[10:11], s[26:27], 1.04124; SI-NEXT: v_add_f64 v[8:9], s[24:25], 1.04125; SI-NEXT: v_add_f64 v[6:7], s[22:23], 1.04126; SI-NEXT: v_add_f64 v[4:5], s[20:21], 1.04127; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.04128; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.04129; SI-NEXT: s_setpc_b64 s[30:31]4130; SI-NEXT: .LBB23_3:4131; SI-NEXT: s_branch .LBB23_24132; SI-NEXT: .LBB23_4:4133; SI-NEXT: v_mov_b32_e32 v0, s164134; SI-NEXT: v_mov_b32_e32 v1, s174135; SI-NEXT: v_mov_b32_e32 v2, s184136; SI-NEXT: v_mov_b32_e32 v3, s194137; SI-NEXT: v_mov_b32_e32 v4, s204138; SI-NEXT: v_mov_b32_e32 v5, s214139; SI-NEXT: v_mov_b32_e32 v6, s224140; SI-NEXT: v_mov_b32_e32 v7, s234141; SI-NEXT: v_mov_b32_e32 v8, s244142; SI-NEXT: v_mov_b32_e32 v9, s254143; SI-NEXT: v_mov_b32_e32 v10, s264144; SI-NEXT: v_mov_b32_e32 v11, s274145; SI-NEXT: s_setpc_b64 s[30:31]4146;4147; VI-LABEL: bitcast_v6f64_to_v12f32_scalar:4148; VI: ; %bb.0:4149; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4150; VI-NEXT: s_cmp_lg_u32 s28, 04151; VI-NEXT: s_cbranch_scc0 .LBB23_34152; VI-NEXT: ; %bb.1: ; %cmp.false4153; VI-NEXT: s_cbranch_execnz .LBB23_44154; VI-NEXT: .LBB23_2: ; %cmp.true4155; VI-NEXT: v_add_f64 v[10:11], s[26:27], 1.04156; VI-NEXT: v_add_f64 v[8:9], s[24:25], 1.04157; VI-NEXT: v_add_f64 v[6:7], s[22:23], 1.04158; VI-NEXT: v_add_f64 v[4:5], s[20:21], 1.04159; VI-NEXT: v_add_f64 v[2:3], s[18:19], 1.04160; VI-NEXT: v_add_f64 v[0:1], s[16:17], 1.04161; VI-NEXT: s_setpc_b64 s[30:31]4162; VI-NEXT: .LBB23_3:4163; VI-NEXT: s_branch .LBB23_24164; VI-NEXT: .LBB23_4:4165; VI-NEXT: v_mov_b32_e32 v0, s164166; VI-NEXT: v_mov_b32_e32 v1, s174167; VI-NEXT: v_mov_b32_e32 v2, s184168; VI-NEXT: v_mov_b32_e32 v3, s194169; VI-NEXT: v_mov_b32_e32 v4, s204170; VI-NEXT: v_mov_b32_e32 v5, s214171; VI-NEXT: v_mov_b32_e32 v6, s224172; VI-NEXT: v_mov_b32_e32 v7, s234173; VI-NEXT: v_mov_b32_e32 v8, s244174; VI-NEXT: v_mov_b32_e32 v9, s254175; VI-NEXT: v_mov_b32_e32 v10, s264176; VI-NEXT: v_mov_b32_e32 v11, s274177; VI-NEXT: s_setpc_b64 s[30:31]4178;4179; GFX9-LABEL: bitcast_v6f64_to_v12f32_scalar:4180; GFX9: ; %bb.0:4181; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4182; GFX9-NEXT: s_cmp_lg_u32 s28, 04183; GFX9-NEXT: s_cbranch_scc0 .LBB23_34184; GFX9-NEXT: ; %bb.1: ; %cmp.false4185; GFX9-NEXT: s_cbranch_execnz .LBB23_44186; GFX9-NEXT: .LBB23_2: ; %cmp.true4187; GFX9-NEXT: v_add_f64 v[10:11], s[26:27], 1.04188; GFX9-NEXT: v_add_f64 v[8:9], s[24:25], 1.04189; GFX9-NEXT: v_add_f64 v[6:7], s[22:23], 1.04190; GFX9-NEXT: v_add_f64 v[4:5], s[20:21], 1.04191; GFX9-NEXT: v_add_f64 v[2:3], s[18:19], 1.04192; GFX9-NEXT: v_add_f64 v[0:1], s[16:17], 1.04193; GFX9-NEXT: s_setpc_b64 s[30:31]4194; GFX9-NEXT: .LBB23_3:4195; GFX9-NEXT: s_branch .LBB23_24196; GFX9-NEXT: .LBB23_4:4197; GFX9-NEXT: v_mov_b32_e32 v0, s164198; GFX9-NEXT: v_mov_b32_e32 v1, s174199; GFX9-NEXT: v_mov_b32_e32 v2, s184200; GFX9-NEXT: v_mov_b32_e32 v3, s194201; GFX9-NEXT: v_mov_b32_e32 v4, s204202; GFX9-NEXT: v_mov_b32_e32 v5, s214203; GFX9-NEXT: v_mov_b32_e32 v6, s224204; GFX9-NEXT: v_mov_b32_e32 v7, s234205; GFX9-NEXT: v_mov_b32_e32 v8, s244206; GFX9-NEXT: v_mov_b32_e32 v9, s254207; GFX9-NEXT: v_mov_b32_e32 v10, s264208; GFX9-NEXT: v_mov_b32_e32 v11, s274209; GFX9-NEXT: s_setpc_b64 s[30:31]4210;4211; GFX11-LABEL: bitcast_v6f64_to_v12f32_scalar:4212; GFX11: ; %bb.0:4213; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4214; GFX11-NEXT: s_mov_b32 s15, s34215; GFX11-NEXT: s_mov_b32 s14, s24216; GFX11-NEXT: s_mov_b32 s13, s14217; GFX11-NEXT: s_mov_b32 s12, s04218; GFX11-NEXT: s_cmp_lg_u32 s24, 04219; GFX11-NEXT: s_mov_b32 s0, 04220; GFX11-NEXT: s_cbranch_scc0 .LBB23_34221; GFX11-NEXT: ; %bb.1: ; %Flow4222; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s04223; GFX11-NEXT: s_cbranch_vccnz .LBB23_44224; GFX11-NEXT: .LBB23_2: ; %cmp.true4225; GFX11-NEXT: v_add_f64 v[10:11], s[22:23], 1.04226; GFX11-NEXT: v_add_f64 v[8:9], s[20:21], 1.04227; GFX11-NEXT: v_add_f64 v[6:7], s[18:19], 1.04228; GFX11-NEXT: v_add_f64 v[4:5], s[16:17], 1.04229; GFX11-NEXT: v_add_f64 v[2:3], s[14:15], 1.04230; GFX11-NEXT: v_add_f64 v[0:1], s[12:13], 1.04231; GFX11-NEXT: s_setpc_b64 s[30:31]4232; GFX11-NEXT: .LBB23_3:4233; GFX11-NEXT: s_branch .LBB23_24234; GFX11-NEXT: .LBB23_4:4235; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s134236; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s154237; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s174238; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s194239; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s214240; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s234241; GFX11-NEXT: s_setpc_b64 s[30:31]4242 %cmp = icmp eq i32 %b, 04243 br i1 %cmp, label %cmp.true, label %cmp.false4244 4245cmp.true:4246 %a1 = fadd <6 x double> %a, splat (double 1.000000e+00)4247 %a2 = bitcast <6 x double> %a1 to <12 x float>4248 br label %end4249 4250cmp.false:4251 %a3 = bitcast <6 x double> %a to <12 x float>4252 br label %end4253 4254end:4255 %phi = phi <12 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]4256 ret <12 x float> %phi4257}4258 4259define <6 x i64> @bitcast_v12f32_to_v6i64(<12 x float> %a, i32 %b) {4260; SI-LABEL: bitcast_v12f32_to_v6i64:4261; SI: ; %bb.0:4262; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4263; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124264; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc4265; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4266; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4267; SI-NEXT: s_cbranch_execz .LBB24_24268; SI-NEXT: ; %bb.1: ; %cmp.true4269; SI-NEXT: v_add_f32_e32 v11, 1.0, v114270; SI-NEXT: v_add_f32_e32 v10, 1.0, v104271; SI-NEXT: v_add_f32_e32 v9, 1.0, v94272; SI-NEXT: v_add_f32_e32 v8, 1.0, v84273; SI-NEXT: v_add_f32_e32 v7, 1.0, v74274; SI-NEXT: v_add_f32_e32 v6, 1.0, v64275; SI-NEXT: v_add_f32_e32 v5, 1.0, v54276; SI-NEXT: v_add_f32_e32 v4, 1.0, v44277; SI-NEXT: v_add_f32_e32 v3, 1.0, v34278; SI-NEXT: v_add_f32_e32 v2, 1.0, v24279; SI-NEXT: v_add_f32_e32 v1, 1.0, v14280; SI-NEXT: v_add_f32_e32 v0, 1.0, v04281; SI-NEXT: .LBB24_2: ; %end4282; SI-NEXT: s_or_b64 exec, exec, s[4:5]4283; SI-NEXT: s_setpc_b64 s[30:31]4284;4285; VI-LABEL: bitcast_v12f32_to_v6i64:4286; VI: ; %bb.0:4287; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4288; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124289; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc4290; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4291; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4292; VI-NEXT: s_cbranch_execz .LBB24_24293; VI-NEXT: ; %bb.1: ; %cmp.true4294; VI-NEXT: v_add_f32_e32 v11, 1.0, v114295; VI-NEXT: v_add_f32_e32 v10, 1.0, v104296; VI-NEXT: v_add_f32_e32 v9, 1.0, v94297; VI-NEXT: v_add_f32_e32 v8, 1.0, v84298; VI-NEXT: v_add_f32_e32 v7, 1.0, v74299; VI-NEXT: v_add_f32_e32 v6, 1.0, v64300; VI-NEXT: v_add_f32_e32 v5, 1.0, v54301; VI-NEXT: v_add_f32_e32 v4, 1.0, v44302; VI-NEXT: v_add_f32_e32 v3, 1.0, v34303; VI-NEXT: v_add_f32_e32 v2, 1.0, v24304; VI-NEXT: v_add_f32_e32 v1, 1.0, v14305; VI-NEXT: v_add_f32_e32 v0, 1.0, v04306; VI-NEXT: .LBB24_2: ; %end4307; VI-NEXT: s_or_b64 exec, exec, s[4:5]4308; VI-NEXT: s_setpc_b64 s[30:31]4309;4310; GFX9-LABEL: bitcast_v12f32_to_v6i64:4311; GFX9: ; %bb.0:4312; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4313; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124314; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc4315; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4316; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4317; GFX9-NEXT: s_cbranch_execz .LBB24_24318; GFX9-NEXT: ; %bb.1: ; %cmp.true4319; GFX9-NEXT: v_add_f32_e32 v11, 1.0, v114320; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v104321; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v94322; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v84323; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v74324; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v64325; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v54326; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v44327; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v34328; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v24329; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v14330; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v04331; GFX9-NEXT: .LBB24_2: ; %end4332; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]4333; GFX9-NEXT: s_setpc_b64 s[30:31]4334;4335; GFX11-LABEL: bitcast_v12f32_to_v6i64:4336; GFX11: ; %bb.0:4337; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4338; GFX11-NEXT: s_mov_b32 s0, exec_lo4339; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v124340; GFX11-NEXT: s_xor_b32 s0, exec_lo, s04341; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)4342; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s04343; GFX11-NEXT: ; %bb.1: ; %cmp.true4344; GFX11-NEXT: v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v104345; GFX11-NEXT: v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v84346; GFX11-NEXT: v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v64347; GFX11-NEXT: v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v44348; GFX11-NEXT: v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v24349; GFX11-NEXT: v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v04350; GFX11-NEXT: ; %bb.2: ; %end4351; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s04352; GFX11-NEXT: s_setpc_b64 s[30:31]4353 %cmp = icmp eq i32 %b, 04354 br i1 %cmp, label %cmp.true, label %cmp.false4355 4356cmp.true:4357 %a1 = fadd <12 x float> %a, splat (float 1.000000e+00)4358 %a2 = bitcast <12 x float> %a1 to <6 x i64>4359 br label %end4360 4361cmp.false:4362 %a3 = bitcast <12 x float> %a to <6 x i64>4363 br label %end4364 4365end:4366 %phi = phi <6 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]4367 ret <6 x i64> %phi4368}4369 4370define inreg <6 x i64> @bitcast_v12f32_to_v6i64_scalar(<12 x float> inreg %a, i32 inreg %b) {4371; SI-LABEL: bitcast_v12f32_to_v6i64_scalar:4372; SI: ; %bb.0:4373; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4374; SI-NEXT: s_cmp_lg_u32 s28, 04375; SI-NEXT: s_cbranch_scc0 .LBB25_34376; SI-NEXT: ; %bb.1: ; %cmp.false4377; SI-NEXT: s_cbranch_execnz .LBB25_44378; SI-NEXT: .LBB25_2: ; %cmp.true4379; SI-NEXT: v_add_f32_e64 v11, s27, 1.04380; SI-NEXT: v_add_f32_e64 v10, s26, 1.04381; SI-NEXT: v_add_f32_e64 v9, s25, 1.04382; SI-NEXT: v_add_f32_e64 v8, s24, 1.04383; SI-NEXT: v_add_f32_e64 v7, s23, 1.04384; SI-NEXT: v_add_f32_e64 v6, s22, 1.04385; SI-NEXT: v_add_f32_e64 v5, s21, 1.04386; SI-NEXT: v_add_f32_e64 v4, s20, 1.04387; SI-NEXT: v_add_f32_e64 v3, s19, 1.04388; SI-NEXT: v_add_f32_e64 v2, s18, 1.04389; SI-NEXT: v_add_f32_e64 v1, s17, 1.04390; SI-NEXT: v_add_f32_e64 v0, s16, 1.04391; SI-NEXT: s_setpc_b64 s[30:31]4392; SI-NEXT: .LBB25_3:4393; SI-NEXT: s_branch .LBB25_24394; SI-NEXT: .LBB25_4:4395; SI-NEXT: v_mov_b32_e32 v0, s164396; SI-NEXT: v_mov_b32_e32 v1, s174397; SI-NEXT: v_mov_b32_e32 v2, s184398; SI-NEXT: v_mov_b32_e32 v3, s194399; SI-NEXT: v_mov_b32_e32 v4, s204400; SI-NEXT: v_mov_b32_e32 v5, s214401; SI-NEXT: v_mov_b32_e32 v6, s224402; SI-NEXT: v_mov_b32_e32 v7, s234403; SI-NEXT: v_mov_b32_e32 v8, s244404; SI-NEXT: v_mov_b32_e32 v9, s254405; SI-NEXT: v_mov_b32_e32 v10, s264406; SI-NEXT: v_mov_b32_e32 v11, s274407; SI-NEXT: v_mov_b32_e32 v12, s284408; SI-NEXT: v_mov_b32_e32 v13, s294409; SI-NEXT: v_mov_b32_e32 v14, s304410; SI-NEXT: v_mov_b32_e32 v15, s314411; SI-NEXT: s_setpc_b64 s[30:31]4412;4413; VI-LABEL: bitcast_v12f32_to_v6i64_scalar:4414; VI: ; %bb.0:4415; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4416; VI-NEXT: s_cmp_lg_u32 s28, 04417; VI-NEXT: s_cbranch_scc0 .LBB25_34418; VI-NEXT: ; %bb.1: ; %cmp.false4419; VI-NEXT: s_cbranch_execnz .LBB25_44420; VI-NEXT: .LBB25_2: ; %cmp.true4421; VI-NEXT: v_add_f32_e64 v11, s27, 1.04422; VI-NEXT: v_add_f32_e64 v10, s26, 1.04423; VI-NEXT: v_add_f32_e64 v9, s25, 1.04424; VI-NEXT: v_add_f32_e64 v8, s24, 1.04425; VI-NEXT: v_add_f32_e64 v7, s23, 1.04426; VI-NEXT: v_add_f32_e64 v6, s22, 1.04427; VI-NEXT: v_add_f32_e64 v5, s21, 1.04428; VI-NEXT: v_add_f32_e64 v4, s20, 1.04429; VI-NEXT: v_add_f32_e64 v3, s19, 1.04430; VI-NEXT: v_add_f32_e64 v2, s18, 1.04431; VI-NEXT: v_add_f32_e64 v1, s17, 1.04432; VI-NEXT: v_add_f32_e64 v0, s16, 1.04433; VI-NEXT: s_setpc_b64 s[30:31]4434; VI-NEXT: .LBB25_3:4435; VI-NEXT: s_branch .LBB25_24436; VI-NEXT: .LBB25_4:4437; VI-NEXT: v_mov_b32_e32 v0, s164438; VI-NEXT: v_mov_b32_e32 v1, s174439; VI-NEXT: v_mov_b32_e32 v2, s184440; VI-NEXT: v_mov_b32_e32 v3, s194441; VI-NEXT: v_mov_b32_e32 v4, s204442; VI-NEXT: v_mov_b32_e32 v5, s214443; VI-NEXT: v_mov_b32_e32 v6, s224444; VI-NEXT: v_mov_b32_e32 v7, s234445; VI-NEXT: v_mov_b32_e32 v8, s244446; VI-NEXT: v_mov_b32_e32 v9, s254447; VI-NEXT: v_mov_b32_e32 v10, s264448; VI-NEXT: v_mov_b32_e32 v11, s274449; VI-NEXT: v_mov_b32_e32 v12, s284450; VI-NEXT: v_mov_b32_e32 v13, s294451; VI-NEXT: v_mov_b32_e32 v14, s304452; VI-NEXT: v_mov_b32_e32 v15, s314453; VI-NEXT: s_setpc_b64 s[30:31]4454;4455; GFX9-LABEL: bitcast_v12f32_to_v6i64_scalar:4456; GFX9: ; %bb.0:4457; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4458; GFX9-NEXT: s_cmp_lg_u32 s28, 04459; GFX9-NEXT: s_cbranch_scc0 .LBB25_34460; GFX9-NEXT: ; %bb.1: ; %cmp.false4461; GFX9-NEXT: s_cbranch_execnz .LBB25_44462; GFX9-NEXT: .LBB25_2: ; %cmp.true4463; GFX9-NEXT: v_add_f32_e64 v11, s27, 1.04464; GFX9-NEXT: v_add_f32_e64 v10, s26, 1.04465; GFX9-NEXT: v_add_f32_e64 v9, s25, 1.04466; GFX9-NEXT: v_add_f32_e64 v8, s24, 1.04467; GFX9-NEXT: v_add_f32_e64 v7, s23, 1.04468; GFX9-NEXT: v_add_f32_e64 v6, s22, 1.04469; GFX9-NEXT: v_add_f32_e64 v5, s21, 1.04470; GFX9-NEXT: v_add_f32_e64 v4, s20, 1.04471; GFX9-NEXT: v_add_f32_e64 v3, s19, 1.04472; GFX9-NEXT: v_add_f32_e64 v2, s18, 1.04473; GFX9-NEXT: v_add_f32_e64 v1, s17, 1.04474; GFX9-NEXT: v_add_f32_e64 v0, s16, 1.04475; GFX9-NEXT: s_setpc_b64 s[30:31]4476; GFX9-NEXT: .LBB25_3:4477; GFX9-NEXT: s_branch .LBB25_24478; GFX9-NEXT: .LBB25_4:4479; GFX9-NEXT: v_mov_b32_e32 v0, s164480; GFX9-NEXT: v_mov_b32_e32 v1, s174481; GFX9-NEXT: v_mov_b32_e32 v2, s184482; GFX9-NEXT: v_mov_b32_e32 v3, s194483; GFX9-NEXT: v_mov_b32_e32 v4, s204484; GFX9-NEXT: v_mov_b32_e32 v5, s214485; GFX9-NEXT: v_mov_b32_e32 v6, s224486; GFX9-NEXT: v_mov_b32_e32 v7, s234487; GFX9-NEXT: v_mov_b32_e32 v8, s244488; GFX9-NEXT: v_mov_b32_e32 v9, s254489; GFX9-NEXT: v_mov_b32_e32 v10, s264490; GFX9-NEXT: v_mov_b32_e32 v11, s274491; GFX9-NEXT: v_mov_b32_e32 v12, s284492; GFX9-NEXT: v_mov_b32_e32 v13, s294493; GFX9-NEXT: v_mov_b32_e32 v14, s304494; GFX9-NEXT: v_mov_b32_e32 v15, s314495; GFX9-NEXT: s_setpc_b64 s[30:31]4496;4497; GFX11-LABEL: bitcast_v12f32_to_v6i64_scalar:4498; GFX11: ; %bb.0:4499; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4500; GFX11-NEXT: s_mov_b32 s15, s34501; GFX11-NEXT: s_mov_b32 s14, s24502; GFX11-NEXT: s_mov_b32 s13, s14503; GFX11-NEXT: s_mov_b32 s12, s04504; GFX11-NEXT: s_cmp_lg_u32 s24, 04505; GFX11-NEXT: s_mov_b32 s0, 04506; GFX11-NEXT: s_cbranch_scc0 .LBB25_34507; GFX11-NEXT: ; %bb.1: ; %Flow4508; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s04509; GFX11-NEXT: s_cbranch_vccnz .LBB25_44510; GFX11-NEXT: .LBB25_2: ; %cmp.true4511; GFX11-NEXT: v_add_f32_e64 v11, s23, 1.04512; GFX11-NEXT: v_add_f32_e64 v10, s22, 1.04513; GFX11-NEXT: v_add_f32_e64 v9, s21, 1.04514; GFX11-NEXT: v_add_f32_e64 v8, s20, 1.04515; GFX11-NEXT: v_add_f32_e64 v7, s19, 1.04516; GFX11-NEXT: v_add_f32_e64 v6, s18, 1.04517; GFX11-NEXT: v_add_f32_e64 v5, s17, 1.04518; GFX11-NEXT: v_add_f32_e64 v4, s16, 1.04519; GFX11-NEXT: v_add_f32_e64 v3, s15, 1.04520; GFX11-NEXT: v_add_f32_e64 v2, s14, 1.04521; GFX11-NEXT: v_add_f32_e64 v1, s13, 1.04522; GFX11-NEXT: v_add_f32_e64 v0, s12, 1.04523; GFX11-NEXT: s_setpc_b64 s[30:31]4524; GFX11-NEXT: .LBB25_3:4525; GFX11-NEXT: s_branch .LBB25_24526; GFX11-NEXT: .LBB25_4:4527; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s134528; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s154529; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s174530; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s194531; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s214532; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s234533; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s254534; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s274535; GFX11-NEXT: s_setpc_b64 s[30:31]4536 %cmp = icmp eq i32 %b, 04537 br i1 %cmp, label %cmp.true, label %cmp.false4538 4539cmp.true:4540 %a1 = fadd <12 x float> %a, splat (float 1.000000e+00)4541 %a2 = bitcast <12 x float> %a1 to <6 x i64>4542 br label %end4543 4544cmp.false:4545 %a3 = bitcast <12 x float> %a to <6 x i64>4546 br label %end4547 4548end:4549 %phi = phi <6 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]4550 ret <6 x i64> %phi4551}4552 4553define <12 x float> @bitcast_v6i64_to_v12f32(<6 x i64> %a, i32 %b) {4554; SI-LABEL: bitcast_v6i64_to_v12f32:4555; SI: ; %bb.0:4556; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4557; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124558; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc4559; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4560; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4561; SI-NEXT: s_cbranch_execz .LBB26_24562; SI-NEXT: ; %bb.1: ; %cmp.true4563; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v104564; SI-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc4565; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v84566; SI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc4567; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v64568; SI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc4569; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v44570; SI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc4571; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v24572; SI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc4573; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v04574; SI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc4575; SI-NEXT: .LBB26_2: ; %end4576; SI-NEXT: s_or_b64 exec, exec, s[4:5]4577; SI-NEXT: s_setpc_b64 s[30:31]4578;4579; VI-LABEL: bitcast_v6i64_to_v12f32:4580; VI: ; %bb.0:4581; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4582; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124583; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc4584; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4585; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4586; VI-NEXT: s_cbranch_execz .LBB26_24587; VI-NEXT: ; %bb.1: ; %cmp.true4588; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v104589; VI-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc4590; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v84591; VI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc4592; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v64593; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc4594; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v44595; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc4596; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v24597; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc4598; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v04599; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc4600; VI-NEXT: .LBB26_2: ; %end4601; VI-NEXT: s_or_b64 exec, exec, s[4:5]4602; VI-NEXT: s_setpc_b64 s[30:31]4603;4604; GFX9-LABEL: bitcast_v6i64_to_v12f32:4605; GFX9: ; %bb.0:4606; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4607; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124608; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc4609; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4610; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4611; GFX9-NEXT: s_cbranch_execz .LBB26_24612; GFX9-NEXT: ; %bb.1: ; %cmp.true4613; GFX9-NEXT: v_add_co_u32_e32 v10, vcc, 3, v104614; GFX9-NEXT: v_addc_co_u32_e32 v11, vcc, 0, v11, vcc4615; GFX9-NEXT: v_add_co_u32_e32 v8, vcc, 3, v84616; GFX9-NEXT: v_addc_co_u32_e32 v9, vcc, 0, v9, vcc4617; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, 3, v64618; GFX9-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v7, vcc4619; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, 3, v44620; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc4621; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, 3, v24622; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc4623; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 3, v04624; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc4625; GFX9-NEXT: .LBB26_2: ; %end4626; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]4627; GFX9-NEXT: s_setpc_b64 s[30:31]4628;4629; GFX11-LABEL: bitcast_v6i64_to_v12f32:4630; GFX11: ; %bb.0:4631; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4632; GFX11-NEXT: s_mov_b32 s0, exec_lo4633; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v124634; GFX11-NEXT: s_xor_b32 s0, exec_lo, s04635; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)4636; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s04637; GFX11-NEXT: s_cbranch_execz .LBB26_24638; GFX11-NEXT: ; %bb.1: ; %cmp.true4639; GFX11-NEXT: v_add_co_u32 v10, vcc_lo, v10, 34640; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)4641; GFX11-NEXT: v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo4642; GFX11-NEXT: v_add_co_u32 v8, vcc_lo, v8, 34643; GFX11-NEXT: v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo4644; GFX11-NEXT: v_add_co_u32 v6, vcc_lo, v6, 34645; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)4646; GFX11-NEXT: v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo4647; GFX11-NEXT: v_add_co_u32 v4, vcc_lo, v4, 34648; GFX11-NEXT: v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo4649; GFX11-NEXT: v_add_co_u32 v2, vcc_lo, v2, 34650; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)4651; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo4652; GFX11-NEXT: v_add_co_u32 v0, vcc_lo, v0, 34653; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo4654; GFX11-NEXT: .LBB26_2: ; %end4655; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s04656; GFX11-NEXT: s_setpc_b64 s[30:31]4657 %cmp = icmp eq i32 %b, 04658 br i1 %cmp, label %cmp.true, label %cmp.false4659 4660cmp.true:4661 %a1 = add <6 x i64> %a, splat (i64 3)4662 %a2 = bitcast <6 x i64> %a1 to <12 x float>4663 br label %end4664 4665cmp.false:4666 %a3 = bitcast <6 x i64> %a to <12 x float>4667 br label %end4668 4669end:4670 %phi = phi <12 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]4671 ret <12 x float> %phi4672}4673 4674define inreg <12 x float> @bitcast_v6i64_to_v12f32_scalar(<6 x i64> inreg %a, i32 inreg %b) {4675; SI-LABEL: bitcast_v6i64_to_v12f32_scalar:4676; SI: ; %bb.0:4677; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4678; SI-NEXT: s_cmp_lg_u32 s28, 04679; SI-NEXT: s_cbranch_scc0 .LBB27_44680; SI-NEXT: ; %bb.1: ; %cmp.false4681; SI-NEXT: s_cbranch_execnz .LBB27_34682; SI-NEXT: .LBB27_2: ; %cmp.true4683; SI-NEXT: s_add_u32 s26, s26, 34684; SI-NEXT: s_addc_u32 s27, s27, 04685; SI-NEXT: s_add_u32 s24, s24, 34686; SI-NEXT: s_addc_u32 s25, s25, 04687; SI-NEXT: s_add_u32 s22, s22, 34688; SI-NEXT: s_addc_u32 s23, s23, 04689; SI-NEXT: s_add_u32 s20, s20, 34690; SI-NEXT: s_addc_u32 s21, s21, 04691; SI-NEXT: s_add_u32 s18, s18, 34692; SI-NEXT: s_addc_u32 s19, s19, 04693; SI-NEXT: s_add_u32 s16, s16, 34694; SI-NEXT: s_addc_u32 s17, s17, 04695; SI-NEXT: .LBB27_3: ; %end4696; SI-NEXT: v_mov_b32_e32 v0, s164697; SI-NEXT: v_mov_b32_e32 v1, s174698; SI-NEXT: v_mov_b32_e32 v2, s184699; SI-NEXT: v_mov_b32_e32 v3, s194700; SI-NEXT: v_mov_b32_e32 v4, s204701; SI-NEXT: v_mov_b32_e32 v5, s214702; SI-NEXT: v_mov_b32_e32 v6, s224703; SI-NEXT: v_mov_b32_e32 v7, s234704; SI-NEXT: v_mov_b32_e32 v8, s244705; SI-NEXT: v_mov_b32_e32 v9, s254706; SI-NEXT: v_mov_b32_e32 v10, s264707; SI-NEXT: v_mov_b32_e32 v11, s274708; SI-NEXT: s_setpc_b64 s[30:31]4709; SI-NEXT: .LBB27_4:4710; SI-NEXT: s_branch .LBB27_24711;4712; VI-LABEL: bitcast_v6i64_to_v12f32_scalar:4713; VI: ; %bb.0:4714; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4715; VI-NEXT: s_cmp_lg_u32 s28, 04716; VI-NEXT: s_cbranch_scc0 .LBB27_44717; VI-NEXT: ; %bb.1: ; %cmp.false4718; VI-NEXT: s_cbranch_execnz .LBB27_34719; VI-NEXT: .LBB27_2: ; %cmp.true4720; VI-NEXT: s_add_u32 s26, s26, 34721; VI-NEXT: s_addc_u32 s27, s27, 04722; VI-NEXT: s_add_u32 s24, s24, 34723; VI-NEXT: s_addc_u32 s25, s25, 04724; VI-NEXT: s_add_u32 s22, s22, 34725; VI-NEXT: s_addc_u32 s23, s23, 04726; VI-NEXT: s_add_u32 s20, s20, 34727; VI-NEXT: s_addc_u32 s21, s21, 04728; VI-NEXT: s_add_u32 s18, s18, 34729; VI-NEXT: s_addc_u32 s19, s19, 04730; VI-NEXT: s_add_u32 s16, s16, 34731; VI-NEXT: s_addc_u32 s17, s17, 04732; VI-NEXT: .LBB27_3: ; %end4733; VI-NEXT: v_mov_b32_e32 v0, s164734; VI-NEXT: v_mov_b32_e32 v1, s174735; VI-NEXT: v_mov_b32_e32 v2, s184736; VI-NEXT: v_mov_b32_e32 v3, s194737; VI-NEXT: v_mov_b32_e32 v4, s204738; VI-NEXT: v_mov_b32_e32 v5, s214739; VI-NEXT: v_mov_b32_e32 v6, s224740; VI-NEXT: v_mov_b32_e32 v7, s234741; VI-NEXT: v_mov_b32_e32 v8, s244742; VI-NEXT: v_mov_b32_e32 v9, s254743; VI-NEXT: v_mov_b32_e32 v10, s264744; VI-NEXT: v_mov_b32_e32 v11, s274745; VI-NEXT: s_setpc_b64 s[30:31]4746; VI-NEXT: .LBB27_4:4747; VI-NEXT: s_branch .LBB27_24748;4749; GFX9-LABEL: bitcast_v6i64_to_v12f32_scalar:4750; GFX9: ; %bb.0:4751; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4752; GFX9-NEXT: s_cmp_lg_u32 s28, 04753; GFX9-NEXT: s_cbranch_scc0 .LBB27_44754; GFX9-NEXT: ; %bb.1: ; %cmp.false4755; GFX9-NEXT: s_cbranch_execnz .LBB27_34756; GFX9-NEXT: .LBB27_2: ; %cmp.true4757; GFX9-NEXT: s_add_u32 s26, s26, 34758; GFX9-NEXT: s_addc_u32 s27, s27, 04759; GFX9-NEXT: s_add_u32 s24, s24, 34760; GFX9-NEXT: s_addc_u32 s25, s25, 04761; GFX9-NEXT: s_add_u32 s22, s22, 34762; GFX9-NEXT: s_addc_u32 s23, s23, 04763; GFX9-NEXT: s_add_u32 s20, s20, 34764; GFX9-NEXT: s_addc_u32 s21, s21, 04765; GFX9-NEXT: s_add_u32 s18, s18, 34766; GFX9-NEXT: s_addc_u32 s19, s19, 04767; GFX9-NEXT: s_add_u32 s16, s16, 34768; GFX9-NEXT: s_addc_u32 s17, s17, 04769; GFX9-NEXT: .LBB27_3: ; %end4770; GFX9-NEXT: v_mov_b32_e32 v0, s164771; GFX9-NEXT: v_mov_b32_e32 v1, s174772; GFX9-NEXT: v_mov_b32_e32 v2, s184773; GFX9-NEXT: v_mov_b32_e32 v3, s194774; GFX9-NEXT: v_mov_b32_e32 v4, s204775; GFX9-NEXT: v_mov_b32_e32 v5, s214776; GFX9-NEXT: v_mov_b32_e32 v6, s224777; GFX9-NEXT: v_mov_b32_e32 v7, s234778; GFX9-NEXT: v_mov_b32_e32 v8, s244779; GFX9-NEXT: v_mov_b32_e32 v9, s254780; GFX9-NEXT: v_mov_b32_e32 v10, s264781; GFX9-NEXT: v_mov_b32_e32 v11, s274782; GFX9-NEXT: s_setpc_b64 s[30:31]4783; GFX9-NEXT: .LBB27_4:4784; GFX9-NEXT: s_branch .LBB27_24785;4786; GFX11-LABEL: bitcast_v6i64_to_v12f32_scalar:4787; GFX11: ; %bb.0:4788; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4789; GFX11-NEXT: s_cmp_lg_u32 s24, 04790; GFX11-NEXT: s_mov_b32 s4, 04791; GFX11-NEXT: s_cbranch_scc0 .LBB27_44792; GFX11-NEXT: ; %bb.1: ; %Flow4793; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s44794; GFX11-NEXT: s_cbranch_vccnz .LBB27_34795; GFX11-NEXT: .LBB27_2: ; %cmp.true4796; GFX11-NEXT: s_add_u32 s22, s22, 34797; GFX11-NEXT: s_addc_u32 s23, s23, 04798; GFX11-NEXT: s_add_u32 s20, s20, 34799; GFX11-NEXT: s_addc_u32 s21, s21, 04800; GFX11-NEXT: s_add_u32 s18, s18, 34801; GFX11-NEXT: s_addc_u32 s19, s19, 04802; GFX11-NEXT: s_add_u32 s16, s16, 34803; GFX11-NEXT: s_addc_u32 s17, s17, 04804; GFX11-NEXT: s_add_u32 s2, s2, 34805; GFX11-NEXT: s_addc_u32 s3, s3, 04806; GFX11-NEXT: s_add_u32 s0, s0, 34807; GFX11-NEXT: s_addc_u32 s1, s1, 04808; GFX11-NEXT: .LBB27_3: ; %end4809; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)4810; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s14811; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s34812; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s174813; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s194814; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s214815; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s234816; GFX11-NEXT: s_setpc_b64 s[30:31]4817; GFX11-NEXT: .LBB27_4:4818; GFX11-NEXT: s_branch .LBB27_24819 %cmp = icmp eq i32 %b, 04820 br i1 %cmp, label %cmp.true, label %cmp.false4821 4822cmp.true:4823 %a1 = add <6 x i64> %a, splat (i64 3)4824 %a2 = bitcast <6 x i64> %a1 to <12 x float>4825 br label %end4826 4827cmp.false:4828 %a3 = bitcast <6 x i64> %a to <12 x float>4829 br label %end4830 4831end:4832 %phi = phi <12 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]4833 ret <12 x float> %phi4834}4835 4836define <24 x i16> @bitcast_v12f32_to_v24i16(<12 x float> %a, i32 %b) {4837; SI-LABEL: bitcast_v12f32_to_v24i16:4838; SI: ; %bb.0:4839; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4840; SI-NEXT: v_mov_b32_e32 v22, v114841; SI-NEXT: v_mov_b32_e32 v20, v104842; SI-NEXT: v_mov_b32_e32 v18, v94843; SI-NEXT: v_mov_b32_e32 v16, v84844; SI-NEXT: v_mov_b32_e32 v14, v74845; SI-NEXT: v_mov_b32_e32 v24, v64846; SI-NEXT: v_mov_b32_e32 v10, v54847; SI-NEXT: v_mov_b32_e32 v8, v44848; SI-NEXT: v_mov_b32_e32 v6, v34849; SI-NEXT: v_mov_b32_e32 v4, v24850; SI-NEXT: v_mov_b32_e32 v2, v14851; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124852; SI-NEXT: ; implicit-def: $vgpr14853; SI-NEXT: ; implicit-def: $vgpr34854; SI-NEXT: ; implicit-def: $vgpr54855; SI-NEXT: ; implicit-def: $vgpr74856; SI-NEXT: ; implicit-def: $vgpr94857; SI-NEXT: ; implicit-def: $vgpr114858; SI-NEXT: ; implicit-def: $vgpr134859; SI-NEXT: ; implicit-def: $vgpr154860; SI-NEXT: ; implicit-def: $vgpr174861; SI-NEXT: ; implicit-def: $vgpr194862; SI-NEXT: ; implicit-def: $vgpr214863; SI-NEXT: ; implicit-def: $vgpr234864; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc4865; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4866; SI-NEXT: s_cbranch_execz .LBB28_24867; SI-NEXT: ; %bb.1: ; %cmp.false4868; SI-NEXT: v_alignbit_b32 v21, v22, v20, 164869; SI-NEXT: v_alignbit_b32 v17, v18, v16, 164870; SI-NEXT: v_alignbit_b32 v13, v14, v24, 164871; SI-NEXT: v_alignbit_b32 v9, v10, v8, 164872; SI-NEXT: v_alignbit_b32 v5, v6, v4, 164873; SI-NEXT: v_alignbit_b32 v1, v2, v0, 164874; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v224875; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v184876; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v144877; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v104878; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v64879; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v24880; SI-NEXT: .LBB28_2: ; %Flow4881; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4882; SI-NEXT: s_cbranch_execz .LBB28_44883; SI-NEXT: ; %bb.3: ; %cmp.true4884; SI-NEXT: v_add_f32_e32 v2, 1.0, v24885; SI-NEXT: v_add_f32_e32 v0, 1.0, v04886; SI-NEXT: v_add_f32_e32 v6, 1.0, v64887; SI-NEXT: v_add_f32_e32 v4, 1.0, v44888; SI-NEXT: v_add_f32_e32 v10, 1.0, v104889; SI-NEXT: v_add_f32_e32 v8, 1.0, v84890; SI-NEXT: v_add_f32_e32 v14, 1.0, v144891; SI-NEXT: v_add_f32_e32 v24, 1.0, v244892; SI-NEXT: v_add_f32_e32 v18, 1.0, v184893; SI-NEXT: v_add_f32_e32 v16, 1.0, v164894; SI-NEXT: v_add_f32_e32 v22, 1.0, v224895; SI-NEXT: v_add_f32_e32 v20, 1.0, v204896; SI-NEXT: v_alignbit_b32 v21, v22, v20, 164897; SI-NEXT: v_alignbit_b32 v17, v18, v16, 164898; SI-NEXT: v_alignbit_b32 v13, v14, v24, 164899; SI-NEXT: v_alignbit_b32 v9, v10, v8, 164900; SI-NEXT: v_alignbit_b32 v5, v6, v4, 164901; SI-NEXT: v_alignbit_b32 v1, v2, v0, 164902; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v224903; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v184904; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v144905; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v104906; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v64907; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v24908; SI-NEXT: .LBB28_4: ; %end4909; SI-NEXT: s_or_b64 exec, exec, s[4:5]4910; SI-NEXT: v_mov_b32_e32 v12, v244911; SI-NEXT: s_setpc_b64 s[30:31]4912;4913; VI-LABEL: bitcast_v12f32_to_v24i16:4914; VI: ; %bb.0:4915; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4916; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124917; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc4918; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4919; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4920; VI-NEXT: s_cbranch_execz .LBB28_24921; VI-NEXT: ; %bb.1: ; %cmp.true4922; VI-NEXT: v_add_f32_e32 v11, 1.0, v114923; VI-NEXT: v_add_f32_e32 v10, 1.0, v104924; VI-NEXT: v_add_f32_e32 v9, 1.0, v94925; VI-NEXT: v_add_f32_e32 v8, 1.0, v84926; VI-NEXT: v_add_f32_e32 v7, 1.0, v74927; VI-NEXT: v_add_f32_e32 v6, 1.0, v64928; VI-NEXT: v_add_f32_e32 v5, 1.0, v54929; VI-NEXT: v_add_f32_e32 v4, 1.0, v44930; VI-NEXT: v_add_f32_e32 v3, 1.0, v34931; VI-NEXT: v_add_f32_e32 v2, 1.0, v24932; VI-NEXT: v_add_f32_e32 v1, 1.0, v14933; VI-NEXT: v_add_f32_e32 v0, 1.0, v04934; VI-NEXT: .LBB28_2: ; %end4935; VI-NEXT: s_or_b64 exec, exec, s[4:5]4936; VI-NEXT: s_setpc_b64 s[30:31]4937;4938; GFX9-LABEL: bitcast_v12f32_to_v24i16:4939; GFX9: ; %bb.0:4940; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4941; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124942; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc4943; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4944; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4945; GFX9-NEXT: s_cbranch_execz .LBB28_24946; GFX9-NEXT: ; %bb.1: ; %cmp.true4947; GFX9-NEXT: v_add_f32_e32 v11, 1.0, v114948; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v104949; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v94950; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v84951; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v74952; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v64953; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v54954; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v44955; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v34956; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v24957; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v14958; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v04959; GFX9-NEXT: .LBB28_2: ; %end4960; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]4961; GFX9-NEXT: s_setpc_b64 s[30:31]4962;4963; GFX11-LABEL: bitcast_v12f32_to_v24i16:4964; GFX11: ; %bb.0:4965; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4966; GFX11-NEXT: s_mov_b32 s0, exec_lo4967; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v124968; GFX11-NEXT: s_xor_b32 s0, exec_lo, s04969; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)4970; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s04971; GFX11-NEXT: ; %bb.1: ; %cmp.true4972; GFX11-NEXT: v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v104973; GFX11-NEXT: v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v84974; GFX11-NEXT: v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v64975; GFX11-NEXT: v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v44976; GFX11-NEXT: v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v24977; GFX11-NEXT: v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v04978; GFX11-NEXT: ; %bb.2: ; %end4979; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s04980; GFX11-NEXT: s_setpc_b64 s[30:31]4981 %cmp = icmp eq i32 %b, 04982 br i1 %cmp, label %cmp.true, label %cmp.false4983 4984cmp.true:4985 %a1 = fadd <12 x float> %a, splat (float 1.000000e+00)4986 %a2 = bitcast <12 x float> %a1 to <24 x i16>4987 br label %end4988 4989cmp.false:4990 %a3 = bitcast <12 x float> %a to <24 x i16>4991 br label %end4992 4993end:4994 %phi = phi <24 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]4995 ret <24 x i16> %phi4996}4997 4998define inreg <24 x i16> @bitcast_v12f32_to_v24i16_scalar(<12 x float> inreg %a, i32 inreg %b) {4999; SI-LABEL: bitcast_v12f32_to_v24i16_scalar:5000; SI: ; %bb.0:5001; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5002; SI-NEXT: s_cmp_lg_u32 s28, 05003; SI-NEXT: s_cbranch_scc0 .LBB29_35004; SI-NEXT: ; %bb.1: ; %cmp.false5005; SI-NEXT: s_lshr_b32 s45, s27, 165006; SI-NEXT: s_lshr_b32 s44, s25, 165007; SI-NEXT: s_lshr_b32 s43, s23, 165008; SI-NEXT: s_lshr_b32 s42, s21, 165009; SI-NEXT: s_lshr_b32 s41, s19, 165010; SI-NEXT: s_lshr_b32 s40, s17, 165011; SI-NEXT: s_lshr_b64 s[4:5], s[26:27], 165012; SI-NEXT: s_lshr_b64 s[6:7], s[24:25], 165013; SI-NEXT: s_lshr_b64 s[8:9], s[22:23], 165014; SI-NEXT: s_lshr_b64 s[10:11], s[20:21], 165015; SI-NEXT: s_lshr_b64 s[12:13], s[18:19], 165016; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 165017; SI-NEXT: s_cbranch_execnz .LBB29_45018; SI-NEXT: .LBB29_2: ; %cmp.true5019; SI-NEXT: v_add_f32_e64 v35, s17, 1.05020; SI-NEXT: v_add_f32_e64 v34, s16, 1.05021; SI-NEXT: v_add_f32_e64 v33, s19, 1.05022; SI-NEXT: v_add_f32_e64 v32, s18, 1.05023; SI-NEXT: v_add_f32_e64 v31, s21, 1.05024; SI-NEXT: v_add_f32_e64 v30, s20, 1.05025; SI-NEXT: v_add_f32_e64 v29, s23, 1.05026; SI-NEXT: v_add_f32_e64 v28, s22, 1.05027; SI-NEXT: v_add_f32_e64 v27, s25, 1.05028; SI-NEXT: v_add_f32_e64 v26, s24, 1.05029; SI-NEXT: v_add_f32_e64 v25, s27, 1.05030; SI-NEXT: v_add_f32_e64 v24, s26, 1.05031; SI-NEXT: v_lshr_b64 v[21:22], v[24:25], 165032; SI-NEXT: v_lshr_b64 v[17:18], v[26:27], 165033; SI-NEXT: v_lshr_b64 v[13:14], v[28:29], 165034; SI-NEXT: v_lshr_b64 v[9:10], v[30:31], 165035; SI-NEXT: v_lshr_b64 v[5:6], v[32:33], 165036; SI-NEXT: v_lshr_b64 v[1:2], v[34:35], 165037; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v255038; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v275039; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v295040; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v315041; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v335042; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v355043; SI-NEXT: s_branch .LBB29_55044; SI-NEXT: .LBB29_3:5045; SI-NEXT: ; implicit-def: $sgpr145046; SI-NEXT: ; implicit-def: $sgpr405047; SI-NEXT: ; implicit-def: $sgpr125048; SI-NEXT: ; implicit-def: $sgpr415049; SI-NEXT: ; implicit-def: $sgpr105050; SI-NEXT: ; implicit-def: $sgpr425051; SI-NEXT: ; implicit-def: $sgpr85052; SI-NEXT: ; implicit-def: $sgpr435053; SI-NEXT: ; implicit-def: $sgpr65054; SI-NEXT: ; implicit-def: $sgpr445055; SI-NEXT: ; implicit-def: $sgpr45056; SI-NEXT: ; implicit-def: $sgpr455057; SI-NEXT: s_branch .LBB29_25058; SI-NEXT: .LBB29_4:5059; SI-NEXT: v_mov_b32_e32 v34, s165060; SI-NEXT: v_mov_b32_e32 v35, s175061; SI-NEXT: v_mov_b32_e32 v32, s185062; SI-NEXT: v_mov_b32_e32 v33, s195063; SI-NEXT: v_mov_b32_e32 v30, s205064; SI-NEXT: v_mov_b32_e32 v31, s215065; SI-NEXT: v_mov_b32_e32 v28, s225066; SI-NEXT: v_mov_b32_e32 v29, s235067; SI-NEXT: v_mov_b32_e32 v26, s245068; SI-NEXT: v_mov_b32_e32 v27, s255069; SI-NEXT: v_mov_b32_e32 v24, s265070; SI-NEXT: v_mov_b32_e32 v25, s275071; SI-NEXT: v_mov_b32_e32 v3, s405072; SI-NEXT: v_mov_b32_e32 v7, s415073; SI-NEXT: v_mov_b32_e32 v11, s425074; SI-NEXT: v_mov_b32_e32 v15, s435075; SI-NEXT: v_mov_b32_e32 v19, s445076; SI-NEXT: v_mov_b32_e32 v23, s455077; SI-NEXT: v_mov_b32_e32 v1, s145078; SI-NEXT: v_mov_b32_e32 v5, s125079; SI-NEXT: v_mov_b32_e32 v9, s105080; SI-NEXT: v_mov_b32_e32 v13, s85081; SI-NEXT: v_mov_b32_e32 v17, s65082; SI-NEXT: v_mov_b32_e32 v21, s45083; SI-NEXT: .LBB29_5: ; %end5084; SI-NEXT: v_mov_b32_e32 v0, v345085; SI-NEXT: v_mov_b32_e32 v2, v355086; SI-NEXT: v_mov_b32_e32 v4, v325087; SI-NEXT: v_mov_b32_e32 v6, v335088; SI-NEXT: v_mov_b32_e32 v8, v305089; SI-NEXT: v_mov_b32_e32 v10, v315090; SI-NEXT: v_mov_b32_e32 v12, v285091; SI-NEXT: v_mov_b32_e32 v14, v295092; SI-NEXT: v_mov_b32_e32 v16, v265093; SI-NEXT: v_mov_b32_e32 v18, v275094; SI-NEXT: v_mov_b32_e32 v20, v245095; SI-NEXT: v_mov_b32_e32 v22, v255096; SI-NEXT: s_setpc_b64 s[30:31]5097;5098; VI-LABEL: bitcast_v12f32_to_v24i16_scalar:5099; VI: ; %bb.0:5100; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5101; VI-NEXT: s_cmp_lg_u32 s28, 05102; VI-NEXT: s_cbranch_scc0 .LBB29_35103; VI-NEXT: ; %bb.1: ; %cmp.false5104; VI-NEXT: s_cbranch_execnz .LBB29_45105; VI-NEXT: .LBB29_2: ; %cmp.true5106; VI-NEXT: v_add_f32_e64 v11, s27, 1.05107; VI-NEXT: v_add_f32_e64 v10, s26, 1.05108; VI-NEXT: v_add_f32_e64 v9, s25, 1.05109; VI-NEXT: v_add_f32_e64 v8, s24, 1.05110; VI-NEXT: v_add_f32_e64 v7, s23, 1.05111; VI-NEXT: v_add_f32_e64 v6, s22, 1.05112; VI-NEXT: v_add_f32_e64 v5, s21, 1.05113; VI-NEXT: v_add_f32_e64 v4, s20, 1.05114; VI-NEXT: v_add_f32_e64 v3, s19, 1.05115; VI-NEXT: v_add_f32_e64 v2, s18, 1.05116; VI-NEXT: v_add_f32_e64 v1, s17, 1.05117; VI-NEXT: v_add_f32_e64 v0, s16, 1.05118; VI-NEXT: s_setpc_b64 s[30:31]5119; VI-NEXT: .LBB29_3:5120; VI-NEXT: s_branch .LBB29_25121; VI-NEXT: .LBB29_4:5122; VI-NEXT: v_mov_b32_e32 v0, s165123; VI-NEXT: v_mov_b32_e32 v1, s175124; VI-NEXT: v_mov_b32_e32 v2, s185125; VI-NEXT: v_mov_b32_e32 v3, s195126; VI-NEXT: v_mov_b32_e32 v4, s205127; VI-NEXT: v_mov_b32_e32 v5, s215128; VI-NEXT: v_mov_b32_e32 v6, s225129; VI-NEXT: v_mov_b32_e32 v7, s235130; VI-NEXT: v_mov_b32_e32 v8, s245131; VI-NEXT: v_mov_b32_e32 v9, s255132; VI-NEXT: v_mov_b32_e32 v10, s265133; VI-NEXT: v_mov_b32_e32 v11, s275134; VI-NEXT: v_mov_b32_e32 v12, s285135; VI-NEXT: v_mov_b32_e32 v13, s295136; VI-NEXT: v_mov_b32_e32 v14, s305137; VI-NEXT: v_mov_b32_e32 v15, s315138; VI-NEXT: s_setpc_b64 s[30:31]5139;5140; GFX9-LABEL: bitcast_v12f32_to_v24i16_scalar:5141; GFX9: ; %bb.0:5142; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5143; GFX9-NEXT: s_cmp_lg_u32 s28, 05144; GFX9-NEXT: s_cbranch_scc0 .LBB29_35145; GFX9-NEXT: ; %bb.1: ; %cmp.false5146; GFX9-NEXT: s_cbranch_execnz .LBB29_45147; GFX9-NEXT: .LBB29_2: ; %cmp.true5148; GFX9-NEXT: v_add_f32_e64 v11, s27, 1.05149; GFX9-NEXT: v_add_f32_e64 v10, s26, 1.05150; GFX9-NEXT: v_add_f32_e64 v9, s25, 1.05151; GFX9-NEXT: v_add_f32_e64 v8, s24, 1.05152; GFX9-NEXT: v_add_f32_e64 v7, s23, 1.05153; GFX9-NEXT: v_add_f32_e64 v6, s22, 1.05154; GFX9-NEXT: v_add_f32_e64 v5, s21, 1.05155; GFX9-NEXT: v_add_f32_e64 v4, s20, 1.05156; GFX9-NEXT: v_add_f32_e64 v3, s19, 1.05157; GFX9-NEXT: v_add_f32_e64 v2, s18, 1.05158; GFX9-NEXT: v_add_f32_e64 v1, s17, 1.05159; GFX9-NEXT: v_add_f32_e64 v0, s16, 1.05160; GFX9-NEXT: s_setpc_b64 s[30:31]5161; GFX9-NEXT: .LBB29_3:5162; GFX9-NEXT: s_branch .LBB29_25163; GFX9-NEXT: .LBB29_4:5164; GFX9-NEXT: v_mov_b32_e32 v0, s165165; GFX9-NEXT: v_mov_b32_e32 v1, s175166; GFX9-NEXT: v_mov_b32_e32 v2, s185167; GFX9-NEXT: v_mov_b32_e32 v3, s195168; GFX9-NEXT: v_mov_b32_e32 v4, s205169; GFX9-NEXT: v_mov_b32_e32 v5, s215170; GFX9-NEXT: v_mov_b32_e32 v6, s225171; GFX9-NEXT: v_mov_b32_e32 v7, s235172; GFX9-NEXT: v_mov_b32_e32 v8, s245173; GFX9-NEXT: v_mov_b32_e32 v9, s255174; GFX9-NEXT: v_mov_b32_e32 v10, s265175; GFX9-NEXT: v_mov_b32_e32 v11, s275176; GFX9-NEXT: v_mov_b32_e32 v12, s285177; GFX9-NEXT: v_mov_b32_e32 v13, s295178; GFX9-NEXT: v_mov_b32_e32 v14, s305179; GFX9-NEXT: v_mov_b32_e32 v15, s315180; GFX9-NEXT: s_setpc_b64 s[30:31]5181;5182; GFX11-LABEL: bitcast_v12f32_to_v24i16_scalar:5183; GFX11: ; %bb.0:5184; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5185; GFX11-NEXT: s_mov_b32 s15, s35186; GFX11-NEXT: s_mov_b32 s14, s25187; GFX11-NEXT: s_mov_b32 s13, s15188; GFX11-NEXT: s_mov_b32 s12, s05189; GFX11-NEXT: s_cmp_lg_u32 s24, 05190; GFX11-NEXT: s_mov_b32 s0, 05191; GFX11-NEXT: s_cbranch_scc0 .LBB29_35192; GFX11-NEXT: ; %bb.1: ; %Flow5193; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s05194; GFX11-NEXT: s_cbranch_vccnz .LBB29_45195; GFX11-NEXT: .LBB29_2: ; %cmp.true5196; GFX11-NEXT: v_add_f32_e64 v11, s23, 1.05197; GFX11-NEXT: v_add_f32_e64 v10, s22, 1.05198; GFX11-NEXT: v_add_f32_e64 v9, s21, 1.05199; GFX11-NEXT: v_add_f32_e64 v8, s20, 1.05200; GFX11-NEXT: v_add_f32_e64 v7, s19, 1.05201; GFX11-NEXT: v_add_f32_e64 v6, s18, 1.05202; GFX11-NEXT: v_add_f32_e64 v5, s17, 1.05203; GFX11-NEXT: v_add_f32_e64 v4, s16, 1.05204; GFX11-NEXT: v_add_f32_e64 v3, s15, 1.05205; GFX11-NEXT: v_add_f32_e64 v2, s14, 1.05206; GFX11-NEXT: v_add_f32_e64 v1, s13, 1.05207; GFX11-NEXT: v_add_f32_e64 v0, s12, 1.05208; GFX11-NEXT: s_setpc_b64 s[30:31]5209; GFX11-NEXT: .LBB29_3:5210; GFX11-NEXT: s_branch .LBB29_25211; GFX11-NEXT: .LBB29_4:5212; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s135213; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s155214; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s175215; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s195216; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s215217; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s235218; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s255219; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s275220; GFX11-NEXT: s_setpc_b64 s[30:31]5221 %cmp = icmp eq i32 %b, 05222 br i1 %cmp, label %cmp.true, label %cmp.false5223 5224cmp.true:5225 %a1 = fadd <12 x float> %a, splat (float 1.000000e+00)5226 %a2 = bitcast <12 x float> %a1 to <24 x i16>5227 br label %end5228 5229cmp.false:5230 %a3 = bitcast <12 x float> %a to <24 x i16>5231 br label %end5232 5233end:5234 %phi = phi <24 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]5235 ret <24 x i16> %phi5236}5237 5238define <12 x float> @bitcast_v24i16_to_v12f32(<24 x i16> %a, i32 %b) {5239; SI-LABEL: bitcast_v24i16_to_v12f32:5240; SI: ; %bb.0:5241; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5242; SI-NEXT: v_mov_b32_e32 v30, v105243; SI-NEXT: v_mov_b32_e32 v29, v85244; SI-NEXT: v_mov_b32_e32 v28, v65245; SI-NEXT: v_mov_b32_e32 v27, v45246; SI-NEXT: v_mov_b32_e32 v26, v25247; SI-NEXT: v_mov_b32_e32 v25, v05248; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v245249; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v15250; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v35251; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v55252; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v75253; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v95254; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v115255; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v135256; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v155257; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v175258; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v195259; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v215260; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v235261; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr115262; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc5263; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]5264; SI-NEXT: s_cbranch_execnz .LBB30_35265; SI-NEXT: ; %bb.1: ; %Flow5266; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5267; SI-NEXT: s_cbranch_execnz .LBB30_45268; SI-NEXT: .LBB30_2: ; %end5269; SI-NEXT: s_or_b64 exec, exec, s[4:5]5270; SI-NEXT: s_setpc_b64 s[30:31]5271; SI-NEXT: .LBB30_3: ; %cmp.false5272; SI-NEXT: v_and_b32_e32 v0, 0xffff, v255273; SI-NEXT: v_and_b32_e32 v1, 0xffff, v265274; SI-NEXT: v_and_b32_e32 v2, 0xffff, v275275; SI-NEXT: v_and_b32_e32 v3, 0xffff, v285276; SI-NEXT: v_and_b32_e32 v4, 0xffff, v295277; SI-NEXT: v_and_b32_e32 v5, 0xffff, v305278; SI-NEXT: v_and_b32_e32 v6, 0xffff, v125279; SI-NEXT: v_and_b32_e32 v7, 0xffff, v145280; SI-NEXT: v_and_b32_e32 v8, 0xffff, v165281; SI-NEXT: v_and_b32_e32 v9, 0xffff, v185282; SI-NEXT: v_and_b32_e32 v10, 0xffff, v205283; SI-NEXT: v_and_b32_e32 v11, 0xffff, v225284; SI-NEXT: v_or_b32_e32 v0, v0, v385285; SI-NEXT: v_or_b32_e32 v1, v1, v375286; SI-NEXT: v_or_b32_e32 v2, v2, v365287; SI-NEXT: v_or_b32_e32 v3, v3, v355288; SI-NEXT: v_or_b32_e32 v4, v4, v345289; SI-NEXT: v_or_b32_e32 v5, v5, v335290; SI-NEXT: v_or_b32_e32 v6, v6, v325291; SI-NEXT: v_or_b32_e32 v7, v7, v315292; SI-NEXT: v_or_b32_e32 v8, v8, v245293; SI-NEXT: v_or_b32_e32 v9, v9, v175294; SI-NEXT: v_or_b32_e32 v10, v10, v155295; SI-NEXT: v_or_b32_e32 v11, v11, v135296; SI-NEXT: ; implicit-def: $vgpr255297; SI-NEXT: ; implicit-def: $vgpr265298; SI-NEXT: ; implicit-def: $vgpr275299; SI-NEXT: ; implicit-def: $vgpr285300; SI-NEXT: ; implicit-def: $vgpr295301; SI-NEXT: ; implicit-def: $vgpr305302; SI-NEXT: ; implicit-def: $vgpr125303; SI-NEXT: ; implicit-def: $vgpr145304; SI-NEXT: ; implicit-def: $vgpr165305; SI-NEXT: ; implicit-def: $vgpr185306; SI-NEXT: ; implicit-def: $vgpr205307; SI-NEXT: ; implicit-def: $vgpr225308; SI-NEXT: ; implicit-def: $vgpr385309; SI-NEXT: ; implicit-def: $vgpr375310; SI-NEXT: ; implicit-def: $vgpr365311; SI-NEXT: ; implicit-def: $vgpr355312; SI-NEXT: ; implicit-def: $vgpr345313; SI-NEXT: ; implicit-def: $vgpr335314; SI-NEXT: ; implicit-def: $vgpr325315; SI-NEXT: ; implicit-def: $vgpr315316; SI-NEXT: ; implicit-def: $vgpr245317; SI-NEXT: ; implicit-def: $vgpr175318; SI-NEXT: ; implicit-def: $vgpr155319; SI-NEXT: ; implicit-def: $vgpr135320; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5321; SI-NEXT: s_cbranch_execz .LBB30_25322; SI-NEXT: .LBB30_4: ; %cmp.true5323; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v255324; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v265325; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v275326; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v285327; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v295328; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v305329; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v125330; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v145331; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v165332; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v185333; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v205334; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v225335; SI-NEXT: v_and_b32_e32 v0, 0xffff, v05336; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15337; SI-NEXT: v_and_b32_e32 v2, 0xffff, v25338; SI-NEXT: v_and_b32_e32 v3, 0xffff, v35339; SI-NEXT: v_and_b32_e32 v4, 0xffff, v45340; SI-NEXT: v_and_b32_e32 v5, 0xffff, v55341; SI-NEXT: v_and_b32_e32 v6, 0xffff, v65342; SI-NEXT: v_and_b32_e32 v7, 0xffff, v75343; SI-NEXT: v_and_b32_e32 v8, 0xffff, v85344; SI-NEXT: v_and_b32_e32 v9, 0xffff, v95345; SI-NEXT: v_and_b32_e32 v10, 0xffff, v105346; SI-NEXT: v_and_b32_e32 v11, 0xffff, v115347; SI-NEXT: v_or_b32_e32 v0, v38, v05348; SI-NEXT: s_mov_b32 s6, 0x300005349; SI-NEXT: v_or_b32_e32 v1, v37, v15350; SI-NEXT: v_or_b32_e32 v2, v36, v25351; SI-NEXT: v_or_b32_e32 v3, v35, v35352; SI-NEXT: v_or_b32_e32 v4, v34, v45353; SI-NEXT: v_or_b32_e32 v5, v33, v55354; SI-NEXT: v_or_b32_e32 v6, v32, v65355; SI-NEXT: v_or_b32_e32 v7, v31, v75356; SI-NEXT: v_or_b32_e32 v8, v24, v85357; SI-NEXT: v_or_b32_e32 v9, v17, v95358; SI-NEXT: v_or_b32_e32 v10, v15, v105359; SI-NEXT: v_or_b32_e32 v11, v13, v115360; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v05361; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v15362; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v25363; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v35364; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v45365; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v55366; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v65367; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v75368; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v85369; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v95370; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v105371; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v115372; SI-NEXT: s_or_b64 exec, exec, s[4:5]5373; SI-NEXT: s_setpc_b64 s[30:31]5374;5375; VI-LABEL: bitcast_v24i16_to_v12f32:5376; VI: ; %bb.0:5377; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5378; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v125379; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc5380; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]5381; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5382; VI-NEXT: s_cbranch_execz .LBB30_25383; VI-NEXT: ; %bb.1: ; %cmp.true5384; VI-NEXT: v_mov_b32_e32 v13, 35385; VI-NEXT: v_add_u16_e32 v12, 3, v115386; VI-NEXT: v_add_u16_sdwa v11, v11, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD5387; VI-NEXT: v_or_b32_e32 v11, v12, v115388; VI-NEXT: v_add_u16_e32 v12, 3, v105389; VI-NEXT: v_add_u16_sdwa v10, v10, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD5390; VI-NEXT: v_or_b32_e32 v10, v12, v105391; VI-NEXT: v_add_u16_e32 v12, 3, v95392; VI-NEXT: v_add_u16_sdwa v9, v9, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD5393; VI-NEXT: v_or_b32_e32 v9, v12, v95394; VI-NEXT: v_add_u16_e32 v12, 3, v85395; VI-NEXT: v_add_u16_sdwa v8, v8, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD5396; VI-NEXT: v_or_b32_e32 v8, v12, v85397; VI-NEXT: v_add_u16_e32 v12, 3, v75398; VI-NEXT: v_add_u16_sdwa v7, v7, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD5399; VI-NEXT: v_or_b32_e32 v7, v12, v75400; VI-NEXT: v_add_u16_e32 v12, 3, v65401; VI-NEXT: v_add_u16_sdwa v6, v6, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD5402; VI-NEXT: v_or_b32_e32 v6, v12, v65403; VI-NEXT: v_add_u16_e32 v12, 3, v55404; VI-NEXT: v_add_u16_sdwa v5, v5, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD5405; VI-NEXT: v_or_b32_e32 v5, v12, v55406; VI-NEXT: v_add_u16_e32 v12, 3, v45407; VI-NEXT: v_add_u16_sdwa v4, v4, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD5408; VI-NEXT: v_or_b32_e32 v4, v12, v45409; VI-NEXT: v_add_u16_e32 v12, 3, v35410; VI-NEXT: v_add_u16_sdwa v3, v3, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD5411; VI-NEXT: v_or_b32_e32 v3, v12, v35412; VI-NEXT: v_add_u16_e32 v12, 3, v25413; VI-NEXT: v_add_u16_sdwa v2, v2, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD5414; VI-NEXT: v_or_b32_e32 v2, v12, v25415; VI-NEXT: v_add_u16_e32 v12, 3, v15416; VI-NEXT: v_add_u16_sdwa v1, v1, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD5417; VI-NEXT: v_or_b32_e32 v1, v12, v15418; VI-NEXT: v_add_u16_e32 v12, 3, v05419; VI-NEXT: v_add_u16_sdwa v0, v0, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD5420; VI-NEXT: v_or_b32_e32 v0, v12, v05421; VI-NEXT: .LBB30_2: ; %end5422; VI-NEXT: s_or_b64 exec, exec, s[4:5]5423; VI-NEXT: s_setpc_b64 s[30:31]5424;5425; GFX9-LABEL: bitcast_v24i16_to_v12f32:5426; GFX9: ; %bb.0:5427; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5428; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v125429; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc5430; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]5431; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5432; GFX9-NEXT: s_cbranch_execz .LBB30_25433; GFX9-NEXT: ; %bb.1: ; %cmp.true5434; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]5435; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]5436; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]5437; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]5438; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]5439; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]5440; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]5441; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]5442; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]5443; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]5444; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]5445; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]5446; GFX9-NEXT: .LBB30_2: ; %end5447; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]5448; GFX9-NEXT: s_setpc_b64 s[30:31]5449;5450; GFX11-LABEL: bitcast_v24i16_to_v12f32:5451; GFX11: ; %bb.0:5452; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5453; GFX11-NEXT: s_mov_b32 s0, exec_lo5454; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v125455; GFX11-NEXT: s_xor_b32 s0, exec_lo, s05456; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)5457; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s05458; GFX11-NEXT: s_cbranch_execz .LBB30_25459; GFX11-NEXT: ; %bb.1: ; %cmp.true5460; GFX11-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]5461; GFX11-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]5462; GFX11-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]5463; GFX11-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]5464; GFX11-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]5465; GFX11-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]5466; GFX11-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]5467; GFX11-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]5468; GFX11-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]5469; GFX11-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]5470; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]5471; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]5472; GFX11-NEXT: .LBB30_2: ; %end5473; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s05474; GFX11-NEXT: s_setpc_b64 s[30:31]5475 %cmp = icmp eq i32 %b, 05476 br i1 %cmp, label %cmp.true, label %cmp.false5477 5478cmp.true:5479 %a1 = add <24 x i16> %a, splat (i16 3)5480 %a2 = bitcast <24 x i16> %a1 to <12 x float>5481 br label %end5482 5483cmp.false:5484 %a3 = bitcast <24 x i16> %a to <12 x float>5485 br label %end5486 5487end:5488 %phi = phi <12 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]5489 ret <12 x float> %phi5490}5491 5492define inreg <12 x float> @bitcast_v24i16_to_v12f32_scalar(<24 x i16> inreg %a, i32 inreg %b) {5493; SI-LABEL: bitcast_v24i16_to_v12f32_scalar:5494; SI: ; %bb.0:5495; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5496; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v105497; SI-NEXT: v_mov_b32_e32 v12, v85498; SI-NEXT: v_mov_b32_e32 v13, v65499; SI-NEXT: v_mov_b32_e32 v14, v45500; SI-NEXT: v_mov_b32_e32 v15, v25501; SI-NEXT: v_mov_b32_e32 v16, v05502; SI-NEXT: s_and_b64 s[4:5], vcc, exec5503; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v15504; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v35505; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v55506; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v75507; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v95508; SI-NEXT: s_cbranch_scc0 .LBB31_45509; SI-NEXT: ; %bb.1: ; %cmp.false5510; SI-NEXT: s_and_b32 s4, s16, 0xffff5511; SI-NEXT: s_lshl_b32 s5, s17, 165512; SI-NEXT: s_or_b32 s4, s4, s55513; SI-NEXT: s_and_b32 s5, s18, 0xffff5514; SI-NEXT: s_lshl_b32 s6, s19, 165515; SI-NEXT: s_or_b32 s5, s5, s65516; SI-NEXT: s_and_b32 s6, s20, 0xffff5517; SI-NEXT: s_lshl_b32 s7, s21, 165518; SI-NEXT: s_or_b32 s6, s6, s75519; SI-NEXT: s_and_b32 s7, s22, 0xffff5520; SI-NEXT: s_lshl_b32 s8, s23, 165521; SI-NEXT: v_and_b32_e32 v0, 0xffff, v165522; SI-NEXT: s_or_b32 s7, s7, s85523; SI-NEXT: s_and_b32 s8, s24, 0xffff5524; SI-NEXT: s_lshl_b32 s9, s25, 165525; SI-NEXT: v_or_b32_e32 v7, v0, v215526; SI-NEXT: v_and_b32_e32 v0, 0xffff, v145527; SI-NEXT: s_or_b32 s8, s8, s95528; SI-NEXT: s_and_b32 s9, s26, 0xffff5529; SI-NEXT: s_lshl_b32 s10, s27, 165530; SI-NEXT: v_or_b32_e32 v9, v0, v195531; SI-NEXT: v_and_b32_e32 v0, 0xffff, v135532; SI-NEXT: s_or_b32 s9, s9, s105533; SI-NEXT: s_and_b32 s10, s28, 0xffff5534; SI-NEXT: s_lshl_b32 s11, s29, 165535; SI-NEXT: v_and_b32_e32 v1, 0xffff, v155536; SI-NEXT: v_or_b32_e32 v10, v0, v185537; SI-NEXT: v_and_b32_e32 v0, 0xffff, v125538; SI-NEXT: s_or_b32 s10, s10, s115539; SI-NEXT: v_or_b32_e32 v8, v1, v205540; SI-NEXT: v_or_b32_e32 v11, v0, v175541; SI-NEXT: v_mov_b32_e32 v0, s45542; SI-NEXT: v_mov_b32_e32 v1, s55543; SI-NEXT: v_mov_b32_e32 v2, s65544; SI-NEXT: v_mov_b32_e32 v3, s75545; SI-NEXT: v_mov_b32_e32 v4, s85546; SI-NEXT: v_mov_b32_e32 v5, s95547; SI-NEXT: v_mov_b32_e32 v6, s105548; SI-NEXT: s_cbranch_execnz .LBB31_35549; SI-NEXT: .LBB31_2: ; %cmp.true5550; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v165551; SI-NEXT: v_and_b32_e32 v0, 0xffff, v05552; SI-NEXT: v_or_b32_e32 v0, v21, v05553; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v05554; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v155555; SI-NEXT: v_and_b32_e32 v0, 0xffff, v05556; SI-NEXT: s_add_i32 s16, s16, 35557; SI-NEXT: v_or_b32_e32 v0, v20, v05558; SI-NEXT: s_and_b32 s4, s16, 0xffff5559; SI-NEXT: s_lshl_b32 s5, s17, 165560; SI-NEXT: s_add_i32 s18, s18, 35561; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v05562; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v145563; SI-NEXT: s_or_b32 s4, s5, s45564; SI-NEXT: s_and_b32 s5, s18, 0xffff5565; SI-NEXT: s_lshl_b32 s6, s19, 165566; SI-NEXT: s_add_i32 s20, s20, 35567; SI-NEXT: v_and_b32_e32 v0, 0xffff, v05568; SI-NEXT: s_or_b32 s5, s6, s55569; SI-NEXT: s_and_b32 s6, s20, 0xffff5570; SI-NEXT: s_lshl_b32 s7, s21, 165571; SI-NEXT: s_add_i32 s22, s22, 35572; SI-NEXT: v_or_b32_e32 v0, v19, v05573; SI-NEXT: s_or_b32 s6, s7, s65574; SI-NEXT: s_and_b32 s7, s22, 0xffff5575; SI-NEXT: s_lshl_b32 s8, s23, 165576; SI-NEXT: s_add_i32 s24, s24, 35577; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v05578; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v135579; SI-NEXT: s_or_b32 s7, s8, s75580; SI-NEXT: s_and_b32 s8, s24, 0xffff5581; SI-NEXT: s_lshl_b32 s9, s25, 165582; SI-NEXT: s_add_i32 s26, s26, 35583; SI-NEXT: v_and_b32_e32 v0, 0xffff, v05584; SI-NEXT: s_or_b32 s8, s9, s85585; SI-NEXT: s_and_b32 s9, s26, 0xffff5586; SI-NEXT: s_lshl_b32 s10, s27, 165587; SI-NEXT: s_add_i32 s28, s28, 35588; SI-NEXT: v_or_b32_e32 v0, v18, v05589; SI-NEXT: s_or_b32 s9, s10, s95590; SI-NEXT: s_and_b32 s10, s28, 0xffff5591; SI-NEXT: s_lshl_b32 s11, s29, 165592; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v05593; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v125594; SI-NEXT: s_or_b32 s10, s11, s105595; SI-NEXT: v_and_b32_e32 v0, 0xffff, v05596; SI-NEXT: s_add_i32 s4, s4, 0x300005597; SI-NEXT: s_add_i32 s5, s5, 0x300005598; SI-NEXT: s_add_i32 s6, s6, 0x300005599; SI-NEXT: s_add_i32 s7, s7, 0x300005600; SI-NEXT: s_add_i32 s8, s8, 0x300005601; SI-NEXT: s_add_i32 s9, s9, 0x300005602; SI-NEXT: s_add_i32 s10, s10, 0x300005603; SI-NEXT: v_or_b32_e32 v0, v17, v05604; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v05605; SI-NEXT: v_mov_b32_e32 v0, s45606; SI-NEXT: v_mov_b32_e32 v1, s55607; SI-NEXT: v_mov_b32_e32 v2, s65608; SI-NEXT: v_mov_b32_e32 v3, s75609; SI-NEXT: v_mov_b32_e32 v4, s85610; SI-NEXT: v_mov_b32_e32 v5, s95611; SI-NEXT: v_mov_b32_e32 v6, s105612; SI-NEXT: .LBB31_3: ; %end5613; SI-NEXT: s_setpc_b64 s[30:31]5614; SI-NEXT: .LBB31_4:5615; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr115616; SI-NEXT: s_branch .LBB31_25617;5618; VI-LABEL: bitcast_v24i16_to_v12f32_scalar:5619; VI: ; %bb.0:5620; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5621; VI-NEXT: s_cmp_lg_u32 s28, 05622; VI-NEXT: s_cbranch_scc0 .LBB31_45623; VI-NEXT: ; %bb.1: ; %cmp.false5624; VI-NEXT: s_cbranch_execnz .LBB31_35625; VI-NEXT: .LBB31_2: ; %cmp.true5626; VI-NEXT: s_add_i32 s5, s27, 35627; VI-NEXT: s_and_b32 s4, s27, 0xffff00005628; VI-NEXT: s_and_b32 s5, s5, 0xffff5629; VI-NEXT: s_or_b32 s4, s4, s55630; VI-NEXT: s_add_i32 s5, s26, 35631; VI-NEXT: s_add_i32 s27, s4, 0x300005632; VI-NEXT: s_and_b32 s4, s26, 0xffff00005633; VI-NEXT: s_and_b32 s5, s5, 0xffff5634; VI-NEXT: s_or_b32 s4, s4, s55635; VI-NEXT: s_add_i32 s5, s25, 35636; VI-NEXT: s_add_i32 s26, s4, 0x300005637; VI-NEXT: s_and_b32 s4, s25, 0xffff00005638; VI-NEXT: s_and_b32 s5, s5, 0xffff5639; VI-NEXT: s_or_b32 s4, s4, s55640; VI-NEXT: s_add_i32 s5, s24, 35641; VI-NEXT: s_add_i32 s25, s4, 0x300005642; VI-NEXT: s_and_b32 s4, s24, 0xffff00005643; VI-NEXT: s_and_b32 s5, s5, 0xffff5644; VI-NEXT: s_or_b32 s4, s4, s55645; VI-NEXT: s_add_i32 s5, s23, 35646; VI-NEXT: s_add_i32 s24, s4, 0x300005647; VI-NEXT: s_and_b32 s4, s23, 0xffff00005648; VI-NEXT: s_and_b32 s5, s5, 0xffff5649; VI-NEXT: s_or_b32 s4, s4, s55650; VI-NEXT: s_add_i32 s5, s22, 35651; VI-NEXT: s_add_i32 s23, s4, 0x300005652; VI-NEXT: s_and_b32 s4, s22, 0xffff00005653; VI-NEXT: s_and_b32 s5, s5, 0xffff5654; VI-NEXT: s_or_b32 s4, s4, s55655; VI-NEXT: s_add_i32 s5, s21, 35656; VI-NEXT: s_add_i32 s22, s4, 0x300005657; VI-NEXT: s_and_b32 s4, s21, 0xffff00005658; VI-NEXT: s_and_b32 s5, s5, 0xffff5659; VI-NEXT: s_or_b32 s4, s4, s55660; VI-NEXT: s_add_i32 s5, s20, 35661; VI-NEXT: s_add_i32 s21, s4, 0x300005662; VI-NEXT: s_and_b32 s4, s20, 0xffff00005663; VI-NEXT: s_and_b32 s5, s5, 0xffff5664; VI-NEXT: s_or_b32 s4, s4, s55665; VI-NEXT: s_add_i32 s5, s19, 35666; VI-NEXT: s_add_i32 s20, s4, 0x300005667; VI-NEXT: s_and_b32 s4, s19, 0xffff00005668; VI-NEXT: s_and_b32 s5, s5, 0xffff5669; VI-NEXT: s_or_b32 s4, s4, s55670; VI-NEXT: s_add_i32 s5, s18, 35671; VI-NEXT: s_add_i32 s19, s4, 0x300005672; VI-NEXT: s_and_b32 s4, s18, 0xffff00005673; VI-NEXT: s_and_b32 s5, s5, 0xffff5674; VI-NEXT: s_or_b32 s4, s4, s55675; VI-NEXT: s_add_i32 s5, s17, 35676; VI-NEXT: s_add_i32 s18, s4, 0x300005677; VI-NEXT: s_and_b32 s4, s17, 0xffff00005678; VI-NEXT: s_and_b32 s5, s5, 0xffff5679; VI-NEXT: s_or_b32 s4, s4, s55680; VI-NEXT: s_add_i32 s5, s16, 35681; VI-NEXT: s_add_i32 s17, s4, 0x300005682; VI-NEXT: s_and_b32 s4, s16, 0xffff00005683; VI-NEXT: s_and_b32 s5, s5, 0xffff5684; VI-NEXT: s_or_b32 s4, s4, s55685; VI-NEXT: s_add_i32 s16, s4, 0x300005686; VI-NEXT: .LBB31_3: ; %end5687; VI-NEXT: v_mov_b32_e32 v0, s165688; VI-NEXT: v_mov_b32_e32 v1, s175689; VI-NEXT: v_mov_b32_e32 v2, s185690; VI-NEXT: v_mov_b32_e32 v3, s195691; VI-NEXT: v_mov_b32_e32 v4, s205692; VI-NEXT: v_mov_b32_e32 v5, s215693; VI-NEXT: v_mov_b32_e32 v6, s225694; VI-NEXT: v_mov_b32_e32 v7, s235695; VI-NEXT: v_mov_b32_e32 v8, s245696; VI-NEXT: v_mov_b32_e32 v9, s255697; VI-NEXT: v_mov_b32_e32 v10, s265698; VI-NEXT: v_mov_b32_e32 v11, s275699; VI-NEXT: s_setpc_b64 s[30:31]5700; VI-NEXT: .LBB31_4:5701; VI-NEXT: s_branch .LBB31_25702;5703; GFX9-LABEL: bitcast_v24i16_to_v12f32_scalar:5704; GFX9: ; %bb.0:5705; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5706; GFX9-NEXT: s_cmp_lg_u32 s28, 05707; GFX9-NEXT: s_cbranch_scc0 .LBB31_35708; GFX9-NEXT: ; %bb.1: ; %cmp.false5709; GFX9-NEXT: s_cbranch_execnz .LBB31_45710; GFX9-NEXT: .LBB31_2: ; %cmp.true5711; GFX9-NEXT: v_pk_add_u16 v11, s27, 3 op_sel_hi:[1,0]5712; GFX9-NEXT: v_pk_add_u16 v10, s26, 3 op_sel_hi:[1,0]5713; GFX9-NEXT: v_pk_add_u16 v9, s25, 3 op_sel_hi:[1,0]5714; GFX9-NEXT: v_pk_add_u16 v8, s24, 3 op_sel_hi:[1,0]5715; GFX9-NEXT: v_pk_add_u16 v7, s23, 3 op_sel_hi:[1,0]5716; GFX9-NEXT: v_pk_add_u16 v6, s22, 3 op_sel_hi:[1,0]5717; GFX9-NEXT: v_pk_add_u16 v5, s21, 3 op_sel_hi:[1,0]5718; GFX9-NEXT: v_pk_add_u16 v4, s20, 3 op_sel_hi:[1,0]5719; GFX9-NEXT: v_pk_add_u16 v3, s19, 3 op_sel_hi:[1,0]5720; GFX9-NEXT: v_pk_add_u16 v2, s18, 3 op_sel_hi:[1,0]5721; GFX9-NEXT: v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]5722; GFX9-NEXT: v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]5723; GFX9-NEXT: s_setpc_b64 s[30:31]5724; GFX9-NEXT: .LBB31_3:5725; GFX9-NEXT: s_branch .LBB31_25726; GFX9-NEXT: .LBB31_4:5727; GFX9-NEXT: v_mov_b32_e32 v0, s165728; GFX9-NEXT: v_mov_b32_e32 v1, s175729; GFX9-NEXT: v_mov_b32_e32 v2, s185730; GFX9-NEXT: v_mov_b32_e32 v3, s195731; GFX9-NEXT: v_mov_b32_e32 v4, s205732; GFX9-NEXT: v_mov_b32_e32 v5, s215733; GFX9-NEXT: v_mov_b32_e32 v6, s225734; GFX9-NEXT: v_mov_b32_e32 v7, s235735; GFX9-NEXT: v_mov_b32_e32 v8, s245736; GFX9-NEXT: v_mov_b32_e32 v9, s255737; GFX9-NEXT: v_mov_b32_e32 v10, s265738; GFX9-NEXT: v_mov_b32_e32 v11, s275739; GFX9-NEXT: s_setpc_b64 s[30:31]5740;5741; GFX11-LABEL: bitcast_v24i16_to_v12f32_scalar:5742; GFX11: ; %bb.0:5743; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5744; GFX11-NEXT: s_mov_b32 s15, s35745; GFX11-NEXT: s_mov_b32 s14, s25746; GFX11-NEXT: s_mov_b32 s13, s15747; GFX11-NEXT: s_mov_b32 s12, s05748; GFX11-NEXT: s_cmp_lg_u32 s24, 05749; GFX11-NEXT: s_mov_b32 s0, 05750; GFX11-NEXT: s_cbranch_scc0 .LBB31_35751; GFX11-NEXT: ; %bb.1: ; %Flow5752; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s05753; GFX11-NEXT: s_cbranch_vccnz .LBB31_45754; GFX11-NEXT: .LBB31_2: ; %cmp.true5755; GFX11-NEXT: v_pk_add_u16 v11, s23, 3 op_sel_hi:[1,0]5756; GFX11-NEXT: v_pk_add_u16 v10, s22, 3 op_sel_hi:[1,0]5757; GFX11-NEXT: v_pk_add_u16 v9, s21, 3 op_sel_hi:[1,0]5758; GFX11-NEXT: v_pk_add_u16 v8, s20, 3 op_sel_hi:[1,0]5759; GFX11-NEXT: v_pk_add_u16 v7, s19, 3 op_sel_hi:[1,0]5760; GFX11-NEXT: v_pk_add_u16 v6, s18, 3 op_sel_hi:[1,0]5761; GFX11-NEXT: v_pk_add_u16 v5, s17, 3 op_sel_hi:[1,0]5762; GFX11-NEXT: v_pk_add_u16 v4, s16, 3 op_sel_hi:[1,0]5763; GFX11-NEXT: v_pk_add_u16 v3, s15, 3 op_sel_hi:[1,0]5764; GFX11-NEXT: v_pk_add_u16 v2, s14, 3 op_sel_hi:[1,0]5765; GFX11-NEXT: v_pk_add_u16 v1, s13, 3 op_sel_hi:[1,0]5766; GFX11-NEXT: v_pk_add_u16 v0, s12, 3 op_sel_hi:[1,0]5767; GFX11-NEXT: s_setpc_b64 s[30:31]5768; GFX11-NEXT: .LBB31_3:5769; GFX11-NEXT: s_branch .LBB31_25770; GFX11-NEXT: .LBB31_4:5771; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s135772; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s155773; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s175774; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s195775; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s215776; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s235777; GFX11-NEXT: s_setpc_b64 s[30:31]5778 %cmp = icmp eq i32 %b, 05779 br i1 %cmp, label %cmp.true, label %cmp.false5780 5781cmp.true:5782 %a1 = add <24 x i16> %a, splat (i16 3)5783 %a2 = bitcast <24 x i16> %a1 to <12 x float>5784 br label %end5785 5786cmp.false:5787 %a3 = bitcast <24 x i16> %a to <12 x float>5788 br label %end5789 5790end:5791 %phi = phi <12 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]5792 ret <12 x float> %phi5793}5794 5795define <24 x half> @bitcast_v12f32_to_v24f16(<12 x float> %a, i32 %b) {5796; SI-LABEL: bitcast_v12f32_to_v24f16:5797; SI: ; %bb.0:5798; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5799; SI-NEXT: v_mov_b32_e32 v35, v115800; SI-NEXT: v_mov_b32_e32 v34, v105801; SI-NEXT: v_mov_b32_e32 v33, v95802; SI-NEXT: v_mov_b32_e32 v32, v85803; SI-NEXT: v_mov_b32_e32 v31, v75804; SI-NEXT: v_mov_b32_e32 v30, v65805; SI-NEXT: v_mov_b32_e32 v29, v55806; SI-NEXT: v_mov_b32_e32 v28, v45807; SI-NEXT: v_mov_b32_e32 v27, v35808; SI-NEXT: v_mov_b32_e32 v26, v25809; SI-NEXT: v_mov_b32_e32 v25, v15810; SI-NEXT: v_mov_b32_e32 v24, v05811; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v125812; SI-NEXT: ; implicit-def: $vgpr05813; SI-NEXT: ; implicit-def: $vgpr15814; SI-NEXT: ; implicit-def: $vgpr25815; SI-NEXT: ; implicit-def: $vgpr35816; SI-NEXT: ; implicit-def: $vgpr45817; SI-NEXT: ; implicit-def: $vgpr55818; SI-NEXT: ; implicit-def: $vgpr65819; SI-NEXT: ; implicit-def: $vgpr75820; SI-NEXT: ; implicit-def: $vgpr85821; SI-NEXT: ; implicit-def: $vgpr95822; SI-NEXT: ; implicit-def: $vgpr105823; SI-NEXT: ; implicit-def: $vgpr115824; SI-NEXT: ; implicit-def: $vgpr125825; SI-NEXT: ; implicit-def: $vgpr135826; SI-NEXT: ; implicit-def: $vgpr145827; SI-NEXT: ; implicit-def: $vgpr155828; SI-NEXT: ; implicit-def: $vgpr165829; SI-NEXT: ; implicit-def: $vgpr175830; SI-NEXT: ; implicit-def: $vgpr185831; SI-NEXT: ; implicit-def: $vgpr195832; SI-NEXT: ; implicit-def: $vgpr205833; SI-NEXT: ; implicit-def: $vgpr215834; SI-NEXT: ; implicit-def: $vgpr225835; SI-NEXT: ; implicit-def: $vgpr235836; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc5837; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]5838; SI-NEXT: s_cbranch_execnz .LBB32_35839; SI-NEXT: ; %bb.1: ; %Flow5840; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5841; SI-NEXT: s_cbranch_execnz .LBB32_45842; SI-NEXT: .LBB32_2: ; %end5843; SI-NEXT: s_or_b64 exec, exec, s[4:5]5844; SI-NEXT: s_setpc_b64 s[30:31]5845; SI-NEXT: .LBB32_3: ; %cmp.false5846; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v355847; SI-NEXT: v_cvt_f32_f16_e32 v23, v05848; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v345849; SI-NEXT: v_cvt_f32_f16_e32 v21, v05850; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v335851; SI-NEXT: v_cvt_f32_f16_e32 v19, v05852; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v325853; SI-NEXT: v_cvt_f32_f16_e32 v17, v05854; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v315855; SI-NEXT: v_cvt_f32_f16_e32 v15, v05856; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v305857; SI-NEXT: v_cvt_f32_f16_e32 v13, v05858; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v295859; SI-NEXT: v_cvt_f32_f16_e32 v11, v05860; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v285861; SI-NEXT: v_cvt_f32_f16_e32 v9, v05862; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v275863; SI-NEXT: v_cvt_f32_f16_e32 v7, v05864; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v265865; SI-NEXT: v_cvt_f32_f16_e32 v5, v05866; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v255867; SI-NEXT: v_cvt_f32_f16_e32 v3, v05868; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v245869; SI-NEXT: v_cvt_f32_f16_e32 v1, v05870; SI-NEXT: v_cvt_f32_f16_e32 v22, v355871; SI-NEXT: v_cvt_f32_f16_e32 v20, v345872; SI-NEXT: v_cvt_f32_f16_e32 v18, v335873; SI-NEXT: v_cvt_f32_f16_e32 v16, v325874; SI-NEXT: v_cvt_f32_f16_e32 v14, v315875; SI-NEXT: v_cvt_f32_f16_e32 v12, v305876; SI-NEXT: v_cvt_f32_f16_e32 v10, v295877; SI-NEXT: v_cvt_f32_f16_e32 v8, v285878; SI-NEXT: v_cvt_f32_f16_e32 v6, v275879; SI-NEXT: v_cvt_f32_f16_e32 v4, v265880; SI-NEXT: v_cvt_f32_f16_e32 v2, v255881; SI-NEXT: v_cvt_f32_f16_e32 v0, v245882; SI-NEXT: ; implicit-def: $vgpr245883; SI-NEXT: ; implicit-def: $vgpr255884; SI-NEXT: ; implicit-def: $vgpr265885; SI-NEXT: ; implicit-def: $vgpr275886; SI-NEXT: ; implicit-def: $vgpr285887; SI-NEXT: ; implicit-def: $vgpr295888; SI-NEXT: ; implicit-def: $vgpr305889; SI-NEXT: ; implicit-def: $vgpr315890; SI-NEXT: ; implicit-def: $vgpr325891; SI-NEXT: ; implicit-def: $vgpr335892; SI-NEXT: ; implicit-def: $vgpr345893; SI-NEXT: ; implicit-def: $vgpr355894; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5895; SI-NEXT: s_cbranch_execz .LBB32_25896; SI-NEXT: .LBB32_4: ; %cmp.true5897; SI-NEXT: v_add_f32_e32 v1, 1.0, v245898; SI-NEXT: v_add_f32_e32 v3, 1.0, v255899; SI-NEXT: v_add_f32_e32 v5, 1.0, v265900; SI-NEXT: v_add_f32_e32 v7, 1.0, v275901; SI-NEXT: v_add_f32_e32 v9, 1.0, v285902; SI-NEXT: v_add_f32_e32 v11, 1.0, v295903; SI-NEXT: v_add_f32_e32 v13, 1.0, v305904; SI-NEXT: v_add_f32_e32 v15, 1.0, v315905; SI-NEXT: v_add_f32_e32 v17, 1.0, v325906; SI-NEXT: v_add_f32_e32 v19, 1.0, v335907; SI-NEXT: v_add_f32_e32 v21, 1.0, v345908; SI-NEXT: v_add_f32_e32 v23, 1.0, v355909; SI-NEXT: v_cvt_f32_f16_e32 v22, v235910; SI-NEXT: v_cvt_f32_f16_e32 v20, v215911; SI-NEXT: v_cvt_f32_f16_e32 v18, v195912; SI-NEXT: v_cvt_f32_f16_e32 v16, v175913; SI-NEXT: v_cvt_f32_f16_e32 v14, v155914; SI-NEXT: v_cvt_f32_f16_e32 v12, v135915; SI-NEXT: v_cvt_f32_f16_e32 v10, v115916; SI-NEXT: v_cvt_f32_f16_e32 v8, v95917; SI-NEXT: v_cvt_f32_f16_e32 v6, v75918; SI-NEXT: v_cvt_f32_f16_e32 v4, v55919; SI-NEXT: v_cvt_f32_f16_e32 v2, v35920; SI-NEXT: v_cvt_f32_f16_e32 v0, v15921; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v235922; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v215923; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v195924; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v175925; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v155926; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v135927; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v115928; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v95929; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v75930; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v55931; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35932; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v15933; SI-NEXT: v_cvt_f32_f16_e32 v23, v235934; SI-NEXT: v_cvt_f32_f16_e32 v21, v215935; SI-NEXT: v_cvt_f32_f16_e32 v19, v195936; SI-NEXT: v_cvt_f32_f16_e32 v17, v175937; SI-NEXT: v_cvt_f32_f16_e32 v15, v155938; SI-NEXT: v_cvt_f32_f16_e32 v13, v135939; SI-NEXT: v_cvt_f32_f16_e32 v11, v115940; SI-NEXT: v_cvt_f32_f16_e32 v9, v95941; SI-NEXT: v_cvt_f32_f16_e32 v7, v75942; SI-NEXT: v_cvt_f32_f16_e32 v5, v55943; SI-NEXT: v_cvt_f32_f16_e32 v3, v35944; SI-NEXT: v_cvt_f32_f16_e32 v1, v15945; SI-NEXT: s_or_b64 exec, exec, s[4:5]5946; SI-NEXT: s_setpc_b64 s[30:31]5947;5948; VI-LABEL: bitcast_v12f32_to_v24f16:5949; VI: ; %bb.0:5950; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5951; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v125952; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc5953; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]5954; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5955; VI-NEXT: s_cbranch_execz .LBB32_25956; VI-NEXT: ; %bb.1: ; %cmp.true5957; VI-NEXT: v_add_f32_e32 v11, 1.0, v115958; VI-NEXT: v_add_f32_e32 v10, 1.0, v105959; VI-NEXT: v_add_f32_e32 v9, 1.0, v95960; VI-NEXT: v_add_f32_e32 v8, 1.0, v85961; VI-NEXT: v_add_f32_e32 v7, 1.0, v75962; VI-NEXT: v_add_f32_e32 v6, 1.0, v65963; VI-NEXT: v_add_f32_e32 v5, 1.0, v55964; VI-NEXT: v_add_f32_e32 v4, 1.0, v45965; VI-NEXT: v_add_f32_e32 v3, 1.0, v35966; VI-NEXT: v_add_f32_e32 v2, 1.0, v25967; VI-NEXT: v_add_f32_e32 v1, 1.0, v15968; VI-NEXT: v_add_f32_e32 v0, 1.0, v05969; VI-NEXT: .LBB32_2: ; %end5970; VI-NEXT: s_or_b64 exec, exec, s[4:5]5971; VI-NEXT: s_setpc_b64 s[30:31]5972;5973; GFX9-LABEL: bitcast_v12f32_to_v24f16:5974; GFX9: ; %bb.0:5975; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5976; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v125977; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc5978; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]5979; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5980; GFX9-NEXT: s_cbranch_execz .LBB32_25981; GFX9-NEXT: ; %bb.1: ; %cmp.true5982; GFX9-NEXT: v_add_f32_e32 v11, 1.0, v115983; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v105984; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v95985; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v85986; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v75987; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v65988; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v55989; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v45990; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v35991; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v25992; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v15993; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v05994; GFX9-NEXT: .LBB32_2: ; %end5995; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]5996; GFX9-NEXT: s_setpc_b64 s[30:31]5997;5998; GFX11-LABEL: bitcast_v12f32_to_v24f16:5999; GFX11: ; %bb.0:6000; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6001; GFX11-NEXT: s_mov_b32 s0, exec_lo6002; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v126003; GFX11-NEXT: s_xor_b32 s0, exec_lo, s06004; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)6005; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s06006; GFX11-NEXT: ; %bb.1: ; %cmp.true6007; GFX11-NEXT: v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v106008; GFX11-NEXT: v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v86009; GFX11-NEXT: v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v66010; GFX11-NEXT: v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v46011; GFX11-NEXT: v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v26012; GFX11-NEXT: v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v06013; GFX11-NEXT: ; %bb.2: ; %end6014; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s06015; GFX11-NEXT: s_setpc_b64 s[30:31]6016 %cmp = icmp eq i32 %b, 06017 br i1 %cmp, label %cmp.true, label %cmp.false6018 6019cmp.true:6020 %a1 = fadd <12 x float> %a, splat (float 1.000000e+00)6021 %a2 = bitcast <12 x float> %a1 to <24 x half>6022 br label %end6023 6024cmp.false:6025 %a3 = bitcast <12 x float> %a to <24 x half>6026 br label %end6027 6028end:6029 %phi = phi <24 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]6030 ret <24 x half> %phi6031}6032 6033define inreg <24 x half> @bitcast_v12f32_to_v24f16_scalar(<12 x float> inreg %a, i32 inreg %b) {6034; SI-LABEL: bitcast_v12f32_to_v24f16_scalar:6035; SI: ; %bb.0:6036; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6037; SI-NEXT: s_cmp_lg_u32 s28, 06038; SI-NEXT: s_cbranch_scc0 .LBB33_46039; SI-NEXT: ; %bb.1: ; %cmp.false6040; SI-NEXT: s_lshr_b32 s4, s27, 166041; SI-NEXT: v_cvt_f32_f16_e32 v23, s46042; SI-NEXT: s_lshr_b32 s4, s26, 166043; SI-NEXT: v_cvt_f32_f16_e32 v21, s46044; SI-NEXT: s_lshr_b32 s4, s25, 166045; SI-NEXT: v_cvt_f32_f16_e32 v19, s46046; SI-NEXT: s_lshr_b32 s4, s24, 166047; SI-NEXT: v_cvt_f32_f16_e32 v17, s46048; SI-NEXT: s_lshr_b32 s4, s23, 166049; SI-NEXT: v_cvt_f32_f16_e32 v15, s46050; SI-NEXT: s_lshr_b32 s4, s22, 166051; SI-NEXT: v_cvt_f32_f16_e32 v13, s46052; SI-NEXT: s_lshr_b32 s4, s21, 166053; SI-NEXT: v_cvt_f32_f16_e32 v11, s46054; SI-NEXT: s_lshr_b32 s4, s20, 166055; SI-NEXT: v_cvt_f32_f16_e32 v9, s46056; SI-NEXT: s_lshr_b32 s4, s19, 166057; SI-NEXT: v_cvt_f32_f16_e32 v7, s46058; SI-NEXT: s_lshr_b32 s4, s18, 166059; SI-NEXT: v_cvt_f32_f16_e32 v5, s46060; SI-NEXT: s_lshr_b32 s4, s17, 166061; SI-NEXT: v_cvt_f32_f16_e32 v3, s46062; SI-NEXT: s_lshr_b32 s4, s16, 166063; SI-NEXT: v_cvt_f32_f16_e32 v1, s46064; SI-NEXT: v_cvt_f32_f16_e32 v22, s276065; SI-NEXT: v_cvt_f32_f16_e32 v20, s266066; SI-NEXT: v_cvt_f32_f16_e32 v18, s256067; SI-NEXT: v_cvt_f32_f16_e32 v16, s246068; SI-NEXT: v_cvt_f32_f16_e32 v14, s236069; SI-NEXT: v_cvt_f32_f16_e32 v12, s226070; SI-NEXT: v_cvt_f32_f16_e32 v10, s216071; SI-NEXT: v_cvt_f32_f16_e32 v8, s206072; SI-NEXT: v_cvt_f32_f16_e32 v6, s196073; SI-NEXT: v_cvt_f32_f16_e32 v4, s186074; SI-NEXT: v_cvt_f32_f16_e32 v2, s176075; SI-NEXT: v_cvt_f32_f16_e32 v0, s166076; SI-NEXT: s_cbranch_execnz .LBB33_36077; SI-NEXT: .LBB33_2: ; %cmp.true6078; SI-NEXT: v_add_f32_e64 v1, s16, 1.06079; SI-NEXT: v_add_f32_e64 v3, s17, 1.06080; SI-NEXT: v_add_f32_e64 v5, s18, 1.06081; SI-NEXT: v_add_f32_e64 v7, s19, 1.06082; SI-NEXT: v_add_f32_e64 v9, s20, 1.06083; SI-NEXT: v_add_f32_e64 v11, s21, 1.06084; SI-NEXT: v_add_f32_e64 v13, s22, 1.06085; SI-NEXT: v_add_f32_e64 v15, s23, 1.06086; SI-NEXT: v_add_f32_e64 v17, s24, 1.06087; SI-NEXT: v_add_f32_e64 v19, s25, 1.06088; SI-NEXT: v_add_f32_e64 v21, s26, 1.06089; SI-NEXT: v_add_f32_e64 v23, s27, 1.06090; SI-NEXT: v_cvt_f32_f16_e32 v22, v236091; SI-NEXT: v_cvt_f32_f16_e32 v20, v216092; SI-NEXT: v_cvt_f32_f16_e32 v18, v196093; SI-NEXT: v_cvt_f32_f16_e32 v16, v176094; SI-NEXT: v_cvt_f32_f16_e32 v14, v156095; SI-NEXT: v_cvt_f32_f16_e32 v12, v136096; SI-NEXT: v_cvt_f32_f16_e32 v10, v116097; SI-NEXT: v_cvt_f32_f16_e32 v8, v96098; SI-NEXT: v_cvt_f32_f16_e32 v6, v76099; SI-NEXT: v_cvt_f32_f16_e32 v4, v56100; SI-NEXT: v_cvt_f32_f16_e32 v2, v36101; SI-NEXT: v_cvt_f32_f16_e32 v0, v16102; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v236103; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v216104; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v196105; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v176106; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v156107; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v136108; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v116109; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v96110; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v76111; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v56112; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v36113; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v16114; SI-NEXT: v_cvt_f32_f16_e32 v23, v236115; SI-NEXT: v_cvt_f32_f16_e32 v21, v216116; SI-NEXT: v_cvt_f32_f16_e32 v19, v196117; SI-NEXT: v_cvt_f32_f16_e32 v17, v176118; SI-NEXT: v_cvt_f32_f16_e32 v15, v156119; SI-NEXT: v_cvt_f32_f16_e32 v13, v136120; SI-NEXT: v_cvt_f32_f16_e32 v11, v116121; SI-NEXT: v_cvt_f32_f16_e32 v9, v96122; SI-NEXT: v_cvt_f32_f16_e32 v7, v76123; SI-NEXT: v_cvt_f32_f16_e32 v5, v56124; SI-NEXT: v_cvt_f32_f16_e32 v3, v36125; SI-NEXT: v_cvt_f32_f16_e32 v1, v16126; SI-NEXT: .LBB33_3: ; %end6127; SI-NEXT: s_setpc_b64 s[30:31]6128; SI-NEXT: .LBB33_4:6129; SI-NEXT: ; implicit-def: $vgpr06130; SI-NEXT: ; implicit-def: $vgpr16131; SI-NEXT: ; implicit-def: $vgpr26132; SI-NEXT: ; implicit-def: $vgpr36133; SI-NEXT: ; implicit-def: $vgpr46134; SI-NEXT: ; implicit-def: $vgpr56135; SI-NEXT: ; implicit-def: $vgpr66136; SI-NEXT: ; implicit-def: $vgpr76137; SI-NEXT: ; implicit-def: $vgpr86138; SI-NEXT: ; implicit-def: $vgpr96139; SI-NEXT: ; implicit-def: $vgpr106140; SI-NEXT: ; implicit-def: $vgpr116141; SI-NEXT: ; implicit-def: $vgpr126142; SI-NEXT: ; implicit-def: $vgpr136143; SI-NEXT: ; implicit-def: $vgpr146144; SI-NEXT: ; implicit-def: $vgpr156145; SI-NEXT: ; implicit-def: $vgpr166146; SI-NEXT: ; implicit-def: $vgpr176147; SI-NEXT: ; implicit-def: $vgpr186148; SI-NEXT: ; implicit-def: $vgpr196149; SI-NEXT: ; implicit-def: $vgpr206150; SI-NEXT: ; implicit-def: $vgpr216151; SI-NEXT: ; implicit-def: $vgpr226152; SI-NEXT: ; implicit-def: $vgpr236153; SI-NEXT: s_branch .LBB33_26154;6155; VI-LABEL: bitcast_v12f32_to_v24f16_scalar:6156; VI: ; %bb.0:6157; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6158; VI-NEXT: s_cmp_lg_u32 s28, 06159; VI-NEXT: s_cbranch_scc0 .LBB33_36160; VI-NEXT: ; %bb.1: ; %cmp.false6161; VI-NEXT: s_cbranch_execnz .LBB33_46162; VI-NEXT: .LBB33_2: ; %cmp.true6163; VI-NEXT: v_add_f32_e64 v11, s27, 1.06164; VI-NEXT: v_add_f32_e64 v10, s26, 1.06165; VI-NEXT: v_add_f32_e64 v9, s25, 1.06166; VI-NEXT: v_add_f32_e64 v8, s24, 1.06167; VI-NEXT: v_add_f32_e64 v7, s23, 1.06168; VI-NEXT: v_add_f32_e64 v6, s22, 1.06169; VI-NEXT: v_add_f32_e64 v5, s21, 1.06170; VI-NEXT: v_add_f32_e64 v4, s20, 1.06171; VI-NEXT: v_add_f32_e64 v3, s19, 1.06172; VI-NEXT: v_add_f32_e64 v2, s18, 1.06173; VI-NEXT: v_add_f32_e64 v1, s17, 1.06174; VI-NEXT: v_add_f32_e64 v0, s16, 1.06175; VI-NEXT: s_setpc_b64 s[30:31]6176; VI-NEXT: .LBB33_3:6177; VI-NEXT: s_branch .LBB33_26178; VI-NEXT: .LBB33_4:6179; VI-NEXT: v_mov_b32_e32 v0, s166180; VI-NEXT: v_mov_b32_e32 v1, s176181; VI-NEXT: v_mov_b32_e32 v2, s186182; VI-NEXT: v_mov_b32_e32 v3, s196183; VI-NEXT: v_mov_b32_e32 v4, s206184; VI-NEXT: v_mov_b32_e32 v5, s216185; VI-NEXT: v_mov_b32_e32 v6, s226186; VI-NEXT: v_mov_b32_e32 v7, s236187; VI-NEXT: v_mov_b32_e32 v8, s246188; VI-NEXT: v_mov_b32_e32 v9, s256189; VI-NEXT: v_mov_b32_e32 v10, s266190; VI-NEXT: v_mov_b32_e32 v11, s276191; VI-NEXT: v_mov_b32_e32 v12, s286192; VI-NEXT: v_mov_b32_e32 v13, s296193; VI-NEXT: v_mov_b32_e32 v14, s306194; VI-NEXT: v_mov_b32_e32 v15, s316195; VI-NEXT: s_setpc_b64 s[30:31]6196;6197; GFX9-LABEL: bitcast_v12f32_to_v24f16_scalar:6198; GFX9: ; %bb.0:6199; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6200; GFX9-NEXT: s_cmp_lg_u32 s28, 06201; GFX9-NEXT: s_cbranch_scc0 .LBB33_36202; GFX9-NEXT: ; %bb.1: ; %cmp.false6203; GFX9-NEXT: s_cbranch_execnz .LBB33_46204; GFX9-NEXT: .LBB33_2: ; %cmp.true6205; GFX9-NEXT: v_add_f32_e64 v11, s27, 1.06206; GFX9-NEXT: v_add_f32_e64 v10, s26, 1.06207; GFX9-NEXT: v_add_f32_e64 v9, s25, 1.06208; GFX9-NEXT: v_add_f32_e64 v8, s24, 1.06209; GFX9-NEXT: v_add_f32_e64 v7, s23, 1.06210; GFX9-NEXT: v_add_f32_e64 v6, s22, 1.06211; GFX9-NEXT: v_add_f32_e64 v5, s21, 1.06212; GFX9-NEXT: v_add_f32_e64 v4, s20, 1.06213; GFX9-NEXT: v_add_f32_e64 v3, s19, 1.06214; GFX9-NEXT: v_add_f32_e64 v2, s18, 1.06215; GFX9-NEXT: v_add_f32_e64 v1, s17, 1.06216; GFX9-NEXT: v_add_f32_e64 v0, s16, 1.06217; GFX9-NEXT: s_setpc_b64 s[30:31]6218; GFX9-NEXT: .LBB33_3:6219; GFX9-NEXT: s_branch .LBB33_26220; GFX9-NEXT: .LBB33_4:6221; GFX9-NEXT: v_mov_b32_e32 v0, s166222; GFX9-NEXT: v_mov_b32_e32 v1, s176223; GFX9-NEXT: v_mov_b32_e32 v2, s186224; GFX9-NEXT: v_mov_b32_e32 v3, s196225; GFX9-NEXT: v_mov_b32_e32 v4, s206226; GFX9-NEXT: v_mov_b32_e32 v5, s216227; GFX9-NEXT: v_mov_b32_e32 v6, s226228; GFX9-NEXT: v_mov_b32_e32 v7, s236229; GFX9-NEXT: v_mov_b32_e32 v8, s246230; GFX9-NEXT: v_mov_b32_e32 v9, s256231; GFX9-NEXT: v_mov_b32_e32 v10, s266232; GFX9-NEXT: v_mov_b32_e32 v11, s276233; GFX9-NEXT: v_mov_b32_e32 v12, s286234; GFX9-NEXT: v_mov_b32_e32 v13, s296235; GFX9-NEXT: v_mov_b32_e32 v14, s306236; GFX9-NEXT: v_mov_b32_e32 v15, s316237; GFX9-NEXT: s_setpc_b64 s[30:31]6238;6239; GFX11-LABEL: bitcast_v12f32_to_v24f16_scalar:6240; GFX11: ; %bb.0:6241; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6242; GFX11-NEXT: s_mov_b32 s15, s36243; GFX11-NEXT: s_mov_b32 s14, s26244; GFX11-NEXT: s_mov_b32 s13, s16245; GFX11-NEXT: s_mov_b32 s12, s06246; GFX11-NEXT: s_cmp_lg_u32 s24, 06247; GFX11-NEXT: s_mov_b32 s0, 06248; GFX11-NEXT: s_cbranch_scc0 .LBB33_36249; GFX11-NEXT: ; %bb.1: ; %Flow6250; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s06251; GFX11-NEXT: s_cbranch_vccnz .LBB33_46252; GFX11-NEXT: .LBB33_2: ; %cmp.true6253; GFX11-NEXT: v_add_f32_e64 v11, s23, 1.06254; GFX11-NEXT: v_add_f32_e64 v10, s22, 1.06255; GFX11-NEXT: v_add_f32_e64 v9, s21, 1.06256; GFX11-NEXT: v_add_f32_e64 v8, s20, 1.06257; GFX11-NEXT: v_add_f32_e64 v7, s19, 1.06258; GFX11-NEXT: v_add_f32_e64 v6, s18, 1.06259; GFX11-NEXT: v_add_f32_e64 v5, s17, 1.06260; GFX11-NEXT: v_add_f32_e64 v4, s16, 1.06261; GFX11-NEXT: v_add_f32_e64 v3, s15, 1.06262; GFX11-NEXT: v_add_f32_e64 v2, s14, 1.06263; GFX11-NEXT: v_add_f32_e64 v1, s13, 1.06264; GFX11-NEXT: v_add_f32_e64 v0, s12, 1.06265; GFX11-NEXT: s_setpc_b64 s[30:31]6266; GFX11-NEXT: .LBB33_3:6267; GFX11-NEXT: s_branch .LBB33_26268; GFX11-NEXT: .LBB33_4:6269; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s136270; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s156271; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s176272; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s196273; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s216274; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s236275; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s256276; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s276277; GFX11-NEXT: s_setpc_b64 s[30:31]6278 %cmp = icmp eq i32 %b, 06279 br i1 %cmp, label %cmp.true, label %cmp.false6280 6281cmp.true:6282 %a1 = fadd <12 x float> %a, splat (float 1.000000e+00)6283 %a2 = bitcast <12 x float> %a1 to <24 x half>6284 br label %end6285 6286cmp.false:6287 %a3 = bitcast <12 x float> %a to <24 x half>6288 br label %end6289 6290end:6291 %phi = phi <24 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]6292 ret <24 x half> %phi6293}6294 6295define <12 x float> @bitcast_v24f16_to_v12f32(<24 x half> %a, i32 %b) {6296; SI-LABEL: bitcast_v24f16_to_v12f32:6297; SI: ; %bb.0:6298; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6299; SI-NEXT: v_cvt_f16_f32_e32 v50, v16300; SI-NEXT: v_cvt_f16_f32_e32 v49, v06301; SI-NEXT: v_cvt_f16_f32_e32 v48, v36302; SI-NEXT: v_cvt_f16_f32_e32 v39, v26303; SI-NEXT: v_cvt_f16_f32_e32 v38, v56304; SI-NEXT: v_cvt_f16_f32_e32 v37, v46305; SI-NEXT: v_cvt_f16_f32_e32 v36, v76306; SI-NEXT: v_cvt_f16_f32_e32 v35, v66307; SI-NEXT: v_cvt_f16_f32_e32 v34, v96308; SI-NEXT: v_cvt_f16_f32_e32 v33, v86309; SI-NEXT: v_cvt_f16_f32_e32 v32, v116310; SI-NEXT: v_cvt_f16_f32_e32 v31, v106311; SI-NEXT: v_cvt_f16_f32_e32 v30, v136312; SI-NEXT: v_cvt_f16_f32_e32 v29, v126313; SI-NEXT: v_cvt_f16_f32_e32 v28, v156314; SI-NEXT: v_cvt_f16_f32_e32 v27, v146315; SI-NEXT: v_cvt_f16_f32_e32 v26, v176316; SI-NEXT: v_cvt_f16_f32_e32 v25, v166317; SI-NEXT: v_cvt_f16_f32_e32 v17, v196318; SI-NEXT: v_cvt_f16_f32_e32 v16, v186319; SI-NEXT: v_cvt_f16_f32_e32 v15, v216320; SI-NEXT: v_cvt_f16_f32_e32 v14, v206321; SI-NEXT: v_cvt_f16_f32_e32 v13, v236322; SI-NEXT: v_cvt_f16_f32_e32 v12, v226323; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v246324; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr116325; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc6326; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6327; SI-NEXT: s_cbranch_execnz .LBB34_36328; SI-NEXT: ; %bb.1: ; %Flow6329; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6330; SI-NEXT: s_cbranch_execnz .LBB34_46331; SI-NEXT: .LBB34_2: ; %end6332; SI-NEXT: s_or_b64 exec, exec, s[4:5]6333; SI-NEXT: s_setpc_b64 s[30:31]6334; SI-NEXT: .LBB34_3: ; %cmp.false6335; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v506336; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v486337; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v386338; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v366339; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v346340; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v326341; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v306342; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v286343; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v266344; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v176345; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v156346; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v136347; SI-NEXT: v_or_b32_e32 v0, v49, v06348; SI-NEXT: v_or_b32_e32 v1, v39, v16349; SI-NEXT: v_or_b32_e32 v2, v37, v26350; SI-NEXT: v_or_b32_e32 v3, v35, v36351; SI-NEXT: v_or_b32_e32 v4, v33, v46352; SI-NEXT: v_or_b32_e32 v5, v31, v56353; SI-NEXT: v_or_b32_e32 v6, v29, v66354; SI-NEXT: v_or_b32_e32 v7, v27, v76355; SI-NEXT: v_or_b32_e32 v8, v25, v86356; SI-NEXT: v_or_b32_e32 v9, v16, v96357; SI-NEXT: v_or_b32_e32 v10, v14, v106358; SI-NEXT: v_or_b32_e32 v11, v12, v116359; SI-NEXT: ; implicit-def: $vgpr506360; SI-NEXT: ; implicit-def: $vgpr496361; SI-NEXT: ; implicit-def: $vgpr486362; SI-NEXT: ; implicit-def: $vgpr396363; SI-NEXT: ; implicit-def: $vgpr386364; SI-NEXT: ; implicit-def: $vgpr376365; SI-NEXT: ; implicit-def: $vgpr366366; SI-NEXT: ; implicit-def: $vgpr356367; SI-NEXT: ; implicit-def: $vgpr346368; SI-NEXT: ; implicit-def: $vgpr336369; SI-NEXT: ; implicit-def: $vgpr326370; SI-NEXT: ; implicit-def: $vgpr316371; SI-NEXT: ; implicit-def: $vgpr306372; SI-NEXT: ; implicit-def: $vgpr296373; SI-NEXT: ; implicit-def: $vgpr286374; SI-NEXT: ; implicit-def: $vgpr276375; SI-NEXT: ; implicit-def: $vgpr266376; SI-NEXT: ; implicit-def: $vgpr256377; SI-NEXT: ; implicit-def: $vgpr176378; SI-NEXT: ; implicit-def: $vgpr166379; SI-NEXT: ; implicit-def: $vgpr156380; SI-NEXT: ; implicit-def: $vgpr146381; SI-NEXT: ; implicit-def: $vgpr136382; SI-NEXT: ; implicit-def: $vgpr126383; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6384; SI-NEXT: s_cbranch_execz .LBB34_26385; SI-NEXT: .LBB34_4: ; %cmp.true6386; SI-NEXT: v_cvt_f32_f16_e32 v0, v506387; SI-NEXT: v_cvt_f32_f16_e32 v2, v486388; SI-NEXT: v_cvt_f32_f16_e32 v1, v496389; SI-NEXT: v_cvt_f32_f16_e32 v3, v396390; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v06391; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v26392; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v16393; SI-NEXT: v_cvt_f16_f32_e32 v0, v06394; SI-NEXT: v_cvt_f16_f32_e32 v2, v26395; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v36396; SI-NEXT: v_cvt_f16_f32_e32 v1, v16397; SI-NEXT: v_cvt_f16_f32_e32 v3, v36398; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v06399; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v26400; SI-NEXT: v_or_b32_e32 v0, v1, v06401; SI-NEXT: v_or_b32_e32 v1, v3, v26402; SI-NEXT: v_cvt_f32_f16_e32 v2, v386403; SI-NEXT: v_cvt_f32_f16_e32 v3, v376404; SI-NEXT: v_cvt_f32_f16_e32 v4, v366405; SI-NEXT: v_cvt_f32_f16_e32 v5, v356406; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v26407; SI-NEXT: v_cvt_f16_f32_e32 v2, v26408; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v36409; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v46410; SI-NEXT: v_cvt_f16_f32_e32 v3, v36411; SI-NEXT: v_cvt_f16_f32_e32 v4, v46412; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v56413; SI-NEXT: v_cvt_f16_f32_e32 v5, v56414; SI-NEXT: v_cvt_f32_f16_e32 v6, v346415; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v26416; SI-NEXT: v_or_b32_e32 v2, v3, v26417; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v46418; SI-NEXT: v_or_b32_e32 v3, v5, v36419; SI-NEXT: v_cvt_f32_f16_e32 v4, v336420; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v66421; SI-NEXT: v_cvt_f32_f16_e32 v6, v326422; SI-NEXT: v_cvt_f16_f32_e32 v5, v56423; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v46424; SI-NEXT: v_cvt_f16_f32_e32 v4, v46425; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v66426; SI-NEXT: v_cvt_f16_f32_e32 v6, v66427; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v56428; SI-NEXT: v_cvt_f32_f16_e32 v7, v316429; SI-NEXT: v_or_b32_e32 v4, v4, v56430; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v66431; SI-NEXT: v_cvt_f32_f16_e32 v6, v306432; SI-NEXT: v_cvt_f32_f16_e32 v8, v296433; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v76434; SI-NEXT: v_cvt_f16_f32_e32 v7, v76435; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v66436; SI-NEXT: v_cvt_f16_f32_e32 v6, v66437; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v86438; SI-NEXT: v_cvt_f16_f32_e32 v8, v86439; SI-NEXT: v_or_b32_e32 v5, v7, v56440; SI-NEXT: v_cvt_f32_f16_e32 v7, v286441; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v66442; SI-NEXT: v_or_b32_e32 v6, v8, v66443; SI-NEXT: v_cvt_f32_f16_e32 v8, v276444; SI-NEXT: v_cvt_f32_f16_e32 v9, v266445; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v76446; SI-NEXT: v_cvt_f16_f32_e32 v7, v76447; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v86448; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v96449; SI-NEXT: v_cvt_f16_f32_e32 v8, v86450; SI-NEXT: v_cvt_f16_f32_e32 v9, v96451; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v76452; SI-NEXT: v_cvt_f32_f16_e32 v10, v256453; SI-NEXT: v_or_b32_e32 v7, v8, v76454; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v96455; SI-NEXT: v_cvt_f32_f16_e32 v9, v176456; SI-NEXT: v_cvt_f32_f16_e32 v11, v166457; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v106458; SI-NEXT: v_cvt_f16_f32_e32 v10, v106459; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v96460; SI-NEXT: v_cvt_f16_f32_e32 v9, v96461; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v116462; SI-NEXT: v_cvt_f16_f32_e32 v11, v116463; SI-NEXT: v_or_b32_e32 v8, v10, v86464; SI-NEXT: v_cvt_f32_f16_e32 v10, v156465; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v96466; SI-NEXT: v_or_b32_e32 v9, v11, v96467; SI-NEXT: v_cvt_f32_f16_e32 v11, v146468; SI-NEXT: v_cvt_f32_f16_e32 v13, v136469; SI-NEXT: v_cvt_f32_f16_e32 v12, v126470; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v106471; SI-NEXT: v_cvt_f16_f32_e32 v10, v106472; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v116473; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v136474; SI-NEXT: v_cvt_f16_f32_e32 v11, v116475; SI-NEXT: v_cvt_f16_f32_e32 v13, v136476; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v126477; SI-NEXT: v_cvt_f16_f32_e32 v12, v126478; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v106479; SI-NEXT: v_or_b32_e32 v10, v11, v106480; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v136481; SI-NEXT: v_or_b32_e32 v11, v12, v116482; SI-NEXT: s_or_b64 exec, exec, s[4:5]6483; SI-NEXT: s_setpc_b64 s[30:31]6484;6485; VI-LABEL: bitcast_v24f16_to_v12f32:6486; VI: ; %bb.0:6487; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6488; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v126489; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc6490; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6491; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6492; VI-NEXT: s_cbranch_execz .LBB34_26493; VI-NEXT: ; %bb.1: ; %cmp.true6494; VI-NEXT: v_mov_b32_e32 v12, 0x2006495; VI-NEXT: v_add_f16_sdwa v13, v11, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6496; VI-NEXT: v_add_f16_e32 v11, 0x200, v116497; VI-NEXT: v_or_b32_e32 v11, v11, v136498; VI-NEXT: v_add_f16_sdwa v13, v10, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6499; VI-NEXT: v_add_f16_e32 v10, 0x200, v106500; VI-NEXT: v_or_b32_e32 v10, v10, v136501; VI-NEXT: v_add_f16_sdwa v13, v9, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6502; VI-NEXT: v_add_f16_e32 v9, 0x200, v96503; VI-NEXT: v_or_b32_e32 v9, v9, v136504; VI-NEXT: v_add_f16_sdwa v13, v8, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6505; VI-NEXT: v_add_f16_e32 v8, 0x200, v86506; VI-NEXT: v_or_b32_e32 v8, v8, v136507; VI-NEXT: v_add_f16_sdwa v13, v7, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6508; VI-NEXT: v_add_f16_e32 v7, 0x200, v76509; VI-NEXT: v_or_b32_e32 v7, v7, v136510; VI-NEXT: v_add_f16_sdwa v13, v6, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6511; VI-NEXT: v_add_f16_e32 v6, 0x200, v66512; VI-NEXT: v_or_b32_e32 v6, v6, v136513; VI-NEXT: v_add_f16_sdwa v13, v5, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6514; VI-NEXT: v_add_f16_e32 v5, 0x200, v56515; VI-NEXT: v_or_b32_e32 v5, v5, v136516; VI-NEXT: v_add_f16_sdwa v13, v4, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6517; VI-NEXT: v_add_f16_e32 v4, 0x200, v46518; VI-NEXT: v_or_b32_e32 v4, v4, v136519; VI-NEXT: v_add_f16_sdwa v13, v3, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6520; VI-NEXT: v_add_f16_e32 v3, 0x200, v36521; VI-NEXT: v_or_b32_e32 v3, v3, v136522; VI-NEXT: v_add_f16_sdwa v13, v2, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6523; VI-NEXT: v_add_f16_e32 v2, 0x200, v26524; VI-NEXT: v_or_b32_e32 v2, v2, v136525; VI-NEXT: v_add_f16_sdwa v13, v1, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6526; VI-NEXT: v_add_f16_e32 v1, 0x200, v16527; VI-NEXT: v_add_f16_sdwa v12, v0, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6528; VI-NEXT: v_add_f16_e32 v0, 0x200, v06529; VI-NEXT: v_or_b32_e32 v1, v1, v136530; VI-NEXT: v_or_b32_e32 v0, v0, v126531; VI-NEXT: .LBB34_2: ; %end6532; VI-NEXT: s_or_b64 exec, exec, s[4:5]6533; VI-NEXT: s_setpc_b64 s[30:31]6534;6535; GFX9-LABEL: bitcast_v24f16_to_v12f32:6536; GFX9: ; %bb.0:6537; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6538; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v126539; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc6540; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6541; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6542; GFX9-NEXT: s_cbranch_execz .LBB34_26543; GFX9-NEXT: ; %bb.1: ; %cmp.true6544; GFX9-NEXT: s_movk_i32 s6, 0x2006545; GFX9-NEXT: v_pk_add_f16 v11, v11, s6 op_sel_hi:[1,0]6546; GFX9-NEXT: v_pk_add_f16 v10, v10, s6 op_sel_hi:[1,0]6547; GFX9-NEXT: v_pk_add_f16 v9, v9, s6 op_sel_hi:[1,0]6548; GFX9-NEXT: v_pk_add_f16 v8, v8, s6 op_sel_hi:[1,0]6549; GFX9-NEXT: v_pk_add_f16 v7, v7, s6 op_sel_hi:[1,0]6550; GFX9-NEXT: v_pk_add_f16 v6, v6, s6 op_sel_hi:[1,0]6551; GFX9-NEXT: v_pk_add_f16 v5, v5, s6 op_sel_hi:[1,0]6552; GFX9-NEXT: v_pk_add_f16 v4, v4, s6 op_sel_hi:[1,0]6553; GFX9-NEXT: v_pk_add_f16 v3, v3, s6 op_sel_hi:[1,0]6554; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0]6555; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0]6556; GFX9-NEXT: v_pk_add_f16 v0, v0, s6 op_sel_hi:[1,0]6557; GFX9-NEXT: .LBB34_2: ; %end6558; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]6559; GFX9-NEXT: s_setpc_b64 s[30:31]6560;6561; GFX11-LABEL: bitcast_v24f16_to_v12f32:6562; GFX11: ; %bb.0:6563; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6564; GFX11-NEXT: s_mov_b32 s0, exec_lo6565; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v126566; GFX11-NEXT: s_xor_b32 s0, exec_lo, s06567; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)6568; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s06569; GFX11-NEXT: s_cbranch_execz .LBB34_26570; GFX11-NEXT: ; %bb.1: ; %cmp.true6571; GFX11-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]6572; GFX11-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]6573; GFX11-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]6574; GFX11-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]6575; GFX11-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]6576; GFX11-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]6577; GFX11-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]6578; GFX11-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]6579; GFX11-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]6580; GFX11-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]6581; GFX11-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]6582; GFX11-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]6583; GFX11-NEXT: .LBB34_2: ; %end6584; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s06585; GFX11-NEXT: s_setpc_b64 s[30:31]6586 %cmp = icmp eq i32 %b, 06587 br i1 %cmp, label %cmp.true, label %cmp.false6588 6589cmp.true:6590 %a1 = fadd <24 x half> %a, splat (half 0xH0200)6591 %a2 = bitcast <24 x half> %a1 to <12 x float>6592 br label %end6593 6594cmp.false:6595 %a3 = bitcast <24 x half> %a to <12 x float>6596 br label %end6597 6598end:6599 %phi = phi <12 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]6600 ret <12 x float> %phi6601}6602 6603define inreg <12 x float> @bitcast_v24f16_to_v12f32_scalar(<24 x half> inreg %a, i32 inreg %b) {6604; SI-LABEL: bitcast_v24f16_to_v12f32_scalar:6605; SI: ; %bb.0:6606; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6607; SI-NEXT: v_cvt_f16_f32_e32 v35, s176608; SI-NEXT: v_cvt_f16_f32_e32 v34, s166609; SI-NEXT: v_cvt_f16_f32_e32 v33, s196610; SI-NEXT: v_cvt_f16_f32_e32 v32, s186611; SI-NEXT: v_cvt_f16_f32_e32 v31, s216612; SI-NEXT: v_cvt_f16_f32_e32 v30, s206613; SI-NEXT: v_cvt_f16_f32_e32 v29, s236614; SI-NEXT: v_cvt_f16_f32_e32 v28, s226615; SI-NEXT: v_cvt_f16_f32_e32 v26, s256616; SI-NEXT: v_cvt_f16_f32_e32 v24, s246617; SI-NEXT: v_cvt_f16_f32_e32 v21, v16618; SI-NEXT: v_cvt_f16_f32_e32 v20, v06619; SI-NEXT: v_cvt_f16_f32_e32 v19, v36620; SI-NEXT: v_cvt_f16_f32_e32 v18, v26621; SI-NEXT: v_cvt_f16_f32_e32 v17, v56622; SI-NEXT: v_cvt_f16_f32_e32 v16, v46623; SI-NEXT: v_cvt_f16_f32_e32 v15, v76624; SI-NEXT: v_cvt_f16_f32_e32 v14, v66625; SI-NEXT: v_cvt_f16_f32_e32 v13, v96626; SI-NEXT: v_cvt_f16_f32_e32 v12, v86627; SI-NEXT: v_cvt_f16_f32_e32 v27, s276628; SI-NEXT: v_cvt_f16_f32_e32 v25, s266629; SI-NEXT: v_cvt_f16_f32_e32 v23, s296630; SI-NEXT: v_cvt_f16_f32_e32 v22, s286631; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v106632; SI-NEXT: s_and_b64 s[4:5], vcc, exec6633; SI-NEXT: s_cbranch_scc0 .LBB35_46634; SI-NEXT: ; %bb.1: ; %cmp.false6635; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v356636; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v336637; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v316638; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v296639; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v266640; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v276641; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v236642; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v216643; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v196644; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v176645; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v156646; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v136647; SI-NEXT: v_or_b32_e32 v0, v34, v06648; SI-NEXT: v_or_b32_e32 v1, v32, v16649; SI-NEXT: v_or_b32_e32 v2, v30, v26650; SI-NEXT: v_or_b32_e32 v3, v28, v36651; SI-NEXT: v_or_b32_e32 v4, v24, v46652; SI-NEXT: v_or_b32_e32 v5, v25, v56653; SI-NEXT: v_or_b32_e32 v6, v22, v66654; SI-NEXT: v_or_b32_e32 v7, v20, v76655; SI-NEXT: v_or_b32_e32 v8, v18, v86656; SI-NEXT: v_or_b32_e32 v9, v16, v96657; SI-NEXT: v_or_b32_e32 v10, v14, v106658; SI-NEXT: v_or_b32_e32 v11, v12, v116659; SI-NEXT: s_cbranch_execnz .LBB35_36660; SI-NEXT: .LBB35_2: ; %cmp.true6661; SI-NEXT: v_cvt_f32_f16_e32 v0, v356662; SI-NEXT: v_cvt_f32_f16_e32 v1, v346663; SI-NEXT: v_cvt_f32_f16_e32 v2, v336664; SI-NEXT: v_cvt_f32_f16_e32 v3, v326665; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v06666; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v16667; SI-NEXT: v_cvt_f16_f32_e32 v0, v06668; SI-NEXT: v_cvt_f16_f32_e32 v1, v16669; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v26670; SI-NEXT: v_cvt_f16_f32_e32 v2, v26671; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v06672; SI-NEXT: v_or_b32_e32 v0, v1, v06673; SI-NEXT: v_cvt_f32_f16_e32 v1, v316674; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v36675; SI-NEXT: v_cvt_f16_f32_e32 v3, v36676; SI-NEXT: v_cvt_f32_f16_e32 v5, v286677; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v16678; SI-NEXT: v_cvt_f16_f32_e32 v4, v16679; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v26680; SI-NEXT: v_cvt_f32_f16_e32 v2, v306681; SI-NEXT: v_or_b32_e32 v1, v3, v16682; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v46683; SI-NEXT: v_cvt_f32_f16_e32 v4, v296684; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v26685; SI-NEXT: v_cvt_f16_f32_e32 v2, v26686; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v56687; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v46688; SI-NEXT: v_cvt_f16_f32_e32 v4, v46689; SI-NEXT: v_cvt_f16_f32_e32 v5, v56690; SI-NEXT: v_cvt_f32_f16_e32 v6, v266691; SI-NEXT: v_or_b32_e32 v2, v2, v36692; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v46693; SI-NEXT: v_or_b32_e32 v3, v5, v36694; SI-NEXT: v_cvt_f32_f16_e32 v4, v246695; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v66696; SI-NEXT: v_cvt_f32_f16_e32 v6, v276697; SI-NEXT: v_cvt_f16_f32_e32 v5, v56698; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v46699; SI-NEXT: v_cvt_f16_f32_e32 v4, v46700; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v66701; SI-NEXT: v_cvt_f16_f32_e32 v6, v66702; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v56703; SI-NEXT: v_cvt_f32_f16_e32 v7, v256704; SI-NEXT: v_or_b32_e32 v4, v4, v56705; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v66706; SI-NEXT: v_cvt_f32_f16_e32 v6, v236707; SI-NEXT: v_cvt_f32_f16_e32 v8, v226708; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v76709; SI-NEXT: v_cvt_f16_f32_e32 v7, v76710; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v66711; SI-NEXT: v_cvt_f16_f32_e32 v6, v66712; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v86713; SI-NEXT: v_cvt_f16_f32_e32 v8, v86714; SI-NEXT: v_or_b32_e32 v5, v7, v56715; SI-NEXT: v_cvt_f32_f16_e32 v7, v216716; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v66717; SI-NEXT: v_or_b32_e32 v6, v8, v66718; SI-NEXT: v_cvt_f32_f16_e32 v8, v206719; SI-NEXT: v_cvt_f32_f16_e32 v9, v196720; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v76721; SI-NEXT: v_cvt_f16_f32_e32 v7, v76722; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v86723; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v96724; SI-NEXT: v_cvt_f16_f32_e32 v8, v86725; SI-NEXT: v_cvt_f16_f32_e32 v9, v96726; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v76727; SI-NEXT: v_cvt_f32_f16_e32 v10, v186728; SI-NEXT: v_or_b32_e32 v7, v8, v76729; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v96730; SI-NEXT: v_cvt_f32_f16_e32 v9, v176731; SI-NEXT: v_cvt_f32_f16_e32 v11, v166732; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v106733; SI-NEXT: v_cvt_f16_f32_e32 v10, v106734; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v96735; SI-NEXT: v_cvt_f16_f32_e32 v9, v96736; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v116737; SI-NEXT: v_cvt_f16_f32_e32 v11, v116738; SI-NEXT: v_or_b32_e32 v8, v10, v86739; SI-NEXT: v_cvt_f32_f16_e32 v10, v156740; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v96741; SI-NEXT: v_or_b32_e32 v9, v11, v96742; SI-NEXT: v_cvt_f32_f16_e32 v11, v146743; SI-NEXT: v_cvt_f32_f16_e32 v13, v136744; SI-NEXT: v_cvt_f32_f16_e32 v12, v126745; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v106746; SI-NEXT: v_cvt_f16_f32_e32 v10, v106747; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v116748; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v136749; SI-NEXT: v_cvt_f16_f32_e32 v11, v116750; SI-NEXT: v_cvt_f16_f32_e32 v13, v136751; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v126752; SI-NEXT: v_cvt_f16_f32_e32 v12, v126753; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v106754; SI-NEXT: v_or_b32_e32 v10, v11, v106755; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v136756; SI-NEXT: v_or_b32_e32 v11, v12, v116757; SI-NEXT: .LBB35_3: ; %end6758; SI-NEXT: s_setpc_b64 s[30:31]6759; SI-NEXT: .LBB35_4:6760; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr116761; SI-NEXT: s_branch .LBB35_26762;6763; VI-LABEL: bitcast_v24f16_to_v12f32_scalar:6764; VI: ; %bb.0:6765; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6766; VI-NEXT: s_cmp_lg_u32 s28, 06767; VI-NEXT: s_cbranch_scc0 .LBB35_36768; VI-NEXT: ; %bb.1: ; %cmp.false6769; VI-NEXT: s_cbranch_execnz .LBB35_46770; VI-NEXT: .LBB35_2: ; %cmp.true6771; VI-NEXT: s_lshr_b32 s4, s27, 166772; VI-NEXT: v_mov_b32_e32 v0, 0x2006773; VI-NEXT: v_mov_b32_e32 v1, s46774; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6775; VI-NEXT: v_add_f16_e32 v2, s27, v06776; VI-NEXT: s_lshr_b32 s4, s26, 166777; VI-NEXT: v_or_b32_e32 v11, v2, v16778; VI-NEXT: v_mov_b32_e32 v1, s46779; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6780; VI-NEXT: v_add_f16_e32 v2, s26, v06781; VI-NEXT: s_lshr_b32 s4, s25, 166782; VI-NEXT: v_or_b32_e32 v10, v2, v16783; VI-NEXT: v_mov_b32_e32 v1, s46784; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6785; VI-NEXT: v_add_f16_e32 v2, s25, v06786; VI-NEXT: s_lshr_b32 s4, s24, 166787; VI-NEXT: v_or_b32_e32 v9, v2, v16788; VI-NEXT: v_mov_b32_e32 v1, s46789; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6790; VI-NEXT: v_add_f16_e32 v2, s24, v06791; VI-NEXT: s_lshr_b32 s4, s23, 166792; VI-NEXT: v_or_b32_e32 v8, v2, v16793; VI-NEXT: v_mov_b32_e32 v1, s46794; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6795; VI-NEXT: v_add_f16_e32 v2, s23, v06796; VI-NEXT: s_lshr_b32 s4, s22, 166797; VI-NEXT: v_or_b32_e32 v7, v2, v16798; VI-NEXT: v_mov_b32_e32 v1, s46799; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6800; VI-NEXT: v_add_f16_e32 v2, s22, v06801; VI-NEXT: s_lshr_b32 s4, s21, 166802; VI-NEXT: v_or_b32_e32 v6, v2, v16803; VI-NEXT: v_mov_b32_e32 v1, s46804; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6805; VI-NEXT: v_add_f16_e32 v2, s21, v06806; VI-NEXT: s_lshr_b32 s4, s20, 166807; VI-NEXT: v_or_b32_e32 v5, v2, v16808; VI-NEXT: v_mov_b32_e32 v1, s46809; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6810; VI-NEXT: v_add_f16_e32 v2, s20, v06811; VI-NEXT: s_lshr_b32 s4, s19, 166812; VI-NEXT: v_or_b32_e32 v4, v2, v16813; VI-NEXT: v_mov_b32_e32 v1, s46814; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6815; VI-NEXT: v_add_f16_e32 v2, s19, v06816; VI-NEXT: s_lshr_b32 s4, s18, 166817; VI-NEXT: v_or_b32_e32 v3, v2, v16818; VI-NEXT: v_mov_b32_e32 v1, s46819; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6820; VI-NEXT: v_add_f16_e32 v2, s18, v06821; VI-NEXT: s_lshr_b32 s4, s17, 166822; VI-NEXT: v_or_b32_e32 v2, v2, v16823; VI-NEXT: v_mov_b32_e32 v1, s46824; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6825; VI-NEXT: v_add_f16_e32 v12, s17, v06826; VI-NEXT: s_lshr_b32 s4, s16, 166827; VI-NEXT: v_or_b32_e32 v1, v12, v16828; VI-NEXT: v_mov_b32_e32 v12, s46829; VI-NEXT: v_add_f16_sdwa v12, v12, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6830; VI-NEXT: v_add_f16_e32 v0, s16, v06831; VI-NEXT: v_or_b32_e32 v0, v0, v126832; VI-NEXT: s_setpc_b64 s[30:31]6833; VI-NEXT: .LBB35_3:6834; VI-NEXT: s_branch .LBB35_26835; VI-NEXT: .LBB35_4:6836; VI-NEXT: v_mov_b32_e32 v0, s166837; VI-NEXT: v_mov_b32_e32 v1, s176838; VI-NEXT: v_mov_b32_e32 v2, s186839; VI-NEXT: v_mov_b32_e32 v3, s196840; VI-NEXT: v_mov_b32_e32 v4, s206841; VI-NEXT: v_mov_b32_e32 v5, s216842; VI-NEXT: v_mov_b32_e32 v6, s226843; VI-NEXT: v_mov_b32_e32 v7, s236844; VI-NEXT: v_mov_b32_e32 v8, s246845; VI-NEXT: v_mov_b32_e32 v9, s256846; VI-NEXT: v_mov_b32_e32 v10, s266847; VI-NEXT: v_mov_b32_e32 v11, s276848; VI-NEXT: s_setpc_b64 s[30:31]6849;6850; GFX9-LABEL: bitcast_v24f16_to_v12f32_scalar:6851; GFX9: ; %bb.0:6852; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6853; GFX9-NEXT: s_cmp_lg_u32 s28, 06854; GFX9-NEXT: s_cbranch_scc0 .LBB35_36855; GFX9-NEXT: ; %bb.1: ; %cmp.false6856; GFX9-NEXT: s_cbranch_execnz .LBB35_46857; GFX9-NEXT: .LBB35_2: ; %cmp.true6858; GFX9-NEXT: v_mov_b32_e32 v0, 0x2006859; GFX9-NEXT: v_pk_add_f16 v11, s27, v0 op_sel_hi:[1,0]6860; GFX9-NEXT: v_pk_add_f16 v10, s26, v0 op_sel_hi:[1,0]6861; GFX9-NEXT: v_pk_add_f16 v9, s25, v0 op_sel_hi:[1,0]6862; GFX9-NEXT: v_pk_add_f16 v8, s24, v0 op_sel_hi:[1,0]6863; GFX9-NEXT: v_pk_add_f16 v7, s23, v0 op_sel_hi:[1,0]6864; GFX9-NEXT: v_pk_add_f16 v6, s22, v0 op_sel_hi:[1,0]6865; GFX9-NEXT: v_pk_add_f16 v5, s21, v0 op_sel_hi:[1,0]6866; GFX9-NEXT: v_pk_add_f16 v4, s20, v0 op_sel_hi:[1,0]6867; GFX9-NEXT: v_pk_add_f16 v3, s19, v0 op_sel_hi:[1,0]6868; GFX9-NEXT: v_pk_add_f16 v2, s18, v0 op_sel_hi:[1,0]6869; GFX9-NEXT: v_pk_add_f16 v1, s17, v0 op_sel_hi:[1,0]6870; GFX9-NEXT: v_pk_add_f16 v0, s16, v0 op_sel_hi:[1,0]6871; GFX9-NEXT: s_setpc_b64 s[30:31]6872; GFX9-NEXT: .LBB35_3:6873; GFX9-NEXT: s_branch .LBB35_26874; GFX9-NEXT: .LBB35_4:6875; GFX9-NEXT: v_mov_b32_e32 v0, s166876; GFX9-NEXT: v_mov_b32_e32 v1, s176877; GFX9-NEXT: v_mov_b32_e32 v2, s186878; GFX9-NEXT: v_mov_b32_e32 v3, s196879; GFX9-NEXT: v_mov_b32_e32 v4, s206880; GFX9-NEXT: v_mov_b32_e32 v5, s216881; GFX9-NEXT: v_mov_b32_e32 v6, s226882; GFX9-NEXT: v_mov_b32_e32 v7, s236883; GFX9-NEXT: v_mov_b32_e32 v8, s246884; GFX9-NEXT: v_mov_b32_e32 v9, s256885; GFX9-NEXT: v_mov_b32_e32 v10, s266886; GFX9-NEXT: v_mov_b32_e32 v11, s276887; GFX9-NEXT: s_setpc_b64 s[30:31]6888;6889; GFX11-LABEL: bitcast_v24f16_to_v12f32_scalar:6890; GFX11: ; %bb.0:6891; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6892; GFX11-NEXT: s_mov_b32 s15, s36893; GFX11-NEXT: s_mov_b32 s14, s26894; GFX11-NEXT: s_mov_b32 s13, s16895; GFX11-NEXT: s_mov_b32 s12, s06896; GFX11-NEXT: s_cmp_lg_u32 s24, 06897; GFX11-NEXT: s_mov_b32 s0, 06898; GFX11-NEXT: s_cbranch_scc0 .LBB35_36899; GFX11-NEXT: ; %bb.1: ; %Flow6900; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s06901; GFX11-NEXT: s_cbranch_vccnz .LBB35_46902; GFX11-NEXT: .LBB35_2: ; %cmp.true6903; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s23 op_sel_hi:[0,1]6904; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s22 op_sel_hi:[0,1]6905; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s21 op_sel_hi:[0,1]6906; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s20 op_sel_hi:[0,1]6907; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s19 op_sel_hi:[0,1]6908; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s18 op_sel_hi:[0,1]6909; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s17 op_sel_hi:[0,1]6910; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s16 op_sel_hi:[0,1]6911; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s15 op_sel_hi:[0,1]6912; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s14 op_sel_hi:[0,1]6913; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s13 op_sel_hi:[0,1]6914; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s12 op_sel_hi:[0,1]6915; GFX11-NEXT: s_setpc_b64 s[30:31]6916; GFX11-NEXT: .LBB35_3:6917; GFX11-NEXT: s_branch .LBB35_26918; GFX11-NEXT: .LBB35_4:6919; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s136920; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s156921; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s176922; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s196923; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s216924; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s236925; GFX11-NEXT: s_setpc_b64 s[30:31]6926 %cmp = icmp eq i32 %b, 06927 br i1 %cmp, label %cmp.true, label %cmp.false6928 6929cmp.true:6930 %a1 = fadd <24 x half> %a, splat (half 0xH0200)6931 %a2 = bitcast <24 x half> %a1 to <12 x float>6932 br label %end6933 6934cmp.false:6935 %a3 = bitcast <24 x half> %a to <12 x float>6936 br label %end6937 6938end:6939 %phi = phi <12 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]6940 ret <12 x float> %phi6941}6942 6943define <6 x i64> @bitcast_v6f64_to_v6i64(<6 x double> %a, i32 %b) {6944; SI-LABEL: bitcast_v6f64_to_v6i64:6945; SI: ; %bb.0:6946; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6947; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v126948; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc6949; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6950; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6951; SI-NEXT: s_cbranch_execz .LBB36_26952; SI-NEXT: ; %bb.1: ; %cmp.true6953; SI-NEXT: v_add_f64 v[0:1], v[0:1], 1.06954; SI-NEXT: v_add_f64 v[2:3], v[2:3], 1.06955; SI-NEXT: v_add_f64 v[4:5], v[4:5], 1.06956; SI-NEXT: v_add_f64 v[6:7], v[6:7], 1.06957; SI-NEXT: v_add_f64 v[8:9], v[8:9], 1.06958; SI-NEXT: v_add_f64 v[10:11], v[10:11], 1.06959; SI-NEXT: .LBB36_2: ; %end6960; SI-NEXT: s_or_b64 exec, exec, s[4:5]6961; SI-NEXT: s_setpc_b64 s[30:31]6962;6963; VI-LABEL: bitcast_v6f64_to_v6i64:6964; VI: ; %bb.0:6965; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6966; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v126967; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc6968; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6969; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6970; VI-NEXT: s_cbranch_execz .LBB36_26971; VI-NEXT: ; %bb.1: ; %cmp.true6972; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.06973; VI-NEXT: v_add_f64 v[2:3], v[2:3], 1.06974; VI-NEXT: v_add_f64 v[4:5], v[4:5], 1.06975; VI-NEXT: v_add_f64 v[6:7], v[6:7], 1.06976; VI-NEXT: v_add_f64 v[8:9], v[8:9], 1.06977; VI-NEXT: v_add_f64 v[10:11], v[10:11], 1.06978; VI-NEXT: .LBB36_2: ; %end6979; VI-NEXT: s_or_b64 exec, exec, s[4:5]6980; VI-NEXT: s_setpc_b64 s[30:31]6981;6982; GFX9-LABEL: bitcast_v6f64_to_v6i64:6983; GFX9: ; %bb.0:6984; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6985; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v126986; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc6987; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6988; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6989; GFX9-NEXT: s_cbranch_execz .LBB36_26990; GFX9-NEXT: ; %bb.1: ; %cmp.true6991; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.06992; GFX9-NEXT: v_add_f64 v[2:3], v[2:3], 1.06993; GFX9-NEXT: v_add_f64 v[4:5], v[4:5], 1.06994; GFX9-NEXT: v_add_f64 v[6:7], v[6:7], 1.06995; GFX9-NEXT: v_add_f64 v[8:9], v[8:9], 1.06996; GFX9-NEXT: v_add_f64 v[10:11], v[10:11], 1.06997; GFX9-NEXT: .LBB36_2: ; %end6998; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]6999; GFX9-NEXT: s_setpc_b64 s[30:31]7000;7001; GFX11-LABEL: bitcast_v6f64_to_v6i64:7002; GFX11: ; %bb.0:7003; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7004; GFX11-NEXT: s_mov_b32 s0, exec_lo7005; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v127006; GFX11-NEXT: s_xor_b32 s0, exec_lo, s07007; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)7008; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s07009; GFX11-NEXT: s_cbranch_execz .LBB36_27010; GFX11-NEXT: ; %bb.1: ; %cmp.true7011; GFX11-NEXT: v_add_f64 v[0:1], v[0:1], 1.07012; GFX11-NEXT: v_add_f64 v[2:3], v[2:3], 1.07013; GFX11-NEXT: v_add_f64 v[4:5], v[4:5], 1.07014; GFX11-NEXT: v_add_f64 v[6:7], v[6:7], 1.07015; GFX11-NEXT: v_add_f64 v[8:9], v[8:9], 1.07016; GFX11-NEXT: v_add_f64 v[10:11], v[10:11], 1.07017; GFX11-NEXT: .LBB36_2: ; %end7018; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s07019; GFX11-NEXT: s_setpc_b64 s[30:31]7020 %cmp = icmp eq i32 %b, 07021 br i1 %cmp, label %cmp.true, label %cmp.false7022 7023cmp.true:7024 %a1 = fadd <6 x double> %a, splat (double 1.000000e+00)7025 %a2 = bitcast <6 x double> %a1 to <6 x i64>7026 br label %end7027 7028cmp.false:7029 %a3 = bitcast <6 x double> %a to <6 x i64>7030 br label %end7031 7032end:7033 %phi = phi <6 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]7034 ret <6 x i64> %phi7035}7036 7037define inreg <6 x i64> @bitcast_v6f64_to_v6i64_scalar(<6 x double> inreg %a, i32 inreg %b) {7038; SI-LABEL: bitcast_v6f64_to_v6i64_scalar:7039; SI: ; %bb.0:7040; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7041; SI-NEXT: s_cmp_lg_u32 s28, 07042; SI-NEXT: s_cbranch_scc0 .LBB37_37043; SI-NEXT: ; %bb.1: ; %cmp.false7044; SI-NEXT: s_cbranch_execnz .LBB37_47045; SI-NEXT: .LBB37_2: ; %cmp.true7046; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.07047; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.07048; SI-NEXT: v_add_f64 v[4:5], s[20:21], 1.07049; SI-NEXT: v_add_f64 v[6:7], s[22:23], 1.07050; SI-NEXT: v_add_f64 v[8:9], s[24:25], 1.07051; SI-NEXT: v_add_f64 v[10:11], s[26:27], 1.07052; SI-NEXT: s_setpc_b64 s[30:31]7053; SI-NEXT: .LBB37_3:7054; SI-NEXT: s_branch .LBB37_27055; SI-NEXT: .LBB37_4:7056; SI-NEXT: v_mov_b32_e32 v0, s167057; SI-NEXT: v_mov_b32_e32 v1, s177058; SI-NEXT: v_mov_b32_e32 v2, s187059; SI-NEXT: v_mov_b32_e32 v3, s197060; SI-NEXT: v_mov_b32_e32 v4, s207061; SI-NEXT: v_mov_b32_e32 v5, s217062; SI-NEXT: v_mov_b32_e32 v6, s227063; SI-NEXT: v_mov_b32_e32 v7, s237064; SI-NEXT: v_mov_b32_e32 v8, s247065; SI-NEXT: v_mov_b32_e32 v9, s257066; SI-NEXT: v_mov_b32_e32 v10, s267067; SI-NEXT: v_mov_b32_e32 v11, s277068; SI-NEXT: v_mov_b32_e32 v12, s287069; SI-NEXT: v_mov_b32_e32 v13, s297070; SI-NEXT: v_mov_b32_e32 v14, s307071; SI-NEXT: v_mov_b32_e32 v15, s317072; SI-NEXT: s_setpc_b64 s[30:31]7073;7074; VI-LABEL: bitcast_v6f64_to_v6i64_scalar:7075; VI: ; %bb.0:7076; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7077; VI-NEXT: s_cmp_lg_u32 s28, 07078; VI-NEXT: s_cbranch_scc0 .LBB37_37079; VI-NEXT: ; %bb.1: ; %cmp.false7080; VI-NEXT: s_cbranch_execnz .LBB37_47081; VI-NEXT: .LBB37_2: ; %cmp.true7082; VI-NEXT: v_add_f64 v[0:1], s[16:17], 1.07083; VI-NEXT: v_add_f64 v[2:3], s[18:19], 1.07084; VI-NEXT: v_add_f64 v[4:5], s[20:21], 1.07085; VI-NEXT: v_add_f64 v[6:7], s[22:23], 1.07086; VI-NEXT: v_add_f64 v[8:9], s[24:25], 1.07087; VI-NEXT: v_add_f64 v[10:11], s[26:27], 1.07088; VI-NEXT: s_setpc_b64 s[30:31]7089; VI-NEXT: .LBB37_3:7090; VI-NEXT: s_branch .LBB37_27091; VI-NEXT: .LBB37_4:7092; VI-NEXT: v_mov_b32_e32 v0, s167093; VI-NEXT: v_mov_b32_e32 v1, s177094; VI-NEXT: v_mov_b32_e32 v2, s187095; VI-NEXT: v_mov_b32_e32 v3, s197096; VI-NEXT: v_mov_b32_e32 v4, s207097; VI-NEXT: v_mov_b32_e32 v5, s217098; VI-NEXT: v_mov_b32_e32 v6, s227099; VI-NEXT: v_mov_b32_e32 v7, s237100; VI-NEXT: v_mov_b32_e32 v8, s247101; VI-NEXT: v_mov_b32_e32 v9, s257102; VI-NEXT: v_mov_b32_e32 v10, s267103; VI-NEXT: v_mov_b32_e32 v11, s277104; VI-NEXT: v_mov_b32_e32 v12, s287105; VI-NEXT: v_mov_b32_e32 v13, s297106; VI-NEXT: v_mov_b32_e32 v14, s307107; VI-NEXT: v_mov_b32_e32 v15, s317108; VI-NEXT: s_setpc_b64 s[30:31]7109;7110; GFX9-LABEL: bitcast_v6f64_to_v6i64_scalar:7111; GFX9: ; %bb.0:7112; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7113; GFX9-NEXT: s_cmp_lg_u32 s28, 07114; GFX9-NEXT: s_cbranch_scc0 .LBB37_37115; GFX9-NEXT: ; %bb.1: ; %cmp.false7116; GFX9-NEXT: s_cbranch_execnz .LBB37_47117; GFX9-NEXT: .LBB37_2: ; %cmp.true7118; GFX9-NEXT: v_add_f64 v[0:1], s[16:17], 1.07119; GFX9-NEXT: v_add_f64 v[2:3], s[18:19], 1.07120; GFX9-NEXT: v_add_f64 v[4:5], s[20:21], 1.07121; GFX9-NEXT: v_add_f64 v[6:7], s[22:23], 1.07122; GFX9-NEXT: v_add_f64 v[8:9], s[24:25], 1.07123; GFX9-NEXT: v_add_f64 v[10:11], s[26:27], 1.07124; GFX9-NEXT: s_setpc_b64 s[30:31]7125; GFX9-NEXT: .LBB37_3:7126; GFX9-NEXT: s_branch .LBB37_27127; GFX9-NEXT: .LBB37_4:7128; GFX9-NEXT: v_mov_b32_e32 v0, s167129; GFX9-NEXT: v_mov_b32_e32 v1, s177130; GFX9-NEXT: v_mov_b32_e32 v2, s187131; GFX9-NEXT: v_mov_b32_e32 v3, s197132; GFX9-NEXT: v_mov_b32_e32 v4, s207133; GFX9-NEXT: v_mov_b32_e32 v5, s217134; GFX9-NEXT: v_mov_b32_e32 v6, s227135; GFX9-NEXT: v_mov_b32_e32 v7, s237136; GFX9-NEXT: v_mov_b32_e32 v8, s247137; GFX9-NEXT: v_mov_b32_e32 v9, s257138; GFX9-NEXT: v_mov_b32_e32 v10, s267139; GFX9-NEXT: v_mov_b32_e32 v11, s277140; GFX9-NEXT: v_mov_b32_e32 v12, s287141; GFX9-NEXT: v_mov_b32_e32 v13, s297142; GFX9-NEXT: v_mov_b32_e32 v14, s307143; GFX9-NEXT: v_mov_b32_e32 v15, s317144; GFX9-NEXT: s_setpc_b64 s[30:31]7145;7146; GFX11-LABEL: bitcast_v6f64_to_v6i64_scalar:7147; GFX11: ; %bb.0:7148; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7149; GFX11-NEXT: s_mov_b32 s15, s37150; GFX11-NEXT: s_mov_b32 s14, s27151; GFX11-NEXT: s_mov_b32 s13, s17152; GFX11-NEXT: s_mov_b32 s12, s07153; GFX11-NEXT: s_cmp_lg_u32 s24, 07154; GFX11-NEXT: s_mov_b32 s0, 07155; GFX11-NEXT: s_cbranch_scc0 .LBB37_37156; GFX11-NEXT: ; %bb.1: ; %Flow7157; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s07158; GFX11-NEXT: s_cbranch_vccnz .LBB37_47159; GFX11-NEXT: .LBB37_2: ; %cmp.true7160; GFX11-NEXT: v_add_f64 v[0:1], s[12:13], 1.07161; GFX11-NEXT: v_add_f64 v[2:3], s[14:15], 1.07162; GFX11-NEXT: v_add_f64 v[4:5], s[16:17], 1.07163; GFX11-NEXT: v_add_f64 v[6:7], s[18:19], 1.07164; GFX11-NEXT: v_add_f64 v[8:9], s[20:21], 1.07165; GFX11-NEXT: v_add_f64 v[10:11], s[22:23], 1.07166; GFX11-NEXT: s_setpc_b64 s[30:31]7167; GFX11-NEXT: .LBB37_3:7168; GFX11-NEXT: s_branch .LBB37_27169; GFX11-NEXT: .LBB37_4:7170; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s137171; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s157172; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s177173; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s197174; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s217175; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s237176; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s257177; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s277178; GFX11-NEXT: s_setpc_b64 s[30:31]7179 %cmp = icmp eq i32 %b, 07180 br i1 %cmp, label %cmp.true, label %cmp.false7181 7182cmp.true:7183 %a1 = fadd <6 x double> %a, splat (double 1.000000e+00)7184 %a2 = bitcast <6 x double> %a1 to <6 x i64>7185 br label %end7186 7187cmp.false:7188 %a3 = bitcast <6 x double> %a to <6 x i64>7189 br label %end7190 7191end:7192 %phi = phi <6 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]7193 ret <6 x i64> %phi7194}7195 7196define <6 x double> @bitcast_v6i64_to_v6f64(<6 x i64> %a, i32 %b) {7197; SI-LABEL: bitcast_v6i64_to_v6f64:7198; SI: ; %bb.0:7199; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7200; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v127201; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc7202; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]7203; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]7204; SI-NEXT: s_cbranch_execz .LBB38_27205; SI-NEXT: ; %bb.1: ; %cmp.true7206; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v07207; SI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc7208; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v27209; SI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc7210; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v47211; SI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc7212; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v67213; SI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc7214; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v87215; SI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc7216; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v107217; SI-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc7218; SI-NEXT: .LBB38_2: ; %end7219; SI-NEXT: s_or_b64 exec, exec, s[4:5]7220; SI-NEXT: s_setpc_b64 s[30:31]7221;7222; VI-LABEL: bitcast_v6i64_to_v6f64:7223; VI: ; %bb.0:7224; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7225; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v127226; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc7227; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]7228; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]7229; VI-NEXT: s_cbranch_execz .LBB38_27230; VI-NEXT: ; %bb.1: ; %cmp.true7231; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v07232; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc7233; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v27234; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc7235; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v47236; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc7237; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v67238; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc7239; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v87240; VI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc7241; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v107242; VI-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc7243; VI-NEXT: .LBB38_2: ; %end7244; VI-NEXT: s_or_b64 exec, exec, s[4:5]7245; VI-NEXT: s_setpc_b64 s[30:31]7246;7247; GFX9-LABEL: bitcast_v6i64_to_v6f64:7248; GFX9: ; %bb.0:7249; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7250; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v127251; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc7252; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]7253; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]7254; GFX9-NEXT: s_cbranch_execz .LBB38_27255; GFX9-NEXT: ; %bb.1: ; %cmp.true7256; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 3, v07257; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc7258; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, 3, v27259; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc7260; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, 3, v47261; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc7262; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, 3, v67263; GFX9-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v7, vcc7264; GFX9-NEXT: v_add_co_u32_e32 v8, vcc, 3, v87265; GFX9-NEXT: v_addc_co_u32_e32 v9, vcc, 0, v9, vcc7266; GFX9-NEXT: v_add_co_u32_e32 v10, vcc, 3, v107267; GFX9-NEXT: v_addc_co_u32_e32 v11, vcc, 0, v11, vcc7268; GFX9-NEXT: .LBB38_2: ; %end7269; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]7270; GFX9-NEXT: s_setpc_b64 s[30:31]7271;7272; GFX11-LABEL: bitcast_v6i64_to_v6f64:7273; GFX11: ; %bb.0:7274; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7275; GFX11-NEXT: s_mov_b32 s0, exec_lo7276; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v127277; GFX11-NEXT: s_xor_b32 s0, exec_lo, s07278; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)7279; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s07280; GFX11-NEXT: s_cbranch_execz .LBB38_27281; GFX11-NEXT: ; %bb.1: ; %cmp.true7282; GFX11-NEXT: v_add_co_u32 v0, vcc_lo, v0, 37283; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7284; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo7285; GFX11-NEXT: v_add_co_u32 v2, vcc_lo, v2, 37286; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo7287; GFX11-NEXT: v_add_co_u32 v4, vcc_lo, v4, 37288; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7289; GFX11-NEXT: v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo7290; GFX11-NEXT: v_add_co_u32 v6, vcc_lo, v6, 37291; GFX11-NEXT: v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo7292; GFX11-NEXT: v_add_co_u32 v8, vcc_lo, v8, 37293; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7294; GFX11-NEXT: v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo7295; GFX11-NEXT: v_add_co_u32 v10, vcc_lo, v10, 37296; GFX11-NEXT: v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo7297; GFX11-NEXT: .LBB38_2: ; %end7298; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s07299; GFX11-NEXT: s_setpc_b64 s[30:31]7300 %cmp = icmp eq i32 %b, 07301 br i1 %cmp, label %cmp.true, label %cmp.false7302 7303cmp.true:7304 %a1 = add <6 x i64> %a, splat (i64 3)7305 %a2 = bitcast <6 x i64> %a1 to <6 x double>7306 br label %end7307 7308cmp.false:7309 %a3 = bitcast <6 x i64> %a to <6 x double>7310 br label %end7311 7312end:7313 %phi = phi <6 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]7314 ret <6 x double> %phi7315}7316 7317define inreg <6 x double> @bitcast_v6i64_to_v6f64_scalar(<6 x i64> inreg %a, i32 inreg %b) {7318; SI-LABEL: bitcast_v6i64_to_v6f64_scalar:7319; SI: ; %bb.0:7320; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7321; SI-NEXT: s_cmp_lg_u32 s28, 07322; SI-NEXT: s_cbranch_scc0 .LBB39_47323; SI-NEXT: ; %bb.1: ; %cmp.false7324; SI-NEXT: s_cbranch_execnz .LBB39_37325; SI-NEXT: .LBB39_2: ; %cmp.true7326; SI-NEXT: s_add_u32 s16, s16, 37327; SI-NEXT: s_addc_u32 s17, s17, 07328; SI-NEXT: s_add_u32 s18, s18, 37329; SI-NEXT: s_addc_u32 s19, s19, 07330; SI-NEXT: s_add_u32 s20, s20, 37331; SI-NEXT: s_addc_u32 s21, s21, 07332; SI-NEXT: s_add_u32 s22, s22, 37333; SI-NEXT: s_addc_u32 s23, s23, 07334; SI-NEXT: s_add_u32 s24, s24, 37335; SI-NEXT: s_addc_u32 s25, s25, 07336; SI-NEXT: s_add_u32 s26, s26, 37337; SI-NEXT: s_addc_u32 s27, s27, 07338; SI-NEXT: .LBB39_3: ; %end7339; SI-NEXT: v_mov_b32_e32 v0, s167340; SI-NEXT: v_mov_b32_e32 v1, s177341; SI-NEXT: v_mov_b32_e32 v2, s187342; SI-NEXT: v_mov_b32_e32 v3, s197343; SI-NEXT: v_mov_b32_e32 v4, s207344; SI-NEXT: v_mov_b32_e32 v5, s217345; SI-NEXT: v_mov_b32_e32 v6, s227346; SI-NEXT: v_mov_b32_e32 v7, s237347; SI-NEXT: v_mov_b32_e32 v8, s247348; SI-NEXT: v_mov_b32_e32 v9, s257349; SI-NEXT: v_mov_b32_e32 v10, s267350; SI-NEXT: v_mov_b32_e32 v11, s277351; SI-NEXT: s_setpc_b64 s[30:31]7352; SI-NEXT: .LBB39_4:7353; SI-NEXT: s_branch .LBB39_27354;7355; VI-LABEL: bitcast_v6i64_to_v6f64_scalar:7356; VI: ; %bb.0:7357; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7358; VI-NEXT: s_cmp_lg_u32 s28, 07359; VI-NEXT: s_cbranch_scc0 .LBB39_47360; VI-NEXT: ; %bb.1: ; %cmp.false7361; VI-NEXT: s_cbranch_execnz .LBB39_37362; VI-NEXT: .LBB39_2: ; %cmp.true7363; VI-NEXT: s_add_u32 s16, s16, 37364; VI-NEXT: s_addc_u32 s17, s17, 07365; VI-NEXT: s_add_u32 s18, s18, 37366; VI-NEXT: s_addc_u32 s19, s19, 07367; VI-NEXT: s_add_u32 s20, s20, 37368; VI-NEXT: s_addc_u32 s21, s21, 07369; VI-NEXT: s_add_u32 s22, s22, 37370; VI-NEXT: s_addc_u32 s23, s23, 07371; VI-NEXT: s_add_u32 s24, s24, 37372; VI-NEXT: s_addc_u32 s25, s25, 07373; VI-NEXT: s_add_u32 s26, s26, 37374; VI-NEXT: s_addc_u32 s27, s27, 07375; VI-NEXT: .LBB39_3: ; %end7376; VI-NEXT: v_mov_b32_e32 v0, s167377; VI-NEXT: v_mov_b32_e32 v1, s177378; VI-NEXT: v_mov_b32_e32 v2, s187379; VI-NEXT: v_mov_b32_e32 v3, s197380; VI-NEXT: v_mov_b32_e32 v4, s207381; VI-NEXT: v_mov_b32_e32 v5, s217382; VI-NEXT: v_mov_b32_e32 v6, s227383; VI-NEXT: v_mov_b32_e32 v7, s237384; VI-NEXT: v_mov_b32_e32 v8, s247385; VI-NEXT: v_mov_b32_e32 v9, s257386; VI-NEXT: v_mov_b32_e32 v10, s267387; VI-NEXT: v_mov_b32_e32 v11, s277388; VI-NEXT: s_setpc_b64 s[30:31]7389; VI-NEXT: .LBB39_4:7390; VI-NEXT: s_branch .LBB39_27391;7392; GFX9-LABEL: bitcast_v6i64_to_v6f64_scalar:7393; GFX9: ; %bb.0:7394; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7395; GFX9-NEXT: s_cmp_lg_u32 s28, 07396; GFX9-NEXT: s_cbranch_scc0 .LBB39_47397; GFX9-NEXT: ; %bb.1: ; %cmp.false7398; GFX9-NEXT: s_cbranch_execnz .LBB39_37399; GFX9-NEXT: .LBB39_2: ; %cmp.true7400; GFX9-NEXT: s_add_u32 s16, s16, 37401; GFX9-NEXT: s_addc_u32 s17, s17, 07402; GFX9-NEXT: s_add_u32 s18, s18, 37403; GFX9-NEXT: s_addc_u32 s19, s19, 07404; GFX9-NEXT: s_add_u32 s20, s20, 37405; GFX9-NEXT: s_addc_u32 s21, s21, 07406; GFX9-NEXT: s_add_u32 s22, s22, 37407; GFX9-NEXT: s_addc_u32 s23, s23, 07408; GFX9-NEXT: s_add_u32 s24, s24, 37409; GFX9-NEXT: s_addc_u32 s25, s25, 07410; GFX9-NEXT: s_add_u32 s26, s26, 37411; GFX9-NEXT: s_addc_u32 s27, s27, 07412; GFX9-NEXT: .LBB39_3: ; %end7413; GFX9-NEXT: v_mov_b32_e32 v0, s167414; GFX9-NEXT: v_mov_b32_e32 v1, s177415; GFX9-NEXT: v_mov_b32_e32 v2, s187416; GFX9-NEXT: v_mov_b32_e32 v3, s197417; GFX9-NEXT: v_mov_b32_e32 v4, s207418; GFX9-NEXT: v_mov_b32_e32 v5, s217419; GFX9-NEXT: v_mov_b32_e32 v6, s227420; GFX9-NEXT: v_mov_b32_e32 v7, s237421; GFX9-NEXT: v_mov_b32_e32 v8, s247422; GFX9-NEXT: v_mov_b32_e32 v9, s257423; GFX9-NEXT: v_mov_b32_e32 v10, s267424; GFX9-NEXT: v_mov_b32_e32 v11, s277425; GFX9-NEXT: s_setpc_b64 s[30:31]7426; GFX9-NEXT: .LBB39_4:7427; GFX9-NEXT: s_branch .LBB39_27428;7429; GFX11-LABEL: bitcast_v6i64_to_v6f64_scalar:7430; GFX11: ; %bb.0:7431; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7432; GFX11-NEXT: s_cmp_lg_u32 s24, 07433; GFX11-NEXT: s_mov_b32 s4, 07434; GFX11-NEXT: s_cbranch_scc0 .LBB39_47435; GFX11-NEXT: ; %bb.1: ; %Flow7436; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s47437; GFX11-NEXT: s_cbranch_vccnz .LBB39_37438; GFX11-NEXT: .LBB39_2: ; %cmp.true7439; GFX11-NEXT: s_add_u32 s0, s0, 37440; GFX11-NEXT: s_addc_u32 s1, s1, 07441; GFX11-NEXT: s_add_u32 s2, s2, 37442; GFX11-NEXT: s_addc_u32 s3, s3, 07443; GFX11-NEXT: s_add_u32 s16, s16, 37444; GFX11-NEXT: s_addc_u32 s17, s17, 07445; GFX11-NEXT: s_add_u32 s18, s18, 37446; GFX11-NEXT: s_addc_u32 s19, s19, 07447; GFX11-NEXT: s_add_u32 s20, s20, 37448; GFX11-NEXT: s_addc_u32 s21, s21, 07449; GFX11-NEXT: s_add_u32 s22, s22, 37450; GFX11-NEXT: s_addc_u32 s23, s23, 07451; GFX11-NEXT: .LBB39_3: ; %end7452; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s17453; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s37454; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s177455; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s197456; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s217457; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s237458; GFX11-NEXT: s_setpc_b64 s[30:31]7459; GFX11-NEXT: .LBB39_4:7460; GFX11-NEXT: s_branch .LBB39_27461 %cmp = icmp eq i32 %b, 07462 br i1 %cmp, label %cmp.true, label %cmp.false7463 7464cmp.true:7465 %a1 = add <6 x i64> %a, splat (i64 3)7466 %a2 = bitcast <6 x i64> %a1 to <6 x double>7467 br label %end7468 7469cmp.false:7470 %a3 = bitcast <6 x i64> %a to <6 x double>7471 br label %end7472 7473end:7474 %phi = phi <6 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]7475 ret <6 x double> %phi7476}7477 7478define <24 x i16> @bitcast_v6f64_to_v24i16(<6 x double> %a, i32 %b) {7479; SI-LABEL: bitcast_v6f64_to_v24i16:7480; SI: ; %bb.0:7481; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7482; SI-NEXT: v_mov_b32_e32 v34, v117483; SI-NEXT: v_mov_b32_e32 v33, v107484; SI-NEXT: v_mov_b32_e32 v32, v97485; SI-NEXT: v_mov_b32_e32 v31, v87486; SI-NEXT: v_mov_b32_e32 v30, v77487; SI-NEXT: v_mov_b32_e32 v29, v67488; SI-NEXT: v_mov_b32_e32 v28, v57489; SI-NEXT: v_mov_b32_e32 v27, v47490; SI-NEXT: v_mov_b32_e32 v26, v37491; SI-NEXT: v_mov_b32_e32 v25, v27492; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v127493; SI-NEXT: ; implicit-def: $vgpr247494; SI-NEXT: ; implicit-def: $vgpr37495; SI-NEXT: ; implicit-def: $vgpr57496; SI-NEXT: ; implicit-def: $vgpr77497; SI-NEXT: ; implicit-def: $vgpr97498; SI-NEXT: ; implicit-def: $vgpr117499; SI-NEXT: ; implicit-def: $vgpr137500; SI-NEXT: ; implicit-def: $vgpr157501; SI-NEXT: ; implicit-def: $vgpr177502; SI-NEXT: ; implicit-def: $vgpr197503; SI-NEXT: ; implicit-def: $vgpr217504; SI-NEXT: ; implicit-def: $vgpr237505; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc7506; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]7507; SI-NEXT: s_cbranch_execz .LBB40_27508; SI-NEXT: ; %bb.1: ; %cmp.false7509; SI-NEXT: v_alignbit_b32 v21, v34, v33, 167510; SI-NEXT: v_alignbit_b32 v17, v32, v31, 167511; SI-NEXT: v_alignbit_b32 v13, v30, v29, 167512; SI-NEXT: v_alignbit_b32 v9, v28, v27, 167513; SI-NEXT: v_alignbit_b32 v5, v26, v25, 167514; SI-NEXT: v_alignbit_b32 v24, v1, v0, 167515; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v347516; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v327517; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v307518; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v287519; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v267520; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v17521; SI-NEXT: .LBB40_2: ; %Flow7522; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]7523; SI-NEXT: s_cbranch_execz .LBB40_47524; SI-NEXT: ; %bb.3: ; %cmp.true7525; SI-NEXT: v_add_f64 v[0:1], v[0:1], 1.07526; SI-NEXT: v_add_f64 v[25:26], v[25:26], 1.07527; SI-NEXT: v_add_f64 v[27:28], v[27:28], 1.07528; SI-NEXT: v_add_f64 v[29:30], v[29:30], 1.07529; SI-NEXT: v_add_f64 v[33:34], v[33:34], 1.07530; SI-NEXT: v_add_f64 v[31:32], v[31:32], 1.07531; SI-NEXT: v_alignbit_b32 v21, v34, v33, 167532; SI-NEXT: v_alignbit_b32 v17, v32, v31, 167533; SI-NEXT: v_alignbit_b32 v13, v30, v29, 167534; SI-NEXT: v_alignbit_b32 v9, v28, v27, 167535; SI-NEXT: v_alignbit_b32 v5, v26, v25, 167536; SI-NEXT: v_alignbit_b32 v24, v1, v0, 167537; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v347538; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v327539; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v307540; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v287541; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v267542; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v17543; SI-NEXT: .LBB40_4: ; %end7544; SI-NEXT: s_or_b64 exec, exec, s[4:5]7545; SI-NEXT: v_mov_b32_e32 v2, v17546; SI-NEXT: v_mov_b32_e32 v4, v257547; SI-NEXT: v_mov_b32_e32 v6, v267548; SI-NEXT: v_mov_b32_e32 v8, v277549; SI-NEXT: v_mov_b32_e32 v10, v287550; SI-NEXT: v_mov_b32_e32 v12, v297551; SI-NEXT: v_mov_b32_e32 v14, v307552; SI-NEXT: v_mov_b32_e32 v16, v317553; SI-NEXT: v_mov_b32_e32 v18, v327554; SI-NEXT: v_mov_b32_e32 v20, v337555; SI-NEXT: v_mov_b32_e32 v22, v347556; SI-NEXT: v_mov_b32_e32 v1, v247557; SI-NEXT: s_setpc_b64 s[30:31]7558;7559; VI-LABEL: bitcast_v6f64_to_v24i16:7560; VI: ; %bb.0:7561; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7562; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v127563; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc7564; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]7565; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]7566; VI-NEXT: s_cbranch_execz .LBB40_27567; VI-NEXT: ; %bb.1: ; %cmp.true7568; VI-NEXT: v_add_f64 v[10:11], v[10:11], 1.07569; VI-NEXT: v_add_f64 v[8:9], v[8:9], 1.07570; VI-NEXT: v_add_f64 v[6:7], v[6:7], 1.07571; VI-NEXT: v_add_f64 v[4:5], v[4:5], 1.07572; VI-NEXT: v_add_f64 v[2:3], v[2:3], 1.07573; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.07574; VI-NEXT: .LBB40_2: ; %end7575; VI-NEXT: s_or_b64 exec, exec, s[4:5]7576; VI-NEXT: s_setpc_b64 s[30:31]7577;7578; GFX9-LABEL: bitcast_v6f64_to_v24i16:7579; GFX9: ; %bb.0:7580; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7581; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v127582; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc7583; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]7584; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]7585; GFX9-NEXT: s_cbranch_execz .LBB40_27586; GFX9-NEXT: ; %bb.1: ; %cmp.true7587; GFX9-NEXT: v_add_f64 v[10:11], v[10:11], 1.07588; GFX9-NEXT: v_add_f64 v[8:9], v[8:9], 1.07589; GFX9-NEXT: v_add_f64 v[6:7], v[6:7], 1.07590; GFX9-NEXT: v_add_f64 v[4:5], v[4:5], 1.07591; GFX9-NEXT: v_add_f64 v[2:3], v[2:3], 1.07592; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.07593; GFX9-NEXT: .LBB40_2: ; %end7594; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]7595; GFX9-NEXT: s_setpc_b64 s[30:31]7596;7597; GFX11-LABEL: bitcast_v6f64_to_v24i16:7598; GFX11: ; %bb.0:7599; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7600; GFX11-NEXT: s_mov_b32 s0, exec_lo7601; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v127602; GFX11-NEXT: s_xor_b32 s0, exec_lo, s07603; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)7604; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s07605; GFX11-NEXT: s_cbranch_execz .LBB40_27606; GFX11-NEXT: ; %bb.1: ; %cmp.true7607; GFX11-NEXT: v_add_f64 v[10:11], v[10:11], 1.07608; GFX11-NEXT: v_add_f64 v[8:9], v[8:9], 1.07609; GFX11-NEXT: v_add_f64 v[6:7], v[6:7], 1.07610; GFX11-NEXT: v_add_f64 v[4:5], v[4:5], 1.07611; GFX11-NEXT: v_add_f64 v[2:3], v[2:3], 1.07612; GFX11-NEXT: v_add_f64 v[0:1], v[0:1], 1.07613; GFX11-NEXT: .LBB40_2: ; %end7614; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s07615; GFX11-NEXT: s_setpc_b64 s[30:31]7616 %cmp = icmp eq i32 %b, 07617 br i1 %cmp, label %cmp.true, label %cmp.false7618 7619cmp.true:7620 %a1 = fadd <6 x double> %a, splat (double 1.000000e+00)7621 %a2 = bitcast <6 x double> %a1 to <24 x i16>7622 br label %end7623 7624cmp.false:7625 %a3 = bitcast <6 x double> %a to <24 x i16>7626 br label %end7627 7628end:7629 %phi = phi <24 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]7630 ret <24 x i16> %phi7631}7632 7633define inreg <24 x i16> @bitcast_v6f64_to_v24i16_scalar(<6 x double> inreg %a, i32 inreg %b) {7634; SI-LABEL: bitcast_v6f64_to_v24i16_scalar:7635; SI: ; %bb.0:7636; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7637; SI-NEXT: s_cmp_lg_u32 s28, 07638; SI-NEXT: s_cbranch_scc0 .LBB41_37639; SI-NEXT: ; %bb.1: ; %cmp.false7640; SI-NEXT: s_lshr_b32 s45, s27, 167641; SI-NEXT: s_lshr_b32 s44, s25, 167642; SI-NEXT: s_lshr_b32 s43, s23, 167643; SI-NEXT: s_lshr_b32 s42, s21, 167644; SI-NEXT: s_lshr_b32 s41, s19, 167645; SI-NEXT: s_lshr_b32 s40, s17, 167646; SI-NEXT: s_lshr_b64 s[4:5], s[26:27], 167647; SI-NEXT: s_lshr_b64 s[6:7], s[24:25], 167648; SI-NEXT: s_lshr_b64 s[8:9], s[22:23], 167649; SI-NEXT: s_lshr_b64 s[10:11], s[20:21], 167650; SI-NEXT: s_lshr_b64 s[12:13], s[18:19], 167651; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 167652; SI-NEXT: s_cbranch_execnz .LBB41_47653; SI-NEXT: .LBB41_2: ; %cmp.true7654; SI-NEXT: v_add_f64 v[24:25], s[26:27], 1.07655; SI-NEXT: v_add_f64 v[26:27], s[24:25], 1.07656; SI-NEXT: v_add_f64 v[28:29], s[22:23], 1.07657; SI-NEXT: v_add_f64 v[30:31], s[20:21], 1.07658; SI-NEXT: v_add_f64 v[32:33], s[18:19], 1.07659; SI-NEXT: v_add_f64 v[34:35], s[16:17], 1.07660; SI-NEXT: v_lshr_b64 v[21:22], v[24:25], 167661; SI-NEXT: v_lshr_b64 v[17:18], v[26:27], 167662; SI-NEXT: v_lshr_b64 v[13:14], v[28:29], 167663; SI-NEXT: v_lshr_b64 v[9:10], v[30:31], 167664; SI-NEXT: v_lshr_b64 v[5:6], v[32:33], 167665; SI-NEXT: v_lshr_b64 v[1:2], v[34:35], 167666; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v257667; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v277668; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v297669; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v317670; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v337671; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v357672; SI-NEXT: s_branch .LBB41_57673; SI-NEXT: .LBB41_3:7674; SI-NEXT: ; implicit-def: $sgpr147675; SI-NEXT: ; implicit-def: $sgpr407676; SI-NEXT: ; implicit-def: $sgpr127677; SI-NEXT: ; implicit-def: $sgpr417678; SI-NEXT: ; implicit-def: $sgpr107679; SI-NEXT: ; implicit-def: $sgpr427680; SI-NEXT: ; implicit-def: $sgpr87681; SI-NEXT: ; implicit-def: $sgpr437682; SI-NEXT: ; implicit-def: $sgpr67683; SI-NEXT: ; implicit-def: $sgpr447684; SI-NEXT: ; implicit-def: $sgpr47685; SI-NEXT: ; implicit-def: $sgpr457686; SI-NEXT: s_branch .LBB41_27687; SI-NEXT: .LBB41_4:7688; SI-NEXT: v_mov_b32_e32 v25, s277689; SI-NEXT: v_mov_b32_e32 v27, s257690; SI-NEXT: v_mov_b32_e32 v29, s237691; SI-NEXT: v_mov_b32_e32 v31, s217692; SI-NEXT: v_mov_b32_e32 v33, s197693; SI-NEXT: v_mov_b32_e32 v35, s177694; SI-NEXT: v_mov_b32_e32 v34, s167695; SI-NEXT: v_mov_b32_e32 v32, s187696; SI-NEXT: v_mov_b32_e32 v30, s207697; SI-NEXT: v_mov_b32_e32 v28, s227698; SI-NEXT: v_mov_b32_e32 v26, s247699; SI-NEXT: v_mov_b32_e32 v24, s267700; SI-NEXT: v_mov_b32_e32 v23, s457701; SI-NEXT: v_mov_b32_e32 v19, s447702; SI-NEXT: v_mov_b32_e32 v15, s437703; SI-NEXT: v_mov_b32_e32 v11, s427704; SI-NEXT: v_mov_b32_e32 v7, s417705; SI-NEXT: v_mov_b32_e32 v3, s407706; SI-NEXT: v_mov_b32_e32 v1, s147707; SI-NEXT: v_mov_b32_e32 v5, s127708; SI-NEXT: v_mov_b32_e32 v9, s107709; SI-NEXT: v_mov_b32_e32 v13, s87710; SI-NEXT: v_mov_b32_e32 v17, s67711; SI-NEXT: v_mov_b32_e32 v21, s47712; SI-NEXT: .LBB41_5: ; %end7713; SI-NEXT: v_mov_b32_e32 v0, v347714; SI-NEXT: v_mov_b32_e32 v2, v357715; SI-NEXT: v_mov_b32_e32 v4, v327716; SI-NEXT: v_mov_b32_e32 v6, v337717; SI-NEXT: v_mov_b32_e32 v8, v307718; SI-NEXT: v_mov_b32_e32 v10, v317719; SI-NEXT: v_mov_b32_e32 v12, v287720; SI-NEXT: v_mov_b32_e32 v14, v297721; SI-NEXT: v_mov_b32_e32 v16, v267722; SI-NEXT: v_mov_b32_e32 v18, v277723; SI-NEXT: v_mov_b32_e32 v20, v247724; SI-NEXT: v_mov_b32_e32 v22, v257725; SI-NEXT: s_setpc_b64 s[30:31]7726;7727; VI-LABEL: bitcast_v6f64_to_v24i16_scalar:7728; VI: ; %bb.0:7729; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7730; VI-NEXT: s_cmp_lg_u32 s28, 07731; VI-NEXT: s_cbranch_scc0 .LBB41_37732; VI-NEXT: ; %bb.1: ; %cmp.false7733; VI-NEXT: s_cbranch_execnz .LBB41_47734; VI-NEXT: .LBB41_2: ; %cmp.true7735; VI-NEXT: v_add_f64 v[10:11], s[26:27], 1.07736; VI-NEXT: v_add_f64 v[8:9], s[24:25], 1.07737; VI-NEXT: v_add_f64 v[6:7], s[22:23], 1.07738; VI-NEXT: v_add_f64 v[4:5], s[20:21], 1.07739; VI-NEXT: v_add_f64 v[2:3], s[18:19], 1.07740; VI-NEXT: v_add_f64 v[0:1], s[16:17], 1.07741; VI-NEXT: s_setpc_b64 s[30:31]7742; VI-NEXT: .LBB41_3:7743; VI-NEXT: s_branch .LBB41_27744; VI-NEXT: .LBB41_4:7745; VI-NEXT: v_mov_b32_e32 v0, s167746; VI-NEXT: v_mov_b32_e32 v1, s177747; VI-NEXT: v_mov_b32_e32 v2, s187748; VI-NEXT: v_mov_b32_e32 v3, s197749; VI-NEXT: v_mov_b32_e32 v4, s207750; VI-NEXT: v_mov_b32_e32 v5, s217751; VI-NEXT: v_mov_b32_e32 v6, s227752; VI-NEXT: v_mov_b32_e32 v7, s237753; VI-NEXT: v_mov_b32_e32 v8, s247754; VI-NEXT: v_mov_b32_e32 v9, s257755; VI-NEXT: v_mov_b32_e32 v10, s267756; VI-NEXT: v_mov_b32_e32 v11, s277757; VI-NEXT: v_mov_b32_e32 v12, s287758; VI-NEXT: v_mov_b32_e32 v13, s297759; VI-NEXT: v_mov_b32_e32 v14, s307760; VI-NEXT: v_mov_b32_e32 v15, s317761; VI-NEXT: s_setpc_b64 s[30:31]7762;7763; GFX9-LABEL: bitcast_v6f64_to_v24i16_scalar:7764; GFX9: ; %bb.0:7765; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7766; GFX9-NEXT: s_cmp_lg_u32 s28, 07767; GFX9-NEXT: s_cbranch_scc0 .LBB41_37768; GFX9-NEXT: ; %bb.1: ; %cmp.false7769; GFX9-NEXT: s_cbranch_execnz .LBB41_47770; GFX9-NEXT: .LBB41_2: ; %cmp.true7771; GFX9-NEXT: v_add_f64 v[10:11], s[26:27], 1.07772; GFX9-NEXT: v_add_f64 v[8:9], s[24:25], 1.07773; GFX9-NEXT: v_add_f64 v[6:7], s[22:23], 1.07774; GFX9-NEXT: v_add_f64 v[4:5], s[20:21], 1.07775; GFX9-NEXT: v_add_f64 v[2:3], s[18:19], 1.07776; GFX9-NEXT: v_add_f64 v[0:1], s[16:17], 1.07777; GFX9-NEXT: s_setpc_b64 s[30:31]7778; GFX9-NEXT: .LBB41_3:7779; GFX9-NEXT: s_branch .LBB41_27780; GFX9-NEXT: .LBB41_4:7781; GFX9-NEXT: v_mov_b32_e32 v0, s167782; GFX9-NEXT: v_mov_b32_e32 v1, s177783; GFX9-NEXT: v_mov_b32_e32 v2, s187784; GFX9-NEXT: v_mov_b32_e32 v3, s197785; GFX9-NEXT: v_mov_b32_e32 v4, s207786; GFX9-NEXT: v_mov_b32_e32 v5, s217787; GFX9-NEXT: v_mov_b32_e32 v6, s227788; GFX9-NEXT: v_mov_b32_e32 v7, s237789; GFX9-NEXT: v_mov_b32_e32 v8, s247790; GFX9-NEXT: v_mov_b32_e32 v9, s257791; GFX9-NEXT: v_mov_b32_e32 v10, s267792; GFX9-NEXT: v_mov_b32_e32 v11, s277793; GFX9-NEXT: v_mov_b32_e32 v12, s287794; GFX9-NEXT: v_mov_b32_e32 v13, s297795; GFX9-NEXT: v_mov_b32_e32 v14, s307796; GFX9-NEXT: v_mov_b32_e32 v15, s317797; GFX9-NEXT: s_setpc_b64 s[30:31]7798;7799; GFX11-LABEL: bitcast_v6f64_to_v24i16_scalar:7800; GFX11: ; %bb.0:7801; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7802; GFX11-NEXT: s_mov_b32 s15, s37803; GFX11-NEXT: s_mov_b32 s14, s27804; GFX11-NEXT: s_mov_b32 s13, s17805; GFX11-NEXT: s_mov_b32 s12, s07806; GFX11-NEXT: s_cmp_lg_u32 s24, 07807; GFX11-NEXT: s_mov_b32 s0, 07808; GFX11-NEXT: s_cbranch_scc0 .LBB41_37809; GFX11-NEXT: ; %bb.1: ; %Flow7810; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s07811; GFX11-NEXT: s_cbranch_vccnz .LBB41_47812; GFX11-NEXT: .LBB41_2: ; %cmp.true7813; GFX11-NEXT: v_add_f64 v[10:11], s[22:23], 1.07814; GFX11-NEXT: v_add_f64 v[8:9], s[20:21], 1.07815; GFX11-NEXT: v_add_f64 v[6:7], s[18:19], 1.07816; GFX11-NEXT: v_add_f64 v[4:5], s[16:17], 1.07817; GFX11-NEXT: v_add_f64 v[2:3], s[14:15], 1.07818; GFX11-NEXT: v_add_f64 v[0:1], s[12:13], 1.07819; GFX11-NEXT: s_setpc_b64 s[30:31]7820; GFX11-NEXT: .LBB41_3:7821; GFX11-NEXT: s_branch .LBB41_27822; GFX11-NEXT: .LBB41_4:7823; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s137824; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s157825; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s177826; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s197827; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s217828; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s237829; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s257830; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s277831; GFX11-NEXT: s_setpc_b64 s[30:31]7832 %cmp = icmp eq i32 %b, 07833 br i1 %cmp, label %cmp.true, label %cmp.false7834 7835cmp.true:7836 %a1 = fadd <6 x double> %a, splat (double 1.000000e+00)7837 %a2 = bitcast <6 x double> %a1 to <24 x i16>7838 br label %end7839 7840cmp.false:7841 %a3 = bitcast <6 x double> %a to <24 x i16>7842 br label %end7843 7844end:7845 %phi = phi <24 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]7846 ret <24 x i16> %phi7847}7848 7849define <6 x double> @bitcast_v24i16_to_v6f64(<24 x i16> %a, i32 %b) {7850; SI-LABEL: bitcast_v24i16_to_v6f64:7851; SI: ; %bb.0:7852; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7853; SI-NEXT: v_mov_b32_e32 v32, v147854; SI-NEXT: v_mov_b32_e32 v31, v127855; SI-NEXT: v_mov_b32_e32 v30, v107856; SI-NEXT: v_mov_b32_e32 v29, v87857; SI-NEXT: v_mov_b32_e32 v28, v67858; SI-NEXT: v_mov_b32_e32 v25, v47859; SI-NEXT: v_mov_b32_e32 v26, v27860; SI-NEXT: v_mov_b32_e32 v27, v07861; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v247862; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v17863; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v37864; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57865; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v77866; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v97867; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v117868; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v137869; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v157870; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v177871; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v197872; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v217873; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v237874; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr157875; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc7876; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]7877; SI-NEXT: s_cbranch_execnz .LBB42_37878; SI-NEXT: ; %bb.1: ; %Flow7879; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]7880; SI-NEXT: s_cbranch_execnz .LBB42_47881; SI-NEXT: .LBB42_2: ; %end7882; SI-NEXT: s_or_b64 exec, exec, s[4:5]7883; SI-NEXT: s_setpc_b64 s[30:31]7884; SI-NEXT: .LBB42_3: ; %cmp.false7885; SI-NEXT: v_and_b32_e32 v0, 0xffff, v277886; SI-NEXT: v_and_b32_e32 v1, 0xffff, v267887; SI-NEXT: v_and_b32_e32 v2, 0xffff, v257888; SI-NEXT: v_and_b32_e32 v3, 0xffff, v287889; SI-NEXT: v_and_b32_e32 v4, 0xffff, v297890; SI-NEXT: v_and_b32_e32 v5, 0xffff, v307891; SI-NEXT: v_and_b32_e32 v6, 0xffff, v317892; SI-NEXT: v_and_b32_e32 v7, 0xffff, v327893; SI-NEXT: v_and_b32_e32 v8, 0xffff, v167894; SI-NEXT: v_and_b32_e32 v9, 0xffff, v187895; SI-NEXT: v_and_b32_e32 v10, 0xffff, v207896; SI-NEXT: v_and_b32_e32 v11, 0xffff, v227897; SI-NEXT: v_or_b32_e32 v0, v0, v497898; SI-NEXT: v_or_b32_e32 v1, v1, v487899; SI-NEXT: v_or_b32_e32 v2, v2, v397900; SI-NEXT: v_or_b32_e32 v3, v3, v387901; SI-NEXT: v_or_b32_e32 v4, v4, v377902; SI-NEXT: v_or_b32_e32 v5, v5, v367903; SI-NEXT: v_or_b32_e32 v6, v6, v357904; SI-NEXT: v_or_b32_e32 v7, v7, v347905; SI-NEXT: v_or_b32_e32 v8, v8, v337906; SI-NEXT: v_or_b32_e32 v9, v9, v247907; SI-NEXT: v_or_b32_e32 v10, v10, v197908; SI-NEXT: v_or_b32_e32 v11, v11, v177909; SI-NEXT: ; implicit-def: $vgpr277910; SI-NEXT: ; implicit-def: $vgpr267911; SI-NEXT: ; implicit-def: $vgpr257912; SI-NEXT: ; implicit-def: $vgpr287913; SI-NEXT: ; implicit-def: $vgpr297914; SI-NEXT: ; implicit-def: $vgpr307915; SI-NEXT: ; implicit-def: $vgpr317916; SI-NEXT: ; implicit-def: $vgpr327917; SI-NEXT: ; implicit-def: $vgpr167918; SI-NEXT: ; implicit-def: $vgpr187919; SI-NEXT: ; implicit-def: $vgpr207920; SI-NEXT: ; implicit-def: $vgpr227921; SI-NEXT: ; implicit-def: $vgpr497922; SI-NEXT: ; implicit-def: $vgpr487923; SI-NEXT: ; implicit-def: $vgpr397924; SI-NEXT: ; implicit-def: $vgpr387925; SI-NEXT: ; implicit-def: $vgpr377926; SI-NEXT: ; implicit-def: $vgpr367927; SI-NEXT: ; implicit-def: $vgpr357928; SI-NEXT: ; implicit-def: $vgpr347929; SI-NEXT: ; implicit-def: $vgpr337930; SI-NEXT: ; implicit-def: $vgpr247931; SI-NEXT: ; implicit-def: $vgpr197932; SI-NEXT: ; implicit-def: $vgpr177933; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]7934; SI-NEXT: s_cbranch_execz .LBB42_27935; SI-NEXT: .LBB42_4: ; %cmp.true7936; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v277937; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v267938; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v257939; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v287940; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v297941; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v307942; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v317943; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v327944; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v167945; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v187946; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v207947; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v227948; SI-NEXT: v_and_b32_e32 v0, 0xffff, v07949; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17950; SI-NEXT: v_and_b32_e32 v2, 0xffff, v27951; SI-NEXT: v_and_b32_e32 v3, 0xffff, v37952; SI-NEXT: v_and_b32_e32 v4, 0xffff, v47953; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57954; SI-NEXT: v_and_b32_e32 v6, 0xffff, v67955; SI-NEXT: v_and_b32_e32 v7, 0xffff, v77956; SI-NEXT: v_and_b32_e32 v8, 0xffff, v87957; SI-NEXT: v_and_b32_e32 v9, 0xffff, v97958; SI-NEXT: v_and_b32_e32 v10, 0xffff, v107959; SI-NEXT: v_and_b32_e32 v11, 0xffff, v117960; SI-NEXT: v_or_b32_e32 v0, v49, v07961; SI-NEXT: s_mov_b32 s6, 0x300007962; SI-NEXT: v_or_b32_e32 v1, v48, v17963; SI-NEXT: v_or_b32_e32 v2, v39, v27964; SI-NEXT: v_or_b32_e32 v3, v38, v37965; SI-NEXT: v_or_b32_e32 v4, v37, v47966; SI-NEXT: v_or_b32_e32 v5, v36, v57967; SI-NEXT: v_or_b32_e32 v6, v35, v67968; SI-NEXT: v_or_b32_e32 v7, v34, v77969; SI-NEXT: v_or_b32_e32 v8, v33, v87970; SI-NEXT: v_or_b32_e32 v9, v24, v97971; SI-NEXT: v_or_b32_e32 v10, v19, v107972; SI-NEXT: v_or_b32_e32 v11, v17, v117973; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v07974; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v17975; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v27976; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v37977; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v47978; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v57979; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v67980; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v77981; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v87982; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v97983; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v107984; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v117985; SI-NEXT: s_or_b64 exec, exec, s[4:5]7986; SI-NEXT: s_setpc_b64 s[30:31]7987;7988; VI-LABEL: bitcast_v24i16_to_v6f64:7989; VI: ; %bb.0:7990; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7991; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v127992; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc7993; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]7994; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]7995; VI-NEXT: s_cbranch_execz .LBB42_27996; VI-NEXT: ; %bb.1: ; %cmp.true7997; VI-NEXT: v_mov_b32_e32 v13, 37998; VI-NEXT: v_add_u16_e32 v12, 3, v117999; VI-NEXT: v_add_u16_sdwa v11, v11, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8000; VI-NEXT: v_or_b32_e32 v11, v12, v118001; VI-NEXT: v_add_u16_e32 v12, 3, v108002; VI-NEXT: v_add_u16_sdwa v10, v10, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8003; VI-NEXT: v_or_b32_e32 v10, v12, v108004; VI-NEXT: v_add_u16_e32 v12, 3, v98005; VI-NEXT: v_add_u16_sdwa v9, v9, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8006; VI-NEXT: v_or_b32_e32 v9, v12, v98007; VI-NEXT: v_add_u16_e32 v12, 3, v88008; VI-NEXT: v_add_u16_sdwa v8, v8, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8009; VI-NEXT: v_or_b32_e32 v8, v12, v88010; VI-NEXT: v_add_u16_e32 v12, 3, v78011; VI-NEXT: v_add_u16_sdwa v7, v7, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8012; VI-NEXT: v_or_b32_e32 v7, v12, v78013; VI-NEXT: v_add_u16_e32 v12, 3, v68014; VI-NEXT: v_add_u16_sdwa v6, v6, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8015; VI-NEXT: v_or_b32_e32 v6, v12, v68016; VI-NEXT: v_add_u16_e32 v12, 3, v58017; VI-NEXT: v_add_u16_sdwa v5, v5, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8018; VI-NEXT: v_or_b32_e32 v5, v12, v58019; VI-NEXT: v_add_u16_e32 v12, 3, v48020; VI-NEXT: v_add_u16_sdwa v4, v4, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8021; VI-NEXT: v_or_b32_e32 v4, v12, v48022; VI-NEXT: v_add_u16_e32 v12, 3, v38023; VI-NEXT: v_add_u16_sdwa v3, v3, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8024; VI-NEXT: v_or_b32_e32 v3, v12, v38025; VI-NEXT: v_add_u16_e32 v12, 3, v28026; VI-NEXT: v_add_u16_sdwa v2, v2, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8027; VI-NEXT: v_or_b32_e32 v2, v12, v28028; VI-NEXT: v_add_u16_e32 v12, 3, v18029; VI-NEXT: v_add_u16_sdwa v1, v1, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8030; VI-NEXT: v_or_b32_e32 v1, v12, v18031; VI-NEXT: v_add_u16_e32 v12, 3, v08032; VI-NEXT: v_add_u16_sdwa v0, v0, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8033; VI-NEXT: v_or_b32_e32 v0, v12, v08034; VI-NEXT: .LBB42_2: ; %end8035; VI-NEXT: s_or_b64 exec, exec, s[4:5]8036; VI-NEXT: s_setpc_b64 s[30:31]8037;8038; GFX9-LABEL: bitcast_v24i16_to_v6f64:8039; GFX9: ; %bb.0:8040; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8041; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v128042; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc8043; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]8044; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]8045; GFX9-NEXT: s_cbranch_execz .LBB42_28046; GFX9-NEXT: ; %bb.1: ; %cmp.true8047; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]8048; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]8049; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]8050; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]8051; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]8052; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]8053; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]8054; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]8055; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]8056; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]8057; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]8058; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]8059; GFX9-NEXT: .LBB42_2: ; %end8060; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]8061; GFX9-NEXT: s_setpc_b64 s[30:31]8062;8063; GFX11-LABEL: bitcast_v24i16_to_v6f64:8064; GFX11: ; %bb.0:8065; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8066; GFX11-NEXT: s_mov_b32 s0, exec_lo8067; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v128068; GFX11-NEXT: s_xor_b32 s0, exec_lo, s08069; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)8070; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s08071; GFX11-NEXT: s_cbranch_execz .LBB42_28072; GFX11-NEXT: ; %bb.1: ; %cmp.true8073; GFX11-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]8074; GFX11-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]8075; GFX11-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]8076; GFX11-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]8077; GFX11-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]8078; GFX11-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]8079; GFX11-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]8080; GFX11-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]8081; GFX11-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]8082; GFX11-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]8083; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]8084; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]8085; GFX11-NEXT: .LBB42_2: ; %end8086; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s08087; GFX11-NEXT: s_setpc_b64 s[30:31]8088 %cmp = icmp eq i32 %b, 08089 br i1 %cmp, label %cmp.true, label %cmp.false8090 8091cmp.true:8092 %a1 = add <24 x i16> %a, splat (i16 3)8093 %a2 = bitcast <24 x i16> %a1 to <6 x double>8094 br label %end8095 8096cmp.false:8097 %a3 = bitcast <24 x i16> %a to <6 x double>8098 br label %end8099 8100end:8101 %phi = phi <6 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]8102 ret <6 x double> %phi8103}8104 8105define inreg <6 x double> @bitcast_v24i16_to_v6f64_scalar(<24 x i16> inreg %a, i32 inreg %b) {8106; SI-LABEL: bitcast_v24i16_to_v6f64_scalar:8107; SI: ; %bb.0:8108; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8109; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v108110; SI-NEXT: v_mov_b32_e32 v16, v88111; SI-NEXT: v_mov_b32_e32 v17, v68112; SI-NEXT: v_mov_b32_e32 v18, v48113; SI-NEXT: v_mov_b32_e32 v19, v28114; SI-NEXT: v_mov_b32_e32 v20, v08115; SI-NEXT: s_and_b64 s[4:5], vcc, exec8116; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v18117; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v38118; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v58119; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v78120; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v98121; SI-NEXT: s_cbranch_scc0 .LBB43_48122; SI-NEXT: ; %bb.1: ; %cmp.false8123; SI-NEXT: s_and_b32 s4, s16, 0xffff8124; SI-NEXT: s_lshl_b32 s5, s17, 168125; SI-NEXT: s_or_b32 s4, s4, s58126; SI-NEXT: s_and_b32 s5, s18, 0xffff8127; SI-NEXT: s_lshl_b32 s6, s19, 168128; SI-NEXT: s_or_b32 s5, s5, s68129; SI-NEXT: s_and_b32 s6, s20, 0xffff8130; SI-NEXT: s_lshl_b32 s7, s21, 168131; SI-NEXT: s_or_b32 s6, s6, s78132; SI-NEXT: s_and_b32 s7, s22, 0xffff8133; SI-NEXT: s_lshl_b32 s8, s23, 168134; SI-NEXT: v_and_b32_e32 v0, 0xffff, v208135; SI-NEXT: s_or_b32 s7, s7, s88136; SI-NEXT: s_and_b32 s8, s24, 0xffff8137; SI-NEXT: s_lshl_b32 s9, s25, 168138; SI-NEXT: v_or_b32_e32 v7, v0, v258139; SI-NEXT: v_and_b32_e32 v0, 0xffff, v188140; SI-NEXT: s_or_b32 s8, s8, s98141; SI-NEXT: s_and_b32 s9, s26, 0xffff8142; SI-NEXT: s_lshl_b32 s10, s27, 168143; SI-NEXT: v_or_b32_e32 v9, v0, v238144; SI-NEXT: v_and_b32_e32 v0, 0xffff, v178145; SI-NEXT: s_or_b32 s9, s9, s108146; SI-NEXT: s_and_b32 s10, s28, 0xffff8147; SI-NEXT: s_lshl_b32 s11, s29, 168148; SI-NEXT: v_and_b32_e32 v1, 0xffff, v198149; SI-NEXT: v_or_b32_e32 v10, v0, v228150; SI-NEXT: v_and_b32_e32 v0, 0xffff, v168151; SI-NEXT: s_or_b32 s10, s10, s118152; SI-NEXT: v_or_b32_e32 v8, v1, v248153; SI-NEXT: v_or_b32_e32 v11, v0, v218154; SI-NEXT: v_mov_b32_e32 v0, s48155; SI-NEXT: v_mov_b32_e32 v1, s58156; SI-NEXT: v_mov_b32_e32 v2, s68157; SI-NEXT: v_mov_b32_e32 v3, s78158; SI-NEXT: v_mov_b32_e32 v4, s88159; SI-NEXT: v_mov_b32_e32 v5, s98160; SI-NEXT: v_mov_b32_e32 v6, s108161; SI-NEXT: s_cbranch_execnz .LBB43_38162; SI-NEXT: .LBB43_2: ; %cmp.true8163; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v208164; SI-NEXT: v_and_b32_e32 v0, 0xffff, v08165; SI-NEXT: v_or_b32_e32 v0, v25, v08166; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v08167; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v198168; SI-NEXT: v_and_b32_e32 v0, 0xffff, v08169; SI-NEXT: s_add_i32 s16, s16, 38170; SI-NEXT: v_or_b32_e32 v0, v24, v08171; SI-NEXT: s_and_b32 s4, s16, 0xffff8172; SI-NEXT: s_lshl_b32 s5, s17, 168173; SI-NEXT: s_add_i32 s18, s18, 38174; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v08175; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v188176; SI-NEXT: s_or_b32 s4, s5, s48177; SI-NEXT: s_and_b32 s5, s18, 0xffff8178; SI-NEXT: s_lshl_b32 s6, s19, 168179; SI-NEXT: s_add_i32 s20, s20, 38180; SI-NEXT: v_and_b32_e32 v0, 0xffff, v08181; SI-NEXT: s_or_b32 s5, s6, s58182; SI-NEXT: s_and_b32 s6, s20, 0xffff8183; SI-NEXT: s_lshl_b32 s7, s21, 168184; SI-NEXT: s_add_i32 s22, s22, 38185; SI-NEXT: v_or_b32_e32 v0, v23, v08186; SI-NEXT: s_or_b32 s6, s7, s68187; SI-NEXT: s_and_b32 s7, s22, 0xffff8188; SI-NEXT: s_lshl_b32 s8, s23, 168189; SI-NEXT: s_add_i32 s24, s24, 38190; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v08191; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v178192; SI-NEXT: s_or_b32 s7, s8, s78193; SI-NEXT: s_and_b32 s8, s24, 0xffff8194; SI-NEXT: s_lshl_b32 s9, s25, 168195; SI-NEXT: s_add_i32 s26, s26, 38196; SI-NEXT: v_and_b32_e32 v0, 0xffff, v08197; SI-NEXT: s_or_b32 s8, s9, s88198; SI-NEXT: s_and_b32 s9, s26, 0xffff8199; SI-NEXT: s_lshl_b32 s10, s27, 168200; SI-NEXT: s_add_i32 s28, s28, 38201; SI-NEXT: v_or_b32_e32 v0, v22, v08202; SI-NEXT: s_or_b32 s9, s10, s98203; SI-NEXT: s_and_b32 s10, s28, 0xffff8204; SI-NEXT: s_lshl_b32 s11, s29, 168205; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v08206; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v168207; SI-NEXT: s_or_b32 s10, s11, s108208; SI-NEXT: v_and_b32_e32 v0, 0xffff, v08209; SI-NEXT: s_add_i32 s4, s4, 0x300008210; SI-NEXT: s_add_i32 s5, s5, 0x300008211; SI-NEXT: s_add_i32 s6, s6, 0x300008212; SI-NEXT: s_add_i32 s7, s7, 0x300008213; SI-NEXT: s_add_i32 s8, s8, 0x300008214; SI-NEXT: s_add_i32 s9, s9, 0x300008215; SI-NEXT: s_add_i32 s10, s10, 0x300008216; SI-NEXT: v_or_b32_e32 v0, v21, v08217; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v08218; SI-NEXT: v_mov_b32_e32 v0, s48219; SI-NEXT: v_mov_b32_e32 v1, s58220; SI-NEXT: v_mov_b32_e32 v2, s68221; SI-NEXT: v_mov_b32_e32 v3, s78222; SI-NEXT: v_mov_b32_e32 v4, s88223; SI-NEXT: v_mov_b32_e32 v5, s98224; SI-NEXT: v_mov_b32_e32 v6, s108225; SI-NEXT: .LBB43_3: ; %end8226; SI-NEXT: s_setpc_b64 s[30:31]8227; SI-NEXT: .LBB43_4:8228; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr158229; SI-NEXT: s_branch .LBB43_28230;8231; VI-LABEL: bitcast_v24i16_to_v6f64_scalar:8232; VI: ; %bb.0:8233; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8234; VI-NEXT: s_cmp_lg_u32 s28, 08235; VI-NEXT: s_cbranch_scc0 .LBB43_48236; VI-NEXT: ; %bb.1: ; %cmp.false8237; VI-NEXT: s_cbranch_execnz .LBB43_38238; VI-NEXT: .LBB43_2: ; %cmp.true8239; VI-NEXT: s_add_i32 s5, s27, 38240; VI-NEXT: s_and_b32 s4, s27, 0xffff00008241; VI-NEXT: s_and_b32 s5, s5, 0xffff8242; VI-NEXT: s_or_b32 s4, s4, s58243; VI-NEXT: s_add_i32 s5, s26, 38244; VI-NEXT: s_add_i32 s27, s4, 0x300008245; VI-NEXT: s_and_b32 s4, s26, 0xffff00008246; VI-NEXT: s_and_b32 s5, s5, 0xffff8247; VI-NEXT: s_or_b32 s4, s4, s58248; VI-NEXT: s_add_i32 s5, s25, 38249; VI-NEXT: s_add_i32 s26, s4, 0x300008250; VI-NEXT: s_and_b32 s4, s25, 0xffff00008251; VI-NEXT: s_and_b32 s5, s5, 0xffff8252; VI-NEXT: s_or_b32 s4, s4, s58253; VI-NEXT: s_add_i32 s5, s24, 38254; VI-NEXT: s_add_i32 s25, s4, 0x300008255; VI-NEXT: s_and_b32 s4, s24, 0xffff00008256; VI-NEXT: s_and_b32 s5, s5, 0xffff8257; VI-NEXT: s_or_b32 s4, s4, s58258; VI-NEXT: s_add_i32 s5, s23, 38259; VI-NEXT: s_add_i32 s24, s4, 0x300008260; VI-NEXT: s_and_b32 s4, s23, 0xffff00008261; VI-NEXT: s_and_b32 s5, s5, 0xffff8262; VI-NEXT: s_or_b32 s4, s4, s58263; VI-NEXT: s_add_i32 s5, s22, 38264; VI-NEXT: s_add_i32 s23, s4, 0x300008265; VI-NEXT: s_and_b32 s4, s22, 0xffff00008266; VI-NEXT: s_and_b32 s5, s5, 0xffff8267; VI-NEXT: s_or_b32 s4, s4, s58268; VI-NEXT: s_add_i32 s5, s21, 38269; VI-NEXT: s_add_i32 s22, s4, 0x300008270; VI-NEXT: s_and_b32 s4, s21, 0xffff00008271; VI-NEXT: s_and_b32 s5, s5, 0xffff8272; VI-NEXT: s_or_b32 s4, s4, s58273; VI-NEXT: s_add_i32 s5, s20, 38274; VI-NEXT: s_add_i32 s21, s4, 0x300008275; VI-NEXT: s_and_b32 s4, s20, 0xffff00008276; VI-NEXT: s_and_b32 s5, s5, 0xffff8277; VI-NEXT: s_or_b32 s4, s4, s58278; VI-NEXT: s_add_i32 s5, s19, 38279; VI-NEXT: s_add_i32 s20, s4, 0x300008280; VI-NEXT: s_and_b32 s4, s19, 0xffff00008281; VI-NEXT: s_and_b32 s5, s5, 0xffff8282; VI-NEXT: s_or_b32 s4, s4, s58283; VI-NEXT: s_add_i32 s5, s18, 38284; VI-NEXT: s_add_i32 s19, s4, 0x300008285; VI-NEXT: s_and_b32 s4, s18, 0xffff00008286; VI-NEXT: s_and_b32 s5, s5, 0xffff8287; VI-NEXT: s_or_b32 s4, s4, s58288; VI-NEXT: s_add_i32 s5, s17, 38289; VI-NEXT: s_add_i32 s18, s4, 0x300008290; VI-NEXT: s_and_b32 s4, s17, 0xffff00008291; VI-NEXT: s_and_b32 s5, s5, 0xffff8292; VI-NEXT: s_or_b32 s4, s4, s58293; VI-NEXT: s_add_i32 s5, s16, 38294; VI-NEXT: s_add_i32 s17, s4, 0x300008295; VI-NEXT: s_and_b32 s4, s16, 0xffff00008296; VI-NEXT: s_and_b32 s5, s5, 0xffff8297; VI-NEXT: s_or_b32 s4, s4, s58298; VI-NEXT: s_add_i32 s16, s4, 0x300008299; VI-NEXT: .LBB43_3: ; %end8300; VI-NEXT: v_mov_b32_e32 v0, s168301; VI-NEXT: v_mov_b32_e32 v1, s178302; VI-NEXT: v_mov_b32_e32 v2, s188303; VI-NEXT: v_mov_b32_e32 v3, s198304; VI-NEXT: v_mov_b32_e32 v4, s208305; VI-NEXT: v_mov_b32_e32 v5, s218306; VI-NEXT: v_mov_b32_e32 v6, s228307; VI-NEXT: v_mov_b32_e32 v7, s238308; VI-NEXT: v_mov_b32_e32 v8, s248309; VI-NEXT: v_mov_b32_e32 v9, s258310; VI-NEXT: v_mov_b32_e32 v10, s268311; VI-NEXT: v_mov_b32_e32 v11, s278312; VI-NEXT: s_setpc_b64 s[30:31]8313; VI-NEXT: .LBB43_4:8314; VI-NEXT: s_branch .LBB43_28315;8316; GFX9-LABEL: bitcast_v24i16_to_v6f64_scalar:8317; GFX9: ; %bb.0:8318; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8319; GFX9-NEXT: s_cmp_lg_u32 s28, 08320; GFX9-NEXT: s_cbranch_scc0 .LBB43_38321; GFX9-NEXT: ; %bb.1: ; %cmp.false8322; GFX9-NEXT: s_cbranch_execnz .LBB43_48323; GFX9-NEXT: .LBB43_2: ; %cmp.true8324; GFX9-NEXT: v_pk_add_u16 v11, s27, 3 op_sel_hi:[1,0]8325; GFX9-NEXT: v_pk_add_u16 v10, s26, 3 op_sel_hi:[1,0]8326; GFX9-NEXT: v_pk_add_u16 v9, s25, 3 op_sel_hi:[1,0]8327; GFX9-NEXT: v_pk_add_u16 v8, s24, 3 op_sel_hi:[1,0]8328; GFX9-NEXT: v_pk_add_u16 v7, s23, 3 op_sel_hi:[1,0]8329; GFX9-NEXT: v_pk_add_u16 v6, s22, 3 op_sel_hi:[1,0]8330; GFX9-NEXT: v_pk_add_u16 v5, s21, 3 op_sel_hi:[1,0]8331; GFX9-NEXT: v_pk_add_u16 v4, s20, 3 op_sel_hi:[1,0]8332; GFX9-NEXT: v_pk_add_u16 v3, s19, 3 op_sel_hi:[1,0]8333; GFX9-NEXT: v_pk_add_u16 v2, s18, 3 op_sel_hi:[1,0]8334; GFX9-NEXT: v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]8335; GFX9-NEXT: v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]8336; GFX9-NEXT: s_setpc_b64 s[30:31]8337; GFX9-NEXT: .LBB43_3:8338; GFX9-NEXT: s_branch .LBB43_28339; GFX9-NEXT: .LBB43_4:8340; GFX9-NEXT: v_mov_b32_e32 v0, s168341; GFX9-NEXT: v_mov_b32_e32 v1, s178342; GFX9-NEXT: v_mov_b32_e32 v2, s188343; GFX9-NEXT: v_mov_b32_e32 v3, s198344; GFX9-NEXT: v_mov_b32_e32 v4, s208345; GFX9-NEXT: v_mov_b32_e32 v5, s218346; GFX9-NEXT: v_mov_b32_e32 v6, s228347; GFX9-NEXT: v_mov_b32_e32 v7, s238348; GFX9-NEXT: v_mov_b32_e32 v8, s248349; GFX9-NEXT: v_mov_b32_e32 v9, s258350; GFX9-NEXT: v_mov_b32_e32 v10, s268351; GFX9-NEXT: v_mov_b32_e32 v11, s278352; GFX9-NEXT: v_mov_b32_e32 v12, s288353; GFX9-NEXT: v_mov_b32_e32 v13, s298354; GFX9-NEXT: v_mov_b32_e32 v14, s308355; GFX9-NEXT: v_mov_b32_e32 v15, s318356; GFX9-NEXT: s_setpc_b64 s[30:31]8357;8358; GFX11-LABEL: bitcast_v24i16_to_v6f64_scalar:8359; GFX11: ; %bb.0:8360; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8361; GFX11-NEXT: s_mov_b32 s15, s38362; GFX11-NEXT: s_mov_b32 s14, s28363; GFX11-NEXT: s_mov_b32 s13, s18364; GFX11-NEXT: s_mov_b32 s12, s08365; GFX11-NEXT: s_cmp_lg_u32 s24, 08366; GFX11-NEXT: s_mov_b32 s0, 08367; GFX11-NEXT: s_cbranch_scc0 .LBB43_38368; GFX11-NEXT: ; %bb.1: ; %Flow8369; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s08370; GFX11-NEXT: s_cbranch_vccnz .LBB43_48371; GFX11-NEXT: .LBB43_2: ; %cmp.true8372; GFX11-NEXT: v_pk_add_u16 v11, s23, 3 op_sel_hi:[1,0]8373; GFX11-NEXT: v_pk_add_u16 v10, s22, 3 op_sel_hi:[1,0]8374; GFX11-NEXT: v_pk_add_u16 v9, s21, 3 op_sel_hi:[1,0]8375; GFX11-NEXT: v_pk_add_u16 v8, s20, 3 op_sel_hi:[1,0]8376; GFX11-NEXT: v_pk_add_u16 v7, s19, 3 op_sel_hi:[1,0]8377; GFX11-NEXT: v_pk_add_u16 v6, s18, 3 op_sel_hi:[1,0]8378; GFX11-NEXT: v_pk_add_u16 v5, s17, 3 op_sel_hi:[1,0]8379; GFX11-NEXT: v_pk_add_u16 v4, s16, 3 op_sel_hi:[1,0]8380; GFX11-NEXT: v_pk_add_u16 v3, s15, 3 op_sel_hi:[1,0]8381; GFX11-NEXT: v_pk_add_u16 v2, s14, 3 op_sel_hi:[1,0]8382; GFX11-NEXT: v_pk_add_u16 v1, s13, 3 op_sel_hi:[1,0]8383; GFX11-NEXT: v_pk_add_u16 v0, s12, 3 op_sel_hi:[1,0]8384; GFX11-NEXT: s_setpc_b64 s[30:31]8385; GFX11-NEXT: .LBB43_3:8386; GFX11-NEXT: s_branch .LBB43_28387; GFX11-NEXT: .LBB43_4:8388; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s138389; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s158390; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s178391; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s198392; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s218393; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s238394; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s258395; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s278396; GFX11-NEXT: s_setpc_b64 s[30:31]8397 %cmp = icmp eq i32 %b, 08398 br i1 %cmp, label %cmp.true, label %cmp.false8399 8400cmp.true:8401 %a1 = add <24 x i16> %a, splat (i16 3)8402 %a2 = bitcast <24 x i16> %a1 to <6 x double>8403 br label %end8404 8405cmp.false:8406 %a3 = bitcast <24 x i16> %a to <6 x double>8407 br label %end8408 8409end:8410 %phi = phi <6 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]8411 ret <6 x double> %phi8412}8413 8414define <24 x half> @bitcast_v6f64_to_v24f16(<6 x double> %a, i32 %b) {8415; SI-LABEL: bitcast_v6f64_to_v24f16:8416; SI: ; %bb.0:8417; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8418; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v128419; SI-NEXT: ; implicit-def: $vgpr348420; SI-NEXT: ; implicit-def: $vgpr358421; SI-NEXT: ; implicit-def: $vgpr338422; SI-NEXT: ; implicit-def: $vgpr328423; SI-NEXT: ; implicit-def: $vgpr318424; SI-NEXT: ; implicit-def: $vgpr298425; SI-NEXT: ; implicit-def: $vgpr308426; SI-NEXT: ; implicit-def: $vgpr278427; SI-NEXT: ; implicit-def: $vgpr288428; SI-NEXT: ; implicit-def: $vgpr248429; SI-NEXT: ; implicit-def: $vgpr268430; SI-NEXT: ; implicit-def: $vgpr258431; SI-NEXT: ; implicit-def: $vgpr128432; SI-NEXT: ; implicit-def: $vgpr138433; SI-NEXT: ; implicit-def: $vgpr148434; SI-NEXT: ; implicit-def: $vgpr158435; SI-NEXT: ; implicit-def: $vgpr168436; SI-NEXT: ; implicit-def: $vgpr178437; SI-NEXT: ; implicit-def: $vgpr188438; SI-NEXT: ; implicit-def: $vgpr198439; SI-NEXT: ; implicit-def: $vgpr208440; SI-NEXT: ; implicit-def: $vgpr218441; SI-NEXT: ; implicit-def: $vgpr228442; SI-NEXT: ; implicit-def: $vgpr238443; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc8444; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]8445; SI-NEXT: s_cbranch_execz .LBB44_28446; SI-NEXT: ; %bb.1: ; %cmp.false8447; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v118448; SI-NEXT: v_cvt_f32_f16_e32 v23, v128449; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v108450; SI-NEXT: v_cvt_f32_f16_e32 v21, v128451; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v98452; SI-NEXT: v_cvt_f32_f16_e32 v19, v128453; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v88454; SI-NEXT: v_cvt_f32_f16_e32 v17, v128455; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v78456; SI-NEXT: v_cvt_f32_f16_e32 v15, v128457; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v68458; SI-NEXT: v_cvt_f32_f16_e32 v13, v128459; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v58460; SI-NEXT: v_cvt_f32_f16_e32 v25, v128461; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v48462; SI-NEXT: v_cvt_f32_f16_e32 v24, v128463; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v38464; SI-NEXT: v_cvt_f32_f16_e32 v27, v128465; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v28466; SI-NEXT: v_cvt_f32_f16_e32 v29, v128467; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v18468; SI-NEXT: v_cvt_f32_f16_e32 v32, v128469; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v08470; SI-NEXT: v_cvt_f32_f16_e32 v35, v128471; SI-NEXT: v_cvt_f32_f16_e32 v22, v118472; SI-NEXT: v_cvt_f32_f16_e32 v20, v108473; SI-NEXT: v_cvt_f32_f16_e32 v18, v98474; SI-NEXT: v_cvt_f32_f16_e32 v16, v88475; SI-NEXT: v_cvt_f32_f16_e32 v14, v78476; SI-NEXT: v_cvt_f32_f16_e32 v12, v68477; SI-NEXT: v_cvt_f32_f16_e32 v26, v58478; SI-NEXT: v_cvt_f32_f16_e32 v28, v48479; SI-NEXT: v_cvt_f32_f16_e32 v30, v38480; SI-NEXT: v_cvt_f32_f16_e32 v31, v28481; SI-NEXT: v_cvt_f32_f16_e32 v33, v18482; SI-NEXT: v_cvt_f32_f16_e32 v34, v08483; SI-NEXT: ; implicit-def: $vgpr08484; SI-NEXT: ; implicit-def: $vgpr28485; SI-NEXT: ; implicit-def: $vgpr48486; SI-NEXT: ; implicit-def: $vgpr68487; SI-NEXT: ; implicit-def: $vgpr88488; SI-NEXT: ; implicit-def: $vgpr108489; SI-NEXT: .LBB44_2: ; %Flow8490; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]8491; SI-NEXT: s_cbranch_execz .LBB44_48492; SI-NEXT: ; %bb.3: ; %cmp.true8493; SI-NEXT: v_add_f64 v[0:1], v[0:1], 1.08494; SI-NEXT: v_add_f64 v[2:3], v[2:3], 1.08495; SI-NEXT: v_add_f64 v[4:5], v[4:5], 1.08496; SI-NEXT: v_add_f64 v[6:7], v[6:7], 1.08497; SI-NEXT: v_add_f64 v[8:9], v[8:9], 1.08498; SI-NEXT: v_add_f64 v[10:11], v[10:11], 1.08499; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v08500; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v18501; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v28502; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v38503; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v48504; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v58505; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v68506; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v78507; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v88508; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v98509; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v108510; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v118511; SI-NEXT: v_cvt_f32_f16_e32 v22, v118512; SI-NEXT: v_cvt_f32_f16_e32 v20, v108513; SI-NEXT: v_cvt_f32_f16_e32 v18, v98514; SI-NEXT: v_cvt_f32_f16_e32 v16, v88515; SI-NEXT: v_cvt_f32_f16_e32 v14, v78516; SI-NEXT: v_cvt_f32_f16_e32 v12, v68517; SI-NEXT: v_cvt_f32_f16_e32 v26, v58518; SI-NEXT: v_cvt_f32_f16_e32 v28, v48519; SI-NEXT: v_cvt_f32_f16_e32 v30, v38520; SI-NEXT: v_cvt_f32_f16_e32 v31, v28521; SI-NEXT: v_cvt_f32_f16_e32 v33, v18522; SI-NEXT: v_cvt_f32_f16_e32 v34, v08523; SI-NEXT: v_cvt_f32_f16_e32 v23, v238524; SI-NEXT: v_cvt_f32_f16_e32 v21, v218525; SI-NEXT: v_cvt_f32_f16_e32 v19, v198526; SI-NEXT: v_cvt_f32_f16_e32 v17, v178527; SI-NEXT: v_cvt_f32_f16_e32 v15, v158528; SI-NEXT: v_cvt_f32_f16_e32 v13, v138529; SI-NEXT: v_cvt_f32_f16_e32 v25, v258530; SI-NEXT: v_cvt_f32_f16_e32 v24, v248531; SI-NEXT: v_cvt_f32_f16_e32 v27, v278532; SI-NEXT: v_cvt_f32_f16_e32 v29, v298533; SI-NEXT: v_cvt_f32_f16_e32 v32, v328534; SI-NEXT: v_cvt_f32_f16_e32 v35, v358535; SI-NEXT: .LBB44_4: ; %end8536; SI-NEXT: s_or_b64 exec, exec, s[4:5]8537; SI-NEXT: v_mov_b32_e32 v0, v348538; SI-NEXT: v_mov_b32_e32 v1, v358539; SI-NEXT: v_mov_b32_e32 v2, v338540; SI-NEXT: v_mov_b32_e32 v3, v328541; SI-NEXT: v_mov_b32_e32 v4, v318542; SI-NEXT: v_mov_b32_e32 v5, v298543; SI-NEXT: v_mov_b32_e32 v6, v308544; SI-NEXT: v_mov_b32_e32 v7, v278545; SI-NEXT: v_mov_b32_e32 v8, v288546; SI-NEXT: v_mov_b32_e32 v9, v248547; SI-NEXT: v_mov_b32_e32 v10, v268548; SI-NEXT: v_mov_b32_e32 v11, v258549; SI-NEXT: s_setpc_b64 s[30:31]8550;8551; VI-LABEL: bitcast_v6f64_to_v24f16:8552; VI: ; %bb.0:8553; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8554; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v128555; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc8556; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]8557; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]8558; VI-NEXT: s_cbranch_execz .LBB44_28559; VI-NEXT: ; %bb.1: ; %cmp.true8560; VI-NEXT: v_add_f64 v[10:11], v[10:11], 1.08561; VI-NEXT: v_add_f64 v[8:9], v[8:9], 1.08562; VI-NEXT: v_add_f64 v[6:7], v[6:7], 1.08563; VI-NEXT: v_add_f64 v[4:5], v[4:5], 1.08564; VI-NEXT: v_add_f64 v[2:3], v[2:3], 1.08565; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.08566; VI-NEXT: .LBB44_2: ; %end8567; VI-NEXT: s_or_b64 exec, exec, s[4:5]8568; VI-NEXT: s_setpc_b64 s[30:31]8569;8570; GFX9-LABEL: bitcast_v6f64_to_v24f16:8571; GFX9: ; %bb.0:8572; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8573; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v128574; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc8575; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]8576; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]8577; GFX9-NEXT: s_cbranch_execz .LBB44_28578; GFX9-NEXT: ; %bb.1: ; %cmp.true8579; GFX9-NEXT: v_add_f64 v[10:11], v[10:11], 1.08580; GFX9-NEXT: v_add_f64 v[8:9], v[8:9], 1.08581; GFX9-NEXT: v_add_f64 v[6:7], v[6:7], 1.08582; GFX9-NEXT: v_add_f64 v[4:5], v[4:5], 1.08583; GFX9-NEXT: v_add_f64 v[2:3], v[2:3], 1.08584; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.08585; GFX9-NEXT: .LBB44_2: ; %end8586; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]8587; GFX9-NEXT: s_setpc_b64 s[30:31]8588;8589; GFX11-LABEL: bitcast_v6f64_to_v24f16:8590; GFX11: ; %bb.0:8591; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8592; GFX11-NEXT: s_mov_b32 s0, exec_lo8593; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v128594; GFX11-NEXT: s_xor_b32 s0, exec_lo, s08595; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)8596; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s08597; GFX11-NEXT: s_cbranch_execz .LBB44_28598; GFX11-NEXT: ; %bb.1: ; %cmp.true8599; GFX11-NEXT: v_add_f64 v[10:11], v[10:11], 1.08600; GFX11-NEXT: v_add_f64 v[8:9], v[8:9], 1.08601; GFX11-NEXT: v_add_f64 v[6:7], v[6:7], 1.08602; GFX11-NEXT: v_add_f64 v[4:5], v[4:5], 1.08603; GFX11-NEXT: v_add_f64 v[2:3], v[2:3], 1.08604; GFX11-NEXT: v_add_f64 v[0:1], v[0:1], 1.08605; GFX11-NEXT: .LBB44_2: ; %end8606; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s08607; GFX11-NEXT: s_setpc_b64 s[30:31]8608 %cmp = icmp eq i32 %b, 08609 br i1 %cmp, label %cmp.true, label %cmp.false8610 8611cmp.true:8612 %a1 = fadd <6 x double> %a, splat (double 1.000000e+00)8613 %a2 = bitcast <6 x double> %a1 to <24 x half>8614 br label %end8615 8616cmp.false:8617 %a3 = bitcast <6 x double> %a to <24 x half>8618 br label %end8619 8620end:8621 %phi = phi <24 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]8622 ret <24 x half> %phi8623}8624 8625define inreg <24 x half> @bitcast_v6f64_to_v24f16_scalar(<6 x double> inreg %a, i32 inreg %b) {8626; SI-LABEL: bitcast_v6f64_to_v24f16_scalar:8627; SI: ; %bb.0:8628; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8629; SI-NEXT: s_cmp_lg_u32 s28, 08630; SI-NEXT: s_cbranch_scc0 .LBB45_48631; SI-NEXT: ; %bb.1: ; %cmp.false8632; SI-NEXT: s_lshr_b32 s4, s27, 168633; SI-NEXT: v_cvt_f32_f16_e32 v23, s48634; SI-NEXT: s_lshr_b32 s4, s26, 168635; SI-NEXT: v_cvt_f32_f16_e32 v21, s48636; SI-NEXT: s_lshr_b32 s4, s25, 168637; SI-NEXT: v_cvt_f32_f16_e32 v19, s48638; SI-NEXT: s_lshr_b32 s4, s24, 168639; SI-NEXT: v_cvt_f32_f16_e32 v17, s48640; SI-NEXT: s_lshr_b32 s4, s23, 168641; SI-NEXT: v_cvt_f32_f16_e32 v15, s48642; SI-NEXT: s_lshr_b32 s4, s22, 168643; SI-NEXT: v_cvt_f32_f16_e32 v13, s48644; SI-NEXT: s_lshr_b32 s4, s21, 168645; SI-NEXT: v_cvt_f32_f16_e32 v11, s48646; SI-NEXT: s_lshr_b32 s4, s20, 168647; SI-NEXT: v_cvt_f32_f16_e32 v9, s48648; SI-NEXT: s_lshr_b32 s4, s19, 168649; SI-NEXT: v_cvt_f32_f16_e32 v7, s48650; SI-NEXT: s_lshr_b32 s4, s18, 168651; SI-NEXT: v_cvt_f32_f16_e32 v5, s48652; SI-NEXT: s_lshr_b32 s4, s17, 168653; SI-NEXT: v_cvt_f32_f16_e32 v3, s48654; SI-NEXT: s_lshr_b32 s4, s16, 168655; SI-NEXT: v_cvt_f32_f16_e32 v1, s48656; SI-NEXT: v_cvt_f32_f16_e32 v22, s278657; SI-NEXT: v_cvt_f32_f16_e32 v20, s268658; SI-NEXT: v_cvt_f32_f16_e32 v18, s258659; SI-NEXT: v_cvt_f32_f16_e32 v16, s248660; SI-NEXT: v_cvt_f32_f16_e32 v14, s238661; SI-NEXT: v_cvt_f32_f16_e32 v12, s228662; SI-NEXT: v_cvt_f32_f16_e32 v10, s218663; SI-NEXT: v_cvt_f32_f16_e32 v8, s208664; SI-NEXT: v_cvt_f32_f16_e32 v6, s198665; SI-NEXT: v_cvt_f32_f16_e32 v4, s188666; SI-NEXT: v_cvt_f32_f16_e32 v2, s178667; SI-NEXT: v_cvt_f32_f16_e32 v0, s168668; SI-NEXT: s_cbranch_execnz .LBB45_38669; SI-NEXT: .LBB45_2: ; %cmp.true8670; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.08671; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.08672; SI-NEXT: v_add_f64 v[4:5], s[20:21], 1.08673; SI-NEXT: v_add_f64 v[6:7], s[22:23], 1.08674; SI-NEXT: v_add_f64 v[8:9], s[24:25], 1.08675; SI-NEXT: v_add_f64 v[10:11], s[26:27], 1.08676; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v08677; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v28678; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v38679; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v48680; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v58681; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v68682; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v78683; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v88684; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v98685; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v108686; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v118687; SI-NEXT: v_cvt_f32_f16_e32 v12, v68688; SI-NEXT: v_cvt_f32_f16_e32 v6, v38689; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v18690; SI-NEXT: v_cvt_f32_f16_e32 v22, v118691; SI-NEXT: v_cvt_f32_f16_e32 v20, v108692; SI-NEXT: v_cvt_f32_f16_e32 v18, v98693; SI-NEXT: v_cvt_f32_f16_e32 v16, v88694; SI-NEXT: v_cvt_f32_f16_e32 v14, v78695; SI-NEXT: v_cvt_f32_f16_e32 v10, v58696; SI-NEXT: v_cvt_f32_f16_e32 v8, v48697; SI-NEXT: v_cvt_f32_f16_e32 v4, v28698; SI-NEXT: v_cvt_f32_f16_e32 v2, v18699; SI-NEXT: v_cvt_f32_f16_e32 v0, v08700; SI-NEXT: v_cvt_f32_f16_e32 v23, v238701; SI-NEXT: v_cvt_f32_f16_e32 v21, v218702; SI-NEXT: v_cvt_f32_f16_e32 v19, v198703; SI-NEXT: v_cvt_f32_f16_e32 v17, v178704; SI-NEXT: v_cvt_f32_f16_e32 v15, v158705; SI-NEXT: v_cvt_f32_f16_e32 v13, v138706; SI-NEXT: v_cvt_f32_f16_e32 v11, v288707; SI-NEXT: v_cvt_f32_f16_e32 v9, v278708; SI-NEXT: v_cvt_f32_f16_e32 v7, v268709; SI-NEXT: v_cvt_f32_f16_e32 v5, v258710; SI-NEXT: v_cvt_f32_f16_e32 v3, v38711; SI-NEXT: v_cvt_f32_f16_e32 v1, v248712; SI-NEXT: .LBB45_3: ; %end8713; SI-NEXT: s_setpc_b64 s[30:31]8714; SI-NEXT: .LBB45_4:8715; SI-NEXT: ; implicit-def: $vgpr08716; SI-NEXT: ; implicit-def: $vgpr18717; SI-NEXT: ; implicit-def: $vgpr28718; SI-NEXT: ; implicit-def: $vgpr38719; SI-NEXT: ; implicit-def: $vgpr48720; SI-NEXT: ; implicit-def: $vgpr58721; SI-NEXT: ; implicit-def: $vgpr68722; SI-NEXT: ; implicit-def: $vgpr78723; SI-NEXT: ; implicit-def: $vgpr88724; SI-NEXT: ; implicit-def: $vgpr98725; SI-NEXT: ; implicit-def: $vgpr108726; SI-NEXT: ; implicit-def: $vgpr118727; SI-NEXT: ; implicit-def: $vgpr128728; SI-NEXT: ; implicit-def: $vgpr138729; SI-NEXT: ; implicit-def: $vgpr148730; SI-NEXT: ; implicit-def: $vgpr158731; SI-NEXT: ; implicit-def: $vgpr168732; SI-NEXT: ; implicit-def: $vgpr178733; SI-NEXT: ; implicit-def: $vgpr188734; SI-NEXT: ; implicit-def: $vgpr198735; SI-NEXT: ; implicit-def: $vgpr208736; SI-NEXT: ; implicit-def: $vgpr218737; SI-NEXT: ; implicit-def: $vgpr228738; SI-NEXT: ; implicit-def: $vgpr238739; SI-NEXT: s_branch .LBB45_28740;8741; VI-LABEL: bitcast_v6f64_to_v24f16_scalar:8742; VI: ; %bb.0:8743; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8744; VI-NEXT: s_cmp_lg_u32 s28, 08745; VI-NEXT: s_cbranch_scc0 .LBB45_38746; VI-NEXT: ; %bb.1: ; %cmp.false8747; VI-NEXT: s_cbranch_execnz .LBB45_48748; VI-NEXT: .LBB45_2: ; %cmp.true8749; VI-NEXT: v_add_f64 v[10:11], s[26:27], 1.08750; VI-NEXT: v_add_f64 v[8:9], s[24:25], 1.08751; VI-NEXT: v_add_f64 v[6:7], s[22:23], 1.08752; VI-NEXT: v_add_f64 v[4:5], s[20:21], 1.08753; VI-NEXT: v_add_f64 v[2:3], s[18:19], 1.08754; VI-NEXT: v_add_f64 v[0:1], s[16:17], 1.08755; VI-NEXT: s_setpc_b64 s[30:31]8756; VI-NEXT: .LBB45_3:8757; VI-NEXT: s_branch .LBB45_28758; VI-NEXT: .LBB45_4:8759; VI-NEXT: v_mov_b32_e32 v0, s168760; VI-NEXT: v_mov_b32_e32 v1, s178761; VI-NEXT: v_mov_b32_e32 v2, s188762; VI-NEXT: v_mov_b32_e32 v3, s198763; VI-NEXT: v_mov_b32_e32 v4, s208764; VI-NEXT: v_mov_b32_e32 v5, s218765; VI-NEXT: v_mov_b32_e32 v6, s228766; VI-NEXT: v_mov_b32_e32 v7, s238767; VI-NEXT: v_mov_b32_e32 v8, s248768; VI-NEXT: v_mov_b32_e32 v9, s258769; VI-NEXT: v_mov_b32_e32 v10, s268770; VI-NEXT: v_mov_b32_e32 v11, s278771; VI-NEXT: v_mov_b32_e32 v12, s288772; VI-NEXT: v_mov_b32_e32 v13, s298773; VI-NEXT: v_mov_b32_e32 v14, s308774; VI-NEXT: v_mov_b32_e32 v15, s318775; VI-NEXT: s_setpc_b64 s[30:31]8776;8777; GFX9-LABEL: bitcast_v6f64_to_v24f16_scalar:8778; GFX9: ; %bb.0:8779; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8780; GFX9-NEXT: s_cmp_lg_u32 s28, 08781; GFX9-NEXT: s_cbranch_scc0 .LBB45_38782; GFX9-NEXT: ; %bb.1: ; %cmp.false8783; GFX9-NEXT: s_cbranch_execnz .LBB45_48784; GFX9-NEXT: .LBB45_2: ; %cmp.true8785; GFX9-NEXT: v_add_f64 v[10:11], s[26:27], 1.08786; GFX9-NEXT: v_add_f64 v[8:9], s[24:25], 1.08787; GFX9-NEXT: v_add_f64 v[6:7], s[22:23], 1.08788; GFX9-NEXT: v_add_f64 v[4:5], s[20:21], 1.08789; GFX9-NEXT: v_add_f64 v[2:3], s[18:19], 1.08790; GFX9-NEXT: v_add_f64 v[0:1], s[16:17], 1.08791; GFX9-NEXT: s_setpc_b64 s[30:31]8792; GFX9-NEXT: .LBB45_3:8793; GFX9-NEXT: s_branch .LBB45_28794; GFX9-NEXT: .LBB45_4:8795; GFX9-NEXT: v_mov_b32_e32 v0, s168796; GFX9-NEXT: v_mov_b32_e32 v1, s178797; GFX9-NEXT: v_mov_b32_e32 v2, s188798; GFX9-NEXT: v_mov_b32_e32 v3, s198799; GFX9-NEXT: v_mov_b32_e32 v4, s208800; GFX9-NEXT: v_mov_b32_e32 v5, s218801; GFX9-NEXT: v_mov_b32_e32 v6, s228802; GFX9-NEXT: v_mov_b32_e32 v7, s238803; GFX9-NEXT: v_mov_b32_e32 v8, s248804; GFX9-NEXT: v_mov_b32_e32 v9, s258805; GFX9-NEXT: v_mov_b32_e32 v10, s268806; GFX9-NEXT: v_mov_b32_e32 v11, s278807; GFX9-NEXT: v_mov_b32_e32 v12, s288808; GFX9-NEXT: v_mov_b32_e32 v13, s298809; GFX9-NEXT: v_mov_b32_e32 v14, s308810; GFX9-NEXT: v_mov_b32_e32 v15, s318811; GFX9-NEXT: s_setpc_b64 s[30:31]8812;8813; GFX11-LABEL: bitcast_v6f64_to_v24f16_scalar:8814; GFX11: ; %bb.0:8815; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8816; GFX11-NEXT: s_mov_b32 s15, s38817; GFX11-NEXT: s_mov_b32 s14, s28818; GFX11-NEXT: s_mov_b32 s13, s18819; GFX11-NEXT: s_mov_b32 s12, s08820; GFX11-NEXT: s_cmp_lg_u32 s24, 08821; GFX11-NEXT: s_mov_b32 s0, 08822; GFX11-NEXT: s_cbranch_scc0 .LBB45_38823; GFX11-NEXT: ; %bb.1: ; %Flow8824; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s08825; GFX11-NEXT: s_cbranch_vccnz .LBB45_48826; GFX11-NEXT: .LBB45_2: ; %cmp.true8827; GFX11-NEXT: v_add_f64 v[10:11], s[22:23], 1.08828; GFX11-NEXT: v_add_f64 v[8:9], s[20:21], 1.08829; GFX11-NEXT: v_add_f64 v[6:7], s[18:19], 1.08830; GFX11-NEXT: v_add_f64 v[4:5], s[16:17], 1.08831; GFX11-NEXT: v_add_f64 v[2:3], s[14:15], 1.08832; GFX11-NEXT: v_add_f64 v[0:1], s[12:13], 1.08833; GFX11-NEXT: s_setpc_b64 s[30:31]8834; GFX11-NEXT: .LBB45_3:8835; GFX11-NEXT: s_branch .LBB45_28836; GFX11-NEXT: .LBB45_4:8837; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s138838; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s158839; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s178840; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s198841; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s218842; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s238843; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s258844; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s278845; GFX11-NEXT: s_setpc_b64 s[30:31]8846 %cmp = icmp eq i32 %b, 08847 br i1 %cmp, label %cmp.true, label %cmp.false8848 8849cmp.true:8850 %a1 = fadd <6 x double> %a, splat (double 1.000000e+00)8851 %a2 = bitcast <6 x double> %a1 to <24 x half>8852 br label %end8853 8854cmp.false:8855 %a3 = bitcast <6 x double> %a to <24 x half>8856 br label %end8857 8858end:8859 %phi = phi <24 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]8860 ret <24 x half> %phi8861}8862 8863define <6 x double> @bitcast_v24f16_to_v6f64(<24 x half> %a, i32 %b) {8864; SI-LABEL: bitcast_v24f16_to_v6f64:8865; SI: ; %bb.0:8866; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8867; SI-NEXT: v_cvt_f16_f32_e32 v52, v18868; SI-NEXT: v_cvt_f16_f32_e32 v51, v08869; SI-NEXT: v_cvt_f16_f32_e32 v50, v38870; SI-NEXT: v_cvt_f16_f32_e32 v49, v28871; SI-NEXT: v_cvt_f16_f32_e32 v48, v58872; SI-NEXT: v_cvt_f16_f32_e32 v39, v48873; SI-NEXT: v_cvt_f16_f32_e32 v38, v78874; SI-NEXT: v_cvt_f16_f32_e32 v37, v68875; SI-NEXT: v_cvt_f16_f32_e32 v36, v98876; SI-NEXT: v_cvt_f16_f32_e32 v35, v88877; SI-NEXT: v_cvt_f16_f32_e32 v34, v118878; SI-NEXT: v_cvt_f16_f32_e32 v33, v108879; SI-NEXT: v_cvt_f16_f32_e32 v32, v138880; SI-NEXT: v_cvt_f16_f32_e32 v31, v128881; SI-NEXT: v_cvt_f16_f32_e32 v30, v158882; SI-NEXT: v_cvt_f16_f32_e32 v29, v148883; SI-NEXT: v_cvt_f16_f32_e32 v28, v178884; SI-NEXT: v_cvt_f16_f32_e32 v27, v168885; SI-NEXT: v_cvt_f16_f32_e32 v26, v198886; SI-NEXT: v_cvt_f16_f32_e32 v25, v188887; SI-NEXT: v_cvt_f16_f32_e32 v19, v218888; SI-NEXT: v_cvt_f16_f32_e32 v18, v208889; SI-NEXT: v_cvt_f16_f32_e32 v17, v238890; SI-NEXT: v_cvt_f16_f32_e32 v16, v228891; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v248892; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr158893; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc8894; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]8895; SI-NEXT: s_cbranch_execnz .LBB46_38896; SI-NEXT: ; %bb.1: ; %Flow8897; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]8898; SI-NEXT: s_cbranch_execnz .LBB46_48899; SI-NEXT: .LBB46_2: ; %end8900; SI-NEXT: s_or_b64 exec, exec, s[4:5]8901; SI-NEXT: s_setpc_b64 s[30:31]8902; SI-NEXT: .LBB46_3: ; %cmp.false8903; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v528904; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v508905; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v488906; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v388907; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v368908; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v348909; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v328910; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v308911; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v288912; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v268913; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v198914; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v178915; SI-NEXT: v_or_b32_e32 v0, v51, v08916; SI-NEXT: v_or_b32_e32 v1, v49, v18917; SI-NEXT: v_or_b32_e32 v2, v39, v28918; SI-NEXT: v_or_b32_e32 v3, v37, v38919; SI-NEXT: v_or_b32_e32 v4, v35, v48920; SI-NEXT: v_or_b32_e32 v5, v33, v58921; SI-NEXT: v_or_b32_e32 v6, v31, v68922; SI-NEXT: v_or_b32_e32 v7, v29, v78923; SI-NEXT: v_or_b32_e32 v8, v27, v88924; SI-NEXT: v_or_b32_e32 v9, v25, v98925; SI-NEXT: v_or_b32_e32 v10, v18, v108926; SI-NEXT: v_or_b32_e32 v11, v16, v118927; SI-NEXT: ; implicit-def: $vgpr528928; SI-NEXT: ; implicit-def: $vgpr518929; SI-NEXT: ; implicit-def: $vgpr508930; SI-NEXT: ; implicit-def: $vgpr498931; SI-NEXT: ; implicit-def: $vgpr488932; SI-NEXT: ; implicit-def: $vgpr398933; SI-NEXT: ; implicit-def: $vgpr388934; SI-NEXT: ; implicit-def: $vgpr378935; SI-NEXT: ; implicit-def: $vgpr368936; SI-NEXT: ; implicit-def: $vgpr358937; SI-NEXT: ; implicit-def: $vgpr348938; SI-NEXT: ; implicit-def: $vgpr338939; SI-NEXT: ; implicit-def: $vgpr328940; SI-NEXT: ; implicit-def: $vgpr318941; SI-NEXT: ; implicit-def: $vgpr308942; SI-NEXT: ; implicit-def: $vgpr298943; SI-NEXT: ; implicit-def: $vgpr288944; SI-NEXT: ; implicit-def: $vgpr278945; SI-NEXT: ; implicit-def: $vgpr268946; SI-NEXT: ; implicit-def: $vgpr258947; SI-NEXT: ; implicit-def: $vgpr198948; SI-NEXT: ; implicit-def: $vgpr188949; SI-NEXT: ; implicit-def: $vgpr178950; SI-NEXT: ; implicit-def: $vgpr168951; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]8952; SI-NEXT: s_cbranch_execz .LBB46_28953; SI-NEXT: .LBB46_4: ; %cmp.true8954; SI-NEXT: v_cvt_f32_f16_e32 v0, v528955; SI-NEXT: v_cvt_f32_f16_e32 v2, v508956; SI-NEXT: v_cvt_f32_f16_e32 v1, v518957; SI-NEXT: v_cvt_f32_f16_e32 v3, v498958; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v08959; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v28960; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v18961; SI-NEXT: v_cvt_f16_f32_e32 v0, v08962; SI-NEXT: v_cvt_f16_f32_e32 v2, v28963; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v38964; SI-NEXT: v_cvt_f16_f32_e32 v1, v18965; SI-NEXT: v_cvt_f16_f32_e32 v3, v38966; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v08967; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v28968; SI-NEXT: v_or_b32_e32 v0, v1, v08969; SI-NEXT: v_or_b32_e32 v1, v3, v28970; SI-NEXT: v_cvt_f32_f16_e32 v2, v488971; SI-NEXT: v_cvt_f32_f16_e32 v3, v398972; SI-NEXT: v_cvt_f32_f16_e32 v4, v388973; SI-NEXT: v_cvt_f32_f16_e32 v5, v378974; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v28975; SI-NEXT: v_cvt_f16_f32_e32 v2, v28976; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v38977; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v48978; SI-NEXT: v_cvt_f16_f32_e32 v3, v38979; SI-NEXT: v_cvt_f16_f32_e32 v4, v48980; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v58981; SI-NEXT: v_cvt_f16_f32_e32 v5, v58982; SI-NEXT: v_cvt_f32_f16_e32 v6, v368983; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v28984; SI-NEXT: v_or_b32_e32 v2, v3, v28985; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48986; SI-NEXT: v_or_b32_e32 v3, v5, v38987; SI-NEXT: v_cvt_f32_f16_e32 v4, v358988; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v68989; SI-NEXT: v_cvt_f32_f16_e32 v6, v348990; SI-NEXT: v_cvt_f16_f32_e32 v5, v58991; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v48992; SI-NEXT: v_cvt_f16_f32_e32 v4, v48993; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v68994; SI-NEXT: v_cvt_f16_f32_e32 v6, v68995; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v58996; SI-NEXT: v_cvt_f32_f16_e32 v7, v338997; SI-NEXT: v_or_b32_e32 v4, v4, v58998; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v68999; SI-NEXT: v_cvt_f32_f16_e32 v6, v329000; SI-NEXT: v_cvt_f32_f16_e32 v8, v319001; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v79002; SI-NEXT: v_cvt_f16_f32_e32 v7, v79003; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v69004; SI-NEXT: v_cvt_f16_f32_e32 v6, v69005; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v89006; SI-NEXT: v_cvt_f16_f32_e32 v8, v89007; SI-NEXT: v_or_b32_e32 v5, v7, v59008; SI-NEXT: v_cvt_f32_f16_e32 v7, v309009; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v69010; SI-NEXT: v_or_b32_e32 v6, v8, v69011; SI-NEXT: v_cvt_f32_f16_e32 v8, v299012; SI-NEXT: v_cvt_f32_f16_e32 v9, v289013; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v79014; SI-NEXT: v_cvt_f16_f32_e32 v7, v79015; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v89016; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v99017; SI-NEXT: v_cvt_f16_f32_e32 v8, v89018; SI-NEXT: v_cvt_f16_f32_e32 v9, v99019; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v79020; SI-NEXT: v_cvt_f32_f16_e32 v10, v279021; SI-NEXT: v_or_b32_e32 v7, v8, v79022; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v99023; SI-NEXT: v_cvt_f32_f16_e32 v9, v269024; SI-NEXT: v_cvt_f32_f16_e32 v11, v259025; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v109026; SI-NEXT: v_cvt_f16_f32_e32 v10, v109027; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v99028; SI-NEXT: v_cvt_f16_f32_e32 v9, v99029; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v119030; SI-NEXT: v_cvt_f16_f32_e32 v11, v119031; SI-NEXT: v_or_b32_e32 v8, v10, v89032; SI-NEXT: v_cvt_f32_f16_e32 v10, v199033; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v99034; SI-NEXT: v_or_b32_e32 v9, v11, v99035; SI-NEXT: v_cvt_f32_f16_e32 v11, v189036; SI-NEXT: v_cvt_f32_f16_e32 v12, v179037; SI-NEXT: v_cvt_f32_f16_e32 v13, v169038; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v109039; SI-NEXT: v_cvt_f16_f32_e32 v10, v109040; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v119041; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v129042; SI-NEXT: v_cvt_f16_f32_e32 v11, v119043; SI-NEXT: v_cvt_f16_f32_e32 v12, v129044; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v139045; SI-NEXT: v_cvt_f16_f32_e32 v13, v139046; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v109047; SI-NEXT: v_or_b32_e32 v10, v11, v109048; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v129049; SI-NEXT: v_or_b32_e32 v11, v13, v119050; SI-NEXT: s_or_b64 exec, exec, s[4:5]9051; SI-NEXT: s_setpc_b64 s[30:31]9052;9053; VI-LABEL: bitcast_v24f16_to_v6f64:9054; VI: ; %bb.0:9055; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9056; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v129057; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc9058; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]9059; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]9060; VI-NEXT: s_cbranch_execz .LBB46_29061; VI-NEXT: ; %bb.1: ; %cmp.true9062; VI-NEXT: v_mov_b32_e32 v12, 0x2009063; VI-NEXT: v_add_f16_sdwa v13, v11, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9064; VI-NEXT: v_add_f16_e32 v11, 0x200, v119065; VI-NEXT: v_or_b32_e32 v11, v11, v139066; VI-NEXT: v_add_f16_sdwa v13, v10, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9067; VI-NEXT: v_add_f16_e32 v10, 0x200, v109068; VI-NEXT: v_or_b32_e32 v10, v10, v139069; VI-NEXT: v_add_f16_sdwa v13, v9, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9070; VI-NEXT: v_add_f16_e32 v9, 0x200, v99071; VI-NEXT: v_or_b32_e32 v9, v9, v139072; VI-NEXT: v_add_f16_sdwa v13, v8, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9073; VI-NEXT: v_add_f16_e32 v8, 0x200, v89074; VI-NEXT: v_or_b32_e32 v8, v8, v139075; VI-NEXT: v_add_f16_sdwa v13, v7, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9076; VI-NEXT: v_add_f16_e32 v7, 0x200, v79077; VI-NEXT: v_or_b32_e32 v7, v7, v139078; VI-NEXT: v_add_f16_sdwa v13, v6, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9079; VI-NEXT: v_add_f16_e32 v6, 0x200, v69080; VI-NEXT: v_or_b32_e32 v6, v6, v139081; VI-NEXT: v_add_f16_sdwa v13, v5, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9082; VI-NEXT: v_add_f16_e32 v5, 0x200, v59083; VI-NEXT: v_or_b32_e32 v5, v5, v139084; VI-NEXT: v_add_f16_sdwa v13, v4, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9085; VI-NEXT: v_add_f16_e32 v4, 0x200, v49086; VI-NEXT: v_or_b32_e32 v4, v4, v139087; VI-NEXT: v_add_f16_sdwa v13, v3, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9088; VI-NEXT: v_add_f16_e32 v3, 0x200, v39089; VI-NEXT: v_or_b32_e32 v3, v3, v139090; VI-NEXT: v_add_f16_sdwa v13, v2, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9091; VI-NEXT: v_add_f16_e32 v2, 0x200, v29092; VI-NEXT: v_or_b32_e32 v2, v2, v139093; VI-NEXT: v_add_f16_sdwa v13, v1, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9094; VI-NEXT: v_add_f16_e32 v1, 0x200, v19095; VI-NEXT: v_add_f16_sdwa v12, v0, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9096; VI-NEXT: v_add_f16_e32 v0, 0x200, v09097; VI-NEXT: v_or_b32_e32 v1, v1, v139098; VI-NEXT: v_or_b32_e32 v0, v0, v129099; VI-NEXT: .LBB46_2: ; %end9100; VI-NEXT: s_or_b64 exec, exec, s[4:5]9101; VI-NEXT: s_setpc_b64 s[30:31]9102;9103; GFX9-LABEL: bitcast_v24f16_to_v6f64:9104; GFX9: ; %bb.0:9105; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9106; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v129107; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc9108; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]9109; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]9110; GFX9-NEXT: s_cbranch_execz .LBB46_29111; GFX9-NEXT: ; %bb.1: ; %cmp.true9112; GFX9-NEXT: s_movk_i32 s6, 0x2009113; GFX9-NEXT: v_pk_add_f16 v11, v11, s6 op_sel_hi:[1,0]9114; GFX9-NEXT: v_pk_add_f16 v10, v10, s6 op_sel_hi:[1,0]9115; GFX9-NEXT: v_pk_add_f16 v9, v9, s6 op_sel_hi:[1,0]9116; GFX9-NEXT: v_pk_add_f16 v8, v8, s6 op_sel_hi:[1,0]9117; GFX9-NEXT: v_pk_add_f16 v7, v7, s6 op_sel_hi:[1,0]9118; GFX9-NEXT: v_pk_add_f16 v6, v6, s6 op_sel_hi:[1,0]9119; GFX9-NEXT: v_pk_add_f16 v5, v5, s6 op_sel_hi:[1,0]9120; GFX9-NEXT: v_pk_add_f16 v4, v4, s6 op_sel_hi:[1,0]9121; GFX9-NEXT: v_pk_add_f16 v3, v3, s6 op_sel_hi:[1,0]9122; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0]9123; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0]9124; GFX9-NEXT: v_pk_add_f16 v0, v0, s6 op_sel_hi:[1,0]9125; GFX9-NEXT: .LBB46_2: ; %end9126; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]9127; GFX9-NEXT: s_setpc_b64 s[30:31]9128;9129; GFX11-LABEL: bitcast_v24f16_to_v6f64:9130; GFX11: ; %bb.0:9131; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9132; GFX11-NEXT: s_mov_b32 s0, exec_lo9133; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v129134; GFX11-NEXT: s_xor_b32 s0, exec_lo, s09135; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)9136; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s09137; GFX11-NEXT: s_cbranch_execz .LBB46_29138; GFX11-NEXT: ; %bb.1: ; %cmp.true9139; GFX11-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]9140; GFX11-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]9141; GFX11-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]9142; GFX11-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]9143; GFX11-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]9144; GFX11-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]9145; GFX11-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]9146; GFX11-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]9147; GFX11-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]9148; GFX11-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]9149; GFX11-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]9150; GFX11-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]9151; GFX11-NEXT: .LBB46_2: ; %end9152; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s09153; GFX11-NEXT: s_setpc_b64 s[30:31]9154 %cmp = icmp eq i32 %b, 09155 br i1 %cmp, label %cmp.true, label %cmp.false9156 9157cmp.true:9158 %a1 = fadd <24 x half> %a, splat (half 0xH0200)9159 %a2 = bitcast <24 x half> %a1 to <6 x double>9160 br label %end9161 9162cmp.false:9163 %a3 = bitcast <24 x half> %a to <6 x double>9164 br label %end9165 9166end:9167 %phi = phi <6 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]9168 ret <6 x double> %phi9169}9170 9171define inreg <6 x double> @bitcast_v24f16_to_v6f64_scalar(<24 x half> inreg %a, i32 inreg %b) {9172; SI-LABEL: bitcast_v24f16_to_v6f64_scalar:9173; SI: ; %bb.0:9174; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9175; SI-NEXT: v_cvt_f16_f32_e32 v39, s179176; SI-NEXT: v_cvt_f16_f32_e32 v38, s169177; SI-NEXT: v_cvt_f16_f32_e32 v37, s199178; SI-NEXT: v_cvt_f16_f32_e32 v36, s189179; SI-NEXT: v_cvt_f16_f32_e32 v35, s219180; SI-NEXT: v_cvt_f16_f32_e32 v34, s209181; SI-NEXT: v_cvt_f16_f32_e32 v33, s239182; SI-NEXT: v_cvt_f16_f32_e32 v32, s229183; SI-NEXT: v_cvt_f16_f32_e32 v30, s259184; SI-NEXT: v_cvt_f16_f32_e32 v28, s249185; SI-NEXT: v_cvt_f16_f32_e32 v25, v19186; SI-NEXT: v_cvt_f16_f32_e32 v24, v09187; SI-NEXT: v_cvt_f16_f32_e32 v23, v39188; SI-NEXT: v_cvt_f16_f32_e32 v22, v29189; SI-NEXT: v_cvt_f16_f32_e32 v21, v59190; SI-NEXT: v_cvt_f16_f32_e32 v20, v49191; SI-NEXT: v_cvt_f16_f32_e32 v19, v79192; SI-NEXT: v_cvt_f16_f32_e32 v18, v69193; SI-NEXT: v_cvt_f16_f32_e32 v17, v99194; SI-NEXT: v_cvt_f16_f32_e32 v16, v89195; SI-NEXT: v_cvt_f16_f32_e32 v31, s279196; SI-NEXT: v_cvt_f16_f32_e32 v29, s269197; SI-NEXT: v_cvt_f16_f32_e32 v27, s299198; SI-NEXT: v_cvt_f16_f32_e32 v26, s289199; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v109200; SI-NEXT: s_and_b64 s[4:5], vcc, exec9201; SI-NEXT: s_cbranch_scc0 .LBB47_49202; SI-NEXT: ; %bb.1: ; %cmp.false9203; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v399204; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v379205; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v359206; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v339207; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v309208; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v319209; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v279210; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v259211; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v239212; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v219213; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v199214; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v179215; SI-NEXT: v_or_b32_e32 v0, v38, v09216; SI-NEXT: v_or_b32_e32 v1, v36, v19217; SI-NEXT: v_or_b32_e32 v2, v34, v29218; SI-NEXT: v_or_b32_e32 v3, v32, v39219; SI-NEXT: v_or_b32_e32 v4, v28, v49220; SI-NEXT: v_or_b32_e32 v5, v29, v59221; SI-NEXT: v_or_b32_e32 v6, v26, v69222; SI-NEXT: v_or_b32_e32 v7, v24, v79223; SI-NEXT: v_or_b32_e32 v8, v22, v89224; SI-NEXT: v_or_b32_e32 v9, v20, v99225; SI-NEXT: v_or_b32_e32 v10, v18, v109226; SI-NEXT: v_or_b32_e32 v11, v16, v119227; SI-NEXT: s_cbranch_execnz .LBB47_39228; SI-NEXT: .LBB47_2: ; %cmp.true9229; SI-NEXT: v_cvt_f32_f16_e32 v0, v399230; SI-NEXT: v_cvt_f32_f16_e32 v2, v379231; SI-NEXT: v_cvt_f32_f16_e32 v1, v389232; SI-NEXT: v_cvt_f32_f16_e32 v3, v369233; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v09234; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v29235; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v19236; SI-NEXT: v_cvt_f16_f32_e32 v0, v09237; SI-NEXT: v_cvt_f16_f32_e32 v2, v29238; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v39239; SI-NEXT: v_cvt_f16_f32_e32 v1, v19240; SI-NEXT: v_cvt_f16_f32_e32 v3, v39241; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v09242; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v29243; SI-NEXT: v_or_b32_e32 v0, v1, v09244; SI-NEXT: v_or_b32_e32 v1, v3, v29245; SI-NEXT: v_cvt_f32_f16_e32 v2, v359246; SI-NEXT: v_cvt_f32_f16_e32 v3, v349247; SI-NEXT: v_cvt_f32_f16_e32 v4, v339248; SI-NEXT: v_cvt_f32_f16_e32 v5, v329249; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v29250; SI-NEXT: v_cvt_f16_f32_e32 v2, v29251; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v39252; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v49253; SI-NEXT: v_cvt_f16_f32_e32 v3, v39254; SI-NEXT: v_cvt_f16_f32_e32 v4, v49255; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v59256; SI-NEXT: v_cvt_f16_f32_e32 v5, v59257; SI-NEXT: v_cvt_f32_f16_e32 v6, v309258; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v29259; SI-NEXT: v_or_b32_e32 v2, v3, v29260; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v49261; SI-NEXT: v_or_b32_e32 v3, v5, v39262; SI-NEXT: v_cvt_f32_f16_e32 v4, v289263; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v69264; SI-NEXT: v_cvt_f32_f16_e32 v6, v319265; SI-NEXT: v_cvt_f16_f32_e32 v5, v59266; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v49267; SI-NEXT: v_cvt_f16_f32_e32 v4, v49268; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v69269; SI-NEXT: v_cvt_f16_f32_e32 v6, v69270; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v59271; SI-NEXT: v_cvt_f32_f16_e32 v7, v299272; SI-NEXT: v_or_b32_e32 v4, v4, v59273; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v69274; SI-NEXT: v_cvt_f32_f16_e32 v6, v279275; SI-NEXT: v_cvt_f32_f16_e32 v8, v269276; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v79277; SI-NEXT: v_cvt_f16_f32_e32 v7, v79278; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v69279; SI-NEXT: v_cvt_f16_f32_e32 v6, v69280; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v89281; SI-NEXT: v_cvt_f16_f32_e32 v8, v89282; SI-NEXT: v_or_b32_e32 v5, v7, v59283; SI-NEXT: v_cvt_f32_f16_e32 v7, v259284; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v69285; SI-NEXT: v_or_b32_e32 v6, v8, v69286; SI-NEXT: v_cvt_f32_f16_e32 v8, v249287; SI-NEXT: v_cvt_f32_f16_e32 v9, v239288; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v79289; SI-NEXT: v_cvt_f16_f32_e32 v7, v79290; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v89291; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v99292; SI-NEXT: v_cvt_f16_f32_e32 v8, v89293; SI-NEXT: v_cvt_f16_f32_e32 v9, v99294; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v79295; SI-NEXT: v_cvt_f32_f16_e32 v10, v229296; SI-NEXT: v_or_b32_e32 v7, v8, v79297; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v99298; SI-NEXT: v_cvt_f32_f16_e32 v9, v219299; SI-NEXT: v_cvt_f32_f16_e32 v11, v209300; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v109301; SI-NEXT: v_cvt_f16_f32_e32 v10, v109302; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v99303; SI-NEXT: v_cvt_f16_f32_e32 v9, v99304; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v119305; SI-NEXT: v_cvt_f16_f32_e32 v11, v119306; SI-NEXT: v_or_b32_e32 v8, v10, v89307; SI-NEXT: v_cvt_f32_f16_e32 v10, v199308; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v99309; SI-NEXT: v_or_b32_e32 v9, v11, v99310; SI-NEXT: v_cvt_f32_f16_e32 v11, v189311; SI-NEXT: v_cvt_f32_f16_e32 v12, v179312; SI-NEXT: v_cvt_f32_f16_e32 v13, v169313; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v109314; SI-NEXT: v_cvt_f16_f32_e32 v10, v109315; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v119316; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v129317; SI-NEXT: v_cvt_f16_f32_e32 v11, v119318; SI-NEXT: v_cvt_f16_f32_e32 v12, v129319; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v139320; SI-NEXT: v_cvt_f16_f32_e32 v13, v139321; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v109322; SI-NEXT: v_or_b32_e32 v10, v11, v109323; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v129324; SI-NEXT: v_or_b32_e32 v11, v13, v119325; SI-NEXT: .LBB47_3: ; %end9326; SI-NEXT: s_setpc_b64 s[30:31]9327; SI-NEXT: .LBB47_4:9328; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr159329; SI-NEXT: s_branch .LBB47_29330;9331; VI-LABEL: bitcast_v24f16_to_v6f64_scalar:9332; VI: ; %bb.0:9333; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9334; VI-NEXT: s_cmp_lg_u32 s28, 09335; VI-NEXT: s_cbranch_scc0 .LBB47_39336; VI-NEXT: ; %bb.1: ; %cmp.false9337; VI-NEXT: s_cbranch_execnz .LBB47_49338; VI-NEXT: .LBB47_2: ; %cmp.true9339; VI-NEXT: s_lshr_b32 s4, s27, 169340; VI-NEXT: v_mov_b32_e32 v0, 0x2009341; VI-NEXT: v_mov_b32_e32 v1, s49342; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD9343; VI-NEXT: v_add_f16_e32 v2, s27, v09344; VI-NEXT: s_lshr_b32 s4, s26, 169345; VI-NEXT: v_or_b32_e32 v11, v2, v19346; VI-NEXT: v_mov_b32_e32 v1, s49347; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD9348; VI-NEXT: v_add_f16_e32 v2, s26, v09349; VI-NEXT: s_lshr_b32 s4, s25, 169350; VI-NEXT: v_or_b32_e32 v10, v2, v19351; VI-NEXT: v_mov_b32_e32 v1, s49352; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD9353; VI-NEXT: v_add_f16_e32 v2, s25, v09354; VI-NEXT: s_lshr_b32 s4, s24, 169355; VI-NEXT: v_or_b32_e32 v9, v2, v19356; VI-NEXT: v_mov_b32_e32 v1, s49357; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD9358; VI-NEXT: v_add_f16_e32 v2, s24, v09359; VI-NEXT: s_lshr_b32 s4, s23, 169360; VI-NEXT: v_or_b32_e32 v8, v2, v19361; VI-NEXT: v_mov_b32_e32 v1, s49362; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD9363; VI-NEXT: v_add_f16_e32 v2, s23, v09364; VI-NEXT: s_lshr_b32 s4, s22, 169365; VI-NEXT: v_or_b32_e32 v7, v2, v19366; VI-NEXT: v_mov_b32_e32 v1, s49367; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD9368; VI-NEXT: v_add_f16_e32 v2, s22, v09369; VI-NEXT: s_lshr_b32 s4, s21, 169370; VI-NEXT: v_or_b32_e32 v6, v2, v19371; VI-NEXT: v_mov_b32_e32 v1, s49372; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD9373; VI-NEXT: v_add_f16_e32 v2, s21, v09374; VI-NEXT: s_lshr_b32 s4, s20, 169375; VI-NEXT: v_or_b32_e32 v5, v2, v19376; VI-NEXT: v_mov_b32_e32 v1, s49377; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD9378; VI-NEXT: v_add_f16_e32 v2, s20, v09379; VI-NEXT: s_lshr_b32 s4, s19, 169380; VI-NEXT: v_or_b32_e32 v4, v2, v19381; VI-NEXT: v_mov_b32_e32 v1, s49382; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD9383; VI-NEXT: v_add_f16_e32 v2, s19, v09384; VI-NEXT: s_lshr_b32 s4, s18, 169385; VI-NEXT: v_or_b32_e32 v3, v2, v19386; VI-NEXT: v_mov_b32_e32 v1, s49387; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD9388; VI-NEXT: v_add_f16_e32 v2, s18, v09389; VI-NEXT: s_lshr_b32 s4, s17, 169390; VI-NEXT: v_or_b32_e32 v2, v2, v19391; VI-NEXT: v_mov_b32_e32 v1, s49392; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD9393; VI-NEXT: v_add_f16_e32 v12, s17, v09394; VI-NEXT: s_lshr_b32 s4, s16, 169395; VI-NEXT: v_or_b32_e32 v1, v12, v19396; VI-NEXT: v_mov_b32_e32 v12, s49397; VI-NEXT: v_add_f16_sdwa v12, v12, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD9398; VI-NEXT: v_add_f16_e32 v0, s16, v09399; VI-NEXT: v_or_b32_e32 v0, v0, v129400; VI-NEXT: s_setpc_b64 s[30:31]9401; VI-NEXT: .LBB47_3:9402; VI-NEXT: s_branch .LBB47_29403; VI-NEXT: .LBB47_4:9404; VI-NEXT: v_mov_b32_e32 v0, s169405; VI-NEXT: v_mov_b32_e32 v1, s179406; VI-NEXT: v_mov_b32_e32 v2, s189407; VI-NEXT: v_mov_b32_e32 v3, s199408; VI-NEXT: v_mov_b32_e32 v4, s209409; VI-NEXT: v_mov_b32_e32 v5, s219410; VI-NEXT: v_mov_b32_e32 v6, s229411; VI-NEXT: v_mov_b32_e32 v7, s239412; VI-NEXT: v_mov_b32_e32 v8, s249413; VI-NEXT: v_mov_b32_e32 v9, s259414; VI-NEXT: v_mov_b32_e32 v10, s269415; VI-NEXT: v_mov_b32_e32 v11, s279416; VI-NEXT: v_mov_b32_e32 v12, s289417; VI-NEXT: v_mov_b32_e32 v13, s299418; VI-NEXT: v_mov_b32_e32 v14, s309419; VI-NEXT: v_mov_b32_e32 v15, s319420; VI-NEXT: s_setpc_b64 s[30:31]9421;9422; GFX9-LABEL: bitcast_v24f16_to_v6f64_scalar:9423; GFX9: ; %bb.0:9424; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9425; GFX9-NEXT: s_cmp_lg_u32 s28, 09426; GFX9-NEXT: s_cbranch_scc0 .LBB47_39427; GFX9-NEXT: ; %bb.1: ; %cmp.false9428; GFX9-NEXT: s_cbranch_execnz .LBB47_49429; GFX9-NEXT: .LBB47_2: ; %cmp.true9430; GFX9-NEXT: v_mov_b32_e32 v0, 0x2009431; GFX9-NEXT: v_pk_add_f16 v11, s27, v0 op_sel_hi:[1,0]9432; GFX9-NEXT: v_pk_add_f16 v10, s26, v0 op_sel_hi:[1,0]9433; GFX9-NEXT: v_pk_add_f16 v9, s25, v0 op_sel_hi:[1,0]9434; GFX9-NEXT: v_pk_add_f16 v8, s24, v0 op_sel_hi:[1,0]9435; GFX9-NEXT: v_pk_add_f16 v7, s23, v0 op_sel_hi:[1,0]9436; GFX9-NEXT: v_pk_add_f16 v6, s22, v0 op_sel_hi:[1,0]9437; GFX9-NEXT: v_pk_add_f16 v5, s21, v0 op_sel_hi:[1,0]9438; GFX9-NEXT: v_pk_add_f16 v4, s20, v0 op_sel_hi:[1,0]9439; GFX9-NEXT: v_pk_add_f16 v3, s19, v0 op_sel_hi:[1,0]9440; GFX9-NEXT: v_pk_add_f16 v2, s18, v0 op_sel_hi:[1,0]9441; GFX9-NEXT: v_pk_add_f16 v1, s17, v0 op_sel_hi:[1,0]9442; GFX9-NEXT: v_pk_add_f16 v0, s16, v0 op_sel_hi:[1,0]9443; GFX9-NEXT: s_setpc_b64 s[30:31]9444; GFX9-NEXT: .LBB47_3:9445; GFX9-NEXT: s_branch .LBB47_29446; GFX9-NEXT: .LBB47_4:9447; GFX9-NEXT: v_mov_b32_e32 v0, s169448; GFX9-NEXT: v_mov_b32_e32 v1, s179449; GFX9-NEXT: v_mov_b32_e32 v2, s189450; GFX9-NEXT: v_mov_b32_e32 v3, s199451; GFX9-NEXT: v_mov_b32_e32 v4, s209452; GFX9-NEXT: v_mov_b32_e32 v5, s219453; GFX9-NEXT: v_mov_b32_e32 v6, s229454; GFX9-NEXT: v_mov_b32_e32 v7, s239455; GFX9-NEXT: v_mov_b32_e32 v8, s249456; GFX9-NEXT: v_mov_b32_e32 v9, s259457; GFX9-NEXT: v_mov_b32_e32 v10, s269458; GFX9-NEXT: v_mov_b32_e32 v11, s279459; GFX9-NEXT: v_mov_b32_e32 v12, s289460; GFX9-NEXT: v_mov_b32_e32 v13, s299461; GFX9-NEXT: v_mov_b32_e32 v14, s309462; GFX9-NEXT: v_mov_b32_e32 v15, s319463; GFX9-NEXT: s_setpc_b64 s[30:31]9464;9465; GFX11-LABEL: bitcast_v24f16_to_v6f64_scalar:9466; GFX11: ; %bb.0:9467; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9468; GFX11-NEXT: s_mov_b32 s15, s39469; GFX11-NEXT: s_mov_b32 s14, s29470; GFX11-NEXT: s_mov_b32 s13, s19471; GFX11-NEXT: s_mov_b32 s12, s09472; GFX11-NEXT: s_cmp_lg_u32 s24, 09473; GFX11-NEXT: s_mov_b32 s0, 09474; GFX11-NEXT: s_cbranch_scc0 .LBB47_39475; GFX11-NEXT: ; %bb.1: ; %Flow9476; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s09477; GFX11-NEXT: s_cbranch_vccnz .LBB47_49478; GFX11-NEXT: .LBB47_2: ; %cmp.true9479; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s23 op_sel_hi:[0,1]9480; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s22 op_sel_hi:[0,1]9481; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s21 op_sel_hi:[0,1]9482; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s20 op_sel_hi:[0,1]9483; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s19 op_sel_hi:[0,1]9484; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s18 op_sel_hi:[0,1]9485; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s17 op_sel_hi:[0,1]9486; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s16 op_sel_hi:[0,1]9487; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s15 op_sel_hi:[0,1]9488; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s14 op_sel_hi:[0,1]9489; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s13 op_sel_hi:[0,1]9490; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s12 op_sel_hi:[0,1]9491; GFX11-NEXT: s_setpc_b64 s[30:31]9492; GFX11-NEXT: .LBB47_3:9493; GFX11-NEXT: s_branch .LBB47_29494; GFX11-NEXT: .LBB47_4:9495; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s139496; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s159497; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s179498; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s199499; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s219500; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s239501; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s259502; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s279503; GFX11-NEXT: s_setpc_b64 s[30:31]9504 %cmp = icmp eq i32 %b, 09505 br i1 %cmp, label %cmp.true, label %cmp.false9506 9507cmp.true:9508 %a1 = fadd <24 x half> %a, splat (half 0xH0200)9509 %a2 = bitcast <24 x half> %a1 to <6 x double>9510 br label %end9511 9512cmp.false:9513 %a3 = bitcast <24 x half> %a to <6 x double>9514 br label %end9515 9516end:9517 %phi = phi <6 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]9518 ret <6 x double> %phi9519}9520 9521define <24 x i16> @bitcast_v6i64_to_v24i16(<6 x i64> %a, i32 %b) {9522; SI-LABEL: bitcast_v6i64_to_v24i16:9523; SI: ; %bb.0:9524; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9525; SI-NEXT: v_mov_b32_e32 v22, v119526; SI-NEXT: v_mov_b32_e32 v20, v109527; SI-NEXT: v_mov_b32_e32 v18, v99528; SI-NEXT: v_mov_b32_e32 v16, v89529; SI-NEXT: v_mov_b32_e32 v14, v79530; SI-NEXT: v_mov_b32_e32 v24, v69531; SI-NEXT: v_mov_b32_e32 v10, v59532; SI-NEXT: v_mov_b32_e32 v8, v49533; SI-NEXT: v_mov_b32_e32 v6, v39534; SI-NEXT: v_mov_b32_e32 v4, v29535; SI-NEXT: v_mov_b32_e32 v2, v19536; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v129537; SI-NEXT: ; implicit-def: $vgpr19538; SI-NEXT: ; implicit-def: $vgpr39539; SI-NEXT: ; implicit-def: $vgpr59540; SI-NEXT: ; implicit-def: $vgpr79541; SI-NEXT: ; implicit-def: $vgpr99542; SI-NEXT: ; implicit-def: $vgpr119543; SI-NEXT: ; implicit-def: $vgpr139544; SI-NEXT: ; implicit-def: $vgpr159545; SI-NEXT: ; implicit-def: $vgpr179546; SI-NEXT: ; implicit-def: $vgpr199547; SI-NEXT: ; implicit-def: $vgpr219548; SI-NEXT: ; implicit-def: $vgpr239549; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc9550; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]9551; SI-NEXT: s_cbranch_execz .LBB48_29552; SI-NEXT: ; %bb.1: ; %cmp.false9553; SI-NEXT: v_alignbit_b32 v21, v22, v20, 169554; SI-NEXT: v_alignbit_b32 v17, v18, v16, 169555; SI-NEXT: v_alignbit_b32 v13, v14, v24, 169556; SI-NEXT: v_alignbit_b32 v9, v10, v8, 169557; SI-NEXT: v_alignbit_b32 v5, v6, v4, 169558; SI-NEXT: v_alignbit_b32 v1, v2, v0, 169559; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v229560; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v189561; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v149562; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v109563; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v69564; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v29565; SI-NEXT: .LBB48_2: ; %Flow9566; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]9567; SI-NEXT: s_cbranch_execz .LBB48_49568; SI-NEXT: ; %bb.3: ; %cmp.true9569; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v09570; SI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc9571; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v49572; SI-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc9573; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v89574; SI-NEXT: v_addc_u32_e32 v10, vcc, 0, v10, vcc9575; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v249576; SI-NEXT: v_addc_u32_e32 v14, vcc, 0, v14, vcc9577; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v169578; SI-NEXT: v_addc_u32_e32 v18, vcc, 0, v18, vcc9579; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v209580; SI-NEXT: v_addc_u32_e32 v22, vcc, 0, v22, vcc9581; SI-NEXT: v_alignbit_b32 v21, v22, v20, 169582; SI-NEXT: v_alignbit_b32 v17, v18, v16, 169583; SI-NEXT: v_alignbit_b32 v13, v14, v24, 169584; SI-NEXT: v_alignbit_b32 v9, v10, v8, 169585; SI-NEXT: v_alignbit_b32 v5, v6, v4, 169586; SI-NEXT: v_alignbit_b32 v1, v2, v0, 169587; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v229588; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v189589; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v149590; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v109591; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v69592; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v29593; SI-NEXT: .LBB48_4: ; %end9594; SI-NEXT: s_or_b64 exec, exec, s[4:5]9595; SI-NEXT: v_mov_b32_e32 v12, v249596; SI-NEXT: s_setpc_b64 s[30:31]9597;9598; VI-LABEL: bitcast_v6i64_to_v24i16:9599; VI: ; %bb.0:9600; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9601; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v129602; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc9603; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]9604; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]9605; VI-NEXT: s_cbranch_execz .LBB48_29606; VI-NEXT: ; %bb.1: ; %cmp.true9607; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v109608; VI-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc9609; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v89610; VI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc9611; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v69612; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc9613; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v49614; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc9615; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v29616; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc9617; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v09618; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc9619; VI-NEXT: .LBB48_2: ; %end9620; VI-NEXT: s_or_b64 exec, exec, s[4:5]9621; VI-NEXT: s_setpc_b64 s[30:31]9622;9623; GFX9-LABEL: bitcast_v6i64_to_v24i16:9624; GFX9: ; %bb.0:9625; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9626; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v129627; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc9628; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]9629; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]9630; GFX9-NEXT: s_cbranch_execz .LBB48_29631; GFX9-NEXT: ; %bb.1: ; %cmp.true9632; GFX9-NEXT: v_add_co_u32_e32 v10, vcc, 3, v109633; GFX9-NEXT: v_addc_co_u32_e32 v11, vcc, 0, v11, vcc9634; GFX9-NEXT: v_add_co_u32_e32 v8, vcc, 3, v89635; GFX9-NEXT: v_addc_co_u32_e32 v9, vcc, 0, v9, vcc9636; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, 3, v69637; GFX9-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v7, vcc9638; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, 3, v49639; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc9640; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, 3, v29641; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc9642; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 3, v09643; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc9644; GFX9-NEXT: .LBB48_2: ; %end9645; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]9646; GFX9-NEXT: s_setpc_b64 s[30:31]9647;9648; GFX11-LABEL: bitcast_v6i64_to_v24i16:9649; GFX11: ; %bb.0:9650; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9651; GFX11-NEXT: s_mov_b32 s0, exec_lo9652; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v129653; GFX11-NEXT: s_xor_b32 s0, exec_lo, s09654; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)9655; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s09656; GFX11-NEXT: s_cbranch_execz .LBB48_29657; GFX11-NEXT: ; %bb.1: ; %cmp.true9658; GFX11-NEXT: v_add_co_u32 v10, vcc_lo, v10, 39659; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)9660; GFX11-NEXT: v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo9661; GFX11-NEXT: v_add_co_u32 v8, vcc_lo, v8, 39662; GFX11-NEXT: v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo9663; GFX11-NEXT: v_add_co_u32 v6, vcc_lo, v6, 39664; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)9665; GFX11-NEXT: v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo9666; GFX11-NEXT: v_add_co_u32 v4, vcc_lo, v4, 39667; GFX11-NEXT: v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo9668; GFX11-NEXT: v_add_co_u32 v2, vcc_lo, v2, 39669; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)9670; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo9671; GFX11-NEXT: v_add_co_u32 v0, vcc_lo, v0, 39672; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo9673; GFX11-NEXT: .LBB48_2: ; %end9674; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s09675; GFX11-NEXT: s_setpc_b64 s[30:31]9676 %cmp = icmp eq i32 %b, 09677 br i1 %cmp, label %cmp.true, label %cmp.false9678 9679cmp.true:9680 %a1 = add <6 x i64> %a, splat (i64 3)9681 %a2 = bitcast <6 x i64> %a1 to <24 x i16>9682 br label %end9683 9684cmp.false:9685 %a3 = bitcast <6 x i64> %a to <24 x i16>9686 br label %end9687 9688end:9689 %phi = phi <24 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]9690 ret <24 x i16> %phi9691}9692 9693define inreg <24 x i16> @bitcast_v6i64_to_v24i16_scalar(<6 x i64> inreg %a, i32 inreg %b) {9694; SI-LABEL: bitcast_v6i64_to_v24i16_scalar:9695; SI: ; %bb.0:9696; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9697; SI-NEXT: s_cmp_lg_u32 s28, 09698; SI-NEXT: s_cbranch_scc0 .LBB49_49699; SI-NEXT: ; %bb.1: ; %cmp.false9700; SI-NEXT: s_lshr_b32 s40, s27, 169701; SI-NEXT: s_lshr_b32 s41, s25, 169702; SI-NEXT: s_lshr_b32 s42, s23, 169703; SI-NEXT: s_lshr_b32 s43, s21, 169704; SI-NEXT: s_lshr_b32 s44, s19, 169705; SI-NEXT: s_lshr_b32 s45, s17, 169706; SI-NEXT: s_lshr_b64 s[4:5], s[26:27], 169707; SI-NEXT: s_lshr_b64 s[6:7], s[24:25], 169708; SI-NEXT: s_lshr_b64 s[8:9], s[22:23], 169709; SI-NEXT: s_lshr_b64 s[10:11], s[20:21], 169710; SI-NEXT: s_lshr_b64 s[12:13], s[18:19], 169711; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 169712; SI-NEXT: s_cbranch_execnz .LBB49_39713; SI-NEXT: .LBB49_2: ; %cmp.true9714; SI-NEXT: s_add_u32 s26, s26, 39715; SI-NEXT: s_addc_u32 s27, s27, 09716; SI-NEXT: s_add_u32 s24, s24, 39717; SI-NEXT: s_addc_u32 s25, s25, 09718; SI-NEXT: s_add_u32 s22, s22, 39719; SI-NEXT: s_addc_u32 s23, s23, 09720; SI-NEXT: s_add_u32 s20, s20, 39721; SI-NEXT: s_addc_u32 s21, s21, 09722; SI-NEXT: s_add_u32 s18, s18, 39723; SI-NEXT: s_addc_u32 s19, s19, 09724; SI-NEXT: s_add_u32 s16, s16, 39725; SI-NEXT: s_addc_u32 s17, s17, 09726; SI-NEXT: s_lshr_b32 s40, s27, 169727; SI-NEXT: s_lshr_b32 s41, s25, 169728; SI-NEXT: s_lshr_b32 s42, s23, 169729; SI-NEXT: s_lshr_b32 s43, s21, 169730; SI-NEXT: s_lshr_b32 s44, s19, 169731; SI-NEXT: s_lshr_b32 s45, s17, 169732; SI-NEXT: s_lshr_b64 s[4:5], s[26:27], 169733; SI-NEXT: s_lshr_b64 s[6:7], s[24:25], 169734; SI-NEXT: s_lshr_b64 s[8:9], s[22:23], 169735; SI-NEXT: s_lshr_b64 s[10:11], s[20:21], 169736; SI-NEXT: s_lshr_b64 s[12:13], s[18:19], 169737; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 169738; SI-NEXT: .LBB49_3: ; %end9739; SI-NEXT: v_mov_b32_e32 v0, s169740; SI-NEXT: v_mov_b32_e32 v1, s149741; SI-NEXT: v_mov_b32_e32 v2, s179742; SI-NEXT: v_mov_b32_e32 v3, s459743; SI-NEXT: v_mov_b32_e32 v4, s189744; SI-NEXT: v_mov_b32_e32 v5, s129745; SI-NEXT: v_mov_b32_e32 v6, s199746; SI-NEXT: v_mov_b32_e32 v7, s449747; SI-NEXT: v_mov_b32_e32 v8, s209748; SI-NEXT: v_mov_b32_e32 v9, s109749; SI-NEXT: v_mov_b32_e32 v10, s219750; SI-NEXT: v_mov_b32_e32 v11, s439751; SI-NEXT: v_mov_b32_e32 v12, s229752; SI-NEXT: v_mov_b32_e32 v13, s89753; SI-NEXT: v_mov_b32_e32 v14, s239754; SI-NEXT: v_mov_b32_e32 v15, s429755; SI-NEXT: v_mov_b32_e32 v16, s249756; SI-NEXT: v_mov_b32_e32 v17, s69757; SI-NEXT: v_mov_b32_e32 v18, s259758; SI-NEXT: v_mov_b32_e32 v19, s419759; SI-NEXT: v_mov_b32_e32 v20, s269760; SI-NEXT: v_mov_b32_e32 v21, s49761; SI-NEXT: v_mov_b32_e32 v22, s279762; SI-NEXT: v_mov_b32_e32 v23, s409763; SI-NEXT: s_setpc_b64 s[30:31]9764; SI-NEXT: .LBB49_4:9765; SI-NEXT: ; implicit-def: $sgpr149766; SI-NEXT: ; implicit-def: $sgpr459767; SI-NEXT: ; implicit-def: $sgpr129768; SI-NEXT: ; implicit-def: $sgpr449769; SI-NEXT: ; implicit-def: $sgpr109770; SI-NEXT: ; implicit-def: $sgpr439771; SI-NEXT: ; implicit-def: $sgpr89772; SI-NEXT: ; implicit-def: $sgpr429773; SI-NEXT: ; implicit-def: $sgpr69774; SI-NEXT: ; implicit-def: $sgpr419775; SI-NEXT: ; implicit-def: $sgpr49776; SI-NEXT: ; implicit-def: $sgpr409777; SI-NEXT: s_branch .LBB49_29778;9779; VI-LABEL: bitcast_v6i64_to_v24i16_scalar:9780; VI: ; %bb.0:9781; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9782; VI-NEXT: s_cmp_lg_u32 s28, 09783; VI-NEXT: s_cbranch_scc0 .LBB49_49784; VI-NEXT: ; %bb.1: ; %cmp.false9785; VI-NEXT: s_cbranch_execnz .LBB49_39786; VI-NEXT: .LBB49_2: ; %cmp.true9787; VI-NEXT: s_add_u32 s26, s26, 39788; VI-NEXT: s_addc_u32 s27, s27, 09789; VI-NEXT: s_add_u32 s24, s24, 39790; VI-NEXT: s_addc_u32 s25, s25, 09791; VI-NEXT: s_add_u32 s22, s22, 39792; VI-NEXT: s_addc_u32 s23, s23, 09793; VI-NEXT: s_add_u32 s20, s20, 39794; VI-NEXT: s_addc_u32 s21, s21, 09795; VI-NEXT: s_add_u32 s18, s18, 39796; VI-NEXT: s_addc_u32 s19, s19, 09797; VI-NEXT: s_add_u32 s16, s16, 39798; VI-NEXT: s_addc_u32 s17, s17, 09799; VI-NEXT: .LBB49_3: ; %end9800; VI-NEXT: v_mov_b32_e32 v0, s169801; VI-NEXT: v_mov_b32_e32 v1, s179802; VI-NEXT: v_mov_b32_e32 v2, s189803; VI-NEXT: v_mov_b32_e32 v3, s199804; VI-NEXT: v_mov_b32_e32 v4, s209805; VI-NEXT: v_mov_b32_e32 v5, s219806; VI-NEXT: v_mov_b32_e32 v6, s229807; VI-NEXT: v_mov_b32_e32 v7, s239808; VI-NEXT: v_mov_b32_e32 v8, s249809; VI-NEXT: v_mov_b32_e32 v9, s259810; VI-NEXT: v_mov_b32_e32 v10, s269811; VI-NEXT: v_mov_b32_e32 v11, s279812; VI-NEXT: s_setpc_b64 s[30:31]9813; VI-NEXT: .LBB49_4:9814; VI-NEXT: s_branch .LBB49_29815;9816; GFX9-LABEL: bitcast_v6i64_to_v24i16_scalar:9817; GFX9: ; %bb.0:9818; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9819; GFX9-NEXT: s_cmp_lg_u32 s28, 09820; GFX9-NEXT: s_cbranch_scc0 .LBB49_49821; GFX9-NEXT: ; %bb.1: ; %cmp.false9822; GFX9-NEXT: s_cbranch_execnz .LBB49_39823; GFX9-NEXT: .LBB49_2: ; %cmp.true9824; GFX9-NEXT: s_add_u32 s26, s26, 39825; GFX9-NEXT: s_addc_u32 s27, s27, 09826; GFX9-NEXT: s_add_u32 s24, s24, 39827; GFX9-NEXT: s_addc_u32 s25, s25, 09828; GFX9-NEXT: s_add_u32 s22, s22, 39829; GFX9-NEXT: s_addc_u32 s23, s23, 09830; GFX9-NEXT: s_add_u32 s20, s20, 39831; GFX9-NEXT: s_addc_u32 s21, s21, 09832; GFX9-NEXT: s_add_u32 s18, s18, 39833; GFX9-NEXT: s_addc_u32 s19, s19, 09834; GFX9-NEXT: s_add_u32 s16, s16, 39835; GFX9-NEXT: s_addc_u32 s17, s17, 09836; GFX9-NEXT: .LBB49_3: ; %end9837; GFX9-NEXT: v_mov_b32_e32 v0, s169838; GFX9-NEXT: v_mov_b32_e32 v1, s179839; GFX9-NEXT: v_mov_b32_e32 v2, s189840; GFX9-NEXT: v_mov_b32_e32 v3, s199841; GFX9-NEXT: v_mov_b32_e32 v4, s209842; GFX9-NEXT: v_mov_b32_e32 v5, s219843; GFX9-NEXT: v_mov_b32_e32 v6, s229844; GFX9-NEXT: v_mov_b32_e32 v7, s239845; GFX9-NEXT: v_mov_b32_e32 v8, s249846; GFX9-NEXT: v_mov_b32_e32 v9, s259847; GFX9-NEXT: v_mov_b32_e32 v10, s269848; GFX9-NEXT: v_mov_b32_e32 v11, s279849; GFX9-NEXT: s_setpc_b64 s[30:31]9850; GFX9-NEXT: .LBB49_4:9851; GFX9-NEXT: s_branch .LBB49_29852;9853; GFX11-LABEL: bitcast_v6i64_to_v24i16_scalar:9854; GFX11: ; %bb.0:9855; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9856; GFX11-NEXT: s_cmp_lg_u32 s24, 09857; GFX11-NEXT: s_mov_b32 s4, 09858; GFX11-NEXT: s_cbranch_scc0 .LBB49_49859; GFX11-NEXT: ; %bb.1: ; %Flow9860; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s49861; GFX11-NEXT: s_cbranch_vccnz .LBB49_39862; GFX11-NEXT: .LBB49_2: ; %cmp.true9863; GFX11-NEXT: s_add_u32 s22, s22, 39864; GFX11-NEXT: s_addc_u32 s23, s23, 09865; GFX11-NEXT: s_add_u32 s20, s20, 39866; GFX11-NEXT: s_addc_u32 s21, s21, 09867; GFX11-NEXT: s_add_u32 s18, s18, 39868; GFX11-NEXT: s_addc_u32 s19, s19, 09869; GFX11-NEXT: s_add_u32 s16, s16, 39870; GFX11-NEXT: s_addc_u32 s17, s17, 09871; GFX11-NEXT: s_add_u32 s2, s2, 39872; GFX11-NEXT: s_addc_u32 s3, s3, 09873; GFX11-NEXT: s_add_u32 s0, s0, 39874; GFX11-NEXT: s_addc_u32 s1, s1, 09875; GFX11-NEXT: .LBB49_3: ; %end9876; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)9877; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s19878; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s39879; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s179880; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s199881; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s219882; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s239883; GFX11-NEXT: s_setpc_b64 s[30:31]9884; GFX11-NEXT: .LBB49_4:9885; GFX11-NEXT: s_branch .LBB49_29886 %cmp = icmp eq i32 %b, 09887 br i1 %cmp, label %cmp.true, label %cmp.false9888 9889cmp.true:9890 %a1 = add <6 x i64> %a, splat (i64 3)9891 %a2 = bitcast <6 x i64> %a1 to <24 x i16>9892 br label %end9893 9894cmp.false:9895 %a3 = bitcast <6 x i64> %a to <24 x i16>9896 br label %end9897 9898end:9899 %phi = phi <24 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]9900 ret <24 x i16> %phi9901}9902 9903define <6 x i64> @bitcast_v24i16_to_v6i64(<24 x i16> %a, i32 %b) {9904; SI-LABEL: bitcast_v24i16_to_v6i64:9905; SI: ; %bb.0:9906; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9907; SI-NEXT: v_mov_b32_e32 v32, v149908; SI-NEXT: v_mov_b32_e32 v31, v129909; SI-NEXT: v_mov_b32_e32 v30, v109910; SI-NEXT: v_mov_b32_e32 v29, v89911; SI-NEXT: v_mov_b32_e32 v28, v69912; SI-NEXT: v_mov_b32_e32 v25, v49913; SI-NEXT: v_mov_b32_e32 v26, v29914; SI-NEXT: v_mov_b32_e32 v27, v09915; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v249916; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v19917; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v39918; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v59919; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v79920; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v99921; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v119922; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v139923; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v159924; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v179925; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v199926; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v219927; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v239928; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr159929; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc9930; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]9931; SI-NEXT: s_cbranch_execnz .LBB50_39932; SI-NEXT: ; %bb.1: ; %Flow9933; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]9934; SI-NEXT: s_cbranch_execnz .LBB50_49935; SI-NEXT: .LBB50_2: ; %end9936; SI-NEXT: s_or_b64 exec, exec, s[4:5]9937; SI-NEXT: s_setpc_b64 s[30:31]9938; SI-NEXT: .LBB50_3: ; %cmp.false9939; SI-NEXT: v_and_b32_e32 v0, 0xffff, v279940; SI-NEXT: v_and_b32_e32 v1, 0xffff, v269941; SI-NEXT: v_and_b32_e32 v2, 0xffff, v259942; SI-NEXT: v_and_b32_e32 v3, 0xffff, v289943; SI-NEXT: v_and_b32_e32 v4, 0xffff, v299944; SI-NEXT: v_and_b32_e32 v5, 0xffff, v309945; SI-NEXT: v_and_b32_e32 v6, 0xffff, v319946; SI-NEXT: v_and_b32_e32 v7, 0xffff, v329947; SI-NEXT: v_and_b32_e32 v8, 0xffff, v169948; SI-NEXT: v_and_b32_e32 v9, 0xffff, v189949; SI-NEXT: v_and_b32_e32 v10, 0xffff, v209950; SI-NEXT: v_and_b32_e32 v11, 0xffff, v229951; SI-NEXT: v_or_b32_e32 v0, v0, v499952; SI-NEXT: v_or_b32_e32 v1, v1, v489953; SI-NEXT: v_or_b32_e32 v2, v2, v399954; SI-NEXT: v_or_b32_e32 v3, v3, v389955; SI-NEXT: v_or_b32_e32 v4, v4, v379956; SI-NEXT: v_or_b32_e32 v5, v5, v369957; SI-NEXT: v_or_b32_e32 v6, v6, v359958; SI-NEXT: v_or_b32_e32 v7, v7, v349959; SI-NEXT: v_or_b32_e32 v8, v8, v339960; SI-NEXT: v_or_b32_e32 v9, v9, v249961; SI-NEXT: v_or_b32_e32 v10, v10, v199962; SI-NEXT: v_or_b32_e32 v11, v11, v179963; SI-NEXT: ; implicit-def: $vgpr279964; SI-NEXT: ; implicit-def: $vgpr269965; SI-NEXT: ; implicit-def: $vgpr259966; SI-NEXT: ; implicit-def: $vgpr289967; SI-NEXT: ; implicit-def: $vgpr299968; SI-NEXT: ; implicit-def: $vgpr309969; SI-NEXT: ; implicit-def: $vgpr319970; SI-NEXT: ; implicit-def: $vgpr329971; SI-NEXT: ; implicit-def: $vgpr169972; SI-NEXT: ; implicit-def: $vgpr189973; SI-NEXT: ; implicit-def: $vgpr209974; SI-NEXT: ; implicit-def: $vgpr229975; SI-NEXT: ; implicit-def: $vgpr499976; SI-NEXT: ; implicit-def: $vgpr489977; SI-NEXT: ; implicit-def: $vgpr399978; SI-NEXT: ; implicit-def: $vgpr389979; SI-NEXT: ; implicit-def: $vgpr379980; SI-NEXT: ; implicit-def: $vgpr369981; SI-NEXT: ; implicit-def: $vgpr359982; SI-NEXT: ; implicit-def: $vgpr349983; SI-NEXT: ; implicit-def: $vgpr339984; SI-NEXT: ; implicit-def: $vgpr249985; SI-NEXT: ; implicit-def: $vgpr199986; SI-NEXT: ; implicit-def: $vgpr179987; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]9988; SI-NEXT: s_cbranch_execz .LBB50_29989; SI-NEXT: .LBB50_4: ; %cmp.true9990; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v279991; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v269992; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v259993; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v289994; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v299995; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v309996; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v319997; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v329998; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v169999; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v1810000; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v2010001; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v2210002; SI-NEXT: v_and_b32_e32 v0, 0xffff, v010003; SI-NEXT: v_and_b32_e32 v1, 0xffff, v110004; SI-NEXT: v_and_b32_e32 v2, 0xffff, v210005; SI-NEXT: v_and_b32_e32 v3, 0xffff, v310006; SI-NEXT: v_and_b32_e32 v4, 0xffff, v410007; SI-NEXT: v_and_b32_e32 v5, 0xffff, v510008; SI-NEXT: v_and_b32_e32 v6, 0xffff, v610009; SI-NEXT: v_and_b32_e32 v7, 0xffff, v710010; SI-NEXT: v_and_b32_e32 v8, 0xffff, v810011; SI-NEXT: v_and_b32_e32 v9, 0xffff, v910012; SI-NEXT: v_and_b32_e32 v10, 0xffff, v1010013; SI-NEXT: v_and_b32_e32 v11, 0xffff, v1110014; SI-NEXT: v_or_b32_e32 v0, v49, v010015; SI-NEXT: s_mov_b32 s6, 0x3000010016; SI-NEXT: v_or_b32_e32 v1, v48, v110017; SI-NEXT: v_or_b32_e32 v2, v39, v210018; SI-NEXT: v_or_b32_e32 v3, v38, v310019; SI-NEXT: v_or_b32_e32 v4, v37, v410020; SI-NEXT: v_or_b32_e32 v5, v36, v510021; SI-NEXT: v_or_b32_e32 v6, v35, v610022; SI-NEXT: v_or_b32_e32 v7, v34, v710023; SI-NEXT: v_or_b32_e32 v8, v33, v810024; SI-NEXT: v_or_b32_e32 v9, v24, v910025; SI-NEXT: v_or_b32_e32 v10, v19, v1010026; SI-NEXT: v_or_b32_e32 v11, v17, v1110027; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v010028; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v110029; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v210030; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v310031; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v410032; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v510033; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v610034; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v710035; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v810036; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v910037; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v1010038; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v1110039; SI-NEXT: s_or_b64 exec, exec, s[4:5]10040; SI-NEXT: s_setpc_b64 s[30:31]10041;10042; VI-LABEL: bitcast_v24i16_to_v6i64:10043; VI: ; %bb.0:10044; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10045; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1210046; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc10047; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]10048; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10049; VI-NEXT: s_cbranch_execz .LBB50_210050; VI-NEXT: ; %bb.1: ; %cmp.true10051; VI-NEXT: v_mov_b32_e32 v13, 310052; VI-NEXT: v_add_u16_e32 v12, 3, v1110053; VI-NEXT: v_add_u16_sdwa v11, v11, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10054; VI-NEXT: v_or_b32_e32 v11, v12, v1110055; VI-NEXT: v_add_u16_e32 v12, 3, v1010056; VI-NEXT: v_add_u16_sdwa v10, v10, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10057; VI-NEXT: v_or_b32_e32 v10, v12, v1010058; VI-NEXT: v_add_u16_e32 v12, 3, v910059; VI-NEXT: v_add_u16_sdwa v9, v9, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10060; VI-NEXT: v_or_b32_e32 v9, v12, v910061; VI-NEXT: v_add_u16_e32 v12, 3, v810062; VI-NEXT: v_add_u16_sdwa v8, v8, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10063; VI-NEXT: v_or_b32_e32 v8, v12, v810064; VI-NEXT: v_add_u16_e32 v12, 3, v710065; VI-NEXT: v_add_u16_sdwa v7, v7, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10066; VI-NEXT: v_or_b32_e32 v7, v12, v710067; VI-NEXT: v_add_u16_e32 v12, 3, v610068; VI-NEXT: v_add_u16_sdwa v6, v6, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10069; VI-NEXT: v_or_b32_e32 v6, v12, v610070; VI-NEXT: v_add_u16_e32 v12, 3, v510071; VI-NEXT: v_add_u16_sdwa v5, v5, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10072; VI-NEXT: v_or_b32_e32 v5, v12, v510073; VI-NEXT: v_add_u16_e32 v12, 3, v410074; VI-NEXT: v_add_u16_sdwa v4, v4, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10075; VI-NEXT: v_or_b32_e32 v4, v12, v410076; VI-NEXT: v_add_u16_e32 v12, 3, v310077; VI-NEXT: v_add_u16_sdwa v3, v3, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10078; VI-NEXT: v_or_b32_e32 v3, v12, v310079; VI-NEXT: v_add_u16_e32 v12, 3, v210080; VI-NEXT: v_add_u16_sdwa v2, v2, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10081; VI-NEXT: v_or_b32_e32 v2, v12, v210082; VI-NEXT: v_add_u16_e32 v12, 3, v110083; VI-NEXT: v_add_u16_sdwa v1, v1, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10084; VI-NEXT: v_or_b32_e32 v1, v12, v110085; VI-NEXT: v_add_u16_e32 v12, 3, v010086; VI-NEXT: v_add_u16_sdwa v0, v0, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10087; VI-NEXT: v_or_b32_e32 v0, v12, v010088; VI-NEXT: .LBB50_2: ; %end10089; VI-NEXT: s_or_b64 exec, exec, s[4:5]10090; VI-NEXT: s_setpc_b64 s[30:31]10091;10092; GFX9-LABEL: bitcast_v24i16_to_v6i64:10093; GFX9: ; %bb.0:10094; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10095; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1210096; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc10097; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]10098; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10099; GFX9-NEXT: s_cbranch_execz .LBB50_210100; GFX9-NEXT: ; %bb.1: ; %cmp.true10101; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]10102; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]10103; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]10104; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]10105; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]10106; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]10107; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]10108; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]10109; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]10110; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]10111; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]10112; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]10113; GFX9-NEXT: .LBB50_2: ; %end10114; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]10115; GFX9-NEXT: s_setpc_b64 s[30:31]10116;10117; GFX11-LABEL: bitcast_v24i16_to_v6i64:10118; GFX11: ; %bb.0:10119; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10120; GFX11-NEXT: s_mov_b32 s0, exec_lo10121; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v1210122; GFX11-NEXT: s_xor_b32 s0, exec_lo, s010123; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)10124; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s010125; GFX11-NEXT: s_cbranch_execz .LBB50_210126; GFX11-NEXT: ; %bb.1: ; %cmp.true10127; GFX11-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]10128; GFX11-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]10129; GFX11-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]10130; GFX11-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]10131; GFX11-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]10132; GFX11-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]10133; GFX11-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]10134; GFX11-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]10135; GFX11-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]10136; GFX11-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]10137; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]10138; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]10139; GFX11-NEXT: .LBB50_2: ; %end10140; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s010141; GFX11-NEXT: s_setpc_b64 s[30:31]10142 %cmp = icmp eq i32 %b, 010143 br i1 %cmp, label %cmp.true, label %cmp.false10144 10145cmp.true:10146 %a1 = add <24 x i16> %a, splat (i16 3)10147 %a2 = bitcast <24 x i16> %a1 to <6 x i64>10148 br label %end10149 10150cmp.false:10151 %a3 = bitcast <24 x i16> %a to <6 x i64>10152 br label %end10153 10154end:10155 %phi = phi <6 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]10156 ret <6 x i64> %phi10157}10158 10159define inreg <6 x i64> @bitcast_v24i16_to_v6i64_scalar(<24 x i16> inreg %a, i32 inreg %b) {10160; SI-LABEL: bitcast_v24i16_to_v6i64_scalar:10161; SI: ; %bb.0:10162; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10163; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1010164; SI-NEXT: v_mov_b32_e32 v16, v810165; SI-NEXT: v_mov_b32_e32 v17, v610166; SI-NEXT: v_mov_b32_e32 v18, v410167; SI-NEXT: v_mov_b32_e32 v19, v210168; SI-NEXT: v_mov_b32_e32 v20, v010169; SI-NEXT: s_and_b64 s[4:5], vcc, exec10170; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v110171; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v310172; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v510173; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v710174; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v910175; SI-NEXT: s_cbranch_scc0 .LBB51_410176; SI-NEXT: ; %bb.1: ; %cmp.false10177; SI-NEXT: s_and_b32 s4, s16, 0xffff10178; SI-NEXT: s_lshl_b32 s5, s17, 1610179; SI-NEXT: s_or_b32 s4, s4, s510180; SI-NEXT: s_and_b32 s5, s18, 0xffff10181; SI-NEXT: s_lshl_b32 s6, s19, 1610182; SI-NEXT: s_or_b32 s5, s5, s610183; SI-NEXT: s_and_b32 s6, s20, 0xffff10184; SI-NEXT: s_lshl_b32 s7, s21, 1610185; SI-NEXT: s_or_b32 s6, s6, s710186; SI-NEXT: s_and_b32 s7, s22, 0xffff10187; SI-NEXT: s_lshl_b32 s8, s23, 1610188; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2010189; SI-NEXT: s_or_b32 s7, s7, s810190; SI-NEXT: s_and_b32 s8, s24, 0xffff10191; SI-NEXT: s_lshl_b32 s9, s25, 1610192; SI-NEXT: v_or_b32_e32 v7, v0, v2510193; SI-NEXT: v_and_b32_e32 v0, 0xffff, v1810194; SI-NEXT: s_or_b32 s8, s8, s910195; SI-NEXT: s_and_b32 s9, s26, 0xffff10196; SI-NEXT: s_lshl_b32 s10, s27, 1610197; SI-NEXT: v_or_b32_e32 v9, v0, v2310198; SI-NEXT: v_and_b32_e32 v0, 0xffff, v1710199; SI-NEXT: s_or_b32 s9, s9, s1010200; SI-NEXT: s_and_b32 s10, s28, 0xffff10201; SI-NEXT: s_lshl_b32 s11, s29, 1610202; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1910203; SI-NEXT: v_or_b32_e32 v10, v0, v2210204; SI-NEXT: v_and_b32_e32 v0, 0xffff, v1610205; SI-NEXT: s_or_b32 s10, s10, s1110206; SI-NEXT: v_or_b32_e32 v8, v1, v2410207; SI-NEXT: v_or_b32_e32 v11, v0, v2110208; SI-NEXT: v_mov_b32_e32 v0, s410209; SI-NEXT: v_mov_b32_e32 v1, s510210; SI-NEXT: v_mov_b32_e32 v2, s610211; SI-NEXT: v_mov_b32_e32 v3, s710212; SI-NEXT: v_mov_b32_e32 v4, s810213; SI-NEXT: v_mov_b32_e32 v5, s910214; SI-NEXT: v_mov_b32_e32 v6, s1010215; SI-NEXT: s_cbranch_execnz .LBB51_310216; SI-NEXT: .LBB51_2: ; %cmp.true10217; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v2010218; SI-NEXT: v_and_b32_e32 v0, 0xffff, v010219; SI-NEXT: v_or_b32_e32 v0, v25, v010220; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v010221; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1910222; SI-NEXT: v_and_b32_e32 v0, 0xffff, v010223; SI-NEXT: s_add_i32 s16, s16, 310224; SI-NEXT: v_or_b32_e32 v0, v24, v010225; SI-NEXT: s_and_b32 s4, s16, 0xffff10226; SI-NEXT: s_lshl_b32 s5, s17, 1610227; SI-NEXT: s_add_i32 s18, s18, 310228; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v010229; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1810230; SI-NEXT: s_or_b32 s4, s5, s410231; SI-NEXT: s_and_b32 s5, s18, 0xffff10232; SI-NEXT: s_lshl_b32 s6, s19, 1610233; SI-NEXT: s_add_i32 s20, s20, 310234; SI-NEXT: v_and_b32_e32 v0, 0xffff, v010235; SI-NEXT: s_or_b32 s5, s6, s510236; SI-NEXT: s_and_b32 s6, s20, 0xffff10237; SI-NEXT: s_lshl_b32 s7, s21, 1610238; SI-NEXT: s_add_i32 s22, s22, 310239; SI-NEXT: v_or_b32_e32 v0, v23, v010240; SI-NEXT: s_or_b32 s6, s7, s610241; SI-NEXT: s_and_b32 s7, s22, 0xffff10242; SI-NEXT: s_lshl_b32 s8, s23, 1610243; SI-NEXT: s_add_i32 s24, s24, 310244; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v010245; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1710246; SI-NEXT: s_or_b32 s7, s8, s710247; SI-NEXT: s_and_b32 s8, s24, 0xffff10248; SI-NEXT: s_lshl_b32 s9, s25, 1610249; SI-NEXT: s_add_i32 s26, s26, 310250; SI-NEXT: v_and_b32_e32 v0, 0xffff, v010251; SI-NEXT: s_or_b32 s8, s9, s810252; SI-NEXT: s_and_b32 s9, s26, 0xffff10253; SI-NEXT: s_lshl_b32 s10, s27, 1610254; SI-NEXT: s_add_i32 s28, s28, 310255; SI-NEXT: v_or_b32_e32 v0, v22, v010256; SI-NEXT: s_or_b32 s9, s10, s910257; SI-NEXT: s_and_b32 s10, s28, 0xffff10258; SI-NEXT: s_lshl_b32 s11, s29, 1610259; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v010260; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1610261; SI-NEXT: s_or_b32 s10, s11, s1010262; SI-NEXT: v_and_b32_e32 v0, 0xffff, v010263; SI-NEXT: s_add_i32 s4, s4, 0x3000010264; SI-NEXT: s_add_i32 s5, s5, 0x3000010265; SI-NEXT: s_add_i32 s6, s6, 0x3000010266; SI-NEXT: s_add_i32 s7, s7, 0x3000010267; SI-NEXT: s_add_i32 s8, s8, 0x3000010268; SI-NEXT: s_add_i32 s9, s9, 0x3000010269; SI-NEXT: s_add_i32 s10, s10, 0x3000010270; SI-NEXT: v_or_b32_e32 v0, v21, v010271; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v010272; SI-NEXT: v_mov_b32_e32 v0, s410273; SI-NEXT: v_mov_b32_e32 v1, s510274; SI-NEXT: v_mov_b32_e32 v2, s610275; SI-NEXT: v_mov_b32_e32 v3, s710276; SI-NEXT: v_mov_b32_e32 v4, s810277; SI-NEXT: v_mov_b32_e32 v5, s910278; SI-NEXT: v_mov_b32_e32 v6, s1010279; SI-NEXT: .LBB51_3: ; %end10280; SI-NEXT: s_setpc_b64 s[30:31]10281; SI-NEXT: .LBB51_4:10282; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr1510283; SI-NEXT: s_branch .LBB51_210284;10285; VI-LABEL: bitcast_v24i16_to_v6i64_scalar:10286; VI: ; %bb.0:10287; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10288; VI-NEXT: s_cmp_lg_u32 s28, 010289; VI-NEXT: s_cbranch_scc0 .LBB51_410290; VI-NEXT: ; %bb.1: ; %cmp.false10291; VI-NEXT: s_cbranch_execnz .LBB51_310292; VI-NEXT: .LBB51_2: ; %cmp.true10293; VI-NEXT: s_add_i32 s5, s27, 310294; VI-NEXT: s_and_b32 s4, s27, 0xffff000010295; VI-NEXT: s_and_b32 s5, s5, 0xffff10296; VI-NEXT: s_or_b32 s4, s4, s510297; VI-NEXT: s_add_i32 s5, s26, 310298; VI-NEXT: s_add_i32 s27, s4, 0x3000010299; VI-NEXT: s_and_b32 s4, s26, 0xffff000010300; VI-NEXT: s_and_b32 s5, s5, 0xffff10301; VI-NEXT: s_or_b32 s4, s4, s510302; VI-NEXT: s_add_i32 s5, s25, 310303; VI-NEXT: s_add_i32 s26, s4, 0x3000010304; VI-NEXT: s_and_b32 s4, s25, 0xffff000010305; VI-NEXT: s_and_b32 s5, s5, 0xffff10306; VI-NEXT: s_or_b32 s4, s4, s510307; VI-NEXT: s_add_i32 s5, s24, 310308; VI-NEXT: s_add_i32 s25, s4, 0x3000010309; VI-NEXT: s_and_b32 s4, s24, 0xffff000010310; VI-NEXT: s_and_b32 s5, s5, 0xffff10311; VI-NEXT: s_or_b32 s4, s4, s510312; VI-NEXT: s_add_i32 s5, s23, 310313; VI-NEXT: s_add_i32 s24, s4, 0x3000010314; VI-NEXT: s_and_b32 s4, s23, 0xffff000010315; VI-NEXT: s_and_b32 s5, s5, 0xffff10316; VI-NEXT: s_or_b32 s4, s4, s510317; VI-NEXT: s_add_i32 s5, s22, 310318; VI-NEXT: s_add_i32 s23, s4, 0x3000010319; VI-NEXT: s_and_b32 s4, s22, 0xffff000010320; VI-NEXT: s_and_b32 s5, s5, 0xffff10321; VI-NEXT: s_or_b32 s4, s4, s510322; VI-NEXT: s_add_i32 s5, s21, 310323; VI-NEXT: s_add_i32 s22, s4, 0x3000010324; VI-NEXT: s_and_b32 s4, s21, 0xffff000010325; VI-NEXT: s_and_b32 s5, s5, 0xffff10326; VI-NEXT: s_or_b32 s4, s4, s510327; VI-NEXT: s_add_i32 s5, s20, 310328; VI-NEXT: s_add_i32 s21, s4, 0x3000010329; VI-NEXT: s_and_b32 s4, s20, 0xffff000010330; VI-NEXT: s_and_b32 s5, s5, 0xffff10331; VI-NEXT: s_or_b32 s4, s4, s510332; VI-NEXT: s_add_i32 s5, s19, 310333; VI-NEXT: s_add_i32 s20, s4, 0x3000010334; VI-NEXT: s_and_b32 s4, s19, 0xffff000010335; VI-NEXT: s_and_b32 s5, s5, 0xffff10336; VI-NEXT: s_or_b32 s4, s4, s510337; VI-NEXT: s_add_i32 s5, s18, 310338; VI-NEXT: s_add_i32 s19, s4, 0x3000010339; VI-NEXT: s_and_b32 s4, s18, 0xffff000010340; VI-NEXT: s_and_b32 s5, s5, 0xffff10341; VI-NEXT: s_or_b32 s4, s4, s510342; VI-NEXT: s_add_i32 s5, s17, 310343; VI-NEXT: s_add_i32 s18, s4, 0x3000010344; VI-NEXT: s_and_b32 s4, s17, 0xffff000010345; VI-NEXT: s_and_b32 s5, s5, 0xffff10346; VI-NEXT: s_or_b32 s4, s4, s510347; VI-NEXT: s_add_i32 s5, s16, 310348; VI-NEXT: s_add_i32 s17, s4, 0x3000010349; VI-NEXT: s_and_b32 s4, s16, 0xffff000010350; VI-NEXT: s_and_b32 s5, s5, 0xffff10351; VI-NEXT: s_or_b32 s4, s4, s510352; VI-NEXT: s_add_i32 s16, s4, 0x3000010353; VI-NEXT: .LBB51_3: ; %end10354; VI-NEXT: v_mov_b32_e32 v0, s1610355; VI-NEXT: v_mov_b32_e32 v1, s1710356; VI-NEXT: v_mov_b32_e32 v2, s1810357; VI-NEXT: v_mov_b32_e32 v3, s1910358; VI-NEXT: v_mov_b32_e32 v4, s2010359; VI-NEXT: v_mov_b32_e32 v5, s2110360; VI-NEXT: v_mov_b32_e32 v6, s2210361; VI-NEXT: v_mov_b32_e32 v7, s2310362; VI-NEXT: v_mov_b32_e32 v8, s2410363; VI-NEXT: v_mov_b32_e32 v9, s2510364; VI-NEXT: v_mov_b32_e32 v10, s2610365; VI-NEXT: v_mov_b32_e32 v11, s2710366; VI-NEXT: s_setpc_b64 s[30:31]10367; VI-NEXT: .LBB51_4:10368; VI-NEXT: s_branch .LBB51_210369;10370; GFX9-LABEL: bitcast_v24i16_to_v6i64_scalar:10371; GFX9: ; %bb.0:10372; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10373; GFX9-NEXT: s_cmp_lg_u32 s28, 010374; GFX9-NEXT: s_cbranch_scc0 .LBB51_310375; GFX9-NEXT: ; %bb.1: ; %cmp.false10376; GFX9-NEXT: s_cbranch_execnz .LBB51_410377; GFX9-NEXT: .LBB51_2: ; %cmp.true10378; GFX9-NEXT: v_pk_add_u16 v11, s27, 3 op_sel_hi:[1,0]10379; GFX9-NEXT: v_pk_add_u16 v10, s26, 3 op_sel_hi:[1,0]10380; GFX9-NEXT: v_pk_add_u16 v9, s25, 3 op_sel_hi:[1,0]10381; GFX9-NEXT: v_pk_add_u16 v8, s24, 3 op_sel_hi:[1,0]10382; GFX9-NEXT: v_pk_add_u16 v7, s23, 3 op_sel_hi:[1,0]10383; GFX9-NEXT: v_pk_add_u16 v6, s22, 3 op_sel_hi:[1,0]10384; GFX9-NEXT: v_pk_add_u16 v5, s21, 3 op_sel_hi:[1,0]10385; GFX9-NEXT: v_pk_add_u16 v4, s20, 3 op_sel_hi:[1,0]10386; GFX9-NEXT: v_pk_add_u16 v3, s19, 3 op_sel_hi:[1,0]10387; GFX9-NEXT: v_pk_add_u16 v2, s18, 3 op_sel_hi:[1,0]10388; GFX9-NEXT: v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]10389; GFX9-NEXT: v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]10390; GFX9-NEXT: s_setpc_b64 s[30:31]10391; GFX9-NEXT: .LBB51_3:10392; GFX9-NEXT: s_branch .LBB51_210393; GFX9-NEXT: .LBB51_4:10394; GFX9-NEXT: v_mov_b32_e32 v0, s1610395; GFX9-NEXT: v_mov_b32_e32 v1, s1710396; GFX9-NEXT: v_mov_b32_e32 v2, s1810397; GFX9-NEXT: v_mov_b32_e32 v3, s1910398; GFX9-NEXT: v_mov_b32_e32 v4, s2010399; GFX9-NEXT: v_mov_b32_e32 v5, s2110400; GFX9-NEXT: v_mov_b32_e32 v6, s2210401; GFX9-NEXT: v_mov_b32_e32 v7, s2310402; GFX9-NEXT: v_mov_b32_e32 v8, s2410403; GFX9-NEXT: v_mov_b32_e32 v9, s2510404; GFX9-NEXT: v_mov_b32_e32 v10, s2610405; GFX9-NEXT: v_mov_b32_e32 v11, s2710406; GFX9-NEXT: v_mov_b32_e32 v12, s2810407; GFX9-NEXT: v_mov_b32_e32 v13, s2910408; GFX9-NEXT: v_mov_b32_e32 v14, s3010409; GFX9-NEXT: v_mov_b32_e32 v15, s3110410; GFX9-NEXT: s_setpc_b64 s[30:31]10411;10412; GFX11-LABEL: bitcast_v24i16_to_v6i64_scalar:10413; GFX11: ; %bb.0:10414; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10415; GFX11-NEXT: s_mov_b32 s15, s310416; GFX11-NEXT: s_mov_b32 s14, s210417; GFX11-NEXT: s_mov_b32 s13, s110418; GFX11-NEXT: s_mov_b32 s12, s010419; GFX11-NEXT: s_cmp_lg_u32 s24, 010420; GFX11-NEXT: s_mov_b32 s0, 010421; GFX11-NEXT: s_cbranch_scc0 .LBB51_310422; GFX11-NEXT: ; %bb.1: ; %Flow10423; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s010424; GFX11-NEXT: s_cbranch_vccnz .LBB51_410425; GFX11-NEXT: .LBB51_2: ; %cmp.true10426; GFX11-NEXT: v_pk_add_u16 v11, s23, 3 op_sel_hi:[1,0]10427; GFX11-NEXT: v_pk_add_u16 v10, s22, 3 op_sel_hi:[1,0]10428; GFX11-NEXT: v_pk_add_u16 v9, s21, 3 op_sel_hi:[1,0]10429; GFX11-NEXT: v_pk_add_u16 v8, s20, 3 op_sel_hi:[1,0]10430; GFX11-NEXT: v_pk_add_u16 v7, s19, 3 op_sel_hi:[1,0]10431; GFX11-NEXT: v_pk_add_u16 v6, s18, 3 op_sel_hi:[1,0]10432; GFX11-NEXT: v_pk_add_u16 v5, s17, 3 op_sel_hi:[1,0]10433; GFX11-NEXT: v_pk_add_u16 v4, s16, 3 op_sel_hi:[1,0]10434; GFX11-NEXT: v_pk_add_u16 v3, s15, 3 op_sel_hi:[1,0]10435; GFX11-NEXT: v_pk_add_u16 v2, s14, 3 op_sel_hi:[1,0]10436; GFX11-NEXT: v_pk_add_u16 v1, s13, 3 op_sel_hi:[1,0]10437; GFX11-NEXT: v_pk_add_u16 v0, s12, 3 op_sel_hi:[1,0]10438; GFX11-NEXT: s_setpc_b64 s[30:31]10439; GFX11-NEXT: .LBB51_3:10440; GFX11-NEXT: s_branch .LBB51_210441; GFX11-NEXT: .LBB51_4:10442; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s1310443; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s1510444; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s1710445; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s1910446; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s2110447; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s2310448; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s2510449; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s2710450; GFX11-NEXT: s_setpc_b64 s[30:31]10451 %cmp = icmp eq i32 %b, 010452 br i1 %cmp, label %cmp.true, label %cmp.false10453 10454cmp.true:10455 %a1 = add <24 x i16> %a, splat (i16 3)10456 %a2 = bitcast <24 x i16> %a1 to <6 x i64>10457 br label %end10458 10459cmp.false:10460 %a3 = bitcast <24 x i16> %a to <6 x i64>10461 br label %end10462 10463end:10464 %phi = phi <6 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]10465 ret <6 x i64> %phi10466}10467 10468define <24 x half> @bitcast_v6i64_to_v24f16(<6 x i64> %a, i32 %b) {10469; SI-LABEL: bitcast_v6i64_to_v24f16:10470; SI: ; %bb.0:10471; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10472; SI-NEXT: v_mov_b32_e32 v25, v1110473; SI-NEXT: v_mov_b32_e32 v24, v1010474; SI-NEXT: v_mov_b32_e32 v27, v910475; SI-NEXT: v_mov_b32_e32 v26, v810476; SI-NEXT: v_mov_b32_e32 v29, v710477; SI-NEXT: v_mov_b32_e32 v28, v610478; SI-NEXT: v_mov_b32_e32 v31, v510479; SI-NEXT: v_mov_b32_e32 v30, v410480; SI-NEXT: v_mov_b32_e32 v33, v310481; SI-NEXT: v_mov_b32_e32 v32, v210482; SI-NEXT: v_mov_b32_e32 v35, v110483; SI-NEXT: v_mov_b32_e32 v34, v010484; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1210485; SI-NEXT: ; implicit-def: $vgpr010486; SI-NEXT: ; implicit-def: $vgpr110487; SI-NEXT: ; implicit-def: $vgpr210488; SI-NEXT: ; implicit-def: $vgpr310489; SI-NEXT: ; implicit-def: $vgpr410490; SI-NEXT: ; implicit-def: $vgpr510491; SI-NEXT: ; implicit-def: $vgpr610492; SI-NEXT: ; implicit-def: $vgpr710493; SI-NEXT: ; implicit-def: $vgpr810494; SI-NEXT: ; implicit-def: $vgpr910495; SI-NEXT: ; implicit-def: $vgpr1010496; SI-NEXT: ; implicit-def: $vgpr1110497; SI-NEXT: ; implicit-def: $vgpr1210498; SI-NEXT: ; implicit-def: $vgpr1310499; SI-NEXT: ; implicit-def: $vgpr1410500; SI-NEXT: ; implicit-def: $vgpr1510501; SI-NEXT: ; implicit-def: $vgpr1610502; SI-NEXT: ; implicit-def: $vgpr1710503; SI-NEXT: ; implicit-def: $vgpr1810504; SI-NEXT: ; implicit-def: $vgpr1910505; SI-NEXT: ; implicit-def: $vgpr2010506; SI-NEXT: ; implicit-def: $vgpr2110507; SI-NEXT: ; implicit-def: $vgpr2210508; SI-NEXT: ; implicit-def: $vgpr2310509; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc10510; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]10511; SI-NEXT: s_cbranch_execnz .LBB52_310512; SI-NEXT: ; %bb.1: ; %Flow10513; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10514; SI-NEXT: s_cbranch_execnz .LBB52_410515; SI-NEXT: .LBB52_2: ; %end10516; SI-NEXT: s_or_b64 exec, exec, s[4:5]10517; SI-NEXT: s_setpc_b64 s[30:31]10518; SI-NEXT: .LBB52_3: ; %cmp.false10519; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v2510520; SI-NEXT: v_cvt_f32_f16_e32 v23, v010521; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v2410522; SI-NEXT: v_cvt_f32_f16_e32 v21, v010523; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v2710524; SI-NEXT: v_cvt_f32_f16_e32 v19, v010525; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v2610526; SI-NEXT: v_cvt_f32_f16_e32 v17, v010527; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v2910528; SI-NEXT: v_cvt_f32_f16_e32 v15, v010529; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v2810530; SI-NEXT: v_cvt_f32_f16_e32 v13, v010531; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v3110532; SI-NEXT: v_cvt_f32_f16_e32 v11, v010533; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v3010534; SI-NEXT: v_cvt_f32_f16_e32 v9, v010535; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v3310536; SI-NEXT: v_cvt_f32_f16_e32 v7, v010537; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v3210538; SI-NEXT: v_cvt_f32_f16_e32 v5, v010539; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v3510540; SI-NEXT: v_cvt_f32_f16_e32 v3, v010541; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v3410542; SI-NEXT: v_cvt_f32_f16_e32 v1, v010543; SI-NEXT: v_cvt_f32_f16_e32 v22, v2510544; SI-NEXT: v_cvt_f32_f16_e32 v20, v2410545; SI-NEXT: v_cvt_f32_f16_e32 v18, v2710546; SI-NEXT: v_cvt_f32_f16_e32 v16, v2610547; SI-NEXT: v_cvt_f32_f16_e32 v14, v2910548; SI-NEXT: v_cvt_f32_f16_e32 v12, v2810549; SI-NEXT: v_cvt_f32_f16_e32 v10, v3110550; SI-NEXT: v_cvt_f32_f16_e32 v8, v3010551; SI-NEXT: v_cvt_f32_f16_e32 v6, v3310552; SI-NEXT: v_cvt_f32_f16_e32 v4, v3210553; SI-NEXT: v_cvt_f32_f16_e32 v2, v3510554; SI-NEXT: v_cvt_f32_f16_e32 v0, v3410555; SI-NEXT: ; implicit-def: $vgpr3410556; SI-NEXT: ; implicit-def: $vgpr3510557; SI-NEXT: ; implicit-def: $vgpr3210558; SI-NEXT: ; implicit-def: $vgpr3310559; SI-NEXT: ; implicit-def: $vgpr3010560; SI-NEXT: ; implicit-def: $vgpr3110561; SI-NEXT: ; implicit-def: $vgpr2810562; SI-NEXT: ; implicit-def: $vgpr2910563; SI-NEXT: ; implicit-def: $vgpr2610564; SI-NEXT: ; implicit-def: $vgpr2710565; SI-NEXT: ; implicit-def: $vgpr2410566; SI-NEXT: ; implicit-def: $vgpr2510567; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10568; SI-NEXT: s_cbranch_execz .LBB52_210569; SI-NEXT: .LBB52_4: ; %cmp.true10570; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v3410571; SI-NEXT: v_addc_u32_e32 v1, vcc, 0, v35, vcc10572; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v3210573; SI-NEXT: v_addc_u32_e32 v4, vcc, 0, v33, vcc10574; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v3010575; SI-NEXT: v_addc_u32_e32 v8, vcc, 0, v31, vcc10576; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v2810577; SI-NEXT: v_addc_u32_e32 v12, vcc, 0, v29, vcc10578; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v2610579; SI-NEXT: v_addc_u32_e32 v16, vcc, 0, v27, vcc10580; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v2410581; SI-NEXT: v_addc_u32_e32 v20, vcc, 0, v25, vcc10582; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v010583; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v110584; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v210585; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v410586; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v610587; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v810588; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v1010589; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v1210590; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v1410591; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v1610592; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v1810593; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v2010594; SI-NEXT: v_cvt_f32_f16_e32 v22, v2010595; SI-NEXT: v_cvt_f32_f16_e32 v20, v1810596; SI-NEXT: v_cvt_f32_f16_e32 v18, v1610597; SI-NEXT: v_cvt_f32_f16_e32 v16, v1410598; SI-NEXT: v_cvt_f32_f16_e32 v14, v1210599; SI-NEXT: v_cvt_f32_f16_e32 v12, v1010600; SI-NEXT: v_cvt_f32_f16_e32 v10, v810601; SI-NEXT: v_cvt_f32_f16_e32 v8, v610602; SI-NEXT: v_cvt_f32_f16_e32 v6, v410603; SI-NEXT: v_cvt_f32_f16_e32 v4, v210604; SI-NEXT: v_cvt_f32_f16_e32 v2, v110605; SI-NEXT: v_cvt_f32_f16_e32 v0, v010606; SI-NEXT: v_cvt_f32_f16_e32 v23, v2310607; SI-NEXT: v_cvt_f32_f16_e32 v21, v2110608; SI-NEXT: v_cvt_f32_f16_e32 v19, v1910609; SI-NEXT: v_cvt_f32_f16_e32 v17, v1710610; SI-NEXT: v_cvt_f32_f16_e32 v15, v1510611; SI-NEXT: v_cvt_f32_f16_e32 v13, v1310612; SI-NEXT: v_cvt_f32_f16_e32 v11, v1110613; SI-NEXT: v_cvt_f32_f16_e32 v9, v910614; SI-NEXT: v_cvt_f32_f16_e32 v7, v710615; SI-NEXT: v_cvt_f32_f16_e32 v5, v510616; SI-NEXT: v_cvt_f32_f16_e32 v3, v310617; SI-NEXT: v_cvt_f32_f16_e32 v1, v3410618; SI-NEXT: s_or_b64 exec, exec, s[4:5]10619; SI-NEXT: s_setpc_b64 s[30:31]10620;10621; VI-LABEL: bitcast_v6i64_to_v24f16:10622; VI: ; %bb.0:10623; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10624; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1210625; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc10626; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]10627; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10628; VI-NEXT: s_cbranch_execz .LBB52_210629; VI-NEXT: ; %bb.1: ; %cmp.true10630; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v1010631; VI-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc10632; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v810633; VI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc10634; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v610635; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc10636; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v410637; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc10638; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v210639; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc10640; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v010641; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc10642; VI-NEXT: .LBB52_2: ; %end10643; VI-NEXT: s_or_b64 exec, exec, s[4:5]10644; VI-NEXT: s_setpc_b64 s[30:31]10645;10646; GFX9-LABEL: bitcast_v6i64_to_v24f16:10647; GFX9: ; %bb.0:10648; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10649; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1210650; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc10651; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]10652; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10653; GFX9-NEXT: s_cbranch_execz .LBB52_210654; GFX9-NEXT: ; %bb.1: ; %cmp.true10655; GFX9-NEXT: v_add_co_u32_e32 v10, vcc, 3, v1010656; GFX9-NEXT: v_addc_co_u32_e32 v11, vcc, 0, v11, vcc10657; GFX9-NEXT: v_add_co_u32_e32 v8, vcc, 3, v810658; GFX9-NEXT: v_addc_co_u32_e32 v9, vcc, 0, v9, vcc10659; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, 3, v610660; GFX9-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v7, vcc10661; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, 3, v410662; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc10663; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, 3, v210664; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc10665; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 3, v010666; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc10667; GFX9-NEXT: .LBB52_2: ; %end10668; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]10669; GFX9-NEXT: s_setpc_b64 s[30:31]10670;10671; GFX11-LABEL: bitcast_v6i64_to_v24f16:10672; GFX11: ; %bb.0:10673; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10674; GFX11-NEXT: s_mov_b32 s0, exec_lo10675; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v1210676; GFX11-NEXT: s_xor_b32 s0, exec_lo, s010677; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)10678; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s010679; GFX11-NEXT: s_cbranch_execz .LBB52_210680; GFX11-NEXT: ; %bb.1: ; %cmp.true10681; GFX11-NEXT: v_add_co_u32 v10, vcc_lo, v10, 310682; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)10683; GFX11-NEXT: v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo10684; GFX11-NEXT: v_add_co_u32 v8, vcc_lo, v8, 310685; GFX11-NEXT: v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo10686; GFX11-NEXT: v_add_co_u32 v6, vcc_lo, v6, 310687; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)10688; GFX11-NEXT: v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo10689; GFX11-NEXT: v_add_co_u32 v4, vcc_lo, v4, 310690; GFX11-NEXT: v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo10691; GFX11-NEXT: v_add_co_u32 v2, vcc_lo, v2, 310692; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)10693; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo10694; GFX11-NEXT: v_add_co_u32 v0, vcc_lo, v0, 310695; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo10696; GFX11-NEXT: .LBB52_2: ; %end10697; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s010698; GFX11-NEXT: s_setpc_b64 s[30:31]10699 %cmp = icmp eq i32 %b, 010700 br i1 %cmp, label %cmp.true, label %cmp.false10701 10702cmp.true:10703 %a1 = add <6 x i64> %a, splat (i64 3)10704 %a2 = bitcast <6 x i64> %a1 to <24 x half>10705 br label %end10706 10707cmp.false:10708 %a3 = bitcast <6 x i64> %a to <24 x half>10709 br label %end10710 10711end:10712 %phi = phi <24 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]10713 ret <24 x half> %phi10714}10715 10716define inreg <24 x half> @bitcast_v6i64_to_v24f16_scalar(<6 x i64> inreg %a, i32 inreg %b) {10717; SI-LABEL: bitcast_v6i64_to_v24f16_scalar:10718; SI: ; %bb.0:10719; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10720; SI-NEXT: s_cmp_lg_u32 s28, 010721; SI-NEXT: s_cbranch_scc0 .LBB53_410722; SI-NEXT: ; %bb.1: ; %cmp.false10723; SI-NEXT: s_lshr_b32 s4, s27, 1610724; SI-NEXT: v_cvt_f32_f16_e32 v23, s410725; SI-NEXT: s_lshr_b32 s4, s26, 1610726; SI-NEXT: v_cvt_f32_f16_e32 v21, s410727; SI-NEXT: s_lshr_b32 s4, s25, 1610728; SI-NEXT: v_cvt_f32_f16_e32 v19, s410729; SI-NEXT: s_lshr_b32 s4, s24, 1610730; SI-NEXT: v_cvt_f32_f16_e32 v17, s410731; SI-NEXT: s_lshr_b32 s4, s23, 1610732; SI-NEXT: v_cvt_f32_f16_e32 v15, s410733; SI-NEXT: s_lshr_b32 s4, s22, 1610734; SI-NEXT: v_cvt_f32_f16_e32 v13, s410735; SI-NEXT: s_lshr_b32 s4, s21, 1610736; SI-NEXT: v_cvt_f32_f16_e32 v11, s410737; SI-NEXT: s_lshr_b32 s4, s20, 1610738; SI-NEXT: v_cvt_f32_f16_e32 v9, s410739; SI-NEXT: s_lshr_b32 s4, s19, 1610740; SI-NEXT: v_cvt_f32_f16_e32 v7, s410741; SI-NEXT: s_lshr_b32 s4, s18, 1610742; SI-NEXT: v_cvt_f32_f16_e32 v5, s410743; SI-NEXT: s_lshr_b32 s4, s17, 1610744; SI-NEXT: v_cvt_f32_f16_e32 v3, s410745; SI-NEXT: s_lshr_b32 s4, s16, 1610746; SI-NEXT: v_cvt_f32_f16_e32 v1, s410747; SI-NEXT: v_cvt_f32_f16_e32 v22, s2710748; SI-NEXT: v_cvt_f32_f16_e32 v20, s2610749; SI-NEXT: v_cvt_f32_f16_e32 v18, s2510750; SI-NEXT: v_cvt_f32_f16_e32 v16, s2410751; SI-NEXT: v_cvt_f32_f16_e32 v14, s2310752; SI-NEXT: v_cvt_f32_f16_e32 v12, s2210753; SI-NEXT: v_cvt_f32_f16_e32 v10, s2110754; SI-NEXT: v_cvt_f32_f16_e32 v8, s2010755; SI-NEXT: v_cvt_f32_f16_e32 v6, s1910756; SI-NEXT: v_cvt_f32_f16_e32 v4, s1810757; SI-NEXT: v_cvt_f32_f16_e32 v2, s1710758; SI-NEXT: v_cvt_f32_f16_e32 v0, s1610759; SI-NEXT: s_cbranch_execnz .LBB53_310760; SI-NEXT: .LBB53_2: ; %cmp.true10761; SI-NEXT: s_add_u32 s4, s16, 310762; SI-NEXT: s_addc_u32 s5, s17, 010763; SI-NEXT: s_lshr_b32 s6, s4, 1610764; SI-NEXT: s_lshr_b32 s7, s5, 1610765; SI-NEXT: s_add_u32 s8, s18, 310766; SI-NEXT: s_addc_u32 s9, s19, 010767; SI-NEXT: s_lshr_b32 s10, s8, 1610768; SI-NEXT: s_lshr_b32 s11, s9, 1610769; SI-NEXT: s_add_u32 s12, s20, 310770; SI-NEXT: s_addc_u32 s13, s21, 010771; SI-NEXT: s_lshr_b32 s14, s12, 1610772; SI-NEXT: s_lshr_b32 s15, s13, 1610773; SI-NEXT: s_add_u32 s16, s22, 310774; SI-NEXT: s_addc_u32 s17, s23, 010775; SI-NEXT: s_lshr_b32 s18, s16, 1610776; SI-NEXT: s_lshr_b32 s19, s17, 1610777; SI-NEXT: s_add_u32 s20, s24, 310778; SI-NEXT: s_addc_u32 s21, s25, 010779; SI-NEXT: s_lshr_b32 s22, s20, 1610780; SI-NEXT: s_lshr_b32 s23, s21, 1610781; SI-NEXT: s_add_u32 s24, s26, 310782; SI-NEXT: s_addc_u32 s25, s27, 010783; SI-NEXT: s_lshr_b32 s26, s24, 1610784; SI-NEXT: s_lshr_b32 s27, s25, 1610785; SI-NEXT: v_cvt_f32_f16_e32 v22, s2510786; SI-NEXT: v_cvt_f32_f16_e32 v20, s2410787; SI-NEXT: v_cvt_f32_f16_e32 v18, s2110788; SI-NEXT: v_cvt_f32_f16_e32 v16, s2010789; SI-NEXT: v_cvt_f32_f16_e32 v14, s1710790; SI-NEXT: v_cvt_f32_f16_e32 v12, s1610791; SI-NEXT: v_cvt_f32_f16_e32 v10, s1310792; SI-NEXT: v_cvt_f32_f16_e32 v8, s1210793; SI-NEXT: v_cvt_f32_f16_e32 v6, s910794; SI-NEXT: v_cvt_f32_f16_e32 v4, s810795; SI-NEXT: v_cvt_f32_f16_e32 v2, s510796; SI-NEXT: v_cvt_f32_f16_e32 v0, s410797; SI-NEXT: v_cvt_f32_f16_e32 v23, s2710798; SI-NEXT: v_cvt_f32_f16_e32 v21, s2610799; SI-NEXT: v_cvt_f32_f16_e32 v19, s2310800; SI-NEXT: v_cvt_f32_f16_e32 v17, s2210801; SI-NEXT: v_cvt_f32_f16_e32 v15, s1910802; SI-NEXT: v_cvt_f32_f16_e32 v13, s1810803; SI-NEXT: v_cvt_f32_f16_e32 v11, s1510804; SI-NEXT: v_cvt_f32_f16_e32 v9, s1410805; SI-NEXT: v_cvt_f32_f16_e32 v7, s1110806; SI-NEXT: v_cvt_f32_f16_e32 v5, s1010807; SI-NEXT: v_cvt_f32_f16_e32 v3, s710808; SI-NEXT: v_cvt_f32_f16_e32 v1, s610809; SI-NEXT: .LBB53_3: ; %end10810; SI-NEXT: s_setpc_b64 s[30:31]10811; SI-NEXT: .LBB53_4:10812; SI-NEXT: ; implicit-def: $vgpr010813; SI-NEXT: ; implicit-def: $vgpr110814; SI-NEXT: ; implicit-def: $vgpr210815; SI-NEXT: ; implicit-def: $vgpr310816; SI-NEXT: ; implicit-def: $vgpr410817; SI-NEXT: ; implicit-def: $vgpr510818; SI-NEXT: ; implicit-def: $vgpr610819; SI-NEXT: ; implicit-def: $vgpr710820; SI-NEXT: ; implicit-def: $vgpr810821; SI-NEXT: ; implicit-def: $vgpr910822; SI-NEXT: ; implicit-def: $vgpr1010823; SI-NEXT: ; implicit-def: $vgpr1110824; SI-NEXT: ; implicit-def: $vgpr1210825; SI-NEXT: ; implicit-def: $vgpr1310826; SI-NEXT: ; implicit-def: $vgpr1410827; SI-NEXT: ; implicit-def: $vgpr1510828; SI-NEXT: ; implicit-def: $vgpr1610829; SI-NEXT: ; implicit-def: $vgpr1710830; SI-NEXT: ; implicit-def: $vgpr1810831; SI-NEXT: ; implicit-def: $vgpr1910832; SI-NEXT: ; implicit-def: $vgpr2010833; SI-NEXT: ; implicit-def: $vgpr2110834; SI-NEXT: ; implicit-def: $vgpr2210835; SI-NEXT: ; implicit-def: $vgpr2310836; SI-NEXT: s_branch .LBB53_210837;10838; VI-LABEL: bitcast_v6i64_to_v24f16_scalar:10839; VI: ; %bb.0:10840; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10841; VI-NEXT: s_cmp_lg_u32 s28, 010842; VI-NEXT: s_cbranch_scc0 .LBB53_410843; VI-NEXT: ; %bb.1: ; %cmp.false10844; VI-NEXT: s_cbranch_execnz .LBB53_310845; VI-NEXT: .LBB53_2: ; %cmp.true10846; VI-NEXT: s_add_u32 s26, s26, 310847; VI-NEXT: s_addc_u32 s27, s27, 010848; VI-NEXT: s_add_u32 s24, s24, 310849; VI-NEXT: s_addc_u32 s25, s25, 010850; VI-NEXT: s_add_u32 s22, s22, 310851; VI-NEXT: s_addc_u32 s23, s23, 010852; VI-NEXT: s_add_u32 s20, s20, 310853; VI-NEXT: s_addc_u32 s21, s21, 010854; VI-NEXT: s_add_u32 s18, s18, 310855; VI-NEXT: s_addc_u32 s19, s19, 010856; VI-NEXT: s_add_u32 s16, s16, 310857; VI-NEXT: s_addc_u32 s17, s17, 010858; VI-NEXT: .LBB53_3: ; %end10859; VI-NEXT: v_mov_b32_e32 v0, s1610860; VI-NEXT: v_mov_b32_e32 v1, s1710861; VI-NEXT: v_mov_b32_e32 v2, s1810862; VI-NEXT: v_mov_b32_e32 v3, s1910863; VI-NEXT: v_mov_b32_e32 v4, s2010864; VI-NEXT: v_mov_b32_e32 v5, s2110865; VI-NEXT: v_mov_b32_e32 v6, s2210866; VI-NEXT: v_mov_b32_e32 v7, s2310867; VI-NEXT: v_mov_b32_e32 v8, s2410868; VI-NEXT: v_mov_b32_e32 v9, s2510869; VI-NEXT: v_mov_b32_e32 v10, s2610870; VI-NEXT: v_mov_b32_e32 v11, s2710871; VI-NEXT: s_setpc_b64 s[30:31]10872; VI-NEXT: .LBB53_4:10873; VI-NEXT: s_branch .LBB53_210874;10875; GFX9-LABEL: bitcast_v6i64_to_v24f16_scalar:10876; GFX9: ; %bb.0:10877; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10878; GFX9-NEXT: s_cmp_lg_u32 s28, 010879; GFX9-NEXT: s_cbranch_scc0 .LBB53_410880; GFX9-NEXT: ; %bb.1: ; %cmp.false10881; GFX9-NEXT: s_cbranch_execnz .LBB53_310882; GFX9-NEXT: .LBB53_2: ; %cmp.true10883; GFX9-NEXT: s_add_u32 s26, s26, 310884; GFX9-NEXT: s_addc_u32 s27, s27, 010885; GFX9-NEXT: s_add_u32 s24, s24, 310886; GFX9-NEXT: s_addc_u32 s25, s25, 010887; GFX9-NEXT: s_add_u32 s22, s22, 310888; GFX9-NEXT: s_addc_u32 s23, s23, 010889; GFX9-NEXT: s_add_u32 s20, s20, 310890; GFX9-NEXT: s_addc_u32 s21, s21, 010891; GFX9-NEXT: s_add_u32 s18, s18, 310892; GFX9-NEXT: s_addc_u32 s19, s19, 010893; GFX9-NEXT: s_add_u32 s16, s16, 310894; GFX9-NEXT: s_addc_u32 s17, s17, 010895; GFX9-NEXT: .LBB53_3: ; %end10896; GFX9-NEXT: v_mov_b32_e32 v0, s1610897; GFX9-NEXT: v_mov_b32_e32 v1, s1710898; GFX9-NEXT: v_mov_b32_e32 v2, s1810899; GFX9-NEXT: v_mov_b32_e32 v3, s1910900; GFX9-NEXT: v_mov_b32_e32 v4, s2010901; GFX9-NEXT: v_mov_b32_e32 v5, s2110902; GFX9-NEXT: v_mov_b32_e32 v6, s2210903; GFX9-NEXT: v_mov_b32_e32 v7, s2310904; GFX9-NEXT: v_mov_b32_e32 v8, s2410905; GFX9-NEXT: v_mov_b32_e32 v9, s2510906; GFX9-NEXT: v_mov_b32_e32 v10, s2610907; GFX9-NEXT: v_mov_b32_e32 v11, s2710908; GFX9-NEXT: s_setpc_b64 s[30:31]10909; GFX9-NEXT: .LBB53_4:10910; GFX9-NEXT: s_branch .LBB53_210911;10912; GFX11-LABEL: bitcast_v6i64_to_v24f16_scalar:10913; GFX11: ; %bb.0:10914; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10915; GFX11-NEXT: s_cmp_lg_u32 s24, 010916; GFX11-NEXT: s_mov_b32 s4, 010917; GFX11-NEXT: s_cbranch_scc0 .LBB53_410918; GFX11-NEXT: ; %bb.1: ; %Flow10919; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s410920; GFX11-NEXT: s_cbranch_vccnz .LBB53_310921; GFX11-NEXT: .LBB53_2: ; %cmp.true10922; GFX11-NEXT: s_add_u32 s22, s22, 310923; GFX11-NEXT: s_addc_u32 s23, s23, 010924; GFX11-NEXT: s_add_u32 s20, s20, 310925; GFX11-NEXT: s_addc_u32 s21, s21, 010926; GFX11-NEXT: s_add_u32 s18, s18, 310927; GFX11-NEXT: s_addc_u32 s19, s19, 010928; GFX11-NEXT: s_add_u32 s16, s16, 310929; GFX11-NEXT: s_addc_u32 s17, s17, 010930; GFX11-NEXT: s_add_u32 s2, s2, 310931; GFX11-NEXT: s_addc_u32 s3, s3, 010932; GFX11-NEXT: s_add_u32 s0, s0, 310933; GFX11-NEXT: s_addc_u32 s1, s1, 010934; GFX11-NEXT: .LBB53_3: ; %end10935; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)10936; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s110937; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s310938; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s1710939; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s1910940; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s2110941; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s2310942; GFX11-NEXT: s_setpc_b64 s[30:31]10943; GFX11-NEXT: .LBB53_4:10944; GFX11-NEXT: s_branch .LBB53_210945 %cmp = icmp eq i32 %b, 010946 br i1 %cmp, label %cmp.true, label %cmp.false10947 10948cmp.true:10949 %a1 = add <6 x i64> %a, splat (i64 3)10950 %a2 = bitcast <6 x i64> %a1 to <24 x half>10951 br label %end10952 10953cmp.false:10954 %a3 = bitcast <6 x i64> %a to <24 x half>10955 br label %end10956 10957end:10958 %phi = phi <24 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]10959 ret <24 x half> %phi10960}10961 10962define <6 x i64> @bitcast_v24f16_to_v6i64(<24 x half> %a, i32 %b) {10963; SI-LABEL: bitcast_v24f16_to_v6i64:10964; SI: ; %bb.0:10965; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10966; SI-NEXT: v_cvt_f16_f32_e32 v52, v110967; SI-NEXT: v_cvt_f16_f32_e32 v51, v010968; SI-NEXT: v_cvt_f16_f32_e32 v50, v310969; SI-NEXT: v_cvt_f16_f32_e32 v49, v210970; SI-NEXT: v_cvt_f16_f32_e32 v48, v510971; SI-NEXT: v_cvt_f16_f32_e32 v39, v410972; SI-NEXT: v_cvt_f16_f32_e32 v38, v710973; SI-NEXT: v_cvt_f16_f32_e32 v37, v610974; SI-NEXT: v_cvt_f16_f32_e32 v36, v910975; SI-NEXT: v_cvt_f16_f32_e32 v35, v810976; SI-NEXT: v_cvt_f16_f32_e32 v34, v1110977; SI-NEXT: v_cvt_f16_f32_e32 v33, v1010978; SI-NEXT: v_cvt_f16_f32_e32 v32, v1310979; SI-NEXT: v_cvt_f16_f32_e32 v31, v1210980; SI-NEXT: v_cvt_f16_f32_e32 v30, v1510981; SI-NEXT: v_cvt_f16_f32_e32 v29, v1410982; SI-NEXT: v_cvt_f16_f32_e32 v28, v1710983; SI-NEXT: v_cvt_f16_f32_e32 v27, v1610984; SI-NEXT: v_cvt_f16_f32_e32 v26, v1910985; SI-NEXT: v_cvt_f16_f32_e32 v25, v1810986; SI-NEXT: v_cvt_f16_f32_e32 v19, v2110987; SI-NEXT: v_cvt_f16_f32_e32 v18, v2010988; SI-NEXT: v_cvt_f16_f32_e32 v17, v2310989; SI-NEXT: v_cvt_f16_f32_e32 v16, v2210990; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2410991; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr1510992; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc10993; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]10994; SI-NEXT: s_cbranch_execnz .LBB54_310995; SI-NEXT: ; %bb.1: ; %Flow10996; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10997; SI-NEXT: s_cbranch_execnz .LBB54_410998; SI-NEXT: .LBB54_2: ; %end10999; SI-NEXT: s_or_b64 exec, exec, s[4:5]11000; SI-NEXT: s_setpc_b64 s[30:31]11001; SI-NEXT: .LBB54_3: ; %cmp.false11002; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5211003; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v5011004; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v4811005; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3811006; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v3611007; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v3411008; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3211009; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v3011010; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v2811011; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v2611012; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v1911013; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v1711014; SI-NEXT: v_or_b32_e32 v0, v51, v011015; SI-NEXT: v_or_b32_e32 v1, v49, v111016; SI-NEXT: v_or_b32_e32 v2, v39, v211017; SI-NEXT: v_or_b32_e32 v3, v37, v311018; SI-NEXT: v_or_b32_e32 v4, v35, v411019; SI-NEXT: v_or_b32_e32 v5, v33, v511020; SI-NEXT: v_or_b32_e32 v6, v31, v611021; SI-NEXT: v_or_b32_e32 v7, v29, v711022; SI-NEXT: v_or_b32_e32 v8, v27, v811023; SI-NEXT: v_or_b32_e32 v9, v25, v911024; SI-NEXT: v_or_b32_e32 v10, v18, v1011025; SI-NEXT: v_or_b32_e32 v11, v16, v1111026; SI-NEXT: ; implicit-def: $vgpr5211027; SI-NEXT: ; implicit-def: $vgpr5111028; SI-NEXT: ; implicit-def: $vgpr5011029; SI-NEXT: ; implicit-def: $vgpr4911030; SI-NEXT: ; implicit-def: $vgpr4811031; SI-NEXT: ; implicit-def: $vgpr3911032; SI-NEXT: ; implicit-def: $vgpr3811033; SI-NEXT: ; implicit-def: $vgpr3711034; SI-NEXT: ; implicit-def: $vgpr3611035; SI-NEXT: ; implicit-def: $vgpr3511036; SI-NEXT: ; implicit-def: $vgpr3411037; SI-NEXT: ; implicit-def: $vgpr3311038; SI-NEXT: ; implicit-def: $vgpr3211039; SI-NEXT: ; implicit-def: $vgpr3111040; SI-NEXT: ; implicit-def: $vgpr3011041; SI-NEXT: ; implicit-def: $vgpr2911042; SI-NEXT: ; implicit-def: $vgpr2811043; SI-NEXT: ; implicit-def: $vgpr2711044; SI-NEXT: ; implicit-def: $vgpr2611045; SI-NEXT: ; implicit-def: $vgpr2511046; SI-NEXT: ; implicit-def: $vgpr1911047; SI-NEXT: ; implicit-def: $vgpr1811048; SI-NEXT: ; implicit-def: $vgpr1711049; SI-NEXT: ; implicit-def: $vgpr1611050; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]11051; SI-NEXT: s_cbranch_execz .LBB54_211052; SI-NEXT: .LBB54_4: ; %cmp.true11053; SI-NEXT: v_cvt_f32_f16_e32 v0, v5211054; SI-NEXT: v_cvt_f32_f16_e32 v2, v5011055; SI-NEXT: v_cvt_f32_f16_e32 v1, v5111056; SI-NEXT: v_cvt_f32_f16_e32 v3, v4911057; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v011058; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v211059; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v111060; SI-NEXT: v_cvt_f16_f32_e32 v0, v011061; SI-NEXT: v_cvt_f16_f32_e32 v2, v211062; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v311063; SI-NEXT: v_cvt_f16_f32_e32 v1, v111064; SI-NEXT: v_cvt_f16_f32_e32 v3, v311065; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v011066; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v211067; SI-NEXT: v_or_b32_e32 v0, v1, v011068; SI-NEXT: v_or_b32_e32 v1, v3, v211069; SI-NEXT: v_cvt_f32_f16_e32 v2, v4811070; SI-NEXT: v_cvt_f32_f16_e32 v3, v3911071; SI-NEXT: v_cvt_f32_f16_e32 v4, v3811072; SI-NEXT: v_cvt_f32_f16_e32 v5, v3711073; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v211074; SI-NEXT: v_cvt_f16_f32_e32 v2, v211075; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v311076; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v411077; SI-NEXT: v_cvt_f16_f32_e32 v3, v311078; SI-NEXT: v_cvt_f16_f32_e32 v4, v411079; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v511080; SI-NEXT: v_cvt_f16_f32_e32 v5, v511081; SI-NEXT: v_cvt_f32_f16_e32 v6, v3611082; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v211083; SI-NEXT: v_or_b32_e32 v2, v3, v211084; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v411085; SI-NEXT: v_or_b32_e32 v3, v5, v311086; SI-NEXT: v_cvt_f32_f16_e32 v4, v3511087; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v611088; SI-NEXT: v_cvt_f32_f16_e32 v6, v3411089; SI-NEXT: v_cvt_f16_f32_e32 v5, v511090; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v411091; SI-NEXT: v_cvt_f16_f32_e32 v4, v411092; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v611093; SI-NEXT: v_cvt_f16_f32_e32 v6, v611094; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v511095; SI-NEXT: v_cvt_f32_f16_e32 v7, v3311096; SI-NEXT: v_or_b32_e32 v4, v4, v511097; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v611098; SI-NEXT: v_cvt_f32_f16_e32 v6, v3211099; SI-NEXT: v_cvt_f32_f16_e32 v8, v3111100; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v711101; SI-NEXT: v_cvt_f16_f32_e32 v7, v711102; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v611103; SI-NEXT: v_cvt_f16_f32_e32 v6, v611104; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v811105; SI-NEXT: v_cvt_f16_f32_e32 v8, v811106; SI-NEXT: v_or_b32_e32 v5, v7, v511107; SI-NEXT: v_cvt_f32_f16_e32 v7, v3011108; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v611109; SI-NEXT: v_or_b32_e32 v6, v8, v611110; SI-NEXT: v_cvt_f32_f16_e32 v8, v2911111; SI-NEXT: v_cvt_f32_f16_e32 v9, v2811112; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v711113; SI-NEXT: v_cvt_f16_f32_e32 v7, v711114; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v811115; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v911116; SI-NEXT: v_cvt_f16_f32_e32 v8, v811117; SI-NEXT: v_cvt_f16_f32_e32 v9, v911118; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v711119; SI-NEXT: v_cvt_f32_f16_e32 v10, v2711120; SI-NEXT: v_or_b32_e32 v7, v8, v711121; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v911122; SI-NEXT: v_cvt_f32_f16_e32 v9, v2611123; SI-NEXT: v_cvt_f32_f16_e32 v11, v2511124; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v1011125; SI-NEXT: v_cvt_f16_f32_e32 v10, v1011126; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v911127; SI-NEXT: v_cvt_f16_f32_e32 v9, v911128; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v1111129; SI-NEXT: v_cvt_f16_f32_e32 v11, v1111130; SI-NEXT: v_or_b32_e32 v8, v10, v811131; SI-NEXT: v_cvt_f32_f16_e32 v10, v1911132; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v911133; SI-NEXT: v_or_b32_e32 v9, v11, v911134; SI-NEXT: v_cvt_f32_f16_e32 v11, v1811135; SI-NEXT: v_cvt_f32_f16_e32 v12, v1711136; SI-NEXT: v_cvt_f32_f16_e32 v13, v1611137; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v1011138; SI-NEXT: v_cvt_f16_f32_e32 v10, v1011139; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v1111140; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v1211141; SI-NEXT: v_cvt_f16_f32_e32 v11, v1111142; SI-NEXT: v_cvt_f16_f32_e32 v12, v1211143; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v1311144; SI-NEXT: v_cvt_f16_f32_e32 v13, v1311145; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v1011146; SI-NEXT: v_or_b32_e32 v10, v11, v1011147; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v1211148; SI-NEXT: v_or_b32_e32 v11, v13, v1111149; SI-NEXT: s_or_b64 exec, exec, s[4:5]11150; SI-NEXT: s_setpc_b64 s[30:31]11151;11152; VI-LABEL: bitcast_v24f16_to_v6i64:11153; VI: ; %bb.0:11154; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11155; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1211156; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc11157; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]11158; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]11159; VI-NEXT: s_cbranch_execz .LBB54_211160; VI-NEXT: ; %bb.1: ; %cmp.true11161; VI-NEXT: v_mov_b32_e32 v12, 0x20011162; VI-NEXT: v_add_f16_sdwa v13, v11, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11163; VI-NEXT: v_add_f16_e32 v11, 0x200, v1111164; VI-NEXT: v_or_b32_e32 v11, v11, v1311165; VI-NEXT: v_add_f16_sdwa v13, v10, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11166; VI-NEXT: v_add_f16_e32 v10, 0x200, v1011167; VI-NEXT: v_or_b32_e32 v10, v10, v1311168; VI-NEXT: v_add_f16_sdwa v13, v9, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11169; VI-NEXT: v_add_f16_e32 v9, 0x200, v911170; VI-NEXT: v_or_b32_e32 v9, v9, v1311171; VI-NEXT: v_add_f16_sdwa v13, v8, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11172; VI-NEXT: v_add_f16_e32 v8, 0x200, v811173; VI-NEXT: v_or_b32_e32 v8, v8, v1311174; VI-NEXT: v_add_f16_sdwa v13, v7, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11175; VI-NEXT: v_add_f16_e32 v7, 0x200, v711176; VI-NEXT: v_or_b32_e32 v7, v7, v1311177; VI-NEXT: v_add_f16_sdwa v13, v6, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11178; VI-NEXT: v_add_f16_e32 v6, 0x200, v611179; VI-NEXT: v_or_b32_e32 v6, v6, v1311180; VI-NEXT: v_add_f16_sdwa v13, v5, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11181; VI-NEXT: v_add_f16_e32 v5, 0x200, v511182; VI-NEXT: v_or_b32_e32 v5, v5, v1311183; VI-NEXT: v_add_f16_sdwa v13, v4, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11184; VI-NEXT: v_add_f16_e32 v4, 0x200, v411185; VI-NEXT: v_or_b32_e32 v4, v4, v1311186; VI-NEXT: v_add_f16_sdwa v13, v3, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11187; VI-NEXT: v_add_f16_e32 v3, 0x200, v311188; VI-NEXT: v_or_b32_e32 v3, v3, v1311189; VI-NEXT: v_add_f16_sdwa v13, v2, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11190; VI-NEXT: v_add_f16_e32 v2, 0x200, v211191; VI-NEXT: v_or_b32_e32 v2, v2, v1311192; VI-NEXT: v_add_f16_sdwa v13, v1, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11193; VI-NEXT: v_add_f16_e32 v1, 0x200, v111194; VI-NEXT: v_add_f16_sdwa v12, v0, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11195; VI-NEXT: v_add_f16_e32 v0, 0x200, v011196; VI-NEXT: v_or_b32_e32 v1, v1, v1311197; VI-NEXT: v_or_b32_e32 v0, v0, v1211198; VI-NEXT: .LBB54_2: ; %end11199; VI-NEXT: s_or_b64 exec, exec, s[4:5]11200; VI-NEXT: s_setpc_b64 s[30:31]11201;11202; GFX9-LABEL: bitcast_v24f16_to_v6i64:11203; GFX9: ; %bb.0:11204; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11205; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1211206; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc11207; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]11208; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]11209; GFX9-NEXT: s_cbranch_execz .LBB54_211210; GFX9-NEXT: ; %bb.1: ; %cmp.true11211; GFX9-NEXT: s_movk_i32 s6, 0x20011212; GFX9-NEXT: v_pk_add_f16 v11, v11, s6 op_sel_hi:[1,0]11213; GFX9-NEXT: v_pk_add_f16 v10, v10, s6 op_sel_hi:[1,0]11214; GFX9-NEXT: v_pk_add_f16 v9, v9, s6 op_sel_hi:[1,0]11215; GFX9-NEXT: v_pk_add_f16 v8, v8, s6 op_sel_hi:[1,0]11216; GFX9-NEXT: v_pk_add_f16 v7, v7, s6 op_sel_hi:[1,0]11217; GFX9-NEXT: v_pk_add_f16 v6, v6, s6 op_sel_hi:[1,0]11218; GFX9-NEXT: v_pk_add_f16 v5, v5, s6 op_sel_hi:[1,0]11219; GFX9-NEXT: v_pk_add_f16 v4, v4, s6 op_sel_hi:[1,0]11220; GFX9-NEXT: v_pk_add_f16 v3, v3, s6 op_sel_hi:[1,0]11221; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0]11222; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0]11223; GFX9-NEXT: v_pk_add_f16 v0, v0, s6 op_sel_hi:[1,0]11224; GFX9-NEXT: .LBB54_2: ; %end11225; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]11226; GFX9-NEXT: s_setpc_b64 s[30:31]11227;11228; GFX11-LABEL: bitcast_v24f16_to_v6i64:11229; GFX11: ; %bb.0:11230; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11231; GFX11-NEXT: s_mov_b32 s0, exec_lo11232; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v1211233; GFX11-NEXT: s_xor_b32 s0, exec_lo, s011234; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)11235; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s011236; GFX11-NEXT: s_cbranch_execz .LBB54_211237; GFX11-NEXT: ; %bb.1: ; %cmp.true11238; GFX11-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]11239; GFX11-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]11240; GFX11-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]11241; GFX11-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]11242; GFX11-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]11243; GFX11-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]11244; GFX11-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]11245; GFX11-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]11246; GFX11-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]11247; GFX11-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]11248; GFX11-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]11249; GFX11-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]11250; GFX11-NEXT: .LBB54_2: ; %end11251; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s011252; GFX11-NEXT: s_setpc_b64 s[30:31]11253 %cmp = icmp eq i32 %b, 011254 br i1 %cmp, label %cmp.true, label %cmp.false11255 11256cmp.true:11257 %a1 = fadd <24 x half> %a, splat (half 0xH0200)11258 %a2 = bitcast <24 x half> %a1 to <6 x i64>11259 br label %end11260 11261cmp.false:11262 %a3 = bitcast <24 x half> %a to <6 x i64>11263 br label %end11264 11265end:11266 %phi = phi <6 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]11267 ret <6 x i64> %phi11268}11269 11270define inreg <6 x i64> @bitcast_v24f16_to_v6i64_scalar(<24 x half> inreg %a, i32 inreg %b) {11271; SI-LABEL: bitcast_v24f16_to_v6i64_scalar:11272; SI: ; %bb.0:11273; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11274; SI-NEXT: v_cvt_f16_f32_e32 v39, s1711275; SI-NEXT: v_cvt_f16_f32_e32 v38, s1611276; SI-NEXT: v_cvt_f16_f32_e32 v37, s1911277; SI-NEXT: v_cvt_f16_f32_e32 v36, s1811278; SI-NEXT: v_cvt_f16_f32_e32 v35, s2111279; SI-NEXT: v_cvt_f16_f32_e32 v34, s2011280; SI-NEXT: v_cvt_f16_f32_e32 v33, s2311281; SI-NEXT: v_cvt_f16_f32_e32 v32, s2211282; SI-NEXT: v_cvt_f16_f32_e32 v30, s2511283; SI-NEXT: v_cvt_f16_f32_e32 v28, s2411284; SI-NEXT: v_cvt_f16_f32_e32 v25, v111285; SI-NEXT: v_cvt_f16_f32_e32 v24, v011286; SI-NEXT: v_cvt_f16_f32_e32 v23, v311287; SI-NEXT: v_cvt_f16_f32_e32 v22, v211288; SI-NEXT: v_cvt_f16_f32_e32 v21, v511289; SI-NEXT: v_cvt_f16_f32_e32 v20, v411290; SI-NEXT: v_cvt_f16_f32_e32 v19, v711291; SI-NEXT: v_cvt_f16_f32_e32 v18, v611292; SI-NEXT: v_cvt_f16_f32_e32 v17, v911293; SI-NEXT: v_cvt_f16_f32_e32 v16, v811294; SI-NEXT: v_cvt_f16_f32_e32 v31, s2711295; SI-NEXT: v_cvt_f16_f32_e32 v29, s2611296; SI-NEXT: v_cvt_f16_f32_e32 v27, s2911297; SI-NEXT: v_cvt_f16_f32_e32 v26, s2811298; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1011299; SI-NEXT: s_and_b64 s[4:5], vcc, exec11300; SI-NEXT: s_cbranch_scc0 .LBB55_411301; SI-NEXT: ; %bb.1: ; %cmp.false11302; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3911303; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v3711304; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v3511305; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3311306; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v3011307; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v3111308; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v2711309; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v2511310; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v2311311; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v2111312; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v1911313; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v1711314; SI-NEXT: v_or_b32_e32 v0, v38, v011315; SI-NEXT: v_or_b32_e32 v1, v36, v111316; SI-NEXT: v_or_b32_e32 v2, v34, v211317; SI-NEXT: v_or_b32_e32 v3, v32, v311318; SI-NEXT: v_or_b32_e32 v4, v28, v411319; SI-NEXT: v_or_b32_e32 v5, v29, v511320; SI-NEXT: v_or_b32_e32 v6, v26, v611321; SI-NEXT: v_or_b32_e32 v7, v24, v711322; SI-NEXT: v_or_b32_e32 v8, v22, v811323; SI-NEXT: v_or_b32_e32 v9, v20, v911324; SI-NEXT: v_or_b32_e32 v10, v18, v1011325; SI-NEXT: v_or_b32_e32 v11, v16, v1111326; SI-NEXT: s_cbranch_execnz .LBB55_311327; SI-NEXT: .LBB55_2: ; %cmp.true11328; SI-NEXT: v_cvt_f32_f16_e32 v0, v3911329; SI-NEXT: v_cvt_f32_f16_e32 v2, v3711330; SI-NEXT: v_cvt_f32_f16_e32 v1, v3811331; SI-NEXT: v_cvt_f32_f16_e32 v3, v3611332; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v011333; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v211334; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v111335; SI-NEXT: v_cvt_f16_f32_e32 v0, v011336; SI-NEXT: v_cvt_f16_f32_e32 v2, v211337; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v311338; SI-NEXT: v_cvt_f16_f32_e32 v1, v111339; SI-NEXT: v_cvt_f16_f32_e32 v3, v311340; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v011341; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v211342; SI-NEXT: v_or_b32_e32 v0, v1, v011343; SI-NEXT: v_or_b32_e32 v1, v3, v211344; SI-NEXT: v_cvt_f32_f16_e32 v2, v3511345; SI-NEXT: v_cvt_f32_f16_e32 v3, v3411346; SI-NEXT: v_cvt_f32_f16_e32 v4, v3311347; SI-NEXT: v_cvt_f32_f16_e32 v5, v3211348; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v211349; SI-NEXT: v_cvt_f16_f32_e32 v2, v211350; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v311351; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v411352; SI-NEXT: v_cvt_f16_f32_e32 v3, v311353; SI-NEXT: v_cvt_f16_f32_e32 v4, v411354; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v511355; SI-NEXT: v_cvt_f16_f32_e32 v5, v511356; SI-NEXT: v_cvt_f32_f16_e32 v6, v3011357; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v211358; SI-NEXT: v_or_b32_e32 v2, v3, v211359; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v411360; SI-NEXT: v_or_b32_e32 v3, v5, v311361; SI-NEXT: v_cvt_f32_f16_e32 v4, v2811362; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v611363; SI-NEXT: v_cvt_f32_f16_e32 v6, v3111364; SI-NEXT: v_cvt_f16_f32_e32 v5, v511365; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v411366; SI-NEXT: v_cvt_f16_f32_e32 v4, v411367; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v611368; SI-NEXT: v_cvt_f16_f32_e32 v6, v611369; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v511370; SI-NEXT: v_cvt_f32_f16_e32 v7, v2911371; SI-NEXT: v_or_b32_e32 v4, v4, v511372; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v611373; SI-NEXT: v_cvt_f32_f16_e32 v6, v2711374; SI-NEXT: v_cvt_f32_f16_e32 v8, v2611375; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v711376; SI-NEXT: v_cvt_f16_f32_e32 v7, v711377; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v611378; SI-NEXT: v_cvt_f16_f32_e32 v6, v611379; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v811380; SI-NEXT: v_cvt_f16_f32_e32 v8, v811381; SI-NEXT: v_or_b32_e32 v5, v7, v511382; SI-NEXT: v_cvt_f32_f16_e32 v7, v2511383; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v611384; SI-NEXT: v_or_b32_e32 v6, v8, v611385; SI-NEXT: v_cvt_f32_f16_e32 v8, v2411386; SI-NEXT: v_cvt_f32_f16_e32 v9, v2311387; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v711388; SI-NEXT: v_cvt_f16_f32_e32 v7, v711389; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v811390; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v911391; SI-NEXT: v_cvt_f16_f32_e32 v8, v811392; SI-NEXT: v_cvt_f16_f32_e32 v9, v911393; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v711394; SI-NEXT: v_cvt_f32_f16_e32 v10, v2211395; SI-NEXT: v_or_b32_e32 v7, v8, v711396; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v911397; SI-NEXT: v_cvt_f32_f16_e32 v9, v2111398; SI-NEXT: v_cvt_f32_f16_e32 v11, v2011399; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v1011400; SI-NEXT: v_cvt_f16_f32_e32 v10, v1011401; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v911402; SI-NEXT: v_cvt_f16_f32_e32 v9, v911403; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v1111404; SI-NEXT: v_cvt_f16_f32_e32 v11, v1111405; SI-NEXT: v_or_b32_e32 v8, v10, v811406; SI-NEXT: v_cvt_f32_f16_e32 v10, v1911407; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v911408; SI-NEXT: v_or_b32_e32 v9, v11, v911409; SI-NEXT: v_cvt_f32_f16_e32 v11, v1811410; SI-NEXT: v_cvt_f32_f16_e32 v12, v1711411; SI-NEXT: v_cvt_f32_f16_e32 v13, v1611412; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v1011413; SI-NEXT: v_cvt_f16_f32_e32 v10, v1011414; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v1111415; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v1211416; SI-NEXT: v_cvt_f16_f32_e32 v11, v1111417; SI-NEXT: v_cvt_f16_f32_e32 v12, v1211418; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v1311419; SI-NEXT: v_cvt_f16_f32_e32 v13, v1311420; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v1011421; SI-NEXT: v_or_b32_e32 v10, v11, v1011422; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v1211423; SI-NEXT: v_or_b32_e32 v11, v13, v1111424; SI-NEXT: .LBB55_3: ; %end11425; SI-NEXT: s_setpc_b64 s[30:31]11426; SI-NEXT: .LBB55_4:11427; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr1511428; SI-NEXT: s_branch .LBB55_211429;11430; VI-LABEL: bitcast_v24f16_to_v6i64_scalar:11431; VI: ; %bb.0:11432; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11433; VI-NEXT: s_cmp_lg_u32 s28, 011434; VI-NEXT: s_cbranch_scc0 .LBB55_311435; VI-NEXT: ; %bb.1: ; %cmp.false11436; VI-NEXT: s_cbranch_execnz .LBB55_411437; VI-NEXT: .LBB55_2: ; %cmp.true11438; VI-NEXT: s_lshr_b32 s4, s27, 1611439; VI-NEXT: v_mov_b32_e32 v0, 0x20011440; VI-NEXT: v_mov_b32_e32 v1, s411441; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD11442; VI-NEXT: v_add_f16_e32 v2, s27, v011443; VI-NEXT: s_lshr_b32 s4, s26, 1611444; VI-NEXT: v_or_b32_e32 v11, v2, v111445; VI-NEXT: v_mov_b32_e32 v1, s411446; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD11447; VI-NEXT: v_add_f16_e32 v2, s26, v011448; VI-NEXT: s_lshr_b32 s4, s25, 1611449; VI-NEXT: v_or_b32_e32 v10, v2, v111450; VI-NEXT: v_mov_b32_e32 v1, s411451; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD11452; VI-NEXT: v_add_f16_e32 v2, s25, v011453; VI-NEXT: s_lshr_b32 s4, s24, 1611454; VI-NEXT: v_or_b32_e32 v9, v2, v111455; VI-NEXT: v_mov_b32_e32 v1, s411456; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD11457; VI-NEXT: v_add_f16_e32 v2, s24, v011458; VI-NEXT: s_lshr_b32 s4, s23, 1611459; VI-NEXT: v_or_b32_e32 v8, v2, v111460; VI-NEXT: v_mov_b32_e32 v1, s411461; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD11462; VI-NEXT: v_add_f16_e32 v2, s23, v011463; VI-NEXT: s_lshr_b32 s4, s22, 1611464; VI-NEXT: v_or_b32_e32 v7, v2, v111465; VI-NEXT: v_mov_b32_e32 v1, s411466; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD11467; VI-NEXT: v_add_f16_e32 v2, s22, v011468; VI-NEXT: s_lshr_b32 s4, s21, 1611469; VI-NEXT: v_or_b32_e32 v6, v2, v111470; VI-NEXT: v_mov_b32_e32 v1, s411471; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD11472; VI-NEXT: v_add_f16_e32 v2, s21, v011473; VI-NEXT: s_lshr_b32 s4, s20, 1611474; VI-NEXT: v_or_b32_e32 v5, v2, v111475; VI-NEXT: v_mov_b32_e32 v1, s411476; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD11477; VI-NEXT: v_add_f16_e32 v2, s20, v011478; VI-NEXT: s_lshr_b32 s4, s19, 1611479; VI-NEXT: v_or_b32_e32 v4, v2, v111480; VI-NEXT: v_mov_b32_e32 v1, s411481; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD11482; VI-NEXT: v_add_f16_e32 v2, s19, v011483; VI-NEXT: s_lshr_b32 s4, s18, 1611484; VI-NEXT: v_or_b32_e32 v3, v2, v111485; VI-NEXT: v_mov_b32_e32 v1, s411486; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD11487; VI-NEXT: v_add_f16_e32 v2, s18, v011488; VI-NEXT: s_lshr_b32 s4, s17, 1611489; VI-NEXT: v_or_b32_e32 v2, v2, v111490; VI-NEXT: v_mov_b32_e32 v1, s411491; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD11492; VI-NEXT: v_add_f16_e32 v12, s17, v011493; VI-NEXT: s_lshr_b32 s4, s16, 1611494; VI-NEXT: v_or_b32_e32 v1, v12, v111495; VI-NEXT: v_mov_b32_e32 v12, s411496; VI-NEXT: v_add_f16_sdwa v12, v12, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD11497; VI-NEXT: v_add_f16_e32 v0, s16, v011498; VI-NEXT: v_or_b32_e32 v0, v0, v1211499; VI-NEXT: s_setpc_b64 s[30:31]11500; VI-NEXT: .LBB55_3:11501; VI-NEXT: s_branch .LBB55_211502; VI-NEXT: .LBB55_4:11503; VI-NEXT: v_mov_b32_e32 v0, s1611504; VI-NEXT: v_mov_b32_e32 v1, s1711505; VI-NEXT: v_mov_b32_e32 v2, s1811506; VI-NEXT: v_mov_b32_e32 v3, s1911507; VI-NEXT: v_mov_b32_e32 v4, s2011508; VI-NEXT: v_mov_b32_e32 v5, s2111509; VI-NEXT: v_mov_b32_e32 v6, s2211510; VI-NEXT: v_mov_b32_e32 v7, s2311511; VI-NEXT: v_mov_b32_e32 v8, s2411512; VI-NEXT: v_mov_b32_e32 v9, s2511513; VI-NEXT: v_mov_b32_e32 v10, s2611514; VI-NEXT: v_mov_b32_e32 v11, s2711515; VI-NEXT: v_mov_b32_e32 v12, s2811516; VI-NEXT: v_mov_b32_e32 v13, s2911517; VI-NEXT: v_mov_b32_e32 v14, s3011518; VI-NEXT: v_mov_b32_e32 v15, s3111519; VI-NEXT: s_setpc_b64 s[30:31]11520;11521; GFX9-LABEL: bitcast_v24f16_to_v6i64_scalar:11522; GFX9: ; %bb.0:11523; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11524; GFX9-NEXT: s_cmp_lg_u32 s28, 011525; GFX9-NEXT: s_cbranch_scc0 .LBB55_311526; GFX9-NEXT: ; %bb.1: ; %cmp.false11527; GFX9-NEXT: s_cbranch_execnz .LBB55_411528; GFX9-NEXT: .LBB55_2: ; %cmp.true11529; GFX9-NEXT: v_mov_b32_e32 v0, 0x20011530; GFX9-NEXT: v_pk_add_f16 v11, s27, v0 op_sel_hi:[1,0]11531; GFX9-NEXT: v_pk_add_f16 v10, s26, v0 op_sel_hi:[1,0]11532; GFX9-NEXT: v_pk_add_f16 v9, s25, v0 op_sel_hi:[1,0]11533; GFX9-NEXT: v_pk_add_f16 v8, s24, v0 op_sel_hi:[1,0]11534; GFX9-NEXT: v_pk_add_f16 v7, s23, v0 op_sel_hi:[1,0]11535; GFX9-NEXT: v_pk_add_f16 v6, s22, v0 op_sel_hi:[1,0]11536; GFX9-NEXT: v_pk_add_f16 v5, s21, v0 op_sel_hi:[1,0]11537; GFX9-NEXT: v_pk_add_f16 v4, s20, v0 op_sel_hi:[1,0]11538; GFX9-NEXT: v_pk_add_f16 v3, s19, v0 op_sel_hi:[1,0]11539; GFX9-NEXT: v_pk_add_f16 v2, s18, v0 op_sel_hi:[1,0]11540; GFX9-NEXT: v_pk_add_f16 v1, s17, v0 op_sel_hi:[1,0]11541; GFX9-NEXT: v_pk_add_f16 v0, s16, v0 op_sel_hi:[1,0]11542; GFX9-NEXT: s_setpc_b64 s[30:31]11543; GFX9-NEXT: .LBB55_3:11544; GFX9-NEXT: s_branch .LBB55_211545; GFX9-NEXT: .LBB55_4:11546; GFX9-NEXT: v_mov_b32_e32 v0, s1611547; GFX9-NEXT: v_mov_b32_e32 v1, s1711548; GFX9-NEXT: v_mov_b32_e32 v2, s1811549; GFX9-NEXT: v_mov_b32_e32 v3, s1911550; GFX9-NEXT: v_mov_b32_e32 v4, s2011551; GFX9-NEXT: v_mov_b32_e32 v5, s2111552; GFX9-NEXT: v_mov_b32_e32 v6, s2211553; GFX9-NEXT: v_mov_b32_e32 v7, s2311554; GFX9-NEXT: v_mov_b32_e32 v8, s2411555; GFX9-NEXT: v_mov_b32_e32 v9, s2511556; GFX9-NEXT: v_mov_b32_e32 v10, s2611557; GFX9-NEXT: v_mov_b32_e32 v11, s2711558; GFX9-NEXT: v_mov_b32_e32 v12, s2811559; GFX9-NEXT: v_mov_b32_e32 v13, s2911560; GFX9-NEXT: v_mov_b32_e32 v14, s3011561; GFX9-NEXT: v_mov_b32_e32 v15, s3111562; GFX9-NEXT: s_setpc_b64 s[30:31]11563;11564; GFX11-LABEL: bitcast_v24f16_to_v6i64_scalar:11565; GFX11: ; %bb.0:11566; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11567; GFX11-NEXT: s_mov_b32 s15, s311568; GFX11-NEXT: s_mov_b32 s14, s211569; GFX11-NEXT: s_mov_b32 s13, s111570; GFX11-NEXT: s_mov_b32 s12, s011571; GFX11-NEXT: s_cmp_lg_u32 s24, 011572; GFX11-NEXT: s_mov_b32 s0, 011573; GFX11-NEXT: s_cbranch_scc0 .LBB55_311574; GFX11-NEXT: ; %bb.1: ; %Flow11575; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s011576; GFX11-NEXT: s_cbranch_vccnz .LBB55_411577; GFX11-NEXT: .LBB55_2: ; %cmp.true11578; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s23 op_sel_hi:[0,1]11579; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s22 op_sel_hi:[0,1]11580; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s21 op_sel_hi:[0,1]11581; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s20 op_sel_hi:[0,1]11582; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s19 op_sel_hi:[0,1]11583; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s18 op_sel_hi:[0,1]11584; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s17 op_sel_hi:[0,1]11585; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s16 op_sel_hi:[0,1]11586; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s15 op_sel_hi:[0,1]11587; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s14 op_sel_hi:[0,1]11588; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s13 op_sel_hi:[0,1]11589; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s12 op_sel_hi:[0,1]11590; GFX11-NEXT: s_setpc_b64 s[30:31]11591; GFX11-NEXT: .LBB55_3:11592; GFX11-NEXT: s_branch .LBB55_211593; GFX11-NEXT: .LBB55_4:11594; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s1311595; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s1511596; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s1711597; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s1911598; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s2111599; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s2311600; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s2511601; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s2711602; GFX11-NEXT: s_setpc_b64 s[30:31]11603 %cmp = icmp eq i32 %b, 011604 br i1 %cmp, label %cmp.true, label %cmp.false11605 11606cmp.true:11607 %a1 = fadd <24 x half> %a, splat (half 0xH0200)11608 %a2 = bitcast <24 x half> %a1 to <6 x i64>11609 br label %end11610 11611cmp.false:11612 %a3 = bitcast <24 x half> %a to <6 x i64>11613 br label %end11614 11615end:11616 %phi = phi <6 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]11617 ret <6 x i64> %phi11618}11619 11620define <24 x half> @bitcast_v24i16_to_v24f16(<24 x i16> %a, i32 %b) {11621; SI-LABEL: bitcast_v24i16_to_v24f16:11622; SI: ; %bb.0:11623; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11624; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill11625; SI-NEXT: v_mov_b32_e32 v55, v2311626; SI-NEXT: v_mov_b32_e32 v54, v2211627; SI-NEXT: v_mov_b32_e32 v53, v2111628; SI-NEXT: v_mov_b32_e32 v52, v2011629; SI-NEXT: v_mov_b32_e32 v51, v1911630; SI-NEXT: v_mov_b32_e32 v50, v1811631; SI-NEXT: v_mov_b32_e32 v49, v1711632; SI-NEXT: v_mov_b32_e32 v48, v1611633; SI-NEXT: v_mov_b32_e32 v39, v1511634; SI-NEXT: v_mov_b32_e32 v38, v1411635; SI-NEXT: v_mov_b32_e32 v37, v1311636; SI-NEXT: v_mov_b32_e32 v36, v1211637; SI-NEXT: v_mov_b32_e32 v35, v1111638; SI-NEXT: v_mov_b32_e32 v34, v1011639; SI-NEXT: v_mov_b32_e32 v33, v911640; SI-NEXT: v_mov_b32_e32 v32, v811641; SI-NEXT: v_mov_b32_e32 v31, v711642; SI-NEXT: v_mov_b32_e32 v30, v611643; SI-NEXT: v_mov_b32_e32 v29, v511644; SI-NEXT: v_mov_b32_e32 v28, v411645; SI-NEXT: v_mov_b32_e32 v27, v311646; SI-NEXT: v_mov_b32_e32 v26, v211647; SI-NEXT: v_mov_b32_e32 v25, v111648; SI-NEXT: s_waitcnt expcnt(0)11649; SI-NEXT: v_mov_b32_e32 v40, v011650; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2411651; SI-NEXT: ; implicit-def: $vgpr011652; SI-NEXT: ; implicit-def: $vgpr111653; SI-NEXT: ; implicit-def: $vgpr211654; SI-NEXT: ; implicit-def: $vgpr311655; SI-NEXT: ; implicit-def: $vgpr411656; SI-NEXT: ; implicit-def: $vgpr511657; SI-NEXT: ; implicit-def: $vgpr611658; SI-NEXT: ; implicit-def: $vgpr711659; SI-NEXT: ; implicit-def: $vgpr811660; SI-NEXT: ; implicit-def: $vgpr911661; SI-NEXT: ; implicit-def: $vgpr1011662; SI-NEXT: ; implicit-def: $vgpr1111663; SI-NEXT: ; implicit-def: $vgpr1211664; SI-NEXT: ; implicit-def: $vgpr1311665; SI-NEXT: ; implicit-def: $vgpr1411666; SI-NEXT: ; implicit-def: $vgpr1511667; SI-NEXT: ; implicit-def: $vgpr1611668; SI-NEXT: ; implicit-def: $vgpr1711669; SI-NEXT: ; implicit-def: $vgpr1811670; SI-NEXT: ; implicit-def: $vgpr1911671; SI-NEXT: ; implicit-def: $vgpr2011672; SI-NEXT: ; implicit-def: $vgpr2111673; SI-NEXT: ; implicit-def: $vgpr2211674; SI-NEXT: ; implicit-def: $vgpr2311675; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc11676; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]11677; SI-NEXT: s_cbranch_execz .LBB56_211678; SI-NEXT: ; %bb.1: ; %cmp.false11679; SI-NEXT: v_cvt_f32_f16_e32 v0, v4011680; SI-NEXT: v_cvt_f32_f16_e32 v1, v2511681; SI-NEXT: v_cvt_f32_f16_e32 v2, v2611682; SI-NEXT: v_cvt_f32_f16_e32 v3, v2711683; SI-NEXT: v_cvt_f32_f16_e32 v4, v2811684; SI-NEXT: v_cvt_f32_f16_e32 v5, v2911685; SI-NEXT: v_cvt_f32_f16_e32 v6, v3011686; SI-NEXT: v_cvt_f32_f16_e32 v7, v3111687; SI-NEXT: v_cvt_f32_f16_e32 v8, v3211688; SI-NEXT: v_cvt_f32_f16_e32 v9, v3311689; SI-NEXT: v_cvt_f32_f16_e32 v10, v3411690; SI-NEXT: v_cvt_f32_f16_e32 v11, v3511691; SI-NEXT: v_cvt_f32_f16_e32 v12, v3611692; SI-NEXT: v_cvt_f32_f16_e32 v13, v3711693; SI-NEXT: v_cvt_f32_f16_e32 v14, v3811694; SI-NEXT: v_cvt_f32_f16_e32 v15, v3911695; SI-NEXT: v_cvt_f32_f16_e32 v16, v4811696; SI-NEXT: v_cvt_f32_f16_e32 v17, v4911697; SI-NEXT: v_cvt_f32_f16_e32 v18, v5011698; SI-NEXT: v_cvt_f32_f16_e32 v19, v5111699; SI-NEXT: v_cvt_f32_f16_e32 v20, v5211700; SI-NEXT: v_cvt_f32_f16_e32 v21, v5311701; SI-NEXT: v_cvt_f32_f16_e32 v22, v5411702; SI-NEXT: v_cvt_f32_f16_e32 v23, v5511703; SI-NEXT: ; implicit-def: $vgpr4011704; SI-NEXT: ; implicit-def: $vgpr2511705; SI-NEXT: ; implicit-def: $vgpr2611706; SI-NEXT: ; implicit-def: $vgpr2711707; SI-NEXT: ; implicit-def: $vgpr2811708; SI-NEXT: ; implicit-def: $vgpr2911709; SI-NEXT: ; implicit-def: $vgpr3011710; SI-NEXT: ; implicit-def: $vgpr3111711; SI-NEXT: ; implicit-def: $vgpr3211712; SI-NEXT: ; implicit-def: $vgpr3311713; SI-NEXT: ; implicit-def: $vgpr3411714; SI-NEXT: ; implicit-def: $vgpr3511715; SI-NEXT: ; implicit-def: $vgpr3611716; SI-NEXT: ; implicit-def: $vgpr3711717; SI-NEXT: ; implicit-def: $vgpr3811718; SI-NEXT: ; implicit-def: $vgpr3911719; SI-NEXT: ; implicit-def: $vgpr4811720; SI-NEXT: ; implicit-def: $vgpr4911721; SI-NEXT: ; implicit-def: $vgpr5011722; SI-NEXT: ; implicit-def: $vgpr5111723; SI-NEXT: ; implicit-def: $vgpr5211724; SI-NEXT: ; implicit-def: $vgpr5311725; SI-NEXT: ; implicit-def: $vgpr5411726; SI-NEXT: ; implicit-def: $vgpr5511727; SI-NEXT: .LBB56_2: ; %Flow11728; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]11729; SI-NEXT: s_cbranch_execz .LBB56_411730; SI-NEXT: ; %bb.3: ; %cmp.true11731; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v5511732; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v5411733; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v5311734; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v5211735; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v5111736; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v5011737; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v4911738; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v4811739; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v3911740; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v3811741; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v3711742; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v3611743; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v3511744; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v3411745; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v3311746; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v3211747; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v3111748; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v3011749; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v2911750; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v2811751; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v2711752; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2611753; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v2511754; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v4011755; SI-NEXT: v_cvt_f32_f16_e32 v0, v011756; SI-NEXT: v_cvt_f32_f16_e32 v1, v111757; SI-NEXT: v_cvt_f32_f16_e32 v2, v211758; SI-NEXT: v_cvt_f32_f16_e32 v3, v311759; SI-NEXT: v_cvt_f32_f16_e32 v4, v411760; SI-NEXT: v_cvt_f32_f16_e32 v5, v511761; SI-NEXT: v_cvt_f32_f16_e32 v6, v611762; SI-NEXT: v_cvt_f32_f16_e32 v7, v711763; SI-NEXT: v_cvt_f32_f16_e32 v8, v811764; SI-NEXT: v_cvt_f32_f16_e32 v9, v911765; SI-NEXT: v_cvt_f32_f16_e32 v10, v1011766; SI-NEXT: v_cvt_f32_f16_e32 v11, v1111767; SI-NEXT: v_cvt_f32_f16_e32 v12, v1211768; SI-NEXT: v_cvt_f32_f16_e32 v13, v1311769; SI-NEXT: v_cvt_f32_f16_e32 v14, v1411770; SI-NEXT: v_cvt_f32_f16_e32 v15, v1511771; SI-NEXT: v_cvt_f32_f16_e32 v16, v1611772; SI-NEXT: v_cvt_f32_f16_e32 v17, v1711773; SI-NEXT: v_cvt_f32_f16_e32 v18, v1811774; SI-NEXT: v_cvt_f32_f16_e32 v19, v1911775; SI-NEXT: v_cvt_f32_f16_e32 v20, v2011776; SI-NEXT: v_cvt_f32_f16_e32 v21, v2111777; SI-NEXT: v_cvt_f32_f16_e32 v22, v2211778; SI-NEXT: v_cvt_f32_f16_e32 v23, v2311779; SI-NEXT: .LBB56_4: ; %end11780; SI-NEXT: s_or_b64 exec, exec, s[4:5]11781; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload11782; SI-NEXT: s_waitcnt vmcnt(0)11783; SI-NEXT: s_setpc_b64 s[30:31]11784;11785; VI-LABEL: bitcast_v24i16_to_v24f16:11786; VI: ; %bb.0:11787; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11788; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1211789; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc11790; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]11791; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]11792; VI-NEXT: s_cbranch_execz .LBB56_211793; VI-NEXT: ; %bb.1: ; %cmp.true11794; VI-NEXT: v_mov_b32_e32 v12, 311795; VI-NEXT: v_add_u16_sdwa v19, v11, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11796; VI-NEXT: v_add_u16_e32 v11, 3, v1111797; VI-NEXT: v_or_b32_e32 v11, v11, v1911798; VI-NEXT: v_add_u16_sdwa v19, v10, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11799; VI-NEXT: v_add_u16_e32 v10, 3, v1011800; VI-NEXT: v_or_b32_e32 v10, v10, v1911801; VI-NEXT: v_add_u16_sdwa v19, v9, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11802; VI-NEXT: v_add_u16_e32 v9, 3, v911803; VI-NEXT: v_or_b32_e32 v9, v9, v1911804; VI-NEXT: v_add_u16_sdwa v19, v8, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11805; VI-NEXT: v_add_u16_e32 v8, 3, v811806; VI-NEXT: v_add_u16_sdwa v13, v0, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11807; VI-NEXT: v_add_u16_sdwa v14, v1, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11808; VI-NEXT: v_add_u16_sdwa v15, v2, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11809; VI-NEXT: v_add_u16_sdwa v16, v3, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11810; VI-NEXT: v_add_u16_sdwa v17, v4, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11811; VI-NEXT: v_add_u16_sdwa v18, v5, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11812; VI-NEXT: v_or_b32_e32 v8, v8, v1911813; VI-NEXT: v_add_u16_sdwa v19, v6, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11814; VI-NEXT: v_add_u16_sdwa v12, v7, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD11815; VI-NEXT: v_add_u16_e32 v7, 3, v711816; VI-NEXT: v_add_u16_e32 v6, 3, v611817; VI-NEXT: v_add_u16_e32 v5, 3, v511818; VI-NEXT: v_add_u16_e32 v4, 3, v411819; VI-NEXT: v_add_u16_e32 v3, 3, v311820; VI-NEXT: v_add_u16_e32 v2, 3, v211821; VI-NEXT: v_add_u16_e32 v1, 3, v111822; VI-NEXT: v_add_u16_e32 v0, 3, v011823; VI-NEXT: v_or_b32_e32 v7, v7, v1211824; VI-NEXT: v_or_b32_e32 v6, v6, v1911825; VI-NEXT: v_or_b32_e32 v5, v5, v1811826; VI-NEXT: v_or_b32_e32 v4, v4, v1711827; VI-NEXT: v_or_b32_e32 v3, v3, v1611828; VI-NEXT: v_or_b32_e32 v2, v2, v1511829; VI-NEXT: v_or_b32_e32 v1, v1, v1411830; VI-NEXT: v_or_b32_e32 v0, v0, v1311831; VI-NEXT: .LBB56_2: ; %end11832; VI-NEXT: s_or_b64 exec, exec, s[4:5]11833; VI-NEXT: s_setpc_b64 s[30:31]11834;11835; GFX9-LABEL: bitcast_v24i16_to_v24f16:11836; GFX9: ; %bb.0:11837; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11838; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1211839; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc11840; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]11841; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]11842; GFX9-NEXT: s_cbranch_execz .LBB56_211843; GFX9-NEXT: ; %bb.1: ; %cmp.true11844; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]11845; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]11846; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]11847; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]11848; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]11849; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]11850; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]11851; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]11852; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]11853; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]11854; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]11855; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]11856; GFX9-NEXT: .LBB56_2: ; %end11857; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]11858; GFX9-NEXT: s_setpc_b64 s[30:31]11859;11860; GFX11-LABEL: bitcast_v24i16_to_v24f16:11861; GFX11: ; %bb.0:11862; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11863; GFX11-NEXT: s_mov_b32 s0, exec_lo11864; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v1211865; GFX11-NEXT: s_xor_b32 s0, exec_lo, s011866; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)11867; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s011868; GFX11-NEXT: s_cbranch_execz .LBB56_211869; GFX11-NEXT: ; %bb.1: ; %cmp.true11870; GFX11-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]11871; GFX11-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]11872; GFX11-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]11873; GFX11-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]11874; GFX11-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]11875; GFX11-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]11876; GFX11-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]11877; GFX11-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]11878; GFX11-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]11879; GFX11-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]11880; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]11881; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]11882; GFX11-NEXT: .LBB56_2: ; %end11883; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s011884; GFX11-NEXT: s_setpc_b64 s[30:31]11885 %cmp = icmp eq i32 %b, 011886 br i1 %cmp, label %cmp.true, label %cmp.false11887 11888cmp.true:11889 %a1 = add <24 x i16> %a, splat (i16 3)11890 %a2 = bitcast <24 x i16> %a1 to <24 x half>11891 br label %end11892 11893cmp.false:11894 %a3 = bitcast <24 x i16> %a to <24 x half>11895 br label %end11896 11897end:11898 %phi = phi <24 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]11899 ret <24 x half> %phi11900}11901 11902define inreg <24 x half> @bitcast_v24i16_to_v24f16_scalar(<24 x i16> inreg %a, i32 inreg %b) {11903; SI-LABEL: bitcast_v24i16_to_v24f16_scalar:11904; SI: ; %bb.0:11905; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11906; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1011907; SI-NEXT: v_mov_b32_e32 v30, v911908; SI-NEXT: v_mov_b32_e32 v29, v811909; SI-NEXT: v_mov_b32_e32 v28, v711910; SI-NEXT: v_mov_b32_e32 v27, v611911; SI-NEXT: v_mov_b32_e32 v26, v511912; SI-NEXT: v_mov_b32_e32 v25, v411913; SI-NEXT: v_mov_b32_e32 v24, v311914; SI-NEXT: v_mov_b32_e32 v33, v211915; SI-NEXT: v_mov_b32_e32 v32, v111916; SI-NEXT: v_mov_b32_e32 v31, v011917; SI-NEXT: s_and_b64 s[4:5], vcc, exec11918; SI-NEXT: s_cbranch_scc0 .LBB57_411919; SI-NEXT: ; %bb.1: ; %cmp.false11920; SI-NEXT: v_cvt_f32_f16_e32 v0, s1611921; SI-NEXT: v_cvt_f32_f16_e32 v1, s1711922; SI-NEXT: v_cvt_f32_f16_e32 v2, s1811923; SI-NEXT: v_cvt_f32_f16_e32 v3, s1911924; SI-NEXT: v_cvt_f32_f16_e32 v4, s2011925; SI-NEXT: v_cvt_f32_f16_e32 v5, s2111926; SI-NEXT: v_cvt_f32_f16_e32 v6, s2211927; SI-NEXT: v_cvt_f32_f16_e32 v7, s2311928; SI-NEXT: v_cvt_f32_f16_e32 v8, s2411929; SI-NEXT: v_cvt_f32_f16_e32 v9, s2511930; SI-NEXT: v_cvt_f32_f16_e32 v10, s2611931; SI-NEXT: v_cvt_f32_f16_e32 v11, s2711932; SI-NEXT: v_cvt_f32_f16_e32 v12, s2811933; SI-NEXT: v_cvt_f32_f16_e32 v13, s2911934; SI-NEXT: v_cvt_f32_f16_e32 v14, v3111935; SI-NEXT: v_cvt_f32_f16_e32 v15, v3211936; SI-NEXT: v_cvt_f32_f16_e32 v16, v3311937; SI-NEXT: v_cvt_f32_f16_e32 v17, v2411938; SI-NEXT: v_cvt_f32_f16_e32 v18, v2511939; SI-NEXT: v_cvt_f32_f16_e32 v19, v2611940; SI-NEXT: v_cvt_f32_f16_e32 v20, v2711941; SI-NEXT: v_cvt_f32_f16_e32 v21, v2811942; SI-NEXT: v_cvt_f32_f16_e32 v22, v2911943; SI-NEXT: v_cvt_f32_f16_e32 v23, v3011944; SI-NEXT: s_cbranch_execnz .LBB57_311945; SI-NEXT: .LBB57_2: ; %cmp.true11946; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v3011947; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v2911948; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v2811949; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v2711950; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v2611951; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v2511952; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v2411953; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v3311954; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v3211955; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v3111956; SI-NEXT: s_add_i32 s29, s29, 311957; SI-NEXT: s_add_i32 s28, s28, 311958; SI-NEXT: s_add_i32 s27, s27, 311959; SI-NEXT: s_add_i32 s26, s26, 311960; SI-NEXT: s_add_i32 s25, s25, 311961; SI-NEXT: s_add_i32 s24, s24, 311962; SI-NEXT: s_add_i32 s23, s23, 311963; SI-NEXT: s_add_i32 s22, s22, 311964; SI-NEXT: s_add_i32 s21, s21, 311965; SI-NEXT: s_add_i32 s20, s20, 311966; SI-NEXT: s_add_i32 s19, s19, 311967; SI-NEXT: s_add_i32 s18, s18, 311968; SI-NEXT: s_add_i32 s17, s17, 311969; SI-NEXT: s_add_i32 s16, s16, 311970; SI-NEXT: v_cvt_f32_f16_e32 v0, s1611971; SI-NEXT: v_cvt_f32_f16_e32 v1, s1711972; SI-NEXT: v_cvt_f32_f16_e32 v2, s1811973; SI-NEXT: v_cvt_f32_f16_e32 v3, s1911974; SI-NEXT: v_cvt_f32_f16_e32 v4, s2011975; SI-NEXT: v_cvt_f32_f16_e32 v5, s2111976; SI-NEXT: v_cvt_f32_f16_e32 v6, s2211977; SI-NEXT: v_cvt_f32_f16_e32 v7, s2311978; SI-NEXT: v_cvt_f32_f16_e32 v8, s2411979; SI-NEXT: v_cvt_f32_f16_e32 v9, s2511980; SI-NEXT: v_cvt_f32_f16_e32 v10, s2611981; SI-NEXT: v_cvt_f32_f16_e32 v11, s2711982; SI-NEXT: v_cvt_f32_f16_e32 v12, s2811983; SI-NEXT: v_cvt_f32_f16_e32 v13, s2911984; SI-NEXT: v_cvt_f32_f16_e32 v14, v1411985; SI-NEXT: v_cvt_f32_f16_e32 v15, v1511986; SI-NEXT: v_cvt_f32_f16_e32 v16, v1611987; SI-NEXT: v_cvt_f32_f16_e32 v17, v1711988; SI-NEXT: v_cvt_f32_f16_e32 v18, v1811989; SI-NEXT: v_cvt_f32_f16_e32 v19, v1911990; SI-NEXT: v_cvt_f32_f16_e32 v20, v2011991; SI-NEXT: v_cvt_f32_f16_e32 v21, v2111992; SI-NEXT: v_cvt_f32_f16_e32 v22, v2211993; SI-NEXT: v_cvt_f32_f16_e32 v23, v2311994; SI-NEXT: .LBB57_3: ; %end11995; SI-NEXT: s_setpc_b64 s[30:31]11996; SI-NEXT: .LBB57_4:11997; SI-NEXT: ; implicit-def: $vgpr011998; SI-NEXT: ; implicit-def: $vgpr111999; SI-NEXT: ; implicit-def: $vgpr212000; SI-NEXT: ; implicit-def: $vgpr312001; SI-NEXT: ; implicit-def: $vgpr412002; SI-NEXT: ; implicit-def: $vgpr512003; SI-NEXT: ; implicit-def: $vgpr612004; SI-NEXT: ; implicit-def: $vgpr712005; SI-NEXT: ; implicit-def: $vgpr812006; SI-NEXT: ; implicit-def: $vgpr912007; SI-NEXT: ; implicit-def: $vgpr1012008; SI-NEXT: ; implicit-def: $vgpr1112009; SI-NEXT: ; implicit-def: $vgpr1212010; SI-NEXT: ; implicit-def: $vgpr1312011; SI-NEXT: ; implicit-def: $vgpr1412012; SI-NEXT: ; implicit-def: $vgpr1512013; SI-NEXT: ; implicit-def: $vgpr1612014; SI-NEXT: ; implicit-def: $vgpr1712015; SI-NEXT: ; implicit-def: $vgpr1812016; SI-NEXT: ; implicit-def: $vgpr1912017; SI-NEXT: ; implicit-def: $vgpr2012018; SI-NEXT: ; implicit-def: $vgpr2112019; SI-NEXT: ; implicit-def: $vgpr2212020; SI-NEXT: ; implicit-def: $vgpr2312021; SI-NEXT: s_branch .LBB57_212022;12023; VI-LABEL: bitcast_v24i16_to_v24f16_scalar:12024; VI: ; %bb.0:12025; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12026; VI-NEXT: s_cmp_lg_u32 s28, 012027; VI-NEXT: s_cbranch_scc0 .LBB57_412028; VI-NEXT: ; %bb.1: ; %cmp.false12029; VI-NEXT: s_cbranch_execnz .LBB57_312030; VI-NEXT: .LBB57_2: ; %cmp.true12031; VI-NEXT: s_and_b32 s4, s16, 0xffff000012032; VI-NEXT: s_add_i32 s5, s16, 312033; VI-NEXT: s_and_b32 s6, s17, 0xffff000012034; VI-NEXT: s_add_i32 s7, s17, 312035; VI-NEXT: s_and_b32 s8, s18, 0xffff000012036; VI-NEXT: s_add_i32 s9, s18, 312037; VI-NEXT: s_and_b32 s10, s19, 0xffff000012038; VI-NEXT: s_add_i32 s11, s19, 312039; VI-NEXT: s_and_b32 s12, s20, 0xffff000012040; VI-NEXT: s_add_i32 s13, s20, 312041; VI-NEXT: s_and_b32 s14, s21, 0xffff000012042; VI-NEXT: s_add_i32 s15, s21, 312043; VI-NEXT: s_and_b32 s16, s22, 0xffff000012044; VI-NEXT: s_add_i32 s17, s22, 312045; VI-NEXT: s_and_b32 s18, s23, 0xffff000012046; VI-NEXT: s_add_i32 s19, s23, 312047; VI-NEXT: s_and_b32 s20, s24, 0xffff000012048; VI-NEXT: s_add_i32 s21, s24, 312049; VI-NEXT: s_and_b32 s22, s25, 0xffff000012050; VI-NEXT: s_add_i32 s23, s25, 312051; VI-NEXT: s_and_b32 s24, s26, 0xffff000012052; VI-NEXT: s_add_i32 s25, s26, 312053; VI-NEXT: s_and_b32 s26, s27, 0xffff000012054; VI-NEXT: s_add_i32 s27, s27, 312055; VI-NEXT: s_and_b32 s27, s27, 0xffff12056; VI-NEXT: s_and_b32 s25, s25, 0xffff12057; VI-NEXT: s_and_b32 s23, s23, 0xffff12058; VI-NEXT: s_and_b32 s21, s21, 0xffff12059; VI-NEXT: s_and_b32 s19, s19, 0xffff12060; VI-NEXT: s_and_b32 s17, s17, 0xffff12061; VI-NEXT: s_and_b32 s15, s15, 0xffff12062; VI-NEXT: s_and_b32 s13, s13, 0xffff12063; VI-NEXT: s_and_b32 s11, s11, 0xffff12064; VI-NEXT: s_and_b32 s9, s9, 0xffff12065; VI-NEXT: s_and_b32 s7, s7, 0xffff12066; VI-NEXT: s_and_b32 s5, s5, 0xffff12067; VI-NEXT: s_or_b32 s26, s26, s2712068; VI-NEXT: s_or_b32 s24, s24, s2512069; VI-NEXT: s_or_b32 s22, s22, s2312070; VI-NEXT: s_or_b32 s20, s20, s2112071; VI-NEXT: s_or_b32 s18, s18, s1912072; VI-NEXT: s_or_b32 s16, s16, s1712073; VI-NEXT: s_or_b32 s14, s14, s1512074; VI-NEXT: s_or_b32 s12, s12, s1312075; VI-NEXT: s_or_b32 s10, s10, s1112076; VI-NEXT: s_or_b32 s8, s8, s912077; VI-NEXT: s_or_b32 s6, s6, s712078; VI-NEXT: s_or_b32 s4, s4, s512079; VI-NEXT: s_add_i32 s27, s26, 0x3000012080; VI-NEXT: s_add_i32 s26, s24, 0x3000012081; VI-NEXT: s_add_i32 s25, s22, 0x3000012082; VI-NEXT: s_add_i32 s24, s20, 0x3000012083; VI-NEXT: s_add_i32 s23, s18, 0x3000012084; VI-NEXT: s_add_i32 s22, s16, 0x3000012085; VI-NEXT: s_add_i32 s21, s14, 0x3000012086; VI-NEXT: s_add_i32 s20, s12, 0x3000012087; VI-NEXT: s_add_i32 s19, s10, 0x3000012088; VI-NEXT: s_add_i32 s18, s8, 0x3000012089; VI-NEXT: s_add_i32 s17, s6, 0x3000012090; VI-NEXT: s_add_i32 s16, s4, 0x3000012091; VI-NEXT: .LBB57_3: ; %end12092; VI-NEXT: v_mov_b32_e32 v0, s1612093; VI-NEXT: v_mov_b32_e32 v1, s1712094; VI-NEXT: v_mov_b32_e32 v2, s1812095; VI-NEXT: v_mov_b32_e32 v3, s1912096; VI-NEXT: v_mov_b32_e32 v4, s2012097; VI-NEXT: v_mov_b32_e32 v5, s2112098; VI-NEXT: v_mov_b32_e32 v6, s2212099; VI-NEXT: v_mov_b32_e32 v7, s2312100; VI-NEXT: v_mov_b32_e32 v8, s2412101; VI-NEXT: v_mov_b32_e32 v9, s2512102; VI-NEXT: v_mov_b32_e32 v10, s2612103; VI-NEXT: v_mov_b32_e32 v11, s2712104; VI-NEXT: s_setpc_b64 s[30:31]12105; VI-NEXT: .LBB57_4:12106; VI-NEXT: s_branch .LBB57_212107;12108; GFX9-LABEL: bitcast_v24i16_to_v24f16_scalar:12109; GFX9: ; %bb.0:12110; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12111; GFX9-NEXT: s_cmp_lg_u32 s28, 012112; GFX9-NEXT: s_cbranch_scc0 .LBB57_312113; GFX9-NEXT: ; %bb.1: ; %cmp.false12114; GFX9-NEXT: s_cbranch_execnz .LBB57_412115; GFX9-NEXT: .LBB57_2: ; %cmp.true12116; GFX9-NEXT: v_pk_add_u16 v11, s27, 3 op_sel_hi:[1,0]12117; GFX9-NEXT: v_pk_add_u16 v10, s26, 3 op_sel_hi:[1,0]12118; GFX9-NEXT: v_pk_add_u16 v9, s25, 3 op_sel_hi:[1,0]12119; GFX9-NEXT: v_pk_add_u16 v8, s24, 3 op_sel_hi:[1,0]12120; GFX9-NEXT: v_pk_add_u16 v7, s23, 3 op_sel_hi:[1,0]12121; GFX9-NEXT: v_pk_add_u16 v6, s22, 3 op_sel_hi:[1,0]12122; GFX9-NEXT: v_pk_add_u16 v5, s21, 3 op_sel_hi:[1,0]12123; GFX9-NEXT: v_pk_add_u16 v4, s20, 3 op_sel_hi:[1,0]12124; GFX9-NEXT: v_pk_add_u16 v3, s19, 3 op_sel_hi:[1,0]12125; GFX9-NEXT: v_pk_add_u16 v2, s18, 3 op_sel_hi:[1,0]12126; GFX9-NEXT: v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]12127; GFX9-NEXT: v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]12128; GFX9-NEXT: s_setpc_b64 s[30:31]12129; GFX9-NEXT: .LBB57_3:12130; GFX9-NEXT: s_branch .LBB57_212131; GFX9-NEXT: .LBB57_4:12132; GFX9-NEXT: v_mov_b32_e32 v0, s1612133; GFX9-NEXT: v_mov_b32_e32 v1, s1712134; GFX9-NEXT: v_mov_b32_e32 v2, s1812135; GFX9-NEXT: v_mov_b32_e32 v3, s1912136; GFX9-NEXT: v_mov_b32_e32 v4, s2012137; GFX9-NEXT: v_mov_b32_e32 v5, s2112138; GFX9-NEXT: v_mov_b32_e32 v6, s2212139; GFX9-NEXT: v_mov_b32_e32 v7, s2312140; GFX9-NEXT: v_mov_b32_e32 v8, s2412141; GFX9-NEXT: v_mov_b32_e32 v9, s2512142; GFX9-NEXT: v_mov_b32_e32 v10, s2612143; GFX9-NEXT: v_mov_b32_e32 v11, s2712144; GFX9-NEXT: v_mov_b32_e32 v12, s2812145; GFX9-NEXT: v_mov_b32_e32 v13, s2912146; GFX9-NEXT: v_mov_b32_e32 v14, s3012147; GFX9-NEXT: v_mov_b32_e32 v15, s3112148; GFX9-NEXT: s_setpc_b64 s[30:31]12149;12150; GFX11-LABEL: bitcast_v24i16_to_v24f16_scalar:12151; GFX11: ; %bb.0:12152; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12153; GFX11-NEXT: s_mov_b32 s15, s312154; GFX11-NEXT: s_mov_b32 s14, s212155; GFX11-NEXT: s_mov_b32 s13, s112156; GFX11-NEXT: s_mov_b32 s12, s012157; GFX11-NEXT: s_cmp_lg_u32 s24, 012158; GFX11-NEXT: s_mov_b32 s0, 012159; GFX11-NEXT: s_cbranch_scc0 .LBB57_312160; GFX11-NEXT: ; %bb.1: ; %Flow12161; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s012162; GFX11-NEXT: s_cbranch_vccnz .LBB57_412163; GFX11-NEXT: .LBB57_2: ; %cmp.true12164; GFX11-NEXT: v_pk_add_u16 v11, s23, 3 op_sel_hi:[1,0]12165; GFX11-NEXT: v_pk_add_u16 v10, s22, 3 op_sel_hi:[1,0]12166; GFX11-NEXT: v_pk_add_u16 v9, s21, 3 op_sel_hi:[1,0]12167; GFX11-NEXT: v_pk_add_u16 v8, s20, 3 op_sel_hi:[1,0]12168; GFX11-NEXT: v_pk_add_u16 v7, s19, 3 op_sel_hi:[1,0]12169; GFX11-NEXT: v_pk_add_u16 v6, s18, 3 op_sel_hi:[1,0]12170; GFX11-NEXT: v_pk_add_u16 v5, s17, 3 op_sel_hi:[1,0]12171; GFX11-NEXT: v_pk_add_u16 v4, s16, 3 op_sel_hi:[1,0]12172; GFX11-NEXT: v_pk_add_u16 v3, s15, 3 op_sel_hi:[1,0]12173; GFX11-NEXT: v_pk_add_u16 v2, s14, 3 op_sel_hi:[1,0]12174; GFX11-NEXT: v_pk_add_u16 v1, s13, 3 op_sel_hi:[1,0]12175; GFX11-NEXT: v_pk_add_u16 v0, s12, 3 op_sel_hi:[1,0]12176; GFX11-NEXT: s_setpc_b64 s[30:31]12177; GFX11-NEXT: .LBB57_3:12178; GFX11-NEXT: s_branch .LBB57_212179; GFX11-NEXT: .LBB57_4:12180; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s1312181; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s1512182; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s1712183; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s1912184; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s2112185; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s2312186; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s2512187; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s2712188; GFX11-NEXT: s_setpc_b64 s[30:31]12189 %cmp = icmp eq i32 %b, 012190 br i1 %cmp, label %cmp.true, label %cmp.false12191 12192cmp.true:12193 %a1 = add <24 x i16> %a, splat (i16 3)12194 %a2 = bitcast <24 x i16> %a1 to <24 x half>12195 br label %end12196 12197cmp.false:12198 %a3 = bitcast <24 x i16> %a to <24 x half>12199 br label %end12200 12201end:12202 %phi = phi <24 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]12203 ret <24 x half> %phi12204}12205 12206define <24 x i16> @bitcast_v24f16_to_v24i16(<24 x half> %a, i32 %b) {12207; SI-LABEL: bitcast_v24f16_to_v24i16:12208; SI: ; %bb.0:12209; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12210; SI-NEXT: v_cvt_f16_f32_e32 v0, v012211; SI-NEXT: v_cvt_f16_f32_e32 v1, v112212; SI-NEXT: v_cvt_f16_f32_e32 v2, v212213; SI-NEXT: v_cvt_f16_f32_e32 v3, v312214; SI-NEXT: v_cvt_f16_f32_e32 v4, v412215; SI-NEXT: v_cvt_f16_f32_e32 v5, v512216; SI-NEXT: v_cvt_f16_f32_e32 v6, v612217; SI-NEXT: v_cvt_f16_f32_e32 v7, v712218; SI-NEXT: v_cvt_f16_f32_e32 v8, v812219; SI-NEXT: v_cvt_f16_f32_e32 v9, v912220; SI-NEXT: v_cvt_f16_f32_e32 v10, v1012221; SI-NEXT: v_cvt_f16_f32_e32 v11, v1112222; SI-NEXT: v_cvt_f16_f32_e32 v12, v1212223; SI-NEXT: v_cvt_f16_f32_e32 v13, v1312224; SI-NEXT: v_cvt_f16_f32_e32 v14, v1412225; SI-NEXT: v_cvt_f16_f32_e32 v15, v1512226; SI-NEXT: v_cvt_f16_f32_e32 v16, v1612227; SI-NEXT: v_cvt_f16_f32_e32 v17, v1712228; SI-NEXT: v_cvt_f16_f32_e32 v18, v1812229; SI-NEXT: v_cvt_f16_f32_e32 v19, v1912230; SI-NEXT: v_cvt_f16_f32_e32 v20, v2012231; SI-NEXT: v_cvt_f16_f32_e32 v21, v2112232; SI-NEXT: v_cvt_f16_f32_e32 v22, v2212233; SI-NEXT: v_cvt_f16_f32_e32 v23, v2312234; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2412235; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc12236; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]12237; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]12238; SI-NEXT: s_cbranch_execz .LBB58_212239; SI-NEXT: ; %bb.1: ; %cmp.true12240; SI-NEXT: v_cvt_f32_f16_e32 v23, v2312241; SI-NEXT: v_cvt_f32_f16_e32 v22, v2212242; SI-NEXT: v_cvt_f32_f16_e32 v19, v1912243; SI-NEXT: v_cvt_f32_f16_e32 v18, v1812244; SI-NEXT: v_cvt_f32_f16_e32 v15, v1512245; SI-NEXT: v_cvt_f32_f16_e32 v14, v1412246; SI-NEXT: v_cvt_f32_f16_e32 v11, v1112247; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v2312248; SI-NEXT: v_cvt_f32_f16_e32 v10, v1012249; SI-NEXT: v_cvt_f32_f16_e32 v7, v712250; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v2212251; SI-NEXT: v_cvt_f16_f32_e32 v23, v2312252; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v1912253; SI-NEXT: v_cvt_f32_f16_e32 v6, v612254; SI-NEXT: v_cvt_f32_f16_e32 v3, v312255; SI-NEXT: v_cvt_f16_f32_e32 v22, v2212256; SI-NEXT: v_cvt_f16_f32_e32 v19, v1912257; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v1812258; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v1512259; SI-NEXT: v_cvt_f32_f16_e32 v2, v212260; SI-NEXT: v_cvt_f32_f16_e32 v1, v112261; SI-NEXT: v_cvt_f32_f16_e32 v5, v512262; SI-NEXT: v_cvt_f32_f16_e32 v9, v912263; SI-NEXT: v_cvt_f32_f16_e32 v13, v1312264; SI-NEXT: v_cvt_f32_f16_e32 v17, v1712265; SI-NEXT: v_cvt_f32_f16_e32 v21, v2112266; SI-NEXT: v_cvt_f16_f32_e32 v18, v1812267; SI-NEXT: v_cvt_f16_f32_e32 v15, v1512268; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v1412269; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v1112270; SI-NEXT: v_cvt_f32_f16_e32 v0, v012271; SI-NEXT: v_cvt_f32_f16_e32 v4, v412272; SI-NEXT: v_cvt_f32_f16_e32 v8, v812273; SI-NEXT: v_cvt_f32_f16_e32 v12, v1212274; SI-NEXT: v_cvt_f32_f16_e32 v16, v1612275; SI-NEXT: v_cvt_f32_f16_e32 v20, v2012276; SI-NEXT: v_cvt_f16_f32_e32 v14, v1412277; SI-NEXT: v_cvt_f16_f32_e32 v11, v1112278; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v1012279; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v712280; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v2312281; SI-NEXT: v_cvt_f16_f32_e32 v10, v1012282; SI-NEXT: v_cvt_f16_f32_e32 v7, v712283; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v612284; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v312285; SI-NEXT: v_or_b32_e32 v22, v22, v2412286; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v1912287; SI-NEXT: v_cvt_f16_f32_e32 v6, v612288; SI-NEXT: v_cvt_f16_f32_e32 v3, v312289; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v212290; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v112291; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v512292; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v912293; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v1312294; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v1712295; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v2112296; SI-NEXT: v_or_b32_e32 v18, v18, v2412297; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v1512298; SI-NEXT: v_cvt_f16_f32_e32 v2, v212299; SI-NEXT: v_cvt_f16_f32_e32 v1, v112300; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v012301; SI-NEXT: v_cvt_f16_f32_e32 v5, v512302; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v412303; SI-NEXT: v_cvt_f16_f32_e32 v9, v912304; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v812305; SI-NEXT: v_cvt_f16_f32_e32 v13, v1312306; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v1212307; SI-NEXT: v_cvt_f16_f32_e32 v17, v1712308; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v1612309; SI-NEXT: v_cvt_f16_f32_e32 v21, v2112310; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v2012311; SI-NEXT: v_or_b32_e32 v14, v14, v2412312; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v1112313; SI-NEXT: v_cvt_f16_f32_e32 v0, v012314; SI-NEXT: v_cvt_f16_f32_e32 v4, v412315; SI-NEXT: v_cvt_f16_f32_e32 v8, v812316; SI-NEXT: v_cvt_f16_f32_e32 v12, v1212317; SI-NEXT: v_cvt_f16_f32_e32 v16, v1612318; SI-NEXT: v_cvt_f16_f32_e32 v20, v2012319; SI-NEXT: v_or_b32_e32 v10, v10, v2412320; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v712321; SI-NEXT: v_or_b32_e32 v6, v6, v2412322; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v312323; SI-NEXT: v_or_b32_e32 v2, v2, v2412324; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v112325; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v512326; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v912327; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v1312328; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v1712329; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v2112330; SI-NEXT: v_or_b32_e32 v0, v0, v112331; SI-NEXT: v_or_b32_e32 v4, v4, v512332; SI-NEXT: v_or_b32_e32 v8, v8, v912333; SI-NEXT: v_or_b32_e32 v12, v12, v1312334; SI-NEXT: v_or_b32_e32 v16, v16, v1712335; SI-NEXT: v_or_b32_e32 v20, v20, v2112336; SI-NEXT: v_alignbit_b32 v1, v2, v1, 1612337; SI-NEXT: v_alignbit_b32 v5, v6, v5, 1612338; SI-NEXT: v_alignbit_b32 v9, v10, v9, 1612339; SI-NEXT: v_alignbit_b32 v13, v14, v13, 1612340; SI-NEXT: v_alignbit_b32 v17, v18, v17, 1612341; SI-NEXT: v_alignbit_b32 v21, v22, v21, 1612342; SI-NEXT: .LBB58_2: ; %end12343; SI-NEXT: s_or_b64 exec, exec, s[4:5]12344; SI-NEXT: s_setpc_b64 s[30:31]12345;12346; VI-LABEL: bitcast_v24f16_to_v24i16:12347; VI: ; %bb.0:12348; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12349; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1212350; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc12351; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]12352; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]12353; VI-NEXT: s_cbranch_execz .LBB58_212354; VI-NEXT: ; %bb.1: ; %cmp.true12355; VI-NEXT: v_mov_b32_e32 v13, 0x20012356; VI-NEXT: v_add_f16_e32 v19, 0x200, v1112357; VI-NEXT: v_add_f16_sdwa v11, v11, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12358; VI-NEXT: v_or_b32_e32 v11, v19, v1112359; VI-NEXT: v_add_f16_e32 v19, 0x200, v1012360; VI-NEXT: v_add_f16_sdwa v10, v10, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12361; VI-NEXT: v_or_b32_e32 v10, v19, v1012362; VI-NEXT: v_add_f16_e32 v19, 0x200, v912363; VI-NEXT: v_add_f16_sdwa v9, v9, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12364; VI-NEXT: v_or_b32_e32 v9, v19, v912365; VI-NEXT: v_add_f16_e32 v19, 0x200, v812366; VI-NEXT: v_add_f16_sdwa v8, v8, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12367; VI-NEXT: v_add_f16_e32 v12, 0x200, v012368; VI-NEXT: v_add_f16_sdwa v0, v0, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12369; VI-NEXT: v_add_f16_e32 v14, 0x200, v112370; VI-NEXT: v_add_f16_sdwa v1, v1, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12371; VI-NEXT: v_add_f16_e32 v15, 0x200, v212372; VI-NEXT: v_add_f16_sdwa v2, v2, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12373; VI-NEXT: v_add_f16_e32 v16, 0x200, v312374; VI-NEXT: v_add_f16_sdwa v3, v3, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12375; VI-NEXT: v_add_f16_e32 v17, 0x200, v412376; VI-NEXT: v_add_f16_sdwa v4, v4, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12377; VI-NEXT: v_add_f16_e32 v18, 0x200, v512378; VI-NEXT: v_add_f16_sdwa v5, v5, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12379; VI-NEXT: v_or_b32_e32 v8, v19, v812380; VI-NEXT: v_add_f16_e32 v19, 0x200, v612381; VI-NEXT: v_add_f16_sdwa v6, v6, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12382; VI-NEXT: v_add_f16_sdwa v13, v7, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12383; VI-NEXT: v_add_f16_e32 v7, 0x200, v712384; VI-NEXT: v_or_b32_e32 v7, v7, v1312385; VI-NEXT: v_or_b32_e32 v6, v19, v612386; VI-NEXT: v_or_b32_e32 v5, v18, v512387; VI-NEXT: v_or_b32_e32 v4, v17, v412388; VI-NEXT: v_or_b32_e32 v3, v16, v312389; VI-NEXT: v_or_b32_e32 v2, v15, v212390; VI-NEXT: v_or_b32_e32 v1, v14, v112391; VI-NEXT: v_or_b32_e32 v0, v12, v012392; VI-NEXT: .LBB58_2: ; %end12393; VI-NEXT: s_or_b64 exec, exec, s[4:5]12394; VI-NEXT: s_setpc_b64 s[30:31]12395;12396; GFX9-LABEL: bitcast_v24f16_to_v24i16:12397; GFX9: ; %bb.0:12398; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12399; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1212400; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc12401; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]12402; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]12403; GFX9-NEXT: s_cbranch_execz .LBB58_212404; GFX9-NEXT: ; %bb.1: ; %cmp.true12405; GFX9-NEXT: s_movk_i32 s6, 0x20012406; GFX9-NEXT: v_pk_add_f16 v11, v11, s6 op_sel_hi:[1,0]12407; GFX9-NEXT: v_pk_add_f16 v10, v10, s6 op_sel_hi:[1,0]12408; GFX9-NEXT: v_pk_add_f16 v9, v9, s6 op_sel_hi:[1,0]12409; GFX9-NEXT: v_pk_add_f16 v8, v8, s6 op_sel_hi:[1,0]12410; GFX9-NEXT: v_pk_add_f16 v7, v7, s6 op_sel_hi:[1,0]12411; GFX9-NEXT: v_pk_add_f16 v6, v6, s6 op_sel_hi:[1,0]12412; GFX9-NEXT: v_pk_add_f16 v5, v5, s6 op_sel_hi:[1,0]12413; GFX9-NEXT: v_pk_add_f16 v4, v4, s6 op_sel_hi:[1,0]12414; GFX9-NEXT: v_pk_add_f16 v3, v3, s6 op_sel_hi:[1,0]12415; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0]12416; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0]12417; GFX9-NEXT: v_pk_add_f16 v0, v0, s6 op_sel_hi:[1,0]12418; GFX9-NEXT: .LBB58_2: ; %end12419; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]12420; GFX9-NEXT: s_setpc_b64 s[30:31]12421;12422; GFX11-LABEL: bitcast_v24f16_to_v24i16:12423; GFX11: ; %bb.0:12424; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12425; GFX11-NEXT: s_mov_b32 s0, exec_lo12426; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v1212427; GFX11-NEXT: s_xor_b32 s0, exec_lo, s012428; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)12429; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s012430; GFX11-NEXT: s_cbranch_execz .LBB58_212431; GFX11-NEXT: ; %bb.1: ; %cmp.true12432; GFX11-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]12433; GFX11-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]12434; GFX11-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]12435; GFX11-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]12436; GFX11-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]12437; GFX11-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]12438; GFX11-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]12439; GFX11-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]12440; GFX11-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]12441; GFX11-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]12442; GFX11-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]12443; GFX11-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]12444; GFX11-NEXT: .LBB58_2: ; %end12445; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s012446; GFX11-NEXT: s_setpc_b64 s[30:31]12447 %cmp = icmp eq i32 %b, 012448 br i1 %cmp, label %cmp.true, label %cmp.false12449 12450cmp.true:12451 %a1 = fadd <24 x half> %a, splat (half 0xH0200)12452 %a2 = bitcast <24 x half> %a1 to <24 x i16>12453 br label %end12454 12455cmp.false:12456 %a3 = bitcast <24 x half> %a to <24 x i16>12457 br label %end12458 12459end:12460 %phi = phi <24 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]12461 ret <24 x i16> %phi12462}12463 12464define inreg <24 x i16> @bitcast_v24f16_to_v24i16_scalar(<24 x half> inreg %a, i32 inreg %b) {12465; SI-LABEL: bitcast_v24f16_to_v24i16_scalar:12466; SI: ; %bb.0:12467; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12468; SI-NEXT: v_mov_b32_e32 v13, v812469; SI-NEXT: v_mov_b32_e32 v17, v712470; SI-NEXT: v_mov_b32_e32 v18, v412471; SI-NEXT: v_mov_b32_e32 v19, v312472; SI-NEXT: v_mov_b32_e32 v14, v012473; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1012474; SI-NEXT: v_cvt_f16_f32_e32 v0, s1612475; SI-NEXT: v_cvt_f16_f32_e32 v3, s1912476; SI-NEXT: v_cvt_f16_f32_e32 v4, s2012477; SI-NEXT: v_cvt_f16_f32_e32 v7, s2312478; SI-NEXT: v_cvt_f16_f32_e32 v8, s2412479; SI-NEXT: v_cvt_f16_f32_e32 v11, s2712480; SI-NEXT: v_cvt_f16_f32_e32 v12, s2812481; SI-NEXT: v_cvt_f16_f32_e32 v14, v1412482; SI-NEXT: v_cvt_f16_f32_e32 v15, v112483; SI-NEXT: v_cvt_f16_f32_e32 v16, v212484; SI-NEXT: v_cvt_f16_f32_e32 v30, v1912485; SI-NEXT: v_cvt_f16_f32_e32 v18, v1812486; SI-NEXT: v_cvt_f16_f32_e32 v19, v512487; SI-NEXT: v_cvt_f16_f32_e32 v20, v612488; SI-NEXT: v_cvt_f16_f32_e32 v23, v912489; SI-NEXT: v_cvt_f16_f32_e32 v31, v1712490; SI-NEXT: v_cvt_f16_f32_e32 v22, v1312491; SI-NEXT: v_cvt_f16_f32_e32 v27, s1712492; SI-NEXT: v_cvt_f16_f32_e32 v2, s1812493; SI-NEXT: v_cvt_f16_f32_e32 v25, s2112494; SI-NEXT: v_cvt_f16_f32_e32 v6, s2212495; SI-NEXT: v_cvt_f16_f32_e32 v28, s2512496; SI-NEXT: v_cvt_f16_f32_e32 v10, s2612497; SI-NEXT: v_cvt_f16_f32_e32 v29, s2912498; SI-NEXT: s_and_b64 s[4:5], vcc, exec12499; SI-NEXT: s_cbranch_scc0 .LBB59_412500; SI-NEXT: ; %bb.1: ; %cmp.false12501; SI-NEXT: s_cbranch_execnz .LBB59_312502; SI-NEXT: .LBB59_2: ; %cmp.true12503; SI-NEXT: v_cvt_f32_f16_e32 v7, v712504; SI-NEXT: v_cvt_f32_f16_e32 v6, v612505; SI-NEXT: v_cvt_f32_f16_e32 v11, v1112506; SI-NEXT: v_cvt_f32_f16_e32 v10, v1012507; SI-NEXT: v_cvt_f32_f16_e32 v15, v1512508; SI-NEXT: v_cvt_f32_f16_e32 v3, v312509; SI-NEXT: v_cvt_f32_f16_e32 v14, v1412510; SI-NEXT: v_cvt_f32_f16_e32 v19, v1912511; SI-NEXT: v_cvt_f32_f16_e32 v2, v212512; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v712513; SI-NEXT: v_cvt_f32_f16_e32 v18, v1812514; SI-NEXT: v_cvt_f16_f32_e32 v7, v712515; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v612516; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v1112517; SI-NEXT: v_cvt_f16_f32_e32 v6, v612518; SI-NEXT: v_cvt_f16_f32_e32 v11, v1112519; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v1012520; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v1512521; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v312522; SI-NEXT: v_cvt_f16_f32_e32 v10, v1012523; SI-NEXT: v_cvt_f16_f32_e32 v15, v1512524; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v1412525; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v1912526; SI-NEXT: v_cvt_f16_f32_e32 v3, v312527; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v212528; SI-NEXT: v_cvt_f16_f32_e32 v14, v1412529; SI-NEXT: v_cvt_f16_f32_e32 v19, v1912530; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v1812531; SI-NEXT: v_cvt_f32_f16_e32 v1, v2712532; SI-NEXT: v_cvt_f16_f32_e32 v2, v212533; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v712534; SI-NEXT: v_cvt_f16_f32_e32 v18, v1812535; SI-NEXT: v_or_b32_e32 v6, v6, v912536; SI-NEXT: v_cvt_f32_f16_e32 v9, v2812537; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v1112538; SI-NEXT: v_or_b32_e32 v10, v10, v1312539; SI-NEXT: v_cvt_f32_f16_e32 v13, v2912540; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v1512541; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v312542; SI-NEXT: v_or_b32_e32 v14, v14, v1712543; SI-NEXT: v_cvt_f32_f16_e32 v17, v3012544; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v1912545; SI-NEXT: v_cvt_f32_f16_e32 v23, v2312546; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v112547; SI-NEXT: v_or_b32_e32 v2, v2, v512548; SI-NEXT: v_cvt_f32_f16_e32 v5, v2512549; SI-NEXT: v_or_b32_e32 v18, v18, v2112550; SI-NEXT: v_cvt_f32_f16_e32 v21, v3112551; SI-NEXT: v_cvt_f32_f16_e32 v22, v2212552; SI-NEXT: v_cvt_f16_f32_e32 v1, v112553; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v912554; SI-NEXT: v_cvt_f16_f32_e32 v9, v912555; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v1312556; SI-NEXT: v_cvt_f32_f16_e32 v0, v012557; SI-NEXT: v_cvt_f32_f16_e32 v4, v412558; SI-NEXT: v_cvt_f32_f16_e32 v8, v812559; SI-NEXT: v_cvt_f32_f16_e32 v12, v1212560; SI-NEXT: v_cvt_f32_f16_e32 v16, v1612561; SI-NEXT: v_cvt_f32_f16_e32 v20, v2012562; SI-NEXT: v_cvt_f16_f32_e32 v13, v1312563; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v1712564; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v2312565; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v512566; SI-NEXT: v_cvt_f16_f32_e32 v17, v1712567; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v2112568; SI-NEXT: v_cvt_f16_f32_e32 v23, v2312569; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v2212570; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v112571; SI-NEXT: v_cvt_f16_f32_e32 v5, v512572; SI-NEXT: v_cvt_f16_f32_e32 v22, v2212573; SI-NEXT: v_cvt_f16_f32_e32 v21, v2112574; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v912575; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v012576; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v412577; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v812578; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v1212579; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v1612580; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v2012581; SI-NEXT: v_lshr_b64 v[27:28], v[1:2], 1612582; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v1312583; SI-NEXT: v_cvt_f16_f32_e32 v0, v012584; SI-NEXT: v_cvt_f16_f32_e32 v4, v412585; SI-NEXT: v_cvt_f16_f32_e32 v8, v812586; SI-NEXT: v_cvt_f16_f32_e32 v12, v1212587; SI-NEXT: v_cvt_f16_f32_e32 v16, v1612588; SI-NEXT: v_cvt_f16_f32_e32 v20, v2012589; SI-NEXT: v_lshr_b64 v[28:29], v[9:10], 1612590; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v1712591; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v2312592; SI-NEXT: v_lshr_b64 v[29:30], v[13:14], 1612593; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v512594; SI-NEXT: v_or_b32_e32 v22, v22, v2412595; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v2112596; SI-NEXT: v_lshr_b64 v[30:31], v[17:18], 1612597; SI-NEXT: v_lshr_b64 v[25:26], v[5:6], 1612598; SI-NEXT: v_lshr_b64 v[31:32], v[21:22], 1612599; SI-NEXT: v_or_b32_e32 v0, v0, v112600; SI-NEXT: v_or_b32_e32 v4, v4, v512601; SI-NEXT: v_or_b32_e32 v8, v8, v912602; SI-NEXT: v_or_b32_e32 v12, v12, v1312603; SI-NEXT: v_or_b32_e32 v16, v16, v1712604; SI-NEXT: v_or_b32_e32 v20, v20, v2112605; SI-NEXT: .LBB59_3: ; %end12606; SI-NEXT: v_mov_b32_e32 v1, v2712607; SI-NEXT: v_mov_b32_e32 v5, v2512608; SI-NEXT: v_mov_b32_e32 v9, v2812609; SI-NEXT: v_mov_b32_e32 v13, v2912610; SI-NEXT: v_mov_b32_e32 v17, v3012611; SI-NEXT: v_mov_b32_e32 v21, v3112612; SI-NEXT: s_setpc_b64 s[30:31]12613; SI-NEXT: .LBB59_4:12614; SI-NEXT: s_branch .LBB59_212615;12616; VI-LABEL: bitcast_v24f16_to_v24i16_scalar:12617; VI: ; %bb.0:12618; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12619; VI-NEXT: s_cmp_lg_u32 s28, 012620; VI-NEXT: s_cbranch_scc0 .LBB59_312621; VI-NEXT: ; %bb.1: ; %cmp.false12622; VI-NEXT: s_cbranch_execnz .LBB59_412623; VI-NEXT: .LBB59_2: ; %cmp.true12624; VI-NEXT: s_lshr_b32 s5, s26, 1612625; VI-NEXT: v_mov_b32_e32 v0, 0x20012626; VI-NEXT: v_mov_b32_e32 v2, s512627; VI-NEXT: s_lshr_b32 s5, s27, 1612628; VI-NEXT: v_add_f16_e32 v1, s26, v012629; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12630; VI-NEXT: v_mov_b32_e32 v4, s512631; VI-NEXT: s_lshr_b32 s5, s25, 1612632; VI-NEXT: v_or_b32_e32 v10, v1, v212633; VI-NEXT: v_mov_b32_e32 v2, s512634; VI-NEXT: v_add_f16_e32 v1, s25, v012635; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12636; VI-NEXT: s_lshr_b32 s5, s24, 1612637; VI-NEXT: v_or_b32_e32 v9, v1, v212638; VI-NEXT: v_mov_b32_e32 v2, s512639; VI-NEXT: v_add_f16_e32 v1, s24, v012640; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12641; VI-NEXT: s_lshr_b32 s5, s23, 1612642; VI-NEXT: v_or_b32_e32 v8, v1, v212643; VI-NEXT: v_mov_b32_e32 v2, s512644; VI-NEXT: v_add_f16_e32 v1, s23, v012645; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12646; VI-NEXT: s_lshr_b32 s5, s22, 1612647; VI-NEXT: v_or_b32_e32 v7, v1, v212648; VI-NEXT: v_mov_b32_e32 v2, s512649; VI-NEXT: v_add_f16_e32 v1, s22, v012650; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12651; VI-NEXT: s_lshr_b32 s5, s21, 1612652; VI-NEXT: v_or_b32_e32 v6, v1, v212653; VI-NEXT: v_mov_b32_e32 v2, s512654; VI-NEXT: v_add_f16_e32 v1, s21, v012655; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12656; VI-NEXT: s_lshr_b32 s5, s20, 1612657; VI-NEXT: v_or_b32_e32 v5, v1, v212658; VI-NEXT: v_mov_b32_e32 v2, s512659; VI-NEXT: v_add_f16_e32 v3, s27, v012660; VI-NEXT: v_add_f16_sdwa v4, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12661; VI-NEXT: v_add_f16_e32 v1, s20, v012662; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12663; VI-NEXT: s_lshr_b32 s5, s19, 1612664; VI-NEXT: v_or_b32_e32 v11, v3, v412665; VI-NEXT: v_or_b32_e32 v4, v1, v212666; VI-NEXT: v_mov_b32_e32 v2, s512667; VI-NEXT: v_add_f16_e32 v1, s19, v012668; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12669; VI-NEXT: s_lshr_b32 s5, s18, 1612670; VI-NEXT: v_or_b32_e32 v3, v1, v212671; VI-NEXT: v_mov_b32_e32 v2, s512672; VI-NEXT: s_lshr_b32 s4, s16, 1612673; VI-NEXT: v_add_f16_e32 v1, s18, v012674; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12675; VI-NEXT: v_or_b32_e32 v2, v1, v212676; VI-NEXT: v_mov_b32_e32 v1, s412677; VI-NEXT: s_lshr_b32 s4, s17, 1612678; VI-NEXT: v_add_f16_sdwa v13, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12679; VI-NEXT: v_mov_b32_e32 v1, s412680; VI-NEXT: v_add_f16_e32 v12, s16, v012681; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12682; VI-NEXT: v_add_f16_e32 v0, s17, v012683; VI-NEXT: v_or_b32_e32 v1, v0, v112684; VI-NEXT: v_or_b32_e32 v0, v12, v1312685; VI-NEXT: s_setpc_b64 s[30:31]12686; VI-NEXT: .LBB59_3:12687; VI-NEXT: s_branch .LBB59_212688; VI-NEXT: .LBB59_4:12689; VI-NEXT: v_mov_b32_e32 v0, s1612690; VI-NEXT: v_mov_b32_e32 v1, s1712691; VI-NEXT: v_mov_b32_e32 v2, s1812692; VI-NEXT: v_mov_b32_e32 v3, s1912693; VI-NEXT: v_mov_b32_e32 v4, s2012694; VI-NEXT: v_mov_b32_e32 v5, s2112695; VI-NEXT: v_mov_b32_e32 v6, s2212696; VI-NEXT: v_mov_b32_e32 v7, s2312697; VI-NEXT: v_mov_b32_e32 v8, s2412698; VI-NEXT: v_mov_b32_e32 v9, s2512699; VI-NEXT: v_mov_b32_e32 v10, s2612700; VI-NEXT: v_mov_b32_e32 v11, s2712701; VI-NEXT: v_mov_b32_e32 v12, s2812702; VI-NEXT: v_mov_b32_e32 v13, s2912703; VI-NEXT: v_mov_b32_e32 v14, s3012704; VI-NEXT: v_mov_b32_e32 v15, s3112705; VI-NEXT: s_setpc_b64 s[30:31]12706;12707; GFX9-LABEL: bitcast_v24f16_to_v24i16_scalar:12708; GFX9: ; %bb.0:12709; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12710; GFX9-NEXT: s_cmp_lg_u32 s28, 012711; GFX9-NEXT: s_cbranch_scc0 .LBB59_312712; GFX9-NEXT: ; %bb.1: ; %cmp.false12713; GFX9-NEXT: s_cbranch_execnz .LBB59_412714; GFX9-NEXT: .LBB59_2: ; %cmp.true12715; GFX9-NEXT: v_mov_b32_e32 v0, 0x20012716; GFX9-NEXT: v_pk_add_f16 v11, s27, v0 op_sel_hi:[1,0]12717; GFX9-NEXT: v_pk_add_f16 v10, s26, v0 op_sel_hi:[1,0]12718; GFX9-NEXT: v_pk_add_f16 v9, s25, v0 op_sel_hi:[1,0]12719; GFX9-NEXT: v_pk_add_f16 v8, s24, v0 op_sel_hi:[1,0]12720; GFX9-NEXT: v_pk_add_f16 v7, s23, v0 op_sel_hi:[1,0]12721; GFX9-NEXT: v_pk_add_f16 v6, s22, v0 op_sel_hi:[1,0]12722; GFX9-NEXT: v_pk_add_f16 v5, s21, v0 op_sel_hi:[1,0]12723; GFX9-NEXT: v_pk_add_f16 v4, s20, v0 op_sel_hi:[1,0]12724; GFX9-NEXT: v_pk_add_f16 v3, s19, v0 op_sel_hi:[1,0]12725; GFX9-NEXT: v_pk_add_f16 v2, s18, v0 op_sel_hi:[1,0]12726; GFX9-NEXT: v_pk_add_f16 v1, s17, v0 op_sel_hi:[1,0]12727; GFX9-NEXT: v_pk_add_f16 v0, s16, v0 op_sel_hi:[1,0]12728; GFX9-NEXT: s_setpc_b64 s[30:31]12729; GFX9-NEXT: .LBB59_3:12730; GFX9-NEXT: s_branch .LBB59_212731; GFX9-NEXT: .LBB59_4:12732; GFX9-NEXT: v_mov_b32_e32 v0, s1612733; GFX9-NEXT: v_mov_b32_e32 v1, s1712734; GFX9-NEXT: v_mov_b32_e32 v2, s1812735; GFX9-NEXT: v_mov_b32_e32 v3, s1912736; GFX9-NEXT: v_mov_b32_e32 v4, s2012737; GFX9-NEXT: v_mov_b32_e32 v5, s2112738; GFX9-NEXT: v_mov_b32_e32 v6, s2212739; GFX9-NEXT: v_mov_b32_e32 v7, s2312740; GFX9-NEXT: v_mov_b32_e32 v8, s2412741; GFX9-NEXT: v_mov_b32_e32 v9, s2512742; GFX9-NEXT: v_mov_b32_e32 v10, s2612743; GFX9-NEXT: v_mov_b32_e32 v11, s2712744; GFX9-NEXT: v_mov_b32_e32 v12, s2812745; GFX9-NEXT: v_mov_b32_e32 v13, s2912746; GFX9-NEXT: v_mov_b32_e32 v14, s3012747; GFX9-NEXT: v_mov_b32_e32 v15, s3112748; GFX9-NEXT: s_setpc_b64 s[30:31]12749;12750; GFX11-LABEL: bitcast_v24f16_to_v24i16_scalar:12751; GFX11: ; %bb.0:12752; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12753; GFX11-NEXT: s_mov_b32 s15, s312754; GFX11-NEXT: s_mov_b32 s14, s212755; GFX11-NEXT: s_mov_b32 s13, s112756; GFX11-NEXT: s_mov_b32 s12, s012757; GFX11-NEXT: s_cmp_lg_u32 s24, 012758; GFX11-NEXT: s_mov_b32 s0, 012759; GFX11-NEXT: s_cbranch_scc0 .LBB59_312760; GFX11-NEXT: ; %bb.1: ; %Flow12761; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s012762; GFX11-NEXT: s_cbranch_vccnz .LBB59_412763; GFX11-NEXT: .LBB59_2: ; %cmp.true12764; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s23 op_sel_hi:[0,1]12765; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s22 op_sel_hi:[0,1]12766; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s21 op_sel_hi:[0,1]12767; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s20 op_sel_hi:[0,1]12768; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s19 op_sel_hi:[0,1]12769; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s18 op_sel_hi:[0,1]12770; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s17 op_sel_hi:[0,1]12771; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s16 op_sel_hi:[0,1]12772; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s15 op_sel_hi:[0,1]12773; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s14 op_sel_hi:[0,1]12774; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s13 op_sel_hi:[0,1]12775; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s12 op_sel_hi:[0,1]12776; GFX11-NEXT: s_setpc_b64 s[30:31]12777; GFX11-NEXT: .LBB59_3:12778; GFX11-NEXT: s_branch .LBB59_212779; GFX11-NEXT: .LBB59_4:12780; GFX11-NEXT: v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s1312781; GFX11-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s1512782; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s1712783; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s1912784; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s2112785; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s2312786; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s2512787; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s2712788; GFX11-NEXT: s_setpc_b64 s[30:31]12789 %cmp = icmp eq i32 %b, 012790 br i1 %cmp, label %cmp.true, label %cmp.false12791 12792cmp.true:12793 %a1 = fadd <24 x half> %a, splat (half 0xH0200)12794 %a2 = bitcast <24 x half> %a1 to <24 x i16>12795 br label %end12796 12797cmp.false:12798 %a3 = bitcast <24 x half> %a to <24 x i16>12799 br label %end12800 12801end:12802 %phi = phi <24 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]12803 ret <24 x i16> %phi12804}12805;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:12806; GFX11-FAKE16: {{.*}}12807; GFX11-TRUE16: {{.*}}12808