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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52 3; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=SI %s4; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=VI %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s7; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s8 9define <3 x float> @bitcast_v3i32_to_v3f32(<3 x i32> %a, i32 %b) {10; SI-LABEL: bitcast_v3i32_to_v3f32:11; SI: ; %bb.0:12; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v314; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc15; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]16; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]17; SI-NEXT: ; %bb.1: ; %cmp.true18; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v219; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v120; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v021; SI-NEXT: ; %bb.2: ; %end22; SI-NEXT: s_or_b64 exec, exec, s[4:5]23; SI-NEXT: s_setpc_b64 s[30:31]24;25; VI-LABEL: bitcast_v3i32_to_v3f32:26; VI: ; %bb.0:27; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)28; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v329; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc30; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]31; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]32; VI-NEXT: ; %bb.1: ; %cmp.true33; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v234; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v135; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v036; VI-NEXT: ; %bb.2: ; %end37; VI-NEXT: s_or_b64 exec, exec, s[4:5]38; VI-NEXT: s_setpc_b64 s[30:31]39;40; GFX9-LABEL: bitcast_v3i32_to_v3f32:41; GFX9: ; %bb.0:42; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)43; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v344; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc45; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]46; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]47; GFX9-NEXT: ; %bb.1: ; %cmp.true48; GFX9-NEXT: v_add_u32_e32 v2, 3, v249; GFX9-NEXT: v_add_u32_e32 v1, 3, v150; GFX9-NEXT: v_add_u32_e32 v0, 3, v051; GFX9-NEXT: ; %bb.2: ; %end52; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]53; GFX9-NEXT: s_setpc_b64 s[30:31]54;55; GFX11-LABEL: bitcast_v3i32_to_v3f32:56; GFX11: ; %bb.0:57; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)58; GFX11-NEXT: s_mov_b32 s0, exec_lo59; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v360; GFX11-NEXT: s_xor_b32 s0, exec_lo, s061; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)62; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s063; GFX11-NEXT: ; %bb.1: ; %cmp.true64; GFX11-NEXT: v_add_nc_u32_e32 v2, 3, v265; GFX11-NEXT: v_add_nc_u32_e32 v1, 3, v166; GFX11-NEXT: v_add_nc_u32_e32 v0, 3, v067; GFX11-NEXT: ; %bb.2: ; %end68; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s069; GFX11-NEXT: s_setpc_b64 s[30:31]70 %cmp = icmp eq i32 %b, 071 br i1 %cmp, label %cmp.true, label %cmp.false72 73cmp.true:74 %a1 = add <3 x i32> %a, splat (i32 3)75 %a2 = bitcast <3 x i32> %a1 to <3 x float>76 br label %end77 78cmp.false:79 %a3 = bitcast <3 x i32> %a to <3 x float>80 br label %end81 82end:83 %phi = phi <3 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]84 ret <3 x float> %phi85}86 87define inreg <3 x float> @bitcast_v3i32_to_v3f32_scalar(<3 x i32> inreg %a, i32 inreg %b) {88; SI-LABEL: bitcast_v3i32_to_v3f32_scalar:89; SI: ; %bb.0:90; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)91; SI-NEXT: s_cmp_lg_u32 s19, 092; SI-NEXT: s_cbranch_scc0 .LBB1_493; SI-NEXT: ; %bb.1: ; %cmp.false94; SI-NEXT: s_cbranch_execnz .LBB1_395; SI-NEXT: .LBB1_2: ; %cmp.true96; SI-NEXT: s_add_i32 s18, s18, 397; SI-NEXT: s_add_i32 s17, s17, 398; SI-NEXT: s_add_i32 s16, s16, 399; SI-NEXT: .LBB1_3: ; %end100; SI-NEXT: v_mov_b32_e32 v0, s16101; SI-NEXT: v_mov_b32_e32 v1, s17102; SI-NEXT: v_mov_b32_e32 v2, s18103; SI-NEXT: s_setpc_b64 s[30:31]104; SI-NEXT: .LBB1_4:105; SI-NEXT: s_branch .LBB1_2106;107; VI-LABEL: bitcast_v3i32_to_v3f32_scalar:108; VI: ; %bb.0:109; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)110; VI-NEXT: s_cmp_lg_u32 s19, 0111; VI-NEXT: s_cbranch_scc0 .LBB1_4112; VI-NEXT: ; %bb.1: ; %cmp.false113; VI-NEXT: s_cbranch_execnz .LBB1_3114; VI-NEXT: .LBB1_2: ; %cmp.true115; VI-NEXT: s_add_i32 s18, s18, 3116; VI-NEXT: s_add_i32 s17, s17, 3117; VI-NEXT: s_add_i32 s16, s16, 3118; VI-NEXT: .LBB1_3: ; %end119; VI-NEXT: v_mov_b32_e32 v0, s16120; VI-NEXT: v_mov_b32_e32 v1, s17121; VI-NEXT: v_mov_b32_e32 v2, s18122; VI-NEXT: s_setpc_b64 s[30:31]123; VI-NEXT: .LBB1_4:124; VI-NEXT: s_branch .LBB1_2125;126; GFX9-LABEL: bitcast_v3i32_to_v3f32_scalar:127; GFX9: ; %bb.0:128; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)129; GFX9-NEXT: s_cmp_lg_u32 s19, 0130; GFX9-NEXT: s_cbranch_scc0 .LBB1_4131; GFX9-NEXT: ; %bb.1: ; %cmp.false132; GFX9-NEXT: s_cbranch_execnz .LBB1_3133; GFX9-NEXT: .LBB1_2: ; %cmp.true134; GFX9-NEXT: s_add_i32 s18, s18, 3135; GFX9-NEXT: s_add_i32 s17, s17, 3136; GFX9-NEXT: s_add_i32 s16, s16, 3137; GFX9-NEXT: .LBB1_3: ; %end138; GFX9-NEXT: v_mov_b32_e32 v0, s16139; GFX9-NEXT: v_mov_b32_e32 v1, s17140; GFX9-NEXT: v_mov_b32_e32 v2, s18141; GFX9-NEXT: s_setpc_b64 s[30:31]142; GFX9-NEXT: .LBB1_4:143; GFX9-NEXT: s_branch .LBB1_2144;145; GFX11-LABEL: bitcast_v3i32_to_v3f32_scalar:146; GFX11: ; %bb.0:147; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)148; GFX11-NEXT: s_cmp_lg_u32 s3, 0149; GFX11-NEXT: s_mov_b32 s3, 0150; GFX11-NEXT: s_cbranch_scc0 .LBB1_4151; GFX11-NEXT: ; %bb.1: ; %Flow152; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s3153; GFX11-NEXT: s_cbranch_vccnz .LBB1_3154; GFX11-NEXT: .LBB1_2: ; %cmp.true155; GFX11-NEXT: s_add_i32 s2, s2, 3156; GFX11-NEXT: s_add_i32 s1, s1, 3157; GFX11-NEXT: s_add_i32 s0, s0, 3158; GFX11-NEXT: .LBB1_3: ; %end159; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)160; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1161; GFX11-NEXT: v_mov_b32_e32 v2, s2162; GFX11-NEXT: s_setpc_b64 s[30:31]163; GFX11-NEXT: .LBB1_4:164; GFX11-NEXT: s_branch .LBB1_2165 %cmp = icmp eq i32 %b, 0166 br i1 %cmp, label %cmp.true, label %cmp.false167 168cmp.true:169 %a1 = add <3 x i32> %a, splat (i32 3)170 %a2 = bitcast <3 x i32> %a1 to <3 x float>171 br label %end172 173cmp.false:174 %a3 = bitcast <3 x i32> %a to <3 x float>175 br label %end176 177end:178 %phi = phi <3 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]179 ret <3 x float> %phi180}181 182define <3 x i32> @bitcast_v3f32_to_v3i32(<3 x float> %a, i32 %b) {183; SI-LABEL: bitcast_v3f32_to_v3i32:184; SI: ; %bb.0:185; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)186; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3187; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc188; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]189; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]190; SI-NEXT: ; %bb.1: ; %cmp.true191; SI-NEXT: v_add_f32_e32 v2, 1.0, v2192; SI-NEXT: v_add_f32_e32 v1, 1.0, v1193; SI-NEXT: v_add_f32_e32 v0, 1.0, v0194; SI-NEXT: ; %bb.2: ; %end195; SI-NEXT: s_or_b64 exec, exec, s[4:5]196; SI-NEXT: s_setpc_b64 s[30:31]197;198; VI-LABEL: bitcast_v3f32_to_v3i32:199; VI: ; %bb.0:200; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)201; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3202; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc203; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]204; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]205; VI-NEXT: ; %bb.1: ; %cmp.true206; VI-NEXT: v_add_f32_e32 v2, 1.0, v2207; VI-NEXT: v_add_f32_e32 v1, 1.0, v1208; VI-NEXT: v_add_f32_e32 v0, 1.0, v0209; VI-NEXT: ; %bb.2: ; %end210; VI-NEXT: s_or_b64 exec, exec, s[4:5]211; VI-NEXT: s_setpc_b64 s[30:31]212;213; GFX9-LABEL: bitcast_v3f32_to_v3i32:214; GFX9: ; %bb.0:215; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)216; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3217; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc218; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]219; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]220; GFX9-NEXT: ; %bb.1: ; %cmp.true221; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v2222; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v1223; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v0224; GFX9-NEXT: ; %bb.2: ; %end225; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]226; GFX9-NEXT: s_setpc_b64 s[30:31]227;228; GFX11-LABEL: bitcast_v3f32_to_v3i32:229; GFX11: ; %bb.0:230; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)231; GFX11-NEXT: s_mov_b32 s0, exec_lo232; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v3233; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0234; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)235; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0236; GFX11-NEXT: ; %bb.1: ; %cmp.true237; GFX11-NEXT: v_dual_add_f32 v2, 1.0, v2 :: v_dual_add_f32 v1, 1.0, v1238; GFX11-NEXT: v_add_f32_e32 v0, 1.0, v0239; GFX11-NEXT: ; %bb.2: ; %end240; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0241; GFX11-NEXT: s_setpc_b64 s[30:31]242 %cmp = icmp eq i32 %b, 0243 br i1 %cmp, label %cmp.true, label %cmp.false244 245cmp.true:246 %a1 = fadd <3 x float> %a, splat (float 1.000000e+00)247 %a2 = bitcast <3 x float> %a1 to <3 x i32>248 br label %end249 250cmp.false:251 %a3 = bitcast <3 x float> %a to <3 x i32>252 br label %end253 254end:255 %phi = phi <3 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]256 ret <3 x i32> %phi257}258 259define inreg <3 x i32> @bitcast_v3f32_to_v3i32_scalar(<3 x float> inreg %a, i32 inreg %b) {260; SI-LABEL: bitcast_v3f32_to_v3i32_scalar:261; SI: ; %bb.0:262; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)263; SI-NEXT: s_cmp_lg_u32 s19, 0264; SI-NEXT: s_cbranch_scc0 .LBB3_3265; SI-NEXT: ; %bb.1: ; %cmp.false266; SI-NEXT: s_cbranch_execnz .LBB3_4267; SI-NEXT: .LBB3_2: ; %cmp.true268; SI-NEXT: v_add_f32_e64 v2, s18, 1.0269; SI-NEXT: v_add_f32_e64 v1, s17, 1.0270; SI-NEXT: v_add_f32_e64 v0, s16, 1.0271; SI-NEXT: s_setpc_b64 s[30:31]272; SI-NEXT: .LBB3_3:273; SI-NEXT: s_branch .LBB3_2274; SI-NEXT: .LBB3_4:275; SI-NEXT: v_mov_b32_e32 v0, s16276; SI-NEXT: v_mov_b32_e32 v1, s17277; SI-NEXT: v_mov_b32_e32 v2, s18278; SI-NEXT: s_setpc_b64 s[30:31]279;280; VI-LABEL: bitcast_v3f32_to_v3i32_scalar:281; VI: ; %bb.0:282; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)283; VI-NEXT: s_cmp_lg_u32 s19, 0284; VI-NEXT: s_cbranch_scc0 .LBB3_3285; VI-NEXT: ; %bb.1: ; %cmp.false286; VI-NEXT: s_cbranch_execnz .LBB3_4287; VI-NEXT: .LBB3_2: ; %cmp.true288; VI-NEXT: v_add_f32_e64 v2, s18, 1.0289; VI-NEXT: v_add_f32_e64 v1, s17, 1.0290; VI-NEXT: v_add_f32_e64 v0, s16, 1.0291; VI-NEXT: s_setpc_b64 s[30:31]292; VI-NEXT: .LBB3_3:293; VI-NEXT: s_branch .LBB3_2294; VI-NEXT: .LBB3_4:295; VI-NEXT: v_mov_b32_e32 v0, s16296; VI-NEXT: v_mov_b32_e32 v1, s17297; VI-NEXT: v_mov_b32_e32 v2, s18298; VI-NEXT: s_setpc_b64 s[30:31]299;300; GFX9-LABEL: bitcast_v3f32_to_v3i32_scalar:301; GFX9: ; %bb.0:302; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)303; GFX9-NEXT: s_cmp_lg_u32 s19, 0304; GFX9-NEXT: s_cbranch_scc0 .LBB3_3305; GFX9-NEXT: ; %bb.1: ; %cmp.false306; GFX9-NEXT: s_cbranch_execnz .LBB3_4307; GFX9-NEXT: .LBB3_2: ; %cmp.true308; GFX9-NEXT: v_add_f32_e64 v2, s18, 1.0309; GFX9-NEXT: v_add_f32_e64 v1, s17, 1.0310; GFX9-NEXT: v_add_f32_e64 v0, s16, 1.0311; GFX9-NEXT: s_setpc_b64 s[30:31]312; GFX9-NEXT: .LBB3_3:313; GFX9-NEXT: s_branch .LBB3_2314; GFX9-NEXT: .LBB3_4:315; GFX9-NEXT: v_mov_b32_e32 v0, s16316; GFX9-NEXT: v_mov_b32_e32 v1, s17317; GFX9-NEXT: v_mov_b32_e32 v2, s18318; GFX9-NEXT: s_setpc_b64 s[30:31]319;320; GFX11-LABEL: bitcast_v3f32_to_v3i32_scalar:321; GFX11: ; %bb.0:322; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)323; GFX11-NEXT: s_cmp_lg_u32 s3, 0324; GFX11-NEXT: s_mov_b32 s3, 0325; GFX11-NEXT: s_cbranch_scc0 .LBB3_3326; GFX11-NEXT: ; %bb.1: ; %Flow327; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s3328; GFX11-NEXT: s_cbranch_vccnz .LBB3_4329; GFX11-NEXT: .LBB3_2: ; %cmp.true330; GFX11-NEXT: v_add_f32_e64 v2, s2, 1.0331; GFX11-NEXT: v_add_f32_e64 v1, s1, 1.0332; GFX11-NEXT: v_add_f32_e64 v0, s0, 1.0333; GFX11-NEXT: s_setpc_b64 s[30:31]334; GFX11-NEXT: .LBB3_3:335; GFX11-NEXT: s_branch .LBB3_2336; GFX11-NEXT: .LBB3_4:337; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1338; GFX11-NEXT: v_mov_b32_e32 v2, s2339; GFX11-NEXT: s_setpc_b64 s[30:31]340 %cmp = icmp eq i32 %b, 0341 br i1 %cmp, label %cmp.true, label %cmp.false342 343cmp.true:344 %a1 = fadd <3 x float> %a, splat (float 1.000000e+00)345 %a2 = bitcast <3 x float> %a1 to <3 x i32>346 br label %end347 348cmp.false:349 %a3 = bitcast <3 x float> %a to <3 x i32>350 br label %end351 352end:353 %phi = phi <3 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]354 ret <3 x i32> %phi355}356 357define <12 x i8> @bitcast_v3i32_to_v12i8(<3 x i32> %a, i32 %b) {358; SI-LABEL: bitcast_v3i32_to_v12i8:359; SI: ; %bb.0:360; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)361; SI-NEXT: v_mov_b32_e32 v8, v2362; SI-NEXT: v_mov_b32_e32 v4, v1363; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3364; SI-NEXT: ; implicit-def: $vgpr1365; SI-NEXT: ; implicit-def: $vgpr2366; SI-NEXT: ; implicit-def: $vgpr3367; SI-NEXT: ; implicit-def: $vgpr5368; SI-NEXT: ; implicit-def: $vgpr6369; SI-NEXT: ; implicit-def: $vgpr7370; SI-NEXT: ; implicit-def: $vgpr9371; SI-NEXT: ; implicit-def: $vgpr10372; SI-NEXT: ; implicit-def: $vgpr11373; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc374; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]375; SI-NEXT: s_cbranch_execnz .LBB4_3376; SI-NEXT: ; %bb.1: ; %Flow377; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]378; SI-NEXT: s_cbranch_execnz .LBB4_4379; SI-NEXT: .LBB4_2: ; %end380; SI-NEXT: s_or_b64 exec, exec, s[4:5]381; SI-NEXT: s_setpc_b64 s[30:31]382; SI-NEXT: .LBB4_3: ; %cmp.false383; SI-NEXT: v_alignbit_b32 v11, v0, v8, 24384; SI-NEXT: v_alignbit_b32 v10, v0, v8, 16385; SI-NEXT: v_alignbit_b32 v9, v0, v8, 8386; SI-NEXT: v_alignbit_b32 v3, v4, v0, 24387; SI-NEXT: v_alignbit_b32 v2, v4, v0, 16388; SI-NEXT: v_alignbit_b32 v1, v4, v0, 8389; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v4390; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v4391; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v4392; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]393; SI-NEXT: s_cbranch_execz .LBB4_2394; SI-NEXT: .LBB4_4: ; %cmp.true395; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8396; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4397; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0398; SI-NEXT: v_alignbit_b32 v3, v4, v0, 24399; SI-NEXT: v_alignbit_b32 v2, v4, v0, 16400; SI-NEXT: v_alignbit_b32 v1, v4, v0, 8401; SI-NEXT: v_alignbit_b32 v11, v0, v8, 24402; SI-NEXT: v_alignbit_b32 v10, v0, v8, 16403; SI-NEXT: v_alignbit_b32 v9, v0, v8, 8404; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v4405; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v4406; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v4407; SI-NEXT: s_or_b64 exec, exec, s[4:5]408; SI-NEXT: s_setpc_b64 s[30:31]409;410; VI-LABEL: bitcast_v3i32_to_v12i8:411; VI: ; %bb.0:412; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)413; VI-NEXT: v_mov_b32_e32 v8, v2414; VI-NEXT: v_mov_b32_e32 v14, v1415; VI-NEXT: v_mov_b32_e32 v13, v0416; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3417; VI-NEXT: ; implicit-def: $vgpr1418; VI-NEXT: ; implicit-def: $vgpr2419; VI-NEXT: ; implicit-def: $vgpr3420; VI-NEXT: ; implicit-def: $vgpr5421; VI-NEXT: ; implicit-def: $vgpr6422; VI-NEXT: ; implicit-def: $vgpr7423; VI-NEXT: ; implicit-def: $vgpr9424; VI-NEXT: ; implicit-def: $vgpr10425; VI-NEXT: ; implicit-def: $vgpr11426; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc427; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]428; VI-NEXT: s_cbranch_execz .LBB4_2429; VI-NEXT: ; %bb.1: ; %cmp.false430; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v8431; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v8432; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v14433; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v14434; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v14435; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v13436; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]437; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]438; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v13439; VI-NEXT: .LBB4_2: ; %Flow440; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]441; VI-NEXT: s_cbranch_execz .LBB4_4442; VI-NEXT: ; %bb.3: ; %cmp.true443; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8444; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v14445; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v13446; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v8447; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]448; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]449; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v8450; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v14451; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v14452; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v14453; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v13454; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v13455; VI-NEXT: .LBB4_4: ; %end456; VI-NEXT: s_or_b64 exec, exec, s[4:5]457; VI-NEXT: v_mov_b32_e32 v0, v13458; VI-NEXT: v_mov_b32_e32 v4, v14459; VI-NEXT: s_setpc_b64 s[30:31]460;461; GFX9-LABEL: bitcast_v3i32_to_v12i8:462; GFX9: ; %bb.0:463; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)464; GFX9-NEXT: v_mov_b32_e32 v8, v2465; GFX9-NEXT: v_mov_b32_e32 v14, v1466; GFX9-NEXT: v_mov_b32_e32 v13, v0467; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3468; GFX9-NEXT: ; implicit-def: $vgpr1469; GFX9-NEXT: ; implicit-def: $vgpr2470; GFX9-NEXT: ; implicit-def: $vgpr3471; GFX9-NEXT: ; implicit-def: $vgpr5472; GFX9-NEXT: ; implicit-def: $vgpr6473; GFX9-NEXT: ; implicit-def: $vgpr7474; GFX9-NEXT: ; implicit-def: $vgpr9475; GFX9-NEXT: ; implicit-def: $vgpr10476; GFX9-NEXT: ; implicit-def: $vgpr11477; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc478; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]479; GFX9-NEXT: s_cbranch_execz .LBB4_2480; GFX9-NEXT: ; %bb.1: ; %cmp.false481; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v8482; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v8483; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v14484; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v14485; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v14486; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v13487; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]488; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]489; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v13490; GFX9-NEXT: .LBB4_2: ; %Flow491; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]492; GFX9-NEXT: s_cbranch_execz .LBB4_4493; GFX9-NEXT: ; %bb.3: ; %cmp.true494; GFX9-NEXT: v_add_u32_e32 v8, 3, v8495; GFX9-NEXT: v_add_u32_e32 v14, 3, v14496; GFX9-NEXT: v_add_u32_e32 v13, 3, v13497; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v8498; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]499; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]500; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v8501; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v14502; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v14503; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v14504; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v13505; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v13506; GFX9-NEXT: .LBB4_4: ; %end507; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]508; GFX9-NEXT: v_mov_b32_e32 v0, v13509; GFX9-NEXT: v_mov_b32_e32 v4, v14510; GFX9-NEXT: s_setpc_b64 s[30:31]511;512; GFX11-TRUE16-LABEL: bitcast_v3i32_to_v12i8:513; GFX11-TRUE16: ; %bb.0:514; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)515; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v11, v0516; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, v1517; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v3518; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16519; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16520; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16521; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16522; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16523; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16524; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo525; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)526; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0527; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false528; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v10529; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v12530; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v12531; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[10:11]532; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[11:12]533; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v11534; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow535; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0536; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB4_4537; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true538; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v12539; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11540; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v10541; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)542; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v12543; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[11:12]544; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)545; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[10:11]546; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v10547; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v12548; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v11549; GFX11-TRUE16-NEXT: .LBB4_4: ; %end550; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0551; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v11.l552; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v11.h553; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v12.l554; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v12.h555; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v10.l556; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v10.h557; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v13.l558; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]559;560; GFX11-FAKE16-LABEL: bitcast_v3i32_to_v12i8:561; GFX11-FAKE16: ; %bb.0:562; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)563; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, v2 :: v_dual_mov_b32 v13, v0564; GFX11-FAKE16-NEXT: v_mov_b32_e32 v14, v1565; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v3566; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr1567; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr2568; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr3569; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr5570; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr6571; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr7572; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr9573; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr10574; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr11575; GFX11-FAKE16-NEXT: s_and_saveexec_b32 s0, vcc_lo576; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)577; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s0578; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB4_2579; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false580; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v8581; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v8582; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v14583; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v14584; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v14585; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v13586; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]587; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]588; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v13589; GFX11-FAKE16-NEXT: .LBB4_2: ; %Flow590; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0591; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB4_4592; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true593; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 3, v8594; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 3, v14595; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 3, v13596; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)597; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v8598; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v8599; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]600; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v14601; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v14602; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]603; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v14604; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v13605; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v13606; GFX11-FAKE16-NEXT: .LBB4_4: ; %end607; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0608; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v13609; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v14610; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]611 %cmp = icmp eq i32 %b, 0612 br i1 %cmp, label %cmp.true, label %cmp.false613 614cmp.true:615 %a1 = add <3 x i32> %a, splat (i32 3)616 %a2 = bitcast <3 x i32> %a1 to <12 x i8>617 br label %end618 619cmp.false:620 %a3 = bitcast <3 x i32> %a to <12 x i8>621 br label %end622 623end:624 %phi = phi <12 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]625 ret <12 x i8> %phi626}627 628define inreg <12 x i8> @bitcast_v3i32_to_v12i8_scalar(<3 x i32> inreg %a, i32 inreg %b) {629; SI-LABEL: bitcast_v3i32_to_v12i8_scalar:630; SI: ; %bb.0:631; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)632; SI-NEXT: s_cmp_lg_u32 s19, 0633; SI-NEXT: s_cbranch_scc0 .LBB5_4634; SI-NEXT: ; %bb.1: ; %cmp.false635; SI-NEXT: s_lshr_b32 s19, s17, 24636; SI-NEXT: s_lshr_b32 s22, s17, 16637; SI-NEXT: s_lshr_b32 s23, s17, 8638; SI-NEXT: s_lshr_b64 s[6:7], s[18:19], 24639; SI-NEXT: s_lshr_b64 s[10:11], s[18:19], 16640; SI-NEXT: s_lshr_b64 s[14:15], s[18:19], 8641; SI-NEXT: s_lshr_b64 s[4:5], s[16:17], 24642; SI-NEXT: s_lshr_b64 s[8:9], s[16:17], 16643; SI-NEXT: s_lshr_b64 s[12:13], s[16:17], 8644; SI-NEXT: s_cbranch_execnz .LBB5_3645; SI-NEXT: .LBB5_2: ; %cmp.true646; SI-NEXT: s_add_i32 s17, s17, 3647; SI-NEXT: s_add_i32 s18, s18, 3648; SI-NEXT: s_add_i32 s16, s16, 3649; SI-NEXT: s_lshr_b32 s19, s17, 24650; SI-NEXT: s_lshr_b64 s[4:5], s[16:17], 24651; SI-NEXT: s_lshr_b64 s[8:9], s[16:17], 16652; SI-NEXT: s_lshr_b64 s[12:13], s[16:17], 8653; SI-NEXT: s_lshr_b32 s22, s17, 16654; SI-NEXT: s_lshr_b32 s23, s17, 8655; SI-NEXT: s_lshr_b64 s[6:7], s[18:19], 24656; SI-NEXT: s_lshr_b64 s[10:11], s[18:19], 16657; SI-NEXT: s_lshr_b64 s[14:15], s[18:19], 8658; SI-NEXT: .LBB5_3: ; %end659; SI-NEXT: v_mov_b32_e32 v0, s16660; SI-NEXT: v_mov_b32_e32 v1, s12661; SI-NEXT: v_mov_b32_e32 v2, s8662; SI-NEXT: v_mov_b32_e32 v3, s4663; SI-NEXT: v_mov_b32_e32 v4, s17664; SI-NEXT: v_mov_b32_e32 v5, s23665; SI-NEXT: v_mov_b32_e32 v6, s22666; SI-NEXT: v_mov_b32_e32 v7, s19667; SI-NEXT: v_mov_b32_e32 v8, s18668; SI-NEXT: v_mov_b32_e32 v9, s14669; SI-NEXT: v_mov_b32_e32 v10, s10670; SI-NEXT: v_mov_b32_e32 v11, s6671; SI-NEXT: s_setpc_b64 s[30:31]672; SI-NEXT: .LBB5_4:673; SI-NEXT: ; implicit-def: $sgpr12674; SI-NEXT: ; implicit-def: $sgpr8675; SI-NEXT: ; implicit-def: $sgpr4676; SI-NEXT: ; implicit-def: $sgpr23677; SI-NEXT: ; implicit-def: $sgpr22678; SI-NEXT: ; implicit-def: $sgpr19679; SI-NEXT: ; implicit-def: $sgpr14680; SI-NEXT: ; implicit-def: $sgpr10681; SI-NEXT: ; implicit-def: $sgpr6682; SI-NEXT: s_branch .LBB5_2683;684; VI-LABEL: bitcast_v3i32_to_v12i8_scalar:685; VI: ; %bb.0:686; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)687; VI-NEXT: s_cmp_lg_u32 s19, 0688; VI-NEXT: s_cbranch_scc0 .LBB5_4689; VI-NEXT: ; %bb.1: ; %cmp.false690; VI-NEXT: s_lshr_b32 s19, s16, 8691; VI-NEXT: s_lshr_b32 s10, s18, 16692; VI-NEXT: s_lshr_b32 s11, s18, 8693; VI-NEXT: s_lshr_b32 s12, s17, 24694; VI-NEXT: s_lshr_b32 s13, s17, 16695; VI-NEXT: s_lshr_b32 s14, s17, 8696; VI-NEXT: s_lshr_b32 s15, s16, 16697; VI-NEXT: s_lshr_b64 s[6:7], s[18:19], 24698; VI-NEXT: s_lshr_b64 s[4:5], s[16:17], 24699; VI-NEXT: s_cbranch_execnz .LBB5_3700; VI-NEXT: .LBB5_2: ; %cmp.true701; VI-NEXT: s_add_i32 s16, s16, 3702; VI-NEXT: s_add_i32 s18, s18, 3703; VI-NEXT: s_add_i32 s17, s17, 3704; VI-NEXT: s_lshr_b32 s19, s16, 8705; VI-NEXT: s_lshr_b64 s[4:5], s[16:17], 24706; VI-NEXT: s_lshr_b32 s10, s18, 16707; VI-NEXT: s_lshr_b32 s11, s18, 8708; VI-NEXT: s_lshr_b32 s12, s17, 24709; VI-NEXT: s_lshr_b32 s13, s17, 16710; VI-NEXT: s_lshr_b32 s14, s17, 8711; VI-NEXT: s_lshr_b32 s15, s16, 16712; VI-NEXT: s_lshr_b64 s[6:7], s[18:19], 24713; VI-NEXT: .LBB5_3: ; %end714; VI-NEXT: v_mov_b32_e32 v0, s16715; VI-NEXT: v_mov_b32_e32 v1, s19716; VI-NEXT: v_mov_b32_e32 v2, s15717; VI-NEXT: v_mov_b32_e32 v3, s4718; VI-NEXT: v_mov_b32_e32 v4, s17719; VI-NEXT: v_mov_b32_e32 v5, s14720; VI-NEXT: v_mov_b32_e32 v6, s13721; VI-NEXT: v_mov_b32_e32 v7, s12722; VI-NEXT: v_mov_b32_e32 v8, s18723; VI-NEXT: v_mov_b32_e32 v9, s11724; VI-NEXT: v_mov_b32_e32 v10, s10725; VI-NEXT: v_mov_b32_e32 v11, s6726; VI-NEXT: s_setpc_b64 s[30:31]727; VI-NEXT: .LBB5_4:728; VI-NEXT: ; implicit-def: $sgpr19729; VI-NEXT: ; implicit-def: $sgpr15730; VI-NEXT: ; implicit-def: $sgpr4731; VI-NEXT: ; implicit-def: $sgpr14732; VI-NEXT: ; implicit-def: $sgpr13733; VI-NEXT: ; implicit-def: $sgpr12734; VI-NEXT: ; implicit-def: $sgpr11735; VI-NEXT: ; implicit-def: $sgpr10736; VI-NEXT: ; implicit-def: $sgpr6737; VI-NEXT: s_branch .LBB5_2738;739; GFX9-LABEL: bitcast_v3i32_to_v12i8_scalar:740; GFX9: ; %bb.0:741; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)742; GFX9-NEXT: s_cmp_lg_u32 s19, 0743; GFX9-NEXT: s_cbranch_scc0 .LBB5_4744; GFX9-NEXT: ; %bb.1: ; %cmp.false745; GFX9-NEXT: s_lshr_b32 s19, s16, 8746; GFX9-NEXT: s_lshr_b32 s10, s18, 16747; GFX9-NEXT: s_lshr_b32 s11, s18, 8748; GFX9-NEXT: s_lshr_b32 s12, s17, 24749; GFX9-NEXT: s_lshr_b32 s13, s17, 16750; GFX9-NEXT: s_lshr_b32 s14, s17, 8751; GFX9-NEXT: s_lshr_b32 s15, s16, 16752; GFX9-NEXT: s_lshr_b64 s[6:7], s[18:19], 24753; GFX9-NEXT: s_lshr_b64 s[4:5], s[16:17], 24754; GFX9-NEXT: s_cbranch_execnz .LBB5_3755; GFX9-NEXT: .LBB5_2: ; %cmp.true756; GFX9-NEXT: s_add_i32 s16, s16, 3757; GFX9-NEXT: s_add_i32 s18, s18, 3758; GFX9-NEXT: s_add_i32 s17, s17, 3759; GFX9-NEXT: s_lshr_b32 s19, s16, 8760; GFX9-NEXT: s_lshr_b64 s[4:5], s[16:17], 24761; GFX9-NEXT: s_lshr_b32 s10, s18, 16762; GFX9-NEXT: s_lshr_b32 s11, s18, 8763; GFX9-NEXT: s_lshr_b32 s12, s17, 24764; GFX9-NEXT: s_lshr_b32 s13, s17, 16765; GFX9-NEXT: s_lshr_b32 s14, s17, 8766; GFX9-NEXT: s_lshr_b32 s15, s16, 16767; GFX9-NEXT: s_lshr_b64 s[6:7], s[18:19], 24768; GFX9-NEXT: .LBB5_3: ; %end769; GFX9-NEXT: v_mov_b32_e32 v0, s16770; GFX9-NEXT: v_mov_b32_e32 v1, s19771; GFX9-NEXT: v_mov_b32_e32 v2, s15772; GFX9-NEXT: v_mov_b32_e32 v3, s4773; GFX9-NEXT: v_mov_b32_e32 v4, s17774; GFX9-NEXT: v_mov_b32_e32 v5, s14775; GFX9-NEXT: v_mov_b32_e32 v6, s13776; GFX9-NEXT: v_mov_b32_e32 v7, s12777; GFX9-NEXT: v_mov_b32_e32 v8, s18778; GFX9-NEXT: v_mov_b32_e32 v9, s11779; GFX9-NEXT: v_mov_b32_e32 v10, s10780; GFX9-NEXT: v_mov_b32_e32 v11, s6781; GFX9-NEXT: s_setpc_b64 s[30:31]782; GFX9-NEXT: .LBB5_4:783; GFX9-NEXT: ; implicit-def: $sgpr19784; GFX9-NEXT: ; implicit-def: $sgpr15785; GFX9-NEXT: ; implicit-def: $sgpr4786; GFX9-NEXT: ; implicit-def: $sgpr14787; GFX9-NEXT: ; implicit-def: $sgpr13788; GFX9-NEXT: ; implicit-def: $sgpr12789; GFX9-NEXT: ; implicit-def: $sgpr11790; GFX9-NEXT: ; implicit-def: $sgpr10791; GFX9-NEXT: ; implicit-def: $sgpr6792; GFX9-NEXT: s_branch .LBB5_2793;794; GFX11-LABEL: bitcast_v3i32_to_v12i8_scalar:795; GFX11: ; %bb.0:796; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)797; GFX11-NEXT: s_cmp_lg_u32 s3, 0798; GFX11-NEXT: s_mov_b32 s14, 0799; GFX11-NEXT: s_cbranch_scc0 .LBB5_4800; GFX11-NEXT: ; %bb.1: ; %cmp.false801; GFX11-NEXT: s_lshr_b32 s3, s2, 16802; GFX11-NEXT: s_lshr_b32 s8, s2, 8803; GFX11-NEXT: s_lshr_b32 s9, s1, 24804; GFX11-NEXT: s_lshr_b32 s10, s1, 16805; GFX11-NEXT: s_lshr_b32 s11, s1, 8806; GFX11-NEXT: s_lshr_b32 s12, s0, 16807; GFX11-NEXT: s_lshr_b32 s13, s0, 8808; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24809; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24810; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s14811; GFX11-NEXT: s_cbranch_vccnz .LBB5_3812; GFX11-NEXT: .LBB5_2: ; %cmp.true813; GFX11-NEXT: s_add_i32 s2, s2, 3814; GFX11-NEXT: s_add_i32 s1, s1, 3815; GFX11-NEXT: s_add_i32 s0, s0, 3816; GFX11-NEXT: s_lshr_b32 s3, s2, 16817; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24818; GFX11-NEXT: s_lshr_b32 s8, s2, 8819; GFX11-NEXT: s_lshr_b32 s9, s1, 24820; GFX11-NEXT: s_lshr_b32 s10, s1, 16821; GFX11-NEXT: s_lshr_b32 s11, s1, 8822; GFX11-NEXT: s_lshr_b32 s12, s0, 16823; GFX11-NEXT: s_lshr_b32 s13, s0, 8824; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24825; GFX11-NEXT: .LBB5_3: ; %end826; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s13827; GFX11-NEXT: v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v3, s4828; GFX11-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s11829; GFX11-NEXT: v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, s9830; GFX11-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s8831; GFX11-NEXT: v_dual_mov_b32 v10, s3 :: v_dual_mov_b32 v11, s6832; GFX11-NEXT: s_setpc_b64 s[30:31]833; GFX11-NEXT: .LBB5_4:834; GFX11-NEXT: ; implicit-def: $sgpr13835; GFX11-NEXT: ; implicit-def: $sgpr12836; GFX11-NEXT: ; implicit-def: $sgpr4837; GFX11-NEXT: ; implicit-def: $sgpr11838; GFX11-NEXT: ; implicit-def: $sgpr10839; GFX11-NEXT: ; implicit-def: $sgpr9840; GFX11-NEXT: ; implicit-def: $sgpr8841; GFX11-NEXT: ; implicit-def: $sgpr3842; GFX11-NEXT: ; implicit-def: $sgpr6843; GFX11-NEXT: s_branch .LBB5_2844 %cmp = icmp eq i32 %b, 0845 br i1 %cmp, label %cmp.true, label %cmp.false846 847cmp.true:848 %a1 = add <3 x i32> %a, splat (i32 3)849 %a2 = bitcast <3 x i32> %a1 to <12 x i8>850 br label %end851 852cmp.false:853 %a3 = bitcast <3 x i32> %a to <12 x i8>854 br label %end855 856end:857 %phi = phi <12 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]858 ret <12 x i8> %phi859}860 861define <3 x i32> @bitcast_v12i8_to_v3i32(<12 x i8> %a, i32 %b) {862; SI-LABEL: bitcast_v12i8_to_v3i32:863; SI: ; %bb.0:864; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)865; SI-NEXT: v_mov_b32_e32 v14, v2866; SI-NEXT: v_mov_b32_e32 v13, v0867; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12868; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v1869; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v3870; SI-NEXT: v_lshlrev_b32_e32 v12, 8, v5871; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v7872; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v9873; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v11874; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2875; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc876; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]877; SI-NEXT: s_cbranch_execnz .LBB6_3878; SI-NEXT: ; %bb.1: ; %Flow879; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]880; SI-NEXT: s_cbranch_execnz .LBB6_4881; SI-NEXT: .LBB6_2: ; %end882; SI-NEXT: s_or_b64 exec, exec, s[4:5]883; SI-NEXT: s_setpc_b64 s[30:31]884; SI-NEXT: .LBB6_3: ; %cmp.false885; SI-NEXT: v_and_b32_e32 v0, 0xff, v13886; SI-NEXT: v_and_b32_e32 v1, 0xff, v14887; SI-NEXT: v_or_b32_e32 v0, v0, v16888; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1889; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0890; SI-NEXT: v_or_b32_e32 v1, v15, v1891; SI-NEXT: v_or_b32_e32 v0, v0, v1892; SI-NEXT: v_and_b32_e32 v1, 0xff, v4893; SI-NEXT: v_and_b32_e32 v2, 0xff, v6894; SI-NEXT: v_or_b32_e32 v1, v1, v12895; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2896; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1897; SI-NEXT: v_or_b32_e32 v2, v7, v2898; SI-NEXT: v_or_b32_e32 v1, v1, v2899; SI-NEXT: v_and_b32_e32 v2, 0xff, v8900; SI-NEXT: v_and_b32_e32 v4, 0xff, v10901; SI-NEXT: v_or_b32_e32 v2, v2, v5902; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4903; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2904; SI-NEXT: v_or_b32_e32 v3, v3, v4905; SI-NEXT: v_or_b32_e32 v2, v2, v3906; SI-NEXT: ; implicit-def: $vgpr13907; SI-NEXT: ; implicit-def: $vgpr14908; SI-NEXT: ; implicit-def: $vgpr4909; SI-NEXT: ; implicit-def: $vgpr6910; SI-NEXT: ; implicit-def: $vgpr8911; SI-NEXT: ; implicit-def: $vgpr10912; SI-NEXT: ; implicit-def: $vgpr16913; SI-NEXT: ; implicit-def: $vgpr15914; SI-NEXT: ; implicit-def: $vgpr12915; SI-NEXT: ; implicit-def: $vgpr7916; SI-NEXT: ; implicit-def: $vgpr5917; SI-NEXT: ; implicit-def: $vgpr3918; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]919; SI-NEXT: s_cbranch_execz .LBB6_2920; SI-NEXT: .LBB6_4: ; %cmp.true921; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v13922; SI-NEXT: v_and_b32_e32 v0, 0xff, v0923; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v14924; SI-NEXT: v_or_b32_e32 v0, v16, v0925; SI-NEXT: v_and_b32_e32 v1, 0xff, v1926; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0927; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1928; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0929; SI-NEXT: v_or_b32_e32 v1, v15, v1930; SI-NEXT: v_or_b32_e32 v0, v1, v0931; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v4932; SI-NEXT: v_and_b32_e32 v1, 0xff, v1933; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v6934; SI-NEXT: s_movk_i32 s6, 0x300935; SI-NEXT: v_or_b32_e32 v1, v12, v1936; SI-NEXT: v_and_b32_e32 v2, 0xff, v2937; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1938; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2939; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1940; SI-NEXT: v_or_b32_e32 v2, v7, v2941; SI-NEXT: v_or_b32_e32 v1, v2, v1942; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v8943; SI-NEXT: v_and_b32_e32 v2, 0xff, v2944; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v10945; SI-NEXT: v_or_b32_e32 v2, v5, v2946; SI-NEXT: v_and_b32_e32 v4, 0xff, v4947; SI-NEXT: v_add_i32_e32 v2, vcc, 0x300, v2948; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4949; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2950; SI-NEXT: v_or_b32_e32 v3, v3, v4951; SI-NEXT: s_mov_b32 s7, 0x3000000952; SI-NEXT: v_or_b32_e32 v2, v3, v2953; SI-NEXT: v_add_i32_e32 v0, vcc, s7, v0954; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v1955; SI-NEXT: v_add_i32_e32 v2, vcc, 0x3000000, v2956; SI-NEXT: s_or_b64 exec, exec, s[4:5]957; SI-NEXT: s_setpc_b64 s[30:31]958;959; VI-LABEL: bitcast_v12i8_to_v3i32:960; VI: ; %bb.0:961; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)962; VI-NEXT: v_mov_b32_e32 v14, v2963; VI-NEXT: v_mov_b32_e32 v13, v0964; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12965; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v1966; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v3967; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v5968; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7969; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v9970; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v11971; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2972; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc973; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]974; VI-NEXT: s_cbranch_execnz .LBB6_3975; VI-NEXT: ; %bb.1: ; %Flow976; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]977; VI-NEXT: s_cbranch_execnz .LBB6_4978; VI-NEXT: .LBB6_2: ; %end979; VI-NEXT: s_or_b64 exec, exec, s[4:5]980; VI-NEXT: s_setpc_b64 s[30:31]981; VI-NEXT: .LBB6_3: ; %cmp.false982; VI-NEXT: v_or_b32_sdwa v0, v13, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD983; VI-NEXT: v_or_b32_sdwa v1, v14, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD984; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD985; VI-NEXT: v_or_b32_sdwa v1, v4, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD986; VI-NEXT: v_or_b32_sdwa v2, v6, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD987; VI-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD988; VI-NEXT: v_or_b32_sdwa v2, v8, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD989; VI-NEXT: v_or_b32_sdwa v3, v10, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD990; VI-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD991; VI-NEXT: ; implicit-def: $vgpr13992; VI-NEXT: ; implicit-def: $vgpr14993; VI-NEXT: ; implicit-def: $vgpr4994; VI-NEXT: ; implicit-def: $vgpr6995; VI-NEXT: ; implicit-def: $vgpr8996; VI-NEXT: ; implicit-def: $vgpr10997; VI-NEXT: ; implicit-def: $vgpr16998; VI-NEXT: ; implicit-def: $vgpr15999; VI-NEXT: ; implicit-def: $vgpr121000; VI-NEXT: ; implicit-def: $vgpr71001; VI-NEXT: ; implicit-def: $vgpr51002; VI-NEXT: ; implicit-def: $vgpr31003; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1004; VI-NEXT: s_cbranch_execz .LBB6_21005; VI-NEXT: .LBB6_4: ; %cmp.true1006; VI-NEXT: v_add_u16_e32 v0, 3, v131007; VI-NEXT: v_add_u16_e32 v1, 3, v141008; VI-NEXT: v_or_b32_sdwa v0, v16, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01009; VI-NEXT: v_or_b32_sdwa v1, v15, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01010; VI-NEXT: v_mov_b32_e32 v2, 0x3001011; VI-NEXT: v_add_u16_e32 v0, 0x300, v01012; VI-NEXT: v_add_u16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1013; VI-NEXT: v_or_b32_e32 v0, v0, v11014; VI-NEXT: v_add_u16_e32 v1, 3, v41015; VI-NEXT: v_add_u16_e32 v4, 3, v61016; VI-NEXT: v_or_b32_sdwa v1, v12, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01017; VI-NEXT: v_or_b32_sdwa v4, v7, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01018; VI-NEXT: v_add_u16_e32 v1, 0x300, v11019; VI-NEXT: v_add_u16_sdwa v4, v4, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1020; VI-NEXT: v_or_b32_e32 v1, v1, v41021; VI-NEXT: v_add_u16_e32 v4, 3, v81022; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01023; VI-NEXT: v_add_u16_e32 v5, 3, v101024; VI-NEXT: v_or_b32_sdwa v3, v3, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01025; VI-NEXT: v_add_u16_e32 v4, 0x300, v41026; VI-NEXT: v_add_u16_sdwa v2, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1027; VI-NEXT: v_or_b32_e32 v2, v4, v21028; VI-NEXT: s_or_b64 exec, exec, s[4:5]1029; VI-NEXT: s_setpc_b64 s[30:31]1030;1031; GFX9-LABEL: bitcast_v12i8_to_v3i32:1032; GFX9: ; %bb.0:1033; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1034; GFX9-NEXT: v_mov_b32_e32 v14, v21035; GFX9-NEXT: v_mov_b32_e32 v13, v01036; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v121037; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v11038; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v31039; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v51040; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v71041; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v91042; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v111043; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr21044; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc1045; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1046; GFX9-NEXT: s_cbranch_execnz .LBB6_31047; GFX9-NEXT: ; %bb.1: ; %Flow1048; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1049; GFX9-NEXT: s_cbranch_execnz .LBB6_41050; GFX9-NEXT: .LBB6_2: ; %end1051; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]1052; GFX9-NEXT: s_setpc_b64 s[30:31]1053; GFX9-NEXT: .LBB6_3: ; %cmp.false1054; GFX9-NEXT: v_or_b32_sdwa v0, v13, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD1055; GFX9-NEXT: v_or_b32_sdwa v1, v14, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD1056; GFX9-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1057; GFX9-NEXT: v_or_b32_sdwa v1, v4, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD1058; GFX9-NEXT: v_or_b32_sdwa v2, v6, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD1059; GFX9-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1060; GFX9-NEXT: v_or_b32_sdwa v2, v8, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD1061; GFX9-NEXT: v_or_b32_sdwa v3, v10, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD1062; GFX9-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1063; GFX9-NEXT: ; implicit-def: $vgpr131064; GFX9-NEXT: ; implicit-def: $vgpr141065; GFX9-NEXT: ; implicit-def: $vgpr41066; GFX9-NEXT: ; implicit-def: $vgpr61067; GFX9-NEXT: ; implicit-def: $vgpr81068; GFX9-NEXT: ; implicit-def: $vgpr101069; GFX9-NEXT: ; implicit-def: $vgpr161070; GFX9-NEXT: ; implicit-def: $vgpr151071; GFX9-NEXT: ; implicit-def: $vgpr121072; GFX9-NEXT: ; implicit-def: $vgpr71073; GFX9-NEXT: ; implicit-def: $vgpr51074; GFX9-NEXT: ; implicit-def: $vgpr31075; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1076; GFX9-NEXT: s_cbranch_execz .LBB6_21077; GFX9-NEXT: .LBB6_4: ; %cmp.true1078; GFX9-NEXT: v_add_u16_e32 v0, 3, v131079; GFX9-NEXT: v_add_u16_e32 v1, 3, v141080; GFX9-NEXT: v_or_b32_sdwa v0, v16, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01081; GFX9-NEXT: s_movk_i32 s6, 0x3001082; GFX9-NEXT: v_or_b32_sdwa v1, v15, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01083; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v01084; GFX9-NEXT: v_add_u16_sdwa v1, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1085; GFX9-NEXT: v_or_b32_e32 v0, v0, v11086; GFX9-NEXT: v_add_u16_e32 v1, 3, v41087; GFX9-NEXT: v_add_u16_e32 v2, 3, v61088; GFX9-NEXT: v_or_b32_sdwa v1, v12, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01089; GFX9-NEXT: v_or_b32_sdwa v2, v7, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01090; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v11091; GFX9-NEXT: v_add_u16_sdwa v2, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1092; GFX9-NEXT: v_or_b32_e32 v1, v1, v21093; GFX9-NEXT: v_add_u16_e32 v2, 3, v81094; GFX9-NEXT: v_add_u16_e32 v4, 3, v101095; GFX9-NEXT: v_or_b32_sdwa v2, v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01096; GFX9-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01097; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v21098; GFX9-NEXT: v_add_u16_sdwa v3, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1099; GFX9-NEXT: v_or_b32_e32 v2, v2, v31100; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]1101; GFX9-NEXT: s_setpc_b64 s[30:31]1102;1103; GFX11-TRUE16-LABEL: bitcast_v12i8_to_v3i32:1104; GFX11-TRUE16: ; %bb.0:1105; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1106; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v7.l1107; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v4.l1108; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v2.l1109; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v0.l1110; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v1.l1111; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v3.l1112; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l1113; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v8.h1114; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v9.l1115; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v11.l1116; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo1117; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr21118; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v121119; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s01120; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB6_31121; GFX11-TRUE16-NEXT: ; %bb.1: ; %Flow1122; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s01123; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB6_41124; GFX11-TRUE16-NEXT: .LBB6_2: ; %end1125; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s01126; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1127; GFX11-TRUE16-NEXT: .LBB6_3: ; %cmp.false1128; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v7.h1129; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v7.l1130; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.h1131; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l1132; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l1133; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l1134; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v5.h1135; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v4.h1136; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v5.l1137; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.l1138; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v3.h1139; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v4.l1140; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi161141; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo161142; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi161143; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo161144; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo161145; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo161146; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi161147; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi161148; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo161149; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo161150; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi161151; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo161152; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s01153; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB6_21154; GFX11-TRUE16-NEXT: .LBB6_4: ; %cmp.true1155; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v7.h, 31156; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v7.l, 31157; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v6.h, 31158; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 31159; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 31160; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 31161; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l1162; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h1163; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l1164; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h1165; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l1166; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h1167; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v5.h, v0.l1168; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v4.h, v0.h1169; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v5.l, v1.l1170; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v3.l, v1.h1171; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v3.h, v2.l1172; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v4.l, v2.h1173; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l1174; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h1175; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l1176; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h1177; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l1178; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h1179; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s01180; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1181;1182; GFX11-FAKE16-LABEL: bitcast_v12i8_to_v3i32:1183; GFX11-FAKE16: ; %bb.0:1184; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1185; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, v2 :: v_dual_mov_b32 v13, v01186; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v121187; GFX11-FAKE16-NEXT: v_lshlrev_b16 v16, 8, v11188; GFX11-FAKE16-NEXT: v_lshlrev_b16 v12, 8, v31189; GFX11-FAKE16-NEXT: v_lshlrev_b16 v15, 8, v51190; GFX11-FAKE16-NEXT: v_lshlrev_b16 v7, 8, v71191; GFX11-FAKE16-NEXT: v_lshlrev_b16 v3, 8, v91192; GFX11-FAKE16-NEXT: v_lshlrev_b16 v5, 8, v111193; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr21194; GFX11-FAKE16-NEXT: s_and_saveexec_b32 s0, vcc_lo1195; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1196; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s01197; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB6_31198; GFX11-FAKE16-NEXT: ; %bb.1: ; %Flow1199; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s01200; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB6_41201; GFX11-FAKE16-NEXT: .LBB6_2: ; %end1202; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s01203; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1204; GFX11-FAKE16-NEXT: .LBB6_3: ; %cmp.false1205; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xff, v131206; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xff, v141207; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xff, v41208; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xff, v61209; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xff, v81210; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xff, v101211; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v161212; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v121213; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v151214; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v71215; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v6, v31216; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v8, v51217; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v01218; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v11219; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v21220; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v41221; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v31222; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v51223; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v11224; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr131225; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr141226; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61227; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr81228; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr101229; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr161230; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr121231; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr151232; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71233; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)1234; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v41235; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41236; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v3, v51237; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr31238; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr51239; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s01240; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB6_21241; GFX11-FAKE16-NEXT: .LBB6_4: ; %cmp.true1242; GFX11-FAKE16-NEXT: v_add_nc_u16 v0, v13, 31243; GFX11-FAKE16-NEXT: v_add_nc_u16 v1, v14, 31244; GFX11-FAKE16-NEXT: v_add_nc_u16 v2, v4, 31245; GFX11-FAKE16-NEXT: v_add_nc_u16 v4, v6, 31246; GFX11-FAKE16-NEXT: v_add_nc_u16 v6, v8, 31247; GFX11-FAKE16-NEXT: v_add_nc_u16 v8, v10, 31248; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xff, v01249; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xff, v11250; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xff, v21251; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xff, v41252; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xff, v61253; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xff, v81254; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v16, v01255; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v12, v11256; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v15, v21257; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v7, v41258; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v3, v61259; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v5, v81260; GFX11-FAKE16-NEXT: v_add_nc_u16 v0, 0x300, v01261; GFX11-FAKE16-NEXT: v_add_nc_u16 v1, 0x300, v11262; GFX11-FAKE16-NEXT: v_add_nc_u16 v2, 0x300, v21263; GFX11-FAKE16-NEXT: v_add_nc_u16 v4, 0x300, v41264; GFX11-FAKE16-NEXT: v_add_nc_u16 v3, 0x300, v31265; GFX11-FAKE16-NEXT: v_add_nc_u16 v5, 0x300, v51266; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v01267; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v11268; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v21269; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v41270; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v31271; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v51272; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v11273; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)1274; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v41275; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v3, v51276; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s01277; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1278 %cmp = icmp eq i32 %b, 01279 br i1 %cmp, label %cmp.true, label %cmp.false1280 1281cmp.true:1282 %a1 = add <12 x i8> %a, splat (i8 3)1283 %a2 = bitcast <12 x i8> %a1 to <3 x i32>1284 br label %end1285 1286cmp.false:1287 %a3 = bitcast <12 x i8> %a to <3 x i32>1288 br label %end1289 1290end:1291 %phi = phi <3 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]1292 ret <3 x i32> %phi1293}1294 1295define inreg <3 x i32> @bitcast_v12i8_to_v3i32_scalar(<12 x i8> inreg %a, i32 inreg %b) {1296; SI-LABEL: bitcast_v12i8_to_v3i32_scalar:1297; SI: ; %bb.0:1298; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1299; SI-NEXT: s_cmp_lg_u32 s28, 01300; SI-NEXT: s_cbranch_scc0 .LBB7_41301; SI-NEXT: ; %bb.1: ; %cmp.false1302; SI-NEXT: s_and_b32 s4, s16, 0xff1303; SI-NEXT: s_lshl_b32 s5, s17, 81304; SI-NEXT: s_or_b32 s4, s4, s51305; SI-NEXT: s_and_b32 s5, s18, 0xff1306; SI-NEXT: s_lshl_b32 s5, s5, 161307; SI-NEXT: s_lshl_b32 s6, s19, 241308; SI-NEXT: s_and_b32 s4, s4, 0xffff1309; SI-NEXT: s_or_b32 s5, s6, s51310; SI-NEXT: s_or_b32 s4, s4, s51311; SI-NEXT: s_and_b32 s5, s20, 0xff1312; SI-NEXT: s_lshl_b32 s6, s21, 81313; SI-NEXT: s_or_b32 s5, s5, s61314; SI-NEXT: s_and_b32 s6, s22, 0xff1315; SI-NEXT: s_lshl_b32 s6, s6, 161316; SI-NEXT: s_lshl_b32 s7, s23, 241317; SI-NEXT: s_and_b32 s5, s5, 0xffff1318; SI-NEXT: s_or_b32 s6, s7, s61319; SI-NEXT: s_or_b32 s5, s5, s61320; SI-NEXT: s_and_b32 s6, s24, 0xff1321; SI-NEXT: s_lshl_b32 s7, s25, 81322; SI-NEXT: s_or_b32 s6, s6, s71323; SI-NEXT: s_and_b32 s7, s26, 0xff1324; SI-NEXT: s_lshl_b32 s7, s7, 161325; SI-NEXT: s_lshl_b32 s8, s27, 241326; SI-NEXT: s_and_b32 s6, s6, 0xffff1327; SI-NEXT: s_or_b32 s7, s8, s71328; SI-NEXT: s_or_b32 s6, s6, s71329; SI-NEXT: s_cbranch_execnz .LBB7_31330; SI-NEXT: .LBB7_2: ; %cmp.true1331; SI-NEXT: s_add_i32 s16, s16, 31332; SI-NEXT: s_and_b32 s4, s16, 0xff1333; SI-NEXT: s_lshl_b32 s5, s17, 81334; SI-NEXT: s_add_i32 s18, s18, 31335; SI-NEXT: s_or_b32 s4, s5, s41336; SI-NEXT: s_and_b32 s6, s18, 0xff1337; SI-NEXT: s_addk_i32 s4, 0x3001338; SI-NEXT: s_lshl_b32 s5, s19, 241339; SI-NEXT: s_lshl_b32 s6, s6, 161340; SI-NEXT: s_and_b32 s4, s4, 0xffff1341; SI-NEXT: s_or_b32 s5, s5, s61342; SI-NEXT: s_add_i32 s20, s20, 31343; SI-NEXT: s_or_b32 s4, s5, s41344; SI-NEXT: s_and_b32 s5, s20, 0xff1345; SI-NEXT: s_lshl_b32 s6, s21, 81346; SI-NEXT: s_add_i32 s22, s22, 31347; SI-NEXT: s_or_b32 s5, s6, s51348; SI-NEXT: s_and_b32 s7, s22, 0xff1349; SI-NEXT: s_addk_i32 s5, 0x3001350; SI-NEXT: s_lshl_b32 s6, s23, 241351; SI-NEXT: s_lshl_b32 s7, s7, 161352; SI-NEXT: s_and_b32 s5, s5, 0xffff1353; SI-NEXT: s_or_b32 s6, s6, s71354; SI-NEXT: s_add_i32 s24, s24, 31355; SI-NEXT: s_or_b32 s5, s6, s51356; SI-NEXT: s_and_b32 s6, s24, 0xff1357; SI-NEXT: s_lshl_b32 s7, s25, 81358; SI-NEXT: s_add_i32 s26, s26, 31359; SI-NEXT: s_or_b32 s6, s7, s61360; SI-NEXT: s_and_b32 s8, s26, 0xff1361; SI-NEXT: s_addk_i32 s6, 0x3001362; SI-NEXT: s_lshl_b32 s7, s27, 241363; SI-NEXT: s_lshl_b32 s8, s8, 161364; SI-NEXT: s_and_b32 s6, s6, 0xffff1365; SI-NEXT: s_or_b32 s7, s7, s81366; SI-NEXT: s_or_b32 s6, s7, s61367; SI-NEXT: s_add_i32 s4, s4, 0x30000001368; SI-NEXT: s_add_i32 s5, s5, 0x30000001369; SI-NEXT: s_add_i32 s6, s6, 0x30000001370; SI-NEXT: .LBB7_3: ; %end1371; SI-NEXT: v_mov_b32_e32 v0, s41372; SI-NEXT: v_mov_b32_e32 v1, s51373; SI-NEXT: v_mov_b32_e32 v2, s61374; SI-NEXT: s_setpc_b64 s[30:31]1375; SI-NEXT: .LBB7_4:1376; SI-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr61377; SI-NEXT: s_branch .LBB7_21378;1379; VI-LABEL: bitcast_v12i8_to_v3i32_scalar:1380; VI: ; %bb.0:1381; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1382; VI-NEXT: s_cmp_lg_u32 s28, 01383; VI-NEXT: s_cbranch_scc0 .LBB7_41384; VI-NEXT: ; %bb.1: ; %cmp.false1385; VI-NEXT: s_and_b32 s4, s16, 0xff1386; VI-NEXT: s_lshl_b32 s5, s17, 81387; VI-NEXT: s_or_b32 s4, s4, s51388; VI-NEXT: s_and_b32 s5, s18, 0xff1389; VI-NEXT: s_lshl_b32 s6, s19, 81390; VI-NEXT: s_or_b32 s5, s5, s61391; VI-NEXT: s_and_b32 s4, s4, 0xffff1392; VI-NEXT: s_lshl_b32 s5, s5, 161393; VI-NEXT: s_or_b32 s4, s4, s51394; VI-NEXT: s_and_b32 s5, s20, 0xff1395; VI-NEXT: s_lshl_b32 s6, s21, 81396; VI-NEXT: s_or_b32 s5, s5, s61397; VI-NEXT: s_and_b32 s6, s22, 0xff1398; VI-NEXT: s_lshl_b32 s7, s23, 81399; VI-NEXT: s_or_b32 s6, s6, s71400; VI-NEXT: s_and_b32 s5, s5, 0xffff1401; VI-NEXT: s_lshl_b32 s6, s6, 161402; VI-NEXT: s_or_b32 s5, s5, s61403; VI-NEXT: s_and_b32 s6, s24, 0xff1404; VI-NEXT: s_lshl_b32 s7, s25, 81405; VI-NEXT: s_or_b32 s6, s6, s71406; VI-NEXT: s_and_b32 s7, s26, 0xff1407; VI-NEXT: s_lshl_b32 s8, s27, 81408; VI-NEXT: s_or_b32 s7, s7, s81409; VI-NEXT: s_and_b32 s6, s6, 0xffff1410; VI-NEXT: s_lshl_b32 s7, s7, 161411; VI-NEXT: s_or_b32 s6, s6, s71412; VI-NEXT: s_cbranch_execnz .LBB7_31413; VI-NEXT: .LBB7_2: ; %cmp.true1414; VI-NEXT: s_add_i32 s16, s16, 31415; VI-NEXT: s_and_b32 s4, s16, 0xff1416; VI-NEXT: s_lshl_b32 s5, s17, 81417; VI-NEXT: s_add_i32 s18, s18, 31418; VI-NEXT: s_or_b32 s4, s5, s41419; VI-NEXT: s_and_b32 s5, s18, 0xff1420; VI-NEXT: s_lshl_b32 s6, s19, 81421; VI-NEXT: s_addk_i32 s4, 0x3001422; VI-NEXT: s_or_b32 s5, s6, s51423; VI-NEXT: s_and_b32 s4, s4, 0xffff1424; VI-NEXT: s_lshl_b32 s5, s5, 161425; VI-NEXT: s_add_i32 s20, s20, 31426; VI-NEXT: s_or_b32 s4, s5, s41427; VI-NEXT: s_and_b32 s5, s20, 0xff1428; VI-NEXT: s_lshl_b32 s6, s21, 81429; VI-NEXT: s_add_i32 s22, s22, 31430; VI-NEXT: s_or_b32 s5, s6, s51431; VI-NEXT: s_and_b32 s6, s22, 0xff1432; VI-NEXT: s_lshl_b32 s7, s23, 81433; VI-NEXT: s_addk_i32 s5, 0x3001434; VI-NEXT: s_or_b32 s6, s7, s61435; VI-NEXT: s_and_b32 s5, s5, 0xffff1436; VI-NEXT: s_lshl_b32 s6, s6, 161437; VI-NEXT: s_add_i32 s24, s24, 31438; VI-NEXT: s_or_b32 s5, s6, s51439; VI-NEXT: s_and_b32 s6, s24, 0xff1440; VI-NEXT: s_lshl_b32 s7, s25, 81441; VI-NEXT: s_add_i32 s26, s26, 31442; VI-NEXT: s_or_b32 s6, s7, s61443; VI-NEXT: s_and_b32 s7, s26, 0xff1444; VI-NEXT: s_lshl_b32 s8, s27, 81445; VI-NEXT: s_addk_i32 s6, 0x3001446; VI-NEXT: s_or_b32 s7, s8, s71447; VI-NEXT: s_and_b32 s6, s6, 0xffff1448; VI-NEXT: s_lshl_b32 s7, s7, 161449; VI-NEXT: s_or_b32 s6, s7, s61450; VI-NEXT: s_add_i32 s4, s4, 0x30000001451; VI-NEXT: s_add_i32 s5, s5, 0x30000001452; VI-NEXT: s_add_i32 s6, s6, 0x30000001453; VI-NEXT: .LBB7_3: ; %end1454; VI-NEXT: v_mov_b32_e32 v0, s41455; VI-NEXT: v_mov_b32_e32 v1, s51456; VI-NEXT: v_mov_b32_e32 v2, s61457; VI-NEXT: s_setpc_b64 s[30:31]1458; VI-NEXT: .LBB7_4:1459; VI-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr61460; VI-NEXT: s_branch .LBB7_21461;1462; GFX9-LABEL: bitcast_v12i8_to_v3i32_scalar:1463; GFX9: ; %bb.0:1464; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1465; GFX9-NEXT: s_cmp_lg_u32 s28, 01466; GFX9-NEXT: s_cbranch_scc0 .LBB7_41467; GFX9-NEXT: ; %bb.1: ; %cmp.false1468; GFX9-NEXT: s_and_b32 s4, s16, 0xff1469; GFX9-NEXT: s_lshl_b32 s5, s17, 81470; GFX9-NEXT: s_or_b32 s4, s4, s51471; GFX9-NEXT: s_and_b32 s5, s18, 0xff1472; GFX9-NEXT: s_lshl_b32 s6, s19, 81473; GFX9-NEXT: s_or_b32 s5, s5, s61474; GFX9-NEXT: s_and_b32 s4, s4, 0xffff1475; GFX9-NEXT: s_lshl_b32 s5, s5, 161476; GFX9-NEXT: s_or_b32 s4, s4, s51477; GFX9-NEXT: s_and_b32 s5, s20, 0xff1478; GFX9-NEXT: s_lshl_b32 s6, s21, 81479; GFX9-NEXT: s_or_b32 s5, s5, s61480; GFX9-NEXT: s_and_b32 s6, s22, 0xff1481; GFX9-NEXT: s_lshl_b32 s7, s23, 81482; GFX9-NEXT: s_or_b32 s6, s6, s71483; GFX9-NEXT: s_and_b32 s5, s5, 0xffff1484; GFX9-NEXT: s_lshl_b32 s6, s6, 161485; GFX9-NEXT: s_or_b32 s5, s5, s61486; GFX9-NEXT: s_and_b32 s6, s24, 0xff1487; GFX9-NEXT: s_lshl_b32 s7, s25, 81488; GFX9-NEXT: s_or_b32 s6, s6, s71489; GFX9-NEXT: s_and_b32 s7, s26, 0xff1490; GFX9-NEXT: s_lshl_b32 s8, s27, 81491; GFX9-NEXT: s_or_b32 s7, s7, s81492; GFX9-NEXT: s_and_b32 s6, s6, 0xffff1493; GFX9-NEXT: s_lshl_b32 s7, s7, 161494; GFX9-NEXT: s_or_b32 s6, s6, s71495; GFX9-NEXT: s_cbranch_execnz .LBB7_31496; GFX9-NEXT: .LBB7_2: ; %cmp.true1497; GFX9-NEXT: s_add_i32 s16, s16, 31498; GFX9-NEXT: s_and_b32 s4, s16, 0xff1499; GFX9-NEXT: s_lshl_b32 s5, s17, 81500; GFX9-NEXT: s_add_i32 s18, s18, 31501; GFX9-NEXT: s_or_b32 s4, s5, s41502; GFX9-NEXT: s_and_b32 s5, s18, 0xff1503; GFX9-NEXT: s_lshl_b32 s6, s19, 81504; GFX9-NEXT: s_or_b32 s5, s6, s51505; GFX9-NEXT: s_addk_i32 s4, 0x3001506; GFX9-NEXT: s_addk_i32 s5, 0x3001507; GFX9-NEXT: s_and_b32 s4, s4, 0xffff1508; GFX9-NEXT: s_lshl_b32 s5, s5, 161509; GFX9-NEXT: s_add_i32 s20, s20, 31510; GFX9-NEXT: s_or_b32 s4, s4, s51511; GFX9-NEXT: s_and_b32 s5, s20, 0xff1512; GFX9-NEXT: s_lshl_b32 s6, s21, 81513; GFX9-NEXT: s_add_i32 s22, s22, 31514; GFX9-NEXT: s_or_b32 s5, s6, s51515; GFX9-NEXT: s_and_b32 s6, s22, 0xff1516; GFX9-NEXT: s_lshl_b32 s7, s23, 81517; GFX9-NEXT: s_or_b32 s6, s7, s61518; GFX9-NEXT: s_addk_i32 s5, 0x3001519; GFX9-NEXT: s_addk_i32 s6, 0x3001520; GFX9-NEXT: s_and_b32 s5, s5, 0xffff1521; GFX9-NEXT: s_lshl_b32 s6, s6, 161522; GFX9-NEXT: s_add_i32 s24, s24, 31523; GFX9-NEXT: s_or_b32 s5, s5, s61524; GFX9-NEXT: s_and_b32 s6, s24, 0xff1525; GFX9-NEXT: s_lshl_b32 s7, s25, 81526; GFX9-NEXT: s_add_i32 s26, s26, 31527; GFX9-NEXT: s_or_b32 s6, s7, s61528; GFX9-NEXT: s_and_b32 s7, s26, 0xff1529; GFX9-NEXT: s_lshl_b32 s8, s27, 81530; GFX9-NEXT: s_or_b32 s7, s8, s71531; GFX9-NEXT: s_addk_i32 s6, 0x3001532; GFX9-NEXT: s_addk_i32 s7, 0x3001533; GFX9-NEXT: s_and_b32 s6, s6, 0xffff1534; GFX9-NEXT: s_lshl_b32 s7, s7, 161535; GFX9-NEXT: s_or_b32 s6, s6, s71536; GFX9-NEXT: .LBB7_3: ; %end1537; GFX9-NEXT: v_mov_b32_e32 v0, s41538; GFX9-NEXT: v_mov_b32_e32 v1, s51539; GFX9-NEXT: v_mov_b32_e32 v2, s61540; GFX9-NEXT: s_setpc_b64 s[30:31]1541; GFX9-NEXT: .LBB7_4:1542; GFX9-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr61543; GFX9-NEXT: s_branch .LBB7_21544;1545; GFX11-LABEL: bitcast_v12i8_to_v3i32_scalar:1546; GFX11: ; %bb.0:1547; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1548; GFX11-NEXT: s_cmp_lg_u32 s24, 01549; GFX11-NEXT: s_mov_b32 s7, 01550; GFX11-NEXT: s_cbranch_scc0 .LBB7_41551; GFX11-NEXT: ; %bb.1: ; %cmp.false1552; GFX11-NEXT: s_and_b32 s4, s0, 0xff1553; GFX11-NEXT: s_lshl_b32 s5, s1, 81554; GFX11-NEXT: s_and_b32 s6, s2, 0xff1555; GFX11-NEXT: s_lshl_b32 s8, s3, 81556; GFX11-NEXT: s_or_b32 s4, s4, s51557; GFX11-NEXT: s_or_b32 s5, s6, s81558; GFX11-NEXT: s_and_b32 s4, s4, 0xffff1559; GFX11-NEXT: s_lshl_b32 s5, s5, 161560; GFX11-NEXT: s_lshl_b32 s6, s17, 81561; GFX11-NEXT: s_or_b32 s4, s4, s51562; GFX11-NEXT: s_and_b32 s5, s16, 0xff1563; GFX11-NEXT: s_and_b32 s8, s18, 0xff1564; GFX11-NEXT: s_lshl_b32 s9, s19, 81565; GFX11-NEXT: s_or_b32 s5, s5, s61566; GFX11-NEXT: s_or_b32 s6, s8, s91567; GFX11-NEXT: s_and_b32 s8, s20, 0xff1568; GFX11-NEXT: s_lshl_b32 s9, s21, 81569; GFX11-NEXT: s_and_b32 s10, s22, 0xff1570; GFX11-NEXT: s_lshl_b32 s11, s23, 81571; GFX11-NEXT: s_or_b32 s8, s8, s91572; GFX11-NEXT: s_or_b32 s9, s10, s111573; GFX11-NEXT: s_and_b32 s5, s5, 0xffff1574; GFX11-NEXT: s_lshl_b32 s6, s6, 161575; GFX11-NEXT: s_and_b32 s8, s8, 0xffff1576; GFX11-NEXT: s_lshl_b32 s9, s9, 161577; GFX11-NEXT: s_or_b32 s5, s5, s61578; GFX11-NEXT: s_or_b32 s6, s8, s91579; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s71580; GFX11-NEXT: s_cbranch_vccnz .LBB7_31581; GFX11-NEXT: .LBB7_2: ; %cmp.true1582; GFX11-NEXT: s_add_i32 s0, s0, 31583; GFX11-NEXT: s_add_i32 s2, s2, 31584; GFX11-NEXT: s_and_b32 s0, s0, 0xff1585; GFX11-NEXT: s_lshl_b32 s1, s1, 81586; GFX11-NEXT: s_and_b32 s2, s2, 0xff1587; GFX11-NEXT: s_lshl_b32 s3, s3, 81588; GFX11-NEXT: s_or_b32 s0, s1, s01589; GFX11-NEXT: s_or_b32 s1, s3, s21590; GFX11-NEXT: s_addk_i32 s0, 0x3001591; GFX11-NEXT: s_addk_i32 s1, 0x3001592; GFX11-NEXT: s_and_b32 s0, s0, 0xffff1593; GFX11-NEXT: s_lshl_b32 s1, s1, 161594; GFX11-NEXT: s_add_i32 s16, s16, 31595; GFX11-NEXT: s_or_b32 s4, s0, s11596; GFX11-NEXT: s_and_b32 s0, s16, 0xff1597; GFX11-NEXT: s_lshl_b32 s1, s17, 81598; GFX11-NEXT: s_add_i32 s18, s18, 31599; GFX11-NEXT: s_or_b32 s0, s1, s01600; GFX11-NEXT: s_and_b32 s1, s18, 0xff1601; GFX11-NEXT: s_lshl_b32 s2, s19, 81602; GFX11-NEXT: s_add_i32 s20, s20, 31603; GFX11-NEXT: s_add_i32 s22, s22, 31604; GFX11-NEXT: s_or_b32 s1, s2, s11605; GFX11-NEXT: s_and_b32 s2, s20, 0xff1606; GFX11-NEXT: s_lshl_b32 s3, s21, 81607; GFX11-NEXT: s_and_b32 s5, s22, 0xff1608; GFX11-NEXT: s_lshl_b32 s6, s23, 81609; GFX11-NEXT: s_or_b32 s2, s3, s21610; GFX11-NEXT: s_or_b32 s3, s6, s51611; GFX11-NEXT: s_addk_i32 s0, 0x3001612; GFX11-NEXT: s_addk_i32 s1, 0x3001613; GFX11-NEXT: s_addk_i32 s2, 0x3001614; GFX11-NEXT: s_addk_i32 s3, 0x3001615; GFX11-NEXT: s_and_b32 s0, s0, 0xffff1616; GFX11-NEXT: s_lshl_b32 s1, s1, 161617; GFX11-NEXT: s_and_b32 s2, s2, 0xffff1618; GFX11-NEXT: s_lshl_b32 s3, s3, 161619; GFX11-NEXT: s_or_b32 s5, s0, s11620; GFX11-NEXT: s_or_b32 s6, s2, s31621; GFX11-NEXT: .LBB7_3: ; %end1622; GFX11-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s51623; GFX11-NEXT: v_mov_b32_e32 v2, s61624; GFX11-NEXT: s_setpc_b64 s[30:31]1625; GFX11-NEXT: .LBB7_4:1626; GFX11-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr61627; GFX11-NEXT: s_branch .LBB7_21628 %cmp = icmp eq i32 %b, 01629 br i1 %cmp, label %cmp.true, label %cmp.false1630 1631cmp.true:1632 %a1 = add <12 x i8> %a, splat (i8 3)1633 %a2 = bitcast <12 x i8> %a1 to <3 x i32>1634 br label %end1635 1636cmp.false:1637 %a3 = bitcast <12 x i8> %a to <3 x i32>1638 br label %end1639 1640end:1641 %phi = phi <3 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]1642 ret <3 x i32> %phi1643}1644 1645define <6 x bfloat> @bitcast_v3i32_to_v6bf16(<3 x i32> %a, i32 %b) {1646; SI-LABEL: bitcast_v3i32_to_v6bf16:1647; SI: ; %bb.0:1648; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1649; SI-NEXT: v_mov_b32_e32 v8, v21650; SI-NEXT: v_mov_b32_e32 v7, v11651; SI-NEXT: v_mov_b32_e32 v6, v01652; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31653; SI-NEXT: ; implicit-def: $vgpr01654; SI-NEXT: ; implicit-def: $vgpr11655; SI-NEXT: ; implicit-def: $vgpr21656; SI-NEXT: ; implicit-def: $vgpr31657; SI-NEXT: ; implicit-def: $vgpr41658; SI-NEXT: ; implicit-def: $vgpr51659; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc1660; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1661; SI-NEXT: s_cbranch_execnz .LBB8_31662; SI-NEXT: ; %bb.1: ; %Flow1663; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1664; SI-NEXT: s_cbranch_execnz .LBB8_41665; SI-NEXT: .LBB8_2: ; %end1666; SI-NEXT: s_or_b64 exec, exec, s[4:5]1667; SI-NEXT: s_setpc_b64 s[30:31]1668; SI-NEXT: .LBB8_3: ; %cmp.false1669; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v81670; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v81671; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v71672; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v71673; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v61674; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v61675; SI-NEXT: ; implicit-def: $vgpr61676; SI-NEXT: ; implicit-def: $vgpr71677; SI-NEXT: ; implicit-def: $vgpr81678; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1679; SI-NEXT: s_cbranch_execz .LBB8_21680; SI-NEXT: .LBB8_4: ; %cmp.true1681; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v61682; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v71683; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v81684; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v21685; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v21686; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v11687; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v11688; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v01689; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v01690; SI-NEXT: s_or_b64 exec, exec, s[4:5]1691; SI-NEXT: s_setpc_b64 s[30:31]1692;1693; VI-LABEL: bitcast_v3i32_to_v6bf16:1694; VI: ; %bb.0:1695; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1696; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31697; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc1698; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1699; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1700; VI-NEXT: ; %bb.1: ; %cmp.true1701; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v21702; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v11703; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v01704; VI-NEXT: ; %bb.2: ; %end1705; VI-NEXT: s_or_b64 exec, exec, s[4:5]1706; VI-NEXT: s_setpc_b64 s[30:31]1707;1708; GFX9-LABEL: bitcast_v3i32_to_v6bf16:1709; GFX9: ; %bb.0:1710; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1711; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31712; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc1713; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1714; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1715; GFX9-NEXT: ; %bb.1: ; %cmp.true1716; GFX9-NEXT: v_add_u32_e32 v2, 3, v21717; GFX9-NEXT: v_add_u32_e32 v1, 3, v11718; GFX9-NEXT: v_add_u32_e32 v0, 3, v01719; GFX9-NEXT: ; %bb.2: ; %end1720; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]1721; GFX9-NEXT: s_setpc_b64 s[30:31]1722;1723; GFX11-LABEL: bitcast_v3i32_to_v6bf16:1724; GFX11: ; %bb.0:1725; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1726; GFX11-NEXT: s_mov_b32 s0, exec_lo1727; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v31728; GFX11-NEXT: s_xor_b32 s0, exec_lo, s01729; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1730; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s01731; GFX11-NEXT: ; %bb.1: ; %cmp.true1732; GFX11-NEXT: v_add_nc_u32_e32 v2, 3, v21733; GFX11-NEXT: v_add_nc_u32_e32 v1, 3, v11734; GFX11-NEXT: v_add_nc_u32_e32 v0, 3, v01735; GFX11-NEXT: ; %bb.2: ; %end1736; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s01737; GFX11-NEXT: s_setpc_b64 s[30:31]1738 %cmp = icmp eq i32 %b, 01739 br i1 %cmp, label %cmp.true, label %cmp.false1740 1741cmp.true:1742 %a1 = add <3 x i32> %a, splat (i32 3)1743 %a2 = bitcast <3 x i32> %a1 to <6 x bfloat>1744 br label %end1745 1746cmp.false:1747 %a3 = bitcast <3 x i32> %a to <6 x bfloat>1748 br label %end1749 1750end:1751 %phi = phi <6 x bfloat> [ %a2, %cmp.true ], [ %a3, %cmp.false ]1752 ret <6 x bfloat> %phi1753}1754 1755define inreg <6 x bfloat> @bitcast_v3i32_to_v6bf16_scalar(<3 x i32> inreg %a, i32 inreg %b) {1756; SI-LABEL: bitcast_v3i32_to_v6bf16_scalar:1757; SI: ; %bb.0:1758; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1759; SI-NEXT: s_cmp_lg_u32 s19, 01760; SI-NEXT: s_cbranch_scc0 .LBB9_41761; SI-NEXT: ; %bb.1: ; %cmp.false1762; SI-NEXT: s_and_b32 s6, s18, 0xffff00001763; SI-NEXT: s_lshl_b32 s7, s18, 161764; SI-NEXT: s_and_b32 s8, s17, 0xffff00001765; SI-NEXT: s_lshl_b32 s9, s17, 161766; SI-NEXT: s_and_b32 s10, s16, 0xffff00001767; SI-NEXT: s_lshl_b32 s11, s16, 161768; SI-NEXT: s_cbranch_execnz .LBB9_31769; SI-NEXT: .LBB9_2: ; %cmp.true1770; SI-NEXT: s_add_i32 s16, s16, 31771; SI-NEXT: s_add_i32 s17, s17, 31772; SI-NEXT: s_add_i32 s18, s18, 31773; SI-NEXT: s_and_b32 s6, s18, 0xffff00001774; SI-NEXT: s_lshl_b32 s7, s18, 161775; SI-NEXT: s_and_b32 s8, s17, 0xffff00001776; SI-NEXT: s_lshl_b32 s9, s17, 161777; SI-NEXT: s_and_b32 s10, s16, 0xffff00001778; SI-NEXT: s_lshl_b32 s11, s16, 161779; SI-NEXT: .LBB9_3: ; %end1780; SI-NEXT: v_mov_b32_e32 v0, s111781; SI-NEXT: v_mov_b32_e32 v1, s101782; SI-NEXT: v_mov_b32_e32 v2, s91783; SI-NEXT: v_mov_b32_e32 v3, s81784; SI-NEXT: v_mov_b32_e32 v4, s71785; SI-NEXT: v_mov_b32_e32 v5, s61786; SI-NEXT: s_setpc_b64 s[30:31]1787; SI-NEXT: .LBB9_4:1788; SI-NEXT: ; implicit-def: $sgpr111789; SI-NEXT: ; implicit-def: $sgpr101790; SI-NEXT: ; implicit-def: $sgpr91791; SI-NEXT: ; implicit-def: $sgpr81792; SI-NEXT: ; implicit-def: $sgpr71793; SI-NEXT: ; implicit-def: $sgpr61794; SI-NEXT: s_branch .LBB9_21795;1796; VI-LABEL: bitcast_v3i32_to_v6bf16_scalar:1797; VI: ; %bb.0:1798; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1799; VI-NEXT: s_cmp_lg_u32 s19, 01800; VI-NEXT: s_cbranch_scc0 .LBB9_41801; VI-NEXT: ; %bb.1: ; %cmp.false1802; VI-NEXT: s_cbranch_execnz .LBB9_31803; VI-NEXT: .LBB9_2: ; %cmp.true1804; VI-NEXT: s_add_i32 s18, s18, 31805; VI-NEXT: s_add_i32 s17, s17, 31806; VI-NEXT: s_add_i32 s16, s16, 31807; VI-NEXT: .LBB9_3: ; %end1808; VI-NEXT: v_mov_b32_e32 v0, s161809; VI-NEXT: v_mov_b32_e32 v1, s171810; VI-NEXT: v_mov_b32_e32 v2, s181811; VI-NEXT: s_setpc_b64 s[30:31]1812; VI-NEXT: .LBB9_4:1813; VI-NEXT: s_branch .LBB9_21814;1815; GFX9-LABEL: bitcast_v3i32_to_v6bf16_scalar:1816; GFX9: ; %bb.0:1817; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1818; GFX9-NEXT: s_cmp_lg_u32 s19, 01819; GFX9-NEXT: s_cbranch_scc0 .LBB9_41820; GFX9-NEXT: ; %bb.1: ; %cmp.false1821; GFX9-NEXT: s_cbranch_execnz .LBB9_31822; GFX9-NEXT: .LBB9_2: ; %cmp.true1823; GFX9-NEXT: s_add_i32 s18, s18, 31824; GFX9-NEXT: s_add_i32 s17, s17, 31825; GFX9-NEXT: s_add_i32 s16, s16, 31826; GFX9-NEXT: .LBB9_3: ; %end1827; GFX9-NEXT: v_mov_b32_e32 v0, s161828; GFX9-NEXT: v_mov_b32_e32 v1, s171829; GFX9-NEXT: v_mov_b32_e32 v2, s181830; GFX9-NEXT: s_setpc_b64 s[30:31]1831; GFX9-NEXT: .LBB9_4:1832; GFX9-NEXT: s_branch .LBB9_21833;1834; GFX11-LABEL: bitcast_v3i32_to_v6bf16_scalar:1835; GFX11: ; %bb.0:1836; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1837; GFX11-NEXT: s_cmp_lg_u32 s3, 01838; GFX11-NEXT: s_mov_b32 s3, 01839; GFX11-NEXT: s_cbranch_scc0 .LBB9_41840; GFX11-NEXT: ; %bb.1: ; %Flow1841; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s31842; GFX11-NEXT: s_cbranch_vccnz .LBB9_31843; GFX11-NEXT: .LBB9_2: ; %cmp.true1844; GFX11-NEXT: s_add_i32 s2, s2, 31845; GFX11-NEXT: s_add_i32 s1, s1, 31846; GFX11-NEXT: s_add_i32 s0, s0, 31847; GFX11-NEXT: .LBB9_3: ; %end1848; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1849; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s11850; GFX11-NEXT: v_mov_b32_e32 v2, s21851; GFX11-NEXT: s_setpc_b64 s[30:31]1852; GFX11-NEXT: .LBB9_4:1853; GFX11-NEXT: s_branch .LBB9_21854 %cmp = icmp eq i32 %b, 01855 br i1 %cmp, label %cmp.true, label %cmp.false1856 1857cmp.true:1858 %a1 = add <3 x i32> %a, splat (i32 3)1859 %a2 = bitcast <3 x i32> %a1 to <6 x bfloat>1860 br label %end1861 1862cmp.false:1863 %a3 = bitcast <3 x i32> %a to <6 x bfloat>1864 br label %end1865 1866end:1867 %phi = phi <6 x bfloat> [ %a2, %cmp.true ], [ %a3, %cmp.false ]1868 ret <6 x bfloat> %phi1869}1870 1871define <3 x i32> @bitcast_v6bf16_to_v3i32(<6 x bfloat> %a, i32 %b) {1872; SI-LABEL: bitcast_v6bf16_to_v3i32:1873; SI: ; %bb.0:1874; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1875; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v61876; SI-NEXT: v_mul_f32_e32 v8, 1.0, v11877; SI-NEXT: v_mul_f32_e32 v9, 1.0, v01878; SI-NEXT: v_mul_f32_e32 v6, 1.0, v31879; SI-NEXT: v_mul_f32_e32 v7, 1.0, v21880; SI-NEXT: v_mul_f32_e32 v3, 1.0, v51881; SI-NEXT: v_mul_f32_e32 v4, 1.0, v41882; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr21883; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc1884; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1885; SI-NEXT: s_cbranch_execnz .LBB10_31886; SI-NEXT: ; %bb.1: ; %Flow1887; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1888; SI-NEXT: s_cbranch_execnz .LBB10_41889; SI-NEXT: .LBB10_2: ; %end1890; SI-NEXT: s_or_b64 exec, exec, s[4:5]1891; SI-NEXT: s_setpc_b64 s[30:31]1892; SI-NEXT: .LBB10_3: ; %cmp.false1893; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v81894; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v61895; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v31896; SI-NEXT: v_alignbit_b32 v0, v0, v9, 161897; SI-NEXT: v_alignbit_b32 v1, v1, v7, 161898; SI-NEXT: v_alignbit_b32 v2, v2, v4, 161899; SI-NEXT: ; implicit-def: $vgpr91900; SI-NEXT: ; implicit-def: $vgpr81901; SI-NEXT: ; implicit-def: $vgpr71902; SI-NEXT: ; implicit-def: $vgpr61903; SI-NEXT: ; implicit-def: $vgpr41904; SI-NEXT: ; implicit-def: $vgpr31905; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1906; SI-NEXT: s_cbranch_execz .LBB10_21907; SI-NEXT: .LBB10_4: ; %cmp.true1908; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v81909; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v91910; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v11911; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v01912; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v11913; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v61914; SI-NEXT: v_alignbit_b32 v0, v1, v0, 161915; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v71916; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v21917; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v11918; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21919; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v31920; SI-NEXT: v_alignbit_b32 v1, v2, v1, 161921; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v41922; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v31923; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v21924; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v31925; SI-NEXT: v_alignbit_b32 v2, v3, v2, 161926; SI-NEXT: s_or_b64 exec, exec, s[4:5]1927; SI-NEXT: s_setpc_b64 s[30:31]1928;1929; VI-LABEL: bitcast_v6bf16_to_v3i32:1930; VI: ; %bb.0:1931; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1932; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31933; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc1934; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]1935; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]1936; VI-NEXT: s_cbranch_execz .LBB10_21937; VI-NEXT: ; %bb.1: ; %cmp.true1938; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v21939; VI-NEXT: v_add_f32_e32 v3, 0x40c00000, v31940; VI-NEXT: v_bfe_u32 v4, v3, 16, 11941; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v31942; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v41943; VI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21944; VI-NEXT: v_or_b32_e32 v5, 0x400000, v31945; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v31946; VI-NEXT: v_add_f32_e32 v2, 0x40c00000, v21947; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc1948; VI-NEXT: v_bfe_u32 v4, v2, 16, 11949; VI-NEXT: s_movk_i32 s6, 0x7fff1950; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v21951; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v41952; VI-NEXT: v_or_b32_e32 v5, 0x400000, v21953; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v21954; VI-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc1955; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v21956; VI-NEXT: v_alignbit_b32 v2, v2, v3, 161957; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v11958; VI-NEXT: v_add_f32_e32 v3, 0x40c00000, v31959; VI-NEXT: v_bfe_u32 v4, v3, 16, 11960; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v31961; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v41962; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v11963; VI-NEXT: v_or_b32_e32 v5, 0x400000, v31964; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v31965; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v11966; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc1967; VI-NEXT: v_bfe_u32 v4, v1, 16, 11968; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v11969; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v41970; VI-NEXT: v_or_b32_e32 v5, 0x400000, v11971; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v11972; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc1973; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v11974; VI-NEXT: v_alignbit_b32 v1, v1, v3, 161975; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v01976; VI-NEXT: v_add_f32_e32 v3, 0x40c00000, v31977; VI-NEXT: v_bfe_u32 v4, v3, 16, 11978; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v31979; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v41980; VI-NEXT: v_and_b32_e32 v0, 0xffff0000, v01981; VI-NEXT: v_or_b32_e32 v5, 0x400000, v31982; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v31983; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v01984; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc1985; VI-NEXT: v_bfe_u32 v4, v0, 16, 11986; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v01987; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v41988; VI-NEXT: v_or_b32_e32 v5, 0x400000, v01989; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v01990; VI-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc1991; VI-NEXT: v_lshrrev_b32_e32 v0, 16, v01992; VI-NEXT: v_alignbit_b32 v0, v0, v3, 161993; VI-NEXT: .LBB10_2: ; %end1994; VI-NEXT: s_or_b64 exec, exec, s[4:5]1995; VI-NEXT: s_setpc_b64 s[30:31]1996;1997; GFX9-LABEL: bitcast_v6bf16_to_v3i32:1998; GFX9: ; %bb.0:1999; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2000; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32001; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc2002; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]2003; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2004; GFX9-NEXT: s_cbranch_execz .LBB10_22005; GFX9-NEXT: ; %bb.1: ; %cmp.true2006; GFX9-NEXT: v_and_b32_e32 v3, 0xffff0000, v22007; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v32008; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 12009; GFX9-NEXT: s_movk_i32 s6, 0x7fff2010; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v22011; GFX9-NEXT: v_add3_u32 v4, v4, v3, s62012; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v32013; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v32014; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v22015; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc2016; GFX9-NEXT: v_bfe_u32 v4, v2, 16, 12017; GFX9-NEXT: v_add3_u32 v4, v4, v2, s62018; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v22019; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v22020; GFX9-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc2021; GFX9-NEXT: s_mov_b32 s7, 0x70603022022; GFX9-NEXT: v_perm_b32 v2, v3, v2, s72023; GFX9-NEXT: v_and_b32_e32 v3, 0xffff0000, v12024; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v32025; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 12026; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v12027; GFX9-NEXT: v_add3_u32 v4, v4, v3, s62028; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v32029; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v32030; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v12031; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc2032; GFX9-NEXT: v_bfe_u32 v4, v1, 16, 12033; GFX9-NEXT: v_add3_u32 v4, v4, v1, s62034; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v12035; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v12036; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc2037; GFX9-NEXT: v_perm_b32 v1, v3, v1, s72038; GFX9-NEXT: v_and_b32_e32 v3, 0xffff0000, v02039; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v32040; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 12041; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v02042; GFX9-NEXT: v_add3_u32 v4, v4, v3, s62043; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v32044; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v32045; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v02046; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc2047; GFX9-NEXT: v_bfe_u32 v4, v0, 16, 12048; GFX9-NEXT: v_add3_u32 v4, v4, v0, s62049; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v02050; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v02051; GFX9-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc2052; GFX9-NEXT: v_perm_b32 v0, v3, v0, s72053; GFX9-NEXT: .LBB10_2: ; %end2054; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]2055; GFX9-NEXT: s_setpc_b64 s[30:31]2056;2057; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v3i32:2058; GFX11-TRUE16: ; %bb.0:2059; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2060; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v32061; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_vgpr4_vgpr52062; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo2063; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2064; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s02065; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false2066; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, v12067; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, v02068; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22069; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow2070; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s02071; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB10_42072; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true2073; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, 02074; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v2.l2075; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v02076; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v22077; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)2078; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v42079; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v1.l2080; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v32081; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)2082; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 12083; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v52084; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52085; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v32086; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v42087; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v5, 0x7fff2088; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l2089; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)2090; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc_lo2091; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32092; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v12093; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v3, 16, 12094; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v11, 16, 12095; GFX11-TRUE16-NEXT: v_add3_u32 v0, v1, v3, 0x7fff2096; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2097; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v0, v8 :: v_dual_add_f32 v2, 0x40c00000, v22098; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v62099; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v7.h2100; GFX11-TRUE16-NEXT: v_add3_u32 v7, v9, v11, 0x7fff2101; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v112102; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v2, 16, 12103; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 12104; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v112105; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v22106; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)2107; GFX11-TRUE16-NEXT: v_add3_u32 v1, v10, v2, 0x7fff2108; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo2109; GFX11-TRUE16-NEXT: v_add3_u32 v8, v9, v0, 0x7fff2110; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v02111; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v42112; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v4, 16, 12113; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v42114; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v42115; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)2116; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v4, 0x7fff2117; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v3, v10, vcc_lo2118; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v22119; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v1, v6, vcc_lo2120; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02121; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v7.h2122; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo2123; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v10.h2124; GFX11-TRUE16-NEXT: .LBB10_4: ; %end2125; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s02126; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2127; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v3 :: v_dual_mov_b32 v1, v42128; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, v52129; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]2130;2131; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v3i32:2132; GFX11-FAKE16: ; %bb.0:2133; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2134; GFX11-FAKE16-NEXT: s_mov_b32 s0, exec_lo2135; GFX11-FAKE16-NEXT: v_cmpx_ne_u32_e32 0, v32136; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s02137; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2138; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s02139; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB10_22140; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.true2141; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v22142; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2143; GFX11-FAKE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v2, 16, v22144; GFX11-FAKE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v22145; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)2146; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v3, 16, 12147; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v32148; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32149; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v2, 16, 12150; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v22151; GFX11-FAKE16-NEXT: v_add3_u32 v6, v6, v3, 0x7fff2152; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v12153; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v12154; GFX11-FAKE16-NEXT: v_add3_u32 v7, v7, v2, 0x7fff2155; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2156; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v6, v8, vcc_lo2157; GFX11-FAKE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v42158; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v22159; GFX11-FAKE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v12160; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)2161; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v4, 16, 12162; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v7, v9, vcc_lo2163; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v42164; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v42165; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v1, 16, 12166; GFX11-FAKE16-NEXT: v_add3_u32 v6, v10, v4, 0x7fff2167; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v02168; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v02169; GFX11-FAKE16-NEXT: v_perm_b32 v2, v3, v2, 0x70603022170; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)2171; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v4, v6, v7 :: v_dual_add_f32 v5, 0x40c00000, v52172; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v12173; GFX11-FAKE16-NEXT: v_add3_u32 v7, v8, v1, 0x7fff2174; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v12175; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v5, 16, 12176; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v52177; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)2178; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc_lo2179; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52180; GFX11-FAKE16-NEXT: v_add3_u32 v9, v9, v5, 0x7fff2181; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2182; GFX11-FAKE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_cndmask_b32 v5, v9, v102183; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v0, 16, 12184; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v02185; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02186; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)2187; GFX11-FAKE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff2188; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v6, v11, vcc_lo2189; GFX11-FAKE16-NEXT: v_perm_b32 v1, v4, v1, 0x70603022190; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)2191; GFX11-FAKE16-NEXT: v_perm_b32 v0, v5, v0, 0x70603022192; GFX11-FAKE16-NEXT: .LBB10_2: ; %end2193; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s02194; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]2195 %cmp = icmp eq i32 %b, 02196 br i1 %cmp, label %cmp.true, label %cmp.false2197 2198cmp.true:2199 %a1 = fadd <6 x bfloat> %a, splat (bfloat 0xR40C0)2200 %a2 = bitcast <6 x bfloat> %a1 to <3 x i32>2201 br label %end2202 2203cmp.false:2204 %a3 = bitcast <6 x bfloat> %a to <3 x i32>2205 br label %end2206 2207end:2208 %phi = phi <3 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]2209 ret <3 x i32> %phi2210}2211 2212define inreg <3 x i32> @bitcast_v6bf16_to_v3i32_scalar(<6 x bfloat> inreg %a, i32 inreg %b) {2213; SI-LABEL: bitcast_v6bf16_to_v3i32_scalar:2214; SI: ; %bb.0:2215; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2216; SI-NEXT: s_cmp_lg_u32 s22, 02217; SI-NEXT: v_mul_f32_e64 v12, 1.0, s172218; SI-NEXT: v_mul_f32_e64 v8, 1.0, s162219; SI-NEXT: v_mul_f32_e64 v11, 1.0, s192220; SI-NEXT: v_mul_f32_e64 v6, 1.0, s182221; SI-NEXT: v_mul_f32_e64 v10, 1.0, s212222; SI-NEXT: v_mul_f32_e64 v4, 1.0, s202223; SI-NEXT: s_cbranch_scc0 .LBB11_42224; SI-NEXT: ; %bb.1: ; %cmp.false2225; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v122226; SI-NEXT: v_lshr_b64 v[0:1], v[8:9], 162227; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v112228; SI-NEXT: v_lshr_b64 v[1:2], v[6:7], 162229; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v102230; SI-NEXT: v_lshr_b64 v[2:3], v[4:5], 162231; SI-NEXT: s_cbranch_execnz .LBB11_32232; SI-NEXT: .LBB11_2: ; %cmp.true2233; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v122234; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v82235; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v12236; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v02237; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v12238; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 162239; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v112240; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v62241; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v22242; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v12243; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v22244; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 162245; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v102246; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v42247; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v32248; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v22249; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v32250; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 162251; SI-NEXT: .LBB11_3: ; %end2252; SI-NEXT: s_setpc_b64 s[30:31]2253; SI-NEXT: .LBB11_4:2254; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr22255; SI-NEXT: s_branch .LBB11_22256;2257; VI-LABEL: bitcast_v6bf16_to_v3i32_scalar:2258; VI: ; %bb.0:2259; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2260; VI-NEXT: s_cmp_lg_u32 s19, 02261; VI-NEXT: s_cbranch_scc0 .LBB11_32262; VI-NEXT: ; %bb.1: ; %cmp.false2263; VI-NEXT: s_cbranch_execnz .LBB11_42264; VI-NEXT: .LBB11_2: ; %cmp.true2265; VI-NEXT: s_lshl_b32 s4, s18, 162266; VI-NEXT: v_mov_b32_e32 v5, 0x40c000002267; VI-NEXT: v_add_f32_e32 v0, s4, v52268; VI-NEXT: v_bfe_u32 v1, v0, 16, 12269; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v02270; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v12271; VI-NEXT: v_or_b32_e32 v2, 0x400000, v02272; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v02273; VI-NEXT: s_and_b32 s4, s18, 0xffff00002274; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc2275; VI-NEXT: v_add_f32_e32 v1, s4, v52276; VI-NEXT: v_bfe_u32 v2, v1, 16, 12277; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v12278; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v22279; VI-NEXT: v_or_b32_e32 v3, 0x400000, v12280; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v12281; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc2282; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v12283; VI-NEXT: s_lshl_b32 s4, s17, 162284; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1]2285; VI-NEXT: v_add_f32_e32 v0, s4, v52286; VI-NEXT: v_bfe_u32 v1, v0, 16, 12287; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v02288; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v12289; VI-NEXT: v_or_b32_e32 v3, 0x400000, v02290; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v02291; VI-NEXT: s_and_b32 s4, s17, 0xffff00002292; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc2293; VI-NEXT: v_add_f32_e32 v1, s4, v52294; VI-NEXT: v_bfe_u32 v3, v1, 16, 12295; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v12296; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v32297; VI-NEXT: v_or_b32_e32 v4, 0x400000, v12298; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v12299; VI-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc2300; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v12301; VI-NEXT: s_lshl_b32 s4, s16, 162302; VI-NEXT: v_lshrrev_b64 v[3:4], 16, v[0:1]2303; VI-NEXT: v_add_f32_e32 v0, s4, v52304; VI-NEXT: v_bfe_u32 v1, v0, 16, 12305; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v02306; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v12307; VI-NEXT: v_or_b32_e32 v4, 0x400000, v02308; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v02309; VI-NEXT: s_and_b32 s4, s16, 0xffff00002310; VI-NEXT: v_cndmask_b32_e32 v0, v1, v4, vcc2311; VI-NEXT: v_add_f32_e32 v1, s4, v52312; VI-NEXT: v_bfe_u32 v4, v1, 16, 12313; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v12314; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v42315; VI-NEXT: v_or_b32_e32 v5, 0x400000, v12316; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v12317; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc2318; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v12319; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1]2320; VI-NEXT: v_mov_b32_e32 v1, v32321; VI-NEXT: s_setpc_b64 s[30:31]2322; VI-NEXT: .LBB11_3:2323; VI-NEXT: s_branch .LBB11_22324; VI-NEXT: .LBB11_4:2325; VI-NEXT: v_mov_b32_e32 v0, s162326; VI-NEXT: v_mov_b32_e32 v1, s172327; VI-NEXT: v_mov_b32_e32 v2, s182328; VI-NEXT: s_setpc_b64 s[30:31]2329;2330; GFX9-LABEL: bitcast_v6bf16_to_v3i32_scalar:2331; GFX9: ; %bb.0:2332; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2333; GFX9-NEXT: s_cmp_lg_u32 s19, 02334; GFX9-NEXT: s_cbranch_scc0 .LBB11_32335; GFX9-NEXT: ; %bb.1: ; %cmp.false2336; GFX9-NEXT: s_cbranch_execnz .LBB11_42337; GFX9-NEXT: .LBB11_2: ; %cmp.true2338; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s182339; GFX9-NEXT: v_mov_b32_e32 v0, 0x40c000002340; GFX9-NEXT: v_add_f32_e32 v1, s4, v02341; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 12342; GFX9-NEXT: v_add_u32_e32 v2, v2, v12343; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v22344; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v12345; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v12346; GFX9-NEXT: s_lshl_b32 s4, s18, 162347; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc2348; GFX9-NEXT: v_add_f32_e32 v2, s4, v02349; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 12350; GFX9-NEXT: v_add_u32_e32 v3, v3, v22351; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v32352; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v22353; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v22354; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc2355; GFX9-NEXT: v_mov_b32_e32 v3, 0xffff2356; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v12357; GFX9-NEXT: v_and_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12358; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s172359; GFX9-NEXT: v_lshl_or_b32 v2, v1, 16, v22360; GFX9-NEXT: v_add_f32_e32 v1, s4, v02361; GFX9-NEXT: v_bfe_u32 v4, v1, 16, 12362; GFX9-NEXT: v_add_u32_e32 v4, v4, v12363; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v42364; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v12365; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v12366; GFX9-NEXT: s_lshl_b32 s4, s17, 162367; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc2368; GFX9-NEXT: v_add_f32_e32 v4, s4, v02369; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 12370; GFX9-NEXT: v_add_u32_e32 v5, v5, v42371; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v52372; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v42373; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v42374; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc2375; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v12376; GFX9-NEXT: v_and_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12377; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s162378; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v42379; GFX9-NEXT: v_add_f32_e32 v4, s4, v02380; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 12381; GFX9-NEXT: v_add_u32_e32 v5, v5, v42382; GFX9-NEXT: s_lshl_b32 s4, s16, 162383; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v52384; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v42385; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v42386; GFX9-NEXT: v_add_f32_e32 v0, s4, v02387; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc2388; GFX9-NEXT: v_bfe_u32 v5, v0, 16, 12389; GFX9-NEXT: v_add_u32_e32 v5, v5, v02390; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v52391; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v02392; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v02393; GFX9-NEXT: v_cndmask_b32_e32 v0, v5, v6, vcc2394; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v42395; GFX9-NEXT: v_and_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12396; GFX9-NEXT: v_lshl_or_b32 v0, v4, 16, v02397; GFX9-NEXT: s_setpc_b64 s[30:31]2398; GFX9-NEXT: .LBB11_3:2399; GFX9-NEXT: s_branch .LBB11_22400; GFX9-NEXT: .LBB11_4:2401; GFX9-NEXT: v_mov_b32_e32 v0, s162402; GFX9-NEXT: v_mov_b32_e32 v1, s172403; GFX9-NEXT: v_mov_b32_e32 v2, s182404; GFX9-NEXT: s_setpc_b64 s[30:31]2405;2406; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v3i32_scalar:2407; GFX11-TRUE16: ; %bb.0:2408; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2409; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 02410; GFX11-TRUE16-NEXT: s_mov_b32 s3, 02411; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB11_32412; GFX11-TRUE16-NEXT: ; %bb.1: ; %Flow2413; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s32414; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB11_42415; GFX11-TRUE16-NEXT: .LBB11_2: ; %cmp.true2416; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s22417; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 162418; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s32419; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s12420; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s22421; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s32422; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 162423; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v02424; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02425; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 12426; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v3, 16, 12427; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 12428; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s12429; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v12430; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s02431; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v32432; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 162433; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v52434; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s22435; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)2436; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v72437; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v12438; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v42439; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v02440; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2441; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v22442; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo2443; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v12444; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v32445; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 12446; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)2447; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v02448; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v9, vcc_lo2449; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s02450; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32451; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v6, 16, 12452; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v52453; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)2454; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v42455; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v7, v2, vcc_lo2456; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 12457; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v62458; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v12459; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v62460; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v32461; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v7, v42462; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v0.l2463; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)2464; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v12465; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v82466; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v92467; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v62468; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v8, v9, vcc_lo2469; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52470; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)2471; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v62472; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v7, v10, vcc_lo2473; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v42474; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v1, v11, vcc_lo2475; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v52476; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l2477; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)2478; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v42479; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v6.l2480; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]2481; GFX11-TRUE16-NEXT: .LBB11_3:2482; GFX11-TRUE16-NEXT: s_branch .LBB11_22483; GFX11-TRUE16-NEXT: .LBB11_4:2484; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s12485; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s22486; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]2487;2488; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v3i32_scalar:2489; GFX11-FAKE16: ; %bb.0:2490; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2491; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 02492; GFX11-FAKE16-NEXT: s_mov_b32 s3, 02493; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB11_32494; GFX11-FAKE16-NEXT: ; %bb.1: ; %Flow2495; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s32496; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB11_42497; GFX11-FAKE16-NEXT: .LBB11_2: ; %cmp.true2498; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s22499; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 162500; GFX11-FAKE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s32501; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s22502; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s2, 0, s02503; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 162504; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s12505; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 12506; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 12507; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v02508; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02509; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s02510; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v12511; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v3, v12512; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s32513; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 162514; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v72515; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s12516; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v32517; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v02518; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v4, 16, 12519; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s22520; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v52521; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)2522; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v22523; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo2524; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v12525; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v5, 16, 12526; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v7, 16, 12527; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)2528; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v02529; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo2530; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v10, v42531; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v42532; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v6, 16, 12533; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v8, v72534; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52535; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v32536; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v52537; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v12538; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v82539; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2540; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v22541; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v9, v62542; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v2, v2, v11 :: v_dual_and_b32 v1, 0xffff, v12543; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v72544; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)2545; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v92546; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v62547; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v22548; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v8, v12, vcc_lo2549; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v42550; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo2551; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v62552; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v22553; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v0, 16, v12554; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)2555; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v32556; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v5, v9, vcc_lo2557; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v72558; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v62559; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2560; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v42561; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v52562; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2563; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v4, 16, v52564; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]2565; GFX11-FAKE16-NEXT: .LBB11_3:2566; GFX11-FAKE16-NEXT: s_branch .LBB11_22567; GFX11-FAKE16-NEXT: .LBB11_4:2568; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s12569; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, s22570; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]2571 %cmp = icmp eq i32 %b, 02572 br i1 %cmp, label %cmp.true, label %cmp.false2573 2574cmp.true:2575 %a1 = fadd <6 x bfloat> %a, splat (bfloat 0xR40C0)2576 %a2 = bitcast <6 x bfloat> %a1 to <3 x i32>2577 br label %end2578 2579cmp.false:2580 %a3 = bitcast <6 x bfloat> %a to <3 x i32>2581 br label %end2582 2583end:2584 %phi = phi <3 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]2585 ret <3 x i32> %phi2586}2587 2588define <6 x half> @bitcast_v3i32_to_v6f16(<3 x i32> %a, i32 %b) {2589; SI-LABEL: bitcast_v3i32_to_v6f16:2590; SI: ; %bb.0:2591; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2592; SI-NEXT: v_mov_b32_e32 v8, v22593; SI-NEXT: v_mov_b32_e32 v7, v12594; SI-NEXT: v_mov_b32_e32 v6, v02595; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32596; SI-NEXT: ; implicit-def: $vgpr02597; SI-NEXT: ; implicit-def: $vgpr12598; SI-NEXT: ; implicit-def: $vgpr22599; SI-NEXT: ; implicit-def: $vgpr32600; SI-NEXT: ; implicit-def: $vgpr42601; SI-NEXT: ; implicit-def: $vgpr52602; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc2603; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]2604; SI-NEXT: s_cbranch_execnz .LBB12_32605; SI-NEXT: ; %bb.1: ; %Flow2606; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2607; SI-NEXT: s_cbranch_execnz .LBB12_42608; SI-NEXT: .LBB12_2: ; %end2609; SI-NEXT: s_or_b64 exec, exec, s[4:5]2610; SI-NEXT: s_setpc_b64 s[30:31]2611; SI-NEXT: .LBB12_3: ; %cmp.false2612; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v82613; SI-NEXT: v_cvt_f32_f16_e32 v5, v02614; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v72615; SI-NEXT: v_cvt_f32_f16_e32 v3, v02616; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v62617; SI-NEXT: v_cvt_f32_f16_e32 v1, v02618; SI-NEXT: v_cvt_f32_f16_e32 v4, v82619; SI-NEXT: v_cvt_f32_f16_e32 v2, v72620; SI-NEXT: v_cvt_f32_f16_e32 v0, v62621; SI-NEXT: ; implicit-def: $vgpr62622; SI-NEXT: ; implicit-def: $vgpr72623; SI-NEXT: ; implicit-def: $vgpr82624; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2625; SI-NEXT: s_cbranch_execz .LBB12_22626; SI-NEXT: .LBB12_4: ; %cmp.true2627; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v62628; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v72629; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v82630; SI-NEXT: v_cvt_f32_f16_e32 v4, v52631; SI-NEXT: v_cvt_f32_f16_e32 v2, v32632; SI-NEXT: v_cvt_f32_f16_e32 v0, v12633; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v52634; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v32635; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v12636; SI-NEXT: v_cvt_f32_f16_e32 v5, v52637; SI-NEXT: v_cvt_f32_f16_e32 v3, v32638; SI-NEXT: v_cvt_f32_f16_e32 v1, v12639; SI-NEXT: s_or_b64 exec, exec, s[4:5]2640; SI-NEXT: s_setpc_b64 s[30:31]2641;2642; VI-LABEL: bitcast_v3i32_to_v6f16:2643; VI: ; %bb.0:2644; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2645; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32646; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc2647; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]2648; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2649; VI-NEXT: ; %bb.1: ; %cmp.true2650; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v22651; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v12652; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v02653; VI-NEXT: ; %bb.2: ; %end2654; VI-NEXT: s_or_b64 exec, exec, s[4:5]2655; VI-NEXT: s_setpc_b64 s[30:31]2656;2657; GFX9-LABEL: bitcast_v3i32_to_v6f16:2658; GFX9: ; %bb.0:2659; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2660; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32661; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc2662; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]2663; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2664; GFX9-NEXT: ; %bb.1: ; %cmp.true2665; GFX9-NEXT: v_add_u32_e32 v2, 3, v22666; GFX9-NEXT: v_add_u32_e32 v1, 3, v12667; GFX9-NEXT: v_add_u32_e32 v0, 3, v02668; GFX9-NEXT: ; %bb.2: ; %end2669; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]2670; GFX9-NEXT: s_setpc_b64 s[30:31]2671;2672; GFX11-LABEL: bitcast_v3i32_to_v6f16:2673; GFX11: ; %bb.0:2674; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2675; GFX11-NEXT: s_mov_b32 s0, exec_lo2676; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v32677; GFX11-NEXT: s_xor_b32 s0, exec_lo, s02678; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2679; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s02680; GFX11-NEXT: ; %bb.1: ; %cmp.true2681; GFX11-NEXT: v_add_nc_u32_e32 v2, 3, v22682; GFX11-NEXT: v_add_nc_u32_e32 v1, 3, v12683; GFX11-NEXT: v_add_nc_u32_e32 v0, 3, v02684; GFX11-NEXT: ; %bb.2: ; %end2685; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s02686; GFX11-NEXT: s_setpc_b64 s[30:31]2687 %cmp = icmp eq i32 %b, 02688 br i1 %cmp, label %cmp.true, label %cmp.false2689 2690cmp.true:2691 %a1 = add <3 x i32> %a, splat (i32 3)2692 %a2 = bitcast <3 x i32> %a1 to <6 x half>2693 br label %end2694 2695cmp.false:2696 %a3 = bitcast <3 x i32> %a to <6 x half>2697 br label %end2698 2699end:2700 %phi = phi <6 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]2701 ret <6 x half> %phi2702}2703 2704define inreg <6 x half> @bitcast_v3i32_to_v6f16_scalar(<3 x i32> inreg %a, i32 inreg %b) {2705; SI-LABEL: bitcast_v3i32_to_v6f16_scalar:2706; SI: ; %bb.0:2707; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2708; SI-NEXT: s_cmp_lg_u32 s19, 02709; SI-NEXT: s_cbranch_scc0 .LBB13_42710; SI-NEXT: ; %bb.1: ; %cmp.false2711; SI-NEXT: s_lshr_b32 s4, s18, 162712; SI-NEXT: v_cvt_f32_f16_e32 v5, s42713; SI-NEXT: s_lshr_b32 s4, s17, 162714; SI-NEXT: v_cvt_f32_f16_e32 v3, s42715; SI-NEXT: s_lshr_b32 s4, s16, 162716; SI-NEXT: v_cvt_f32_f16_e32 v1, s42717; SI-NEXT: v_cvt_f32_f16_e32 v4, s182718; SI-NEXT: v_cvt_f32_f16_e32 v2, s172719; SI-NEXT: v_cvt_f32_f16_e32 v0, s162720; SI-NEXT: s_cbranch_execnz .LBB13_32721; SI-NEXT: .LBB13_2: ; %cmp.true2722; SI-NEXT: s_add_i32 s18, s18, 32723; SI-NEXT: s_add_i32 s17, s17, 32724; SI-NEXT: s_lshr_b32 s4, s18, 162725; SI-NEXT: s_add_i32 s16, s16, 32726; SI-NEXT: v_cvt_f32_f16_e32 v5, s42727; SI-NEXT: s_lshr_b32 s4, s17, 162728; SI-NEXT: v_cvt_f32_f16_e32 v3, s42729; SI-NEXT: s_lshr_b32 s4, s16, 162730; SI-NEXT: v_cvt_f32_f16_e32 v4, s182731; SI-NEXT: v_cvt_f32_f16_e32 v2, s172732; SI-NEXT: v_cvt_f32_f16_e32 v0, s162733; SI-NEXT: v_cvt_f32_f16_e32 v1, s42734; SI-NEXT: .LBB13_3: ; %end2735; SI-NEXT: s_setpc_b64 s[30:31]2736; SI-NEXT: .LBB13_4:2737; SI-NEXT: ; implicit-def: $vgpr02738; SI-NEXT: ; implicit-def: $vgpr12739; SI-NEXT: ; implicit-def: $vgpr22740; SI-NEXT: ; implicit-def: $vgpr32741; SI-NEXT: ; implicit-def: $vgpr42742; SI-NEXT: ; implicit-def: $vgpr52743; SI-NEXT: s_branch .LBB13_22744;2745; VI-LABEL: bitcast_v3i32_to_v6f16_scalar:2746; VI: ; %bb.0:2747; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2748; VI-NEXT: s_cmp_lg_u32 s19, 02749; VI-NEXT: s_cbranch_scc0 .LBB13_42750; VI-NEXT: ; %bb.1: ; %cmp.false2751; VI-NEXT: s_cbranch_execnz .LBB13_32752; VI-NEXT: .LBB13_2: ; %cmp.true2753; VI-NEXT: s_add_i32 s18, s18, 32754; VI-NEXT: s_add_i32 s17, s17, 32755; VI-NEXT: s_add_i32 s16, s16, 32756; VI-NEXT: .LBB13_3: ; %end2757; VI-NEXT: v_mov_b32_e32 v0, s162758; VI-NEXT: v_mov_b32_e32 v1, s172759; VI-NEXT: v_mov_b32_e32 v2, s182760; VI-NEXT: s_setpc_b64 s[30:31]2761; VI-NEXT: .LBB13_4:2762; VI-NEXT: s_branch .LBB13_22763;2764; GFX9-LABEL: bitcast_v3i32_to_v6f16_scalar:2765; GFX9: ; %bb.0:2766; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2767; GFX9-NEXT: s_cmp_lg_u32 s19, 02768; GFX9-NEXT: s_cbranch_scc0 .LBB13_42769; GFX9-NEXT: ; %bb.1: ; %cmp.false2770; GFX9-NEXT: s_cbranch_execnz .LBB13_32771; GFX9-NEXT: .LBB13_2: ; %cmp.true2772; GFX9-NEXT: s_add_i32 s18, s18, 32773; GFX9-NEXT: s_add_i32 s17, s17, 32774; GFX9-NEXT: s_add_i32 s16, s16, 32775; GFX9-NEXT: .LBB13_3: ; %end2776; GFX9-NEXT: v_mov_b32_e32 v0, s162777; GFX9-NEXT: v_mov_b32_e32 v1, s172778; GFX9-NEXT: v_mov_b32_e32 v2, s182779; GFX9-NEXT: s_setpc_b64 s[30:31]2780; GFX9-NEXT: .LBB13_4:2781; GFX9-NEXT: s_branch .LBB13_22782;2783; GFX11-LABEL: bitcast_v3i32_to_v6f16_scalar:2784; GFX11: ; %bb.0:2785; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2786; GFX11-NEXT: s_cmp_lg_u32 s3, 02787; GFX11-NEXT: s_mov_b32 s3, 02788; GFX11-NEXT: s_cbranch_scc0 .LBB13_42789; GFX11-NEXT: ; %bb.1: ; %Flow2790; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s32791; GFX11-NEXT: s_cbranch_vccnz .LBB13_32792; GFX11-NEXT: .LBB13_2: ; %cmp.true2793; GFX11-NEXT: s_add_i32 s2, s2, 32794; GFX11-NEXT: s_add_i32 s1, s1, 32795; GFX11-NEXT: s_add_i32 s0, s0, 32796; GFX11-NEXT: .LBB13_3: ; %end2797; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2798; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s12799; GFX11-NEXT: v_mov_b32_e32 v2, s22800; GFX11-NEXT: s_setpc_b64 s[30:31]2801; GFX11-NEXT: .LBB13_4:2802; GFX11-NEXT: s_branch .LBB13_22803 %cmp = icmp eq i32 %b, 02804 br i1 %cmp, label %cmp.true, label %cmp.false2805 2806cmp.true:2807 %a1 = add <3 x i32> %a, splat (i32 3)2808 %a2 = bitcast <3 x i32> %a1 to <6 x half>2809 br label %end2810 2811cmp.false:2812 %a3 = bitcast <3 x i32> %a to <6 x half>2813 br label %end2814 2815end:2816 %phi = phi <6 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]2817 ret <6 x half> %phi2818}2819 2820define <3 x i32> @bitcast_v6f16_to_v3i32(<6 x half> %a, i32 %b) {2821; SI-LABEL: bitcast_v6f16_to_v3i32:2822; SI: ; %bb.0:2823; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2824; SI-NEXT: v_cvt_f16_f32_e32 v10, v12825; SI-NEXT: v_cvt_f16_f32_e32 v9, v02826; SI-NEXT: v_cvt_f16_f32_e32 v8, v32827; SI-NEXT: v_cvt_f16_f32_e32 v7, v22828; SI-NEXT: v_cvt_f16_f32_e32 v5, v52829; SI-NEXT: v_cvt_f16_f32_e32 v3, v42830; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v62831; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr22832; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc2833; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]2834; SI-NEXT: s_cbranch_execnz .LBB14_32835; SI-NEXT: ; %bb.1: ; %Flow2836; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2837; SI-NEXT: s_cbranch_execnz .LBB14_42838; SI-NEXT: .LBB14_2: ; %end2839; SI-NEXT: s_or_b64 exec, exec, s[4:5]2840; SI-NEXT: s_setpc_b64 s[30:31]2841; SI-NEXT: .LBB14_3: ; %cmp.false2842; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v102843; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v82844; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v52845; SI-NEXT: v_or_b32_e32 v0, v9, v02846; SI-NEXT: v_or_b32_e32 v1, v7, v12847; SI-NEXT: v_or_b32_e32 v2, v3, v22848; SI-NEXT: ; implicit-def: $vgpr102849; SI-NEXT: ; implicit-def: $vgpr92850; SI-NEXT: ; implicit-def: $vgpr82851; SI-NEXT: ; implicit-def: $vgpr72852; SI-NEXT: ; implicit-def: $vgpr52853; SI-NEXT: ; implicit-def: $vgpr32854; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2855; SI-NEXT: s_cbranch_execz .LBB14_22856; SI-NEXT: .LBB14_4: ; %cmp.true2857; SI-NEXT: v_cvt_f32_f16_e32 v0, v102858; SI-NEXT: v_cvt_f32_f16_e32 v1, v92859; SI-NEXT: v_cvt_f32_f16_e32 v2, v82860; SI-NEXT: v_cvt_f32_f16_e32 v4, v72861; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v02862; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v12863; SI-NEXT: v_cvt_f16_f32_e32 v0, v02864; SI-NEXT: v_cvt_f16_f32_e32 v1, v12865; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v22866; SI-NEXT: v_cvt_f32_f16_e32 v3, v32867; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v02868; SI-NEXT: v_or_b32_e32 v0, v1, v02869; SI-NEXT: v_cvt_f16_f32_e32 v1, v22870; SI-NEXT: v_cvt_f32_f16_e32 v2, v52871; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v42872; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v32873; SI-NEXT: v_cvt_f16_f32_e32 v4, v42874; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v22875; SI-NEXT: v_cvt_f16_f32_e32 v2, v22876; SI-NEXT: v_cvt_f16_f32_e32 v3, v32877; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v12878; SI-NEXT: v_or_b32_e32 v1, v4, v12879; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v22880; SI-NEXT: v_or_b32_e32 v2, v3, v22881; SI-NEXT: s_or_b64 exec, exec, s[4:5]2882; SI-NEXT: s_setpc_b64 s[30:31]2883;2884; VI-LABEL: bitcast_v6f16_to_v3i32:2885; VI: ; %bb.0:2886; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2887; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32888; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc2889; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]2890; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2891; VI-NEXT: s_cbranch_execz .LBB14_22892; VI-NEXT: ; %bb.1: ; %cmp.true2893; VI-NEXT: v_mov_b32_e32 v3, 0x2002894; VI-NEXT: v_add_f16_sdwa v4, v2, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2895; VI-NEXT: v_add_f16_e32 v2, 0x200, v22896; VI-NEXT: v_or_b32_e32 v2, v2, v42897; VI-NEXT: v_add_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2898; VI-NEXT: v_add_f16_e32 v1, 0x200, v12899; VI-NEXT: v_add_f16_sdwa v3, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2900; VI-NEXT: v_add_f16_e32 v0, 0x200, v02901; VI-NEXT: v_or_b32_e32 v1, v1, v42902; VI-NEXT: v_or_b32_e32 v0, v0, v32903; VI-NEXT: .LBB14_2: ; %end2904; VI-NEXT: s_or_b64 exec, exec, s[4:5]2905; VI-NEXT: s_setpc_b64 s[30:31]2906;2907; GFX9-LABEL: bitcast_v6f16_to_v3i32:2908; GFX9: ; %bb.0:2909; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2910; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32911; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc2912; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]2913; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]2914; GFX9-NEXT: ; %bb.1: ; %cmp.true2915; GFX9-NEXT: s_movk_i32 s6, 0x2002916; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0]2917; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0]2918; GFX9-NEXT: v_pk_add_f16 v0, v0, s6 op_sel_hi:[1,0]2919; GFX9-NEXT: ; %bb.2: ; %end2920; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]2921; GFX9-NEXT: s_setpc_b64 s[30:31]2922;2923; GFX11-LABEL: bitcast_v6f16_to_v3i32:2924; GFX11: ; %bb.0:2925; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2926; GFX11-NEXT: s_mov_b32 s0, exec_lo2927; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v32928; GFX11-NEXT: s_xor_b32 s0, exec_lo, s02929; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2930; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s02931; GFX11-NEXT: ; %bb.1: ; %cmp.true2932; GFX11-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]2933; GFX11-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]2934; GFX11-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]2935; GFX11-NEXT: ; %bb.2: ; %end2936; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s02937; GFX11-NEXT: s_setpc_b64 s[30:31]2938 %cmp = icmp eq i32 %b, 02939 br i1 %cmp, label %cmp.true, label %cmp.false2940 2941cmp.true:2942 %a1 = fadd <6 x half> %a, splat (half 0xH0200)2943 %a2 = bitcast <6 x half> %a1 to <3 x i32>2944 br label %end2945 2946cmp.false:2947 %a3 = bitcast <6 x half> %a to <3 x i32>2948 br label %end2949 2950end:2951 %phi = phi <3 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]2952 ret <3 x i32> %phi2953}2954 2955define inreg <3 x i32> @bitcast_v6f16_to_v3i32_scalar(<6 x half> inreg %a, i32 inreg %b) {2956; SI-LABEL: bitcast_v6f16_to_v3i32_scalar:2957; SI: ; %bb.0:2958; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2959; SI-NEXT: v_cvt_f16_f32_e32 v8, s172960; SI-NEXT: v_cvt_f16_f32_e32 v7, s162961; SI-NEXT: v_cvt_f16_f32_e32 v6, s192962; SI-NEXT: v_cvt_f16_f32_e32 v5, s182963; SI-NEXT: v_cvt_f16_f32_e32 v4, s212964; SI-NEXT: v_cvt_f16_f32_e32 v3, s202965; SI-NEXT: s_cmp_lg_u32 s22, 02966; SI-NEXT: s_cbranch_scc0 .LBB15_42967; SI-NEXT: ; %bb.1: ; %cmp.false2968; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v82969; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v62970; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v42971; SI-NEXT: v_or_b32_e32 v0, v7, v02972; SI-NEXT: v_or_b32_e32 v1, v5, v12973; SI-NEXT: v_or_b32_e32 v2, v3, v22974; SI-NEXT: s_cbranch_execnz .LBB15_32975; SI-NEXT: .LBB15_2: ; %cmp.true2976; SI-NEXT: v_cvt_f32_f16_e32 v0, v82977; SI-NEXT: v_cvt_f32_f16_e32 v1, v72978; SI-NEXT: v_cvt_f32_f16_e32 v2, v62979; SI-NEXT: v_cvt_f32_f16_e32 v5, v52980; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v02981; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v12982; SI-NEXT: v_cvt_f16_f32_e32 v0, v02983; SI-NEXT: v_cvt_f16_f32_e32 v1, v12984; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v22985; SI-NEXT: v_cvt_f32_f16_e32 v3, v32986; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v02987; SI-NEXT: v_or_b32_e32 v0, v1, v02988; SI-NEXT: v_cvt_f16_f32_e32 v1, v22989; SI-NEXT: v_cvt_f32_f16_e32 v2, v42990; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v52991; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v32992; SI-NEXT: v_cvt_f16_f32_e32 v4, v42993; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v22994; SI-NEXT: v_cvt_f16_f32_e32 v2, v22995; SI-NEXT: v_cvt_f16_f32_e32 v3, v32996; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v12997; SI-NEXT: v_or_b32_e32 v1, v4, v12998; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v22999; SI-NEXT: v_or_b32_e32 v2, v3, v23000; SI-NEXT: .LBB15_3: ; %end3001; SI-NEXT: s_setpc_b64 s[30:31]3002; SI-NEXT: .LBB15_4:3003; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr23004; SI-NEXT: s_branch .LBB15_23005;3006; VI-LABEL: bitcast_v6f16_to_v3i32_scalar:3007; VI: ; %bb.0:3008; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3009; VI-NEXT: s_cmp_lg_u32 s19, 03010; VI-NEXT: s_cbranch_scc0 .LBB15_33011; VI-NEXT: ; %bb.1: ; %cmp.false3012; VI-NEXT: s_cbranch_execnz .LBB15_43013; VI-NEXT: .LBB15_2: ; %cmp.true3014; VI-NEXT: s_lshr_b32 s4, s18, 163015; VI-NEXT: v_mov_b32_e32 v0, 0x2003016; VI-NEXT: v_mov_b32_e32 v1, s43017; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3018; VI-NEXT: v_add_f16_e32 v2, s18, v03019; VI-NEXT: s_lshr_b32 s4, s17, 163020; VI-NEXT: v_or_b32_e32 v2, v2, v13021; VI-NEXT: v_mov_b32_e32 v1, s43022; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3023; VI-NEXT: v_add_f16_e32 v3, s17, v03024; VI-NEXT: s_lshr_b32 s4, s16, 163025; VI-NEXT: v_or_b32_e32 v1, v3, v13026; VI-NEXT: v_mov_b32_e32 v3, s43027; VI-NEXT: v_add_f16_sdwa v3, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3028; VI-NEXT: v_add_f16_e32 v0, s16, v03029; VI-NEXT: v_or_b32_e32 v0, v0, v33030; VI-NEXT: s_setpc_b64 s[30:31]3031; VI-NEXT: .LBB15_3:3032; VI-NEXT: s_branch .LBB15_23033; VI-NEXT: .LBB15_4:3034; VI-NEXT: v_mov_b32_e32 v0, s163035; VI-NEXT: v_mov_b32_e32 v1, s173036; VI-NEXT: v_mov_b32_e32 v2, s183037; VI-NEXT: s_setpc_b64 s[30:31]3038;3039; GFX9-LABEL: bitcast_v6f16_to_v3i32_scalar:3040; GFX9: ; %bb.0:3041; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3042; GFX9-NEXT: s_cmp_lg_u32 s19, 03043; GFX9-NEXT: s_cbranch_scc0 .LBB15_33044; GFX9-NEXT: ; %bb.1: ; %cmp.false3045; GFX9-NEXT: s_cbranch_execnz .LBB15_43046; GFX9-NEXT: .LBB15_2: ; %cmp.true3047; GFX9-NEXT: v_mov_b32_e32 v0, 0x2003048; GFX9-NEXT: v_pk_add_f16 v2, s18, v0 op_sel_hi:[1,0]3049; GFX9-NEXT: v_pk_add_f16 v1, s17, v0 op_sel_hi:[1,0]3050; GFX9-NEXT: v_pk_add_f16 v0, s16, v0 op_sel_hi:[1,0]3051; GFX9-NEXT: s_setpc_b64 s[30:31]3052; GFX9-NEXT: .LBB15_3:3053; GFX9-NEXT: s_branch .LBB15_23054; GFX9-NEXT: .LBB15_4:3055; GFX9-NEXT: v_mov_b32_e32 v0, s163056; GFX9-NEXT: v_mov_b32_e32 v1, s173057; GFX9-NEXT: v_mov_b32_e32 v2, s183058; GFX9-NEXT: s_setpc_b64 s[30:31]3059;3060; GFX11-LABEL: bitcast_v6f16_to_v3i32_scalar:3061; GFX11: ; %bb.0:3062; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3063; GFX11-NEXT: s_cmp_lg_u32 s3, 03064; GFX11-NEXT: s_mov_b32 s3, 03065; GFX11-NEXT: s_cbranch_scc0 .LBB15_33066; GFX11-NEXT: ; %bb.1: ; %Flow3067; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s33068; GFX11-NEXT: s_cbranch_vccnz .LBB15_43069; GFX11-NEXT: .LBB15_2: ; %cmp.true3070; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]3071; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]3072; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]3073; GFX11-NEXT: s_setpc_b64 s[30:31]3074; GFX11-NEXT: .LBB15_3:3075; GFX11-NEXT: s_branch .LBB15_23076; GFX11-NEXT: .LBB15_4:3077; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s13078; GFX11-NEXT: v_mov_b32_e32 v2, s23079; GFX11-NEXT: s_setpc_b64 s[30:31]3080 %cmp = icmp eq i32 %b, 03081 br i1 %cmp, label %cmp.true, label %cmp.false3082 3083cmp.true:3084 %a1 = fadd <6 x half> %a, splat (half 0xH0200)3085 %a2 = bitcast <6 x half> %a1 to <3 x i32>3086 br label %end3087 3088cmp.false:3089 %a3 = bitcast <6 x half> %a to <3 x i32>3090 br label %end3091 3092end:3093 %phi = phi <3 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]3094 ret <3 x i32> %phi3095}3096 3097define <6 x i16> @bitcast_v3i32_to_v6i16(<3 x i32> %a, i32 %b) {3098; SI-LABEL: bitcast_v3i32_to_v6i16:3099; SI: ; %bb.0:3100; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3101; SI-NEXT: v_mov_b32_e32 v4, v23102; SI-NEXT: v_mov_b32_e32 v2, v13103; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33104; SI-NEXT: ; implicit-def: $vgpr13105; SI-NEXT: ; implicit-def: $vgpr33106; SI-NEXT: ; implicit-def: $vgpr53107; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc3108; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3109; SI-NEXT: s_cbranch_execnz .LBB16_33110; SI-NEXT: ; %bb.1: ; %Flow3111; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3112; SI-NEXT: s_cbranch_execnz .LBB16_43113; SI-NEXT: .LBB16_2: ; %end3114; SI-NEXT: s_or_b64 exec, exec, s[4:5]3115; SI-NEXT: s_setpc_b64 s[30:31]3116; SI-NEXT: .LBB16_3: ; %cmp.false3117; SI-NEXT: v_alignbit_b32 v5, v0, v4, 163118; SI-NEXT: v_alignbit_b32 v1, v2, v0, 163119; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v23120; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3121; SI-NEXT: s_cbranch_execz .LBB16_23122; SI-NEXT: .LBB16_4: ; %cmp.true3123; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v43124; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v23125; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v03126; SI-NEXT: v_alignbit_b32 v1, v2, v0, 163127; SI-NEXT: v_alignbit_b32 v5, v0, v4, 163128; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v23129; SI-NEXT: s_or_b64 exec, exec, s[4:5]3130; SI-NEXT: s_setpc_b64 s[30:31]3131;3132; VI-LABEL: bitcast_v3i32_to_v6i16:3133; VI: ; %bb.0:3134; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3135; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33136; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc3137; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3138; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3139; VI-NEXT: ; %bb.1: ; %cmp.true3140; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v23141; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v13142; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v03143; VI-NEXT: ; %bb.2: ; %end3144; VI-NEXT: s_or_b64 exec, exec, s[4:5]3145; VI-NEXT: s_setpc_b64 s[30:31]3146;3147; GFX9-LABEL: bitcast_v3i32_to_v6i16:3148; GFX9: ; %bb.0:3149; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3150; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33151; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc3152; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3153; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3154; GFX9-NEXT: ; %bb.1: ; %cmp.true3155; GFX9-NEXT: v_add_u32_e32 v2, 3, v23156; GFX9-NEXT: v_add_u32_e32 v1, 3, v13157; GFX9-NEXT: v_add_u32_e32 v0, 3, v03158; GFX9-NEXT: ; %bb.2: ; %end3159; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]3160; GFX9-NEXT: s_setpc_b64 s[30:31]3161;3162; GFX11-LABEL: bitcast_v3i32_to_v6i16:3163; GFX11: ; %bb.0:3164; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3165; GFX11-NEXT: s_mov_b32 s0, exec_lo3166; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v33167; GFX11-NEXT: s_xor_b32 s0, exec_lo, s03168; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3169; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s03170; GFX11-NEXT: ; %bb.1: ; %cmp.true3171; GFX11-NEXT: v_add_nc_u32_e32 v2, 3, v23172; GFX11-NEXT: v_add_nc_u32_e32 v1, 3, v13173; GFX11-NEXT: v_add_nc_u32_e32 v0, 3, v03174; GFX11-NEXT: ; %bb.2: ; %end3175; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s03176; GFX11-NEXT: s_setpc_b64 s[30:31]3177 %cmp = icmp eq i32 %b, 03178 br i1 %cmp, label %cmp.true, label %cmp.false3179 3180cmp.true:3181 %a1 = add <3 x i32> %a, splat (i32 3)3182 %a2 = bitcast <3 x i32> %a1 to <6 x i16>3183 br label %end3184 3185cmp.false:3186 %a3 = bitcast <3 x i32> %a to <6 x i16>3187 br label %end3188 3189end:3190 %phi = phi <6 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]3191 ret <6 x i16> %phi3192}3193 3194define inreg <6 x i16> @bitcast_v3i32_to_v6i16_scalar(<3 x i32> inreg %a, i32 inreg %b) {3195; SI-LABEL: bitcast_v3i32_to_v6i16_scalar:3196; SI: ; %bb.0:3197; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3198; SI-NEXT: s_cmp_lg_u32 s19, 03199; SI-NEXT: s_cbranch_scc0 .LBB17_43200; SI-NEXT: ; %bb.1: ; %cmp.false3201; SI-NEXT: s_lshr_b32 s10, s17, 163202; SI-NEXT: s_lshr_b64 s[4:5], s[18:19], 163203; SI-NEXT: s_lshr_b64 s[6:7], s[16:17], 163204; SI-NEXT: s_cbranch_execnz .LBB17_33205; SI-NEXT: .LBB17_2: ; %cmp.true3206; SI-NEXT: s_add_i32 s18, s18, 33207; SI-NEXT: s_add_i32 s17, s17, 33208; SI-NEXT: s_add_i32 s16, s16, 33209; SI-NEXT: s_lshr_b64 s[6:7], s[16:17], 163210; SI-NEXT: s_lshr_b32 s10, s17, 163211; SI-NEXT: s_lshr_b64 s[4:5], s[18:19], 163212; SI-NEXT: .LBB17_3: ; %end3213; SI-NEXT: v_mov_b32_e32 v0, s163214; SI-NEXT: v_mov_b32_e32 v1, s63215; SI-NEXT: v_mov_b32_e32 v2, s173216; SI-NEXT: v_mov_b32_e32 v3, s103217; SI-NEXT: v_mov_b32_e32 v4, s183218; SI-NEXT: v_mov_b32_e32 v5, s43219; SI-NEXT: s_setpc_b64 s[30:31]3220; SI-NEXT: .LBB17_4:3221; SI-NEXT: ; implicit-def: $sgpr63222; SI-NEXT: ; implicit-def: $sgpr103223; SI-NEXT: ; implicit-def: $sgpr43224; SI-NEXT: s_branch .LBB17_23225;3226; VI-LABEL: bitcast_v3i32_to_v6i16_scalar:3227; VI: ; %bb.0:3228; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3229; VI-NEXT: s_cmp_lg_u32 s19, 03230; VI-NEXT: s_cbranch_scc0 .LBB17_43231; VI-NEXT: ; %bb.1: ; %cmp.false3232; VI-NEXT: s_cbranch_execnz .LBB17_33233; VI-NEXT: .LBB17_2: ; %cmp.true3234; VI-NEXT: s_add_i32 s18, s18, 33235; VI-NEXT: s_add_i32 s17, s17, 33236; VI-NEXT: s_add_i32 s16, s16, 33237; VI-NEXT: .LBB17_3: ; %end3238; VI-NEXT: v_mov_b32_e32 v0, s163239; VI-NEXT: v_mov_b32_e32 v1, s173240; VI-NEXT: v_mov_b32_e32 v2, s183241; VI-NEXT: s_setpc_b64 s[30:31]3242; VI-NEXT: .LBB17_4:3243; VI-NEXT: s_branch .LBB17_23244;3245; GFX9-LABEL: bitcast_v3i32_to_v6i16_scalar:3246; GFX9: ; %bb.0:3247; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3248; GFX9-NEXT: s_cmp_lg_u32 s19, 03249; GFX9-NEXT: s_cbranch_scc0 .LBB17_43250; GFX9-NEXT: ; %bb.1: ; %cmp.false3251; GFX9-NEXT: s_cbranch_execnz .LBB17_33252; GFX9-NEXT: .LBB17_2: ; %cmp.true3253; GFX9-NEXT: s_add_i32 s18, s18, 33254; GFX9-NEXT: s_add_i32 s17, s17, 33255; GFX9-NEXT: s_add_i32 s16, s16, 33256; GFX9-NEXT: .LBB17_3: ; %end3257; GFX9-NEXT: v_mov_b32_e32 v0, s163258; GFX9-NEXT: v_mov_b32_e32 v1, s173259; GFX9-NEXT: v_mov_b32_e32 v2, s183260; GFX9-NEXT: s_setpc_b64 s[30:31]3261; GFX9-NEXT: .LBB17_4:3262; GFX9-NEXT: s_branch .LBB17_23263;3264; GFX11-LABEL: bitcast_v3i32_to_v6i16_scalar:3265; GFX11: ; %bb.0:3266; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3267; GFX11-NEXT: s_cmp_lg_u32 s3, 03268; GFX11-NEXT: s_mov_b32 s3, 03269; GFX11-NEXT: s_cbranch_scc0 .LBB17_43270; GFX11-NEXT: ; %bb.1: ; %Flow3271; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s33272; GFX11-NEXT: s_cbranch_vccnz .LBB17_33273; GFX11-NEXT: .LBB17_2: ; %cmp.true3274; GFX11-NEXT: s_add_i32 s2, s2, 33275; GFX11-NEXT: s_add_i32 s1, s1, 33276; GFX11-NEXT: s_add_i32 s0, s0, 33277; GFX11-NEXT: .LBB17_3: ; %end3278; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3279; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s13280; GFX11-NEXT: v_mov_b32_e32 v2, s23281; GFX11-NEXT: s_setpc_b64 s[30:31]3282; GFX11-NEXT: .LBB17_4:3283; GFX11-NEXT: s_branch .LBB17_23284 %cmp = icmp eq i32 %b, 03285 br i1 %cmp, label %cmp.true, label %cmp.false3286 3287cmp.true:3288 %a1 = add <3 x i32> %a, splat (i32 3)3289 %a2 = bitcast <3 x i32> %a1 to <6 x i16>3290 br label %end3291 3292cmp.false:3293 %a3 = bitcast <3 x i32> %a to <6 x i16>3294 br label %end3295 3296end:3297 %phi = phi <6 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]3298 ret <6 x i16> %phi3299}3300 3301define <3 x i32> @bitcast_v6i16_to_v3i32(<6 x i16> %a, i32 %b) {3302; SI-LABEL: bitcast_v6i16_to_v3i32:3303; SI: ; %bb.0:3304; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3305; SI-NEXT: v_mov_b32_e32 v8, v23306; SI-NEXT: v_mov_b32_e32 v7, v03307; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v63308; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v13309; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v33310; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v53311; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr23312; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc3313; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3314; SI-NEXT: s_cbranch_execnz .LBB18_33315; SI-NEXT: ; %bb.1: ; %Flow3316; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3317; SI-NEXT: s_cbranch_execnz .LBB18_43318; SI-NEXT: .LBB18_2: ; %end3319; SI-NEXT: s_or_b64 exec, exec, s[4:5]3320; SI-NEXT: s_setpc_b64 s[30:31]3321; SI-NEXT: .LBB18_3: ; %cmp.false3322; SI-NEXT: v_and_b32_e32 v0, 0xffff, v73323; SI-NEXT: v_and_b32_e32 v1, 0xffff, v83324; SI-NEXT: v_and_b32_e32 v2, 0xffff, v43325; SI-NEXT: v_or_b32_e32 v0, v0, v93326; SI-NEXT: v_or_b32_e32 v1, v1, v63327; SI-NEXT: v_or_b32_e32 v2, v2, v33328; SI-NEXT: ; implicit-def: $vgpr73329; SI-NEXT: ; implicit-def: $vgpr93330; SI-NEXT: ; implicit-def: $vgpr83331; SI-NEXT: ; implicit-def: $vgpr63332; SI-NEXT: ; implicit-def: $vgpr43333; SI-NEXT: ; implicit-def: $vgpr33334; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3335; SI-NEXT: s_cbranch_execz .LBB18_23336; SI-NEXT: .LBB18_4: ; %cmp.true3337; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v73338; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v83339; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v43340; SI-NEXT: v_and_b32_e32 v0, 0xffff, v03341; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13342; SI-NEXT: v_and_b32_e32 v2, 0xffff, v23343; SI-NEXT: v_or_b32_e32 v0, v9, v03344; SI-NEXT: v_or_b32_e32 v1, v6, v13345; SI-NEXT: v_or_b32_e32 v2, v3, v23346; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v03347; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v13348; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v23349; SI-NEXT: s_or_b64 exec, exec, s[4:5]3350; SI-NEXT: s_setpc_b64 s[30:31]3351;3352; VI-LABEL: bitcast_v6i16_to_v3i32:3353; VI: ; %bb.0:3354; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3355; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33356; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc3357; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3358; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3359; VI-NEXT: s_cbranch_execz .LBB18_23360; VI-NEXT: ; %bb.1: ; %cmp.true3361; VI-NEXT: v_mov_b32_e32 v4, 33362; VI-NEXT: v_add_u16_e32 v3, 3, v23363; VI-NEXT: v_add_u16_sdwa v2, v2, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3364; VI-NEXT: v_or_b32_e32 v2, v3, v23365; VI-NEXT: v_add_u16_e32 v3, 3, v13366; VI-NEXT: v_add_u16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3367; VI-NEXT: v_or_b32_e32 v1, v3, v13368; VI-NEXT: v_add_u16_e32 v3, 3, v03369; VI-NEXT: v_add_u16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3370; VI-NEXT: v_or_b32_e32 v0, v3, v03371; VI-NEXT: .LBB18_2: ; %end3372; VI-NEXT: s_or_b64 exec, exec, s[4:5]3373; VI-NEXT: s_setpc_b64 s[30:31]3374;3375; GFX9-LABEL: bitcast_v6i16_to_v3i32:3376; GFX9: ; %bb.0:3377; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3378; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33379; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc3380; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3381; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3382; GFX9-NEXT: ; %bb.1: ; %cmp.true3383; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]3384; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]3385; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]3386; GFX9-NEXT: ; %bb.2: ; %end3387; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]3388; GFX9-NEXT: s_setpc_b64 s[30:31]3389;3390; GFX11-LABEL: bitcast_v6i16_to_v3i32:3391; GFX11: ; %bb.0:3392; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3393; GFX11-NEXT: s_mov_b32 s0, exec_lo3394; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v33395; GFX11-NEXT: s_xor_b32 s0, exec_lo, s03396; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3397; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s03398; GFX11-NEXT: ; %bb.1: ; %cmp.true3399; GFX11-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]3400; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]3401; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]3402; GFX11-NEXT: ; %bb.2: ; %end3403; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s03404; GFX11-NEXT: s_setpc_b64 s[30:31]3405 %cmp = icmp eq i32 %b, 03406 br i1 %cmp, label %cmp.true, label %cmp.false3407 3408cmp.true:3409 %a1 = add <6 x i16> %a, splat (i16 3)3410 %a2 = bitcast <6 x i16> %a1 to <3 x i32>3411 br label %end3412 3413cmp.false:3414 %a3 = bitcast <6 x i16> %a to <3 x i32>3415 br label %end3416 3417end:3418 %phi = phi <3 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]3419 ret <3 x i32> %phi3420}3421 3422define inreg <3 x i32> @bitcast_v6i16_to_v3i32_scalar(<6 x i16> inreg %a, i32 inreg %b) {3423; SI-LABEL: bitcast_v6i16_to_v3i32_scalar:3424; SI: ; %bb.0:3425; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3426; SI-NEXT: s_cmp_lg_u32 s22, 03427; SI-NEXT: s_cbranch_scc0 .LBB19_43428; SI-NEXT: ; %bb.1: ; %cmp.false3429; SI-NEXT: s_and_b32 s4, s16, 0xffff3430; SI-NEXT: s_lshl_b32 s5, s17, 163431; SI-NEXT: s_or_b32 s4, s4, s53432; SI-NEXT: s_and_b32 s5, s18, 0xffff3433; SI-NEXT: s_lshl_b32 s6, s19, 163434; SI-NEXT: s_or_b32 s5, s5, s63435; SI-NEXT: s_and_b32 s6, s20, 0xffff3436; SI-NEXT: s_lshl_b32 s7, s21, 163437; SI-NEXT: s_or_b32 s6, s6, s73438; SI-NEXT: s_cbranch_execnz .LBB19_33439; SI-NEXT: .LBB19_2: ; %cmp.true3440; SI-NEXT: s_add_i32 s16, s16, 33441; SI-NEXT: s_and_b32 s4, s16, 0xffff3442; SI-NEXT: s_lshl_b32 s5, s17, 163443; SI-NEXT: s_add_i32 s18, s18, 33444; SI-NEXT: s_or_b32 s4, s5, s43445; SI-NEXT: s_and_b32 s5, s18, 0xffff3446; SI-NEXT: s_lshl_b32 s6, s19, 163447; SI-NEXT: s_add_i32 s20, s20, 33448; SI-NEXT: s_or_b32 s5, s6, s53449; SI-NEXT: s_and_b32 s6, s20, 0xffff3450; SI-NEXT: s_lshl_b32 s7, s21, 163451; SI-NEXT: s_or_b32 s6, s7, s63452; SI-NEXT: s_add_i32 s4, s4, 0x300003453; SI-NEXT: s_add_i32 s5, s5, 0x300003454; SI-NEXT: s_add_i32 s6, s6, 0x300003455; SI-NEXT: .LBB19_3: ; %end3456; SI-NEXT: v_mov_b32_e32 v0, s43457; SI-NEXT: v_mov_b32_e32 v1, s53458; SI-NEXT: v_mov_b32_e32 v2, s63459; SI-NEXT: s_setpc_b64 s[30:31]3460; SI-NEXT: .LBB19_4:3461; SI-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr63462; SI-NEXT: s_branch .LBB19_23463;3464; VI-LABEL: bitcast_v6i16_to_v3i32_scalar:3465; VI: ; %bb.0:3466; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3467; VI-NEXT: s_cmp_lg_u32 s19, 03468; VI-NEXT: s_cbranch_scc0 .LBB19_43469; VI-NEXT: ; %bb.1: ; %cmp.false3470; VI-NEXT: s_cbranch_execnz .LBB19_33471; VI-NEXT: .LBB19_2: ; %cmp.true3472; VI-NEXT: s_add_i32 s5, s18, 33473; VI-NEXT: s_and_b32 s4, s18, 0xffff00003474; VI-NEXT: s_and_b32 s5, s5, 0xffff3475; VI-NEXT: s_or_b32 s4, s4, s53476; VI-NEXT: s_add_i32 s5, s17, 33477; VI-NEXT: s_add_i32 s18, s4, 0x300003478; VI-NEXT: s_and_b32 s4, s17, 0xffff00003479; VI-NEXT: s_and_b32 s5, s5, 0xffff3480; VI-NEXT: s_or_b32 s4, s4, s53481; VI-NEXT: s_add_i32 s5, s16, 33482; VI-NEXT: s_add_i32 s17, s4, 0x300003483; VI-NEXT: s_and_b32 s4, s16, 0xffff00003484; VI-NEXT: s_and_b32 s5, s5, 0xffff3485; VI-NEXT: s_or_b32 s4, s4, s53486; VI-NEXT: s_add_i32 s16, s4, 0x300003487; VI-NEXT: .LBB19_3: ; %end3488; VI-NEXT: v_mov_b32_e32 v0, s163489; VI-NEXT: v_mov_b32_e32 v1, s173490; VI-NEXT: v_mov_b32_e32 v2, s183491; VI-NEXT: s_setpc_b64 s[30:31]3492; VI-NEXT: .LBB19_4:3493; VI-NEXT: s_branch .LBB19_23494;3495; GFX9-LABEL: bitcast_v6i16_to_v3i32_scalar:3496; GFX9: ; %bb.0:3497; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3498; GFX9-NEXT: s_cmp_lg_u32 s19, 03499; GFX9-NEXT: s_cbranch_scc0 .LBB19_33500; GFX9-NEXT: ; %bb.1: ; %cmp.false3501; GFX9-NEXT: s_cbranch_execnz .LBB19_43502; GFX9-NEXT: .LBB19_2: ; %cmp.true3503; GFX9-NEXT: v_pk_add_u16 v2, s18, 3 op_sel_hi:[1,0]3504; GFX9-NEXT: v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]3505; GFX9-NEXT: v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]3506; GFX9-NEXT: s_setpc_b64 s[30:31]3507; GFX9-NEXT: .LBB19_3:3508; GFX9-NEXT: s_branch .LBB19_23509; GFX9-NEXT: .LBB19_4:3510; GFX9-NEXT: v_mov_b32_e32 v0, s163511; GFX9-NEXT: v_mov_b32_e32 v1, s173512; GFX9-NEXT: v_mov_b32_e32 v2, s183513; GFX9-NEXT: s_setpc_b64 s[30:31]3514;3515; GFX11-LABEL: bitcast_v6i16_to_v3i32_scalar:3516; GFX11: ; %bb.0:3517; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3518; GFX11-NEXT: s_cmp_lg_u32 s3, 03519; GFX11-NEXT: s_mov_b32 s3, 03520; GFX11-NEXT: s_cbranch_scc0 .LBB19_33521; GFX11-NEXT: ; %bb.1: ; %Flow3522; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s33523; GFX11-NEXT: s_cbranch_vccnz .LBB19_43524; GFX11-NEXT: .LBB19_2: ; %cmp.true3525; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]3526; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]3527; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]3528; GFX11-NEXT: s_setpc_b64 s[30:31]3529; GFX11-NEXT: .LBB19_3:3530; GFX11-NEXT: s_branch .LBB19_23531; GFX11-NEXT: .LBB19_4:3532; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s13533; GFX11-NEXT: v_mov_b32_e32 v2, s23534; GFX11-NEXT: s_setpc_b64 s[30:31]3535 %cmp = icmp eq i32 %b, 03536 br i1 %cmp, label %cmp.true, label %cmp.false3537 3538cmp.true:3539 %a1 = add <6 x i16> %a, splat (i16 3)3540 %a2 = bitcast <6 x i16> %a1 to <3 x i32>3541 br label %end3542 3543cmp.false:3544 %a3 = bitcast <6 x i16> %a to <3 x i32>3545 br label %end3546 3547end:3548 %phi = phi <3 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]3549 ret <3 x i32> %phi3550}3551 3552define <12 x i8> @bitcast_v3f32_to_v12i8(<3 x float> %a, i32 %b) {3553; SI-LABEL: bitcast_v3f32_to_v12i8:3554; SI: ; %bb.0:3555; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3556; SI-NEXT: v_mov_b32_e32 v8, v23557; SI-NEXT: v_mov_b32_e32 v4, v13558; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33559; SI-NEXT: ; implicit-def: $vgpr13560; SI-NEXT: ; implicit-def: $vgpr23561; SI-NEXT: ; implicit-def: $vgpr33562; SI-NEXT: ; implicit-def: $vgpr53563; SI-NEXT: ; implicit-def: $vgpr63564; SI-NEXT: ; implicit-def: $vgpr73565; SI-NEXT: ; implicit-def: $vgpr93566; SI-NEXT: ; implicit-def: $vgpr103567; SI-NEXT: ; implicit-def: $vgpr113568; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc3569; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3570; SI-NEXT: s_cbranch_execnz .LBB20_33571; SI-NEXT: ; %bb.1: ; %Flow3572; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3573; SI-NEXT: s_cbranch_execnz .LBB20_43574; SI-NEXT: .LBB20_2: ; %end3575; SI-NEXT: s_or_b64 exec, exec, s[4:5]3576; SI-NEXT: s_setpc_b64 s[30:31]3577; SI-NEXT: .LBB20_3: ; %cmp.false3578; SI-NEXT: v_alignbit_b32 v11, v0, v8, 243579; SI-NEXT: v_alignbit_b32 v10, v0, v8, 163580; SI-NEXT: v_alignbit_b32 v9, v0, v8, 83581; SI-NEXT: v_alignbit_b32 v3, v4, v0, 243582; SI-NEXT: v_alignbit_b32 v2, v4, v0, 163583; SI-NEXT: v_alignbit_b32 v1, v4, v0, 83584; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v43585; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v43586; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v43587; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3588; SI-NEXT: s_cbranch_execz .LBB20_23589; SI-NEXT: .LBB20_4: ; %cmp.true3590; SI-NEXT: v_add_f32_e32 v8, 1.0, v83591; SI-NEXT: v_add_f32_e32 v4, 1.0, v43592; SI-NEXT: v_add_f32_e32 v0, 1.0, v03593; SI-NEXT: v_alignbit_b32 v3, v4, v0, 243594; SI-NEXT: v_alignbit_b32 v2, v4, v0, 163595; SI-NEXT: v_alignbit_b32 v1, v4, v0, 83596; SI-NEXT: v_alignbit_b32 v11, v0, v8, 243597; SI-NEXT: v_alignbit_b32 v10, v0, v8, 163598; SI-NEXT: v_alignbit_b32 v9, v0, v8, 83599; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v43600; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v43601; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v43602; SI-NEXT: s_or_b64 exec, exec, s[4:5]3603; SI-NEXT: s_setpc_b64 s[30:31]3604;3605; VI-LABEL: bitcast_v3f32_to_v12i8:3606; VI: ; %bb.0:3607; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3608; VI-NEXT: v_mov_b32_e32 v8, v23609; VI-NEXT: v_mov_b32_e32 v14, v13610; VI-NEXT: v_mov_b32_e32 v13, v03611; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33612; VI-NEXT: ; implicit-def: $vgpr13613; VI-NEXT: ; implicit-def: $vgpr23614; VI-NEXT: ; implicit-def: $vgpr33615; VI-NEXT: ; implicit-def: $vgpr53616; VI-NEXT: ; implicit-def: $vgpr63617; VI-NEXT: ; implicit-def: $vgpr73618; VI-NEXT: ; implicit-def: $vgpr93619; VI-NEXT: ; implicit-def: $vgpr103620; VI-NEXT: ; implicit-def: $vgpr113621; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc3622; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3623; VI-NEXT: s_cbranch_execz .LBB20_23624; VI-NEXT: ; %bb.1: ; %cmp.false3625; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v83626; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v83627; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v143628; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v143629; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v143630; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v133631; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]3632; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]3633; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v133634; VI-NEXT: .LBB20_2: ; %Flow3635; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3636; VI-NEXT: s_cbranch_execz .LBB20_43637; VI-NEXT: ; %bb.3: ; %cmp.true3638; VI-NEXT: v_add_f32_e32 v8, 1.0, v83639; VI-NEXT: v_add_f32_e32 v14, 1.0, v143640; VI-NEXT: v_add_f32_e32 v13, 1.0, v133641; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v83642; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]3643; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]3644; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v83645; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v143646; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v143647; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v143648; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v133649; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v133650; VI-NEXT: .LBB20_4: ; %end3651; VI-NEXT: s_or_b64 exec, exec, s[4:5]3652; VI-NEXT: v_mov_b32_e32 v0, v133653; VI-NEXT: v_mov_b32_e32 v4, v143654; VI-NEXT: s_setpc_b64 s[30:31]3655;3656; GFX9-LABEL: bitcast_v3f32_to_v12i8:3657; GFX9: ; %bb.0:3658; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3659; GFX9-NEXT: v_mov_b32_e32 v8, v23660; GFX9-NEXT: v_mov_b32_e32 v14, v13661; GFX9-NEXT: v_mov_b32_e32 v13, v03662; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33663; GFX9-NEXT: ; implicit-def: $vgpr13664; GFX9-NEXT: ; implicit-def: $vgpr23665; GFX9-NEXT: ; implicit-def: $vgpr33666; GFX9-NEXT: ; implicit-def: $vgpr53667; GFX9-NEXT: ; implicit-def: $vgpr63668; GFX9-NEXT: ; implicit-def: $vgpr73669; GFX9-NEXT: ; implicit-def: $vgpr93670; GFX9-NEXT: ; implicit-def: $vgpr103671; GFX9-NEXT: ; implicit-def: $vgpr113672; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc3673; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]3674; GFX9-NEXT: s_cbranch_execz .LBB20_23675; GFX9-NEXT: ; %bb.1: ; %cmp.false3676; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v83677; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v83678; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v143679; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v143680; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v143681; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v133682; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]3683; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]3684; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v133685; GFX9-NEXT: .LBB20_2: ; %Flow3686; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]3687; GFX9-NEXT: s_cbranch_execz .LBB20_43688; GFX9-NEXT: ; %bb.3: ; %cmp.true3689; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v83690; GFX9-NEXT: v_add_f32_e32 v14, 1.0, v143691; GFX9-NEXT: v_add_f32_e32 v13, 1.0, v133692; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v83693; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]3694; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]3695; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v83696; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v143697; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v143698; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v143699; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v133700; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v133701; GFX9-NEXT: .LBB20_4: ; %end3702; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]3703; GFX9-NEXT: v_mov_b32_e32 v0, v133704; GFX9-NEXT: v_mov_b32_e32 v4, v143705; GFX9-NEXT: s_setpc_b64 s[30:31]3706;3707; GFX11-TRUE16-LABEL: bitcast_v3f32_to_v12i8:3708; GFX11-TRUE16: ; %bb.0:3709; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3710; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v11, v03711; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, v13712; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v33713; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo163714; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo163715; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo163716; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo163717; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo163718; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo163719; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo3720; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3721; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s03722; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false3723; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v103724; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v123725; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v123726; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[10:11]3727; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[11:12]3728; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v113729; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow3730; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s03731; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB20_43732; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true3733; GFX11-TRUE16-NEXT: v_dual_add_f32 v12, 1.0, v12 :: v_dual_add_f32 v11, 1.0, v113734; GFX11-TRUE16-NEXT: v_add_f32_e32 v10, 1.0, v103735; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)3736; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v123737; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[11:12]3738; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)3739; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[10:11]3740; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v103741; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v123742; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v113743; GFX11-TRUE16-NEXT: .LBB20_4: ; %end3744; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s03745; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v11.l3746; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v11.h3747; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v12.l3748; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v12.h3749; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v10.l3750; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v10.h3751; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v13.l3752; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]3753;3754; GFX11-FAKE16-LABEL: bitcast_v3f32_to_v12i8:3755; GFX11-FAKE16: ; %bb.0:3756; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3757; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, v2 :: v_dual_mov_b32 v13, v03758; GFX11-FAKE16-NEXT: v_mov_b32_e32 v14, v13759; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v33760; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr13761; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr23762; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr33763; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53764; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63765; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73766; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr93767; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr103768; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr113769; GFX11-FAKE16-NEXT: s_and_saveexec_b32 s0, vcc_lo3770; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3771; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s03772; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB20_23773; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false3774; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v83775; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v83776; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v143777; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v143778; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v143779; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v133780; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]3781; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]3782; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v133783; GFX11-FAKE16-NEXT: .LBB20_2: ; %Flow3784; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s03785; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB20_43786; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true3787; GFX11-FAKE16-NEXT: v_add_f32_e32 v8, 1.0, v83788; GFX11-FAKE16-NEXT: v_dual_add_f32 v14, 1.0, v14 :: v_dual_add_f32 v13, 1.0, v133789; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)3790; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v83791; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v83792; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]3793; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v143794; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v143795; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]3796; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v143797; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v133798; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v133799; GFX11-FAKE16-NEXT: .LBB20_4: ; %end3800; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s03801; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v133802; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v143803; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]3804 %cmp = icmp eq i32 %b, 03805 br i1 %cmp, label %cmp.true, label %cmp.false3806 3807cmp.true:3808 %a1 = fadd <3 x float> %a, splat (float 1.000000e+00)3809 %a2 = bitcast <3 x float> %a1 to <12 x i8>3810 br label %end3811 3812cmp.false:3813 %a3 = bitcast <3 x float> %a to <12 x i8>3814 br label %end3815 3816end:3817 %phi = phi <12 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]3818 ret <12 x i8> %phi3819}3820 3821define inreg <12 x i8> @bitcast_v3f32_to_v12i8_scalar(<3 x float> inreg %a, i32 inreg %b) {3822; SI-LABEL: bitcast_v3f32_to_v12i8_scalar:3823; SI: ; %bb.0:3824; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3825; SI-NEXT: s_cmp_lg_u32 s19, 03826; SI-NEXT: s_cbranch_scc0 .LBB21_33827; SI-NEXT: ; %bb.1: ; %cmp.false3828; SI-NEXT: s_lshr_b32 s19, s17, 243829; SI-NEXT: s_lshr_b32 s22, s17, 163830; SI-NEXT: s_lshr_b32 s23, s17, 83831; SI-NEXT: s_lshr_b64 s[10:11], s[18:19], 243832; SI-NEXT: s_lshr_b64 s[12:13], s[18:19], 163833; SI-NEXT: s_lshr_b64 s[14:15], s[18:19], 83834; SI-NEXT: s_lshr_b64 s[4:5], s[16:17], 243835; SI-NEXT: s_lshr_b64 s[6:7], s[16:17], 163836; SI-NEXT: s_lshr_b64 s[8:9], s[16:17], 83837; SI-NEXT: s_cbranch_execnz .LBB21_43838; SI-NEXT: .LBB21_2: ; %cmp.true3839; SI-NEXT: v_add_f32_e64 v8, s18, 1.03840; SI-NEXT: v_add_f32_e64 v17, s17, 1.03841; SI-NEXT: v_add_f32_e64 v16, s16, 1.03842; SI-NEXT: v_lshr_b64 v[11:12], v[8:9], 243843; SI-NEXT: v_lshr_b64 v[3:4], v[16:17], 243844; SI-NEXT: v_lshr_b64 v[14:15], v[16:17], 163845; SI-NEXT: v_lshr_b64 v[1:2], v[16:17], 83846; SI-NEXT: v_lshr_b64 v[12:13], v[8:9], 163847; SI-NEXT: v_lshr_b64 v[9:10], v[8:9], 83848; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v173849; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v173850; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v173851; SI-NEXT: s_branch .LBB21_53852; SI-NEXT: .LBB21_3:3853; SI-NEXT: ; implicit-def: $sgpr83854; SI-NEXT: ; implicit-def: $sgpr63855; SI-NEXT: ; implicit-def: $sgpr43856; SI-NEXT: ; implicit-def: $sgpr233857; SI-NEXT: ; implicit-def: $sgpr223858; SI-NEXT: ; implicit-def: $sgpr193859; SI-NEXT: ; implicit-def: $sgpr143860; SI-NEXT: ; implicit-def: $sgpr123861; SI-NEXT: ; implicit-def: $sgpr103862; SI-NEXT: s_branch .LBB21_23863; SI-NEXT: .LBB21_4:3864; SI-NEXT: v_mov_b32_e32 v16, s163865; SI-NEXT: v_mov_b32_e32 v17, s173866; SI-NEXT: v_mov_b32_e32 v8, s183867; SI-NEXT: v_mov_b32_e32 v5, s233868; SI-NEXT: v_mov_b32_e32 v6, s223869; SI-NEXT: v_mov_b32_e32 v7, s193870; SI-NEXT: v_mov_b32_e32 v11, s103871; SI-NEXT: v_mov_b32_e32 v12, s123872; SI-NEXT: v_mov_b32_e32 v9, s143873; SI-NEXT: v_mov_b32_e32 v3, s43874; SI-NEXT: v_mov_b32_e32 v14, s63875; SI-NEXT: v_mov_b32_e32 v1, s83876; SI-NEXT: .LBB21_5: ; %end3877; SI-NEXT: v_mov_b32_e32 v0, v163878; SI-NEXT: v_mov_b32_e32 v2, v143879; SI-NEXT: v_mov_b32_e32 v4, v173880; SI-NEXT: v_mov_b32_e32 v10, v123881; SI-NEXT: s_setpc_b64 s[30:31]3882;3883; VI-LABEL: bitcast_v3f32_to_v12i8_scalar:3884; VI: ; %bb.0:3885; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3886; VI-NEXT: s_cmp_lg_u32 s19, 03887; VI-NEXT: s_cbranch_scc0 .LBB21_33888; VI-NEXT: ; %bb.1: ; %cmp.false3889; VI-NEXT: s_lshr_b32 s19, s16, 83890; VI-NEXT: s_lshr_b32 s10, s18, 163891; VI-NEXT: s_lshr_b32 s11, s18, 83892; VI-NEXT: s_lshr_b32 s12, s17, 243893; VI-NEXT: s_lshr_b32 s13, s17, 163894; VI-NEXT: s_lshr_b32 s15, s17, 83895; VI-NEXT: s_lshr_b32 s14, s16, 163896; VI-NEXT: s_lshr_b64 s[6:7], s[18:19], 243897; VI-NEXT: s_lshr_b64 s[4:5], s[16:17], 243898; VI-NEXT: s_cbranch_execnz .LBB21_43899; VI-NEXT: .LBB21_2: ; %cmp.true3900; VI-NEXT: v_add_f32_e64 v8, s18, 1.03901; VI-NEXT: v_add_f32_e64 v14, s17, 1.03902; VI-NEXT: v_add_f32_e64 v13, s16, 1.03903; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v83904; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]3905; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]3906; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v83907; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v143908; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v143909; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v143910; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v133911; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v133912; VI-NEXT: s_branch .LBB21_53913; VI-NEXT: .LBB21_3:3914; VI-NEXT: ; implicit-def: $sgpr193915; VI-NEXT: ; implicit-def: $sgpr143916; VI-NEXT: ; implicit-def: $sgpr43917; VI-NEXT: ; implicit-def: $sgpr153918; VI-NEXT: ; implicit-def: $sgpr133919; VI-NEXT: ; implicit-def: $sgpr123920; VI-NEXT: ; implicit-def: $sgpr113921; VI-NEXT: ; implicit-def: $sgpr103922; VI-NEXT: ; implicit-def: $sgpr63923; VI-NEXT: s_branch .LBB21_23924; VI-NEXT: .LBB21_4:3925; VI-NEXT: v_mov_b32_e32 v13, s163926; VI-NEXT: v_mov_b32_e32 v14, s173927; VI-NEXT: v_mov_b32_e32 v8, s183928; VI-NEXT: v_mov_b32_e32 v1, s193929; VI-NEXT: v_mov_b32_e32 v2, s143930; VI-NEXT: v_mov_b32_e32 v5, s153931; VI-NEXT: v_mov_b32_e32 v6, s133932; VI-NEXT: v_mov_b32_e32 v7, s123933; VI-NEXT: v_mov_b32_e32 v9, s113934; VI-NEXT: v_mov_b32_e32 v10, s103935; VI-NEXT: v_mov_b32_e32 v11, s63936; VI-NEXT: v_mov_b32_e32 v3, s43937; VI-NEXT: .LBB21_5: ; %end3938; VI-NEXT: v_mov_b32_e32 v0, v133939; VI-NEXT: v_mov_b32_e32 v4, v143940; VI-NEXT: s_setpc_b64 s[30:31]3941;3942; GFX9-LABEL: bitcast_v3f32_to_v12i8_scalar:3943; GFX9: ; %bb.0:3944; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3945; GFX9-NEXT: s_cmp_lg_u32 s19, 03946; GFX9-NEXT: s_cbranch_scc0 .LBB21_33947; GFX9-NEXT: ; %bb.1: ; %cmp.false3948; GFX9-NEXT: s_lshr_b32 s19, s16, 83949; GFX9-NEXT: s_lshr_b32 s10, s18, 163950; GFX9-NEXT: s_lshr_b32 s11, s18, 83951; GFX9-NEXT: s_lshr_b32 s12, s17, 243952; GFX9-NEXT: s_lshr_b32 s13, s17, 163953; GFX9-NEXT: s_lshr_b32 s15, s17, 83954; GFX9-NEXT: s_lshr_b32 s14, s16, 163955; GFX9-NEXT: s_lshr_b64 s[6:7], s[18:19], 243956; GFX9-NEXT: s_lshr_b64 s[4:5], s[16:17], 243957; GFX9-NEXT: s_cbranch_execnz .LBB21_43958; GFX9-NEXT: .LBB21_2: ; %cmp.true3959; GFX9-NEXT: v_add_f32_e64 v8, s18, 1.03960; GFX9-NEXT: v_add_f32_e64 v14, s17, 1.03961; GFX9-NEXT: v_add_f32_e64 v13, s16, 1.03962; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v83963; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]3964; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]3965; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v83966; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v143967; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v143968; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v143969; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v133970; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v133971; GFX9-NEXT: s_branch .LBB21_53972; GFX9-NEXT: .LBB21_3:3973; GFX9-NEXT: ; implicit-def: $sgpr193974; GFX9-NEXT: ; implicit-def: $sgpr143975; GFX9-NEXT: ; implicit-def: $sgpr43976; GFX9-NEXT: ; implicit-def: $sgpr153977; GFX9-NEXT: ; implicit-def: $sgpr133978; GFX9-NEXT: ; implicit-def: $sgpr123979; GFX9-NEXT: ; implicit-def: $sgpr113980; GFX9-NEXT: ; implicit-def: $sgpr103981; GFX9-NEXT: ; implicit-def: $sgpr63982; GFX9-NEXT: s_branch .LBB21_23983; GFX9-NEXT: .LBB21_4:3984; GFX9-NEXT: v_mov_b32_e32 v13, s163985; GFX9-NEXT: v_mov_b32_e32 v14, s173986; GFX9-NEXT: v_mov_b32_e32 v8, s183987; GFX9-NEXT: v_mov_b32_e32 v1, s193988; GFX9-NEXT: v_mov_b32_e32 v2, s143989; GFX9-NEXT: v_mov_b32_e32 v5, s153990; GFX9-NEXT: v_mov_b32_e32 v6, s133991; GFX9-NEXT: v_mov_b32_e32 v7, s123992; GFX9-NEXT: v_mov_b32_e32 v9, s113993; GFX9-NEXT: v_mov_b32_e32 v10, s103994; GFX9-NEXT: v_mov_b32_e32 v11, s63995; GFX9-NEXT: v_mov_b32_e32 v3, s43996; GFX9-NEXT: .LBB21_5: ; %end3997; GFX9-NEXT: v_mov_b32_e32 v0, v133998; GFX9-NEXT: v_mov_b32_e32 v4, v143999; GFX9-NEXT: s_setpc_b64 s[30:31]4000;4001; GFX11-LABEL: bitcast_v3f32_to_v12i8_scalar:4002; GFX11: ; %bb.0:4003; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4004; GFX11-NEXT: s_cmp_lg_u32 s3, 04005; GFX11-NEXT: s_mov_b32 s3, 04006; GFX11-NEXT: s_cbranch_scc0 .LBB21_34007; GFX11-NEXT: ; %bb.1: ; %cmp.false4008; GFX11-NEXT: s_lshr_b32 s8, s2, 164009; GFX11-NEXT: s_lshr_b32 s9, s2, 84010; GFX11-NEXT: s_lshr_b32 s10, s1, 244011; GFX11-NEXT: s_lshr_b32 s11, s1, 164012; GFX11-NEXT: s_lshr_b32 s13, s1, 84013; GFX11-NEXT: s_lshr_b32 s12, s0, 164014; GFX11-NEXT: s_lshr_b32 s14, s0, 84015; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 244016; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 244017; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s34018; GFX11-NEXT: s_cbranch_vccnz .LBB21_44019; GFX11-NEXT: .LBB21_2: ; %cmp.true4020; GFX11-NEXT: v_add_f32_e64 v8, s2, 1.04021; GFX11-NEXT: v_add_f32_e64 v14, s1, 1.04022; GFX11-NEXT: v_add_f32_e64 v13, s0, 1.04023; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)4024; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v84025; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v84026; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]4027; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v144028; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v144029; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]4030; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v144031; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v134032; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v134033; GFX11-NEXT: s_branch .LBB21_54034; GFX11-NEXT: .LBB21_3:4035; GFX11-NEXT: ; implicit-def: $sgpr144036; GFX11-NEXT: ; implicit-def: $sgpr124037; GFX11-NEXT: ; implicit-def: $sgpr44038; GFX11-NEXT: ; implicit-def: $sgpr134039; GFX11-NEXT: ; implicit-def: $sgpr114040; GFX11-NEXT: ; implicit-def: $sgpr104041; GFX11-NEXT: ; implicit-def: $sgpr94042; GFX11-NEXT: ; implicit-def: $sgpr84043; GFX11-NEXT: ; implicit-def: $sgpr64044; GFX11-NEXT: s_branch .LBB21_24045; GFX11-NEXT: .LBB21_4:4046; GFX11-NEXT: v_dual_mov_b32 v13, s0 :: v_dual_mov_b32 v14, s14047; GFX11-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v1, s144048; GFX11-NEXT: v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v5, s134049; GFX11-NEXT: v_dual_mov_b32 v6, s11 :: v_dual_mov_b32 v7, s104050; GFX11-NEXT: v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s84051; GFX11-NEXT: v_mov_b32_e32 v11, s64052; GFX11-NEXT: v_mov_b32_e32 v3, s44053; GFX11-NEXT: .LBB21_5: ; %end4054; GFX11-NEXT: v_mov_b32_e32 v0, v134055; GFX11-NEXT: v_mov_b32_e32 v4, v144056; GFX11-NEXT: s_setpc_b64 s[30:31]4057 %cmp = icmp eq i32 %b, 04058 br i1 %cmp, label %cmp.true, label %cmp.false4059 4060cmp.true:4061 %a1 = fadd <3 x float> %a, splat (float 1.000000e+00)4062 %a2 = bitcast <3 x float> %a1 to <12 x i8>4063 br label %end4064 4065cmp.false:4066 %a3 = bitcast <3 x float> %a to <12 x i8>4067 br label %end4068 4069end:4070 %phi = phi <12 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]4071 ret <12 x i8> %phi4072}4073 4074define <3 x float> @bitcast_v12i8_to_v3f32(<12 x i8> %a, i32 %b) {4075; SI-LABEL: bitcast_v12i8_to_v3f32:4076; SI: ; %bb.0:4077; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4078; SI-NEXT: v_mov_b32_e32 v14, v24079; SI-NEXT: v_mov_b32_e32 v13, v04080; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124081; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v14082; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v34083; SI-NEXT: v_lshlrev_b32_e32 v12, 8, v54084; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v74085; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v94086; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v114087; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr24088; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc4089; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4090; SI-NEXT: s_cbranch_execnz .LBB22_34091; SI-NEXT: ; %bb.1: ; %Flow4092; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4093; SI-NEXT: s_cbranch_execnz .LBB22_44094; SI-NEXT: .LBB22_2: ; %end4095; SI-NEXT: s_or_b64 exec, exec, s[4:5]4096; SI-NEXT: s_setpc_b64 s[30:31]4097; SI-NEXT: .LBB22_3: ; %cmp.false4098; SI-NEXT: v_and_b32_e32 v0, 0xff, v134099; SI-NEXT: v_and_b32_e32 v1, 0xff, v144100; SI-NEXT: v_or_b32_e32 v0, v0, v164101; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v14102; SI-NEXT: v_and_b32_e32 v0, 0xffff, v04103; SI-NEXT: v_or_b32_e32 v1, v15, v14104; SI-NEXT: v_or_b32_e32 v0, v0, v14105; SI-NEXT: v_and_b32_e32 v1, 0xff, v44106; SI-NEXT: v_and_b32_e32 v2, 0xff, v64107; SI-NEXT: v_or_b32_e32 v1, v1, v124108; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v24109; SI-NEXT: v_and_b32_e32 v1, 0xffff, v14110; SI-NEXT: v_or_b32_e32 v2, v7, v24111; SI-NEXT: v_or_b32_e32 v1, v1, v24112; SI-NEXT: v_and_b32_e32 v2, 0xff, v84113; SI-NEXT: v_and_b32_e32 v4, 0xff, v104114; SI-NEXT: v_or_b32_e32 v2, v2, v54115; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v44116; SI-NEXT: v_and_b32_e32 v2, 0xffff, v24117; SI-NEXT: v_or_b32_e32 v3, v3, v44118; SI-NEXT: v_or_b32_e32 v2, v2, v34119; SI-NEXT: ; implicit-def: $vgpr134120; SI-NEXT: ; implicit-def: $vgpr144121; SI-NEXT: ; implicit-def: $vgpr44122; SI-NEXT: ; implicit-def: $vgpr64123; SI-NEXT: ; implicit-def: $vgpr84124; SI-NEXT: ; implicit-def: $vgpr104125; SI-NEXT: ; implicit-def: $vgpr164126; SI-NEXT: ; implicit-def: $vgpr154127; SI-NEXT: ; implicit-def: $vgpr124128; SI-NEXT: ; implicit-def: $vgpr74129; SI-NEXT: ; implicit-def: $vgpr54130; SI-NEXT: ; implicit-def: $vgpr34131; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4132; SI-NEXT: s_cbranch_execz .LBB22_24133; SI-NEXT: .LBB22_4: ; %cmp.true4134; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v134135; SI-NEXT: v_and_b32_e32 v0, 0xff, v04136; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v144137; SI-NEXT: v_or_b32_e32 v0, v16, v04138; SI-NEXT: v_and_b32_e32 v1, 0xff, v14139; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v04140; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v14141; SI-NEXT: v_and_b32_e32 v0, 0xffff, v04142; SI-NEXT: v_or_b32_e32 v1, v15, v14143; SI-NEXT: v_or_b32_e32 v0, v1, v04144; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v44145; SI-NEXT: v_and_b32_e32 v1, 0xff, v14146; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v64147; SI-NEXT: s_movk_i32 s6, 0x3004148; SI-NEXT: v_or_b32_e32 v1, v12, v14149; SI-NEXT: v_and_b32_e32 v2, 0xff, v24150; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v14151; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v24152; SI-NEXT: v_and_b32_e32 v1, 0xffff, v14153; SI-NEXT: v_or_b32_e32 v2, v7, v24154; SI-NEXT: v_or_b32_e32 v1, v2, v14155; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v84156; SI-NEXT: v_and_b32_e32 v2, 0xff, v24157; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v104158; SI-NEXT: v_or_b32_e32 v2, v5, v24159; SI-NEXT: v_and_b32_e32 v4, 0xff, v44160; SI-NEXT: v_add_i32_e32 v2, vcc, 0x300, v24161; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v44162; SI-NEXT: v_and_b32_e32 v2, 0xffff, v24163; SI-NEXT: v_or_b32_e32 v3, v3, v44164; SI-NEXT: s_mov_b32 s7, 0x30000004165; SI-NEXT: v_or_b32_e32 v2, v3, v24166; SI-NEXT: v_add_i32_e32 v0, vcc, s7, v04167; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v14168; SI-NEXT: v_add_i32_e32 v2, vcc, 0x3000000, v24169; SI-NEXT: s_or_b64 exec, exec, s[4:5]4170; SI-NEXT: s_setpc_b64 s[30:31]4171;4172; VI-LABEL: bitcast_v12i8_to_v3f32:4173; VI: ; %bb.0:4174; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4175; VI-NEXT: v_mov_b32_e32 v14, v24176; VI-NEXT: v_mov_b32_e32 v13, v04177; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124178; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v14179; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v34180; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v54181; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v74182; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v94183; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v114184; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr24185; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc4186; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4187; VI-NEXT: s_cbranch_execnz .LBB22_34188; VI-NEXT: ; %bb.1: ; %Flow4189; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4190; VI-NEXT: s_cbranch_execnz .LBB22_44191; VI-NEXT: .LBB22_2: ; %end4192; VI-NEXT: s_or_b64 exec, exec, s[4:5]4193; VI-NEXT: s_setpc_b64 s[30:31]4194; VI-NEXT: .LBB22_3: ; %cmp.false4195; VI-NEXT: v_or_b32_sdwa v0, v13, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD4196; VI-NEXT: v_or_b32_sdwa v1, v14, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD4197; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD4198; VI-NEXT: v_or_b32_sdwa v1, v4, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD4199; VI-NEXT: v_or_b32_sdwa v2, v6, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD4200; VI-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD4201; VI-NEXT: v_or_b32_sdwa v2, v8, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD4202; VI-NEXT: v_or_b32_sdwa v3, v10, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD4203; VI-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD4204; VI-NEXT: ; implicit-def: $vgpr134205; VI-NEXT: ; implicit-def: $vgpr144206; VI-NEXT: ; implicit-def: $vgpr44207; VI-NEXT: ; implicit-def: $vgpr64208; VI-NEXT: ; implicit-def: $vgpr84209; VI-NEXT: ; implicit-def: $vgpr104210; VI-NEXT: ; implicit-def: $vgpr164211; VI-NEXT: ; implicit-def: $vgpr154212; VI-NEXT: ; implicit-def: $vgpr124213; VI-NEXT: ; implicit-def: $vgpr74214; VI-NEXT: ; implicit-def: $vgpr54215; VI-NEXT: ; implicit-def: $vgpr34216; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4217; VI-NEXT: s_cbranch_execz .LBB22_24218; VI-NEXT: .LBB22_4: ; %cmp.true4219; VI-NEXT: v_add_u16_e32 v0, 3, v134220; VI-NEXT: v_add_u16_e32 v1, 3, v144221; VI-NEXT: v_or_b32_sdwa v0, v16, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_04222; VI-NEXT: v_or_b32_sdwa v1, v15, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_04223; VI-NEXT: v_mov_b32_e32 v2, 0x3004224; VI-NEXT: v_add_u16_e32 v0, 0x300, v04225; VI-NEXT: v_add_u16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD4226; VI-NEXT: v_or_b32_e32 v0, v0, v14227; VI-NEXT: v_add_u16_e32 v1, 3, v44228; VI-NEXT: v_add_u16_e32 v4, 3, v64229; VI-NEXT: v_or_b32_sdwa v1, v12, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_04230; VI-NEXT: v_or_b32_sdwa v4, v7, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_04231; VI-NEXT: v_add_u16_e32 v1, 0x300, v14232; VI-NEXT: v_add_u16_sdwa v4, v4, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD4233; VI-NEXT: v_or_b32_e32 v1, v1, v44234; VI-NEXT: v_add_u16_e32 v4, 3, v84235; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_04236; VI-NEXT: v_add_u16_e32 v5, 3, v104237; VI-NEXT: v_or_b32_sdwa v3, v3, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_04238; VI-NEXT: v_add_u16_e32 v4, 0x300, v44239; VI-NEXT: v_add_u16_sdwa v2, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD4240; VI-NEXT: v_or_b32_e32 v2, v4, v24241; VI-NEXT: s_or_b64 exec, exec, s[4:5]4242; VI-NEXT: s_setpc_b64 s[30:31]4243;4244; GFX9-LABEL: bitcast_v12i8_to_v3f32:4245; GFX9: ; %bb.0:4246; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4247; GFX9-NEXT: v_mov_b32_e32 v14, v24248; GFX9-NEXT: v_mov_b32_e32 v13, v04249; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v124250; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v14251; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v34252; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54253; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v74254; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v94255; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v114256; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr24257; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc4258; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4259; GFX9-NEXT: s_cbranch_execnz .LBB22_34260; GFX9-NEXT: ; %bb.1: ; %Flow4261; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4262; GFX9-NEXT: s_cbranch_execnz .LBB22_44263; GFX9-NEXT: .LBB22_2: ; %end4264; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]4265; GFX9-NEXT: s_setpc_b64 s[30:31]4266; GFX9-NEXT: .LBB22_3: ; %cmp.false4267; GFX9-NEXT: v_or_b32_sdwa v0, v13, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD4268; GFX9-NEXT: v_or_b32_sdwa v1, v14, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD4269; GFX9-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD4270; GFX9-NEXT: v_or_b32_sdwa v1, v4, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD4271; GFX9-NEXT: v_or_b32_sdwa v2, v6, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD4272; GFX9-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD4273; GFX9-NEXT: v_or_b32_sdwa v2, v8, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD4274; GFX9-NEXT: v_or_b32_sdwa v3, v10, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD4275; GFX9-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD4276; GFX9-NEXT: ; implicit-def: $vgpr134277; GFX9-NEXT: ; implicit-def: $vgpr144278; GFX9-NEXT: ; implicit-def: $vgpr44279; GFX9-NEXT: ; implicit-def: $vgpr64280; GFX9-NEXT: ; implicit-def: $vgpr84281; GFX9-NEXT: ; implicit-def: $vgpr104282; GFX9-NEXT: ; implicit-def: $vgpr164283; GFX9-NEXT: ; implicit-def: $vgpr154284; GFX9-NEXT: ; implicit-def: $vgpr124285; GFX9-NEXT: ; implicit-def: $vgpr74286; GFX9-NEXT: ; implicit-def: $vgpr54287; GFX9-NEXT: ; implicit-def: $vgpr34288; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4289; GFX9-NEXT: s_cbranch_execz .LBB22_24290; GFX9-NEXT: .LBB22_4: ; %cmp.true4291; GFX9-NEXT: v_add_u16_e32 v0, 3, v134292; GFX9-NEXT: v_add_u16_e32 v1, 3, v144293; GFX9-NEXT: v_or_b32_sdwa v0, v16, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_04294; GFX9-NEXT: s_movk_i32 s6, 0x3004295; GFX9-NEXT: v_or_b32_sdwa v1, v15, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_04296; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v04297; GFX9-NEXT: v_add_u16_sdwa v1, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD4298; GFX9-NEXT: v_or_b32_e32 v0, v0, v14299; GFX9-NEXT: v_add_u16_e32 v1, 3, v44300; GFX9-NEXT: v_add_u16_e32 v2, 3, v64301; GFX9-NEXT: v_or_b32_sdwa v1, v12, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_04302; GFX9-NEXT: v_or_b32_sdwa v2, v7, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_04303; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v14304; GFX9-NEXT: v_add_u16_sdwa v2, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD4305; GFX9-NEXT: v_or_b32_e32 v1, v1, v24306; GFX9-NEXT: v_add_u16_e32 v2, 3, v84307; GFX9-NEXT: v_add_u16_e32 v4, 3, v104308; GFX9-NEXT: v_or_b32_sdwa v2, v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_04309; GFX9-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_04310; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v24311; GFX9-NEXT: v_add_u16_sdwa v3, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD4312; GFX9-NEXT: v_or_b32_e32 v2, v2, v34313; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]4314; GFX9-NEXT: s_setpc_b64 s[30:31]4315;4316; GFX11-TRUE16-LABEL: bitcast_v12i8_to_v3f32:4317; GFX11-TRUE16: ; %bb.0:4318; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4319; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v7.l4320; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v4.l4321; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v2.l4322; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v0.l4323; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v1.l4324; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v3.l4325; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l4326; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v8.h4327; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v9.l4328; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v11.l4329; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo4330; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr24331; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v124332; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s04333; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB22_34334; GFX11-TRUE16-NEXT: ; %bb.1: ; %Flow4335; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s04336; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB22_44337; GFX11-TRUE16-NEXT: .LBB22_2: ; %end4338; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s04339; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]4340; GFX11-TRUE16-NEXT: .LBB22_3: ; %cmp.false4341; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v7.h4342; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v7.l4343; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.h4344; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l4345; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l4346; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l4347; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v5.h4348; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v4.h4349; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v5.l4350; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.l4351; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v3.h4352; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v4.l4353; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi164354; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo164355; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi164356; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo164357; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo164358; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo164359; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi164360; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi164361; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo164362; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo164363; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi164364; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo164365; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s04366; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB22_24367; GFX11-TRUE16-NEXT: .LBB22_4: ; %cmp.true4368; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v7.h, 34369; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v7.l, 34370; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v6.h, 34371; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 34372; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 34373; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 34374; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l4375; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h4376; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l4377; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h4378; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l4379; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h4380; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v5.h, v0.l4381; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v4.h, v0.h4382; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v5.l, v1.l4383; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v3.l, v1.h4384; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v3.h, v2.l4385; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v4.l, v2.h4386; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l4387; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h4388; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l4389; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h4390; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l4391; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h4392; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s04393; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]4394;4395; GFX11-FAKE16-LABEL: bitcast_v12i8_to_v3f32:4396; GFX11-FAKE16: ; %bb.0:4397; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4398; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, v2 :: v_dual_mov_b32 v13, v04399; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v124400; GFX11-FAKE16-NEXT: v_lshlrev_b16 v16, 8, v14401; GFX11-FAKE16-NEXT: v_lshlrev_b16 v12, 8, v34402; GFX11-FAKE16-NEXT: v_lshlrev_b16 v15, 8, v54403; GFX11-FAKE16-NEXT: v_lshlrev_b16 v7, 8, v74404; GFX11-FAKE16-NEXT: v_lshlrev_b16 v3, 8, v94405; GFX11-FAKE16-NEXT: v_lshlrev_b16 v5, 8, v114406; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr24407; GFX11-FAKE16-NEXT: s_and_saveexec_b32 s0, vcc_lo4408; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)4409; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s04410; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB22_34411; GFX11-FAKE16-NEXT: ; %bb.1: ; %Flow4412; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s04413; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB22_44414; GFX11-FAKE16-NEXT: .LBB22_2: ; %end4415; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s04416; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]4417; GFX11-FAKE16-NEXT: .LBB22_3: ; %cmp.false4418; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xff, v134419; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xff, v144420; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xff, v44421; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xff, v64422; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xff, v84423; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xff, v104424; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v164425; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v124426; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v154427; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v74428; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v6, v34429; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v8, v54430; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v04431; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v14432; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v24433; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v44434; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v34435; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v54436; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v14437; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr134438; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr144439; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64440; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr84441; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr104442; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr164443; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr124444; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr154445; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74446; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)4447; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v44448; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44449; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v3, v54450; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34451; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54452; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s04453; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB22_24454; GFX11-FAKE16-NEXT: .LBB22_4: ; %cmp.true4455; GFX11-FAKE16-NEXT: v_add_nc_u16 v0, v13, 34456; GFX11-FAKE16-NEXT: v_add_nc_u16 v1, v14, 34457; GFX11-FAKE16-NEXT: v_add_nc_u16 v2, v4, 34458; GFX11-FAKE16-NEXT: v_add_nc_u16 v4, v6, 34459; GFX11-FAKE16-NEXT: v_add_nc_u16 v6, v8, 34460; GFX11-FAKE16-NEXT: v_add_nc_u16 v8, v10, 34461; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xff, v04462; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xff, v14463; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xff, v24464; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xff, v44465; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xff, v64466; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xff, v84467; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v16, v04468; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v12, v14469; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v15, v24470; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v7, v44471; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v3, v64472; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v5, v84473; GFX11-FAKE16-NEXT: v_add_nc_u16 v0, 0x300, v04474; GFX11-FAKE16-NEXT: v_add_nc_u16 v1, 0x300, v14475; GFX11-FAKE16-NEXT: v_add_nc_u16 v2, 0x300, v24476; GFX11-FAKE16-NEXT: v_add_nc_u16 v4, 0x300, v44477; GFX11-FAKE16-NEXT: v_add_nc_u16 v3, 0x300, v34478; GFX11-FAKE16-NEXT: v_add_nc_u16 v5, 0x300, v54479; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v04480; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v14481; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v24482; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v44483; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v34484; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v54485; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v14486; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)4487; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v44488; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v3, v54489; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s04490; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]4491 %cmp = icmp eq i32 %b, 04492 br i1 %cmp, label %cmp.true, label %cmp.false4493 4494cmp.true:4495 %a1 = add <12 x i8> %a, splat (i8 3)4496 %a2 = bitcast <12 x i8> %a1 to <3 x float>4497 br label %end4498 4499cmp.false:4500 %a3 = bitcast <12 x i8> %a to <3 x float>4501 br label %end4502 4503end:4504 %phi = phi <3 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]4505 ret <3 x float> %phi4506}4507 4508define inreg <3 x float> @bitcast_v12i8_to_v3f32_scalar(<12 x i8> inreg %a, i32 inreg %b) {4509; SI-LABEL: bitcast_v12i8_to_v3f32_scalar:4510; SI: ; %bb.0:4511; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4512; SI-NEXT: s_cmp_lg_u32 s28, 04513; SI-NEXT: s_cbranch_scc0 .LBB23_44514; SI-NEXT: ; %bb.1: ; %cmp.false4515; SI-NEXT: s_and_b32 s4, s16, 0xff4516; SI-NEXT: s_lshl_b32 s5, s17, 84517; SI-NEXT: s_or_b32 s4, s4, s54518; SI-NEXT: s_and_b32 s5, s18, 0xff4519; SI-NEXT: s_lshl_b32 s5, s5, 164520; SI-NEXT: s_lshl_b32 s6, s19, 244521; SI-NEXT: s_and_b32 s4, s4, 0xffff4522; SI-NEXT: s_or_b32 s5, s6, s54523; SI-NEXT: s_or_b32 s4, s4, s54524; SI-NEXT: s_and_b32 s5, s20, 0xff4525; SI-NEXT: s_lshl_b32 s6, s21, 84526; SI-NEXT: s_or_b32 s5, s5, s64527; SI-NEXT: s_and_b32 s6, s22, 0xff4528; SI-NEXT: s_lshl_b32 s6, s6, 164529; SI-NEXT: s_lshl_b32 s7, s23, 244530; SI-NEXT: s_and_b32 s5, s5, 0xffff4531; SI-NEXT: s_or_b32 s6, s7, s64532; SI-NEXT: s_or_b32 s5, s5, s64533; SI-NEXT: s_and_b32 s6, s24, 0xff4534; SI-NEXT: s_lshl_b32 s7, s25, 84535; SI-NEXT: s_or_b32 s6, s6, s74536; SI-NEXT: s_and_b32 s7, s26, 0xff4537; SI-NEXT: s_lshl_b32 s7, s7, 164538; SI-NEXT: s_lshl_b32 s8, s27, 244539; SI-NEXT: s_and_b32 s6, s6, 0xffff4540; SI-NEXT: s_or_b32 s7, s8, s74541; SI-NEXT: s_or_b32 s6, s6, s74542; SI-NEXT: s_cbranch_execnz .LBB23_34543; SI-NEXT: .LBB23_2: ; %cmp.true4544; SI-NEXT: s_add_i32 s16, s16, 34545; SI-NEXT: s_and_b32 s4, s16, 0xff4546; SI-NEXT: s_lshl_b32 s5, s17, 84547; SI-NEXT: s_add_i32 s18, s18, 34548; SI-NEXT: s_or_b32 s4, s5, s44549; SI-NEXT: s_and_b32 s6, s18, 0xff4550; SI-NEXT: s_addk_i32 s4, 0x3004551; SI-NEXT: s_lshl_b32 s5, s19, 244552; SI-NEXT: s_lshl_b32 s6, s6, 164553; SI-NEXT: s_and_b32 s4, s4, 0xffff4554; SI-NEXT: s_or_b32 s5, s5, s64555; SI-NEXT: s_add_i32 s20, s20, 34556; SI-NEXT: s_or_b32 s4, s5, s44557; SI-NEXT: s_and_b32 s5, s20, 0xff4558; SI-NEXT: s_lshl_b32 s6, s21, 84559; SI-NEXT: s_add_i32 s22, s22, 34560; SI-NEXT: s_or_b32 s5, s6, s54561; SI-NEXT: s_and_b32 s7, s22, 0xff4562; SI-NEXT: s_addk_i32 s5, 0x3004563; SI-NEXT: s_lshl_b32 s6, s23, 244564; SI-NEXT: s_lshl_b32 s7, s7, 164565; SI-NEXT: s_and_b32 s5, s5, 0xffff4566; SI-NEXT: s_or_b32 s6, s6, s74567; SI-NEXT: s_add_i32 s24, s24, 34568; SI-NEXT: s_or_b32 s5, s6, s54569; SI-NEXT: s_and_b32 s6, s24, 0xff4570; SI-NEXT: s_lshl_b32 s7, s25, 84571; SI-NEXT: s_add_i32 s26, s26, 34572; SI-NEXT: s_or_b32 s6, s7, s64573; SI-NEXT: s_and_b32 s8, s26, 0xff4574; SI-NEXT: s_addk_i32 s6, 0x3004575; SI-NEXT: s_lshl_b32 s7, s27, 244576; SI-NEXT: s_lshl_b32 s8, s8, 164577; SI-NEXT: s_and_b32 s6, s6, 0xffff4578; SI-NEXT: s_or_b32 s7, s7, s84579; SI-NEXT: s_or_b32 s6, s7, s64580; SI-NEXT: s_add_i32 s4, s4, 0x30000004581; SI-NEXT: s_add_i32 s5, s5, 0x30000004582; SI-NEXT: s_add_i32 s6, s6, 0x30000004583; SI-NEXT: .LBB23_3: ; %end4584; SI-NEXT: v_mov_b32_e32 v0, s44585; SI-NEXT: v_mov_b32_e32 v1, s54586; SI-NEXT: v_mov_b32_e32 v2, s64587; SI-NEXT: s_setpc_b64 s[30:31]4588; SI-NEXT: .LBB23_4:4589; SI-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr64590; SI-NEXT: s_branch .LBB23_24591;4592; VI-LABEL: bitcast_v12i8_to_v3f32_scalar:4593; VI: ; %bb.0:4594; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4595; VI-NEXT: s_cmp_lg_u32 s28, 04596; VI-NEXT: s_cbranch_scc0 .LBB23_44597; VI-NEXT: ; %bb.1: ; %cmp.false4598; VI-NEXT: s_and_b32 s4, s16, 0xff4599; VI-NEXT: s_lshl_b32 s5, s17, 84600; VI-NEXT: s_or_b32 s4, s4, s54601; VI-NEXT: s_and_b32 s5, s18, 0xff4602; VI-NEXT: s_lshl_b32 s6, s19, 84603; VI-NEXT: s_or_b32 s5, s5, s64604; VI-NEXT: s_and_b32 s4, s4, 0xffff4605; VI-NEXT: s_lshl_b32 s5, s5, 164606; VI-NEXT: s_or_b32 s4, s4, s54607; VI-NEXT: s_and_b32 s5, s20, 0xff4608; VI-NEXT: s_lshl_b32 s6, s21, 84609; VI-NEXT: s_or_b32 s5, s5, s64610; VI-NEXT: s_and_b32 s6, s22, 0xff4611; VI-NEXT: s_lshl_b32 s7, s23, 84612; VI-NEXT: s_or_b32 s6, s6, s74613; VI-NEXT: s_and_b32 s5, s5, 0xffff4614; VI-NEXT: s_lshl_b32 s6, s6, 164615; VI-NEXT: s_or_b32 s5, s5, s64616; VI-NEXT: s_and_b32 s6, s24, 0xff4617; VI-NEXT: s_lshl_b32 s7, s25, 84618; VI-NEXT: s_or_b32 s6, s6, s74619; VI-NEXT: s_and_b32 s7, s26, 0xff4620; VI-NEXT: s_lshl_b32 s8, s27, 84621; VI-NEXT: s_or_b32 s7, s7, s84622; VI-NEXT: s_and_b32 s6, s6, 0xffff4623; VI-NEXT: s_lshl_b32 s7, s7, 164624; VI-NEXT: s_or_b32 s6, s6, s74625; VI-NEXT: s_cbranch_execnz .LBB23_34626; VI-NEXT: .LBB23_2: ; %cmp.true4627; VI-NEXT: s_add_i32 s16, s16, 34628; VI-NEXT: s_and_b32 s4, s16, 0xff4629; VI-NEXT: s_lshl_b32 s5, s17, 84630; VI-NEXT: s_add_i32 s18, s18, 34631; VI-NEXT: s_or_b32 s4, s5, s44632; VI-NEXT: s_and_b32 s5, s18, 0xff4633; VI-NEXT: s_lshl_b32 s6, s19, 84634; VI-NEXT: s_addk_i32 s4, 0x3004635; VI-NEXT: s_or_b32 s5, s6, s54636; VI-NEXT: s_and_b32 s4, s4, 0xffff4637; VI-NEXT: s_lshl_b32 s5, s5, 164638; VI-NEXT: s_add_i32 s20, s20, 34639; VI-NEXT: s_or_b32 s4, s5, s44640; VI-NEXT: s_and_b32 s5, s20, 0xff4641; VI-NEXT: s_lshl_b32 s6, s21, 84642; VI-NEXT: s_add_i32 s22, s22, 34643; VI-NEXT: s_or_b32 s5, s6, s54644; VI-NEXT: s_and_b32 s6, s22, 0xff4645; VI-NEXT: s_lshl_b32 s7, s23, 84646; VI-NEXT: s_addk_i32 s5, 0x3004647; VI-NEXT: s_or_b32 s6, s7, s64648; VI-NEXT: s_and_b32 s5, s5, 0xffff4649; VI-NEXT: s_lshl_b32 s6, s6, 164650; VI-NEXT: s_add_i32 s24, s24, 34651; VI-NEXT: s_or_b32 s5, s6, s54652; VI-NEXT: s_and_b32 s6, s24, 0xff4653; VI-NEXT: s_lshl_b32 s7, s25, 84654; VI-NEXT: s_add_i32 s26, s26, 34655; VI-NEXT: s_or_b32 s6, s7, s64656; VI-NEXT: s_and_b32 s7, s26, 0xff4657; VI-NEXT: s_lshl_b32 s8, s27, 84658; VI-NEXT: s_addk_i32 s6, 0x3004659; VI-NEXT: s_or_b32 s7, s8, s74660; VI-NEXT: s_and_b32 s6, s6, 0xffff4661; VI-NEXT: s_lshl_b32 s7, s7, 164662; VI-NEXT: s_or_b32 s6, s7, s64663; VI-NEXT: s_add_i32 s4, s4, 0x30000004664; VI-NEXT: s_add_i32 s5, s5, 0x30000004665; VI-NEXT: s_add_i32 s6, s6, 0x30000004666; VI-NEXT: .LBB23_3: ; %end4667; VI-NEXT: v_mov_b32_e32 v0, s44668; VI-NEXT: v_mov_b32_e32 v1, s54669; VI-NEXT: v_mov_b32_e32 v2, s64670; VI-NEXT: s_setpc_b64 s[30:31]4671; VI-NEXT: .LBB23_4:4672; VI-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr64673; VI-NEXT: s_branch .LBB23_24674;4675; GFX9-LABEL: bitcast_v12i8_to_v3f32_scalar:4676; GFX9: ; %bb.0:4677; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4678; GFX9-NEXT: s_cmp_lg_u32 s28, 04679; GFX9-NEXT: s_cbranch_scc0 .LBB23_44680; GFX9-NEXT: ; %bb.1: ; %cmp.false4681; GFX9-NEXT: s_and_b32 s4, s16, 0xff4682; GFX9-NEXT: s_lshl_b32 s5, s17, 84683; GFX9-NEXT: s_or_b32 s4, s4, s54684; GFX9-NEXT: s_and_b32 s5, s18, 0xff4685; GFX9-NEXT: s_lshl_b32 s6, s19, 84686; GFX9-NEXT: s_or_b32 s5, s5, s64687; GFX9-NEXT: s_and_b32 s4, s4, 0xffff4688; GFX9-NEXT: s_lshl_b32 s5, s5, 164689; GFX9-NEXT: s_or_b32 s4, s4, s54690; GFX9-NEXT: s_and_b32 s5, s20, 0xff4691; GFX9-NEXT: s_lshl_b32 s6, s21, 84692; GFX9-NEXT: s_or_b32 s5, s5, s64693; GFX9-NEXT: s_and_b32 s6, s22, 0xff4694; GFX9-NEXT: s_lshl_b32 s7, s23, 84695; GFX9-NEXT: s_or_b32 s6, s6, s74696; GFX9-NEXT: s_and_b32 s5, s5, 0xffff4697; GFX9-NEXT: s_lshl_b32 s6, s6, 164698; GFX9-NEXT: s_or_b32 s5, s5, s64699; GFX9-NEXT: s_and_b32 s6, s24, 0xff4700; GFX9-NEXT: s_lshl_b32 s7, s25, 84701; GFX9-NEXT: s_or_b32 s6, s6, s74702; GFX9-NEXT: s_and_b32 s7, s26, 0xff4703; GFX9-NEXT: s_lshl_b32 s8, s27, 84704; GFX9-NEXT: s_or_b32 s7, s7, s84705; GFX9-NEXT: s_and_b32 s6, s6, 0xffff4706; GFX9-NEXT: s_lshl_b32 s7, s7, 164707; GFX9-NEXT: s_or_b32 s6, s6, s74708; GFX9-NEXT: s_cbranch_execnz .LBB23_34709; GFX9-NEXT: .LBB23_2: ; %cmp.true4710; GFX9-NEXT: s_add_i32 s16, s16, 34711; GFX9-NEXT: s_and_b32 s4, s16, 0xff4712; GFX9-NEXT: s_lshl_b32 s5, s17, 84713; GFX9-NEXT: s_add_i32 s18, s18, 34714; GFX9-NEXT: s_or_b32 s4, s5, s44715; GFX9-NEXT: s_and_b32 s5, s18, 0xff4716; GFX9-NEXT: s_lshl_b32 s6, s19, 84717; GFX9-NEXT: s_or_b32 s5, s6, s54718; GFX9-NEXT: s_addk_i32 s4, 0x3004719; GFX9-NEXT: s_addk_i32 s5, 0x3004720; GFX9-NEXT: s_and_b32 s4, s4, 0xffff4721; GFX9-NEXT: s_lshl_b32 s5, s5, 164722; GFX9-NEXT: s_add_i32 s20, s20, 34723; GFX9-NEXT: s_or_b32 s4, s4, s54724; GFX9-NEXT: s_and_b32 s5, s20, 0xff4725; GFX9-NEXT: s_lshl_b32 s6, s21, 84726; GFX9-NEXT: s_add_i32 s22, s22, 34727; GFX9-NEXT: s_or_b32 s5, s6, s54728; GFX9-NEXT: s_and_b32 s6, s22, 0xff4729; GFX9-NEXT: s_lshl_b32 s7, s23, 84730; GFX9-NEXT: s_or_b32 s6, s7, s64731; GFX9-NEXT: s_addk_i32 s5, 0x3004732; GFX9-NEXT: s_addk_i32 s6, 0x3004733; GFX9-NEXT: s_and_b32 s5, s5, 0xffff4734; GFX9-NEXT: s_lshl_b32 s6, s6, 164735; GFX9-NEXT: s_add_i32 s24, s24, 34736; GFX9-NEXT: s_or_b32 s5, s5, s64737; GFX9-NEXT: s_and_b32 s6, s24, 0xff4738; GFX9-NEXT: s_lshl_b32 s7, s25, 84739; GFX9-NEXT: s_add_i32 s26, s26, 34740; GFX9-NEXT: s_or_b32 s6, s7, s64741; GFX9-NEXT: s_and_b32 s7, s26, 0xff4742; GFX9-NEXT: s_lshl_b32 s8, s27, 84743; GFX9-NEXT: s_or_b32 s7, s8, s74744; GFX9-NEXT: s_addk_i32 s6, 0x3004745; GFX9-NEXT: s_addk_i32 s7, 0x3004746; GFX9-NEXT: s_and_b32 s6, s6, 0xffff4747; GFX9-NEXT: s_lshl_b32 s7, s7, 164748; GFX9-NEXT: s_or_b32 s6, s6, s74749; GFX9-NEXT: .LBB23_3: ; %end4750; GFX9-NEXT: v_mov_b32_e32 v0, s44751; GFX9-NEXT: v_mov_b32_e32 v1, s54752; GFX9-NEXT: v_mov_b32_e32 v2, s64753; GFX9-NEXT: s_setpc_b64 s[30:31]4754; GFX9-NEXT: .LBB23_4:4755; GFX9-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr64756; GFX9-NEXT: s_branch .LBB23_24757;4758; GFX11-LABEL: bitcast_v12i8_to_v3f32_scalar:4759; GFX11: ; %bb.0:4760; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4761; GFX11-NEXT: s_cmp_lg_u32 s24, 04762; GFX11-NEXT: s_mov_b32 s7, 04763; GFX11-NEXT: s_cbranch_scc0 .LBB23_44764; GFX11-NEXT: ; %bb.1: ; %cmp.false4765; GFX11-NEXT: s_and_b32 s4, s0, 0xff4766; GFX11-NEXT: s_lshl_b32 s5, s1, 84767; GFX11-NEXT: s_and_b32 s6, s2, 0xff4768; GFX11-NEXT: s_lshl_b32 s8, s3, 84769; GFX11-NEXT: s_or_b32 s4, s4, s54770; GFX11-NEXT: s_or_b32 s5, s6, s84771; GFX11-NEXT: s_and_b32 s4, s4, 0xffff4772; GFX11-NEXT: s_lshl_b32 s5, s5, 164773; GFX11-NEXT: s_lshl_b32 s6, s17, 84774; GFX11-NEXT: s_or_b32 s4, s4, s54775; GFX11-NEXT: s_and_b32 s5, s16, 0xff4776; GFX11-NEXT: s_and_b32 s8, s18, 0xff4777; GFX11-NEXT: s_lshl_b32 s9, s19, 84778; GFX11-NEXT: s_or_b32 s5, s5, s64779; GFX11-NEXT: s_or_b32 s6, s8, s94780; GFX11-NEXT: s_and_b32 s8, s20, 0xff4781; GFX11-NEXT: s_lshl_b32 s9, s21, 84782; GFX11-NEXT: s_and_b32 s10, s22, 0xff4783; GFX11-NEXT: s_lshl_b32 s11, s23, 84784; GFX11-NEXT: s_or_b32 s8, s8, s94785; GFX11-NEXT: s_or_b32 s9, s10, s114786; GFX11-NEXT: s_and_b32 s5, s5, 0xffff4787; GFX11-NEXT: s_lshl_b32 s6, s6, 164788; GFX11-NEXT: s_and_b32 s8, s8, 0xffff4789; GFX11-NEXT: s_lshl_b32 s9, s9, 164790; GFX11-NEXT: s_or_b32 s5, s5, s64791; GFX11-NEXT: s_or_b32 s6, s8, s94792; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s74793; GFX11-NEXT: s_cbranch_vccnz .LBB23_34794; GFX11-NEXT: .LBB23_2: ; %cmp.true4795; GFX11-NEXT: s_add_i32 s0, s0, 34796; GFX11-NEXT: s_add_i32 s2, s2, 34797; GFX11-NEXT: s_and_b32 s0, s0, 0xff4798; GFX11-NEXT: s_lshl_b32 s1, s1, 84799; GFX11-NEXT: s_and_b32 s2, s2, 0xff4800; GFX11-NEXT: s_lshl_b32 s3, s3, 84801; GFX11-NEXT: s_or_b32 s0, s1, s04802; GFX11-NEXT: s_or_b32 s1, s3, s24803; GFX11-NEXT: s_addk_i32 s0, 0x3004804; GFX11-NEXT: s_addk_i32 s1, 0x3004805; GFX11-NEXT: s_and_b32 s0, s0, 0xffff4806; GFX11-NEXT: s_lshl_b32 s1, s1, 164807; GFX11-NEXT: s_add_i32 s16, s16, 34808; GFX11-NEXT: s_or_b32 s4, s0, s14809; GFX11-NEXT: s_and_b32 s0, s16, 0xff4810; GFX11-NEXT: s_lshl_b32 s1, s17, 84811; GFX11-NEXT: s_add_i32 s18, s18, 34812; GFX11-NEXT: s_or_b32 s0, s1, s04813; GFX11-NEXT: s_and_b32 s1, s18, 0xff4814; GFX11-NEXT: s_lshl_b32 s2, s19, 84815; GFX11-NEXT: s_add_i32 s20, s20, 34816; GFX11-NEXT: s_add_i32 s22, s22, 34817; GFX11-NEXT: s_or_b32 s1, s2, s14818; GFX11-NEXT: s_and_b32 s2, s20, 0xff4819; GFX11-NEXT: s_lshl_b32 s3, s21, 84820; GFX11-NEXT: s_and_b32 s5, s22, 0xff4821; GFX11-NEXT: s_lshl_b32 s6, s23, 84822; GFX11-NEXT: s_or_b32 s2, s3, s24823; GFX11-NEXT: s_or_b32 s3, s6, s54824; GFX11-NEXT: s_addk_i32 s0, 0x3004825; GFX11-NEXT: s_addk_i32 s1, 0x3004826; GFX11-NEXT: s_addk_i32 s2, 0x3004827; GFX11-NEXT: s_addk_i32 s3, 0x3004828; GFX11-NEXT: s_and_b32 s0, s0, 0xffff4829; GFX11-NEXT: s_lshl_b32 s1, s1, 164830; GFX11-NEXT: s_and_b32 s2, s2, 0xffff4831; GFX11-NEXT: s_lshl_b32 s3, s3, 164832; GFX11-NEXT: s_or_b32 s5, s0, s14833; GFX11-NEXT: s_or_b32 s6, s2, s34834; GFX11-NEXT: .LBB23_3: ; %end4835; GFX11-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s54836; GFX11-NEXT: v_mov_b32_e32 v2, s64837; GFX11-NEXT: s_setpc_b64 s[30:31]4838; GFX11-NEXT: .LBB23_4:4839; GFX11-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr64840; GFX11-NEXT: s_branch .LBB23_24841 %cmp = icmp eq i32 %b, 04842 br i1 %cmp, label %cmp.true, label %cmp.false4843 4844cmp.true:4845 %a1 = add <12 x i8> %a, splat (i8 3)4846 %a2 = bitcast <12 x i8> %a1 to <3 x float>4847 br label %end4848 4849cmp.false:4850 %a3 = bitcast <12 x i8> %a to <3 x float>4851 br label %end4852 4853end:4854 %phi = phi <3 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]4855 ret <3 x float> %phi4856}4857 4858define <6 x bfloat> @bitcast_v3f32_to_v6bf16(<3 x float> %a, i32 %b) {4859; SI-LABEL: bitcast_v3f32_to_v6bf16:4860; SI: ; %bb.0:4861; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4862; SI-NEXT: v_mov_b32_e32 v8, v24863; SI-NEXT: v_mov_b32_e32 v7, v14864; SI-NEXT: v_mov_b32_e32 v6, v04865; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v34866; SI-NEXT: ; implicit-def: $vgpr04867; SI-NEXT: ; implicit-def: $vgpr14868; SI-NEXT: ; implicit-def: $vgpr24869; SI-NEXT: ; implicit-def: $vgpr34870; SI-NEXT: ; implicit-def: $vgpr44871; SI-NEXT: ; implicit-def: $vgpr54872; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc4873; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4874; SI-NEXT: s_cbranch_execnz .LBB24_34875; SI-NEXT: ; %bb.1: ; %Flow4876; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4877; SI-NEXT: s_cbranch_execnz .LBB24_44878; SI-NEXT: .LBB24_2: ; %end4879; SI-NEXT: s_or_b64 exec, exec, s[4:5]4880; SI-NEXT: s_setpc_b64 s[30:31]4881; SI-NEXT: .LBB24_3: ; %cmp.false4882; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v84883; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v84884; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v74885; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v74886; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v64887; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v64888; SI-NEXT: ; implicit-def: $vgpr64889; SI-NEXT: ; implicit-def: $vgpr74890; SI-NEXT: ; implicit-def: $vgpr84891; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4892; SI-NEXT: s_cbranch_execz .LBB24_24893; SI-NEXT: .LBB24_4: ; %cmp.true4894; SI-NEXT: v_add_f32_e32 v0, 1.0, v64895; SI-NEXT: v_add_f32_e32 v1, 1.0, v74896; SI-NEXT: v_add_f32_e32 v2, 1.0, v84897; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v24898; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v24899; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v14900; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v14901; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v04902; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v04903; SI-NEXT: s_or_b64 exec, exec, s[4:5]4904; SI-NEXT: s_setpc_b64 s[30:31]4905;4906; VI-LABEL: bitcast_v3f32_to_v6bf16:4907; VI: ; %bb.0:4908; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4909; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v34910; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc4911; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4912; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4913; VI-NEXT: ; %bb.1: ; %cmp.true4914; VI-NEXT: v_add_f32_e32 v2, 1.0, v24915; VI-NEXT: v_add_f32_e32 v1, 1.0, v14916; VI-NEXT: v_add_f32_e32 v0, 1.0, v04917; VI-NEXT: ; %bb.2: ; %end4918; VI-NEXT: s_or_b64 exec, exec, s[4:5]4919; VI-NEXT: s_setpc_b64 s[30:31]4920;4921; GFX9-LABEL: bitcast_v3f32_to_v6bf16:4922; GFX9: ; %bb.0:4923; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4924; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v34925; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc4926; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]4927; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]4928; GFX9-NEXT: ; %bb.1: ; %cmp.true4929; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v24930; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v14931; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v04932; GFX9-NEXT: ; %bb.2: ; %end4933; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]4934; GFX9-NEXT: s_setpc_b64 s[30:31]4935;4936; GFX11-LABEL: bitcast_v3f32_to_v6bf16:4937; GFX11: ; %bb.0:4938; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4939; GFX11-NEXT: s_mov_b32 s0, exec_lo4940; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v34941; GFX11-NEXT: s_xor_b32 s0, exec_lo, s04942; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)4943; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s04944; GFX11-NEXT: ; %bb.1: ; %cmp.true4945; GFX11-NEXT: v_dual_add_f32 v2, 1.0, v2 :: v_dual_add_f32 v1, 1.0, v14946; GFX11-NEXT: v_add_f32_e32 v0, 1.0, v04947; GFX11-NEXT: ; %bb.2: ; %end4948; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s04949; GFX11-NEXT: s_setpc_b64 s[30:31]4950 %cmp = icmp eq i32 %b, 04951 br i1 %cmp, label %cmp.true, label %cmp.false4952 4953cmp.true:4954 %a1 = fadd <3 x float> %a, splat (float 1.000000e+00)4955 %a2 = bitcast <3 x float> %a1 to <6 x bfloat>4956 br label %end4957 4958cmp.false:4959 %a3 = bitcast <3 x float> %a to <6 x bfloat>4960 br label %end4961 4962end:4963 %phi = phi <6 x bfloat> [ %a2, %cmp.true ], [ %a3, %cmp.false ]4964 ret <6 x bfloat> %phi4965}4966 4967define inreg <6 x bfloat> @bitcast_v3f32_to_v6bf16_scalar(<3 x float> inreg %a, i32 inreg %b) {4968; SI-LABEL: bitcast_v3f32_to_v6bf16_scalar:4969; SI: ; %bb.0:4970; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4971; SI-NEXT: s_cmp_lg_u32 s19, 04972; SI-NEXT: s_cbranch_scc0 .LBB25_34973; SI-NEXT: ; %bb.1: ; %cmp.false4974; SI-NEXT: s_and_b32 s6, s18, 0xffff00004975; SI-NEXT: s_lshl_b32 s7, s18, 164976; SI-NEXT: s_and_b32 s8, s17, 0xffff00004977; SI-NEXT: s_lshl_b32 s9, s17, 164978; SI-NEXT: s_and_b32 s10, s16, 0xffff00004979; SI-NEXT: s_lshl_b32 s11, s16, 164980; SI-NEXT: s_cbranch_execnz .LBB25_44981; SI-NEXT: .LBB25_2: ; %cmp.true4982; SI-NEXT: v_add_f32_e64 v0, s16, 1.04983; SI-NEXT: v_add_f32_e64 v1, s17, 1.04984; SI-NEXT: v_add_f32_e64 v2, s18, 1.04985; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v24986; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v24987; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v14988; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v14989; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v04990; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v04991; SI-NEXT: s_setpc_b64 s[30:31]4992; SI-NEXT: .LBB25_3:4993; SI-NEXT: ; implicit-def: $sgpr114994; SI-NEXT: ; implicit-def: $sgpr104995; SI-NEXT: ; implicit-def: $sgpr94996; SI-NEXT: ; implicit-def: $sgpr84997; SI-NEXT: ; implicit-def: $sgpr74998; SI-NEXT: ; implicit-def: $sgpr64999; SI-NEXT: s_branch .LBB25_25000; SI-NEXT: .LBB25_4:5001; SI-NEXT: v_mov_b32_e32 v0, s115002; SI-NEXT: v_mov_b32_e32 v1, s105003; SI-NEXT: v_mov_b32_e32 v2, s95004; SI-NEXT: v_mov_b32_e32 v3, s85005; SI-NEXT: v_mov_b32_e32 v4, s75006; SI-NEXT: v_mov_b32_e32 v5, s65007; SI-NEXT: s_setpc_b64 s[30:31]5008;5009; VI-LABEL: bitcast_v3f32_to_v6bf16_scalar:5010; VI: ; %bb.0:5011; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5012; VI-NEXT: s_cmp_lg_u32 s19, 05013; VI-NEXT: s_cbranch_scc0 .LBB25_35014; VI-NEXT: ; %bb.1: ; %cmp.false5015; VI-NEXT: s_cbranch_execnz .LBB25_45016; VI-NEXT: .LBB25_2: ; %cmp.true5017; VI-NEXT: v_add_f32_e64 v2, s18, 1.05018; VI-NEXT: v_add_f32_e64 v1, s17, 1.05019; VI-NEXT: v_add_f32_e64 v0, s16, 1.05020; VI-NEXT: s_setpc_b64 s[30:31]5021; VI-NEXT: .LBB25_3:5022; VI-NEXT: s_branch .LBB25_25023; VI-NEXT: .LBB25_4:5024; VI-NEXT: v_mov_b32_e32 v0, s165025; VI-NEXT: v_mov_b32_e32 v1, s175026; VI-NEXT: v_mov_b32_e32 v2, s185027; VI-NEXT: v_mov_b32_e32 v3, s195028; VI-NEXT: s_setpc_b64 s[30:31]5029;5030; GFX9-LABEL: bitcast_v3f32_to_v6bf16_scalar:5031; GFX9: ; %bb.0:5032; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5033; GFX9-NEXT: s_cmp_lg_u32 s19, 05034; GFX9-NEXT: s_cbranch_scc0 .LBB25_35035; GFX9-NEXT: ; %bb.1: ; %cmp.false5036; GFX9-NEXT: s_cbranch_execnz .LBB25_45037; GFX9-NEXT: .LBB25_2: ; %cmp.true5038; GFX9-NEXT: v_add_f32_e64 v2, s18, 1.05039; GFX9-NEXT: v_add_f32_e64 v1, s17, 1.05040; GFX9-NEXT: v_add_f32_e64 v0, s16, 1.05041; GFX9-NEXT: s_setpc_b64 s[30:31]5042; GFX9-NEXT: .LBB25_3:5043; GFX9-NEXT: s_branch .LBB25_25044; GFX9-NEXT: .LBB25_4:5045; GFX9-NEXT: v_mov_b32_e32 v0, s165046; GFX9-NEXT: v_mov_b32_e32 v1, s175047; GFX9-NEXT: v_mov_b32_e32 v2, s185048; GFX9-NEXT: v_mov_b32_e32 v3, s195049; GFX9-NEXT: s_setpc_b64 s[30:31]5050;5051; GFX11-LABEL: bitcast_v3f32_to_v6bf16_scalar:5052; GFX11: ; %bb.0:5053; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5054; GFX11-NEXT: s_cmp_lg_u32 s3, 05055; GFX11-NEXT: s_mov_b32 s4, 05056; GFX11-NEXT: s_cbranch_scc0 .LBB25_35057; GFX11-NEXT: ; %bb.1: ; %Flow5058; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s45059; GFX11-NEXT: s_cbranch_vccnz .LBB25_45060; GFX11-NEXT: .LBB25_2: ; %cmp.true5061; GFX11-NEXT: v_add_f32_e64 v2, s2, 1.05062; GFX11-NEXT: v_add_f32_e64 v1, s1, 1.05063; GFX11-NEXT: v_add_f32_e64 v0, s0, 1.05064; GFX11-NEXT: s_setpc_b64 s[30:31]5065; GFX11-NEXT: .LBB25_3:5066; GFX11-NEXT: s_branch .LBB25_25067; GFX11-NEXT: .LBB25_4:5068; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s15069; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s35070; GFX11-NEXT: s_setpc_b64 s[30:31]5071 %cmp = icmp eq i32 %b, 05072 br i1 %cmp, label %cmp.true, label %cmp.false5073 5074cmp.true:5075 %a1 = fadd <3 x float> %a, splat (float 1.000000e+00)5076 %a2 = bitcast <3 x float> %a1 to <6 x bfloat>5077 br label %end5078 5079cmp.false:5080 %a3 = bitcast <3 x float> %a to <6 x bfloat>5081 br label %end5082 5083end:5084 %phi = phi <6 x bfloat> [ %a2, %cmp.true ], [ %a3, %cmp.false ]5085 ret <6 x bfloat> %phi5086}5087 5088define <3 x float> @bitcast_v6bf16_to_v3f32(<6 x bfloat> %a, i32 %b) {5089; SI-LABEL: bitcast_v6bf16_to_v3f32:5090; SI: ; %bb.0:5091; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5092; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v65093; SI-NEXT: v_mul_f32_e32 v8, 1.0, v15094; SI-NEXT: v_mul_f32_e32 v9, 1.0, v05095; SI-NEXT: v_mul_f32_e32 v6, 1.0, v35096; SI-NEXT: v_mul_f32_e32 v7, 1.0, v25097; SI-NEXT: v_mul_f32_e32 v3, 1.0, v55098; SI-NEXT: v_mul_f32_e32 v4, 1.0, v45099; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr25100; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc5101; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]5102; SI-NEXT: s_cbranch_execnz .LBB26_35103; SI-NEXT: ; %bb.1: ; %Flow5104; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5105; SI-NEXT: s_cbranch_execnz .LBB26_45106; SI-NEXT: .LBB26_2: ; %end5107; SI-NEXT: s_or_b64 exec, exec, s[4:5]5108; SI-NEXT: s_setpc_b64 s[30:31]5109; SI-NEXT: .LBB26_3: ; %cmp.false5110; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v85111; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v65112; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v35113; SI-NEXT: v_alignbit_b32 v0, v0, v9, 165114; SI-NEXT: v_alignbit_b32 v1, v1, v7, 165115; SI-NEXT: v_alignbit_b32 v2, v2, v4, 165116; SI-NEXT: ; implicit-def: $vgpr95117; SI-NEXT: ; implicit-def: $vgpr85118; SI-NEXT: ; implicit-def: $vgpr75119; SI-NEXT: ; implicit-def: $vgpr65120; SI-NEXT: ; implicit-def: $vgpr45121; SI-NEXT: ; implicit-def: $vgpr35122; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5123; SI-NEXT: s_cbranch_execz .LBB26_25124; SI-NEXT: .LBB26_4: ; %cmp.true5125; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v85126; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v95127; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v15128; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v05129; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v15130; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v65131; SI-NEXT: v_alignbit_b32 v0, v1, v0, 165132; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v75133; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v25134; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v15135; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v25136; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v35137; SI-NEXT: v_alignbit_b32 v1, v2, v1, 165138; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v45139; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v35140; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v25141; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35142; SI-NEXT: v_alignbit_b32 v2, v3, v2, 165143; SI-NEXT: s_or_b64 exec, exec, s[4:5]5144; SI-NEXT: s_setpc_b64 s[30:31]5145;5146; VI-LABEL: bitcast_v6bf16_to_v3f32:5147; VI: ; %bb.0:5148; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5149; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v35150; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc5151; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]5152; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5153; VI-NEXT: s_cbranch_execz .LBB26_25154; VI-NEXT: ; %bb.1: ; %cmp.true5155; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v25156; VI-NEXT: v_add_f32_e32 v3, 0x40c00000, v35157; VI-NEXT: v_bfe_u32 v4, v3, 16, 15158; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v35159; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v45160; VI-NEXT: v_and_b32_e32 v2, 0xffff0000, v25161; VI-NEXT: v_or_b32_e32 v5, 0x400000, v35162; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v35163; VI-NEXT: v_add_f32_e32 v2, 0x40c00000, v25164; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc5165; VI-NEXT: v_bfe_u32 v4, v2, 16, 15166; VI-NEXT: s_movk_i32 s6, 0x7fff5167; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v25168; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v45169; VI-NEXT: v_or_b32_e32 v5, 0x400000, v25170; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v25171; VI-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc5172; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v25173; VI-NEXT: v_alignbit_b32 v2, v2, v3, 165174; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v15175; VI-NEXT: v_add_f32_e32 v3, 0x40c00000, v35176; VI-NEXT: v_bfe_u32 v4, v3, 16, 15177; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v35178; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v45179; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v15180; VI-NEXT: v_or_b32_e32 v5, 0x400000, v35181; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v35182; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v15183; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc5184; VI-NEXT: v_bfe_u32 v4, v1, 16, 15185; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v15186; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v45187; VI-NEXT: v_or_b32_e32 v5, 0x400000, v15188; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v15189; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc5190; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v15191; VI-NEXT: v_alignbit_b32 v1, v1, v3, 165192; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v05193; VI-NEXT: v_add_f32_e32 v3, 0x40c00000, v35194; VI-NEXT: v_bfe_u32 v4, v3, 16, 15195; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v35196; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v45197; VI-NEXT: v_and_b32_e32 v0, 0xffff0000, v05198; VI-NEXT: v_or_b32_e32 v5, 0x400000, v35199; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v35200; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v05201; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc5202; VI-NEXT: v_bfe_u32 v4, v0, 16, 15203; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v05204; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v45205; VI-NEXT: v_or_b32_e32 v5, 0x400000, v05206; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v05207; VI-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc5208; VI-NEXT: v_lshrrev_b32_e32 v0, 16, v05209; VI-NEXT: v_alignbit_b32 v0, v0, v3, 165210; VI-NEXT: .LBB26_2: ; %end5211; VI-NEXT: s_or_b64 exec, exec, s[4:5]5212; VI-NEXT: s_setpc_b64 s[30:31]5213;5214; GFX9-LABEL: bitcast_v6bf16_to_v3f32:5215; GFX9: ; %bb.0:5216; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5217; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v35218; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc5219; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]5220; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5221; GFX9-NEXT: s_cbranch_execz .LBB26_25222; GFX9-NEXT: ; %bb.1: ; %cmp.true5223; GFX9-NEXT: v_and_b32_e32 v3, 0xffff0000, v25224; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v35225; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 15226; GFX9-NEXT: s_movk_i32 s6, 0x7fff5227; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v25228; GFX9-NEXT: v_add3_u32 v4, v4, v3, s65229; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v35230; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v35231; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v25232; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc5233; GFX9-NEXT: v_bfe_u32 v4, v2, 16, 15234; GFX9-NEXT: v_add3_u32 v4, v4, v2, s65235; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v25236; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v25237; GFX9-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc5238; GFX9-NEXT: s_mov_b32 s7, 0x70603025239; GFX9-NEXT: v_perm_b32 v2, v3, v2, s75240; GFX9-NEXT: v_and_b32_e32 v3, 0xffff0000, v15241; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v35242; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 15243; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v15244; GFX9-NEXT: v_add3_u32 v4, v4, v3, s65245; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v35246; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v35247; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v15248; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc5249; GFX9-NEXT: v_bfe_u32 v4, v1, 16, 15250; GFX9-NEXT: v_add3_u32 v4, v4, v1, s65251; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v15252; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v15253; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc5254; GFX9-NEXT: v_perm_b32 v1, v3, v1, s75255; GFX9-NEXT: v_and_b32_e32 v3, 0xffff0000, v05256; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v35257; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 15258; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v05259; GFX9-NEXT: v_add3_u32 v4, v4, v3, s65260; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v35261; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v35262; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v05263; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc5264; GFX9-NEXT: v_bfe_u32 v4, v0, 16, 15265; GFX9-NEXT: v_add3_u32 v4, v4, v0, s65266; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v05267; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v05268; GFX9-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc5269; GFX9-NEXT: v_perm_b32 v0, v3, v0, s75270; GFX9-NEXT: .LBB26_2: ; %end5271; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]5272; GFX9-NEXT: s_setpc_b64 s[30:31]5273;5274; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v3f32:5275; GFX11-TRUE16: ; %bb.0:5276; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5277; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v35278; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_vgpr4_vgpr55279; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo5280; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)5281; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s05282; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false5283; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, v15284; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, v05285; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25286; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow5287; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s05288; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB26_45289; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true5290; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, 05291; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v2.l5292; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v05293; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v25294; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)5295; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v45296; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v1.l5297; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v35298; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)5299; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 15300; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v55301; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v55302; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v35303; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v45304; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v5, 0x7fff5305; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l5306; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)5307; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc_lo5308; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v35309; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v15310; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v3, 16, 15311; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v11, 16, 15312; GFX11-TRUE16-NEXT: v_add3_u32 v0, v1, v3, 0x7fff5313; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)5314; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v0, v8 :: v_dual_add_f32 v2, 0x40c00000, v25315; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v65316; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v7.h5317; GFX11-TRUE16-NEXT: v_add3_u32 v7, v9, v11, 0x7fff5318; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v115319; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v2, 16, 15320; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 15321; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v115322; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v25323; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)5324; GFX11-TRUE16-NEXT: v_add3_u32 v1, v10, v2, 0x7fff5325; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo5326; GFX11-TRUE16-NEXT: v_add3_u32 v8, v9, v0, 0x7fff5327; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v05328; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v45329; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v4, 16, 15330; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v45331; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v45332; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)5333; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v4, 0x7fff5334; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v3, v10, vcc_lo5335; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v25336; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v1, v6, vcc_lo5337; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v05338; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v7.h5339; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo5340; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v10.h5341; GFX11-TRUE16-NEXT: .LBB26_4: ; %end5342; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s05343; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)5344; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v3 :: v_dual_mov_b32 v1, v45345; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, v55346; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]5347;5348; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v3f32:5349; GFX11-FAKE16: ; %bb.0:5350; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5351; GFX11-FAKE16-NEXT: s_mov_b32 s0, exec_lo5352; GFX11-FAKE16-NEXT: v_cmpx_ne_u32_e32 0, v35353; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s05354; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)5355; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s05356; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB26_25357; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.true5358; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v25359; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5360; GFX11-FAKE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v2, 16, v25361; GFX11-FAKE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v25362; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)5363; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v3, 16, 15364; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v35365; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v35366; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v2, 16, 15367; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v25368; GFX11-FAKE16-NEXT: v_add3_u32 v6, v6, v3, 0x7fff5369; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v15370; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v15371; GFX11-FAKE16-NEXT: v_add3_u32 v7, v7, v2, 0x7fff5372; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5373; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v6, v8, vcc_lo5374; GFX11-FAKE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v45375; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v25376; GFX11-FAKE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v15377; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)5378; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v4, 16, 15379; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v7, v9, vcc_lo5380; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v45381; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v45382; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v1, 16, 15383; GFX11-FAKE16-NEXT: v_add3_u32 v6, v10, v4, 0x7fff5384; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v05385; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v05386; GFX11-FAKE16-NEXT: v_perm_b32 v2, v3, v2, 0x70603025387; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)5388; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v4, v6, v7 :: v_dual_add_f32 v5, 0x40c00000, v55389; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v15390; GFX11-FAKE16-NEXT: v_add3_u32 v7, v8, v1, 0x7fff5391; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v15392; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v5, 16, 15393; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v55394; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)5395; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc_lo5396; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v55397; GFX11-FAKE16-NEXT: v_add3_u32 v9, v9, v5, 0x7fff5398; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5399; GFX11-FAKE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_cndmask_b32 v5, v9, v105400; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v0, 16, 15401; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v05402; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v05403; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)5404; GFX11-FAKE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff5405; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v6, v11, vcc_lo5406; GFX11-FAKE16-NEXT: v_perm_b32 v1, v4, v1, 0x70603025407; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)5408; GFX11-FAKE16-NEXT: v_perm_b32 v0, v5, v0, 0x70603025409; GFX11-FAKE16-NEXT: .LBB26_2: ; %end5410; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s05411; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]5412 %cmp = icmp eq i32 %b, 05413 br i1 %cmp, label %cmp.true, label %cmp.false5414 5415cmp.true:5416 %a1 = fadd <6 x bfloat> %a, splat (bfloat 0xR40C0)5417 %a2 = bitcast <6 x bfloat> %a1 to <3 x float>5418 br label %end5419 5420cmp.false:5421 %a3 = bitcast <6 x bfloat> %a to <3 x float>5422 br label %end5423 5424end:5425 %phi = phi <3 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]5426 ret <3 x float> %phi5427}5428 5429define inreg <3 x float> @bitcast_v6bf16_to_v3f32_scalar(<6 x bfloat> inreg %a, i32 inreg %b) {5430; SI-LABEL: bitcast_v6bf16_to_v3f32_scalar:5431; SI: ; %bb.0:5432; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5433; SI-NEXT: s_cmp_lg_u32 s22, 05434; SI-NEXT: v_mul_f32_e64 v12, 1.0, s175435; SI-NEXT: v_mul_f32_e64 v8, 1.0, s165436; SI-NEXT: v_mul_f32_e64 v11, 1.0, s195437; SI-NEXT: v_mul_f32_e64 v6, 1.0, s185438; SI-NEXT: v_mul_f32_e64 v10, 1.0, s215439; SI-NEXT: v_mul_f32_e64 v4, 1.0, s205440; SI-NEXT: s_cbranch_scc0 .LBB27_45441; SI-NEXT: ; %bb.1: ; %cmp.false5442; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v125443; SI-NEXT: v_lshr_b64 v[0:1], v[8:9], 165444; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v115445; SI-NEXT: v_lshr_b64 v[1:2], v[6:7], 165446; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v105447; SI-NEXT: v_lshr_b64 v[2:3], v[4:5], 165448; SI-NEXT: s_cbranch_execnz .LBB27_35449; SI-NEXT: .LBB27_2: ; %cmp.true5450; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v125451; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v85452; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v15453; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v05454; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v15455; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 165456; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v115457; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v65458; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v25459; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v15460; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v25461; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 165462; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v105463; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v45464; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v35465; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v25466; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35467; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 165468; SI-NEXT: .LBB27_3: ; %end5469; SI-NEXT: s_setpc_b64 s[30:31]5470; SI-NEXT: .LBB27_4:5471; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr25472; SI-NEXT: s_branch .LBB27_25473;5474; VI-LABEL: bitcast_v6bf16_to_v3f32_scalar:5475; VI: ; %bb.0:5476; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5477; VI-NEXT: s_cmp_lg_u32 s19, 05478; VI-NEXT: s_cbranch_scc0 .LBB27_35479; VI-NEXT: ; %bb.1: ; %cmp.false5480; VI-NEXT: s_cbranch_execnz .LBB27_45481; VI-NEXT: .LBB27_2: ; %cmp.true5482; VI-NEXT: s_lshl_b32 s4, s18, 165483; VI-NEXT: v_mov_b32_e32 v5, 0x40c000005484; VI-NEXT: v_add_f32_e32 v0, s4, v55485; VI-NEXT: v_bfe_u32 v1, v0, 16, 15486; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v05487; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v15488; VI-NEXT: v_or_b32_e32 v2, 0x400000, v05489; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v05490; VI-NEXT: s_and_b32 s4, s18, 0xffff00005491; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc5492; VI-NEXT: v_add_f32_e32 v1, s4, v55493; VI-NEXT: v_bfe_u32 v2, v1, 16, 15494; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v15495; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v25496; VI-NEXT: v_or_b32_e32 v3, 0x400000, v15497; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v15498; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc5499; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v15500; VI-NEXT: s_lshl_b32 s4, s17, 165501; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1]5502; VI-NEXT: v_add_f32_e32 v0, s4, v55503; VI-NEXT: v_bfe_u32 v1, v0, 16, 15504; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v05505; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v15506; VI-NEXT: v_or_b32_e32 v3, 0x400000, v05507; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v05508; VI-NEXT: s_and_b32 s4, s17, 0xffff00005509; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc5510; VI-NEXT: v_add_f32_e32 v1, s4, v55511; VI-NEXT: v_bfe_u32 v3, v1, 16, 15512; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v15513; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v35514; VI-NEXT: v_or_b32_e32 v4, 0x400000, v15515; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v15516; VI-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc5517; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v15518; VI-NEXT: s_lshl_b32 s4, s16, 165519; VI-NEXT: v_lshrrev_b64 v[3:4], 16, v[0:1]5520; VI-NEXT: v_add_f32_e32 v0, s4, v55521; VI-NEXT: v_bfe_u32 v1, v0, 16, 15522; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v05523; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v15524; VI-NEXT: v_or_b32_e32 v4, 0x400000, v05525; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v05526; VI-NEXT: s_and_b32 s4, s16, 0xffff00005527; VI-NEXT: v_cndmask_b32_e32 v0, v1, v4, vcc5528; VI-NEXT: v_add_f32_e32 v1, s4, v55529; VI-NEXT: v_bfe_u32 v4, v1, 16, 15530; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v15531; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v45532; VI-NEXT: v_or_b32_e32 v5, 0x400000, v15533; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v15534; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc5535; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v15536; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1]5537; VI-NEXT: v_mov_b32_e32 v1, v35538; VI-NEXT: s_setpc_b64 s[30:31]5539; VI-NEXT: .LBB27_3:5540; VI-NEXT: s_branch .LBB27_25541; VI-NEXT: .LBB27_4:5542; VI-NEXT: v_mov_b32_e32 v0, s165543; VI-NEXT: v_mov_b32_e32 v1, s175544; VI-NEXT: v_mov_b32_e32 v2, s185545; VI-NEXT: s_setpc_b64 s[30:31]5546;5547; GFX9-LABEL: bitcast_v6bf16_to_v3f32_scalar:5548; GFX9: ; %bb.0:5549; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5550; GFX9-NEXT: s_cmp_lg_u32 s19, 05551; GFX9-NEXT: s_cbranch_scc0 .LBB27_35552; GFX9-NEXT: ; %bb.1: ; %cmp.false5553; GFX9-NEXT: s_cbranch_execnz .LBB27_45554; GFX9-NEXT: .LBB27_2: ; %cmp.true5555; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s185556; GFX9-NEXT: v_mov_b32_e32 v0, 0x40c000005557; GFX9-NEXT: v_add_f32_e32 v1, s4, v05558; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 15559; GFX9-NEXT: v_add_u32_e32 v2, v2, v15560; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v25561; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v15562; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v15563; GFX9-NEXT: s_lshl_b32 s4, s18, 165564; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc5565; GFX9-NEXT: v_add_f32_e32 v2, s4, v05566; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 15567; GFX9-NEXT: v_add_u32_e32 v3, v3, v25568; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v35569; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v25570; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v25571; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc5572; GFX9-NEXT: v_mov_b32_e32 v3, 0xffff5573; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v15574; GFX9-NEXT: v_and_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_15575; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s175576; GFX9-NEXT: v_lshl_or_b32 v2, v1, 16, v25577; GFX9-NEXT: v_add_f32_e32 v1, s4, v05578; GFX9-NEXT: v_bfe_u32 v4, v1, 16, 15579; GFX9-NEXT: v_add_u32_e32 v4, v4, v15580; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v45581; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v15582; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v15583; GFX9-NEXT: s_lshl_b32 s4, s17, 165584; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc5585; GFX9-NEXT: v_add_f32_e32 v4, s4, v05586; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 15587; GFX9-NEXT: v_add_u32_e32 v5, v5, v45588; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v55589; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v45590; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v45591; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc5592; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v15593; GFX9-NEXT: v_and_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_15594; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s165595; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v45596; GFX9-NEXT: v_add_f32_e32 v4, s4, v05597; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 15598; GFX9-NEXT: v_add_u32_e32 v5, v5, v45599; GFX9-NEXT: s_lshl_b32 s4, s16, 165600; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v55601; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v45602; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v45603; GFX9-NEXT: v_add_f32_e32 v0, s4, v05604; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc5605; GFX9-NEXT: v_bfe_u32 v5, v0, 16, 15606; GFX9-NEXT: v_add_u32_e32 v5, v5, v05607; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v55608; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v05609; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v05610; GFX9-NEXT: v_cndmask_b32_e32 v0, v5, v6, vcc5611; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v45612; GFX9-NEXT: v_and_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_15613; GFX9-NEXT: v_lshl_or_b32 v0, v4, 16, v05614; GFX9-NEXT: s_setpc_b64 s[30:31]5615; GFX9-NEXT: .LBB27_3:5616; GFX9-NEXT: s_branch .LBB27_25617; GFX9-NEXT: .LBB27_4:5618; GFX9-NEXT: v_mov_b32_e32 v0, s165619; GFX9-NEXT: v_mov_b32_e32 v1, s175620; GFX9-NEXT: v_mov_b32_e32 v2, s185621; GFX9-NEXT: s_setpc_b64 s[30:31]5622;5623; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v3f32_scalar:5624; GFX11-TRUE16: ; %bb.0:5625; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5626; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 05627; GFX11-TRUE16-NEXT: s_mov_b32 s3, 05628; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB27_35629; GFX11-TRUE16-NEXT: ; %bb.1: ; %Flow5630; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s35631; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB27_45632; GFX11-TRUE16-NEXT: .LBB27_2: ; %cmp.true5633; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s25634; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 165635; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s35636; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s15637; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s25638; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s35639; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 165640; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v05641; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v05642; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 15643; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v3, 16, 15644; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 15645; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s15646; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v15647; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s05648; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v35649; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 165650; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v55651; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s25652; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)5653; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v75654; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v15655; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v45656; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v05657; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5658; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v25659; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo5660; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v15661; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v35662; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 15663; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)5664; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v05665; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v9, vcc_lo5666; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s05667; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v35668; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v6, 16, 15669; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v55670; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)5671; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v45672; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v7, v2, vcc_lo5673; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 15674; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v65675; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v15676; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v65677; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v35678; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v7, v45679; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v0.l5680; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)5681; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v15682; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v85683; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v95684; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v65685; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v8, v9, vcc_lo5686; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v55687; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)5688; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v65689; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v7, v10, vcc_lo5690; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v45691; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v1, v11, vcc_lo5692; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v55693; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l5694; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)5695; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v45696; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v6.l5697; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]5698; GFX11-TRUE16-NEXT: .LBB27_3:5699; GFX11-TRUE16-NEXT: s_branch .LBB27_25700; GFX11-TRUE16-NEXT: .LBB27_4:5701; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s15702; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s25703; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]5704;5705; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v3f32_scalar:5706; GFX11-FAKE16: ; %bb.0:5707; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5708; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 05709; GFX11-FAKE16-NEXT: s_mov_b32 s3, 05710; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB27_35711; GFX11-FAKE16-NEXT: ; %bb.1: ; %Flow5712; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s35713; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB27_45714; GFX11-FAKE16-NEXT: .LBB27_2: ; %cmp.true5715; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s25716; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 165717; GFX11-FAKE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s35718; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s25719; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s2, 0, s05720; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 165721; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s15722; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 15723; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 15724; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v05725; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v05726; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s05727; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v15728; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v3, v15729; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s35730; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 165731; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v75732; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s15733; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v35734; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v05735; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v4, 16, 15736; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s25737; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v55738; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)5739; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v25740; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo5741; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v15742; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v5, 16, 15743; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v7, 16, 15744; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)5745; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v05746; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo5747; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v10, v45748; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v45749; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v6, 16, 15750; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v8, v75751; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v55752; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v35753; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v55754; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v15755; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v85756; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)5757; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v25758; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v9, v65759; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v2, v2, v11 :: v_dual_and_b32 v1, 0xffff, v15760; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v75761; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)5762; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v95763; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v65764; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v25765; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v8, v12, vcc_lo5766; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v45767; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo5768; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v65769; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v25770; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v0, 16, v15771; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)5772; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v35773; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v5, v9, vcc_lo5774; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v75775; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v65776; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)5777; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v45778; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v55779; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)5780; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v4, 16, v55781; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]5782; GFX11-FAKE16-NEXT: .LBB27_3:5783; GFX11-FAKE16-NEXT: s_branch .LBB27_25784; GFX11-FAKE16-NEXT: .LBB27_4:5785; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s15786; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, s25787; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]5788 %cmp = icmp eq i32 %b, 05789 br i1 %cmp, label %cmp.true, label %cmp.false5790 5791cmp.true:5792 %a1 = fadd <6 x bfloat> %a, splat (bfloat 0xR40C0)5793 %a2 = bitcast <6 x bfloat> %a1 to <3 x float>5794 br label %end5795 5796cmp.false:5797 %a3 = bitcast <6 x bfloat> %a to <3 x float>5798 br label %end5799 5800end:5801 %phi = phi <3 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]5802 ret <3 x float> %phi5803}5804 5805define <6 x half> @bitcast_v3f32_to_v6f16(<3 x float> %a, i32 %b) {5806; SI-LABEL: bitcast_v3f32_to_v6f16:5807; SI: ; %bb.0:5808; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5809; SI-NEXT: v_mov_b32_e32 v8, v25810; SI-NEXT: v_mov_b32_e32 v7, v15811; SI-NEXT: v_mov_b32_e32 v6, v05812; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v35813; SI-NEXT: ; implicit-def: $vgpr05814; SI-NEXT: ; implicit-def: $vgpr15815; SI-NEXT: ; implicit-def: $vgpr25816; SI-NEXT: ; implicit-def: $vgpr35817; SI-NEXT: ; implicit-def: $vgpr45818; SI-NEXT: ; implicit-def: $vgpr55819; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc5820; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]5821; SI-NEXT: s_cbranch_execnz .LBB28_35822; SI-NEXT: ; %bb.1: ; %Flow5823; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5824; SI-NEXT: s_cbranch_execnz .LBB28_45825; SI-NEXT: .LBB28_2: ; %end5826; SI-NEXT: s_or_b64 exec, exec, s[4:5]5827; SI-NEXT: s_setpc_b64 s[30:31]5828; SI-NEXT: .LBB28_3: ; %cmp.false5829; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v85830; SI-NEXT: v_cvt_f32_f16_e32 v5, v05831; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v75832; SI-NEXT: v_cvt_f32_f16_e32 v3, v05833; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v65834; SI-NEXT: v_cvt_f32_f16_e32 v1, v05835; SI-NEXT: v_cvt_f32_f16_e32 v4, v85836; SI-NEXT: v_cvt_f32_f16_e32 v2, v75837; SI-NEXT: v_cvt_f32_f16_e32 v0, v65838; SI-NEXT: ; implicit-def: $vgpr65839; SI-NEXT: ; implicit-def: $vgpr75840; SI-NEXT: ; implicit-def: $vgpr85841; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5842; SI-NEXT: s_cbranch_execz .LBB28_25843; SI-NEXT: .LBB28_4: ; %cmp.true5844; SI-NEXT: v_add_f32_e32 v1, 1.0, v65845; SI-NEXT: v_add_f32_e32 v3, 1.0, v75846; SI-NEXT: v_add_f32_e32 v5, 1.0, v85847; SI-NEXT: v_cvt_f32_f16_e32 v4, v55848; SI-NEXT: v_cvt_f32_f16_e32 v2, v35849; SI-NEXT: v_cvt_f32_f16_e32 v0, v15850; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v55851; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35852; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v15853; SI-NEXT: v_cvt_f32_f16_e32 v5, v55854; SI-NEXT: v_cvt_f32_f16_e32 v3, v35855; SI-NEXT: v_cvt_f32_f16_e32 v1, v15856; SI-NEXT: s_or_b64 exec, exec, s[4:5]5857; SI-NEXT: s_setpc_b64 s[30:31]5858;5859; VI-LABEL: bitcast_v3f32_to_v6f16:5860; VI: ; %bb.0:5861; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5862; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v35863; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc5864; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]5865; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5866; VI-NEXT: ; %bb.1: ; %cmp.true5867; VI-NEXT: v_add_f32_e32 v2, 1.0, v25868; VI-NEXT: v_add_f32_e32 v1, 1.0, v15869; VI-NEXT: v_add_f32_e32 v0, 1.0, v05870; VI-NEXT: ; %bb.2: ; %end5871; VI-NEXT: s_or_b64 exec, exec, s[4:5]5872; VI-NEXT: s_setpc_b64 s[30:31]5873;5874; GFX9-LABEL: bitcast_v3f32_to_v6f16:5875; GFX9: ; %bb.0:5876; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5877; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v35878; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc5879; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]5880; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]5881; GFX9-NEXT: ; %bb.1: ; %cmp.true5882; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v25883; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v15884; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v05885; GFX9-NEXT: ; %bb.2: ; %end5886; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]5887; GFX9-NEXT: s_setpc_b64 s[30:31]5888;5889; GFX11-LABEL: bitcast_v3f32_to_v6f16:5890; GFX11: ; %bb.0:5891; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5892; GFX11-NEXT: s_mov_b32 s0, exec_lo5893; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v35894; GFX11-NEXT: s_xor_b32 s0, exec_lo, s05895; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)5896; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s05897; GFX11-NEXT: ; %bb.1: ; %cmp.true5898; GFX11-NEXT: v_dual_add_f32 v2, 1.0, v2 :: v_dual_add_f32 v1, 1.0, v15899; GFX11-NEXT: v_add_f32_e32 v0, 1.0, v05900; GFX11-NEXT: ; %bb.2: ; %end5901; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s05902; GFX11-NEXT: s_setpc_b64 s[30:31]5903 %cmp = icmp eq i32 %b, 05904 br i1 %cmp, label %cmp.true, label %cmp.false5905 5906cmp.true:5907 %a1 = fadd <3 x float> %a, splat (float 1.000000e+00)5908 %a2 = bitcast <3 x float> %a1 to <6 x half>5909 br label %end5910 5911cmp.false:5912 %a3 = bitcast <3 x float> %a to <6 x half>5913 br label %end5914 5915end:5916 %phi = phi <6 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]5917 ret <6 x half> %phi5918}5919 5920define inreg <6 x half> @bitcast_v3f32_to_v6f16_scalar(<3 x float> inreg %a, i32 inreg %b) {5921; SI-LABEL: bitcast_v3f32_to_v6f16_scalar:5922; SI: ; %bb.0:5923; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5924; SI-NEXT: s_cmp_lg_u32 s19, 05925; SI-NEXT: s_cbranch_scc0 .LBB29_45926; SI-NEXT: ; %bb.1: ; %cmp.false5927; SI-NEXT: s_lshr_b32 s4, s18, 165928; SI-NEXT: v_cvt_f32_f16_e32 v5, s45929; SI-NEXT: s_lshr_b32 s4, s17, 165930; SI-NEXT: v_cvt_f32_f16_e32 v3, s45931; SI-NEXT: s_lshr_b32 s4, s16, 165932; SI-NEXT: v_cvt_f32_f16_e32 v1, s45933; SI-NEXT: v_cvt_f32_f16_e32 v4, s185934; SI-NEXT: v_cvt_f32_f16_e32 v2, s175935; SI-NEXT: v_cvt_f32_f16_e32 v0, s165936; SI-NEXT: s_cbranch_execnz .LBB29_35937; SI-NEXT: .LBB29_2: ; %cmp.true5938; SI-NEXT: v_add_f32_e64 v1, s16, 1.05939; SI-NEXT: v_add_f32_e64 v3, s17, 1.05940; SI-NEXT: v_add_f32_e64 v5, s18, 1.05941; SI-NEXT: v_cvt_f32_f16_e32 v4, v55942; SI-NEXT: v_cvt_f32_f16_e32 v2, v35943; SI-NEXT: v_cvt_f32_f16_e32 v0, v15944; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v55945; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35946; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v15947; SI-NEXT: v_cvt_f32_f16_e32 v5, v55948; SI-NEXT: v_cvt_f32_f16_e32 v3, v35949; SI-NEXT: v_cvt_f32_f16_e32 v1, v15950; SI-NEXT: .LBB29_3: ; %end5951; SI-NEXT: s_setpc_b64 s[30:31]5952; SI-NEXT: .LBB29_4:5953; SI-NEXT: ; implicit-def: $vgpr05954; SI-NEXT: ; implicit-def: $vgpr15955; SI-NEXT: ; implicit-def: $vgpr25956; SI-NEXT: ; implicit-def: $vgpr35957; SI-NEXT: ; implicit-def: $vgpr45958; SI-NEXT: ; implicit-def: $vgpr55959; SI-NEXT: s_branch .LBB29_25960;5961; VI-LABEL: bitcast_v3f32_to_v6f16_scalar:5962; VI: ; %bb.0:5963; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5964; VI-NEXT: s_cmp_lg_u32 s19, 05965; VI-NEXT: s_cbranch_scc0 .LBB29_35966; VI-NEXT: ; %bb.1: ; %cmp.false5967; VI-NEXT: s_cbranch_execnz .LBB29_45968; VI-NEXT: .LBB29_2: ; %cmp.true5969; VI-NEXT: v_add_f32_e64 v2, s18, 1.05970; VI-NEXT: v_add_f32_e64 v1, s17, 1.05971; VI-NEXT: v_add_f32_e64 v0, s16, 1.05972; VI-NEXT: s_setpc_b64 s[30:31]5973; VI-NEXT: .LBB29_3:5974; VI-NEXT: s_branch .LBB29_25975; VI-NEXT: .LBB29_4:5976; VI-NEXT: v_mov_b32_e32 v0, s165977; VI-NEXT: v_mov_b32_e32 v1, s175978; VI-NEXT: v_mov_b32_e32 v2, s185979; VI-NEXT: v_mov_b32_e32 v3, s195980; VI-NEXT: s_setpc_b64 s[30:31]5981;5982; GFX9-LABEL: bitcast_v3f32_to_v6f16_scalar:5983; GFX9: ; %bb.0:5984; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5985; GFX9-NEXT: s_cmp_lg_u32 s19, 05986; GFX9-NEXT: s_cbranch_scc0 .LBB29_35987; GFX9-NEXT: ; %bb.1: ; %cmp.false5988; GFX9-NEXT: s_cbranch_execnz .LBB29_45989; GFX9-NEXT: .LBB29_2: ; %cmp.true5990; GFX9-NEXT: v_add_f32_e64 v2, s18, 1.05991; GFX9-NEXT: v_add_f32_e64 v1, s17, 1.05992; GFX9-NEXT: v_add_f32_e64 v0, s16, 1.05993; GFX9-NEXT: s_setpc_b64 s[30:31]5994; GFX9-NEXT: .LBB29_3:5995; GFX9-NEXT: s_branch .LBB29_25996; GFX9-NEXT: .LBB29_4:5997; GFX9-NEXT: v_mov_b32_e32 v0, s165998; GFX9-NEXT: v_mov_b32_e32 v1, s175999; GFX9-NEXT: v_mov_b32_e32 v2, s186000; GFX9-NEXT: v_mov_b32_e32 v3, s196001; GFX9-NEXT: s_setpc_b64 s[30:31]6002;6003; GFX11-LABEL: bitcast_v3f32_to_v6f16_scalar:6004; GFX11: ; %bb.0:6005; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6006; GFX11-NEXT: s_cmp_lg_u32 s3, 06007; GFX11-NEXT: s_mov_b32 s4, 06008; GFX11-NEXT: s_cbranch_scc0 .LBB29_36009; GFX11-NEXT: ; %bb.1: ; %Flow6010; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s46011; GFX11-NEXT: s_cbranch_vccnz .LBB29_46012; GFX11-NEXT: .LBB29_2: ; %cmp.true6013; GFX11-NEXT: v_add_f32_e64 v2, s2, 1.06014; GFX11-NEXT: v_add_f32_e64 v1, s1, 1.06015; GFX11-NEXT: v_add_f32_e64 v0, s0, 1.06016; GFX11-NEXT: s_setpc_b64 s[30:31]6017; GFX11-NEXT: .LBB29_3:6018; GFX11-NEXT: s_branch .LBB29_26019; GFX11-NEXT: .LBB29_4:6020; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s16021; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s36022; GFX11-NEXT: s_setpc_b64 s[30:31]6023 %cmp = icmp eq i32 %b, 06024 br i1 %cmp, label %cmp.true, label %cmp.false6025 6026cmp.true:6027 %a1 = fadd <3 x float> %a, splat (float 1.000000e+00)6028 %a2 = bitcast <3 x float> %a1 to <6 x half>6029 br label %end6030 6031cmp.false:6032 %a3 = bitcast <3 x float> %a to <6 x half>6033 br label %end6034 6035end:6036 %phi = phi <6 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]6037 ret <6 x half> %phi6038}6039 6040define <3 x float> @bitcast_v6f16_to_v3f32(<6 x half> %a, i32 %b) {6041; SI-LABEL: bitcast_v6f16_to_v3f32:6042; SI: ; %bb.0:6043; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6044; SI-NEXT: v_cvt_f16_f32_e32 v10, v16045; SI-NEXT: v_cvt_f16_f32_e32 v9, v06046; SI-NEXT: v_cvt_f16_f32_e32 v8, v36047; SI-NEXT: v_cvt_f16_f32_e32 v7, v26048; SI-NEXT: v_cvt_f16_f32_e32 v5, v56049; SI-NEXT: v_cvt_f16_f32_e32 v3, v46050; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v66051; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr26052; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc6053; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6054; SI-NEXT: s_cbranch_execnz .LBB30_36055; SI-NEXT: ; %bb.1: ; %Flow6056; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6057; SI-NEXT: s_cbranch_execnz .LBB30_46058; SI-NEXT: .LBB30_2: ; %end6059; SI-NEXT: s_or_b64 exec, exec, s[4:5]6060; SI-NEXT: s_setpc_b64 s[30:31]6061; SI-NEXT: .LBB30_3: ; %cmp.false6062; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v106063; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v86064; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v56065; SI-NEXT: v_or_b32_e32 v0, v9, v06066; SI-NEXT: v_or_b32_e32 v1, v7, v16067; SI-NEXT: v_or_b32_e32 v2, v3, v26068; SI-NEXT: ; implicit-def: $vgpr106069; SI-NEXT: ; implicit-def: $vgpr96070; SI-NEXT: ; implicit-def: $vgpr86071; SI-NEXT: ; implicit-def: $vgpr76072; SI-NEXT: ; implicit-def: $vgpr56073; SI-NEXT: ; implicit-def: $vgpr36074; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6075; SI-NEXT: s_cbranch_execz .LBB30_26076; SI-NEXT: .LBB30_4: ; %cmp.true6077; SI-NEXT: v_cvt_f32_f16_e32 v0, v106078; SI-NEXT: v_cvt_f32_f16_e32 v1, v96079; SI-NEXT: v_cvt_f32_f16_e32 v2, v86080; SI-NEXT: v_cvt_f32_f16_e32 v4, v76081; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v06082; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v16083; SI-NEXT: v_cvt_f16_f32_e32 v0, v06084; SI-NEXT: v_cvt_f16_f32_e32 v1, v16085; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v26086; SI-NEXT: v_cvt_f32_f16_e32 v3, v36087; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v06088; SI-NEXT: v_or_b32_e32 v0, v1, v06089; SI-NEXT: v_cvt_f16_f32_e32 v1, v26090; SI-NEXT: v_cvt_f32_f16_e32 v2, v56091; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v46092; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v36093; SI-NEXT: v_cvt_f16_f32_e32 v4, v46094; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v26095; SI-NEXT: v_cvt_f16_f32_e32 v2, v26096; SI-NEXT: v_cvt_f16_f32_e32 v3, v36097; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v16098; SI-NEXT: v_or_b32_e32 v1, v4, v16099; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v26100; SI-NEXT: v_or_b32_e32 v2, v3, v26101; SI-NEXT: s_or_b64 exec, exec, s[4:5]6102; SI-NEXT: s_setpc_b64 s[30:31]6103;6104; VI-LABEL: bitcast_v6f16_to_v3f32:6105; VI: ; %bb.0:6106; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6107; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v36108; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc6109; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6110; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6111; VI-NEXT: s_cbranch_execz .LBB30_26112; VI-NEXT: ; %bb.1: ; %cmp.true6113; VI-NEXT: v_mov_b32_e32 v3, 0x2006114; VI-NEXT: v_add_f16_sdwa v4, v2, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6115; VI-NEXT: v_add_f16_e32 v2, 0x200, v26116; VI-NEXT: v_or_b32_e32 v2, v2, v46117; VI-NEXT: v_add_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6118; VI-NEXT: v_add_f16_e32 v1, 0x200, v16119; VI-NEXT: v_add_f16_sdwa v3, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6120; VI-NEXT: v_add_f16_e32 v0, 0x200, v06121; VI-NEXT: v_or_b32_e32 v1, v1, v46122; VI-NEXT: v_or_b32_e32 v0, v0, v36123; VI-NEXT: .LBB30_2: ; %end6124; VI-NEXT: s_or_b64 exec, exec, s[4:5]6125; VI-NEXT: s_setpc_b64 s[30:31]6126;6127; GFX9-LABEL: bitcast_v6f16_to_v3f32:6128; GFX9: ; %bb.0:6129; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6130; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v36131; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc6132; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6133; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6134; GFX9-NEXT: ; %bb.1: ; %cmp.true6135; GFX9-NEXT: s_movk_i32 s6, 0x2006136; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0]6137; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0]6138; GFX9-NEXT: v_pk_add_f16 v0, v0, s6 op_sel_hi:[1,0]6139; GFX9-NEXT: ; %bb.2: ; %end6140; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]6141; GFX9-NEXT: s_setpc_b64 s[30:31]6142;6143; GFX11-LABEL: bitcast_v6f16_to_v3f32:6144; GFX11: ; %bb.0:6145; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6146; GFX11-NEXT: s_mov_b32 s0, exec_lo6147; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v36148; GFX11-NEXT: s_xor_b32 s0, exec_lo, s06149; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)6150; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s06151; GFX11-NEXT: ; %bb.1: ; %cmp.true6152; GFX11-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]6153; GFX11-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]6154; GFX11-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]6155; GFX11-NEXT: ; %bb.2: ; %end6156; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s06157; GFX11-NEXT: s_setpc_b64 s[30:31]6158 %cmp = icmp eq i32 %b, 06159 br i1 %cmp, label %cmp.true, label %cmp.false6160 6161cmp.true:6162 %a1 = fadd <6 x half> %a, splat (half 0xH0200)6163 %a2 = bitcast <6 x half> %a1 to <3 x float>6164 br label %end6165 6166cmp.false:6167 %a3 = bitcast <6 x half> %a to <3 x float>6168 br label %end6169 6170end:6171 %phi = phi <3 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]6172 ret <3 x float> %phi6173}6174 6175define inreg <3 x float> @bitcast_v6f16_to_v3f32_scalar(<6 x half> inreg %a, i32 inreg %b) {6176; SI-LABEL: bitcast_v6f16_to_v3f32_scalar:6177; SI: ; %bb.0:6178; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6179; SI-NEXT: v_cvt_f16_f32_e32 v8, s176180; SI-NEXT: v_cvt_f16_f32_e32 v7, s166181; SI-NEXT: v_cvt_f16_f32_e32 v6, s196182; SI-NEXT: v_cvt_f16_f32_e32 v5, s186183; SI-NEXT: v_cvt_f16_f32_e32 v4, s216184; SI-NEXT: v_cvt_f16_f32_e32 v3, s206185; SI-NEXT: s_cmp_lg_u32 s22, 06186; SI-NEXT: s_cbranch_scc0 .LBB31_46187; SI-NEXT: ; %bb.1: ; %cmp.false6188; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v86189; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v66190; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v46191; SI-NEXT: v_or_b32_e32 v0, v7, v06192; SI-NEXT: v_or_b32_e32 v1, v5, v16193; SI-NEXT: v_or_b32_e32 v2, v3, v26194; SI-NEXT: s_cbranch_execnz .LBB31_36195; SI-NEXT: .LBB31_2: ; %cmp.true6196; SI-NEXT: v_cvt_f32_f16_e32 v0, v86197; SI-NEXT: v_cvt_f32_f16_e32 v1, v76198; SI-NEXT: v_cvt_f32_f16_e32 v2, v66199; SI-NEXT: v_cvt_f32_f16_e32 v5, v56200; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v06201; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v16202; SI-NEXT: v_cvt_f16_f32_e32 v0, v06203; SI-NEXT: v_cvt_f16_f32_e32 v1, v16204; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v26205; SI-NEXT: v_cvt_f32_f16_e32 v3, v36206; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v06207; SI-NEXT: v_or_b32_e32 v0, v1, v06208; SI-NEXT: v_cvt_f16_f32_e32 v1, v26209; SI-NEXT: v_cvt_f32_f16_e32 v2, v46210; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v56211; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v36212; SI-NEXT: v_cvt_f16_f32_e32 v4, v46213; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v26214; SI-NEXT: v_cvt_f16_f32_e32 v2, v26215; SI-NEXT: v_cvt_f16_f32_e32 v3, v36216; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v16217; SI-NEXT: v_or_b32_e32 v1, v4, v16218; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v26219; SI-NEXT: v_or_b32_e32 v2, v3, v26220; SI-NEXT: .LBB31_3: ; %end6221; SI-NEXT: s_setpc_b64 s[30:31]6222; SI-NEXT: .LBB31_4:6223; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr26224; SI-NEXT: s_branch .LBB31_26225;6226; VI-LABEL: bitcast_v6f16_to_v3f32_scalar:6227; VI: ; %bb.0:6228; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6229; VI-NEXT: s_cmp_lg_u32 s19, 06230; VI-NEXT: s_cbranch_scc0 .LBB31_36231; VI-NEXT: ; %bb.1: ; %cmp.false6232; VI-NEXT: s_cbranch_execnz .LBB31_46233; VI-NEXT: .LBB31_2: ; %cmp.true6234; VI-NEXT: s_lshr_b32 s4, s18, 166235; VI-NEXT: v_mov_b32_e32 v0, 0x2006236; VI-NEXT: v_mov_b32_e32 v1, s46237; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6238; VI-NEXT: v_add_f16_e32 v2, s18, v06239; VI-NEXT: s_lshr_b32 s4, s17, 166240; VI-NEXT: v_or_b32_e32 v2, v2, v16241; VI-NEXT: v_mov_b32_e32 v1, s46242; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6243; VI-NEXT: v_add_f16_e32 v3, s17, v06244; VI-NEXT: s_lshr_b32 s4, s16, 166245; VI-NEXT: v_or_b32_e32 v1, v3, v16246; VI-NEXT: v_mov_b32_e32 v3, s46247; VI-NEXT: v_add_f16_sdwa v3, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6248; VI-NEXT: v_add_f16_e32 v0, s16, v06249; VI-NEXT: v_or_b32_e32 v0, v0, v36250; VI-NEXT: s_setpc_b64 s[30:31]6251; VI-NEXT: .LBB31_3:6252; VI-NEXT: s_branch .LBB31_26253; VI-NEXT: .LBB31_4:6254; VI-NEXT: v_mov_b32_e32 v0, s166255; VI-NEXT: v_mov_b32_e32 v1, s176256; VI-NEXT: v_mov_b32_e32 v2, s186257; VI-NEXT: s_setpc_b64 s[30:31]6258;6259; GFX9-LABEL: bitcast_v6f16_to_v3f32_scalar:6260; GFX9: ; %bb.0:6261; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6262; GFX9-NEXT: s_cmp_lg_u32 s19, 06263; GFX9-NEXT: s_cbranch_scc0 .LBB31_36264; GFX9-NEXT: ; %bb.1: ; %cmp.false6265; GFX9-NEXT: s_cbranch_execnz .LBB31_46266; GFX9-NEXT: .LBB31_2: ; %cmp.true6267; GFX9-NEXT: v_mov_b32_e32 v0, 0x2006268; GFX9-NEXT: v_pk_add_f16 v2, s18, v0 op_sel_hi:[1,0]6269; GFX9-NEXT: v_pk_add_f16 v1, s17, v0 op_sel_hi:[1,0]6270; GFX9-NEXT: v_pk_add_f16 v0, s16, v0 op_sel_hi:[1,0]6271; GFX9-NEXT: s_setpc_b64 s[30:31]6272; GFX9-NEXT: .LBB31_3:6273; GFX9-NEXT: s_branch .LBB31_26274; GFX9-NEXT: .LBB31_4:6275; GFX9-NEXT: v_mov_b32_e32 v0, s166276; GFX9-NEXT: v_mov_b32_e32 v1, s176277; GFX9-NEXT: v_mov_b32_e32 v2, s186278; GFX9-NEXT: s_setpc_b64 s[30:31]6279;6280; GFX11-LABEL: bitcast_v6f16_to_v3f32_scalar:6281; GFX11: ; %bb.0:6282; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6283; GFX11-NEXT: s_cmp_lg_u32 s3, 06284; GFX11-NEXT: s_mov_b32 s3, 06285; GFX11-NEXT: s_cbranch_scc0 .LBB31_36286; GFX11-NEXT: ; %bb.1: ; %Flow6287; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s36288; GFX11-NEXT: s_cbranch_vccnz .LBB31_46289; GFX11-NEXT: .LBB31_2: ; %cmp.true6290; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]6291; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]6292; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]6293; GFX11-NEXT: s_setpc_b64 s[30:31]6294; GFX11-NEXT: .LBB31_3:6295; GFX11-NEXT: s_branch .LBB31_26296; GFX11-NEXT: .LBB31_4:6297; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s16298; GFX11-NEXT: v_mov_b32_e32 v2, s26299; GFX11-NEXT: s_setpc_b64 s[30:31]6300 %cmp = icmp eq i32 %b, 06301 br i1 %cmp, label %cmp.true, label %cmp.false6302 6303cmp.true:6304 %a1 = fadd <6 x half> %a, splat (half 0xH0200)6305 %a2 = bitcast <6 x half> %a1 to <3 x float>6306 br label %end6307 6308cmp.false:6309 %a3 = bitcast <6 x half> %a to <3 x float>6310 br label %end6311 6312end:6313 %phi = phi <3 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]6314 ret <3 x float> %phi6315}6316 6317define <6 x i16> @bitcast_v3f32_to_v6i16(<3 x float> %a, i32 %b) {6318; SI-LABEL: bitcast_v3f32_to_v6i16:6319; SI: ; %bb.0:6320; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6321; SI-NEXT: v_mov_b32_e32 v4, v26322; SI-NEXT: v_mov_b32_e32 v2, v16323; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v36324; SI-NEXT: ; implicit-def: $vgpr16325; SI-NEXT: ; implicit-def: $vgpr36326; SI-NEXT: ; implicit-def: $vgpr56327; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc6328; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6329; SI-NEXT: s_cbranch_execnz .LBB32_36330; SI-NEXT: ; %bb.1: ; %Flow6331; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6332; SI-NEXT: s_cbranch_execnz .LBB32_46333; SI-NEXT: .LBB32_2: ; %end6334; SI-NEXT: s_or_b64 exec, exec, s[4:5]6335; SI-NEXT: s_setpc_b64 s[30:31]6336; SI-NEXT: .LBB32_3: ; %cmp.false6337; SI-NEXT: v_alignbit_b32 v5, v0, v4, 166338; SI-NEXT: v_alignbit_b32 v1, v2, v0, 166339; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v26340; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6341; SI-NEXT: s_cbranch_execz .LBB32_26342; SI-NEXT: .LBB32_4: ; %cmp.true6343; SI-NEXT: v_add_f32_e32 v4, 1.0, v46344; SI-NEXT: v_add_f32_e32 v2, 1.0, v26345; SI-NEXT: v_add_f32_e32 v0, 1.0, v06346; SI-NEXT: v_alignbit_b32 v1, v2, v0, 166347; SI-NEXT: v_alignbit_b32 v5, v0, v4, 166348; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v26349; SI-NEXT: s_or_b64 exec, exec, s[4:5]6350; SI-NEXT: s_setpc_b64 s[30:31]6351;6352; VI-LABEL: bitcast_v3f32_to_v6i16:6353; VI: ; %bb.0:6354; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6355; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v36356; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc6357; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6358; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6359; VI-NEXT: ; %bb.1: ; %cmp.true6360; VI-NEXT: v_add_f32_e32 v2, 1.0, v26361; VI-NEXT: v_add_f32_e32 v1, 1.0, v16362; VI-NEXT: v_add_f32_e32 v0, 1.0, v06363; VI-NEXT: ; %bb.2: ; %end6364; VI-NEXT: s_or_b64 exec, exec, s[4:5]6365; VI-NEXT: s_setpc_b64 s[30:31]6366;6367; GFX9-LABEL: bitcast_v3f32_to_v6i16:6368; GFX9: ; %bb.0:6369; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6370; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v36371; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc6372; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6373; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6374; GFX9-NEXT: ; %bb.1: ; %cmp.true6375; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v26376; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v16377; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v06378; GFX9-NEXT: ; %bb.2: ; %end6379; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]6380; GFX9-NEXT: s_setpc_b64 s[30:31]6381;6382; GFX11-LABEL: bitcast_v3f32_to_v6i16:6383; GFX11: ; %bb.0:6384; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6385; GFX11-NEXT: s_mov_b32 s0, exec_lo6386; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v36387; GFX11-NEXT: s_xor_b32 s0, exec_lo, s06388; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)6389; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s06390; GFX11-NEXT: ; %bb.1: ; %cmp.true6391; GFX11-NEXT: v_dual_add_f32 v2, 1.0, v2 :: v_dual_add_f32 v1, 1.0, v16392; GFX11-NEXT: v_add_f32_e32 v0, 1.0, v06393; GFX11-NEXT: ; %bb.2: ; %end6394; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s06395; GFX11-NEXT: s_setpc_b64 s[30:31]6396 %cmp = icmp eq i32 %b, 06397 br i1 %cmp, label %cmp.true, label %cmp.false6398 6399cmp.true:6400 %a1 = fadd <3 x float> %a, splat (float 1.000000e+00)6401 %a2 = bitcast <3 x float> %a1 to <6 x i16>6402 br label %end6403 6404cmp.false:6405 %a3 = bitcast <3 x float> %a to <6 x i16>6406 br label %end6407 6408end:6409 %phi = phi <6 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]6410 ret <6 x i16> %phi6411}6412 6413define inreg <6 x i16> @bitcast_v3f32_to_v6i16_scalar(<3 x float> inreg %a, i32 inreg %b) {6414; SI-LABEL: bitcast_v3f32_to_v6i16_scalar:6415; SI: ; %bb.0:6416; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6417; SI-NEXT: s_cmp_lg_u32 s19, 06418; SI-NEXT: s_cbranch_scc0 .LBB33_36419; SI-NEXT: ; %bb.1: ; %cmp.false6420; SI-NEXT: s_lshr_b32 s10, s17, 166421; SI-NEXT: s_lshr_b64 s[4:5], s[18:19], 166422; SI-NEXT: s_lshr_b64 s[6:7], s[16:17], 166423; SI-NEXT: s_cbranch_execnz .LBB33_46424; SI-NEXT: .LBB33_2: ; %cmp.true6425; SI-NEXT: v_add_f32_e64 v4, s18, 1.06426; SI-NEXT: v_add_f32_e64 v8, s17, 1.06427; SI-NEXT: v_add_f32_e64 v7, s16, 1.06428; SI-NEXT: v_lshr_b64 v[1:2], v[7:8], 166429; SI-NEXT: v_lshr_b64 v[5:6], v[4:5], 166430; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v86431; SI-NEXT: s_branch .LBB33_56432; SI-NEXT: .LBB33_3:6433; SI-NEXT: ; implicit-def: $sgpr66434; SI-NEXT: ; implicit-def: $sgpr106435; SI-NEXT: ; implicit-def: $sgpr46436; SI-NEXT: s_branch .LBB33_26437; SI-NEXT: .LBB33_4:6438; SI-NEXT: v_mov_b32_e32 v7, s166439; SI-NEXT: v_mov_b32_e32 v8, s176440; SI-NEXT: v_mov_b32_e32 v4, s186441; SI-NEXT: v_mov_b32_e32 v3, s106442; SI-NEXT: v_mov_b32_e32 v5, s46443; SI-NEXT: v_mov_b32_e32 v1, s66444; SI-NEXT: .LBB33_5: ; %end6445; SI-NEXT: v_mov_b32_e32 v0, v76446; SI-NEXT: v_mov_b32_e32 v2, v86447; SI-NEXT: s_setpc_b64 s[30:31]6448;6449; VI-LABEL: bitcast_v3f32_to_v6i16_scalar:6450; VI: ; %bb.0:6451; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6452; VI-NEXT: s_cmp_lg_u32 s19, 06453; VI-NEXT: s_cbranch_scc0 .LBB33_36454; VI-NEXT: ; %bb.1: ; %cmp.false6455; VI-NEXT: s_cbranch_execnz .LBB33_46456; VI-NEXT: .LBB33_2: ; %cmp.true6457; VI-NEXT: v_add_f32_e64 v2, s18, 1.06458; VI-NEXT: v_add_f32_e64 v1, s17, 1.06459; VI-NEXT: v_add_f32_e64 v0, s16, 1.06460; VI-NEXT: s_setpc_b64 s[30:31]6461; VI-NEXT: .LBB33_3:6462; VI-NEXT: s_branch .LBB33_26463; VI-NEXT: .LBB33_4:6464; VI-NEXT: v_mov_b32_e32 v0, s166465; VI-NEXT: v_mov_b32_e32 v1, s176466; VI-NEXT: v_mov_b32_e32 v2, s186467; VI-NEXT: v_mov_b32_e32 v3, s196468; VI-NEXT: s_setpc_b64 s[30:31]6469;6470; GFX9-LABEL: bitcast_v3f32_to_v6i16_scalar:6471; GFX9: ; %bb.0:6472; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6473; GFX9-NEXT: s_cmp_lg_u32 s19, 06474; GFX9-NEXT: s_cbranch_scc0 .LBB33_36475; GFX9-NEXT: ; %bb.1: ; %cmp.false6476; GFX9-NEXT: s_cbranch_execnz .LBB33_46477; GFX9-NEXT: .LBB33_2: ; %cmp.true6478; GFX9-NEXT: v_add_f32_e64 v2, s18, 1.06479; GFX9-NEXT: v_add_f32_e64 v1, s17, 1.06480; GFX9-NEXT: v_add_f32_e64 v0, s16, 1.06481; GFX9-NEXT: s_setpc_b64 s[30:31]6482; GFX9-NEXT: .LBB33_3:6483; GFX9-NEXT: s_branch .LBB33_26484; GFX9-NEXT: .LBB33_4:6485; GFX9-NEXT: v_mov_b32_e32 v0, s166486; GFX9-NEXT: v_mov_b32_e32 v1, s176487; GFX9-NEXT: v_mov_b32_e32 v2, s186488; GFX9-NEXT: v_mov_b32_e32 v3, s196489; GFX9-NEXT: s_setpc_b64 s[30:31]6490;6491; GFX11-LABEL: bitcast_v3f32_to_v6i16_scalar:6492; GFX11: ; %bb.0:6493; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6494; GFX11-NEXT: s_cmp_lg_u32 s3, 06495; GFX11-NEXT: s_mov_b32 s4, 06496; GFX11-NEXT: s_cbranch_scc0 .LBB33_36497; GFX11-NEXT: ; %bb.1: ; %Flow6498; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s46499; GFX11-NEXT: s_cbranch_vccnz .LBB33_46500; GFX11-NEXT: .LBB33_2: ; %cmp.true6501; GFX11-NEXT: v_add_f32_e64 v2, s2, 1.06502; GFX11-NEXT: v_add_f32_e64 v1, s1, 1.06503; GFX11-NEXT: v_add_f32_e64 v0, s0, 1.06504; GFX11-NEXT: s_setpc_b64 s[30:31]6505; GFX11-NEXT: .LBB33_3:6506; GFX11-NEXT: s_branch .LBB33_26507; GFX11-NEXT: .LBB33_4:6508; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s16509; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s36510; GFX11-NEXT: s_setpc_b64 s[30:31]6511 %cmp = icmp eq i32 %b, 06512 br i1 %cmp, label %cmp.true, label %cmp.false6513 6514cmp.true:6515 %a1 = fadd <3 x float> %a, splat (float 1.000000e+00)6516 %a2 = bitcast <3 x float> %a1 to <6 x i16>6517 br label %end6518 6519cmp.false:6520 %a3 = bitcast <3 x float> %a to <6 x i16>6521 br label %end6522 6523end:6524 %phi = phi <6 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]6525 ret <6 x i16> %phi6526}6527 6528define <3 x float> @bitcast_v6i16_to_v3f32(<6 x i16> %a, i32 %b) {6529; SI-LABEL: bitcast_v6i16_to_v3f32:6530; SI: ; %bb.0:6531; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6532; SI-NEXT: v_mov_b32_e32 v8, v26533; SI-NEXT: v_mov_b32_e32 v7, v06534; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v66535; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v16536; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36537; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v56538; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr26539; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc6540; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6541; SI-NEXT: s_cbranch_execnz .LBB34_36542; SI-NEXT: ; %bb.1: ; %Flow6543; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6544; SI-NEXT: s_cbranch_execnz .LBB34_46545; SI-NEXT: .LBB34_2: ; %end6546; SI-NEXT: s_or_b64 exec, exec, s[4:5]6547; SI-NEXT: s_setpc_b64 s[30:31]6548; SI-NEXT: .LBB34_3: ; %cmp.false6549; SI-NEXT: v_and_b32_e32 v0, 0xffff, v76550; SI-NEXT: v_and_b32_e32 v1, 0xffff, v86551; SI-NEXT: v_and_b32_e32 v2, 0xffff, v46552; SI-NEXT: v_or_b32_e32 v0, v0, v96553; SI-NEXT: v_or_b32_e32 v1, v1, v66554; SI-NEXT: v_or_b32_e32 v2, v2, v36555; SI-NEXT: ; implicit-def: $vgpr76556; SI-NEXT: ; implicit-def: $vgpr96557; SI-NEXT: ; implicit-def: $vgpr86558; SI-NEXT: ; implicit-def: $vgpr66559; SI-NEXT: ; implicit-def: $vgpr46560; SI-NEXT: ; implicit-def: $vgpr36561; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6562; SI-NEXT: s_cbranch_execz .LBB34_26563; SI-NEXT: .LBB34_4: ; %cmp.true6564; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v76565; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v86566; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v46567; SI-NEXT: v_and_b32_e32 v0, 0xffff, v06568; SI-NEXT: v_and_b32_e32 v1, 0xffff, v16569; SI-NEXT: v_and_b32_e32 v2, 0xffff, v26570; SI-NEXT: v_or_b32_e32 v0, v9, v06571; SI-NEXT: v_or_b32_e32 v1, v6, v16572; SI-NEXT: v_or_b32_e32 v2, v3, v26573; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v06574; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v16575; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v26576; SI-NEXT: s_or_b64 exec, exec, s[4:5]6577; SI-NEXT: s_setpc_b64 s[30:31]6578;6579; VI-LABEL: bitcast_v6i16_to_v3f32:6580; VI: ; %bb.0:6581; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6582; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v36583; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc6584; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6585; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6586; VI-NEXT: s_cbranch_execz .LBB34_26587; VI-NEXT: ; %bb.1: ; %cmp.true6588; VI-NEXT: v_mov_b32_e32 v4, 36589; VI-NEXT: v_add_u16_e32 v3, 3, v26590; VI-NEXT: v_add_u16_sdwa v2, v2, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6591; VI-NEXT: v_or_b32_e32 v2, v3, v26592; VI-NEXT: v_add_u16_e32 v3, 3, v16593; VI-NEXT: v_add_u16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6594; VI-NEXT: v_or_b32_e32 v1, v3, v16595; VI-NEXT: v_add_u16_e32 v3, 3, v06596; VI-NEXT: v_add_u16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6597; VI-NEXT: v_or_b32_e32 v0, v3, v06598; VI-NEXT: .LBB34_2: ; %end6599; VI-NEXT: s_or_b64 exec, exec, s[4:5]6600; VI-NEXT: s_setpc_b64 s[30:31]6601;6602; GFX9-LABEL: bitcast_v6i16_to_v3f32:6603; GFX9: ; %bb.0:6604; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6605; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v36606; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc6607; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6608; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6609; GFX9-NEXT: ; %bb.1: ; %cmp.true6610; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]6611; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]6612; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]6613; GFX9-NEXT: ; %bb.2: ; %end6614; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]6615; GFX9-NEXT: s_setpc_b64 s[30:31]6616;6617; GFX11-LABEL: bitcast_v6i16_to_v3f32:6618; GFX11: ; %bb.0:6619; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6620; GFX11-NEXT: s_mov_b32 s0, exec_lo6621; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v36622; GFX11-NEXT: s_xor_b32 s0, exec_lo, s06623; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)6624; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s06625; GFX11-NEXT: ; %bb.1: ; %cmp.true6626; GFX11-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]6627; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]6628; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]6629; GFX11-NEXT: ; %bb.2: ; %end6630; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s06631; GFX11-NEXT: s_setpc_b64 s[30:31]6632 %cmp = icmp eq i32 %b, 06633 br i1 %cmp, label %cmp.true, label %cmp.false6634 6635cmp.true:6636 %a1 = add <6 x i16> %a, splat (i16 3)6637 %a2 = bitcast <6 x i16> %a1 to <3 x float>6638 br label %end6639 6640cmp.false:6641 %a3 = bitcast <6 x i16> %a to <3 x float>6642 br label %end6643 6644end:6645 %phi = phi <3 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]6646 ret <3 x float> %phi6647}6648 6649define inreg <3 x float> @bitcast_v6i16_to_v3f32_scalar(<6 x i16> inreg %a, i32 inreg %b) {6650; SI-LABEL: bitcast_v6i16_to_v3f32_scalar:6651; SI: ; %bb.0:6652; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6653; SI-NEXT: s_cmp_lg_u32 s22, 06654; SI-NEXT: s_cbranch_scc0 .LBB35_46655; SI-NEXT: ; %bb.1: ; %cmp.false6656; SI-NEXT: s_and_b32 s4, s16, 0xffff6657; SI-NEXT: s_lshl_b32 s5, s17, 166658; SI-NEXT: s_or_b32 s4, s4, s56659; SI-NEXT: s_and_b32 s5, s18, 0xffff6660; SI-NEXT: s_lshl_b32 s6, s19, 166661; SI-NEXT: s_or_b32 s5, s5, s66662; SI-NEXT: s_and_b32 s6, s20, 0xffff6663; SI-NEXT: s_lshl_b32 s7, s21, 166664; SI-NEXT: s_or_b32 s6, s6, s76665; SI-NEXT: s_cbranch_execnz .LBB35_36666; SI-NEXT: .LBB35_2: ; %cmp.true6667; SI-NEXT: s_add_i32 s16, s16, 36668; SI-NEXT: s_and_b32 s4, s16, 0xffff6669; SI-NEXT: s_lshl_b32 s5, s17, 166670; SI-NEXT: s_add_i32 s18, s18, 36671; SI-NEXT: s_or_b32 s4, s5, s46672; SI-NEXT: s_and_b32 s5, s18, 0xffff6673; SI-NEXT: s_lshl_b32 s6, s19, 166674; SI-NEXT: s_add_i32 s20, s20, 36675; SI-NEXT: s_or_b32 s5, s6, s56676; SI-NEXT: s_and_b32 s6, s20, 0xffff6677; SI-NEXT: s_lshl_b32 s7, s21, 166678; SI-NEXT: s_or_b32 s6, s7, s66679; SI-NEXT: s_add_i32 s4, s4, 0x300006680; SI-NEXT: s_add_i32 s5, s5, 0x300006681; SI-NEXT: s_add_i32 s6, s6, 0x300006682; SI-NEXT: .LBB35_3: ; %end6683; SI-NEXT: v_mov_b32_e32 v0, s46684; SI-NEXT: v_mov_b32_e32 v1, s56685; SI-NEXT: v_mov_b32_e32 v2, s66686; SI-NEXT: s_setpc_b64 s[30:31]6687; SI-NEXT: .LBB35_4:6688; SI-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr66689; SI-NEXT: s_branch .LBB35_26690;6691; VI-LABEL: bitcast_v6i16_to_v3f32_scalar:6692; VI: ; %bb.0:6693; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6694; VI-NEXT: s_cmp_lg_u32 s19, 06695; VI-NEXT: s_cbranch_scc0 .LBB35_46696; VI-NEXT: ; %bb.1: ; %cmp.false6697; VI-NEXT: s_cbranch_execnz .LBB35_36698; VI-NEXT: .LBB35_2: ; %cmp.true6699; VI-NEXT: s_add_i32 s5, s18, 36700; VI-NEXT: s_and_b32 s4, s18, 0xffff00006701; VI-NEXT: s_and_b32 s5, s5, 0xffff6702; VI-NEXT: s_or_b32 s4, s4, s56703; VI-NEXT: s_add_i32 s5, s17, 36704; VI-NEXT: s_add_i32 s18, s4, 0x300006705; VI-NEXT: s_and_b32 s4, s17, 0xffff00006706; VI-NEXT: s_and_b32 s5, s5, 0xffff6707; VI-NEXT: s_or_b32 s4, s4, s56708; VI-NEXT: s_add_i32 s5, s16, 36709; VI-NEXT: s_add_i32 s17, s4, 0x300006710; VI-NEXT: s_and_b32 s4, s16, 0xffff00006711; VI-NEXT: s_and_b32 s5, s5, 0xffff6712; VI-NEXT: s_or_b32 s4, s4, s56713; VI-NEXT: s_add_i32 s16, s4, 0x300006714; VI-NEXT: .LBB35_3: ; %end6715; VI-NEXT: v_mov_b32_e32 v0, s166716; VI-NEXT: v_mov_b32_e32 v1, s176717; VI-NEXT: v_mov_b32_e32 v2, s186718; VI-NEXT: s_setpc_b64 s[30:31]6719; VI-NEXT: .LBB35_4:6720; VI-NEXT: s_branch .LBB35_26721;6722; GFX9-LABEL: bitcast_v6i16_to_v3f32_scalar:6723; GFX9: ; %bb.0:6724; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6725; GFX9-NEXT: s_cmp_lg_u32 s19, 06726; GFX9-NEXT: s_cbranch_scc0 .LBB35_36727; GFX9-NEXT: ; %bb.1: ; %cmp.false6728; GFX9-NEXT: s_cbranch_execnz .LBB35_46729; GFX9-NEXT: .LBB35_2: ; %cmp.true6730; GFX9-NEXT: v_pk_add_u16 v2, s18, 3 op_sel_hi:[1,0]6731; GFX9-NEXT: v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]6732; GFX9-NEXT: v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]6733; GFX9-NEXT: s_setpc_b64 s[30:31]6734; GFX9-NEXT: .LBB35_3:6735; GFX9-NEXT: s_branch .LBB35_26736; GFX9-NEXT: .LBB35_4:6737; GFX9-NEXT: v_mov_b32_e32 v0, s166738; GFX9-NEXT: v_mov_b32_e32 v1, s176739; GFX9-NEXT: v_mov_b32_e32 v2, s186740; GFX9-NEXT: s_setpc_b64 s[30:31]6741;6742; GFX11-LABEL: bitcast_v6i16_to_v3f32_scalar:6743; GFX11: ; %bb.0:6744; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6745; GFX11-NEXT: s_cmp_lg_u32 s3, 06746; GFX11-NEXT: s_mov_b32 s3, 06747; GFX11-NEXT: s_cbranch_scc0 .LBB35_36748; GFX11-NEXT: ; %bb.1: ; %Flow6749; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s36750; GFX11-NEXT: s_cbranch_vccnz .LBB35_46751; GFX11-NEXT: .LBB35_2: ; %cmp.true6752; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]6753; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]6754; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]6755; GFX11-NEXT: s_setpc_b64 s[30:31]6756; GFX11-NEXT: .LBB35_3:6757; GFX11-NEXT: s_branch .LBB35_26758; GFX11-NEXT: .LBB35_4:6759; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s16760; GFX11-NEXT: v_mov_b32_e32 v2, s26761; GFX11-NEXT: s_setpc_b64 s[30:31]6762 %cmp = icmp eq i32 %b, 06763 br i1 %cmp, label %cmp.true, label %cmp.false6764 6765cmp.true:6766 %a1 = add <6 x i16> %a, splat (i16 3)6767 %a2 = bitcast <6 x i16> %a1 to <3 x float>6768 br label %end6769 6770cmp.false:6771 %a3 = bitcast <6 x i16> %a to <3 x float>6772 br label %end6773 6774end:6775 %phi = phi <3 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]6776 ret <3 x float> %phi6777}6778 6779define <6 x bfloat> @bitcast_v12i8_to_v6bf16(<12 x i8> %a, i32 %b) {6780; SI-LABEL: bitcast_v12i8_to_v6bf16:6781; SI: ; %bb.0:6782; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6783; SI-NEXT: v_mov_b32_e32 v14, v16784; SI-NEXT: v_mov_b32_e32 v13, v06785; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v126786; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v36787; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v56788; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v76789; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v116790; SI-NEXT: ; implicit-def: $vgpr06791; SI-NEXT: ; implicit-def: $vgpr16792; SI-NEXT: ; implicit-def: $vgpr126793; SI-NEXT: ; implicit-def: $vgpr36794; SI-NEXT: ; implicit-def: $vgpr116795; SI-NEXT: ; implicit-def: $vgpr56796; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc6797; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6798; SI-NEXT: s_cbranch_execz .LBB36_26799; SI-NEXT: ; %bb.1: ; %cmp.false6800; SI-NEXT: v_and_b32_e32 v0, 0xff, v136801; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v06802; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v146803; SI-NEXT: v_or_b32_e32 v0, v1, v06804; SI-NEXT: v_and_b32_e32 v1, 0xff, v26805; SI-NEXT: v_and_b32_e32 v2, 0xff, v46806; SI-NEXT: v_or_b32_e32 v2, v2, v176807; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v26808; SI-NEXT: v_and_b32_e32 v2, 0xff, v66809; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v26810; SI-NEXT: v_or_b32_e32 v3, v7, v26811; SI-NEXT: v_and_b32_e32 v2, 0xff, v86812; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v26813; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v96814; SI-NEXT: v_or_b32_e32 v11, v4, v26815; SI-NEXT: v_and_b32_e32 v2, 0xff, v106816; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v16817; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v26818; SI-NEXT: v_or_b32_e32 v1, v15, v16819; SI-NEXT: v_or_b32_e32 v5, v16, v26820; SI-NEXT: ; implicit-def: $vgpr136821; SI-NEXT: ; implicit-def: $vgpr146822; SI-NEXT: ; implicit-def: $vgpr26823; SI-NEXT: ; implicit-def: $vgpr46824; SI-NEXT: ; implicit-def: $vgpr66825; SI-NEXT: ; implicit-def: $vgpr86826; SI-NEXT: ; implicit-def: $vgpr96827; SI-NEXT: ; implicit-def: $vgpr106828; SI-NEXT: ; implicit-def: $vgpr156829; SI-NEXT: ; implicit-def: $vgpr176830; SI-NEXT: ; implicit-def: $vgpr76831; SI-NEXT: ; implicit-def: $vgpr166832; SI-NEXT: .LBB36_2: ; %Flow6833; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6834; SI-NEXT: s_cbranch_execz .LBB36_46835; SI-NEXT: ; %bb.3: ; %cmp.true6836; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v86837; SI-NEXT: v_and_b32_e32 v0, 0xff, v06838; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v96839; SI-NEXT: v_or_b32_e32 v0, v1, v06840; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v106841; SI-NEXT: v_and_b32_e32 v1, 0xff, v16842; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v06843; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v16844; SI-NEXT: v_and_b32_e32 v0, 0xffff, v06845; SI-NEXT: v_or_b32_e32 v1, v16, v16846; SI-NEXT: v_or_b32_e32 v0, v1, v06847; SI-NEXT: s_mov_b32 s7, 0x30000006848; SI-NEXT: v_add_i32_e32 v8, vcc, s7, v06849; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v46850; SI-NEXT: v_and_b32_e32 v0, 0xff, v06851; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v66852; SI-NEXT: s_movk_i32 s6, 0x3006853; SI-NEXT: v_or_b32_e32 v0, v17, v06854; SI-NEXT: v_and_b32_e32 v1, 0xff, v16855; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v06856; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v16857; SI-NEXT: v_and_b32_e32 v0, 0xffff, v06858; SI-NEXT: v_or_b32_e32 v1, v7, v16859; SI-NEXT: v_or_b32_e32 v0, v1, v06860; SI-NEXT: v_add_i32_e32 v4, vcc, s7, v06861; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v136862; SI-NEXT: v_and_b32_e32 v0, 0xff, v06863; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v146864; SI-NEXT: v_or_b32_e32 v0, v1, v06865; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v26866; SI-NEXT: v_and_b32_e32 v1, 0xff, v16867; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v06868; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v16869; SI-NEXT: v_and_b32_e32 v0, 0xffff, v06870; SI-NEXT: v_or_b32_e32 v1, v15, v16871; SI-NEXT: v_or_b32_e32 v0, v1, v06872; SI-NEXT: v_add_i32_e32 v0, vcc, 0x3000000, v06873; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v06874; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v06875; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v46876; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v46877; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v86878; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v86879; SI-NEXT: .LBB36_4: ; %end6880; SI-NEXT: s_or_b64 exec, exec, s[4:5]6881; SI-NEXT: v_mov_b32_e32 v2, v126882; SI-NEXT: v_mov_b32_e32 v4, v116883; SI-NEXT: s_setpc_b64 s[30:31]6884;6885; VI-LABEL: bitcast_v12i8_to_v6bf16:6886; VI: ; %bb.0:6887; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6888; VI-NEXT: v_mov_b32_e32 v14, v26889; VI-NEXT: v_mov_b32_e32 v13, v06890; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v126891; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v16892; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v36893; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v56894; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v76895; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v96896; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v116897; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr36898; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc6899; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6900; VI-NEXT: s_cbranch_execnz .LBB36_36901; VI-NEXT: ; %bb.1: ; %Flow6902; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6903; VI-NEXT: s_cbranch_execnz .LBB36_46904; VI-NEXT: .LBB36_2: ; %end6905; VI-NEXT: s_or_b64 exec, exec, s[4:5]6906; VI-NEXT: s_setpc_b64 s[30:31]6907; VI-NEXT: .LBB36_3: ; %cmp.false6908; VI-NEXT: v_or_b32_sdwa v0, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD6909; VI-NEXT: v_or_b32_sdwa v1, v14, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD6910; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD6911; VI-NEXT: v_or_b32_sdwa v1, v4, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD6912; VI-NEXT: v_or_b32_sdwa v2, v6, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD6913; VI-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD6914; VI-NEXT: v_or_b32_sdwa v2, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD6915; VI-NEXT: v_or_b32_sdwa v3, v10, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD6916; VI-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD6917; VI-NEXT: ; implicit-def: $vgpr136918; VI-NEXT: ; implicit-def: $vgpr146919; VI-NEXT: ; implicit-def: $vgpr46920; VI-NEXT: ; implicit-def: $vgpr66921; VI-NEXT: ; implicit-def: $vgpr86922; VI-NEXT: ; implicit-def: $vgpr106923; VI-NEXT: ; implicit-def: $vgpr176924; VI-NEXT: ; implicit-def: $vgpr166925; VI-NEXT: ; implicit-def: $vgpr156926; VI-NEXT: ; implicit-def: $vgpr126927; VI-NEXT: ; implicit-def: $vgpr76928; VI-NEXT: ; implicit-def: $vgpr56929; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6930; VI-NEXT: s_cbranch_execz .LBB36_26931; VI-NEXT: .LBB36_4: ; %cmp.true6932; VI-NEXT: v_add_u16_e32 v0, 3, v136933; VI-NEXT: v_add_u16_e32 v1, 3, v146934; VI-NEXT: v_or_b32_sdwa v0, v17, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_06935; VI-NEXT: v_or_b32_sdwa v1, v16, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_06936; VI-NEXT: v_mov_b32_e32 v2, 0x3006937; VI-NEXT: v_add_u16_e32 v0, 0x300, v06938; VI-NEXT: v_add_u16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6939; VI-NEXT: v_or_b32_e32 v0, v0, v16940; VI-NEXT: v_add_u16_e32 v1, 3, v46941; VI-NEXT: v_add_u16_e32 v3, 3, v66942; VI-NEXT: v_or_b32_sdwa v1, v15, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_06943; VI-NEXT: v_or_b32_sdwa v3, v12, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_06944; VI-NEXT: v_add_u16_e32 v1, 0x300, v16945; VI-NEXT: v_add_u16_sdwa v3, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6946; VI-NEXT: v_or_b32_e32 v1, v1, v36947; VI-NEXT: v_add_u16_e32 v3, 3, v86948; VI-NEXT: v_add_u16_e32 v4, 3, v106949; VI-NEXT: v_or_b32_sdwa v3, v7, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_06950; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_06951; VI-NEXT: v_add_u16_e32 v3, 0x300, v36952; VI-NEXT: v_add_u16_sdwa v2, v4, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6953; VI-NEXT: v_or_b32_e32 v2, v3, v26954; VI-NEXT: s_or_b64 exec, exec, s[4:5]6955; VI-NEXT: s_setpc_b64 s[30:31]6956;6957; GFX9-LABEL: bitcast_v12i8_to_v6bf16:6958; GFX9: ; %bb.0:6959; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6960; GFX9-NEXT: v_mov_b32_e32 v14, v26961; GFX9-NEXT: v_mov_b32_e32 v13, v06962; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v126963; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v16964; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v36965; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v56966; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v76967; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v96968; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v116969; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr36970; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc6971; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]6972; GFX9-NEXT: s_cbranch_execnz .LBB36_36973; GFX9-NEXT: ; %bb.1: ; %Flow6974; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]6975; GFX9-NEXT: s_cbranch_execnz .LBB36_46976; GFX9-NEXT: .LBB36_2: ; %end6977; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]6978; GFX9-NEXT: s_setpc_b64 s[30:31]6979; GFX9-NEXT: .LBB36_3: ; %cmp.false6980; GFX9-NEXT: v_or_b32_sdwa v0, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD6981; GFX9-NEXT: v_or_b32_sdwa v1, v14, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD6982; GFX9-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD6983; GFX9-NEXT: v_or_b32_sdwa v1, v4, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD6984; GFX9-NEXT: v_or_b32_sdwa v2, v6, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD6985; GFX9-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD6986; GFX9-NEXT: v_or_b32_sdwa v2, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD6987; GFX9-NEXT: v_or_b32_sdwa v3, v10, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD6988; GFX9-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD6989; GFX9-NEXT: ; implicit-def: $vgpr136990; GFX9-NEXT: ; implicit-def: $vgpr146991; GFX9-NEXT: ; implicit-def: $vgpr46992; GFX9-NEXT: ; implicit-def: $vgpr66993; GFX9-NEXT: ; implicit-def: $vgpr86994; GFX9-NEXT: ; implicit-def: $vgpr106995; GFX9-NEXT: ; implicit-def: $vgpr176996; GFX9-NEXT: ; implicit-def: $vgpr166997; GFX9-NEXT: ; implicit-def: $vgpr156998; GFX9-NEXT: ; implicit-def: $vgpr126999; GFX9-NEXT: ; implicit-def: $vgpr77000; GFX9-NEXT: ; implicit-def: $vgpr57001; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]7002; GFX9-NEXT: s_cbranch_execz .LBB36_27003; GFX9-NEXT: .LBB36_4: ; %cmp.true7004; GFX9-NEXT: v_add_u16_e32 v0, 3, v137005; GFX9-NEXT: v_add_u16_e32 v1, 3, v147006; GFX9-NEXT: v_or_b32_sdwa v0, v17, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_07007; GFX9-NEXT: s_movk_i32 s6, 0x3007008; GFX9-NEXT: v_or_b32_sdwa v1, v16, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_07009; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v07010; GFX9-NEXT: v_add_u16_sdwa v1, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7011; GFX9-NEXT: v_or_b32_e32 v0, v0, v17012; GFX9-NEXT: v_add_u16_e32 v1, 3, v47013; GFX9-NEXT: v_add_u16_e32 v2, 3, v67014; GFX9-NEXT: v_or_b32_sdwa v1, v15, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_07015; GFX9-NEXT: v_or_b32_sdwa v2, v12, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_07016; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v17017; GFX9-NEXT: v_add_u16_sdwa v2, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7018; GFX9-NEXT: v_or_b32_e32 v1, v1, v27019; GFX9-NEXT: v_add_u16_e32 v2, 3, v87020; GFX9-NEXT: v_add_u16_e32 v3, 3, v107021; GFX9-NEXT: v_or_b32_sdwa v2, v7, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_07022; GFX9-NEXT: v_or_b32_sdwa v3, v5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_07023; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v27024; GFX9-NEXT: v_add_u16_sdwa v3, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7025; GFX9-NEXT: v_or_b32_e32 v2, v2, v37026; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]7027; GFX9-NEXT: s_setpc_b64 s[30:31]7028;7029; GFX11-TRUE16-LABEL: bitcast_v12i8_to_v6bf16:7030; GFX11-TRUE16: ; %bb.0:7031; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7032; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v9.l7033; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v7.l7034; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.l7035; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v4.l7036; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v2.l7037; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v0.l7038; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v1.l7039; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v3.l7040; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v5.l7041; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v10.h7042; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v9.h7043; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l7044; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo7045; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr37046; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v127047; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s07048; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB36_37049; GFX11-TRUE16-NEXT: ; %bb.1: ; %Flow7050; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s07051; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB36_47052; GFX11-TRUE16-NEXT: .LBB36_2: ; %end7053; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s07054; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]7055; GFX11-TRUE16-NEXT: .LBB36_3: ; %cmp.false7056; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v9.l7057; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v8.h7058; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.h7059; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.l7060; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l7061; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l7062; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v6.h7063; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v5.h7064; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v6.l7065; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l7066; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h7067; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l7068; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo167069; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi167070; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi167071; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo167072; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo167073; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo167074; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi167075; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi167076; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo167077; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo167078; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi167079; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo167080; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s07081; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB36_27082; GFX11-TRUE16-NEXT: .LBB36_4: ; %cmp.true7083; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v9.l, 37084; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v8.h, 37085; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.h, 37086; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v7.l, 37087; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 37088; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 37089; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l7090; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h7091; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l7092; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h7093; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l7094; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h7095; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.h, v0.l7096; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v5.h, v0.h7097; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v6.l, v1.l7098; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h7099; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l7100; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h7101; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l7102; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h7103; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l7104; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h7105; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l7106; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h7107; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s07108; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]7109;7110; GFX11-FAKE16-LABEL: bitcast_v12i8_to_v6bf16:7111; GFX11-FAKE16: ; %bb.0:7112; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7113; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, v2 :: v_dual_mov_b32 v13, v07114; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v127115; GFX11-FAKE16-NEXT: v_lshlrev_b16 v17, 8, v17116; GFX11-FAKE16-NEXT: v_lshlrev_b16 v15, 8, v37117; GFX11-FAKE16-NEXT: v_lshlrev_b16 v16, 8, v57118; GFX11-FAKE16-NEXT: v_lshlrev_b16 v12, 8, v77119; GFX11-FAKE16-NEXT: v_lshlrev_b16 v5, 8, v97120; GFX11-FAKE16-NEXT: v_lshlrev_b16 v7, 8, v117121; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr37122; GFX11-FAKE16-NEXT: s_and_saveexec_b32 s0, vcc_lo7123; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)7124; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s07125; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB36_37126; GFX11-FAKE16-NEXT: ; %bb.1: ; %Flow7127; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s07128; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB36_47129; GFX11-FAKE16-NEXT: .LBB36_2: ; %end7130; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s07131; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]7132; GFX11-FAKE16-NEXT: .LBB36_3: ; %cmp.false7133; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xff, v137134; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xff, v147135; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xff, v47136; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xff, v67137; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xff, v87138; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xff, v107139; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v177140; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v157141; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v167142; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v3, v127143; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v57144; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v6, v77145; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v07146; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v17147; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v27148; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v37149; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v47150; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v57151; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v17152; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr137153; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr147154; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67155; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr87156; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr107157; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr177158; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr157159; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr167160; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr127161; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr77162; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)7163; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v37164; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v57165; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47166; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57167; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s07168; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB36_27169; GFX11-FAKE16-NEXT: .LBB36_4: ; %cmp.true7170; GFX11-FAKE16-NEXT: v_add_nc_u16 v0, v13, 37171; GFX11-FAKE16-NEXT: v_add_nc_u16 v1, v14, 37172; GFX11-FAKE16-NEXT: v_add_nc_u16 v2, v4, 37173; GFX11-FAKE16-NEXT: v_add_nc_u16 v3, v6, 37174; GFX11-FAKE16-NEXT: v_add_nc_u16 v4, v8, 37175; GFX11-FAKE16-NEXT: v_add_nc_u16 v6, v10, 37176; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xff, v07177; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xff, v17178; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xff, v27179; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xff, v37180; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xff, v47181; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xff, v67182; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v17, v07183; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v15, v17184; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v16, v27185; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v12, v37186; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v47187; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v7, v67188; GFX11-FAKE16-NEXT: v_add_nc_u16 v0, 0x300, v07189; GFX11-FAKE16-NEXT: v_add_nc_u16 v1, 0x300, v17190; GFX11-FAKE16-NEXT: v_add_nc_u16 v2, 0x300, v27191; GFX11-FAKE16-NEXT: v_add_nc_u16 v3, 0x300, v37192; GFX11-FAKE16-NEXT: v_add_nc_u16 v4, 0x300, v47193; GFX11-FAKE16-NEXT: v_add_nc_u16 v5, 0x300, v57194; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v07195; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v17196; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v27197; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v37198; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v47199; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v57200; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v17201; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)7202; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v37203; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v57204; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s07205; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]7206 %cmp = icmp eq i32 %b, 07207 br i1 %cmp, label %cmp.true, label %cmp.false7208 7209cmp.true:7210 %a1 = add <12 x i8> %a, splat (i8 3)7211 %a2 = bitcast <12 x i8> %a1 to <6 x bfloat>7212 br label %end7213 7214cmp.false:7215 %a3 = bitcast <12 x i8> %a to <6 x bfloat>7216 br label %end7217 7218end:7219 %phi = phi <6 x bfloat> [ %a2, %cmp.true ], [ %a3, %cmp.false ]7220 ret <6 x bfloat> %phi7221}7222 7223define inreg <6 x bfloat> @bitcast_v12i8_to_v6bf16_scalar(<12 x i8> inreg %a, i32 inreg %b) {7224; SI-LABEL: bitcast_v12i8_to_v6bf16_scalar:7225; SI: ; %bb.0:7226; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7227; SI-NEXT: s_cmp_lg_u32 s28, 07228; SI-NEXT: s_cbranch_scc0 .LBB37_47229; SI-NEXT: ; %bb.1: ; %cmp.false7230; SI-NEXT: s_and_b32 s4, s16, 0xff7231; SI-NEXT: s_lshl_b32 s4, s4, 167232; SI-NEXT: s_lshl_b32 s5, s17, 247233; SI-NEXT: s_or_b32 s6, s5, s47234; SI-NEXT: s_and_b32 s4, s18, 0xff7235; SI-NEXT: s_lshl_b32 s4, s4, 167236; SI-NEXT: s_lshl_b32 s5, s19, 247237; SI-NEXT: s_or_b32 s7, s5, s47238; SI-NEXT: s_and_b32 s4, s20, 0xff7239; SI-NEXT: s_lshl_b32 s5, s21, 87240; SI-NEXT: s_or_b32 s4, s4, s57241; SI-NEXT: s_lshl_b32 s8, s4, 167242; SI-NEXT: s_and_b32 s4, s22, 0xff7243; SI-NEXT: s_lshl_b32 s4, s4, 167244; SI-NEXT: s_lshl_b32 s5, s23, 247245; SI-NEXT: s_or_b32 s9, s5, s47246; SI-NEXT: s_and_b32 s4, s24, 0xff7247; SI-NEXT: s_lshl_b32 s4, s4, 167248; SI-NEXT: s_lshl_b32 s5, s25, 247249; SI-NEXT: s_or_b32 s10, s5, s47250; SI-NEXT: s_and_b32 s4, s26, 0xff7251; SI-NEXT: s_lshl_b32 s4, s4, 167252; SI-NEXT: s_lshl_b32 s5, s27, 247253; SI-NEXT: s_or_b32 s11, s5, s47254; SI-NEXT: s_cbranch_execnz .LBB37_37255; SI-NEXT: .LBB37_2: ; %cmp.true7256; SI-NEXT: s_add_i32 s24, s24, 37257; SI-NEXT: s_and_b32 s4, s24, 0xff7258; SI-NEXT: s_lshl_b32 s5, s25, 87259; SI-NEXT: s_add_i32 s26, s26, 37260; SI-NEXT: s_or_b32 s4, s5, s47261; SI-NEXT: s_and_b32 s6, s26, 0xff7262; SI-NEXT: s_addk_i32 s4, 0x3007263; SI-NEXT: s_lshl_b32 s5, s27, 247264; SI-NEXT: s_lshl_b32 s6, s6, 167265; SI-NEXT: s_and_b32 s4, s4, 0xffff7266; SI-NEXT: s_or_b32 s5, s5, s67267; SI-NEXT: s_add_i32 s20, s20, 37268; SI-NEXT: s_or_b32 s4, s5, s47269; SI-NEXT: s_and_b32 s5, s20, 0xff7270; SI-NEXT: s_lshl_b32 s6, s21, 87271; SI-NEXT: s_add_i32 s22, s22, 37272; SI-NEXT: s_or_b32 s5, s6, s57273; SI-NEXT: s_and_b32 s7, s22, 0xff7274; SI-NEXT: s_addk_i32 s5, 0x3007275; SI-NEXT: s_lshl_b32 s6, s23, 247276; SI-NEXT: s_lshl_b32 s7, s7, 167277; SI-NEXT: s_and_b32 s5, s5, 0xffff7278; SI-NEXT: s_or_b32 s6, s6, s77279; SI-NEXT: s_add_i32 s16, s16, 37280; SI-NEXT: s_or_b32 s5, s6, s57281; SI-NEXT: s_and_b32 s6, s16, 0xff7282; SI-NEXT: s_lshl_b32 s7, s17, 87283; SI-NEXT: s_add_i32 s18, s18, 37284; SI-NEXT: s_or_b32 s6, s7, s67285; SI-NEXT: s_and_b32 s8, s18, 0xff7286; SI-NEXT: s_addk_i32 s6, 0x3007287; SI-NEXT: s_lshl_b32 s7, s19, 247288; SI-NEXT: s_lshl_b32 s8, s8, 167289; SI-NEXT: s_and_b32 s6, s6, 0xffff7290; SI-NEXT: s_or_b32 s7, s7, s87291; SI-NEXT: s_or_b32 s6, s7, s67292; SI-NEXT: s_add_i32 s4, s4, 0x30000007293; SI-NEXT: s_add_i32 s5, s5, 0x30000007294; SI-NEXT: s_add_i32 s6, s6, 0x30000007295; SI-NEXT: s_and_b32 s7, s6, 0xffff00007296; SI-NEXT: s_lshl_b32 s6, s6, 167297; SI-NEXT: s_and_b32 s9, s5, 0xffff00007298; SI-NEXT: s_lshl_b32 s8, s5, 167299; SI-NEXT: s_and_b32 s11, s4, 0xffff00007300; SI-NEXT: s_lshl_b32 s10, s4, 167301; SI-NEXT: .LBB37_3: ; %end7302; SI-NEXT: v_mov_b32_e32 v0, s67303; SI-NEXT: v_mov_b32_e32 v1, s77304; SI-NEXT: v_mov_b32_e32 v2, s87305; SI-NEXT: v_mov_b32_e32 v3, s97306; SI-NEXT: v_mov_b32_e32 v4, s107307; SI-NEXT: v_mov_b32_e32 v5, s117308; SI-NEXT: s_setpc_b64 s[30:31]7309; SI-NEXT: .LBB37_4:7310; SI-NEXT: ; implicit-def: $sgpr67311; SI-NEXT: ; implicit-def: $sgpr77312; SI-NEXT: ; implicit-def: $sgpr87313; SI-NEXT: ; implicit-def: $sgpr97314; SI-NEXT: ; implicit-def: $sgpr107315; SI-NEXT: ; implicit-def: $sgpr117316; SI-NEXT: s_branch .LBB37_27317;7318; VI-LABEL: bitcast_v12i8_to_v6bf16_scalar:7319; VI: ; %bb.0:7320; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7321; VI-NEXT: s_cmp_lg_u32 s28, 07322; VI-NEXT: s_cbranch_scc0 .LBB37_47323; VI-NEXT: ; %bb.1: ; %cmp.false7324; VI-NEXT: s_and_b32 s4, s16, 0xff7325; VI-NEXT: s_lshl_b32 s5, s17, 87326; VI-NEXT: s_or_b32 s4, s4, s57327; VI-NEXT: s_and_b32 s5, s18, 0xff7328; VI-NEXT: s_lshl_b32 s6, s19, 87329; VI-NEXT: s_or_b32 s5, s5, s67330; VI-NEXT: s_and_b32 s4, s4, 0xffff7331; VI-NEXT: s_lshl_b32 s5, s5, 167332; VI-NEXT: s_or_b32 s4, s4, s57333; VI-NEXT: s_and_b32 s5, s20, 0xff7334; VI-NEXT: s_lshl_b32 s6, s21, 87335; VI-NEXT: s_or_b32 s5, s5, s67336; VI-NEXT: s_and_b32 s6, s22, 0xff7337; VI-NEXT: s_lshl_b32 s7, s23, 87338; VI-NEXT: s_or_b32 s6, s6, s77339; VI-NEXT: s_and_b32 s5, s5, 0xffff7340; VI-NEXT: s_lshl_b32 s6, s6, 167341; VI-NEXT: s_or_b32 s5, s5, s67342; VI-NEXT: s_and_b32 s6, s24, 0xff7343; VI-NEXT: s_lshl_b32 s7, s25, 87344; VI-NEXT: s_or_b32 s6, s6, s77345; VI-NEXT: s_and_b32 s7, s26, 0xff7346; VI-NEXT: s_lshl_b32 s8, s27, 87347; VI-NEXT: s_or_b32 s7, s7, s87348; VI-NEXT: s_and_b32 s6, s6, 0xffff7349; VI-NEXT: s_lshl_b32 s7, s7, 167350; VI-NEXT: s_or_b32 s6, s6, s77351; VI-NEXT: s_cbranch_execnz .LBB37_37352; VI-NEXT: .LBB37_2: ; %cmp.true7353; VI-NEXT: s_add_i32 s16, s16, 37354; VI-NEXT: s_and_b32 s4, s16, 0xff7355; VI-NEXT: s_lshl_b32 s5, s17, 87356; VI-NEXT: s_add_i32 s18, s18, 37357; VI-NEXT: s_or_b32 s4, s5, s47358; VI-NEXT: s_and_b32 s5, s18, 0xff7359; VI-NEXT: s_lshl_b32 s6, s19, 87360; VI-NEXT: s_addk_i32 s4, 0x3007361; VI-NEXT: s_or_b32 s5, s6, s57362; VI-NEXT: s_and_b32 s4, s4, 0xffff7363; VI-NEXT: s_lshl_b32 s5, s5, 167364; VI-NEXT: s_add_i32 s20, s20, 37365; VI-NEXT: s_or_b32 s4, s5, s47366; VI-NEXT: s_and_b32 s5, s20, 0xff7367; VI-NEXT: s_lshl_b32 s6, s21, 87368; VI-NEXT: s_add_i32 s22, s22, 37369; VI-NEXT: s_or_b32 s5, s6, s57370; VI-NEXT: s_and_b32 s6, s22, 0xff7371; VI-NEXT: s_lshl_b32 s7, s23, 87372; VI-NEXT: s_addk_i32 s5, 0x3007373; VI-NEXT: s_or_b32 s6, s7, s67374; VI-NEXT: s_and_b32 s5, s5, 0xffff7375; VI-NEXT: s_lshl_b32 s6, s6, 167376; VI-NEXT: s_add_i32 s24, s24, 37377; VI-NEXT: s_or_b32 s5, s6, s57378; VI-NEXT: s_and_b32 s6, s24, 0xff7379; VI-NEXT: s_lshl_b32 s7, s25, 87380; VI-NEXT: s_add_i32 s26, s26, 37381; VI-NEXT: s_or_b32 s6, s7, s67382; VI-NEXT: s_and_b32 s7, s26, 0xff7383; VI-NEXT: s_lshl_b32 s8, s27, 87384; VI-NEXT: s_addk_i32 s6, 0x3007385; VI-NEXT: s_or_b32 s7, s8, s77386; VI-NEXT: s_and_b32 s6, s6, 0xffff7387; VI-NEXT: s_lshl_b32 s7, s7, 167388; VI-NEXT: s_or_b32 s6, s7, s67389; VI-NEXT: s_add_i32 s4, s4, 0x30000007390; VI-NEXT: s_add_i32 s5, s5, 0x30000007391; VI-NEXT: s_add_i32 s6, s6, 0x30000007392; VI-NEXT: .LBB37_3: ; %end7393; VI-NEXT: v_mov_b32_e32 v0, s47394; VI-NEXT: v_mov_b32_e32 v1, s57395; VI-NEXT: v_mov_b32_e32 v2, s67396; VI-NEXT: s_setpc_b64 s[30:31]7397; VI-NEXT: .LBB37_4:7398; VI-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr6_sgpr77399; VI-NEXT: s_branch .LBB37_27400;7401; GFX9-LABEL: bitcast_v12i8_to_v6bf16_scalar:7402; GFX9: ; %bb.0:7403; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7404; GFX9-NEXT: s_cmp_lg_u32 s28, 07405; GFX9-NEXT: s_cbranch_scc0 .LBB37_47406; GFX9-NEXT: ; %bb.1: ; %cmp.false7407; GFX9-NEXT: s_and_b32 s4, s16, 0xff7408; GFX9-NEXT: s_lshl_b32 s5, s17, 87409; GFX9-NEXT: s_or_b32 s4, s4, s57410; GFX9-NEXT: s_and_b32 s5, s18, 0xff7411; GFX9-NEXT: s_lshl_b32 s6, s19, 87412; GFX9-NEXT: s_or_b32 s5, s5, s67413; GFX9-NEXT: s_and_b32 s4, s4, 0xffff7414; GFX9-NEXT: s_lshl_b32 s5, s5, 167415; GFX9-NEXT: s_or_b32 s4, s4, s57416; GFX9-NEXT: s_and_b32 s5, s20, 0xff7417; GFX9-NEXT: s_lshl_b32 s6, s21, 87418; GFX9-NEXT: s_or_b32 s5, s5, s67419; GFX9-NEXT: s_and_b32 s6, s22, 0xff7420; GFX9-NEXT: s_lshl_b32 s7, s23, 87421; GFX9-NEXT: s_or_b32 s6, s6, s77422; GFX9-NEXT: s_and_b32 s5, s5, 0xffff7423; GFX9-NEXT: s_lshl_b32 s6, s6, 167424; GFX9-NEXT: s_or_b32 s5, s5, s67425; GFX9-NEXT: s_and_b32 s6, s24, 0xff7426; GFX9-NEXT: s_lshl_b32 s7, s25, 87427; GFX9-NEXT: s_or_b32 s6, s6, s77428; GFX9-NEXT: s_and_b32 s7, s26, 0xff7429; GFX9-NEXT: s_lshl_b32 s8, s27, 87430; GFX9-NEXT: s_or_b32 s7, s7, s87431; GFX9-NEXT: s_and_b32 s6, s6, 0xffff7432; GFX9-NEXT: s_lshl_b32 s7, s7, 167433; GFX9-NEXT: s_or_b32 s6, s6, s77434; GFX9-NEXT: s_cbranch_execnz .LBB37_37435; GFX9-NEXT: .LBB37_2: ; %cmp.true7436; GFX9-NEXT: s_add_i32 s16, s16, 37437; GFX9-NEXT: s_and_b32 s4, s16, 0xff7438; GFX9-NEXT: s_lshl_b32 s5, s17, 87439; GFX9-NEXT: s_add_i32 s18, s18, 37440; GFX9-NEXT: s_or_b32 s4, s5, s47441; GFX9-NEXT: s_and_b32 s5, s18, 0xff7442; GFX9-NEXT: s_lshl_b32 s6, s19, 87443; GFX9-NEXT: s_or_b32 s5, s6, s57444; GFX9-NEXT: s_addk_i32 s4, 0x3007445; GFX9-NEXT: s_addk_i32 s5, 0x3007446; GFX9-NEXT: s_and_b32 s4, s4, 0xffff7447; GFX9-NEXT: s_lshl_b32 s5, s5, 167448; GFX9-NEXT: s_add_i32 s20, s20, 37449; GFX9-NEXT: s_or_b32 s4, s4, s57450; GFX9-NEXT: s_and_b32 s5, s20, 0xff7451; GFX9-NEXT: s_lshl_b32 s6, s21, 87452; GFX9-NEXT: s_add_i32 s22, s22, 37453; GFX9-NEXT: s_or_b32 s5, s6, s57454; GFX9-NEXT: s_and_b32 s6, s22, 0xff7455; GFX9-NEXT: s_lshl_b32 s7, s23, 87456; GFX9-NEXT: s_or_b32 s6, s7, s67457; GFX9-NEXT: s_addk_i32 s5, 0x3007458; GFX9-NEXT: s_addk_i32 s6, 0x3007459; GFX9-NEXT: s_and_b32 s5, s5, 0xffff7460; GFX9-NEXT: s_lshl_b32 s6, s6, 167461; GFX9-NEXT: s_add_i32 s24, s24, 37462; GFX9-NEXT: s_or_b32 s5, s5, s67463; GFX9-NEXT: s_and_b32 s6, s24, 0xff7464; GFX9-NEXT: s_lshl_b32 s7, s25, 87465; GFX9-NEXT: s_add_i32 s26, s26, 37466; GFX9-NEXT: s_or_b32 s6, s7, s67467; GFX9-NEXT: s_and_b32 s7, s26, 0xff7468; GFX9-NEXT: s_lshl_b32 s8, s27, 87469; GFX9-NEXT: s_or_b32 s7, s8, s77470; GFX9-NEXT: s_addk_i32 s6, 0x3007471; GFX9-NEXT: s_addk_i32 s7, 0x3007472; GFX9-NEXT: s_and_b32 s6, s6, 0xffff7473; GFX9-NEXT: s_lshl_b32 s7, s7, 167474; GFX9-NEXT: s_or_b32 s6, s6, s77475; GFX9-NEXT: .LBB37_3: ; %end7476; GFX9-NEXT: v_mov_b32_e32 v0, s47477; GFX9-NEXT: v_mov_b32_e32 v1, s57478; GFX9-NEXT: v_mov_b32_e32 v2, s67479; GFX9-NEXT: s_setpc_b64 s[30:31]7480; GFX9-NEXT: .LBB37_4:7481; GFX9-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr6_sgpr77482; GFX9-NEXT: s_branch .LBB37_27483;7484; GFX11-LABEL: bitcast_v12i8_to_v6bf16_scalar:7485; GFX11: ; %bb.0:7486; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7487; GFX11-NEXT: s_cmp_lg_u32 s24, 07488; GFX11-NEXT: s_mov_b32 s8, 07489; GFX11-NEXT: s_cbranch_scc0 .LBB37_47490; GFX11-NEXT: ; %bb.1: ; %cmp.false7491; GFX11-NEXT: s_and_b32 s4, s0, 0xff7492; GFX11-NEXT: s_lshl_b32 s5, s1, 87493; GFX11-NEXT: s_and_b32 s6, s2, 0xff7494; GFX11-NEXT: s_lshl_b32 s7, s3, 87495; GFX11-NEXT: s_or_b32 s4, s4, s57496; GFX11-NEXT: s_or_b32 s5, s6, s77497; GFX11-NEXT: s_and_b32 s4, s4, 0xffff7498; GFX11-NEXT: s_lshl_b32 s5, s5, 167499; GFX11-NEXT: s_lshl_b32 s6, s17, 87500; GFX11-NEXT: s_or_b32 s4, s4, s57501; GFX11-NEXT: s_and_b32 s5, s16, 0xff7502; GFX11-NEXT: s_and_b32 s7, s18, 0xff7503; GFX11-NEXT: s_lshl_b32 s9, s19, 87504; GFX11-NEXT: s_or_b32 s5, s5, s67505; GFX11-NEXT: s_or_b32 s6, s7, s97506; GFX11-NEXT: s_and_b32 s7, s20, 0xff7507; GFX11-NEXT: s_lshl_b32 s9, s21, 87508; GFX11-NEXT: s_and_b32 s10, s22, 0xff7509; GFX11-NEXT: s_lshl_b32 s11, s23, 87510; GFX11-NEXT: s_or_b32 s7, s7, s97511; GFX11-NEXT: s_or_b32 s9, s10, s117512; GFX11-NEXT: s_and_b32 s5, s5, 0xffff7513; GFX11-NEXT: s_lshl_b32 s6, s6, 167514; GFX11-NEXT: s_and_b32 s7, s7, 0xffff7515; GFX11-NEXT: s_lshl_b32 s9, s9, 167516; GFX11-NEXT: s_or_b32 s5, s5, s67517; GFX11-NEXT: s_or_b32 s6, s7, s97518; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s87519; GFX11-NEXT: s_cbranch_vccnz .LBB37_37520; GFX11-NEXT: .LBB37_2: ; %cmp.true7521; GFX11-NEXT: s_add_i32 s0, s0, 37522; GFX11-NEXT: s_add_i32 s2, s2, 37523; GFX11-NEXT: s_and_b32 s0, s0, 0xff7524; GFX11-NEXT: s_lshl_b32 s1, s1, 87525; GFX11-NEXT: s_and_b32 s2, s2, 0xff7526; GFX11-NEXT: s_lshl_b32 s3, s3, 87527; GFX11-NEXT: s_or_b32 s0, s1, s07528; GFX11-NEXT: s_or_b32 s1, s3, s27529; GFX11-NEXT: s_addk_i32 s0, 0x3007530; GFX11-NEXT: s_addk_i32 s1, 0x3007531; GFX11-NEXT: s_and_b32 s0, s0, 0xffff7532; GFX11-NEXT: s_lshl_b32 s1, s1, 167533; GFX11-NEXT: s_add_i32 s16, s16, 37534; GFX11-NEXT: s_or_b32 s4, s0, s17535; GFX11-NEXT: s_and_b32 s0, s16, 0xff7536; GFX11-NEXT: s_lshl_b32 s1, s17, 87537; GFX11-NEXT: s_add_i32 s18, s18, 37538; GFX11-NEXT: s_or_b32 s0, s1, s07539; GFX11-NEXT: s_and_b32 s1, s18, 0xff7540; GFX11-NEXT: s_lshl_b32 s2, s19, 87541; GFX11-NEXT: s_add_i32 s20, s20, 37542; GFX11-NEXT: s_add_i32 s22, s22, 37543; GFX11-NEXT: s_or_b32 s1, s2, s17544; GFX11-NEXT: s_and_b32 s2, s20, 0xff7545; GFX11-NEXT: s_lshl_b32 s3, s21, 87546; GFX11-NEXT: s_and_b32 s5, s22, 0xff7547; GFX11-NEXT: s_lshl_b32 s6, s23, 87548; GFX11-NEXT: s_or_b32 s2, s3, s27549; GFX11-NEXT: s_or_b32 s3, s6, s57550; GFX11-NEXT: s_addk_i32 s0, 0x3007551; GFX11-NEXT: s_addk_i32 s1, 0x3007552; GFX11-NEXT: s_addk_i32 s2, 0x3007553; GFX11-NEXT: s_addk_i32 s3, 0x3007554; GFX11-NEXT: s_and_b32 s0, s0, 0xffff7555; GFX11-NEXT: s_lshl_b32 s1, s1, 167556; GFX11-NEXT: s_and_b32 s2, s2, 0xffff7557; GFX11-NEXT: s_lshl_b32 s3, s3, 167558; GFX11-NEXT: s_or_b32 s5, s0, s17559; GFX11-NEXT: s_or_b32 s6, s2, s37560; GFX11-NEXT: .LBB37_3: ; %end7561; GFX11-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s57562; GFX11-NEXT: v_mov_b32_e32 v2, s67563; GFX11-NEXT: s_setpc_b64 s[30:31]7564; GFX11-NEXT: .LBB37_4:7565; GFX11-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr6_sgpr77566; GFX11-NEXT: s_branch .LBB37_27567 %cmp = icmp eq i32 %b, 07568 br i1 %cmp, label %cmp.true, label %cmp.false7569 7570cmp.true:7571 %a1 = add <12 x i8> %a, splat (i8 3)7572 %a2 = bitcast <12 x i8> %a1 to <6 x bfloat>7573 br label %end7574 7575cmp.false:7576 %a3 = bitcast <12 x i8> %a to <6 x bfloat>7577 br label %end7578 7579end:7580 %phi = phi <6 x bfloat> [ %a2, %cmp.true ], [ %a3, %cmp.false ]7581 ret <6 x bfloat> %phi7582}7583 7584define <12 x i8> @bitcast_v6bf16_to_v12i8(<6 x bfloat> %a, i32 %b) {7585; SI-LABEL: bitcast_v6bf16_to_v12i8:7586; SI: ; %bb.0:7587; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7588; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v67589; SI-NEXT: v_mul_f32_e32 v16, 1.0, v17590; SI-NEXT: v_mul_f32_e32 v17, 1.0, v07591; SI-NEXT: v_mul_f32_e32 v14, 1.0, v37592; SI-NEXT: v_mul_f32_e32 v15, 1.0, v27593; SI-NEXT: v_mul_f32_e32 v12, 1.0, v57594; SI-NEXT: v_mul_f32_e32 v13, 1.0, v47595; SI-NEXT: ; implicit-def: $vgpr07596; SI-NEXT: ; implicit-def: $vgpr17597; SI-NEXT: ; implicit-def: $vgpr27598; SI-NEXT: ; implicit-def: $vgpr37599; SI-NEXT: ; implicit-def: $vgpr47600; SI-NEXT: ; implicit-def: $vgpr57601; SI-NEXT: ; implicit-def: $vgpr67602; SI-NEXT: ; implicit-def: $vgpr77603; SI-NEXT: ; implicit-def: $vgpr87604; SI-NEXT: ; implicit-def: $vgpr97605; SI-NEXT: ; implicit-def: $vgpr107606; SI-NEXT: ; implicit-def: $vgpr117607; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc7608; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]7609; SI-NEXT: s_cbranch_execnz .LBB38_37610; SI-NEXT: ; %bb.1: ; %Flow7611; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]7612; SI-NEXT: s_cbranch_execnz .LBB38_47613; SI-NEXT: .LBB38_2: ; %end7614; SI-NEXT: s_or_b64 exec, exec, s[4:5]7615; SI-NEXT: s_setpc_b64 s[30:31]7616; SI-NEXT: .LBB38_3: ; %cmp.false7617; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v167618; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v147619; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v127620; SI-NEXT: v_alignbit_b32 v0, v0, v17, 167621; SI-NEXT: v_alignbit_b32 v4, v6, v15, 167622; SI-NEXT: v_alignbit_b32 v8, v10, v13, 167623; SI-NEXT: v_alignbit_b32 v3, v4, v0, 247624; SI-NEXT: v_alignbit_b32 v2, v4, v0, 167625; SI-NEXT: v_alignbit_b32 v1, v4, v0, 87626; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v147627; SI-NEXT: v_lshrrev_b32_e32 v11, 24, v127628; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v47629; SI-NEXT: v_lshrrev_b32_e32 v9, 8, v87630; SI-NEXT: ; implicit-def: $vgpr177631; SI-NEXT: ; implicit-def: $vgpr167632; SI-NEXT: ; implicit-def: $vgpr157633; SI-NEXT: ; implicit-def: $vgpr147634; SI-NEXT: ; implicit-def: $vgpr137635; SI-NEXT: ; implicit-def: $vgpr127636; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]7637; SI-NEXT: s_cbranch_execz .LBB38_27638; SI-NEXT: .LBB38_4: ; %cmp.true7639; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v167640; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v177641; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v17642; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v07643; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v17644; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v147645; SI-NEXT: v_alignbit_b32 v0, v1, v0, 167646; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v157647; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v27648; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v17649; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v77650; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v127651; SI-NEXT: v_alignbit_b32 v4, v6, v1, 167652; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v137653; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v27654; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v17655; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v117656; SI-NEXT: v_alignbit_b32 v8, v10, v1, 167657; SI-NEXT: v_alignbit_b32 v3, v4, v0, 247658; SI-NEXT: v_alignbit_b32 v2, v4, v0, 167659; SI-NEXT: v_alignbit_b32 v1, v4, v0, 87660; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v47661; SI-NEXT: v_lshrrev_b32_e32 v9, 8, v87662; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v77663; SI-NEXT: v_lshrrev_b32_e32 v11, 24, v117664; SI-NEXT: s_or_b64 exec, exec, s[4:5]7665; SI-NEXT: s_setpc_b64 s[30:31]7666;7667; VI-LABEL: bitcast_v6bf16_to_v12i8:7668; VI: ; %bb.0:7669; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7670; VI-NEXT: v_mov_b32_e32 v13, v27671; VI-NEXT: v_mov_b32_e32 v16, v17672; VI-NEXT: v_mov_b32_e32 v15, v07673; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v37674; VI-NEXT: ; implicit-def: $vgpr17675; VI-NEXT: ; implicit-def: $vgpr27676; VI-NEXT: ; implicit-def: $vgpr37677; VI-NEXT: ; implicit-def: $vgpr57678; VI-NEXT: ; implicit-def: $vgpr67679; VI-NEXT: ; implicit-def: $vgpr77680; VI-NEXT: ; implicit-def: $vgpr97681; VI-NEXT: ; implicit-def: $vgpr107682; VI-NEXT: ; implicit-def: $vgpr117683; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc7684; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]7685; VI-NEXT: s_cbranch_execz .LBB38_27686; VI-NEXT: ; %bb.1: ; %cmp.false7687; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v137688; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v137689; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v167690; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v167691; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v167692; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v157693; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[13:14]7694; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[15:16]7695; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v157696; VI-NEXT: .LBB38_2: ; %Flow7697; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]7698; VI-NEXT: s_cbranch_execz .LBB38_47699; VI-NEXT: ; %bb.3: ; %cmp.true7700; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v167701; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v07702; VI-NEXT: v_bfe_u32 v1, v0, 16, 17703; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v07704; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v17705; VI-NEXT: v_or_b32_e32 v2, 0x400000, v07706; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v07707; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc7708; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v167709; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v17710; VI-NEXT: v_bfe_u32 v2, v1, 16, 17711; VI-NEXT: s_movk_i32 s6, 0x7fff7712; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v17713; VI-NEXT: v_add_u32_e32 v2, vcc, s6, v27714; VI-NEXT: v_or_b32_e32 v3, 0x400000, v17715; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v17716; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc7717; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v17718; VI-NEXT: v_alignbit_b32 v16, v1, v0, 167719; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v157720; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v07721; VI-NEXT: v_bfe_u32 v1, v0, 16, 17722; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v07723; VI-NEXT: v_add_u32_e32 v1, vcc, s6, v17724; VI-NEXT: v_or_b32_e32 v2, 0x400000, v07725; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v07726; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc7727; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v157728; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v17729; VI-NEXT: v_bfe_u32 v2, v1, 16, 17730; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v17731; VI-NEXT: v_add_u32_e32 v2, vcc, s6, v27732; VI-NEXT: v_or_b32_e32 v3, 0x400000, v17733; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v17734; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc7735; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v17736; VI-NEXT: v_alignbit_b32 v15, v1, v0, 167737; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v137738; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v07739; VI-NEXT: v_bfe_u32 v1, v0, 16, 17740; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v07741; VI-NEXT: v_add_u32_e32 v1, vcc, s6, v17742; VI-NEXT: v_or_b32_e32 v2, 0x400000, v07743; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v07744; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc7745; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v137746; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v17747; VI-NEXT: v_bfe_u32 v2, v1, 16, 17748; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v17749; VI-NEXT: v_add_u32_e32 v2, vcc, s6, v27750; VI-NEXT: v_or_b32_e32 v3, 0x400000, v17751; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v17752; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc7753; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v17754; VI-NEXT: v_alignbit_b32 v13, v1, v0, 167755; VI-NEXT: v_mov_b32_e32 v14, 0x7fc07fc07756; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[15:16]7757; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[13:14]7758; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v137759; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v137760; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v167761; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v167762; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v167763; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v157764; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v157765; VI-NEXT: .LBB38_4: ; %end7766; VI-NEXT: s_or_b64 exec, exec, s[4:5]7767; VI-NEXT: v_mov_b32_e32 v0, v157768; VI-NEXT: v_mov_b32_e32 v4, v167769; VI-NEXT: v_mov_b32_e32 v8, v137770; VI-NEXT: s_setpc_b64 s[30:31]7771;7772; GFX9-LABEL: bitcast_v6bf16_to_v12i8:7773; GFX9: ; %bb.0:7774; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7775; GFX9-NEXT: v_mov_b32_e32 v8, v27776; GFX9-NEXT: v_mov_b32_e32 v14, v17777; GFX9-NEXT: v_mov_b32_e32 v13, v07778; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v37779; GFX9-NEXT: ; implicit-def: $vgpr17780; GFX9-NEXT: ; implicit-def: $vgpr27781; GFX9-NEXT: ; implicit-def: $vgpr37782; GFX9-NEXT: ; implicit-def: $vgpr57783; GFX9-NEXT: ; implicit-def: $vgpr67784; GFX9-NEXT: ; implicit-def: $vgpr77785; GFX9-NEXT: ; implicit-def: $vgpr97786; GFX9-NEXT: ; implicit-def: $vgpr107787; GFX9-NEXT: ; implicit-def: $vgpr117788; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc7789; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]7790; GFX9-NEXT: s_cbranch_execz .LBB38_27791; GFX9-NEXT: ; %bb.1: ; %cmp.false7792; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v87793; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v87794; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v147795; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v147796; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v147797; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v137798; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]7799; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]7800; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v137801; GFX9-NEXT: .LBB38_2: ; %Flow7802; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]7803; GFX9-NEXT: s_cbranch_execz .LBB38_47804; GFX9-NEXT: ; %bb.3: ; %cmp.true7805; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v147806; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v07807; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 17808; GFX9-NEXT: s_movk_i32 s6, 0x7fff7809; GFX9-NEXT: v_add3_u32 v1, v1, v0, s67810; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v07811; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v07812; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v147813; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v07814; GFX9-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc7815; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 17816; GFX9-NEXT: v_add3_u32 v1, v1, v0, s67817; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v07818; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v07819; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v137820; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v07821; GFX9-NEXT: v_bfe_u32 v4, v0, 16, 17822; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v3, vcc7823; GFX9-NEXT: v_add3_u32 v4, v4, v0, s67824; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v07825; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v07826; GFX9-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc7827; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v137828; GFX9-NEXT: v_add_f32_e32 v4, 0x40c00000, v47829; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 17830; GFX9-NEXT: v_add3_u32 v5, v5, v4, s67831; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v47832; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v47833; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc7834; GFX9-NEXT: v_and_b32_e32 v5, 0xffff0000, v87835; GFX9-NEXT: v_add_f32_e32 v5, 0x40c00000, v57836; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 17837; GFX9-NEXT: v_add3_u32 v6, v6, v5, s67838; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v57839; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v57840; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc7841; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v87842; GFX9-NEXT: v_add_f32_e32 v6, 0x40c00000, v67843; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 17844; GFX9-NEXT: v_add3_u32 v7, v7, v6, s67845; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v67846; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v67847; GFX9-NEXT: s_mov_b32 s7, 0x70603027848; GFX9-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc7849; GFX9-NEXT: v_perm_b32 v1, v2, v3, s77850; GFX9-NEXT: v_perm_b32 v0, v0, v4, s77851; GFX9-NEXT: v_perm_b32 v11, v5, v7, s77852; GFX9-NEXT: v_mov_b32_e32 v12, 0x7fc07fc07853; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37854; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v47855; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1]7856; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v117857; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v117858; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]7859; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v27860; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v77861; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v17862; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v17863; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v07864; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v07865; GFX9-NEXT: .LBB38_4: ; %end7866; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]7867; GFX9-NEXT: v_mov_b32_e32 v0, v137868; GFX9-NEXT: v_mov_b32_e32 v4, v147869; GFX9-NEXT: s_setpc_b64 s[30:31]7870;7871; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v12i8:7872; GFX11-TRUE16: ; %bb.0:7873; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7874; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v37875; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi167876; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo167877; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi167878; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo167879; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi167880; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo167881; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo167882; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi167883; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo167884; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi167885; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo167886; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo7887; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)7888; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s07889; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB38_27890; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false7891; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v27892; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v17893; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v17894; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 8, v07895; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[2:3]7896; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[0:1]7897; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l7898; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v0.h7899; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v1.l7900; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v1.h7901; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v2.l7902; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v2.h7903; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17904; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27905; GFX11-TRUE16-NEXT: .LBB38_2: ; %Flow7906; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s07907; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB38_47908; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true7909; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v17910; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, 07911; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v1.l7912; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, 0x7fc07fc07913; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)7914; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_add_f32 v4, 0x40c00000, v57915; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l7916; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v37917; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)7918; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 17919; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v47920; GFX11-TRUE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v57921; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v2.l7922; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v47923; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v4, 0x7fff7924; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff0000, v07925; GFX11-TRUE16-NEXT: v_bfe_u32 v0, v3, 16, 17926; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v57927; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)7928; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v7, v9, vcc_lo7929; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v12, 16, 17930; GFX11-TRUE16-NEXT: v_add3_u32 v0, v0, v3, 0x7fff7931; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v37932; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v27933; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v17934; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v5, 16, 17935; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v12, 0x7fff7936; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)7937; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v11, v0, v8 :: v_dual_add_f32 v0, 0x40c00000, v67938; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v1, 16, 17939; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v127940; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v127941; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v57942; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v17943; GFX11-TRUE16-NEXT: v_add3_u32 v2, v10, v1, 0x7fff7944; GFX11-TRUE16-NEXT: v_add3_u32 v10, v3, v5, 0x7fff7945; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v7, v8, vcc_lo7946; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v57947; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 17948; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v4.h7949; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v10, v13, vcc_lo7950; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v17951; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)7952; GFX11-TRUE16-NEXT: v_add3_u32 v7, v9, v0, 0x7fff7953; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v07954; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v117955; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v2, v6, vcc_lo7956; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v07957; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v3.h7958; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v7, v9, vcc_lo7959; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v8.h7960; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)7961; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[10:11]7962; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v117963; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 8, v107964; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[16:17]7965; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v167966; GFX11-TRUE16-NEXT: .LBB38_4: ; %end7967; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s07968; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.h7969; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v6.l7970; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v10.h7971; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v12.l7972; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v4.h7973; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v11.h7974; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v8.h7975; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v16.h7976; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v14.l7977; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]7978;7979; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v12i8:7980; GFX11-FAKE16: ; %bb.0:7981; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7982; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, v2 :: v_dual_mov_b32 v13, v07983; GFX11-FAKE16-NEXT: v_mov_b32_e32 v14, v17984; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v37985; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr17986; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr27987; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37988; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57989; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67990; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr77991; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr97992; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr107993; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr117994; GFX11-FAKE16-NEXT: s_and_saveexec_b32 s0, vcc_lo7995; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)7996; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s07997; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB38_27998; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false7999; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v88000; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v88001; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v148002; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v148003; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v148004; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v138005; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]8006; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]8007; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v138008; GFX11-FAKE16-NEXT: .LBB38_2: ; %Flow8009; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s08010; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB38_48011; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true8012; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v148013; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v88014; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v138015; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, 0x7fc07fc0 :: v_dual_lshlrev_b32 v3, 16, v138016; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)8017; GFX11-FAKE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v18018; GFX11-FAKE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_add_f32 v2, 0x40c00000, v28019; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)8020; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v1, 16, 18021; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v18022; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v58023; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v88024; GFX11-FAKE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v38025; GFX11-FAKE16-NEXT: v_add3_u32 v7, v7, v1, 0x7fff8026; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v148027; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v2, 16, 18028; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)8029; GFX11-FAKE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v08030; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v0, 16, 18031; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v08032; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v08033; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)8034; GFX11-FAKE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff8035; GFX11-FAKE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v48036; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v28037; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc_lo8038; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v18039; GFX11-FAKE16-NEXT: v_add3_u32 v1, v10, v2, 0x7fff8040; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v3, 16, 18041; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v08042; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc_lo8043; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v28044; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v0, 16, 18045; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)8046; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v78047; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v1, v4, vcc_lo8048; GFX11-FAKE16-NEXT: v_add3_u32 v4, v8, v3, 0x7fff8049; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v38050; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v38051; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v5, 16, 18052; GFX11-FAKE16-NEXT: v_add3_u32 v9, v9, v0, 0x7fff8053; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)8054; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v4, v8, vcc_lo8055; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v08056; GFX11-FAKE16-NEXT: v_add3_u32 v1, v1, v5, 0x7fff8057; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)8058; GFX11-FAKE16-NEXT: v_perm_b32 v0, v2, v3, 0x70603028059; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v9, v10, vcc_lo8060; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v58061; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v38062; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v08063; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v1, v11, vcc_lo8064; GFX11-FAKE16-NEXT: v_perm_b32 v1, v6, v7, 0x70603028065; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v68066; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)8067; GFX11-FAKE16-NEXT: v_perm_b32 v11, v4, v5, 0x70603028068; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1]8069; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v58070; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v18071; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v18072; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v118073; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v118074; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]8075; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v08076; GFX11-FAKE16-NEXT: .LBB38_4: ; %end8077; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s08078; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v138079; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v148080; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]8081 %cmp = icmp eq i32 %b, 08082 br i1 %cmp, label %cmp.true, label %cmp.false8083 8084cmp.true:8085 %a1 = fadd <6 x bfloat> %a, splat (bfloat 0xR40C0)8086 %a2 = bitcast <6 x bfloat> %a1 to <12 x i8>8087 br label %end8088 8089cmp.false:8090 %a3 = bitcast <6 x bfloat> %a to <12 x i8>8091 br label %end8092 8093end:8094 %phi = phi <12 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]8095 ret <12 x i8> %phi8096}8097 8098define inreg <12 x i8> @bitcast_v6bf16_to_v12i8_scalar(<6 x bfloat> inreg %a, i32 inreg %b) {8099; SI-LABEL: bitcast_v6bf16_to_v12i8_scalar:8100; SI: ; %bb.0:8101; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8102; SI-NEXT: s_cmp_lg_u32 s22, 08103; SI-NEXT: v_mul_f32_e64 v21, 1.0, s178104; SI-NEXT: v_mul_f32_e64 v0, 1.0, s168105; SI-NEXT: v_mul_f32_e64 v20, 1.0, s198106; SI-NEXT: v_mul_f32_e64 v5, 1.0, s188107; SI-NEXT: v_mul_f32_e64 v19, 1.0, s218108; SI-NEXT: v_mul_f32_e64 v9, 1.0, s208109; SI-NEXT: s_cbranch_scc0 .LBB39_48110; SI-NEXT: ; %bb.1: ; %cmp.false8111; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v218112; SI-NEXT: v_lshr_b64 v[16:17], v[0:1], 168113; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v208114; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v198115; SI-NEXT: v_lshr_b64 v[17:18], v[5:6], 168116; SI-NEXT: v_lshr_b64 v[13:14], v[9:10], 168117; SI-NEXT: v_lshr_b64 v[3:4], v[16:17], 248118; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v208119; SI-NEXT: v_lshrrev_b32_e32 v11, 24, v198120; SI-NEXT: v_lshrrev_b32_e32 v8, 8, v178121; SI-NEXT: v_lshrrev_b32_e32 v12, 8, v138122; SI-NEXT: v_lshr_b64 v[14:15], v[16:17], 168123; SI-NEXT: v_lshr_b64 v[1:2], v[16:17], 88124; SI-NEXT: s_cbranch_execnz .LBB39_38125; SI-NEXT: .LBB39_2: ; %cmp.true8126; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v218127; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v08128; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v18129; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v08130; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v18131; SI-NEXT: v_lshr_b64 v[16:17], v[0:1], 168132; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v58133; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v08134; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v208135; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v08136; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v98137; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v08138; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v18139; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v198140; SI-NEXT: v_lshr_b64 v[17:18], v[5:6], 168141; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v18142; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v58143; SI-NEXT: v_lshr_b64 v[13:14], v[9:10], 168144; SI-NEXT: v_lshr_b64 v[3:4], v[16:17], 248145; SI-NEXT: v_lshr_b64 v[14:15], v[16:17], 168146; SI-NEXT: v_lshr_b64 v[1:2], v[16:17], 88147; SI-NEXT: v_lshrrev_b32_e32 v8, 8, v178148; SI-NEXT: v_lshrrev_b32_e32 v12, 8, v138149; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v08150; SI-NEXT: v_lshrrev_b32_e32 v11, 24, v58151; SI-NEXT: .LBB39_3: ; %end8152; SI-NEXT: v_mov_b32_e32 v0, v168153; SI-NEXT: v_mov_b32_e32 v2, v148154; SI-NEXT: v_mov_b32_e32 v4, v178155; SI-NEXT: v_mov_b32_e32 v5, v88156; SI-NEXT: v_mov_b32_e32 v8, v138157; SI-NEXT: v_mov_b32_e32 v9, v128158; SI-NEXT: s_setpc_b64 s[30:31]8159; SI-NEXT: .LBB39_4:8160; SI-NEXT: ; implicit-def: $vgpr168161; SI-NEXT: ; implicit-def: $vgpr18162; SI-NEXT: ; implicit-def: $vgpr148163; SI-NEXT: ; implicit-def: $vgpr38164; SI-NEXT: ; implicit-def: $vgpr88165; SI-NEXT: ; implicit-def: $vgpr78166; SI-NEXT: ; implicit-def: $vgpr138167; SI-NEXT: ; implicit-def: $vgpr128168; SI-NEXT: ; implicit-def: $vgpr118169; SI-NEXT: s_branch .LBB39_28170;8171; VI-LABEL: bitcast_v6bf16_to_v12i8_scalar:8172; VI: ; %bb.0:8173; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8174; VI-NEXT: s_cmp_lg_u32 s19, 08175; VI-NEXT: s_cbranch_scc0 .LBB39_38176; VI-NEXT: ; %bb.1: ; %cmp.false8177; VI-NEXT: s_lshr_b32 s19, s18, 168178; VI-NEXT: s_lshr_b32 s15, s18, 88179; VI-NEXT: s_lshr_b32 s12, s17, 248180; VI-NEXT: s_lshr_b32 s11, s17, 168181; VI-NEXT: s_lshr_b32 s10, s17, 88182; VI-NEXT: s_lshr_b32 s14, s16, 168183; VI-NEXT: s_lshr_b32 s13, s16, 88184; VI-NEXT: s_lshr_b64 s[6:7], s[18:19], 248185; VI-NEXT: s_lshr_b64 s[4:5], s[16:17], 248186; VI-NEXT: s_cbranch_execnz .LBB39_48187; VI-NEXT: .LBB39_2: ; %cmp.true8188; VI-NEXT: s_lshl_b32 s4, s17, 168189; VI-NEXT: v_mov_b32_e32 v3, 0x40c000008190; VI-NEXT: v_add_f32_e32 v0, s4, v38191; VI-NEXT: v_bfe_u32 v1, v0, 16, 18192; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v08193; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v18194; VI-NEXT: v_or_b32_e32 v2, 0x400000, v08195; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v08196; VI-NEXT: s_and_b32 s4, s17, 0xffff00008197; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc8198; VI-NEXT: v_add_f32_e32 v1, s4, v38199; VI-NEXT: v_bfe_u32 v2, v1, 16, 18200; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v18201; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v28202; VI-NEXT: v_or_b32_e32 v4, 0x400000, v18203; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v18204; VI-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc8205; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v18206; VI-NEXT: s_lshl_b32 s4, s16, 168207; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1]8208; VI-NEXT: v_add_f32_e32 v0, s4, v38209; VI-NEXT: v_bfe_u32 v1, v0, 16, 18210; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v08211; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v18212; VI-NEXT: v_or_b32_e32 v2, 0x400000, v08213; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v08214; VI-NEXT: s_and_b32 s4, s16, 0xffff00008215; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc8216; VI-NEXT: v_add_f32_e32 v1, s4, v38217; VI-NEXT: v_bfe_u32 v2, v1, 16, 18218; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v18219; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v28220; VI-NEXT: v_or_b32_e32 v5, 0x400000, v18221; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v18222; VI-NEXT: s_lshl_b32 s4, s18, 168223; VI-NEXT: v_cndmask_b32_e32 v1, v2, v5, vcc8224; VI-NEXT: v_add_f32_e32 v2, s4, v38225; VI-NEXT: v_bfe_u32 v5, v2, 16, 18226; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v28227; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v58228; VI-NEXT: s_and_b32 s4, s18, 0xffff00008229; VI-NEXT: v_or_b32_e32 v6, 0x400000, v28230; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v28231; VI-NEXT: v_add_f32_e32 v3, s4, v38232; VI-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc8233; VI-NEXT: v_bfe_u32 v5, v3, 16, 18234; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v38235; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v58236; VI-NEXT: v_or_b32_e32 v6, 0x400000, v38237; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v38238; VI-NEXT: v_cndmask_b32_e32 v3, v5, v6, vcc8239; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v18240; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v38241; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1]8242; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[2:3]8243; VI-NEXT: v_mov_b32_e32 v1, v48244; VI-NEXT: v_mov_b32_e32 v9, 0x7fc07fc08245; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[0:1]8246; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]8247; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v88248; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v88249; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v48250; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v48251; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v48252; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v08253; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v08254; VI-NEXT: s_branch .LBB39_58255; VI-NEXT: .LBB39_3:8256; VI-NEXT: ; implicit-def: $sgpr138257; VI-NEXT: ; implicit-def: $sgpr148258; VI-NEXT: ; implicit-def: $sgpr48259; VI-NEXT: ; implicit-def: $sgpr108260; VI-NEXT: ; implicit-def: $sgpr118261; VI-NEXT: ; implicit-def: $sgpr128262; VI-NEXT: ; implicit-def: $sgpr158263; VI-NEXT: ; implicit-def: $sgpr198264; VI-NEXT: ; implicit-def: $sgpr68265; VI-NEXT: s_branch .LBB39_28266; VI-NEXT: .LBB39_4:8267; VI-NEXT: v_mov_b32_e32 v8, s188268; VI-NEXT: v_mov_b32_e32 v0, s168269; VI-NEXT: v_mov_b32_e32 v4, s178270; VI-NEXT: v_mov_b32_e32 v10, s198271; VI-NEXT: v_mov_b32_e32 v13, s158272; VI-NEXT: v_mov_b32_e32 v2, s148273; VI-NEXT: v_mov_b32_e32 v1, s138274; VI-NEXT: v_mov_b32_e32 v7, s128275; VI-NEXT: v_mov_b32_e32 v6, s118276; VI-NEXT: v_mov_b32_e32 v5, s108277; VI-NEXT: v_mov_b32_e32 v11, s68278; VI-NEXT: v_mov_b32_e32 v14, s48279; VI-NEXT: .LBB39_5: ; %end8280; VI-NEXT: v_mov_b32_e32 v3, v148281; VI-NEXT: v_mov_b32_e32 v9, v138282; VI-NEXT: s_setpc_b64 s[30:31]8283;8284; GFX9-LABEL: bitcast_v6bf16_to_v12i8_scalar:8285; GFX9: ; %bb.0:8286; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8287; GFX9-NEXT: s_cmp_lg_u32 s19, 08288; GFX9-NEXT: s_cbranch_scc0 .LBB39_38289; GFX9-NEXT: ; %bb.1: ; %cmp.false8290; GFX9-NEXT: s_lshr_b32 s19, s17, 168291; GFX9-NEXT: s_lshr_b32 s15, s18, 168292; GFX9-NEXT: s_lshr_b32 s14, s18, 88293; GFX9-NEXT: s_lshr_b32 s10, s17, 248294; GFX9-NEXT: s_lshr_b32 s11, s17, 88295; GFX9-NEXT: s_lshr_b32 s13, s16, 168296; GFX9-NEXT: s_lshr_b32 s12, s16, 88297; GFX9-NEXT: s_lshr_b64 s[6:7], s[18:19], 248298; GFX9-NEXT: s_lshr_b64 s[4:5], s[16:17], 248299; GFX9-NEXT: s_cbranch_execnz .LBB39_48300; GFX9-NEXT: .LBB39_2: ; %cmp.true8301; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s178302; GFX9-NEXT: v_mov_b32_e32 v3, 0x40c000008303; GFX9-NEXT: v_add_f32_e32 v0, s4, v38304; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 18305; GFX9-NEXT: v_add_u32_e32 v1, v1, v08306; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v18307; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v08308; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v08309; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc8310; GFX9-NEXT: s_lshl_b32 s4, s17, 168311; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v08312; GFX9-NEXT: v_add_f32_e32 v0, s4, v38313; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 18314; GFX9-NEXT: v_add_u32_e32 v1, v1, v08315; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v18316; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v08317; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v08318; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc8319; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v08320; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v138321; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s168322; GFX9-NEXT: v_lshl_or_b32 v2, v6, 16, v08323; GFX9-NEXT: v_add_f32_e32 v0, s4, v38324; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 18325; GFX9-NEXT: v_add_u32_e32 v1, v1, v08326; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v18327; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v08328; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v08329; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v4, vcc8330; GFX9-NEXT: s_lshl_b32 s4, s16, 168331; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v08332; GFX9-NEXT: v_add_f32_e32 v0, s4, v38333; GFX9-NEXT: v_bfe_u32 v4, v0, 16, 18334; GFX9-NEXT: v_add_u32_e32 v4, v4, v08335; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v48336; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v08337; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v08338; GFX9-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc8339; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v08340; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v08341; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s188342; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v48343; GFX9-NEXT: v_add_f32_e32 v4, s4, v38344; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 18345; GFX9-NEXT: v_add_u32_e32 v5, v5, v48346; GFX9-NEXT: s_lshl_b32 s4, s18, 168347; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v58348; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v48349; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v48350; GFX9-NEXT: v_add_f32_e32 v3, s4, v38351; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v7, vcc8352; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 18353; GFX9-NEXT: v_add_u32_e32 v5, v5, v38354; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v58355; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v38356; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v38357; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc8358; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v38359; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v48360; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v88361; GFX9-NEXT: v_lshl_or_b32 v11, v4, 16, v38362; GFX9-NEXT: v_mov_b32_e32 v12, 0x7fc07fc08363; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]8364; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v118365; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v118366; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]8367; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v28368; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v28369; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v18370; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v18371; GFX9-NEXT: v_mov_b32_e32 v4, v138372; GFX9-NEXT: s_setpc_b64 s[30:31]8373; GFX9-NEXT: .LBB39_3:8374; GFX9-NEXT: ; implicit-def: $sgpr128375; GFX9-NEXT: ; implicit-def: $sgpr138376; GFX9-NEXT: ; implicit-def: $sgpr48377; GFX9-NEXT: ; implicit-def: $sgpr118378; GFX9-NEXT: ; implicit-def: $sgpr198379; GFX9-NEXT: ; implicit-def: $sgpr108380; GFX9-NEXT: ; implicit-def: $sgpr148381; GFX9-NEXT: ; implicit-def: $sgpr158382; GFX9-NEXT: ; implicit-def: $sgpr68383; GFX9-NEXT: s_branch .LBB39_28384; GFX9-NEXT: .LBB39_4:8385; GFX9-NEXT: v_mov_b32_e32 v8, s188386; GFX9-NEXT: v_mov_b32_e32 v0, s168387; GFX9-NEXT: v_mov_b32_e32 v6, s198388; GFX9-NEXT: v_mov_b32_e32 v10, s158389; GFX9-NEXT: v_mov_b32_e32 v9, s148390; GFX9-NEXT: v_mov_b32_e32 v2, s138391; GFX9-NEXT: v_mov_b32_e32 v1, s128392; GFX9-NEXT: v_mov_b32_e32 v7, s108393; GFX9-NEXT: v_mov_b32_e32 v5, s118394; GFX9-NEXT: v_mov_b32_e32 v11, s68395; GFX9-NEXT: v_mov_b32_e32 v3, s48396; GFX9-NEXT: v_mov_b32_e32 v4, s178397; GFX9-NEXT: s_setpc_b64 s[30:31]8398;8399; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v12i8_scalar:8400; GFX11-TRUE16: ; %bb.0:8401; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8402; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 08403; GFX11-TRUE16-NEXT: s_mov_b32 s3, 08404; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB39_38405; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false8406; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s2, 168407; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s2, 88408; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s1, 248409; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s1, 168410; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s1, 88411; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s0, 168412; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s0, 88413; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 248414; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 248415; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s38416; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB39_48417; GFX11-TRUE16-NEXT: .LBB39_2: ; %cmp.true8418; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s18419; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 168420; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s38421; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s18422; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s1, 0, s08423; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s28424; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s18425; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 18426; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 18427; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v08428; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v08429; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v18430; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v48431; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v18432; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v4, 16, 18433; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 168434; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 168435; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s08436; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v38437; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v08438; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, 0x7fc07fc08439; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)8440; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v28441; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v6, vcc_lo8442; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v18443; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s38444; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)8445; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v08446; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v7, vcc_lo8447; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v48448; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v48449; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s28450; GFX11-TRUE16-NEXT: v_bfe_u32 v0, v5, 16, 18451; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v18452; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v2, 16, 18453; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v78454; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 18455; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v28456; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)8457; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v7, v9, vcc_lo8458; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v58459; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v58460; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v1, v28461; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v38462; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v38463; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v48464; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)8465; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v18466; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, v0, v58467; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v88468; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v08469; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)8470; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc_lo8471; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v38472; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v08473; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo8474; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v28475; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v13.l8476; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v6.l8477; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)8478; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v38479; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc_lo8480; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v28481; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v28482; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)8483; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v8.l8484; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v18485; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l8486; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l8487; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)8488; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v3.l8489; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]8490; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v18491; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v18492; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)8493; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v118494; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v118495; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]8496; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v138497; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]8498; GFX11-TRUE16-NEXT: .LBB39_3:8499; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr108500; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr118501; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48502; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr98503; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr148504; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88505; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr128506; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr138507; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr68508; GFX11-TRUE16-NEXT: s_branch .LBB39_28509; GFX11-TRUE16-NEXT: .LBB39_4:8510; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s128511; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s108512; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v7, s88513; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v5, s98514; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s11 :: v_dual_mov_b32 v11, s68515; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s18516; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]8517;8518; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v12i8_scalar:8519; GFX11-FAKE16: ; %bb.0:8520; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8521; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 08522; GFX11-FAKE16-NEXT: s_mov_b32 s3, 08523; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB39_38524; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false8525; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s2, 168526; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s2, 88527; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s1, 248528; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s1, 168529; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s1, 88530; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s0, 168531; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s0, 88532; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 248533; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 248534; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s38535; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB39_48536; GFX11-FAKE16-NEXT: .LBB39_2: ; %cmp.true8537; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s18538; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 168539; GFX11-FAKE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s38540; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s18541; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s08542; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 168543; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s1, 0, s28544; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 18545; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 18546; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v08547; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v08548; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v18549; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s08550; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v3, v18551; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 168552; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s38553; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s28554; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s18555; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v38556; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v08557; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v4, 16, 18558; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v88559; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, 0x7fc07fc08560; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)8561; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v28562; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v6, vcc_lo8563; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v18564; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v5, 16, 18565; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)8566; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v08567; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo8568; GFX11-FAKE16-NEXT: v_bfe_u32 v0, v8, 16, 18569; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v58570; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v48571; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v18572; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v2, v58573; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)8574; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v18575; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, v0, v88576; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v08577; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v10, v48578; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v58579; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v78580; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)8581; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc_lo8582; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v88583; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v0, v11, vcc_lo8584; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v38585; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v7, 16, 18586; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v48587; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v18588; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v88589; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)8590; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v2, v2, v9 :: v_dual_add_nc_u32 v3, v3, v78591; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v78592; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v88593; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)8594; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v38595; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v28596; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)8597; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo8598; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v138599; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v08600; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v18601; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)8602; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v6, 16, v38603; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v4, 16, v58604; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)8605; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v7, 16, v98606; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v28607; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)8608; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]8609; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v28610; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v18611; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v118612; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v118613; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]8614; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v18615; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v138616; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]8617; GFX11-FAKE16-NEXT: .LBB39_3:8618; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr108619; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr118620; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48621; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98622; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr148623; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88624; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr128625; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr138626; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68627; GFX11-FAKE16-NEXT: s_branch .LBB39_28628; GFX11-FAKE16-NEXT: .LBB39_4:8629; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s128630; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s108631; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v7, s88632; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v5, s98633; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s11 :: v_dual_mov_b32 v11, s68634; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s18635; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]8636 %cmp = icmp eq i32 %b, 08637 br i1 %cmp, label %cmp.true, label %cmp.false8638 8639cmp.true:8640 %a1 = fadd <6 x bfloat> %a, splat (bfloat 0xR40C0)8641 %a2 = bitcast <6 x bfloat> %a1 to <12 x i8>8642 br label %end8643 8644cmp.false:8645 %a3 = bitcast <6 x bfloat> %a to <12 x i8>8646 br label %end8647 8648end:8649 %phi = phi <12 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]8650 ret <12 x i8> %phi8651}8652 8653define <6 x half> @bitcast_v12i8_to_v6f16(<12 x i8> %a, i32 %b) {8654; SI-LABEL: bitcast_v12i8_to_v6f16:8655; SI: ; %bb.0:8656; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8657; SI-NEXT: v_mov_b32_e32 v13, v28658; SI-NEXT: v_mov_b32_e32 v14, v08659; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v128660; SI-NEXT: v_lshlrev_b32_e32 v12, 8, v18661; SI-NEXT: v_lshlrev_b32_e32 v15, 8, v38662; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v58663; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v78664; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v98665; SI-NEXT: v_lshlrev_b32_e32 v11, 8, v118666; SI-NEXT: ; implicit-def: $vgpr08667; SI-NEXT: ; implicit-def: $vgpr18668; SI-NEXT: ; implicit-def: $vgpr28669; SI-NEXT: ; implicit-def: $vgpr38670; SI-NEXT: ; implicit-def: $vgpr98671; SI-NEXT: ; implicit-def: $vgpr58672; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc8673; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]8674; SI-NEXT: s_cbranch_execz .LBB40_28675; SI-NEXT: ; %bb.1: ; %cmp.false8676; SI-NEXT: v_and_b32_e32 v2, 0xff, v48677; SI-NEXT: v_and_b32_e32 v4, 0xff, v88678; SI-NEXT: v_or_b32_e32 v4, v4, v178679; SI-NEXT: v_and_b32_e32 v0, 0xff, v148680; SI-NEXT: v_and_b32_e32 v1, 0xff, v138681; SI-NEXT: v_and_b32_e32 v3, 0xff, v68682; SI-NEXT: v_cvt_f32_f16_e32 v9, v48683; SI-NEXT: v_and_b32_e32 v4, 0xff, v108684; SI-NEXT: v_or_b32_e32 v0, v0, v128685; SI-NEXT: v_or_b32_e32 v1, v1, v158686; SI-NEXT: v_or_b32_e32 v2, v2, v168687; SI-NEXT: v_or_b32_e32 v3, v3, v78688; SI-NEXT: v_or_b32_e32 v4, v4, v118689; SI-NEXT: v_cvt_f32_f16_e32 v0, v08690; SI-NEXT: v_cvt_f32_f16_e32 v1, v18691; SI-NEXT: v_cvt_f32_f16_e32 v2, v28692; SI-NEXT: v_cvt_f32_f16_e32 v3, v38693; SI-NEXT: v_cvt_f32_f16_e32 v5, v48694; SI-NEXT: ; implicit-def: $vgpr148695; SI-NEXT: ; implicit-def: $vgpr138696; SI-NEXT: ; implicit-def: $vgpr48697; SI-NEXT: ; implicit-def: $vgpr68698; SI-NEXT: ; implicit-def: $vgpr88699; SI-NEXT: ; implicit-def: $vgpr108700; SI-NEXT: ; implicit-def: $vgpr128701; SI-NEXT: ; implicit-def: $vgpr158702; SI-NEXT: ; implicit-def: $vgpr168703; SI-NEXT: ; implicit-def: $vgpr78704; SI-NEXT: ; implicit-def: $vgpr178705; SI-NEXT: ; implicit-def: $vgpr118706; SI-NEXT: .LBB40_2: ; %Flow8707; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]8708; SI-NEXT: s_cbranch_execz .LBB40_48709; SI-NEXT: ; %bb.3: ; %cmp.true8710; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v108711; SI-NEXT: v_and_b32_e32 v0, 0xff, v08712; SI-NEXT: v_or_b32_e32 v0, v11, v08713; SI-NEXT: v_add_i32_e32 v5, vcc, 0x300, v08714; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v88715; SI-NEXT: v_and_b32_e32 v0, 0xff, v08716; SI-NEXT: s_movk_i32 s6, 0x3008717; SI-NEXT: v_or_b32_e32 v0, v17, v08718; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v08719; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v68720; SI-NEXT: v_and_b32_e32 v0, 0xff, v08721; SI-NEXT: v_or_b32_e32 v0, v7, v08722; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v08723; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v48724; SI-NEXT: v_and_b32_e32 v0, 0xff, v08725; SI-NEXT: v_or_b32_e32 v0, v16, v08726; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v08727; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v138728; SI-NEXT: v_and_b32_e32 v0, 0xff, v08729; SI-NEXT: v_or_b32_e32 v0, v15, v08730; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v08731; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v148732; SI-NEXT: v_and_b32_e32 v0, 0xff, v08733; SI-NEXT: v_or_b32_e32 v0, v12, v08734; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v08735; SI-NEXT: v_cvt_f32_f16_e32 v0, v08736; SI-NEXT: v_cvt_f32_f16_e32 v1, v18737; SI-NEXT: v_cvt_f32_f16_e32 v2, v28738; SI-NEXT: v_cvt_f32_f16_e32 v3, v38739; SI-NEXT: v_cvt_f32_f16_e32 v9, v88740; SI-NEXT: v_cvt_f32_f16_e32 v5, v58741; SI-NEXT: .LBB40_4: ; %end8742; SI-NEXT: s_or_b64 exec, exec, s[4:5]8743; SI-NEXT: v_mov_b32_e32 v4, v98744; SI-NEXT: s_setpc_b64 s[30:31]8745;8746; VI-LABEL: bitcast_v12i8_to_v6f16:8747; VI: ; %bb.0:8748; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8749; VI-NEXT: v_mov_b32_e32 v14, v28750; VI-NEXT: v_mov_b32_e32 v13, v08751; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v128752; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v18753; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v38754; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v58755; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v78756; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v98757; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v118758; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr38759; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc8760; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]8761; VI-NEXT: s_cbranch_execnz .LBB40_38762; VI-NEXT: ; %bb.1: ; %Flow8763; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]8764; VI-NEXT: s_cbranch_execnz .LBB40_48765; VI-NEXT: .LBB40_2: ; %end8766; VI-NEXT: s_or_b64 exec, exec, s[4:5]8767; VI-NEXT: s_setpc_b64 s[30:31]8768; VI-NEXT: .LBB40_3: ; %cmp.false8769; VI-NEXT: v_or_b32_sdwa v0, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD8770; VI-NEXT: v_or_b32_sdwa v1, v14, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD8771; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD8772; VI-NEXT: v_or_b32_sdwa v1, v4, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD8773; VI-NEXT: v_or_b32_sdwa v2, v6, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD8774; VI-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD8775; VI-NEXT: v_or_b32_sdwa v2, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD8776; VI-NEXT: v_or_b32_sdwa v3, v10, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD8777; VI-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD8778; VI-NEXT: ; implicit-def: $vgpr138779; VI-NEXT: ; implicit-def: $vgpr148780; VI-NEXT: ; implicit-def: $vgpr48781; VI-NEXT: ; implicit-def: $vgpr68782; VI-NEXT: ; implicit-def: $vgpr88783; VI-NEXT: ; implicit-def: $vgpr108784; VI-NEXT: ; implicit-def: $vgpr178785; VI-NEXT: ; implicit-def: $vgpr168786; VI-NEXT: ; implicit-def: $vgpr158787; VI-NEXT: ; implicit-def: $vgpr128788; VI-NEXT: ; implicit-def: $vgpr78789; VI-NEXT: ; implicit-def: $vgpr58790; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]8791; VI-NEXT: s_cbranch_execz .LBB40_28792; VI-NEXT: .LBB40_4: ; %cmp.true8793; VI-NEXT: v_add_u16_e32 v0, 3, v138794; VI-NEXT: v_add_u16_e32 v1, 3, v148795; VI-NEXT: v_or_b32_sdwa v0, v17, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_08796; VI-NEXT: v_or_b32_sdwa v1, v16, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_08797; VI-NEXT: v_mov_b32_e32 v2, 0x3008798; VI-NEXT: v_add_u16_e32 v0, 0x300, v08799; VI-NEXT: v_add_u16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD8800; VI-NEXT: v_or_b32_e32 v0, v0, v18801; VI-NEXT: v_add_u16_e32 v1, 3, v48802; VI-NEXT: v_add_u16_e32 v3, 3, v68803; VI-NEXT: v_or_b32_sdwa v1, v15, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_08804; VI-NEXT: v_or_b32_sdwa v3, v12, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_08805; VI-NEXT: v_add_u16_e32 v1, 0x300, v18806; VI-NEXT: v_add_u16_sdwa v3, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD8807; VI-NEXT: v_or_b32_e32 v1, v1, v38808; VI-NEXT: v_add_u16_e32 v3, 3, v88809; VI-NEXT: v_add_u16_e32 v4, 3, v108810; VI-NEXT: v_or_b32_sdwa v3, v7, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_08811; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_08812; VI-NEXT: v_add_u16_e32 v3, 0x300, v38813; VI-NEXT: v_add_u16_sdwa v2, v4, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD8814; VI-NEXT: v_or_b32_e32 v2, v3, v28815; VI-NEXT: s_or_b64 exec, exec, s[4:5]8816; VI-NEXT: s_setpc_b64 s[30:31]8817;8818; GFX9-LABEL: bitcast_v12i8_to_v6f16:8819; GFX9: ; %bb.0:8820; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8821; GFX9-NEXT: v_mov_b32_e32 v14, v28822; GFX9-NEXT: v_mov_b32_e32 v13, v08823; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v128824; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v18825; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v38826; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v58827; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v78828; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v98829; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v118830; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr38831; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc8832; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]8833; GFX9-NEXT: s_cbranch_execnz .LBB40_38834; GFX9-NEXT: ; %bb.1: ; %Flow8835; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]8836; GFX9-NEXT: s_cbranch_execnz .LBB40_48837; GFX9-NEXT: .LBB40_2: ; %end8838; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]8839; GFX9-NEXT: s_setpc_b64 s[30:31]8840; GFX9-NEXT: .LBB40_3: ; %cmp.false8841; GFX9-NEXT: v_or_b32_sdwa v0, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD8842; GFX9-NEXT: v_or_b32_sdwa v1, v14, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD8843; GFX9-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD8844; GFX9-NEXT: v_or_b32_sdwa v1, v4, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD8845; GFX9-NEXT: v_or_b32_sdwa v2, v6, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD8846; GFX9-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD8847; GFX9-NEXT: v_or_b32_sdwa v2, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD8848; GFX9-NEXT: v_or_b32_sdwa v3, v10, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD8849; GFX9-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD8850; GFX9-NEXT: ; implicit-def: $vgpr138851; GFX9-NEXT: ; implicit-def: $vgpr148852; GFX9-NEXT: ; implicit-def: $vgpr48853; GFX9-NEXT: ; implicit-def: $vgpr68854; GFX9-NEXT: ; implicit-def: $vgpr88855; GFX9-NEXT: ; implicit-def: $vgpr108856; GFX9-NEXT: ; implicit-def: $vgpr178857; GFX9-NEXT: ; implicit-def: $vgpr168858; GFX9-NEXT: ; implicit-def: $vgpr158859; GFX9-NEXT: ; implicit-def: $vgpr128860; GFX9-NEXT: ; implicit-def: $vgpr78861; GFX9-NEXT: ; implicit-def: $vgpr58862; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]8863; GFX9-NEXT: s_cbranch_execz .LBB40_28864; GFX9-NEXT: .LBB40_4: ; %cmp.true8865; GFX9-NEXT: v_add_u16_e32 v0, 3, v138866; GFX9-NEXT: v_add_u16_e32 v1, 3, v148867; GFX9-NEXT: v_or_b32_sdwa v0, v17, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_08868; GFX9-NEXT: s_movk_i32 s6, 0x3008869; GFX9-NEXT: v_or_b32_sdwa v1, v16, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_08870; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v08871; GFX9-NEXT: v_add_u16_sdwa v1, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD8872; GFX9-NEXT: v_or_b32_e32 v0, v0, v18873; GFX9-NEXT: v_add_u16_e32 v1, 3, v48874; GFX9-NEXT: v_add_u16_e32 v2, 3, v68875; GFX9-NEXT: v_or_b32_sdwa v1, v15, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_08876; GFX9-NEXT: v_or_b32_sdwa v2, v12, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_08877; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v18878; GFX9-NEXT: v_add_u16_sdwa v2, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD8879; GFX9-NEXT: v_or_b32_e32 v1, v1, v28880; GFX9-NEXT: v_add_u16_e32 v2, 3, v88881; GFX9-NEXT: v_add_u16_e32 v3, 3, v108882; GFX9-NEXT: v_or_b32_sdwa v2, v7, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_08883; GFX9-NEXT: v_or_b32_sdwa v3, v5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_08884; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v28885; GFX9-NEXT: v_add_u16_sdwa v3, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD8886; GFX9-NEXT: v_or_b32_e32 v2, v2, v38887; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]8888; GFX9-NEXT: s_setpc_b64 s[30:31]8889;8890; GFX11-TRUE16-LABEL: bitcast_v12i8_to_v6f16:8891; GFX11-TRUE16: ; %bb.0:8892; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8893; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v9.l8894; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v7.l8895; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.l8896; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v4.l8897; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v2.l8898; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v0.l8899; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v1.l8900; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v3.l8901; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v5.l8902; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v10.h8903; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v9.h8904; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l8905; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo8906; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr38907; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v128908; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s08909; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB40_38910; GFX11-TRUE16-NEXT: ; %bb.1: ; %Flow8911; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s08912; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB40_48913; GFX11-TRUE16-NEXT: .LBB40_2: ; %end8914; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s08915; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]8916; GFX11-TRUE16-NEXT: .LBB40_3: ; %cmp.false8917; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v9.l8918; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v8.h8919; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.h8920; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.l8921; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l8922; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l8923; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v6.h8924; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v5.h8925; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v6.l8926; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l8927; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h8928; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l8929; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo168930; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi168931; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi168932; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo168933; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo168934; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo168935; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi168936; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi168937; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo168938; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo168939; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi168940; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo168941; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s08942; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB40_28943; GFX11-TRUE16-NEXT: .LBB40_4: ; %cmp.true8944; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v9.l, 38945; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v8.h, 38946; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.h, 38947; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v7.l, 38948; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 38949; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 38950; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l8951; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h8952; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l8953; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h8954; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l8955; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h8956; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.h, v0.l8957; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v5.h, v0.h8958; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v6.l, v1.l8959; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h8960; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l8961; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h8962; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l8963; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h8964; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l8965; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h8966; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l8967; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h8968; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s08969; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]8970;8971; GFX11-FAKE16-LABEL: bitcast_v12i8_to_v6f16:8972; GFX11-FAKE16: ; %bb.0:8973; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8974; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, v2 :: v_dual_mov_b32 v13, v08975; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v128976; GFX11-FAKE16-NEXT: v_lshlrev_b16 v17, 8, v18977; GFX11-FAKE16-NEXT: v_lshlrev_b16 v15, 8, v38978; GFX11-FAKE16-NEXT: v_lshlrev_b16 v16, 8, v58979; GFX11-FAKE16-NEXT: v_lshlrev_b16 v12, 8, v78980; GFX11-FAKE16-NEXT: v_lshlrev_b16 v5, 8, v98981; GFX11-FAKE16-NEXT: v_lshlrev_b16 v7, 8, v118982; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr38983; GFX11-FAKE16-NEXT: s_and_saveexec_b32 s0, vcc_lo8984; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)8985; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s08986; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB40_38987; GFX11-FAKE16-NEXT: ; %bb.1: ; %Flow8988; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s08989; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB40_48990; GFX11-FAKE16-NEXT: .LBB40_2: ; %end8991; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s08992; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]8993; GFX11-FAKE16-NEXT: .LBB40_3: ; %cmp.false8994; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xff, v138995; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xff, v148996; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xff, v48997; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xff, v68998; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xff, v88999; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xff, v109000; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v179001; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v159002; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v169003; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v3, v129004; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v59005; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v6, v79006; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v09007; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v19008; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v29009; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v39010; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v49011; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v59012; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v19013; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr139014; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr149015; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69016; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr89017; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr109018; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr179019; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr159020; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr169021; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr129022; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr79023; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)9024; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v39025; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v59026; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr49027; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59028; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s09029; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB40_29030; GFX11-FAKE16-NEXT: .LBB40_4: ; %cmp.true9031; GFX11-FAKE16-NEXT: v_add_nc_u16 v0, v13, 39032; GFX11-FAKE16-NEXT: v_add_nc_u16 v1, v14, 39033; GFX11-FAKE16-NEXT: v_add_nc_u16 v2, v4, 39034; GFX11-FAKE16-NEXT: v_add_nc_u16 v3, v6, 39035; GFX11-FAKE16-NEXT: v_add_nc_u16 v4, v8, 39036; GFX11-FAKE16-NEXT: v_add_nc_u16 v6, v10, 39037; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xff, v09038; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xff, v19039; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xff, v29040; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xff, v39041; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xff, v49042; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xff, v69043; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v17, v09044; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v15, v19045; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v16, v29046; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v12, v39047; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v49048; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v7, v69049; GFX11-FAKE16-NEXT: v_add_nc_u16 v0, 0x300, v09050; GFX11-FAKE16-NEXT: v_add_nc_u16 v1, 0x300, v19051; GFX11-FAKE16-NEXT: v_add_nc_u16 v2, 0x300, v29052; GFX11-FAKE16-NEXT: v_add_nc_u16 v3, 0x300, v39053; GFX11-FAKE16-NEXT: v_add_nc_u16 v4, 0x300, v49054; GFX11-FAKE16-NEXT: v_add_nc_u16 v5, 0x300, v59055; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v09056; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v19057; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v29058; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v39059; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v49060; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v59061; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v19062; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)9063; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v39064; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v59065; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s09066; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]9067 %cmp = icmp eq i32 %b, 09068 br i1 %cmp, label %cmp.true, label %cmp.false9069 9070cmp.true:9071 %a1 = add <12 x i8> %a, splat (i8 3)9072 %a2 = bitcast <12 x i8> %a1 to <6 x half>9073 br label %end9074 9075cmp.false:9076 %a3 = bitcast <12 x i8> %a to <6 x half>9077 br label %end9078 9079end:9080 %phi = phi <6 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]9081 ret <6 x half> %phi9082}9083 9084define inreg <6 x half> @bitcast_v12i8_to_v6f16_scalar(<12 x i8> inreg %a, i32 inreg %b) {9085; SI-LABEL: bitcast_v12i8_to_v6f16_scalar:9086; SI: ; %bb.0:9087; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9088; SI-NEXT: s_cmp_lg_u32 s28, 09089; SI-NEXT: s_cbranch_scc0 .LBB41_49090; SI-NEXT: ; %bb.1: ; %cmp.false9091; SI-NEXT: s_and_b32 s4, s16, 0xff9092; SI-NEXT: s_lshl_b32 s5, s17, 89093; SI-NEXT: s_or_b32 s4, s4, s59094; SI-NEXT: v_cvt_f32_f16_e32 v0, s49095; SI-NEXT: s_and_b32 s4, s18, 0xff9096; SI-NEXT: s_lshl_b32 s5, s19, 89097; SI-NEXT: s_or_b32 s4, s4, s59098; SI-NEXT: v_cvt_f32_f16_e32 v1, s49099; SI-NEXT: s_and_b32 s4, s20, 0xff9100; SI-NEXT: s_lshl_b32 s5, s21, 89101; SI-NEXT: s_or_b32 s4, s4, s59102; SI-NEXT: v_cvt_f32_f16_e32 v2, s49103; SI-NEXT: s_and_b32 s4, s22, 0xff9104; SI-NEXT: s_lshl_b32 s5, s23, 89105; SI-NEXT: s_or_b32 s4, s4, s59106; SI-NEXT: v_cvt_f32_f16_e32 v3, s49107; SI-NEXT: s_and_b32 s4, s24, 0xff9108; SI-NEXT: s_lshl_b32 s5, s25, 89109; SI-NEXT: s_or_b32 s4, s4, s59110; SI-NEXT: v_cvt_f32_f16_e32 v4, s49111; SI-NEXT: s_and_b32 s4, s26, 0xff9112; SI-NEXT: s_lshl_b32 s5, s27, 89113; SI-NEXT: s_or_b32 s4, s4, s59114; SI-NEXT: v_cvt_f32_f16_e32 v5, s49115; SI-NEXT: s_cbranch_execnz .LBB41_39116; SI-NEXT: .LBB41_2: ; %cmp.true9117; SI-NEXT: s_add_i32 s26, s26, 39118; SI-NEXT: s_and_b32 s4, s26, 0xff9119; SI-NEXT: s_lshl_b32 s5, s27, 89120; SI-NEXT: s_add_i32 s24, s24, 39121; SI-NEXT: s_or_b32 s4, s5, s49122; SI-NEXT: s_and_b32 s5, s24, 0xff9123; SI-NEXT: s_lshl_b32 s6, s25, 89124; SI-NEXT: s_add_i32 s22, s22, 39125; SI-NEXT: s_or_b32 s5, s6, s59126; SI-NEXT: s_and_b32 s6, s22, 0xff9127; SI-NEXT: s_lshl_b32 s7, s23, 89128; SI-NEXT: s_add_i32 s20, s20, 39129; SI-NEXT: s_or_b32 s6, s7, s69130; SI-NEXT: s_and_b32 s7, s20, 0xff9131; SI-NEXT: s_lshl_b32 s8, s21, 89132; SI-NEXT: s_add_i32 s18, s18, 39133; SI-NEXT: s_or_b32 s7, s8, s79134; SI-NEXT: s_and_b32 s8, s18, 0xff9135; SI-NEXT: s_lshl_b32 s9, s19, 89136; SI-NEXT: s_add_i32 s16, s16, 39137; SI-NEXT: s_or_b32 s8, s9, s89138; SI-NEXT: s_and_b32 s9, s16, 0xff9139; SI-NEXT: s_lshl_b32 s10, s17, 89140; SI-NEXT: s_or_b32 s9, s10, s99141; SI-NEXT: s_addk_i32 s4, 0x3009142; SI-NEXT: s_addk_i32 s5, 0x3009143; SI-NEXT: s_addk_i32 s6, 0x3009144; SI-NEXT: s_addk_i32 s7, 0x3009145; SI-NEXT: s_addk_i32 s8, 0x3009146; SI-NEXT: s_addk_i32 s9, 0x3009147; SI-NEXT: v_cvt_f32_f16_e32 v0, s99148; SI-NEXT: v_cvt_f32_f16_e32 v1, s89149; SI-NEXT: v_cvt_f32_f16_e32 v2, s79150; SI-NEXT: v_cvt_f32_f16_e32 v3, s69151; SI-NEXT: v_cvt_f32_f16_e32 v4, s59152; SI-NEXT: v_cvt_f32_f16_e32 v5, s49153; SI-NEXT: .LBB41_3: ; %end9154; SI-NEXT: s_setpc_b64 s[30:31]9155; SI-NEXT: .LBB41_4:9156; SI-NEXT: ; implicit-def: $vgpr09157; SI-NEXT: ; implicit-def: $vgpr19158; SI-NEXT: ; implicit-def: $vgpr29159; SI-NEXT: ; implicit-def: $vgpr39160; SI-NEXT: ; implicit-def: $vgpr49161; SI-NEXT: ; implicit-def: $vgpr59162; SI-NEXT: s_branch .LBB41_29163;9164; VI-LABEL: bitcast_v12i8_to_v6f16_scalar:9165; VI: ; %bb.0:9166; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9167; VI-NEXT: s_cmp_lg_u32 s28, 09168; VI-NEXT: s_cbranch_scc0 .LBB41_49169; VI-NEXT: ; %bb.1: ; %cmp.false9170; VI-NEXT: s_and_b32 s4, s16, 0xff9171; VI-NEXT: s_lshl_b32 s5, s17, 89172; VI-NEXT: s_or_b32 s4, s4, s59173; VI-NEXT: s_and_b32 s5, s18, 0xff9174; VI-NEXT: s_lshl_b32 s6, s19, 89175; VI-NEXT: s_or_b32 s5, s5, s69176; VI-NEXT: s_and_b32 s4, s4, 0xffff9177; VI-NEXT: s_lshl_b32 s5, s5, 169178; VI-NEXT: s_or_b32 s4, s4, s59179; VI-NEXT: s_and_b32 s5, s20, 0xff9180; VI-NEXT: s_lshl_b32 s6, s21, 89181; VI-NEXT: s_or_b32 s5, s5, s69182; VI-NEXT: s_and_b32 s6, s22, 0xff9183; VI-NEXT: s_lshl_b32 s7, s23, 89184; VI-NEXT: s_or_b32 s6, s6, s79185; VI-NEXT: s_and_b32 s5, s5, 0xffff9186; VI-NEXT: s_lshl_b32 s6, s6, 169187; VI-NEXT: s_or_b32 s5, s5, s69188; VI-NEXT: s_and_b32 s6, s24, 0xff9189; VI-NEXT: s_lshl_b32 s7, s25, 89190; VI-NEXT: s_or_b32 s6, s6, s79191; VI-NEXT: s_and_b32 s7, s26, 0xff9192; VI-NEXT: s_lshl_b32 s8, s27, 89193; VI-NEXT: s_or_b32 s7, s7, s89194; VI-NEXT: s_and_b32 s6, s6, 0xffff9195; VI-NEXT: s_lshl_b32 s7, s7, 169196; VI-NEXT: s_or_b32 s6, s6, s79197; VI-NEXT: s_cbranch_execnz .LBB41_39198; VI-NEXT: .LBB41_2: ; %cmp.true9199; VI-NEXT: s_add_i32 s16, s16, 39200; VI-NEXT: s_and_b32 s4, s16, 0xff9201; VI-NEXT: s_lshl_b32 s5, s17, 89202; VI-NEXT: s_add_i32 s18, s18, 39203; VI-NEXT: s_or_b32 s4, s5, s49204; VI-NEXT: s_and_b32 s5, s18, 0xff9205; VI-NEXT: s_lshl_b32 s6, s19, 89206; VI-NEXT: s_addk_i32 s4, 0x3009207; VI-NEXT: s_or_b32 s5, s6, s59208; VI-NEXT: s_and_b32 s4, s4, 0xffff9209; VI-NEXT: s_lshl_b32 s5, s5, 169210; VI-NEXT: s_add_i32 s20, s20, 39211; VI-NEXT: s_or_b32 s4, s5, s49212; VI-NEXT: s_and_b32 s5, s20, 0xff9213; VI-NEXT: s_lshl_b32 s6, s21, 89214; VI-NEXT: s_add_i32 s22, s22, 39215; VI-NEXT: s_or_b32 s5, s6, s59216; VI-NEXT: s_and_b32 s6, s22, 0xff9217; VI-NEXT: s_lshl_b32 s7, s23, 89218; VI-NEXT: s_addk_i32 s5, 0x3009219; VI-NEXT: s_or_b32 s6, s7, s69220; VI-NEXT: s_and_b32 s5, s5, 0xffff9221; VI-NEXT: s_lshl_b32 s6, s6, 169222; VI-NEXT: s_add_i32 s24, s24, 39223; VI-NEXT: s_or_b32 s5, s6, s59224; VI-NEXT: s_and_b32 s6, s24, 0xff9225; VI-NEXT: s_lshl_b32 s7, s25, 89226; VI-NEXT: s_add_i32 s26, s26, 39227; VI-NEXT: s_or_b32 s6, s7, s69228; VI-NEXT: s_and_b32 s7, s26, 0xff9229; VI-NEXT: s_lshl_b32 s8, s27, 89230; VI-NEXT: s_addk_i32 s6, 0x3009231; VI-NEXT: s_or_b32 s7, s8, s79232; VI-NEXT: s_and_b32 s6, s6, 0xffff9233; VI-NEXT: s_lshl_b32 s7, s7, 169234; VI-NEXT: s_or_b32 s6, s7, s69235; VI-NEXT: s_add_i32 s4, s4, 0x30000009236; VI-NEXT: s_add_i32 s5, s5, 0x30000009237; VI-NEXT: s_add_i32 s6, s6, 0x30000009238; VI-NEXT: .LBB41_3: ; %end9239; VI-NEXT: v_mov_b32_e32 v0, s49240; VI-NEXT: v_mov_b32_e32 v1, s59241; VI-NEXT: v_mov_b32_e32 v2, s69242; VI-NEXT: s_setpc_b64 s[30:31]9243; VI-NEXT: .LBB41_4:9244; VI-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr6_sgpr79245; VI-NEXT: s_branch .LBB41_29246;9247; GFX9-LABEL: bitcast_v12i8_to_v6f16_scalar:9248; GFX9: ; %bb.0:9249; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9250; GFX9-NEXT: s_cmp_lg_u32 s28, 09251; GFX9-NEXT: s_cbranch_scc0 .LBB41_49252; GFX9-NEXT: ; %bb.1: ; %cmp.false9253; GFX9-NEXT: s_and_b32 s4, s16, 0xff9254; GFX9-NEXT: s_lshl_b32 s5, s17, 89255; GFX9-NEXT: s_or_b32 s4, s4, s59256; GFX9-NEXT: s_and_b32 s5, s18, 0xff9257; GFX9-NEXT: s_lshl_b32 s6, s19, 89258; GFX9-NEXT: s_or_b32 s5, s5, s69259; GFX9-NEXT: s_and_b32 s4, s4, 0xffff9260; GFX9-NEXT: s_lshl_b32 s5, s5, 169261; GFX9-NEXT: s_or_b32 s4, s4, s59262; GFX9-NEXT: s_and_b32 s5, s20, 0xff9263; GFX9-NEXT: s_lshl_b32 s6, s21, 89264; GFX9-NEXT: s_or_b32 s5, s5, s69265; GFX9-NEXT: s_and_b32 s6, s22, 0xff9266; GFX9-NEXT: s_lshl_b32 s7, s23, 89267; GFX9-NEXT: s_or_b32 s6, s6, s79268; GFX9-NEXT: s_and_b32 s5, s5, 0xffff9269; GFX9-NEXT: s_lshl_b32 s6, s6, 169270; GFX9-NEXT: s_or_b32 s5, s5, s69271; GFX9-NEXT: s_and_b32 s6, s24, 0xff9272; GFX9-NEXT: s_lshl_b32 s7, s25, 89273; GFX9-NEXT: s_or_b32 s6, s6, s79274; GFX9-NEXT: s_and_b32 s7, s26, 0xff9275; GFX9-NEXT: s_lshl_b32 s8, s27, 89276; GFX9-NEXT: s_or_b32 s7, s7, s89277; GFX9-NEXT: s_and_b32 s6, s6, 0xffff9278; GFX9-NEXT: s_lshl_b32 s7, s7, 169279; GFX9-NEXT: s_or_b32 s6, s6, s79280; GFX9-NEXT: s_cbranch_execnz .LBB41_39281; GFX9-NEXT: .LBB41_2: ; %cmp.true9282; GFX9-NEXT: s_add_i32 s16, s16, 39283; GFX9-NEXT: s_and_b32 s4, s16, 0xff9284; GFX9-NEXT: s_lshl_b32 s5, s17, 89285; GFX9-NEXT: s_add_i32 s18, s18, 39286; GFX9-NEXT: s_or_b32 s4, s5, s49287; GFX9-NEXT: s_and_b32 s5, s18, 0xff9288; GFX9-NEXT: s_lshl_b32 s6, s19, 89289; GFX9-NEXT: s_or_b32 s5, s6, s59290; GFX9-NEXT: s_addk_i32 s4, 0x3009291; GFX9-NEXT: s_addk_i32 s5, 0x3009292; GFX9-NEXT: s_and_b32 s4, s4, 0xffff9293; GFX9-NEXT: s_lshl_b32 s5, s5, 169294; GFX9-NEXT: s_add_i32 s20, s20, 39295; GFX9-NEXT: s_or_b32 s4, s4, s59296; GFX9-NEXT: s_and_b32 s5, s20, 0xff9297; GFX9-NEXT: s_lshl_b32 s6, s21, 89298; GFX9-NEXT: s_add_i32 s22, s22, 39299; GFX9-NEXT: s_or_b32 s5, s6, s59300; GFX9-NEXT: s_and_b32 s6, s22, 0xff9301; GFX9-NEXT: s_lshl_b32 s7, s23, 89302; GFX9-NEXT: s_or_b32 s6, s7, s69303; GFX9-NEXT: s_addk_i32 s5, 0x3009304; GFX9-NEXT: s_addk_i32 s6, 0x3009305; GFX9-NEXT: s_and_b32 s5, s5, 0xffff9306; GFX9-NEXT: s_lshl_b32 s6, s6, 169307; GFX9-NEXT: s_add_i32 s24, s24, 39308; GFX9-NEXT: s_or_b32 s5, s5, s69309; GFX9-NEXT: s_and_b32 s6, s24, 0xff9310; GFX9-NEXT: s_lshl_b32 s7, s25, 89311; GFX9-NEXT: s_add_i32 s26, s26, 39312; GFX9-NEXT: s_or_b32 s6, s7, s69313; GFX9-NEXT: s_and_b32 s7, s26, 0xff9314; GFX9-NEXT: s_lshl_b32 s8, s27, 89315; GFX9-NEXT: s_or_b32 s7, s8, s79316; GFX9-NEXT: s_addk_i32 s6, 0x3009317; GFX9-NEXT: s_addk_i32 s7, 0x3009318; GFX9-NEXT: s_and_b32 s6, s6, 0xffff9319; GFX9-NEXT: s_lshl_b32 s7, s7, 169320; GFX9-NEXT: s_or_b32 s6, s6, s79321; GFX9-NEXT: .LBB41_3: ; %end9322; GFX9-NEXT: v_mov_b32_e32 v0, s49323; GFX9-NEXT: v_mov_b32_e32 v1, s59324; GFX9-NEXT: v_mov_b32_e32 v2, s69325; GFX9-NEXT: s_setpc_b64 s[30:31]9326; GFX9-NEXT: .LBB41_4:9327; GFX9-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr6_sgpr79328; GFX9-NEXT: s_branch .LBB41_29329;9330; GFX11-LABEL: bitcast_v12i8_to_v6f16_scalar:9331; GFX11: ; %bb.0:9332; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9333; GFX11-NEXT: s_cmp_lg_u32 s24, 09334; GFX11-NEXT: s_mov_b32 s8, 09335; GFX11-NEXT: s_cbranch_scc0 .LBB41_49336; GFX11-NEXT: ; %bb.1: ; %cmp.false9337; GFX11-NEXT: s_and_b32 s4, s0, 0xff9338; GFX11-NEXT: s_lshl_b32 s5, s1, 89339; GFX11-NEXT: s_and_b32 s6, s2, 0xff9340; GFX11-NEXT: s_lshl_b32 s7, s3, 89341; GFX11-NEXT: s_or_b32 s4, s4, s59342; GFX11-NEXT: s_or_b32 s5, s6, s79343; GFX11-NEXT: s_and_b32 s4, s4, 0xffff9344; GFX11-NEXT: s_lshl_b32 s5, s5, 169345; GFX11-NEXT: s_lshl_b32 s6, s17, 89346; GFX11-NEXT: s_or_b32 s4, s4, s59347; GFX11-NEXT: s_and_b32 s5, s16, 0xff9348; GFX11-NEXT: s_and_b32 s7, s18, 0xff9349; GFX11-NEXT: s_lshl_b32 s9, s19, 89350; GFX11-NEXT: s_or_b32 s5, s5, s69351; GFX11-NEXT: s_or_b32 s6, s7, s99352; GFX11-NEXT: s_and_b32 s7, s20, 0xff9353; GFX11-NEXT: s_lshl_b32 s9, s21, 89354; GFX11-NEXT: s_and_b32 s10, s22, 0xff9355; GFX11-NEXT: s_lshl_b32 s11, s23, 89356; GFX11-NEXT: s_or_b32 s7, s7, s99357; GFX11-NEXT: s_or_b32 s9, s10, s119358; GFX11-NEXT: s_and_b32 s5, s5, 0xffff9359; GFX11-NEXT: s_lshl_b32 s6, s6, 169360; GFX11-NEXT: s_and_b32 s7, s7, 0xffff9361; GFX11-NEXT: s_lshl_b32 s9, s9, 169362; GFX11-NEXT: s_or_b32 s5, s5, s69363; GFX11-NEXT: s_or_b32 s6, s7, s99364; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s89365; GFX11-NEXT: s_cbranch_vccnz .LBB41_39366; GFX11-NEXT: .LBB41_2: ; %cmp.true9367; GFX11-NEXT: s_add_i32 s0, s0, 39368; GFX11-NEXT: s_add_i32 s2, s2, 39369; GFX11-NEXT: s_and_b32 s0, s0, 0xff9370; GFX11-NEXT: s_lshl_b32 s1, s1, 89371; GFX11-NEXT: s_and_b32 s2, s2, 0xff9372; GFX11-NEXT: s_lshl_b32 s3, s3, 89373; GFX11-NEXT: s_or_b32 s0, s1, s09374; GFX11-NEXT: s_or_b32 s1, s3, s29375; GFX11-NEXT: s_addk_i32 s0, 0x3009376; GFX11-NEXT: s_addk_i32 s1, 0x3009377; GFX11-NEXT: s_and_b32 s0, s0, 0xffff9378; GFX11-NEXT: s_lshl_b32 s1, s1, 169379; GFX11-NEXT: s_add_i32 s16, s16, 39380; GFX11-NEXT: s_or_b32 s4, s0, s19381; GFX11-NEXT: s_and_b32 s0, s16, 0xff9382; GFX11-NEXT: s_lshl_b32 s1, s17, 89383; GFX11-NEXT: s_add_i32 s18, s18, 39384; GFX11-NEXT: s_or_b32 s0, s1, s09385; GFX11-NEXT: s_and_b32 s1, s18, 0xff9386; GFX11-NEXT: s_lshl_b32 s2, s19, 89387; GFX11-NEXT: s_add_i32 s20, s20, 39388; GFX11-NEXT: s_add_i32 s22, s22, 39389; GFX11-NEXT: s_or_b32 s1, s2, s19390; GFX11-NEXT: s_and_b32 s2, s20, 0xff9391; GFX11-NEXT: s_lshl_b32 s3, s21, 89392; GFX11-NEXT: s_and_b32 s5, s22, 0xff9393; GFX11-NEXT: s_lshl_b32 s6, s23, 89394; GFX11-NEXT: s_or_b32 s2, s3, s29395; GFX11-NEXT: s_or_b32 s3, s6, s59396; GFX11-NEXT: s_addk_i32 s0, 0x3009397; GFX11-NEXT: s_addk_i32 s1, 0x3009398; GFX11-NEXT: s_addk_i32 s2, 0x3009399; GFX11-NEXT: s_addk_i32 s3, 0x3009400; GFX11-NEXT: s_and_b32 s0, s0, 0xffff9401; GFX11-NEXT: s_lshl_b32 s1, s1, 169402; GFX11-NEXT: s_and_b32 s2, s2, 0xffff9403; GFX11-NEXT: s_lshl_b32 s3, s3, 169404; GFX11-NEXT: s_or_b32 s5, s0, s19405; GFX11-NEXT: s_or_b32 s6, s2, s39406; GFX11-NEXT: .LBB41_3: ; %end9407; GFX11-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s59408; GFX11-NEXT: v_mov_b32_e32 v2, s69409; GFX11-NEXT: s_setpc_b64 s[30:31]9410; GFX11-NEXT: .LBB41_4:9411; GFX11-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr6_sgpr79412; GFX11-NEXT: s_branch .LBB41_29413 %cmp = icmp eq i32 %b, 09414 br i1 %cmp, label %cmp.true, label %cmp.false9415 9416cmp.true:9417 %a1 = add <12 x i8> %a, splat (i8 3)9418 %a2 = bitcast <12 x i8> %a1 to <6 x half>9419 br label %end9420 9421cmp.false:9422 %a3 = bitcast <12 x i8> %a to <6 x half>9423 br label %end9424 9425end:9426 %phi = phi <6 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]9427 ret <6 x half> %phi9428}9429 9430define <12 x i8> @bitcast_v6f16_to_v12i8(<6 x half> %a, i32 %b) {9431; SI-LABEL: bitcast_v6f16_to_v12i8:9432; SI: ; %bb.0:9433; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9434; SI-NEXT: v_mov_b32_e32 v7, v69435; SI-NEXT: v_cvt_f16_f32_e32 v15, v19436; SI-NEXT: v_cvt_f16_f32_e32 v14, v09437; SI-NEXT: v_cvt_f16_f32_e32 v6, v39438; SI-NEXT: v_cvt_f16_f32_e32 v13, v29439; SI-NEXT: v_cvt_f16_f32_e32 v10, v59440; SI-NEXT: v_cvt_f16_f32_e32 v12, v49441; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v79442; SI-NEXT: ; implicit-def: $vgpr09443; SI-NEXT: ; implicit-def: $vgpr19444; SI-NEXT: ; implicit-def: $vgpr29445; SI-NEXT: ; implicit-def: $vgpr39446; SI-NEXT: ; implicit-def: $vgpr49447; SI-NEXT: ; implicit-def: $vgpr59448; SI-NEXT: ; implicit-def: $vgpr79449; SI-NEXT: ; implicit-def: $vgpr89450; SI-NEXT: ; implicit-def: $vgpr99451; SI-NEXT: ; implicit-def: $vgpr119452; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc9453; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]9454; SI-NEXT: s_cbranch_execnz .LBB42_39455; SI-NEXT: ; %bb.1: ; %Flow9456; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]9457; SI-NEXT: s_cbranch_execnz .LBB42_49458; SI-NEXT: .LBB42_2: ; %end9459; SI-NEXT: s_or_b64 exec, exec, s[4:5]9460; SI-NEXT: s_setpc_b64 s[30:31]9461; SI-NEXT: .LBB42_3: ; %cmp.false9462; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v159463; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v69464; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v109465; SI-NEXT: v_or_b32_e32 v0, v14, v09466; SI-NEXT: v_or_b32_e32 v4, v13, v19467; SI-NEXT: v_or_b32_e32 v8, v12, v79468; SI-NEXT: v_alignbit_b32 v3, v4, v0, 249469; SI-NEXT: v_alignbit_b32 v2, v4, v0, 169470; SI-NEXT: v_alignbit_b32 v1, v4, v0, 89471; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v49472; SI-NEXT: v_lshrrev_b32_e32 v9, 8, v89473; SI-NEXT: v_bfe_u32 v7, v6, 8, 89474; SI-NEXT: v_bfe_u32 v11, v10, 8, 89475; SI-NEXT: ; implicit-def: $vgpr159476; SI-NEXT: ; implicit-def: $vgpr149477; SI-NEXT: ; implicit-def: $vgpr139478; SI-NEXT: ; implicit-def: $vgpr129479; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]9480; SI-NEXT: s_cbranch_execz .LBB42_29481; SI-NEXT: .LBB42_4: ; %cmp.true9482; SI-NEXT: v_cvt_f32_f16_e32 v0, v159483; SI-NEXT: v_cvt_f32_f16_e32 v1, v149484; SI-NEXT: v_cvt_f32_f16_e32 v2, v69485; SI-NEXT: v_cvt_f32_f16_e32 v3, v139486; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v09487; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v19488; SI-NEXT: v_cvt_f16_f32_e32 v0, v09489; SI-NEXT: v_cvt_f16_f32_e32 v1, v19490; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v29491; SI-NEXT: v_cvt_f16_f32_e32 v6, v29492; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v09493; SI-NEXT: v_or_b32_e32 v0, v1, v09494; SI-NEXT: v_cvt_f32_f16_e32 v1, v109495; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v39496; SI-NEXT: v_cvt_f32_f16_e32 v3, v129497; SI-NEXT: v_cvt_f16_f32_e32 v2, v29498; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v19499; SI-NEXT: v_cvt_f16_f32_e32 v10, v19500; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v39501; SI-NEXT: v_cvt_f16_f32_e32 v1, v19502; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v69503; SI-NEXT: v_or_b32_e32 v4, v2, v39504; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v109505; SI-NEXT: v_or_b32_e32 v8, v1, v29506; SI-NEXT: v_alignbit_b32 v3, v4, v0, 249507; SI-NEXT: v_alignbit_b32 v2, v4, v0, 169508; SI-NEXT: v_alignbit_b32 v1, v4, v0, 89509; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v49510; SI-NEXT: v_lshrrev_b32_e32 v9, 8, v89511; SI-NEXT: v_bfe_u32 v7, v6, 8, 89512; SI-NEXT: v_bfe_u32 v11, v10, 8, 89513; SI-NEXT: s_or_b64 exec, exec, s[4:5]9514; SI-NEXT: s_setpc_b64 s[30:31]9515;9516; VI-LABEL: bitcast_v6f16_to_v12i8:9517; VI: ; %bb.0:9518; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9519; VI-NEXT: v_mov_b32_e32 v8, v29520; VI-NEXT: v_mov_b32_e32 v14, v19521; VI-NEXT: v_mov_b32_e32 v13, v09522; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v39523; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v89524; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v149525; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v139526; VI-NEXT: ; implicit-def: $vgpr19527; VI-NEXT: ; implicit-def: $vgpr39528; VI-NEXT: ; implicit-def: $vgpr59529; VI-NEXT: ; implicit-def: $vgpr79530; VI-NEXT: ; implicit-def: $vgpr99531; VI-NEXT: ; implicit-def: $vgpr119532; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc9533; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]9534; VI-NEXT: ; %bb.1: ; %cmp.false9535; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v89536; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v149537; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v149538; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]9539; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]9540; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v139541; VI-NEXT: ; %bb.2: ; %Flow9542; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]9543; VI-NEXT: s_cbranch_execz .LBB42_49544; VI-NEXT: ; %bb.3: ; %cmp.true9545; VI-NEXT: v_mov_b32_e32 v3, 0x2009546; VI-NEXT: v_add_f16_sdwa v6, v14, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9547; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v69548; VI-NEXT: v_add_f16_e32 v14, 0x200, v149549; VI-NEXT: v_add_f16_sdwa v2, v13, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9550; VI-NEXT: v_add_f16_sdwa v10, v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD9551; VI-NEXT: v_or_b32_e32 v1, v14, v09552; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v29553; VI-NEXT: v_add_f16_e32 v13, 0x200, v139554; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v109555; VI-NEXT: v_add_f16_e32 v8, 0x200, v89556; VI-NEXT: v_or_b32_e32 v0, v13, v09557; VI-NEXT: v_or_b32_e32 v11, v8, v39558; VI-NEXT: v_mov_b32_e32 v12, 0x7e007e009559; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1]9560; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v119561; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]9562; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v19563; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v09564; VI-NEXT: v_bfe_u32 v7, v6, 8, 89565; VI-NEXT: .LBB42_4: ; %end9566; VI-NEXT: s_or_b64 exec, exec, s[4:5]9567; VI-NEXT: v_mov_b32_e32 v0, v139568; VI-NEXT: v_mov_b32_e32 v4, v149569; VI-NEXT: s_setpc_b64 s[30:31]9570;9571; GFX9-LABEL: bitcast_v6f16_to_v12i8:9572; GFX9: ; %bb.0:9573; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9574; GFX9-NEXT: v_mov_b32_e32 v13, v29575; GFX9-NEXT: v_mov_b32_e32 v16, v19576; GFX9-NEXT: v_mov_b32_e32 v15, v09577; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v39578; GFX9-NEXT: ; implicit-def: $vgpr19579; GFX9-NEXT: ; implicit-def: $vgpr29580; GFX9-NEXT: ; implicit-def: $vgpr39581; GFX9-NEXT: ; implicit-def: $vgpr59582; GFX9-NEXT: ; implicit-def: $vgpr69583; GFX9-NEXT: ; implicit-def: $vgpr79584; GFX9-NEXT: ; implicit-def: $vgpr99585; GFX9-NEXT: ; implicit-def: $vgpr109586; GFX9-NEXT: ; implicit-def: $vgpr119587; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc9588; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]9589; GFX9-NEXT: s_cbranch_execz .LBB42_29590; GFX9-NEXT: ; %bb.1: ; %cmp.false9591; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v139592; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v139593; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v169594; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v169595; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v169596; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v159597; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[13:14]9598; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[15:16]9599; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v159600; GFX9-NEXT: .LBB42_2: ; %Flow9601; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]9602; GFX9-NEXT: s_cbranch_execz .LBB42_49603; GFX9-NEXT: ; %bb.3: ; %cmp.true9604; GFX9-NEXT: s_movk_i32 s6, 0x2009605; GFX9-NEXT: v_pk_add_f16 v16, v16, s6 op_sel_hi:[1,0]9606; GFX9-NEXT: v_pk_add_f16 v15, v15, s6 op_sel_hi:[1,0]9607; GFX9-NEXT: v_pk_add_f16 v13, v13, s6 op_sel_hi:[1,0]9608; GFX9-NEXT: v_mov_b32_e32 v14, 0x7e007e009609; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[15:16]9610; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[13:14]9611; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v139612; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v139613; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v169614; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v169615; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v169616; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v159617; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v159618; GFX9-NEXT: .LBB42_4: ; %end9619; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]9620; GFX9-NEXT: v_mov_b32_e32 v0, v159621; GFX9-NEXT: v_mov_b32_e32 v4, v169622; GFX9-NEXT: v_mov_b32_e32 v8, v139623; GFX9-NEXT: s_setpc_b64 s[30:31]9624;9625; GFX11-TRUE16-LABEL: bitcast_v6f16_to_v12i8:9626; GFX11-TRUE16: ; %bb.0:9627; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9628; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v13, v19629; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, v09630; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v39631; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo169632; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo169633; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo169634; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo169635; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo169636; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo169637; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo9638; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)9639; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s09640; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false9641; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v109642; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v139643; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v139644; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[10:11]9645; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[12:13]9646; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v129647; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow9648; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s09649; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB42_49650; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true9651; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]9652; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]9653; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]9654; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0x7e007e009655; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)9656; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v139657; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[12:13]9658; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)9659; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v109660; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[10:11]9661; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v139662; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v129663; GFX11-TRUE16-NEXT: .LBB42_4: ; %end9664; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s09665; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v12.l9666; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v12.h9667; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v13.l9668; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v13.h9669; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v10.l9670; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v10.h9671; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v14.l9672; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]9673;9674; GFX11-FAKE16-LABEL: bitcast_v6f16_to_v12i8:9675; GFX11-FAKE16: ; %bb.0:9676; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9677; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, v2 :: v_dual_mov_b32 v16, v19678; GFX11-FAKE16-NEXT: v_mov_b32_e32 v15, v09679; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v39680; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr19681; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr29682; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39683; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59684; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69685; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr79686; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr99687; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr109688; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr119689; GFX11-FAKE16-NEXT: s_and_saveexec_b32 s0, vcc_lo9690; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)9691; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s09692; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB42_29693; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false9694; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v139695; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v139696; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v169697; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v169698; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v169699; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v159700; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[13:14]9701; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[15:16]9702; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v159703; GFX11-FAKE16-NEXT: .LBB42_2: ; %Flow9704; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s09705; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB42_49706; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true9707; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]9708; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]9709; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]9710; GFX11-FAKE16-NEXT: v_mov_b32_e32 v14, 0x7e007e009711; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)9712; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v169713; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[15:16]9714; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)9715; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v139716; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[13:14]9717; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v139718; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v169719; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v169720; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v159721; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v159722; GFX11-FAKE16-NEXT: .LBB42_4: ; %end9723; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s09724; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v159725; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v169726; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, v139727; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]9728 %cmp = icmp eq i32 %b, 09729 br i1 %cmp, label %cmp.true, label %cmp.false9730 9731cmp.true:9732 %a1 = fadd <6 x half> %a, splat (half 0xH0200)9733 %a2 = bitcast <6 x half> %a1 to <12 x i8>9734 br label %end9735 9736cmp.false:9737 %a3 = bitcast <6 x half> %a to <12 x i8>9738 br label %end9739 9740end:9741 %phi = phi <12 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]9742 ret <12 x i8> %phi9743}9744 9745define inreg <12 x i8> @bitcast_v6f16_to_v12i8_scalar(<6 x half> inreg %a, i32 inreg %b) {9746; SI-LABEL: bitcast_v6f16_to_v12i8_scalar:9747; SI: ; %bb.0:9748; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9749; SI-NEXT: v_cvt_f16_f32_e32 v16, s179750; SI-NEXT: v_cvt_f16_f32_e32 v15, s169751; SI-NEXT: v_cvt_f16_f32_e32 v6, s199752; SI-NEXT: v_cvt_f16_f32_e32 v14, s189753; SI-NEXT: v_cvt_f16_f32_e32 v10, s219754; SI-NEXT: v_cvt_f16_f32_e32 v0, s209755; SI-NEXT: s_cmp_lg_u32 s22, 09756; SI-NEXT: s_cbranch_scc0 .LBB43_49757; SI-NEXT: ; %bb.1: ; %cmp.false9758; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v169759; SI-NEXT: v_or_b32_e32 v12, v15, v19760; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v69761; SI-NEXT: v_or_b32_e32 v13, v14, v19762; SI-NEXT: v_lshr_b64 v[1:2], v[12:13], 89763; SI-NEXT: v_lshr_b64 v[3:4], v[12:13], 249764; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v109765; SI-NEXT: v_lshr_b64 v[4:5], v[12:13], 169766; SI-NEXT: v_or_b32_e32 v8, v0, v29767; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v139768; SI-NEXT: v_lshrrev_b32_e32 v9, 8, v89769; SI-NEXT: v_bfe_u32 v7, v6, 8, 89770; SI-NEXT: v_bfe_u32 v11, v10, 8, 89771; SI-NEXT: s_cbranch_execnz .LBB43_39772; SI-NEXT: .LBB43_2: ; %cmp.true9773; SI-NEXT: v_cvt_f32_f16_e32 v1, v169774; SI-NEXT: v_cvt_f32_f16_e32 v2, v159775; SI-NEXT: v_cvt_f32_f16_e32 v3, v69776; SI-NEXT: v_cvt_f32_f16_e32 v4, v149777; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v19778; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v29779; SI-NEXT: v_cvt_f16_f32_e32 v1, v19780; SI-NEXT: v_cvt_f16_f32_e32 v2, v29781; SI-NEXT: v_cvt_f32_f16_e32 v0, v09782; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v39783; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v19784; SI-NEXT: v_or_b32_e32 v12, v2, v19785; SI-NEXT: v_cvt_f32_f16_e32 v1, v109786; SI-NEXT: v_cvt_f16_f32_e32 v6, v39787; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v49788; SI-NEXT: v_cvt_f16_f32_e32 v2, v29789; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v19790; SI-NEXT: v_cvt_f16_f32_e32 v10, v19791; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v09792; SI-NEXT: v_cvt_f16_f32_e32 v0, v09793; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v69794; SI-NEXT: v_or_b32_e32 v13, v2, v19795; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v109796; SI-NEXT: v_lshr_b64 v[3:4], v[12:13], 249797; SI-NEXT: v_or_b32_e32 v8, v0, v19798; SI-NEXT: v_lshr_b64 v[4:5], v[12:13], 169799; SI-NEXT: v_lshr_b64 v[1:2], v[12:13], 89800; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v139801; SI-NEXT: v_lshrrev_b32_e32 v9, 8, v89802; SI-NEXT: v_bfe_u32 v7, v6, 8, 89803; SI-NEXT: v_bfe_u32 v11, v10, 8, 89804; SI-NEXT: .LBB43_3: ; %end9805; SI-NEXT: v_mov_b32_e32 v0, v129806; SI-NEXT: v_mov_b32_e32 v2, v49807; SI-NEXT: v_mov_b32_e32 v4, v139808; SI-NEXT: s_setpc_b64 s[30:31]9809; SI-NEXT: .LBB43_4:9810; SI-NEXT: ; implicit-def: $vgpr129811; SI-NEXT: ; implicit-def: $vgpr19812; SI-NEXT: ; implicit-def: $vgpr49813; SI-NEXT: ; implicit-def: $vgpr39814; SI-NEXT: ; implicit-def: $vgpr59815; SI-NEXT: ; implicit-def: $vgpr79816; SI-NEXT: ; implicit-def: $vgpr89817; SI-NEXT: ; implicit-def: $vgpr99818; SI-NEXT: ; implicit-def: $vgpr119819; SI-NEXT: s_branch .LBB43_29820;9821; VI-LABEL: bitcast_v6f16_to_v12i8_scalar:9822; VI: ; %bb.0:9823; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9824; VI-NEXT: s_cmp_lg_u32 s19, 09825; VI-NEXT: s_cbranch_scc0 .LBB43_39826; VI-NEXT: ; %bb.1: ; %cmp.false9827; VI-NEXT: s_lshr_b32 s19, s16, 169828; VI-NEXT: s_lshr_b32 s14, s18, 169829; VI-NEXT: s_lshr_b32 s11, s18, 89830; VI-NEXT: s_lshr_b32 s13, s17, 249831; VI-NEXT: s_lshr_b32 s15, s17, 169832; VI-NEXT: s_lshr_b32 s10, s17, 89833; VI-NEXT: s_lshr_b32 s12, s16, 89834; VI-NEXT: s_lshr_b64 s[6:7], s[18:19], 249835; VI-NEXT: s_lshr_b64 s[4:5], s[16:17], 249836; VI-NEXT: s_cbranch_execnz .LBB43_49837; VI-NEXT: .LBB43_2: ; %cmp.true9838; VI-NEXT: s_lshr_b32 s4, s17, 169839; VI-NEXT: v_mov_b32_e32 v1, 0x2009840; VI-NEXT: v_add_f16_e32 v6, s4, v19841; VI-NEXT: s_lshr_b32 s4, s16, 169842; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v69843; VI-NEXT: v_add_f16_e32 v13, s17, v19844; VI-NEXT: v_add_f16_e32 v2, s4, v19845; VI-NEXT: s_lshr_b32 s4, s18, 169846; VI-NEXT: v_or_b32_e32 v12, v13, v09847; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v29848; VI-NEXT: v_add_f16_e32 v0, s16, v19849; VI-NEXT: v_add_f16_e32 v10, s4, v19850; VI-NEXT: v_or_b32_e32 v11, v0, v39851; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v109852; VI-NEXT: v_add_f16_e32 v8, s18, v19853; VI-NEXT: v_or_b32_e32 v14, v8, v39854; VI-NEXT: v_mov_b32_e32 v15, 0x7e007e009855; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[11:12]9856; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v129857; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v119858; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[14:15]9859; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v149860; VI-NEXT: v_bfe_u32 v7, v6, 8, 89861; VI-NEXT: v_mov_b32_e32 v4, v139862; VI-NEXT: s_setpc_b64 s[30:31]9863; VI-NEXT: .LBB43_3:9864; VI-NEXT: ; implicit-def: $sgpr129865; VI-NEXT: ; implicit-def: $sgpr199866; VI-NEXT: ; implicit-def: $sgpr49867; VI-NEXT: ; implicit-def: $sgpr109868; VI-NEXT: ; implicit-def: $sgpr159869; VI-NEXT: ; implicit-def: $sgpr139870; VI-NEXT: ; implicit-def: $sgpr119871; VI-NEXT: ; implicit-def: $sgpr149872; VI-NEXT: ; implicit-def: $sgpr69873; VI-NEXT: s_branch .LBB43_29874; VI-NEXT: .LBB43_4:9875; VI-NEXT: v_mov_b32_e32 v2, s199876; VI-NEXT: v_mov_b32_e32 v6, s159877; VI-NEXT: v_mov_b32_e32 v10, s149878; VI-NEXT: v_mov_b32_e32 v0, s169879; VI-NEXT: v_mov_b32_e32 v8, s189880; VI-NEXT: v_mov_b32_e32 v7, s139881; VI-NEXT: v_mov_b32_e32 v9, s119882; VI-NEXT: v_mov_b32_e32 v1, s129883; VI-NEXT: v_mov_b32_e32 v5, s109884; VI-NEXT: v_mov_b32_e32 v11, s69885; VI-NEXT: v_mov_b32_e32 v3, s49886; VI-NEXT: v_mov_b32_e32 v4, s179887; VI-NEXT: s_setpc_b64 s[30:31]9888;9889; GFX9-LABEL: bitcast_v6f16_to_v12i8_scalar:9890; GFX9: ; %bb.0:9891; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9892; GFX9-NEXT: s_cmp_lg_u32 s19, 09893; GFX9-NEXT: s_cbranch_scc0 .LBB43_39894; GFX9-NEXT: ; %bb.1: ; %cmp.false9895; GFX9-NEXT: s_lshr_b32 s19, s16, 89896; GFX9-NEXT: s_lshr_b32 s10, s18, 169897; GFX9-NEXT: s_lshr_b32 s11, s18, 89898; GFX9-NEXT: s_lshr_b32 s12, s17, 249899; GFX9-NEXT: s_lshr_b32 s13, s17, 169900; GFX9-NEXT: s_lshr_b32 s15, s17, 89901; GFX9-NEXT: s_lshr_b32 s14, s16, 169902; GFX9-NEXT: s_lshr_b64 s[6:7], s[18:19], 249903; GFX9-NEXT: s_lshr_b64 s[4:5], s[16:17], 249904; GFX9-NEXT: s_cbranch_execnz .LBB43_49905; GFX9-NEXT: .LBB43_2: ; %cmp.true9906; GFX9-NEXT: v_mov_b32_e32 v0, 0x2009907; GFX9-NEXT: v_pk_add_f16 v15, s17, v0 op_sel_hi:[1,0]9908; GFX9-NEXT: v_pk_add_f16 v14, s16, v0 op_sel_hi:[1,0]9909; GFX9-NEXT: v_pk_add_f16 v8, s18, v0 op_sel_hi:[1,0]9910; GFX9-NEXT: v_mov_b32_e32 v9, 0x7e007e009911; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[14:15]9912; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]9913; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v89914; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v89915; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v159916; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v159917; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v159918; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v149919; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v149920; GFX9-NEXT: s_branch .LBB43_59921; GFX9-NEXT: .LBB43_3:9922; GFX9-NEXT: ; implicit-def: $sgpr199923; GFX9-NEXT: ; implicit-def: $sgpr149924; GFX9-NEXT: ; implicit-def: $sgpr49925; GFX9-NEXT: ; implicit-def: $sgpr159926; GFX9-NEXT: ; implicit-def: $sgpr139927; GFX9-NEXT: ; implicit-def: $sgpr129928; GFX9-NEXT: ; implicit-def: $sgpr119929; GFX9-NEXT: ; implicit-def: $sgpr109930; GFX9-NEXT: ; implicit-def: $sgpr69931; GFX9-NEXT: s_branch .LBB43_29932; GFX9-NEXT: .LBB43_4:9933; GFX9-NEXT: v_mov_b32_e32 v14, s169934; GFX9-NEXT: v_mov_b32_e32 v15, s179935; GFX9-NEXT: v_mov_b32_e32 v8, s189936; GFX9-NEXT: v_mov_b32_e32 v1, s199937; GFX9-NEXT: v_mov_b32_e32 v2, s149938; GFX9-NEXT: v_mov_b32_e32 v5, s159939; GFX9-NEXT: v_mov_b32_e32 v6, s139940; GFX9-NEXT: v_mov_b32_e32 v7, s129941; GFX9-NEXT: v_mov_b32_e32 v13, s119942; GFX9-NEXT: v_mov_b32_e32 v10, s109943; GFX9-NEXT: v_mov_b32_e32 v11, s69944; GFX9-NEXT: v_mov_b32_e32 v3, s49945; GFX9-NEXT: .LBB43_5: ; %end9946; GFX9-NEXT: v_mov_b32_e32 v0, v149947; GFX9-NEXT: v_mov_b32_e32 v4, v159948; GFX9-NEXT: v_mov_b32_e32 v9, v139949; GFX9-NEXT: s_setpc_b64 s[30:31]9950;9951; GFX11-LABEL: bitcast_v6f16_to_v12i8_scalar:9952; GFX11: ; %bb.0:9953; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9954; GFX11-NEXT: s_cmp_lg_u32 s3, 09955; GFX11-NEXT: s_mov_b32 s3, 09956; GFX11-NEXT: s_cbranch_scc0 .LBB43_39957; GFX11-NEXT: ; %bb.1: ; %cmp.false9958; GFX11-NEXT: s_lshr_b32 s8, s2, 169959; GFX11-NEXT: s_lshr_b32 s9, s2, 89960; GFX11-NEXT: s_lshr_b32 s10, s1, 249961; GFX11-NEXT: s_lshr_b32 s11, s1, 169962; GFX11-NEXT: s_lshr_b32 s13, s1, 89963; GFX11-NEXT: s_lshr_b32 s12, s0, 169964; GFX11-NEXT: s_lshr_b32 s14, s0, 89965; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 249966; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 249967; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s39968; GFX11-NEXT: s_cbranch_vccnz .LBB43_49969; GFX11-NEXT: .LBB43_2: ; %cmp.true9970; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s1 op_sel_hi:[0,1]9971; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s0 op_sel_hi:[0,1]9972; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s2 op_sel_hi:[0,1]9973; GFX11-NEXT: v_mov_b32_e32 v9, 0x7e007e009974; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)9975; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v159976; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[14:15]9977; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)9978; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v89979; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]9980; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v89981; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v159982; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v159983; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v149984; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v149985; GFX11-NEXT: s_branch .LBB43_59986; GFX11-NEXT: .LBB43_3:9987; GFX11-NEXT: ; implicit-def: $sgpr149988; GFX11-NEXT: ; implicit-def: $sgpr129989; GFX11-NEXT: ; implicit-def: $sgpr49990; GFX11-NEXT: ; implicit-def: $sgpr139991; GFX11-NEXT: ; implicit-def: $sgpr119992; GFX11-NEXT: ; implicit-def: $sgpr109993; GFX11-NEXT: ; implicit-def: $sgpr99994; GFX11-NEXT: ; implicit-def: $sgpr89995; GFX11-NEXT: ; implicit-def: $sgpr69996; GFX11-NEXT: s_branch .LBB43_29997; GFX11-NEXT: .LBB43_4:9998; GFX11-NEXT: v_dual_mov_b32 v14, s0 :: v_dual_mov_b32 v15, s19999; GFX11-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v1, s1410000; GFX11-NEXT: v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v5, s1310001; GFX11-NEXT: v_dual_mov_b32 v6, s11 :: v_dual_mov_b32 v7, s1010002; GFX11-NEXT: v_dual_mov_b32 v13, s9 :: v_dual_mov_b32 v10, s810003; GFX11-NEXT: v_mov_b32_e32 v11, s610004; GFX11-NEXT: v_mov_b32_e32 v3, s410005; GFX11-NEXT: .LBB43_5: ; %end10006; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)10007; GFX11-NEXT: v_dual_mov_b32 v0, v14 :: v_dual_mov_b32 v9, v1310008; GFX11-NEXT: v_mov_b32_e32 v4, v1510009; GFX11-NEXT: s_setpc_b64 s[30:31]10010 %cmp = icmp eq i32 %b, 010011 br i1 %cmp, label %cmp.true, label %cmp.false10012 10013cmp.true:10014 %a1 = fadd <6 x half> %a, splat (half 0xH0200)10015 %a2 = bitcast <6 x half> %a1 to <12 x i8>10016 br label %end10017 10018cmp.false:10019 %a3 = bitcast <6 x half> %a to <12 x i8>10020 br label %end10021 10022end:10023 %phi = phi <12 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]10024 ret <12 x i8> %phi10025}10026 10027define <6 x i16> @bitcast_v12i8_to_v6i16(<12 x i8> %a, i32 %b) {10028; SI-LABEL: bitcast_v12i8_to_v6i16:10029; SI: ; %bb.0:10030; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10031; SI-NEXT: v_mov_b32_e32 v14, v410032; SI-NEXT: v_mov_b32_e32 v15, v210033; SI-NEXT: v_mov_b32_e32 v13, v010034; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1210035; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v510036; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v710037; SI-NEXT: v_lshlrev_b32_e32 v17, 24, v310038; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v110039; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v910040; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v1110041; SI-NEXT: ; implicit-def: $vgpr010042; SI-NEXT: ; implicit-def: $vgpr110043; SI-NEXT: ; implicit-def: $vgpr210044; SI-NEXT: ; implicit-def: $vgpr310045; SI-NEXT: ; implicit-def: $vgpr410046; SI-NEXT: ; implicit-def: $vgpr510047; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc10048; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]10049; SI-NEXT: s_cbranch_execnz .LBB44_310050; SI-NEXT: ; %bb.1: ; %Flow10051; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10052; SI-NEXT: s_cbranch_execnz .LBB44_410053; SI-NEXT: .LBB44_2: ; %end10054; SI-NEXT: s_or_b64 exec, exec, s[4:5]10055; SI-NEXT: s_setpc_b64 s[30:31]10056; SI-NEXT: .LBB44_3: ; %cmp.false10057; SI-NEXT: v_and_b32_e32 v0, 0xff, v1410058; SI-NEXT: v_and_b32_e32 v1, 0xff, v610059; SI-NEXT: v_or_b32_e32 v0, v0, v1610060; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v110061; SI-NEXT: v_and_b32_e32 v0, 0xffff, v010062; SI-NEXT: v_or_b32_e32 v3, v12, v110063; SI-NEXT: v_or_b32_e32 v2, v0, v310064; SI-NEXT: v_and_b32_e32 v0, 0xff, v1510065; SI-NEXT: v_and_b32_e32 v4, 0xff, v1310066; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v010067; SI-NEXT: v_or_b32_e32 v4, v4, v1810068; SI-NEXT: v_or_b32_e32 v0, v17, v010069; SI-NEXT: v_and_b32_e32 v4, 0xffff, v410070; SI-NEXT: v_alignbit_b32 v1, v2, v0, 1610071; SI-NEXT: v_or_b32_e32 v0, v4, v010072; SI-NEXT: v_and_b32_e32 v4, 0xff, v810073; SI-NEXT: v_and_b32_e32 v5, 0xff, v1010074; SI-NEXT: v_or_b32_e32 v4, v4, v910075; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v510076; SI-NEXT: v_and_b32_e32 v4, 0xffff, v410077; SI-NEXT: v_or_b32_e32 v5, v7, v510078; SI-NEXT: v_or_b32_e32 v4, v4, v510079; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v310080; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v510081; SI-NEXT: ; implicit-def: $vgpr1310082; SI-NEXT: ; implicit-def: $vgpr1510083; SI-NEXT: ; implicit-def: $vgpr1410084; SI-NEXT: ; implicit-def: $vgpr610085; SI-NEXT: ; implicit-def: $vgpr810086; SI-NEXT: ; implicit-def: $vgpr1010087; SI-NEXT: ; implicit-def: $vgpr1610088; SI-NEXT: ; implicit-def: $vgpr1210089; SI-NEXT: ; implicit-def: $vgpr1710090; SI-NEXT: ; implicit-def: $vgpr1810091; SI-NEXT: ; implicit-def: $vgpr910092; SI-NEXT: ; implicit-def: $vgpr710093; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10094; SI-NEXT: s_cbranch_execz .LBB44_210095; SI-NEXT: .LBB44_4: ; %cmp.true10096; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1310097; SI-NEXT: v_and_b32_e32 v0, 0xff, v010098; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1510099; SI-NEXT: v_or_b32_e32 v0, v18, v010100; SI-NEXT: v_and_b32_e32 v1, 0xff, v110101; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v010102; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v110103; SI-NEXT: v_and_b32_e32 v0, 0xffff, v010104; SI-NEXT: v_or_b32_e32 v1, v17, v110105; SI-NEXT: v_or_b32_e32 v0, v1, v010106; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1410107; SI-NEXT: v_and_b32_e32 v1, 0xff, v110108; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v610109; SI-NEXT: s_movk_i32 s6, 0x30010110; SI-NEXT: v_or_b32_e32 v1, v16, v110111; SI-NEXT: v_and_b32_e32 v2, 0xff, v210112; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v110113; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v210114; SI-NEXT: v_and_b32_e32 v1, 0xffff, v110115; SI-NEXT: v_or_b32_e32 v2, v12, v210116; SI-NEXT: v_or_b32_e32 v1, v2, v110117; SI-NEXT: v_add_i32_e32 v2, vcc, 0x3000000, v110118; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v810119; SI-NEXT: v_and_b32_e32 v1, 0xff, v110120; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v1010121; SI-NEXT: v_or_b32_e32 v1, v9, v110122; SI-NEXT: v_and_b32_e32 v3, 0xff, v310123; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v110124; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v310125; SI-NEXT: v_and_b32_e32 v1, 0xffff, v110126; SI-NEXT: v_or_b32_e32 v3, v7, v310127; SI-NEXT: s_mov_b32 s7, 0x300000010128; SI-NEXT: v_or_b32_e32 v1, v3, v110129; SI-NEXT: v_add_i32_e32 v0, vcc, s7, v010130; SI-NEXT: v_add_i32_e32 v4, vcc, 0x3000000, v110131; SI-NEXT: v_alignbit_b32 v1, v2, v0, 1610132; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v210133; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v410134; SI-NEXT: s_or_b64 exec, exec, s[4:5]10135; SI-NEXT: s_setpc_b64 s[30:31]10136;10137; VI-LABEL: bitcast_v12i8_to_v6i16:10138; VI: ; %bb.0:10139; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10140; VI-NEXT: v_mov_b32_e32 v14, v210141; VI-NEXT: v_mov_b32_e32 v13, v010142; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1210143; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v110144; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v310145; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v510146; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v710147; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v910148; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v1110149; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr310150; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc10151; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]10152; VI-NEXT: s_cbranch_execnz .LBB44_310153; VI-NEXT: ; %bb.1: ; %Flow10154; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10155; VI-NEXT: s_cbranch_execnz .LBB44_410156; VI-NEXT: .LBB44_2: ; %end10157; VI-NEXT: s_or_b64 exec, exec, s[4:5]10158; VI-NEXT: s_setpc_b64 s[30:31]10159; VI-NEXT: .LBB44_3: ; %cmp.false10160; VI-NEXT: v_or_b32_sdwa v0, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD10161; VI-NEXT: v_or_b32_sdwa v1, v14, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD10162; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD10163; VI-NEXT: v_or_b32_sdwa v1, v4, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD10164; VI-NEXT: v_or_b32_sdwa v2, v6, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD10165; VI-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD10166; VI-NEXT: v_or_b32_sdwa v2, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD10167; VI-NEXT: v_or_b32_sdwa v3, v10, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD10168; VI-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD10169; VI-NEXT: ; implicit-def: $vgpr1310170; VI-NEXT: ; implicit-def: $vgpr1410171; VI-NEXT: ; implicit-def: $vgpr410172; VI-NEXT: ; implicit-def: $vgpr610173; VI-NEXT: ; implicit-def: $vgpr810174; VI-NEXT: ; implicit-def: $vgpr1010175; VI-NEXT: ; implicit-def: $vgpr1710176; VI-NEXT: ; implicit-def: $vgpr1610177; VI-NEXT: ; implicit-def: $vgpr1510178; VI-NEXT: ; implicit-def: $vgpr1210179; VI-NEXT: ; implicit-def: $vgpr710180; VI-NEXT: ; implicit-def: $vgpr510181; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10182; VI-NEXT: s_cbranch_execz .LBB44_210183; VI-NEXT: .LBB44_4: ; %cmp.true10184; VI-NEXT: v_add_u16_e32 v0, 3, v1310185; VI-NEXT: v_add_u16_e32 v1, 3, v1410186; VI-NEXT: v_or_b32_sdwa v0, v17, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_010187; VI-NEXT: v_or_b32_sdwa v1, v16, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_010188; VI-NEXT: v_mov_b32_e32 v2, 0x30010189; VI-NEXT: v_add_u16_e32 v0, 0x300, v010190; VI-NEXT: v_add_u16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD10191; VI-NEXT: v_or_b32_e32 v0, v0, v110192; VI-NEXT: v_add_u16_e32 v1, 3, v410193; VI-NEXT: v_add_u16_e32 v3, 3, v610194; VI-NEXT: v_or_b32_sdwa v1, v15, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_010195; VI-NEXT: v_or_b32_sdwa v3, v12, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_010196; VI-NEXT: v_add_u16_e32 v1, 0x300, v110197; VI-NEXT: v_add_u16_sdwa v3, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD10198; VI-NEXT: v_or_b32_e32 v1, v1, v310199; VI-NEXT: v_add_u16_e32 v3, 3, v810200; VI-NEXT: v_add_u16_e32 v4, 3, v1010201; VI-NEXT: v_or_b32_sdwa v3, v7, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_010202; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_010203; VI-NEXT: v_add_u16_e32 v3, 0x300, v310204; VI-NEXT: v_add_u16_sdwa v2, v4, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD10205; VI-NEXT: v_or_b32_e32 v2, v3, v210206; VI-NEXT: s_or_b64 exec, exec, s[4:5]10207; VI-NEXT: s_setpc_b64 s[30:31]10208;10209; GFX9-LABEL: bitcast_v12i8_to_v6i16:10210; GFX9: ; %bb.0:10211; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10212; GFX9-NEXT: v_mov_b32_e32 v14, v210213; GFX9-NEXT: v_mov_b32_e32 v13, v010214; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1210215; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v110216; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v310217; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v510218; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v710219; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v910220; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v1110221; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr310222; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc10223; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]10224; GFX9-NEXT: s_cbranch_execnz .LBB44_310225; GFX9-NEXT: ; %bb.1: ; %Flow10226; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10227; GFX9-NEXT: s_cbranch_execnz .LBB44_410228; GFX9-NEXT: .LBB44_2: ; %end10229; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]10230; GFX9-NEXT: s_setpc_b64 s[30:31]10231; GFX9-NEXT: .LBB44_3: ; %cmp.false10232; GFX9-NEXT: v_or_b32_sdwa v0, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD10233; GFX9-NEXT: v_or_b32_sdwa v1, v14, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD10234; GFX9-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD10235; GFX9-NEXT: v_or_b32_sdwa v1, v4, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD10236; GFX9-NEXT: v_or_b32_sdwa v2, v6, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD10237; GFX9-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD10238; GFX9-NEXT: v_or_b32_sdwa v2, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD10239; GFX9-NEXT: v_or_b32_sdwa v3, v10, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD10240; GFX9-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD10241; GFX9-NEXT: ; implicit-def: $vgpr1310242; GFX9-NEXT: ; implicit-def: $vgpr1410243; GFX9-NEXT: ; implicit-def: $vgpr410244; GFX9-NEXT: ; implicit-def: $vgpr610245; GFX9-NEXT: ; implicit-def: $vgpr810246; GFX9-NEXT: ; implicit-def: $vgpr1010247; GFX9-NEXT: ; implicit-def: $vgpr1710248; GFX9-NEXT: ; implicit-def: $vgpr1610249; GFX9-NEXT: ; implicit-def: $vgpr1510250; GFX9-NEXT: ; implicit-def: $vgpr1210251; GFX9-NEXT: ; implicit-def: $vgpr710252; GFX9-NEXT: ; implicit-def: $vgpr510253; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10254; GFX9-NEXT: s_cbranch_execz .LBB44_210255; GFX9-NEXT: .LBB44_4: ; %cmp.true10256; GFX9-NEXT: v_add_u16_e32 v0, 3, v1310257; GFX9-NEXT: v_add_u16_e32 v1, 3, v1410258; GFX9-NEXT: v_or_b32_sdwa v0, v17, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_010259; GFX9-NEXT: s_movk_i32 s6, 0x30010260; GFX9-NEXT: v_or_b32_sdwa v1, v16, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_010261; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v010262; GFX9-NEXT: v_add_u16_sdwa v1, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD10263; GFX9-NEXT: v_or_b32_e32 v0, v0, v110264; GFX9-NEXT: v_add_u16_e32 v1, 3, v410265; GFX9-NEXT: v_add_u16_e32 v2, 3, v610266; GFX9-NEXT: v_or_b32_sdwa v1, v15, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_010267; GFX9-NEXT: v_or_b32_sdwa v2, v12, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_010268; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v110269; GFX9-NEXT: v_add_u16_sdwa v2, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD10270; GFX9-NEXT: v_or_b32_e32 v1, v1, v210271; GFX9-NEXT: v_add_u16_e32 v2, 3, v810272; GFX9-NEXT: v_add_u16_e32 v3, 3, v1010273; GFX9-NEXT: v_or_b32_sdwa v2, v7, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_010274; GFX9-NEXT: v_or_b32_sdwa v3, v5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_010275; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v210276; GFX9-NEXT: v_add_u16_sdwa v3, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD10277; GFX9-NEXT: v_or_b32_e32 v2, v2, v310278; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]10279; GFX9-NEXT: s_setpc_b64 s[30:31]10280;10281; GFX11-TRUE16-LABEL: bitcast_v12i8_to_v6i16:10282; GFX11-TRUE16: ; %bb.0:10283; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10284; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v9.l10285; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v7.l10286; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.l10287; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v4.l10288; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v2.l10289; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v0.l10290; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v1.l10291; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v3.l10292; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v5.l10293; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v10.h10294; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v9.h10295; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l10296; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo10297; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr310298; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v1210299; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s010300; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB44_310301; GFX11-TRUE16-NEXT: ; %bb.1: ; %Flow10302; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s010303; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB44_410304; GFX11-TRUE16-NEXT: .LBB44_2: ; %end10305; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s010306; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]10307; GFX11-TRUE16-NEXT: .LBB44_3: ; %cmp.false10308; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v9.l10309; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v8.h10310; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.h10311; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.l10312; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l10313; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l10314; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v6.h10315; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v5.h10316; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v6.l10317; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l10318; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h10319; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l10320; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo1610321; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi1610322; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi1610323; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo1610324; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo1610325; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo1610326; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi1610327; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi1610328; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo1610329; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo1610330; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi1610331; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo1610332; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s010333; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB44_210334; GFX11-TRUE16-NEXT: .LBB44_4: ; %cmp.true10335; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v9.l, 310336; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v8.h, 310337; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.h, 310338; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v7.l, 310339; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 310340; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 310341; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l10342; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h10343; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l10344; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h10345; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l10346; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h10347; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.h, v0.l10348; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v5.h, v0.h10349; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v6.l, v1.l10350; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h10351; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l10352; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h10353; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l10354; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h10355; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l10356; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h10357; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l10358; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h10359; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s010360; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]10361;10362; GFX11-FAKE16-LABEL: bitcast_v12i8_to_v6i16:10363; GFX11-FAKE16: ; %bb.0:10364; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10365; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, v2 :: v_dual_mov_b32 v13, v010366; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v1210367; GFX11-FAKE16-NEXT: v_lshlrev_b16 v17, 8, v110368; GFX11-FAKE16-NEXT: v_lshlrev_b16 v15, 8, v310369; GFX11-FAKE16-NEXT: v_lshlrev_b16 v16, 8, v510370; GFX11-FAKE16-NEXT: v_lshlrev_b16 v12, 8, v710371; GFX11-FAKE16-NEXT: v_lshlrev_b16 v5, 8, v910372; GFX11-FAKE16-NEXT: v_lshlrev_b16 v7, 8, v1110373; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr310374; GFX11-FAKE16-NEXT: s_and_saveexec_b32 s0, vcc_lo10375; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)10376; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s010377; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB44_310378; GFX11-FAKE16-NEXT: ; %bb.1: ; %Flow10379; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s010380; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB44_410381; GFX11-FAKE16-NEXT: .LBB44_2: ; %end10382; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s010383; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]10384; GFX11-FAKE16-NEXT: .LBB44_3: ; %cmp.false10385; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xff, v1310386; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xff, v1410387; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xff, v410388; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xff, v610389; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xff, v810390; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xff, v1010391; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1710392; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v1510393; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v1610394; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v3, v1210395; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v510396; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v6, v710397; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v010398; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v110399; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v210400; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v310401; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v410402; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v510403; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v110404; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr1310405; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr1410406; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr610407; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr810408; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr1010409; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr1710410; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr1510411; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr1610412; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr1210413; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr710414; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)10415; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v310416; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v510417; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr410418; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr510419; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s010420; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB44_210421; GFX11-FAKE16-NEXT: .LBB44_4: ; %cmp.true10422; GFX11-FAKE16-NEXT: v_add_nc_u16 v0, v13, 310423; GFX11-FAKE16-NEXT: v_add_nc_u16 v1, v14, 310424; GFX11-FAKE16-NEXT: v_add_nc_u16 v2, v4, 310425; GFX11-FAKE16-NEXT: v_add_nc_u16 v3, v6, 310426; GFX11-FAKE16-NEXT: v_add_nc_u16 v4, v8, 310427; GFX11-FAKE16-NEXT: v_add_nc_u16 v6, v10, 310428; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xff, v010429; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xff, v110430; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xff, v210431; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xff, v310432; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xff, v410433; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xff, v610434; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v17, v010435; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v15, v110436; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v16, v210437; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v12, v310438; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v410439; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v7, v610440; GFX11-FAKE16-NEXT: v_add_nc_u16 v0, 0x300, v010441; GFX11-FAKE16-NEXT: v_add_nc_u16 v1, 0x300, v110442; GFX11-FAKE16-NEXT: v_add_nc_u16 v2, 0x300, v210443; GFX11-FAKE16-NEXT: v_add_nc_u16 v3, 0x300, v310444; GFX11-FAKE16-NEXT: v_add_nc_u16 v4, 0x300, v410445; GFX11-FAKE16-NEXT: v_add_nc_u16 v5, 0x300, v510446; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v010447; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v110448; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v210449; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v310450; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v410451; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v510452; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v110453; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)10454; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v310455; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v510456; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s010457; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]10458 %cmp = icmp eq i32 %b, 010459 br i1 %cmp, label %cmp.true, label %cmp.false10460 10461cmp.true:10462 %a1 = add <12 x i8> %a, splat (i8 3)10463 %a2 = bitcast <12 x i8> %a1 to <6 x i16>10464 br label %end10465 10466cmp.false:10467 %a3 = bitcast <12 x i8> %a to <6 x i16>10468 br label %end10469 10470end:10471 %phi = phi <6 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]10472 ret <6 x i16> %phi10473}10474 10475define inreg <6 x i16> @bitcast_v12i8_to_v6i16_scalar(<12 x i8> inreg %a, i32 inreg %b) {10476; SI-LABEL: bitcast_v12i8_to_v6i16_scalar:10477; SI: ; %bb.0:10478; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10479; SI-NEXT: s_cmp_lg_u32 s28, 010480; SI-NEXT: s_cbranch_scc0 .LBB45_410481; SI-NEXT: ; %bb.1: ; %cmp.false10482; SI-NEXT: s_and_b32 s4, s16, 0xff10483; SI-NEXT: s_lshl_b32 s5, s17, 810484; SI-NEXT: s_or_b32 s4, s4, s510485; SI-NEXT: s_and_b32 s5, s18, 0xff10486; SI-NEXT: s_lshl_b32 s5, s5, 1610487; SI-NEXT: s_lshl_b32 s6, s19, 2410488; SI-NEXT: s_or_b32 s12, s6, s510489; SI-NEXT: s_and_b32 s5, s24, 0xff10490; SI-NEXT: s_lshl_b32 s6, s25, 810491; SI-NEXT: s_or_b32 s5, s5, s610492; SI-NEXT: s_and_b32 s6, s26, 0xff10493; SI-NEXT: s_lshl_b32 s6, s6, 1610494; SI-NEXT: s_lshl_b32 s7, s27, 2410495; SI-NEXT: s_and_b32 s5, s5, 0xffff10496; SI-NEXT: s_or_b32 s8, s7, s610497; SI-NEXT: s_or_b32 s10, s5, s810498; SI-NEXT: s_and_b32 s5, s20, 0xff10499; SI-NEXT: s_lshl_b32 s6, s21, 810500; SI-NEXT: s_or_b32 s5, s5, s610501; SI-NEXT: s_and_b32 s6, s22, 0xff10502; SI-NEXT: s_lshl_b32 s6, s6, 1610503; SI-NEXT: s_lshl_b32 s7, s23, 2410504; SI-NEXT: s_and_b32 s5, s5, 0xffff10505; SI-NEXT: s_or_b32 s9, s7, s610506; SI-NEXT: s_or_b32 s13, s5, s910507; SI-NEXT: s_and_b32 s4, s4, 0xffff10508; SI-NEXT: s_lshr_b64 s[6:7], s[12:13], 1610509; SI-NEXT: s_or_b32 s4, s4, s1210510; SI-NEXT: s_lshr_b32 s7, s9, 1610511; SI-NEXT: s_lshr_b32 s11, s8, 1610512; SI-NEXT: s_mov_b32 s5, s1310513; SI-NEXT: s_cbranch_execnz .LBB45_310514; SI-NEXT: .LBB45_2: ; %cmp.true10515; SI-NEXT: s_add_i32 s16, s16, 310516; SI-NEXT: s_and_b32 s4, s16, 0xff10517; SI-NEXT: s_lshl_b32 s5, s17, 810518; SI-NEXT: s_add_i32 s18, s18, 310519; SI-NEXT: s_or_b32 s4, s5, s410520; SI-NEXT: s_and_b32 s6, s18, 0xff10521; SI-NEXT: s_addk_i32 s4, 0x30010522; SI-NEXT: s_lshl_b32 s5, s19, 2410523; SI-NEXT: s_lshl_b32 s6, s6, 1610524; SI-NEXT: s_and_b32 s4, s4, 0xffff10525; SI-NEXT: s_or_b32 s5, s5, s610526; SI-NEXT: s_add_i32 s20, s20, 310527; SI-NEXT: s_or_b32 s4, s5, s410528; SI-NEXT: s_and_b32 s5, s20, 0xff10529; SI-NEXT: s_lshl_b32 s6, s21, 810530; SI-NEXT: s_add_i32 s22, s22, 310531; SI-NEXT: s_or_b32 s5, s6, s510532; SI-NEXT: s_and_b32 s7, s22, 0xff10533; SI-NEXT: s_addk_i32 s5, 0x30010534; SI-NEXT: s_lshl_b32 s6, s23, 2410535; SI-NEXT: s_lshl_b32 s7, s7, 1610536; SI-NEXT: s_and_b32 s5, s5, 0xffff10537; SI-NEXT: s_or_b32 s6, s6, s710538; SI-NEXT: s_add_i32 s24, s24, 310539; SI-NEXT: s_or_b32 s5, s6, s510540; SI-NEXT: s_and_b32 s6, s24, 0xff10541; SI-NEXT: s_lshl_b32 s7, s25, 810542; SI-NEXT: s_add_i32 s26, s26, 310543; SI-NEXT: s_or_b32 s6, s7, s610544; SI-NEXT: s_and_b32 s8, s26, 0xff10545; SI-NEXT: s_addk_i32 s6, 0x30010546; SI-NEXT: s_lshl_b32 s7, s27, 2410547; SI-NEXT: s_lshl_b32 s8, s8, 1610548; SI-NEXT: s_and_b32 s6, s6, 0xffff10549; SI-NEXT: s_or_b32 s7, s7, s810550; SI-NEXT: s_add_i32 s4, s4, 0x300000010551; SI-NEXT: s_add_i32 s5, s5, 0x300000010552; SI-NEXT: s_or_b32 s6, s7, s610553; SI-NEXT: s_add_i32 s10, s6, 0x300000010554; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 1610555; SI-NEXT: s_lshr_b32 s7, s5, 1610556; SI-NEXT: s_lshr_b32 s11, s10, 1610557; SI-NEXT: .LBB45_3: ; %end10558; SI-NEXT: v_mov_b32_e32 v0, s410559; SI-NEXT: v_mov_b32_e32 v1, s610560; SI-NEXT: v_mov_b32_e32 v2, s510561; SI-NEXT: v_mov_b32_e32 v3, s710562; SI-NEXT: v_mov_b32_e32 v4, s1010563; SI-NEXT: v_mov_b32_e32 v5, s1110564; SI-NEXT: s_setpc_b64 s[30:31]10565; SI-NEXT: .LBB45_4:10566; SI-NEXT: ; implicit-def: $sgpr410567; SI-NEXT: ; implicit-def: $sgpr610568; SI-NEXT: ; implicit-def: $sgpr710569; SI-NEXT: ; implicit-def: $sgpr1010570; SI-NEXT: ; implicit-def: $sgpr1110571; SI-NEXT: s_branch .LBB45_210572;10573; VI-LABEL: bitcast_v12i8_to_v6i16_scalar:10574; VI: ; %bb.0:10575; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10576; VI-NEXT: s_cmp_lg_u32 s28, 010577; VI-NEXT: s_cbranch_scc0 .LBB45_410578; VI-NEXT: ; %bb.1: ; %cmp.false10579; VI-NEXT: s_and_b32 s4, s16, 0xff10580; VI-NEXT: s_lshl_b32 s5, s17, 810581; VI-NEXT: s_or_b32 s4, s4, s510582; VI-NEXT: s_and_b32 s5, s18, 0xff10583; VI-NEXT: s_lshl_b32 s6, s19, 810584; VI-NEXT: s_or_b32 s5, s5, s610585; VI-NEXT: s_and_b32 s4, s4, 0xffff10586; VI-NEXT: s_lshl_b32 s5, s5, 1610587; VI-NEXT: s_or_b32 s4, s4, s510588; VI-NEXT: s_and_b32 s5, s20, 0xff10589; VI-NEXT: s_lshl_b32 s6, s21, 810590; VI-NEXT: s_or_b32 s5, s5, s610591; VI-NEXT: s_and_b32 s6, s22, 0xff10592; VI-NEXT: s_lshl_b32 s7, s23, 810593; VI-NEXT: s_or_b32 s6, s6, s710594; VI-NEXT: s_and_b32 s5, s5, 0xffff10595; VI-NEXT: s_lshl_b32 s6, s6, 1610596; VI-NEXT: s_or_b32 s5, s5, s610597; VI-NEXT: s_and_b32 s6, s24, 0xff10598; VI-NEXT: s_lshl_b32 s7, s25, 810599; VI-NEXT: s_or_b32 s6, s6, s710600; VI-NEXT: s_and_b32 s7, s26, 0xff10601; VI-NEXT: s_lshl_b32 s8, s27, 810602; VI-NEXT: s_or_b32 s7, s7, s810603; VI-NEXT: s_and_b32 s6, s6, 0xffff10604; VI-NEXT: s_lshl_b32 s7, s7, 1610605; VI-NEXT: s_or_b32 s6, s6, s710606; VI-NEXT: s_cbranch_execnz .LBB45_310607; VI-NEXT: .LBB45_2: ; %cmp.true10608; VI-NEXT: s_add_i32 s16, s16, 310609; VI-NEXT: s_and_b32 s4, s16, 0xff10610; VI-NEXT: s_lshl_b32 s5, s17, 810611; VI-NEXT: s_add_i32 s18, s18, 310612; VI-NEXT: s_or_b32 s4, s5, s410613; VI-NEXT: s_and_b32 s5, s18, 0xff10614; VI-NEXT: s_lshl_b32 s6, s19, 810615; VI-NEXT: s_addk_i32 s4, 0x30010616; VI-NEXT: s_or_b32 s5, s6, s510617; VI-NEXT: s_and_b32 s4, s4, 0xffff10618; VI-NEXT: s_lshl_b32 s5, s5, 1610619; VI-NEXT: s_add_i32 s20, s20, 310620; VI-NEXT: s_or_b32 s4, s5, s410621; VI-NEXT: s_and_b32 s5, s20, 0xff10622; VI-NEXT: s_lshl_b32 s6, s21, 810623; VI-NEXT: s_add_i32 s22, s22, 310624; VI-NEXT: s_or_b32 s5, s6, s510625; VI-NEXT: s_and_b32 s6, s22, 0xff10626; VI-NEXT: s_lshl_b32 s7, s23, 810627; VI-NEXT: s_addk_i32 s5, 0x30010628; VI-NEXT: s_or_b32 s6, s7, s610629; VI-NEXT: s_and_b32 s5, s5, 0xffff10630; VI-NEXT: s_lshl_b32 s6, s6, 1610631; VI-NEXT: s_add_i32 s24, s24, 310632; VI-NEXT: s_or_b32 s5, s6, s510633; VI-NEXT: s_and_b32 s6, s24, 0xff10634; VI-NEXT: s_lshl_b32 s7, s25, 810635; VI-NEXT: s_add_i32 s26, s26, 310636; VI-NEXT: s_or_b32 s6, s7, s610637; VI-NEXT: s_and_b32 s7, s26, 0xff10638; VI-NEXT: s_lshl_b32 s8, s27, 810639; VI-NEXT: s_addk_i32 s6, 0x30010640; VI-NEXT: s_or_b32 s7, s8, s710641; VI-NEXT: s_and_b32 s6, s6, 0xffff10642; VI-NEXT: s_lshl_b32 s7, s7, 1610643; VI-NEXT: s_or_b32 s6, s7, s610644; VI-NEXT: s_add_i32 s4, s4, 0x300000010645; VI-NEXT: s_add_i32 s5, s5, 0x300000010646; VI-NEXT: s_add_i32 s6, s6, 0x300000010647; VI-NEXT: .LBB45_3: ; %end10648; VI-NEXT: v_mov_b32_e32 v0, s410649; VI-NEXT: v_mov_b32_e32 v1, s510650; VI-NEXT: v_mov_b32_e32 v2, s610651; VI-NEXT: s_setpc_b64 s[30:31]10652; VI-NEXT: .LBB45_4:10653; VI-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr6_sgpr710654; VI-NEXT: s_branch .LBB45_210655;10656; GFX9-LABEL: bitcast_v12i8_to_v6i16_scalar:10657; GFX9: ; %bb.0:10658; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10659; GFX9-NEXT: s_cmp_lg_u32 s28, 010660; GFX9-NEXT: s_cbranch_scc0 .LBB45_410661; GFX9-NEXT: ; %bb.1: ; %cmp.false10662; GFX9-NEXT: s_and_b32 s4, s16, 0xff10663; GFX9-NEXT: s_lshl_b32 s5, s17, 810664; GFX9-NEXT: s_or_b32 s4, s4, s510665; GFX9-NEXT: s_and_b32 s5, s18, 0xff10666; GFX9-NEXT: s_lshl_b32 s6, s19, 810667; GFX9-NEXT: s_or_b32 s5, s5, s610668; GFX9-NEXT: s_and_b32 s4, s4, 0xffff10669; GFX9-NEXT: s_lshl_b32 s5, s5, 1610670; GFX9-NEXT: s_or_b32 s4, s4, s510671; GFX9-NEXT: s_and_b32 s5, s20, 0xff10672; GFX9-NEXT: s_lshl_b32 s6, s21, 810673; GFX9-NEXT: s_or_b32 s5, s5, s610674; GFX9-NEXT: s_and_b32 s6, s22, 0xff10675; GFX9-NEXT: s_lshl_b32 s7, s23, 810676; GFX9-NEXT: s_or_b32 s6, s6, s710677; GFX9-NEXT: s_and_b32 s5, s5, 0xffff10678; GFX9-NEXT: s_lshl_b32 s6, s6, 1610679; GFX9-NEXT: s_or_b32 s5, s5, s610680; GFX9-NEXT: s_and_b32 s6, s24, 0xff10681; GFX9-NEXT: s_lshl_b32 s7, s25, 810682; GFX9-NEXT: s_or_b32 s6, s6, s710683; GFX9-NEXT: s_and_b32 s7, s26, 0xff10684; GFX9-NEXT: s_lshl_b32 s8, s27, 810685; GFX9-NEXT: s_or_b32 s7, s7, s810686; GFX9-NEXT: s_and_b32 s6, s6, 0xffff10687; GFX9-NEXT: s_lshl_b32 s7, s7, 1610688; GFX9-NEXT: s_or_b32 s6, s6, s710689; GFX9-NEXT: s_cbranch_execnz .LBB45_310690; GFX9-NEXT: .LBB45_2: ; %cmp.true10691; GFX9-NEXT: s_add_i32 s16, s16, 310692; GFX9-NEXT: s_and_b32 s4, s16, 0xff10693; GFX9-NEXT: s_lshl_b32 s5, s17, 810694; GFX9-NEXT: s_add_i32 s18, s18, 310695; GFX9-NEXT: s_or_b32 s4, s5, s410696; GFX9-NEXT: s_and_b32 s5, s18, 0xff10697; GFX9-NEXT: s_lshl_b32 s6, s19, 810698; GFX9-NEXT: s_or_b32 s5, s6, s510699; GFX9-NEXT: s_addk_i32 s4, 0x30010700; GFX9-NEXT: s_addk_i32 s5, 0x30010701; GFX9-NEXT: s_and_b32 s4, s4, 0xffff10702; GFX9-NEXT: s_lshl_b32 s5, s5, 1610703; GFX9-NEXT: s_add_i32 s20, s20, 310704; GFX9-NEXT: s_or_b32 s4, s4, s510705; GFX9-NEXT: s_and_b32 s5, s20, 0xff10706; GFX9-NEXT: s_lshl_b32 s6, s21, 810707; GFX9-NEXT: s_add_i32 s22, s22, 310708; GFX9-NEXT: s_or_b32 s5, s6, s510709; GFX9-NEXT: s_and_b32 s6, s22, 0xff10710; GFX9-NEXT: s_lshl_b32 s7, s23, 810711; GFX9-NEXT: s_or_b32 s6, s7, s610712; GFX9-NEXT: s_addk_i32 s5, 0x30010713; GFX9-NEXT: s_addk_i32 s6, 0x30010714; GFX9-NEXT: s_and_b32 s5, s5, 0xffff10715; GFX9-NEXT: s_lshl_b32 s6, s6, 1610716; GFX9-NEXT: s_add_i32 s24, s24, 310717; GFX9-NEXT: s_or_b32 s5, s5, s610718; GFX9-NEXT: s_and_b32 s6, s24, 0xff10719; GFX9-NEXT: s_lshl_b32 s7, s25, 810720; GFX9-NEXT: s_add_i32 s26, s26, 310721; GFX9-NEXT: s_or_b32 s6, s7, s610722; GFX9-NEXT: s_and_b32 s7, s26, 0xff10723; GFX9-NEXT: s_lshl_b32 s8, s27, 810724; GFX9-NEXT: s_or_b32 s7, s8, s710725; GFX9-NEXT: s_addk_i32 s6, 0x30010726; GFX9-NEXT: s_addk_i32 s7, 0x30010727; GFX9-NEXT: s_and_b32 s6, s6, 0xffff10728; GFX9-NEXT: s_lshl_b32 s7, s7, 1610729; GFX9-NEXT: s_or_b32 s6, s6, s710730; GFX9-NEXT: .LBB45_3: ; %end10731; GFX9-NEXT: v_mov_b32_e32 v0, s410732; GFX9-NEXT: v_mov_b32_e32 v1, s510733; GFX9-NEXT: v_mov_b32_e32 v2, s610734; GFX9-NEXT: s_setpc_b64 s[30:31]10735; GFX9-NEXT: .LBB45_4:10736; GFX9-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr6_sgpr710737; GFX9-NEXT: s_branch .LBB45_210738;10739; GFX11-LABEL: bitcast_v12i8_to_v6i16_scalar:10740; GFX11: ; %bb.0:10741; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10742; GFX11-NEXT: s_cmp_lg_u32 s24, 010743; GFX11-NEXT: s_mov_b32 s8, 010744; GFX11-NEXT: s_cbranch_scc0 .LBB45_410745; GFX11-NEXT: ; %bb.1: ; %cmp.false10746; GFX11-NEXT: s_and_b32 s4, s0, 0xff10747; GFX11-NEXT: s_lshl_b32 s5, s1, 810748; GFX11-NEXT: s_and_b32 s6, s2, 0xff10749; GFX11-NEXT: s_lshl_b32 s7, s3, 810750; GFX11-NEXT: s_or_b32 s4, s4, s510751; GFX11-NEXT: s_or_b32 s5, s6, s710752; GFX11-NEXT: s_and_b32 s4, s4, 0xffff10753; GFX11-NEXT: s_lshl_b32 s5, s5, 1610754; GFX11-NEXT: s_lshl_b32 s6, s17, 810755; GFX11-NEXT: s_or_b32 s4, s4, s510756; GFX11-NEXT: s_and_b32 s5, s16, 0xff10757; GFX11-NEXT: s_and_b32 s7, s18, 0xff10758; GFX11-NEXT: s_lshl_b32 s9, s19, 810759; GFX11-NEXT: s_or_b32 s5, s5, s610760; GFX11-NEXT: s_or_b32 s6, s7, s910761; GFX11-NEXT: s_and_b32 s7, s20, 0xff10762; GFX11-NEXT: s_lshl_b32 s9, s21, 810763; GFX11-NEXT: s_and_b32 s10, s22, 0xff10764; GFX11-NEXT: s_lshl_b32 s11, s23, 810765; GFX11-NEXT: s_or_b32 s7, s7, s910766; GFX11-NEXT: s_or_b32 s9, s10, s1110767; GFX11-NEXT: s_and_b32 s5, s5, 0xffff10768; GFX11-NEXT: s_lshl_b32 s6, s6, 1610769; GFX11-NEXT: s_and_b32 s7, s7, 0xffff10770; GFX11-NEXT: s_lshl_b32 s9, s9, 1610771; GFX11-NEXT: s_or_b32 s5, s5, s610772; GFX11-NEXT: s_or_b32 s6, s7, s910773; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s810774; GFX11-NEXT: s_cbranch_vccnz .LBB45_310775; GFX11-NEXT: .LBB45_2: ; %cmp.true10776; GFX11-NEXT: s_add_i32 s0, s0, 310777; GFX11-NEXT: s_add_i32 s2, s2, 310778; GFX11-NEXT: s_and_b32 s0, s0, 0xff10779; GFX11-NEXT: s_lshl_b32 s1, s1, 810780; GFX11-NEXT: s_and_b32 s2, s2, 0xff10781; GFX11-NEXT: s_lshl_b32 s3, s3, 810782; GFX11-NEXT: s_or_b32 s0, s1, s010783; GFX11-NEXT: s_or_b32 s1, s3, s210784; GFX11-NEXT: s_addk_i32 s0, 0x30010785; GFX11-NEXT: s_addk_i32 s1, 0x30010786; GFX11-NEXT: s_and_b32 s0, s0, 0xffff10787; GFX11-NEXT: s_lshl_b32 s1, s1, 1610788; GFX11-NEXT: s_add_i32 s16, s16, 310789; GFX11-NEXT: s_or_b32 s4, s0, s110790; GFX11-NEXT: s_and_b32 s0, s16, 0xff10791; GFX11-NEXT: s_lshl_b32 s1, s17, 810792; GFX11-NEXT: s_add_i32 s18, s18, 310793; GFX11-NEXT: s_or_b32 s0, s1, s010794; GFX11-NEXT: s_and_b32 s1, s18, 0xff10795; GFX11-NEXT: s_lshl_b32 s2, s19, 810796; GFX11-NEXT: s_add_i32 s20, s20, 310797; GFX11-NEXT: s_add_i32 s22, s22, 310798; GFX11-NEXT: s_or_b32 s1, s2, s110799; GFX11-NEXT: s_and_b32 s2, s20, 0xff10800; GFX11-NEXT: s_lshl_b32 s3, s21, 810801; GFX11-NEXT: s_and_b32 s5, s22, 0xff10802; GFX11-NEXT: s_lshl_b32 s6, s23, 810803; GFX11-NEXT: s_or_b32 s2, s3, s210804; GFX11-NEXT: s_or_b32 s3, s6, s510805; GFX11-NEXT: s_addk_i32 s0, 0x30010806; GFX11-NEXT: s_addk_i32 s1, 0x30010807; GFX11-NEXT: s_addk_i32 s2, 0x30010808; GFX11-NEXT: s_addk_i32 s3, 0x30010809; GFX11-NEXT: s_and_b32 s0, s0, 0xffff10810; GFX11-NEXT: s_lshl_b32 s1, s1, 1610811; GFX11-NEXT: s_and_b32 s2, s2, 0xffff10812; GFX11-NEXT: s_lshl_b32 s3, s3, 1610813; GFX11-NEXT: s_or_b32 s5, s0, s110814; GFX11-NEXT: s_or_b32 s6, s2, s310815; GFX11-NEXT: .LBB45_3: ; %end10816; GFX11-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s510817; GFX11-NEXT: v_mov_b32_e32 v2, s610818; GFX11-NEXT: s_setpc_b64 s[30:31]10819; GFX11-NEXT: .LBB45_4:10820; GFX11-NEXT: ; implicit-def: $sgpr4_sgpr5_sgpr6_sgpr710821; GFX11-NEXT: s_branch .LBB45_210822 %cmp = icmp eq i32 %b, 010823 br i1 %cmp, label %cmp.true, label %cmp.false10824 10825cmp.true:10826 %a1 = add <12 x i8> %a, splat (i8 3)10827 %a2 = bitcast <12 x i8> %a1 to <6 x i16>10828 br label %end10829 10830cmp.false:10831 %a3 = bitcast <12 x i8> %a to <6 x i16>10832 br label %end10833 10834end:10835 %phi = phi <6 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]10836 ret <6 x i16> %phi10837}10838 10839define <12 x i8> @bitcast_v6i16_to_v12i8(<6 x i16> %a, i32 %b) {10840; SI-LABEL: bitcast_v6i16_to_v12i8:10841; SI: ; %bb.0:10842; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10843; SI-NEXT: v_mov_b32_e32 v15, v510844; SI-NEXT: v_mov_b32_e32 v16, v310845; SI-NEXT: v_mov_b32_e32 v12, v410846; SI-NEXT: v_mov_b32_e32 v13, v210847; SI-NEXT: v_mov_b32_e32 v14, v010848; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v610849; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v110850; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v1610851; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v1510852; SI-NEXT: ; implicit-def: $vgpr010853; SI-NEXT: ; implicit-def: $vgpr110854; SI-NEXT: ; implicit-def: $vgpr210855; SI-NEXT: ; implicit-def: $vgpr310856; SI-NEXT: ; implicit-def: $vgpr410857; SI-NEXT: ; implicit-def: $vgpr510858; SI-NEXT: ; implicit-def: $vgpr610859; SI-NEXT: ; implicit-def: $vgpr710860; SI-NEXT: ; implicit-def: $vgpr810861; SI-NEXT: ; implicit-def: $vgpr910862; SI-NEXT: ; implicit-def: $vgpr1010863; SI-NEXT: ; implicit-def: $vgpr1110864; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc10865; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]10866; SI-NEXT: s_cbranch_execnz .LBB46_310867; SI-NEXT: ; %bb.1: ; %Flow10868; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10869; SI-NEXT: s_cbranch_execnz .LBB46_410870; SI-NEXT: .LBB46_2: ; %end10871; SI-NEXT: s_or_b64 exec, exec, s[4:5]10872; SI-NEXT: s_setpc_b64 s[30:31]10873; SI-NEXT: .LBB46_3: ; %cmp.false10874; SI-NEXT: v_and_b32_e32 v0, 0xffff, v1410875; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1310876; SI-NEXT: v_and_b32_e32 v6, 0xffff, v1210877; SI-NEXT: v_or_b32_e32 v0, v0, v1910878; SI-NEXT: v_or_b32_e32 v4, v1, v1810879; SI-NEXT: v_or_b32_e32 v8, v6, v1710880; SI-NEXT: v_alignbit_b32 v3, v4, v0, 2410881; SI-NEXT: v_alignbit_b32 v2, v4, v0, 1610882; SI-NEXT: v_alignbit_b32 v1, v4, v0, 810883; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v410884; SI-NEXT: v_lshrrev_b32_e32 v9, 8, v810885; SI-NEXT: v_and_b32_e32 v6, 0xffff, v1610886; SI-NEXT: v_and_b32_e32 v10, 0xffff, v1510887; SI-NEXT: v_bfe_u32 v7, v16, 8, 810888; SI-NEXT: v_bfe_u32 v11, v15, 8, 810889; SI-NEXT: ; implicit-def: $vgpr1410890; SI-NEXT: ; implicit-def: $vgpr1910891; SI-NEXT: ; implicit-def: $vgpr1310892; SI-NEXT: ; implicit-def: $vgpr1810893; SI-NEXT: ; implicit-def: $vgpr1210894; SI-NEXT: ; implicit-def: $vgpr1710895; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10896; SI-NEXT: s_cbranch_execz .LBB46_210897; SI-NEXT: .LBB46_4: ; %cmp.true10898; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1310899; SI-NEXT: v_and_b32_e32 v1, 0xffff, v110900; SI-NEXT: s_mov_b32 s6, 0x3000010901; SI-NEXT: v_or_b32_e32 v1, v18, v110902; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1410903; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v110904; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1210905; SI-NEXT: v_and_b32_e32 v0, 0xffff, v010906; SI-NEXT: v_and_b32_e32 v1, 0xffff, v110907; SI-NEXT: v_or_b32_e32 v0, v19, v010908; SI-NEXT: v_or_b32_e32 v1, v17, v110909; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v010910; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v110911; SI-NEXT: v_alignbit_b32 v3, v4, v0, 2410912; SI-NEXT: v_alignbit_b32 v2, v4, v0, 1610913; SI-NEXT: v_alignbit_b32 v1, v4, v0, 810914; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v410915; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v410916; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v410917; SI-NEXT: v_lshrrev_b32_e32 v11, 24, v810918; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v810919; SI-NEXT: v_lshrrev_b32_e32 v9, 8, v810920; SI-NEXT: s_or_b64 exec, exec, s[4:5]10921; SI-NEXT: s_setpc_b64 s[30:31]10922;10923; VI-LABEL: bitcast_v6i16_to_v12i8:10924; VI: ; %bb.0:10925; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10926; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v310927; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v210928; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v110929; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v010930; VI-NEXT: ; implicit-def: $vgpr1610931; VI-NEXT: ; implicit-def: $vgpr1510932; VI-NEXT: ; implicit-def: $vgpr310933; VI-NEXT: ; implicit-def: $vgpr1410934; VI-NEXT: ; implicit-def: $vgpr510935; VI-NEXT: ; implicit-def: $vgpr710936; VI-NEXT: ; implicit-def: $vgpr810937; VI-NEXT: ; implicit-def: $vgpr910938; VI-NEXT: ; implicit-def: $vgpr1110939; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc10940; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]10941; VI-NEXT: s_cbranch_execz .LBB46_210942; VI-NEXT: ; %bb.1: ; %cmp.false10943; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v210944; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v110945; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v110946; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v010947; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[2:3]10948; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1]10949; VI-NEXT: v_mov_b32_e32 v16, v010950; VI-NEXT: v_mov_b32_e32 v14, v110951; VI-NEXT: v_mov_b32_e32 v8, v210952; VI-NEXT: ; implicit-def: $vgpr110953; VI-NEXT: ; implicit-def: $vgpr210954; VI-NEXT: .LBB46_2: ; %Flow10955; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]10956; VI-NEXT: s_cbranch_execz .LBB46_410957; VI-NEXT: ; %bb.3: ; %cmp.true10958; VI-NEXT: v_mov_b32_e32 v3, 310959; VI-NEXT: v_add_u16_sdwa v6, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10960; VI-NEXT: v_add_u16_sdwa v13, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10961; VI-NEXT: v_add_u16_e32 v14, 3, v110962; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v610963; VI-NEXT: v_add_u16_e32 v16, 3, v010964; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v1310965; VI-NEXT: v_or_b32_e32 v1, v14, v110966; VI-NEXT: v_or_b32_e32 v0, v16, v010967; VI-NEXT: v_add_u16_sdwa v10, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD10968; VI-NEXT: v_add_u16_e32 v8, 3, v210969; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v1010970; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1]10971; VI-NEXT: v_or_b32_e32 v2, v8, v210972; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[2:3]10973; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v210974; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v110975; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v010976; VI-NEXT: v_bfe_u32 v7, v6, 8, 810977; VI-NEXT: .LBB46_4: ; %end10978; VI-NEXT: s_or_b64 exec, exec, s[4:5]10979; VI-NEXT: v_mov_b32_e32 v0, v1610980; VI-NEXT: v_mov_b32_e32 v1, v1510981; VI-NEXT: v_mov_b32_e32 v2, v1310982; VI-NEXT: v_mov_b32_e32 v4, v1410983; VI-NEXT: s_setpc_b64 s[30:31]10984;10985; GFX9-LABEL: bitcast_v6i16_to_v12i8:10986; GFX9: ; %bb.0:10987; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10988; GFX9-NEXT: v_mov_b32_e32 v8, v210989; GFX9-NEXT: v_mov_b32_e32 v14, v110990; GFX9-NEXT: v_mov_b32_e32 v13, v010991; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v310992; GFX9-NEXT: ; implicit-def: $vgpr110993; GFX9-NEXT: ; implicit-def: $vgpr210994; GFX9-NEXT: ; implicit-def: $vgpr310995; GFX9-NEXT: ; implicit-def: $vgpr510996; GFX9-NEXT: ; implicit-def: $vgpr610997; GFX9-NEXT: ; implicit-def: $vgpr710998; GFX9-NEXT: ; implicit-def: $vgpr910999; GFX9-NEXT: ; implicit-def: $vgpr1011000; GFX9-NEXT: ; implicit-def: $vgpr1111001; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc11002; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]11003; GFX9-NEXT: s_cbranch_execz .LBB46_211004; GFX9-NEXT: ; %bb.1: ; %cmp.false11005; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v811006; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v811007; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1411008; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v1411009; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1411010; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v1311011; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]11012; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]11013; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v1311014; GFX9-NEXT: .LBB46_2: ; %Flow11015; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]11016; GFX9-NEXT: s_cbranch_execz .LBB46_411017; GFX9-NEXT: ; %bb.3: ; %cmp.true11018; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]11019; GFX9-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]11020; GFX9-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]11021; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v811022; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]11023; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]11024; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v811025; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1411026; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v1411027; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1411028; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v1311029; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v1311030; GFX9-NEXT: .LBB46_4: ; %end11031; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]11032; GFX9-NEXT: v_mov_b32_e32 v0, v1311033; GFX9-NEXT: v_mov_b32_e32 v4, v1411034; GFX9-NEXT: s_setpc_b64 s[30:31]11035;11036; GFX11-TRUE16-LABEL: bitcast_v6i16_to_v12i8:11037; GFX11-TRUE16: ; %bb.0:11038; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11039; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v11, v011040; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, v111041; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v311042; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo1611043; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo1611044; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo1611045; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo1611046; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo1611047; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo1611048; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo11049; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)11050; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s011051; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false11052; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v1011053; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1211054; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1211055; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[10:11]11056; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[11:12]11057; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1111058; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow11059; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s011060; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB46_411061; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true11062; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]11063; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]11064; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]11065; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)11066; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1211067; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[11:12]11068; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)11069; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[10:11]11070; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v1011071; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1211072; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1111073; GFX11-TRUE16-NEXT: .LBB46_4: ; %end11074; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s011075; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v11.l11076; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v11.h11077; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v12.l11078; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v12.h11079; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v10.l11080; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v10.h11081; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v13.l11082; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]11083;11084; GFX11-FAKE16-LABEL: bitcast_v6i16_to_v12i8:11085; GFX11-FAKE16: ; %bb.0:11086; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11087; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, v2 :: v_dual_mov_b32 v13, v011088; GFX11-FAKE16-NEXT: v_mov_b32_e32 v14, v111089; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v311090; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr111091; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr211092; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr311093; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr511094; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr611095; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr711096; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr911097; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr1011098; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr1111099; GFX11-FAKE16-NEXT: s_and_saveexec_b32 s0, vcc_lo11100; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)11101; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s011102; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB46_211103; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false11104; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v811105; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v811106; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1411107; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1411108; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1411109; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1311110; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]11111; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]11112; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1311113; GFX11-FAKE16-NEXT: .LBB46_2: ; %Flow11114; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s011115; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB46_411116; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true11117; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]11118; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]11119; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]11120; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)11121; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v811122; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v811123; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]11124; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1411125; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1411126; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]11127; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1411128; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1311129; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1311130; GFX11-FAKE16-NEXT: .LBB46_4: ; %end11131; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s011132; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v1311133; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v1411134; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]11135 %cmp = icmp eq i32 %b, 011136 br i1 %cmp, label %cmp.true, label %cmp.false11137 11138cmp.true:11139 %a1 = add <6 x i16> %a, splat (i16 3)11140 %a2 = bitcast <6 x i16> %a1 to <12 x i8>11141 br label %end11142 11143cmp.false:11144 %a3 = bitcast <6 x i16> %a to <12 x i8>11145 br label %end11146 11147end:11148 %phi = phi <12 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]11149 ret <12 x i8> %phi11150}11151 11152define inreg <12 x i8> @bitcast_v6i16_to_v12i8_scalar(<6 x i16> inreg %a, i32 inreg %b) {11153; SI-LABEL: bitcast_v6i16_to_v12i8_scalar:11154; SI: ; %bb.0:11155; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11156; SI-NEXT: s_cmp_lg_u32 s22, 011157; SI-NEXT: s_cbranch_scc0 .LBB47_411158; SI-NEXT: ; %bb.1: ; %cmp.false11159; SI-NEXT: s_and_b32 s4, s16, 0xffff11160; SI-NEXT: s_lshl_b32 s5, s17, 1611161; SI-NEXT: s_or_b32 s4, s4, s511162; SI-NEXT: s_and_b32 s5, s18, 0xffff11163; SI-NEXT: s_lshl_b32 s6, s19, 1611164; SI-NEXT: s_or_b32 s5, s5, s611165; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 1611166; SI-NEXT: s_lshr_b64 s[10:11], s[4:5], 811167; SI-NEXT: s_and_b32 s9, s20, 0xffff11168; SI-NEXT: s_lshl_b32 s11, s21, 1611169; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 2411170; SI-NEXT: s_or_b32 s14, s9, s1111171; SI-NEXT: s_lshr_b32 s7, s5, 811172; SI-NEXT: s_lshr_b32 s15, s14, 811173; SI-NEXT: s_and_b32 s9, s19, 0xffff11174; SI-NEXT: s_and_b32 s22, s21, 0xffff11175; SI-NEXT: s_bfe_u32 s11, s19, 0x8000811176; SI-NEXT: s_bfe_u32 s23, s21, 0x8000811177; SI-NEXT: s_cbranch_execnz .LBB47_311178; SI-NEXT: .LBB47_2: ; %cmp.true11179; SI-NEXT: s_add_i32 s16, s16, 311180; SI-NEXT: s_and_b32 s4, s16, 0xffff11181; SI-NEXT: s_lshl_b32 s5, s17, 1611182; SI-NEXT: s_add_i32 s18, s18, 311183; SI-NEXT: s_or_b32 s4, s5, s411184; SI-NEXT: s_and_b32 s5, s18, 0xffff11185; SI-NEXT: s_lshl_b32 s6, s19, 1611186; SI-NEXT: s_add_i32 s20, s20, 311187; SI-NEXT: s_or_b32 s5, s6, s511188; SI-NEXT: s_and_b32 s6, s20, 0xffff11189; SI-NEXT: s_lshl_b32 s7, s21, 1611190; SI-NEXT: s_add_i32 s4, s4, 0x3000011191; SI-NEXT: s_add_i32 s5, s5, 0x3000011192; SI-NEXT: s_or_b32 s6, s7, s611193; SI-NEXT: s_add_i32 s14, s6, 0x3000011194; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 2411195; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 1611196; SI-NEXT: s_lshr_b64 s[10:11], s[4:5], 811197; SI-NEXT: s_lshr_b32 s11, s5, 2411198; SI-NEXT: s_lshr_b32 s9, s5, 1611199; SI-NEXT: s_lshr_b32 s7, s5, 811200; SI-NEXT: s_lshr_b32 s23, s14, 2411201; SI-NEXT: s_lshr_b32 s22, s14, 1611202; SI-NEXT: s_lshr_b32 s15, s14, 811203; SI-NEXT: .LBB47_3: ; %end11204; SI-NEXT: v_mov_b32_e32 v0, s411205; SI-NEXT: v_mov_b32_e32 v1, s1011206; SI-NEXT: v_mov_b32_e32 v2, s811207; SI-NEXT: v_mov_b32_e32 v3, s611208; SI-NEXT: v_mov_b32_e32 v4, s511209; SI-NEXT: v_mov_b32_e32 v5, s711210; SI-NEXT: v_mov_b32_e32 v6, s911211; SI-NEXT: v_mov_b32_e32 v7, s1111212; SI-NEXT: v_mov_b32_e32 v8, s1411213; SI-NEXT: v_mov_b32_e32 v9, s1511214; SI-NEXT: v_mov_b32_e32 v10, s2211215; SI-NEXT: v_mov_b32_e32 v11, s2311216; SI-NEXT: s_setpc_b64 s[30:31]11217; SI-NEXT: .LBB47_4:11218; SI-NEXT: ; implicit-def: $sgpr411219; SI-NEXT: ; implicit-def: $sgpr1011220; SI-NEXT: ; implicit-def: $sgpr811221; SI-NEXT: ; implicit-def: $sgpr611222; SI-NEXT: ; implicit-def: $sgpr711223; SI-NEXT: ; implicit-def: $sgpr911224; SI-NEXT: ; implicit-def: $sgpr1111225; SI-NEXT: ; implicit-def: $sgpr1411226; SI-NEXT: ; implicit-def: $sgpr1511227; SI-NEXT: ; implicit-def: $sgpr2211228; SI-NEXT: ; implicit-def: $sgpr2311229; SI-NEXT: s_branch .LBB47_211230;11231; VI-LABEL: bitcast_v6i16_to_v12i8_scalar:11232; VI: ; %bb.0:11233; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11234; VI-NEXT: s_cmp_lg_u32 s19, 011235; VI-NEXT: s_cbranch_scc0 .LBB47_411236; VI-NEXT: ; %bb.1: ; %cmp.false11237; VI-NEXT: s_lshr_b32 s19, s16, 811238; VI-NEXT: s_lshr_b32 s10, s18, 1611239; VI-NEXT: s_lshr_b32 s11, s18, 811240; VI-NEXT: s_lshr_b32 s12, s17, 2411241; VI-NEXT: s_lshr_b32 s13, s17, 1611242; VI-NEXT: s_lshr_b32 s14, s17, 811243; VI-NEXT: s_lshr_b32 s15, s16, 1611244; VI-NEXT: s_lshr_b64 s[6:7], s[18:19], 2411245; VI-NEXT: s_lshr_b64 s[4:5], s[16:17], 2411246; VI-NEXT: s_cbranch_execnz .LBB47_311247; VI-NEXT: .LBB47_2: ; %cmp.true11248; VI-NEXT: s_add_i32 s5, s17, 311249; VI-NEXT: s_and_b32 s4, s17, 0xffff000011250; VI-NEXT: s_and_b32 s5, s5, 0xffff11251; VI-NEXT: s_or_b32 s4, s4, s511252; VI-NEXT: s_add_i32 s5, s16, 311253; VI-NEXT: s_add_i32 s17, s4, 0x3000011254; VI-NEXT: s_and_b32 s4, s16, 0xffff000011255; VI-NEXT: s_and_b32 s5, s5, 0xffff11256; VI-NEXT: s_or_b32 s4, s4, s511257; VI-NEXT: s_add_i32 s5, s18, 311258; VI-NEXT: s_add_i32 s16, s4, 0x3000011259; VI-NEXT: s_and_b32 s4, s18, 0xffff000011260; VI-NEXT: s_and_b32 s5, s5, 0xffff11261; VI-NEXT: s_or_b32 s4, s4, s511262; VI-NEXT: s_add_i32 s18, s4, 0x3000011263; VI-NEXT: s_lshr_b32 s19, s16, 811264; VI-NEXT: s_lshr_b64 s[4:5], s[16:17], 2411265; VI-NEXT: s_lshr_b32 s10, s18, 1611266; VI-NEXT: s_lshr_b32 s11, s18, 811267; VI-NEXT: s_lshr_b32 s12, s17, 2411268; VI-NEXT: s_lshr_b32 s13, s17, 1611269; VI-NEXT: s_lshr_b32 s14, s17, 811270; VI-NEXT: s_lshr_b32 s15, s16, 1611271; VI-NEXT: s_lshr_b64 s[6:7], s[18:19], 2411272; VI-NEXT: .LBB47_3: ; %end11273; VI-NEXT: v_mov_b32_e32 v0, s1611274; VI-NEXT: v_mov_b32_e32 v1, s1911275; VI-NEXT: v_mov_b32_e32 v2, s1511276; VI-NEXT: v_mov_b32_e32 v3, s411277; VI-NEXT: v_mov_b32_e32 v4, s1711278; VI-NEXT: v_mov_b32_e32 v5, s1411279; VI-NEXT: v_mov_b32_e32 v6, s1311280; VI-NEXT: v_mov_b32_e32 v7, s1211281; VI-NEXT: v_mov_b32_e32 v8, s1811282; VI-NEXT: v_mov_b32_e32 v9, s1111283; VI-NEXT: v_mov_b32_e32 v10, s1011284; VI-NEXT: v_mov_b32_e32 v11, s611285; VI-NEXT: s_setpc_b64 s[30:31]11286; VI-NEXT: .LBB47_4:11287; VI-NEXT: ; implicit-def: $sgpr1911288; VI-NEXT: ; implicit-def: $sgpr1511289; VI-NEXT: ; implicit-def: $sgpr411290; VI-NEXT: ; implicit-def: $sgpr1411291; VI-NEXT: ; implicit-def: $sgpr1311292; VI-NEXT: ; implicit-def: $sgpr1211293; VI-NEXT: ; implicit-def: $sgpr1111294; VI-NEXT: ; implicit-def: $sgpr1011295; VI-NEXT: ; implicit-def: $sgpr611296; VI-NEXT: s_branch .LBB47_211297;11298; GFX9-LABEL: bitcast_v6i16_to_v12i8_scalar:11299; GFX9: ; %bb.0:11300; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11301; GFX9-NEXT: s_cmp_lg_u32 s19, 011302; GFX9-NEXT: s_cbranch_scc0 .LBB47_311303; GFX9-NEXT: ; %bb.1: ; %cmp.false11304; GFX9-NEXT: s_lshr_b32 s19, s16, 811305; GFX9-NEXT: s_lshr_b32 s10, s18, 1611306; GFX9-NEXT: s_lshr_b32 s11, s18, 811307; GFX9-NEXT: s_lshr_b32 s12, s17, 2411308; GFX9-NEXT: s_lshr_b32 s13, s17, 1611309; GFX9-NEXT: s_lshr_b32 s15, s17, 811310; GFX9-NEXT: s_lshr_b32 s14, s16, 1611311; GFX9-NEXT: s_lshr_b64 s[6:7], s[18:19], 2411312; GFX9-NEXT: s_lshr_b64 s[4:5], s[16:17], 2411313; GFX9-NEXT: s_cbranch_execnz .LBB47_411314; GFX9-NEXT: .LBB47_2: ; %cmp.true11315; GFX9-NEXT: v_pk_add_u16 v8, s18, 3 op_sel_hi:[1,0]11316; GFX9-NEXT: v_pk_add_u16 v14, s17, 3 op_sel_hi:[1,0]11317; GFX9-NEXT: v_pk_add_u16 v13, s16, 3 op_sel_hi:[1,0]11318; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v811319; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]11320; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]11321; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v811322; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1411323; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v1411324; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1411325; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v1311326; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v1311327; GFX9-NEXT: s_branch .LBB47_511328; GFX9-NEXT: .LBB47_3:11329; GFX9-NEXT: ; implicit-def: $sgpr1911330; GFX9-NEXT: ; implicit-def: $sgpr1411331; GFX9-NEXT: ; implicit-def: $sgpr411332; GFX9-NEXT: ; implicit-def: $sgpr1511333; GFX9-NEXT: ; implicit-def: $sgpr1311334; GFX9-NEXT: ; implicit-def: $sgpr1211335; GFX9-NEXT: ; implicit-def: $sgpr1111336; GFX9-NEXT: ; implicit-def: $sgpr1011337; GFX9-NEXT: ; implicit-def: $sgpr611338; GFX9-NEXT: s_branch .LBB47_211339; GFX9-NEXT: .LBB47_4:11340; GFX9-NEXT: v_mov_b32_e32 v13, s1611341; GFX9-NEXT: v_mov_b32_e32 v14, s1711342; GFX9-NEXT: v_mov_b32_e32 v8, s1811343; GFX9-NEXT: v_mov_b32_e32 v1, s1911344; GFX9-NEXT: v_mov_b32_e32 v2, s1411345; GFX9-NEXT: v_mov_b32_e32 v5, s1511346; GFX9-NEXT: v_mov_b32_e32 v6, s1311347; GFX9-NEXT: v_mov_b32_e32 v7, s1211348; GFX9-NEXT: v_mov_b32_e32 v9, s1111349; GFX9-NEXT: v_mov_b32_e32 v10, s1011350; GFX9-NEXT: v_mov_b32_e32 v11, s611351; GFX9-NEXT: v_mov_b32_e32 v3, s411352; GFX9-NEXT: .LBB47_5: ; %end11353; GFX9-NEXT: v_mov_b32_e32 v0, v1311354; GFX9-NEXT: v_mov_b32_e32 v4, v1411355; GFX9-NEXT: s_setpc_b64 s[30:31]11356;11357; GFX11-LABEL: bitcast_v6i16_to_v12i8_scalar:11358; GFX11: ; %bb.0:11359; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11360; GFX11-NEXT: s_cmp_lg_u32 s3, 011361; GFX11-NEXT: s_mov_b32 s3, 011362; GFX11-NEXT: s_cbranch_scc0 .LBB47_311363; GFX11-NEXT: ; %bb.1: ; %cmp.false11364; GFX11-NEXT: s_lshr_b32 s8, s2, 1611365; GFX11-NEXT: s_lshr_b32 s9, s2, 811366; GFX11-NEXT: s_lshr_b32 s10, s1, 2411367; GFX11-NEXT: s_lshr_b32 s11, s1, 1611368; GFX11-NEXT: s_lshr_b32 s13, s1, 811369; GFX11-NEXT: s_lshr_b32 s12, s0, 1611370; GFX11-NEXT: s_lshr_b32 s14, s0, 811371; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 2411372; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 2411373; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s311374; GFX11-NEXT: s_cbranch_vccnz .LBB47_411375; GFX11-NEXT: .LBB47_2: ; %cmp.true11376; GFX11-NEXT: v_pk_add_u16 v8, s2, 3 op_sel_hi:[1,0]11377; GFX11-NEXT: v_pk_add_u16 v14, s1, 3 op_sel_hi:[1,0]11378; GFX11-NEXT: v_pk_add_u16 v13, s0, 3 op_sel_hi:[1,0]11379; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)11380; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v811381; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v811382; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]11383; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v1411384; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v1411385; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]11386; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v1411387; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v1311388; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v1311389; GFX11-NEXT: s_branch .LBB47_511390; GFX11-NEXT: .LBB47_3:11391; GFX11-NEXT: ; implicit-def: $sgpr1411392; GFX11-NEXT: ; implicit-def: $sgpr1211393; GFX11-NEXT: ; implicit-def: $sgpr411394; GFX11-NEXT: ; implicit-def: $sgpr1311395; GFX11-NEXT: ; implicit-def: $sgpr1111396; GFX11-NEXT: ; implicit-def: $sgpr1011397; GFX11-NEXT: ; implicit-def: $sgpr911398; GFX11-NEXT: ; implicit-def: $sgpr811399; GFX11-NEXT: ; implicit-def: $sgpr611400; GFX11-NEXT: s_branch .LBB47_211401; GFX11-NEXT: .LBB47_4:11402; GFX11-NEXT: v_dual_mov_b32 v13, s0 :: v_dual_mov_b32 v14, s111403; GFX11-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v1, s1411404; GFX11-NEXT: v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v5, s1311405; GFX11-NEXT: v_dual_mov_b32 v6, s11 :: v_dual_mov_b32 v7, s1011406; GFX11-NEXT: v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s811407; GFX11-NEXT: v_mov_b32_e32 v11, s611408; GFX11-NEXT: v_mov_b32_e32 v3, s411409; GFX11-NEXT: .LBB47_5: ; %end11410; GFX11-NEXT: v_mov_b32_e32 v0, v1311411; GFX11-NEXT: v_mov_b32_e32 v4, v1411412; GFX11-NEXT: s_setpc_b64 s[30:31]11413 %cmp = icmp eq i32 %b, 011414 br i1 %cmp, label %cmp.true, label %cmp.false11415 11416cmp.true:11417 %a1 = add <6 x i16> %a, splat (i16 3)11418 %a2 = bitcast <6 x i16> %a1 to <12 x i8>11419 br label %end11420 11421cmp.false:11422 %a3 = bitcast <6 x i16> %a to <12 x i8>11423 br label %end11424 11425end:11426 %phi = phi <12 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]11427 ret <12 x i8> %phi11428}11429 11430define <6 x half> @bitcast_v6bf16_to_v6f16(<6 x bfloat> %a, i32 %b) {11431; SI-LABEL: bitcast_v6bf16_to_v6f16:11432; SI: ; %bb.0:11433; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11434; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v611435; SI-NEXT: v_mul_f32_e32 v6, 1.0, v011436; SI-NEXT: v_mul_f32_e32 v7, 1.0, v111437; SI-NEXT: v_mul_f32_e32 v8, 1.0, v211438; SI-NEXT: v_mul_f32_e32 v9, 1.0, v311439; SI-NEXT: v_mul_f32_e32 v10, 1.0, v411440; SI-NEXT: v_mul_f32_e32 v11, 1.0, v511441; SI-NEXT: ; implicit-def: $vgpr011442; SI-NEXT: ; implicit-def: $vgpr111443; SI-NEXT: ; implicit-def: $vgpr211444; SI-NEXT: ; implicit-def: $vgpr311445; SI-NEXT: ; implicit-def: $vgpr411446; SI-NEXT: ; implicit-def: $vgpr511447; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc11448; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]11449; SI-NEXT: s_cbranch_execnz .LBB48_311450; SI-NEXT: ; %bb.1: ; %Flow11451; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]11452; SI-NEXT: s_cbranch_execnz .LBB48_411453; SI-NEXT: .LBB48_2: ; %end11454; SI-NEXT: s_or_b64 exec, exec, s[4:5]11455; SI-NEXT: s_setpc_b64 s[30:31]11456; SI-NEXT: .LBB48_3: ; %cmp.false11457; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v611458; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v711459; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v811460; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v911461; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v1011462; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v1111463; SI-NEXT: v_cvt_f32_f16_e32 v0, v011464; SI-NEXT: v_cvt_f32_f16_e32 v1, v111465; SI-NEXT: v_cvt_f32_f16_e32 v2, v211466; SI-NEXT: v_cvt_f32_f16_e32 v3, v311467; SI-NEXT: v_cvt_f32_f16_e32 v4, v411468; SI-NEXT: v_cvt_f32_f16_e32 v5, v511469; SI-NEXT: ; implicit-def: $vgpr1111470; SI-NEXT: ; implicit-def: $vgpr1011471; SI-NEXT: ; implicit-def: $vgpr911472; SI-NEXT: ; implicit-def: $vgpr811473; SI-NEXT: ; implicit-def: $vgpr711474; SI-NEXT: ; implicit-def: $vgpr611475; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]11476; SI-NEXT: s_cbranch_execz .LBB48_211477; SI-NEXT: .LBB48_4: ; %cmp.true11478; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v1111479; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v011480; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v011481; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v1011482; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v011483; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v011484; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v911485; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v011486; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v011487; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v811488; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v011489; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v011490; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v711491; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v011492; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v011493; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v611494; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v011495; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v011496; SI-NEXT: v_cvt_f32_f16_e32 v0, v011497; SI-NEXT: v_cvt_f32_f16_e32 v1, v111498; SI-NEXT: v_cvt_f32_f16_e32 v2, v211499; SI-NEXT: v_cvt_f32_f16_e32 v3, v311500; SI-NEXT: v_cvt_f32_f16_e32 v4, v411501; SI-NEXT: v_cvt_f32_f16_e32 v5, v511502; SI-NEXT: s_or_b64 exec, exec, s[4:5]11503; SI-NEXT: s_setpc_b64 s[30:31]11504;11505; VI-LABEL: bitcast_v6bf16_to_v6f16:11506; VI: ; %bb.0:11507; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11508; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v311509; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc11510; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]11511; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]11512; VI-NEXT: s_cbranch_execz .LBB48_211513; VI-NEXT: ; %bb.1: ; %cmp.true11514; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v011515; VI-NEXT: v_add_f32_e32 v3, 0x40c00000, v311516; VI-NEXT: v_bfe_u32 v4, v3, 16, 111517; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v311518; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v411519; VI-NEXT: v_and_b32_e32 v0, 0xffff0000, v011520; VI-NEXT: v_or_b32_e32 v5, 0x400000, v311521; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v311522; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v011523; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc11524; VI-NEXT: v_bfe_u32 v4, v0, 16, 111525; VI-NEXT: s_movk_i32 s6, 0x7fff11526; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v011527; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v411528; VI-NEXT: v_or_b32_e32 v5, 0x400000, v011529; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v011530; VI-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc11531; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v111532; VI-NEXT: v_add_f32_e32 v4, 0x40c00000, v411533; VI-NEXT: v_bfe_u32 v5, v4, 16, 111534; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v411535; VI-NEXT: v_add_u32_e32 v5, vcc, s6, v511536; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v111537; VI-NEXT: v_or_b32_e32 v6, 0x400000, v411538; VI-NEXT: v_cmp_u_f32_e32 vcc, v4, v411539; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v111540; VI-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc11541; VI-NEXT: v_bfe_u32 v5, v1, 16, 111542; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v111543; VI-NEXT: v_add_u32_e32 v5, vcc, s6, v511544; VI-NEXT: v_or_b32_e32 v6, 0x400000, v111545; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v111546; VI-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc11547; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v211548; VI-NEXT: v_add_f32_e32 v5, 0x40c00000, v511549; VI-NEXT: v_bfe_u32 v6, v5, 16, 111550; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v511551; VI-NEXT: v_add_u32_e32 v6, vcc, s6, v611552; VI-NEXT: v_and_b32_e32 v2, 0xffff0000, v211553; VI-NEXT: v_or_b32_e32 v7, 0x400000, v511554; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v511555; VI-NEXT: v_add_f32_e32 v2, 0x40c00000, v211556; VI-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc11557; VI-NEXT: v_bfe_u32 v6, v2, 16, 111558; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v211559; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v611560; VI-NEXT: v_or_b32_e32 v7, 0x400000, v211561; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v211562; VI-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc11563; VI-NEXT: v_lshrrev_b32_e32 v0, 16, v011564; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v111565; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v211566; VI-NEXT: v_alignbit_b32 v2, v2, v5, 1611567; VI-NEXT: v_alignbit_b32 v1, v1, v4, 1611568; VI-NEXT: v_alignbit_b32 v0, v0, v3, 1611569; VI-NEXT: .LBB48_2: ; %end11570; VI-NEXT: s_or_b64 exec, exec, s[4:5]11571; VI-NEXT: s_setpc_b64 s[30:31]11572;11573; GFX9-LABEL: bitcast_v6bf16_to_v6f16:11574; GFX9: ; %bb.0:11575; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11576; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v311577; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc11578; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]11579; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]11580; GFX9-NEXT: s_cbranch_execz .LBB48_211581; GFX9-NEXT: ; %bb.1: ; %cmp.true11582; GFX9-NEXT: v_and_b32_e32 v3, 0xffff0000, v011583; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v311584; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 111585; GFX9-NEXT: s_movk_i32 s6, 0x7fff11586; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v011587; GFX9-NEXT: v_add3_u32 v4, v4, v3, s611588; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v311589; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v311590; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v011591; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc11592; GFX9-NEXT: v_bfe_u32 v4, v0, 16, 111593; GFX9-NEXT: v_add3_u32 v4, v4, v0, s611594; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v011595; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v011596; GFX9-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc11597; GFX9-NEXT: v_and_b32_e32 v4, 0xffff0000, v111598; GFX9-NEXT: v_add_f32_e32 v4, 0x40c00000, v411599; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 111600; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v111601; GFX9-NEXT: v_add3_u32 v5, v5, v4, s611602; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v411603; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v411604; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v111605; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc11606; GFX9-NEXT: v_bfe_u32 v5, v1, 16, 111607; GFX9-NEXT: v_add3_u32 v5, v5, v1, s611608; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v111609; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v111610; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc11611; GFX9-NEXT: v_and_b32_e32 v5, 0xffff0000, v211612; GFX9-NEXT: v_add_f32_e32 v5, 0x40c00000, v511613; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 111614; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v211615; GFX9-NEXT: v_add3_u32 v6, v6, v5, s611616; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v511617; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v511618; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v211619; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc11620; GFX9-NEXT: v_bfe_u32 v6, v2, 16, 111621; GFX9-NEXT: v_add3_u32 v6, v6, v2, s611622; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v211623; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v211624; GFX9-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc11625; GFX9-NEXT: s_mov_b32 s6, 0x706030211626; GFX9-NEXT: v_perm_b32 v2, v5, v2, s611627; GFX9-NEXT: v_perm_b32 v1, v4, v1, s611628; GFX9-NEXT: v_perm_b32 v0, v3, v0, s611629; GFX9-NEXT: .LBB48_2: ; %end11630; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]11631; GFX9-NEXT: s_setpc_b64 s[30:31]11632;11633; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v6f16:11634; GFX11-TRUE16: ; %bb.0:11635; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11636; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v311637; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_vgpr4_vgpr5_vgpr611638; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo11639; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)11640; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s011641; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false11642; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, v311643; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, v111644; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, v011645; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr011646; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow11647; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s011648; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB48_411649; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true11650; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v011651; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, 011652; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l11653; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v211654; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)11655; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_add_f32 v6, 0x40c00000, v411656; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v1.l11657; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v311658; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v311659; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v111660; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v3, 16, 111661; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v6, 16, 111662; GFX11-TRUE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v411663; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v2.l11664; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v611665; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v3, 0x7fff11666; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v6, 0x7fff11667; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)11668; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_cndmask_b32 v3, v1, v711669; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v611670; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v011671; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 111672; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v411673; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v8, v2, vcc_lo11674; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)11675; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v0, 16, 111676; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v9, 16, 111677; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v911678; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v4, 0x7fff11679; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v011680; GFX11-TRUE16-NEXT: v_add3_u32 v6, v10, v0, 0x7fff11681; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v9, 0x7fff11682; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v911683; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.h11684; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)11685; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc_lo11686; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v411687; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v12, vcc_lo11688; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v011689; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v6, v8 :: v_dual_add_f32 v5, 0x40c00000, v511690; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v2.h11691; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)11692; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v5, 16, 111693; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v511694; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v511695; GFX11-TRUE16-NEXT: v_add3_u32 v9, v11, v5, 0x7fff11696; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)11697; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v9, v10, vcc_lo11698; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v7.h11699; GFX11-TRUE16-NEXT: .LBB48_4: ; %end11700; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s011701; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)11702; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v3 :: v_dual_mov_b32 v1, v411703; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, v511704; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]11705;11706; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v6f16:11707; GFX11-FAKE16: ; %bb.0:11708; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11709; GFX11-FAKE16-NEXT: s_mov_b32 s0, exec_lo11710; GFX11-FAKE16-NEXT: v_cmpx_ne_u32_e32 0, v311711; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s011712; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)11713; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s011714; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB48_211715; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.true11716; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v211717; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)11718; GFX11-FAKE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v511719; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v5, 16, 111720; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v511721; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)11722; GFX11-FAKE16-NEXT: v_add3_u32 v11, v11, v5, 0x7fff11723; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v111724; GFX11-FAKE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v411725; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)11726; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v4, 16, 111727; GFX11-FAKE16-NEXT: v_add3_u32 v8, v8, v4, 0x7fff11728; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v011729; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)11730; GFX11-FAKE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v0, 16, v011731; GFX11-FAKE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_lshlrev_b32 v1, 16, v111732; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v211733; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)11734; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v3, 16, 111735; GFX11-FAKE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v111736; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v311737; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v311738; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v0, 16, 111739; GFX11-FAKE16-NEXT: v_add3_u32 v6, v6, v3, 0x7fff11740; GFX11-FAKE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v211741; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v011742; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)11743; GFX11-FAKE16-NEXT: v_add3_u32 v7, v7, v0, 0x7fff11744; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v6, v9, vcc_lo11745; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v411746; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v1, 16, 111747; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v411748; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v211749; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)11750; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v8, v6, vcc_lo11751; GFX11-FAKE16-NEXT: v_add3_u32 v8, v9, v1, 0x7fff11752; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v111753; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v111754; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v2, 16, 111755; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)11756; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v8, v9, vcc_lo11757; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v511758; GFX11-FAKE16-NEXT: v_add3_u32 v6, v6, v2, 0x7fff11759; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v11, v12, vcc_lo11760; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v211761; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)11762; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v6, v13, vcc_lo11763; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v011764; GFX11-FAKE16-NEXT: v_perm_b32 v2, v5, v2, 0x706030211765; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v7, v10, vcc_lo11766; GFX11-FAKE16-NEXT: v_perm_b32 v1, v4, v1, 0x706030211767; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)11768; GFX11-FAKE16-NEXT: v_perm_b32 v0, v3, v0, 0x706030211769; GFX11-FAKE16-NEXT: .LBB48_2: ; %end11770; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s011771; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]11772 %cmp = icmp eq i32 %b, 011773 br i1 %cmp, label %cmp.true, label %cmp.false11774 11775cmp.true:11776 %a1 = fadd <6 x bfloat> %a, splat (bfloat 0xR40C0)11777 %a2 = bitcast <6 x bfloat> %a1 to <6 x half>11778 br label %end11779 11780cmp.false:11781 %a3 = bitcast <6 x bfloat> %a to <6 x half>11782 br label %end11783 11784end:11785 %phi = phi <6 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]11786 ret <6 x half> %phi11787}11788 11789define inreg <6 x half> @bitcast_v6bf16_to_v6f16_scalar(<6 x bfloat> inreg %a, i32 inreg %b) {11790; SI-LABEL: bitcast_v6bf16_to_v6f16_scalar:11791; SI: ; %bb.0:11792; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11793; SI-NEXT: s_cmp_lg_u32 s22, 011794; SI-NEXT: v_mul_f32_e64 v6, 1.0, s1611795; SI-NEXT: v_mul_f32_e64 v7, 1.0, s1711796; SI-NEXT: v_mul_f32_e64 v8, 1.0, s1811797; SI-NEXT: v_mul_f32_e64 v9, 1.0, s1911798; SI-NEXT: v_mul_f32_e64 v10, 1.0, s2011799; SI-NEXT: v_mul_f32_e64 v11, 1.0, s2111800; SI-NEXT: s_cbranch_scc0 .LBB49_411801; SI-NEXT: ; %bb.1: ; %cmp.false11802; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v611803; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v711804; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v811805; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v911806; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v1011807; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v1111808; SI-NEXT: v_cvt_f32_f16_e32 v0, v011809; SI-NEXT: v_cvt_f32_f16_e32 v1, v111810; SI-NEXT: v_cvt_f32_f16_e32 v2, v211811; SI-NEXT: v_cvt_f32_f16_e32 v3, v311812; SI-NEXT: v_cvt_f32_f16_e32 v4, v411813; SI-NEXT: v_cvt_f32_f16_e32 v5, v511814; SI-NEXT: s_cbranch_execnz .LBB49_311815; SI-NEXT: .LBB49_2: ; %cmp.true11816; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v1111817; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v011818; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v011819; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v1011820; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v011821; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v011822; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v911823; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v011824; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v011825; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v811826; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v011827; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v011828; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v711829; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v011830; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v011831; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v611832; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v011833; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v011834; SI-NEXT: v_cvt_f32_f16_e32 v0, v011835; SI-NEXT: v_cvt_f32_f16_e32 v1, v111836; SI-NEXT: v_cvt_f32_f16_e32 v2, v211837; SI-NEXT: v_cvt_f32_f16_e32 v3, v311838; SI-NEXT: v_cvt_f32_f16_e32 v4, v411839; SI-NEXT: v_cvt_f32_f16_e32 v5, v511840; SI-NEXT: .LBB49_3: ; %end11841; SI-NEXT: s_setpc_b64 s[30:31]11842; SI-NEXT: .LBB49_4:11843; SI-NEXT: ; implicit-def: $vgpr011844; SI-NEXT: ; implicit-def: $vgpr111845; SI-NEXT: ; implicit-def: $vgpr211846; SI-NEXT: ; implicit-def: $vgpr311847; SI-NEXT: ; implicit-def: $vgpr411848; SI-NEXT: ; implicit-def: $vgpr511849; SI-NEXT: s_branch .LBB49_211850;11851; VI-LABEL: bitcast_v6bf16_to_v6f16_scalar:11852; VI: ; %bb.0:11853; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11854; VI-NEXT: s_cmp_lg_u32 s19, 011855; VI-NEXT: s_cbranch_scc0 .LBB49_311856; VI-NEXT: ; %bb.1: ; %cmp.false11857; VI-NEXT: s_cbranch_execnz .LBB49_411858; VI-NEXT: .LBB49_2: ; %cmp.true11859; VI-NEXT: s_lshl_b32 s4, s16, 1611860; VI-NEXT: v_mov_b32_e32 v3, 0x40c0000011861; VI-NEXT: v_add_f32_e32 v0, s4, v311862; VI-NEXT: v_bfe_u32 v1, v0, 16, 111863; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v011864; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v111865; VI-NEXT: v_or_b32_e32 v2, 0x400000, v011866; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v011867; VI-NEXT: s_and_b32 s4, s16, 0xffff000011868; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc11869; VI-NEXT: v_add_f32_e32 v1, s4, v311870; VI-NEXT: v_bfe_u32 v2, v1, 16, 111871; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v111872; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v211873; VI-NEXT: v_or_b32_e32 v4, 0x400000, v111874; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v111875; VI-NEXT: s_lshl_b32 s4, s17, 1611876; VI-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc11877; VI-NEXT: v_add_f32_e32 v2, s4, v311878; VI-NEXT: v_bfe_u32 v4, v2, 16, 111879; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v211880; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v411881; VI-NEXT: s_and_b32 s4, s17, 0xffff000011882; VI-NEXT: v_or_b32_e32 v5, 0x400000, v211883; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v211884; VI-NEXT: v_add_f32_e32 v2, s4, v311885; VI-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc11886; VI-NEXT: v_bfe_u32 v5, v2, 16, 111887; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v211888; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v511889; VI-NEXT: v_or_b32_e32 v6, 0x400000, v211890; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v211891; VI-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc11892; VI-NEXT: s_lshl_b32 s4, s18, 1611893; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v211894; VI-NEXT: v_add_f32_e32 v2, s4, v311895; VI-NEXT: v_bfe_u32 v6, v2, 16, 111896; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v211897; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v611898; VI-NEXT: s_and_b32 s4, s18, 0xffff000011899; VI-NEXT: v_or_b32_e32 v7, 0x400000, v211900; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v211901; VI-NEXT: v_add_f32_e32 v3, s4, v311902; VI-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc11903; VI-NEXT: v_bfe_u32 v6, v3, 16, 111904; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v311905; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v611906; VI-NEXT: v_or_b32_e32 v7, 0x400000, v311907; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v311908; VI-NEXT: v_cndmask_b32_e32 v3, v6, v7, vcc11909; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v311910; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[2:3]11911; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v111912; VI-NEXT: v_lshrrev_b64 v[3:4], 16, v[4:5]11913; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1]11914; VI-NEXT: v_mov_b32_e32 v1, v311915; VI-NEXT: s_setpc_b64 s[30:31]11916; VI-NEXT: .LBB49_3:11917; VI-NEXT: s_branch .LBB49_211918; VI-NEXT: .LBB49_4:11919; VI-NEXT: v_mov_b32_e32 v0, s1611920; VI-NEXT: v_mov_b32_e32 v1, s1711921; VI-NEXT: v_mov_b32_e32 v2, s1811922; VI-NEXT: v_mov_b32_e32 v3, s1911923; VI-NEXT: s_setpc_b64 s[30:31]11924;11925; GFX9-LABEL: bitcast_v6bf16_to_v6f16_scalar:11926; GFX9: ; %bb.0:11927; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11928; GFX9-NEXT: s_cmp_lg_u32 s19, 011929; GFX9-NEXT: s_cbranch_scc0 .LBB49_311930; GFX9-NEXT: ; %bb.1: ; %cmp.false11931; GFX9-NEXT: s_cbranch_execnz .LBB49_411932; GFX9-NEXT: .LBB49_2: ; %cmp.true11933; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s1611934; GFX9-NEXT: v_mov_b32_e32 v0, 0x40c0000011935; GFX9-NEXT: v_add_f32_e32 v1, s4, v011936; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 111937; GFX9-NEXT: v_add_u32_e32 v2, v2, v111938; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v211939; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v111940; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v111941; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc11942; GFX9-NEXT: s_lshl_b32 s4, s16, 1611943; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v111944; GFX9-NEXT: v_add_f32_e32 v1, s4, v011945; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 111946; GFX9-NEXT: v_add_u32_e32 v2, v2, v111947; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s1711948; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v211949; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v111950; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v111951; GFX9-NEXT: v_add_f32_e32 v1, s4, v011952; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v4, vcc11953; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 111954; GFX9-NEXT: v_add_u32_e32 v2, v2, v111955; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v211956; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v111957; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v111958; GFX9-NEXT: s_lshl_b32 s4, s17, 1611959; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v5, vcc11960; GFX9-NEXT: v_add_f32_e32 v2, s4, v011961; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 111962; GFX9-NEXT: v_add_u32_e32 v5, v5, v211963; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s1811964; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v511965; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v211966; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v211967; GFX9-NEXT: v_add_f32_e32 v2, s4, v011968; GFX9-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc11969; GFX9-NEXT: v_bfe_u32 v6, v2, 16, 111970; GFX9-NEXT: v_add_u32_e32 v6, v6, v211971; GFX9-NEXT: s_lshl_b32 s4, s18, 1611972; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v611973; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v211974; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v211975; GFX9-NEXT: v_add_f32_e32 v0, s4, v011976; GFX9-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc11977; GFX9-NEXT: v_bfe_u32 v6, v0, 16, 111978; GFX9-NEXT: v_add_u32_e32 v6, v6, v011979; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v611980; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v011981; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v011982; GFX9-NEXT: v_cndmask_b32_e32 v0, v6, v7, vcc11983; GFX9-NEXT: v_mov_b32_e32 v6, 0xffff11984; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v211985; GFX9-NEXT: v_and_b32_sdwa v0, v6, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_111986; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v111987; GFX9-NEXT: v_lshl_or_b32 v2, v2, 16, v011988; GFX9-NEXT: v_and_b32_sdwa v0, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_111989; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v011990; GFX9-NEXT: v_and_b32_sdwa v0, v6, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_111991; GFX9-NEXT: v_lshl_or_b32 v0, v3, 16, v011992; GFX9-NEXT: s_setpc_b64 s[30:31]11993; GFX9-NEXT: .LBB49_3:11994; GFX9-NEXT: s_branch .LBB49_211995; GFX9-NEXT: .LBB49_4:11996; GFX9-NEXT: v_mov_b32_e32 v0, s1611997; GFX9-NEXT: v_mov_b32_e32 v1, s1711998; GFX9-NEXT: v_mov_b32_e32 v2, s1811999; GFX9-NEXT: v_mov_b32_e32 v3, s1912000; GFX9-NEXT: s_setpc_b64 s[30:31]12001;12002; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v6f16_scalar:12003; GFX11-TRUE16: ; %bb.0:12004; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12005; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 012006; GFX11-TRUE16-NEXT: s_mov_b32 s4, 012007; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB49_312008; GFX11-TRUE16-NEXT: ; %bb.1: ; %Flow12009; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s412010; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB49_412011; GFX11-TRUE16-NEXT: .LBB49_2: ; %cmp.true12012; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s012013; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 1612014; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s312015; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s012016; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s212017; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 1612018; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s112019; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 112020; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 112021; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s212022; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v112023; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s312024; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v012025; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v112026; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v712027; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v012028; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s012029; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v3, 16, 112030; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v412031; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v012032; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 1612033; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)12034; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s112035; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v212036; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)12037; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo12038; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v112039; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v312040; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v5, 16, 112041; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v7, 16, 112042; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v9, vcc_lo12043; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v012044; GFX11-TRUE16-NEXT: v_bfe_u32 v0, v6, 16, 112045; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v812046; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v312047; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v312048; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v512049; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, v0, v612050; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)12051; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo12052; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v612053; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v012054; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v612055; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v712056; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v212057; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v512058; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v312059; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc_lo12060; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v512061; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v812062; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)12063; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v012064; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc_lo12065; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v712066; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v112067; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v4.l12068; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v212069; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v8, v11, vcc_lo12070; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l12071; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)12072; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v512073; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v6.l12074; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]12075; GFX11-TRUE16-NEXT: .LBB49_3:12076; GFX11-TRUE16-NEXT: s_branch .LBB49_212077; GFX11-TRUE16-NEXT: .LBB49_4:12078; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s112079; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s312080; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]12081;12082; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v6f16_scalar:12083; GFX11-FAKE16: ; %bb.0:12084; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12085; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 012086; GFX11-FAKE16-NEXT: s_mov_b32 s4, 012087; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB49_312088; GFX11-FAKE16-NEXT: ; %bb.1: ; %Flow12089; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s412090; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB49_412091; GFX11-FAKE16-NEXT: .LBB49_2: ; %cmp.true12092; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s012093; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 1612094; GFX11-FAKE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s312095; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s012096; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s112097; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 1612098; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s4, 0, s212099; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s112100; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v2, 16, 112101; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 1612102; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 112103; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s212104; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v412105; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v6, v212106; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v212107; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s312108; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v712109; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v012110; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v612111; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v1, v012112; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v012113; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v3, 16, 112114; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s412115; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)12116; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v112117; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v10, v312118; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)12119; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v8, vcc_lo12120; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v4, 16, 112121; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v7, 16, 112122; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v212123; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v2, v6, v9 :: v_dual_add_nc_u32 v1, v1, v412124; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v1012125; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v312126; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v8, v712127; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)12128; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v112129; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v412130; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v5, 16, 112131; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v212132; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v812133; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v012134; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo12135; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v712136; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v9, v512137; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)12138; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v112139; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v8, v12, vcc_lo12140; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v312141; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v912142; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v512143; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v112144; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v6, v10, vcc_lo12145; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v512146; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v712147; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v212148; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)12149; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v312150; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v9, vcc_lo12151; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v512152; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)12153; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v0, 16, v612154; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v112155; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)12156; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v412157; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v4, 16, v512158; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]12159; GFX11-FAKE16-NEXT: .LBB49_3:12160; GFX11-FAKE16-NEXT: s_branch .LBB49_212161; GFX11-FAKE16-NEXT: .LBB49_4:12162; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s112163; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s312164; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]12165 %cmp = icmp eq i32 %b, 012166 br i1 %cmp, label %cmp.true, label %cmp.false12167 12168cmp.true:12169 %a1 = fadd <6 x bfloat> %a, splat (bfloat 0xR40C0)12170 %a2 = bitcast <6 x bfloat> %a1 to <6 x half>12171 br label %end12172 12173cmp.false:12174 %a3 = bitcast <6 x bfloat> %a to <6 x half>12175 br label %end12176 12177end:12178 %phi = phi <6 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]12179 ret <6 x half> %phi12180}12181 12182define <6 x bfloat> @bitcast_v6f16_to_v6bf16(<6 x half> %a, i32 %b) {12183; SI-LABEL: bitcast_v6f16_to_v6bf16:12184; SI: ; %bb.0:12185; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12186; SI-NEXT: v_cvt_f16_f32_e32 v7, v012187; SI-NEXT: v_cvt_f16_f32_e32 v8, v112188; SI-NEXT: v_cvt_f16_f32_e32 v9, v212189; SI-NEXT: v_cvt_f16_f32_e32 v10, v312190; SI-NEXT: v_cvt_f16_f32_e32 v11, v412191; SI-NEXT: v_cvt_f16_f32_e32 v12, v512192; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v612193; SI-NEXT: ; implicit-def: $vgpr012194; SI-NEXT: ; implicit-def: $vgpr112195; SI-NEXT: ; implicit-def: $vgpr212196; SI-NEXT: ; implicit-def: $vgpr312197; SI-NEXT: ; implicit-def: $vgpr412198; SI-NEXT: ; implicit-def: $vgpr512199; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc12200; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]12201; SI-NEXT: s_cbranch_execnz .LBB50_312202; SI-NEXT: ; %bb.1: ; %Flow12203; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]12204; SI-NEXT: s_cbranch_execnz .LBB50_412205; SI-NEXT: .LBB50_2: ; %end12206; SI-NEXT: s_or_b64 exec, exec, s[4:5]12207; SI-NEXT: s_setpc_b64 s[30:31]12208; SI-NEXT: .LBB50_3: ; %cmp.false12209; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v712210; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v812211; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v912212; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v1012213; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1112214; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v1212215; SI-NEXT: ; implicit-def: $vgpr1212216; SI-NEXT: ; implicit-def: $vgpr1112217; SI-NEXT: ; implicit-def: $vgpr1012218; SI-NEXT: ; implicit-def: $vgpr912219; SI-NEXT: ; implicit-def: $vgpr812220; SI-NEXT: ; implicit-def: $vgpr712221; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]12222; SI-NEXT: s_cbranch_execz .LBB50_212223; SI-NEXT: .LBB50_4: ; %cmp.true12224; SI-NEXT: v_cvt_f32_f16_e32 v0, v1212225; SI-NEXT: v_cvt_f32_f16_e32 v1, v1112226; SI-NEXT: v_cvt_f32_f16_e32 v2, v812227; SI-NEXT: v_cvt_f32_f16_e32 v3, v712228; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v012229; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v112230; SI-NEXT: v_cvt_f16_f32_e32 v5, v012231; SI-NEXT: v_cvt_f16_f32_e32 v4, v112232; SI-NEXT: v_cvt_f32_f16_e32 v0, v1012233; SI-NEXT: v_cvt_f32_f16_e32 v1, v912234; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v212235; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v312236; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v012237; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v112238; SI-NEXT: v_cvt_f16_f32_e32 v3, v312239; SI-NEXT: v_cvt_f16_f32_e32 v2, v212240; SI-NEXT: v_cvt_f16_f32_e32 v6, v112241; SI-NEXT: v_cvt_f16_f32_e32 v7, v012242; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v312243; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v212244; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v612245; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v712246; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v412247; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v512248; SI-NEXT: s_or_b64 exec, exec, s[4:5]12249; SI-NEXT: s_setpc_b64 s[30:31]12250;12251; VI-LABEL: bitcast_v6f16_to_v6bf16:12252; VI: ; %bb.0:12253; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12254; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v312255; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc12256; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]12257; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]12258; VI-NEXT: s_cbranch_execz .LBB50_212259; VI-NEXT: ; %bb.1: ; %cmp.true12260; VI-NEXT: v_mov_b32_e32 v4, 0x20012261; VI-NEXT: v_add_f16_e32 v3, 0x200, v012262; VI-NEXT: v_add_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12263; VI-NEXT: v_add_f16_e32 v5, 0x200, v112264; VI-NEXT: v_add_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12265; VI-NEXT: v_add_f16_e32 v6, 0x200, v212266; VI-NEXT: v_add_f16_sdwa v2, v2, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD12267; VI-NEXT: v_or_b32_e32 v2, v6, v212268; VI-NEXT: v_or_b32_e32 v1, v5, v112269; VI-NEXT: v_or_b32_e32 v0, v3, v012270; VI-NEXT: .LBB50_2: ; %end12271; VI-NEXT: s_or_b64 exec, exec, s[4:5]12272; VI-NEXT: s_setpc_b64 s[30:31]12273;12274; GFX9-LABEL: bitcast_v6f16_to_v6bf16:12275; GFX9: ; %bb.0:12276; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12277; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v312278; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc12279; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]12280; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]12281; GFX9-NEXT: ; %bb.1: ; %cmp.true12282; GFX9-NEXT: s_movk_i32 s6, 0x20012283; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0]12284; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0]12285; GFX9-NEXT: v_pk_add_f16 v0, v0, s6 op_sel_hi:[1,0]12286; GFX9-NEXT: ; %bb.2: ; %end12287; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]12288; GFX9-NEXT: s_setpc_b64 s[30:31]12289;12290; GFX11-LABEL: bitcast_v6f16_to_v6bf16:12291; GFX11: ; %bb.0:12292; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12293; GFX11-NEXT: s_mov_b32 s0, exec_lo12294; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v312295; GFX11-NEXT: s_xor_b32 s0, exec_lo, s012296; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)12297; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s012298; GFX11-NEXT: ; %bb.1: ; %cmp.true12299; GFX11-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]12300; GFX11-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]12301; GFX11-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]12302; GFX11-NEXT: ; %bb.2: ; %end12303; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s012304; GFX11-NEXT: s_setpc_b64 s[30:31]12305 %cmp = icmp eq i32 %b, 012306 br i1 %cmp, label %cmp.true, label %cmp.false12307 12308cmp.true:12309 %a1 = fadd <6 x half> %a, splat (half 0xH0200)12310 %a2 = bitcast <6 x half> %a1 to <6 x bfloat>12311 br label %end12312 12313cmp.false:12314 %a3 = bitcast <6 x half> %a to <6 x bfloat>12315 br label %end12316 12317end:12318 %phi = phi <6 x bfloat> [ %a2, %cmp.true ], [ %a3, %cmp.false ]12319 ret <6 x bfloat> %phi12320}12321 12322define inreg <6 x bfloat> @bitcast_v6f16_to_v6bf16_scalar(<6 x half> inreg %a, i32 inreg %b) {12323; SI-LABEL: bitcast_v6f16_to_v6bf16_scalar:12324; SI: ; %bb.0:12325; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12326; SI-NEXT: v_cvt_f16_f32_e32 v6, s1612327; SI-NEXT: v_cvt_f16_f32_e32 v7, s1712328; SI-NEXT: v_cvt_f16_f32_e32 v8, s1812329; SI-NEXT: v_cvt_f16_f32_e32 v9, s1912330; SI-NEXT: v_cvt_f16_f32_e32 v10, s2012331; SI-NEXT: v_cvt_f16_f32_e32 v11, s2112332; SI-NEXT: s_cmp_lg_u32 s22, 012333; SI-NEXT: s_cbranch_scc0 .LBB51_412334; SI-NEXT: ; %bb.1: ; %cmp.false12335; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v612336; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v712337; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v812338; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v912339; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1012340; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v1112341; SI-NEXT: s_cbranch_execnz .LBB51_312342; SI-NEXT: .LBB51_2: ; %cmp.true12343; SI-NEXT: v_cvt_f32_f16_e32 v0, v1112344; SI-NEXT: v_cvt_f32_f16_e32 v1, v1012345; SI-NEXT: v_cvt_f32_f16_e32 v2, v712346; SI-NEXT: v_cvt_f32_f16_e32 v3, v612347; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v012348; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v112349; SI-NEXT: v_cvt_f16_f32_e32 v5, v012350; SI-NEXT: v_cvt_f16_f32_e32 v4, v112351; SI-NEXT: v_cvt_f32_f16_e32 v0, v912352; SI-NEXT: v_cvt_f32_f16_e32 v1, v812353; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v212354; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v312355; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v012356; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v112357; SI-NEXT: v_cvt_f16_f32_e32 v3, v312358; SI-NEXT: v_cvt_f16_f32_e32 v2, v212359; SI-NEXT: v_cvt_f16_f32_e32 v6, v112360; SI-NEXT: v_cvt_f16_f32_e32 v7, v012361; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v312362; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v212363; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v612364; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v712365; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v412366; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v512367; SI-NEXT: .LBB51_3: ; %end12368; SI-NEXT: s_setpc_b64 s[30:31]12369; SI-NEXT: .LBB51_4:12370; SI-NEXT: ; implicit-def: $vgpr012371; SI-NEXT: ; implicit-def: $vgpr112372; SI-NEXT: ; implicit-def: $vgpr212373; SI-NEXT: ; implicit-def: $vgpr312374; SI-NEXT: ; implicit-def: $vgpr412375; SI-NEXT: ; implicit-def: $vgpr512376; SI-NEXT: s_branch .LBB51_212377;12378; VI-LABEL: bitcast_v6f16_to_v6bf16_scalar:12379; VI: ; %bb.0:12380; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12381; VI-NEXT: s_cmp_lg_u32 s19, 012382; VI-NEXT: s_cbranch_scc0 .LBB51_312383; VI-NEXT: ; %bb.1: ; %cmp.false12384; VI-NEXT: s_cbranch_execnz .LBB51_412385; VI-NEXT: .LBB51_2: ; %cmp.true12386; VI-NEXT: s_lshr_b32 s4, s16, 1612387; VI-NEXT: v_mov_b32_e32 v1, s412388; VI-NEXT: s_lshr_b32 s4, s17, 1612389; VI-NEXT: v_mov_b32_e32 v2, s412390; VI-NEXT: s_lshr_b32 s4, s18, 1612391; VI-NEXT: v_mov_b32_e32 v0, 0x20012392; VI-NEXT: v_mov_b32_e32 v6, s412393; VI-NEXT: v_add_f16_e32 v3, s16, v012394; VI-NEXT: v_add_f16_sdwa v4, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12395; VI-NEXT: v_add_f16_e32 v1, s17, v012396; VI-NEXT: v_add_f16_sdwa v5, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12397; VI-NEXT: v_add_f16_e32 v2, s18, v012398; VI-NEXT: v_add_f16_sdwa v0, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD12399; VI-NEXT: v_or_b32_e32 v2, v2, v012400; VI-NEXT: v_or_b32_e32 v1, v1, v512401; VI-NEXT: v_or_b32_e32 v0, v3, v412402; VI-NEXT: s_setpc_b64 s[30:31]12403; VI-NEXT: .LBB51_3:12404; VI-NEXT: s_branch .LBB51_212405; VI-NEXT: .LBB51_4:12406; VI-NEXT: v_mov_b32_e32 v0, s1612407; VI-NEXT: v_mov_b32_e32 v1, s1712408; VI-NEXT: v_mov_b32_e32 v2, s1812409; VI-NEXT: v_mov_b32_e32 v3, s1912410; VI-NEXT: s_setpc_b64 s[30:31]12411;12412; GFX9-LABEL: bitcast_v6f16_to_v6bf16_scalar:12413; GFX9: ; %bb.0:12414; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12415; GFX9-NEXT: s_cmp_lg_u32 s19, 012416; GFX9-NEXT: s_cbranch_scc0 .LBB51_312417; GFX9-NEXT: ; %bb.1: ; %cmp.false12418; GFX9-NEXT: s_cbranch_execnz .LBB51_412419; GFX9-NEXT: .LBB51_2: ; %cmp.true12420; GFX9-NEXT: v_mov_b32_e32 v0, 0x20012421; GFX9-NEXT: v_pk_add_f16 v2, s18, v0 op_sel_hi:[1,0]12422; GFX9-NEXT: v_pk_add_f16 v1, s17, v0 op_sel_hi:[1,0]12423; GFX9-NEXT: v_pk_add_f16 v0, s16, v0 op_sel_hi:[1,0]12424; GFX9-NEXT: s_setpc_b64 s[30:31]12425; GFX9-NEXT: .LBB51_3:12426; GFX9-NEXT: s_branch .LBB51_212427; GFX9-NEXT: .LBB51_4:12428; GFX9-NEXT: v_mov_b32_e32 v0, s1612429; GFX9-NEXT: v_mov_b32_e32 v1, s1712430; GFX9-NEXT: v_mov_b32_e32 v2, s1812431; GFX9-NEXT: v_mov_b32_e32 v3, s1912432; GFX9-NEXT: s_setpc_b64 s[30:31]12433;12434; GFX11-LABEL: bitcast_v6f16_to_v6bf16_scalar:12435; GFX11: ; %bb.0:12436; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12437; GFX11-NEXT: s_cmp_lg_u32 s3, 012438; GFX11-NEXT: s_mov_b32 s4, 012439; GFX11-NEXT: s_cbranch_scc0 .LBB51_312440; GFX11-NEXT: ; %bb.1: ; %Flow12441; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s412442; GFX11-NEXT: s_cbranch_vccnz .LBB51_412443; GFX11-NEXT: .LBB51_2: ; %cmp.true12444; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]12445; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]12446; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]12447; GFX11-NEXT: s_setpc_b64 s[30:31]12448; GFX11-NEXT: .LBB51_3:12449; GFX11-NEXT: s_branch .LBB51_212450; GFX11-NEXT: .LBB51_4:12451; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s112452; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s312453; GFX11-NEXT: s_setpc_b64 s[30:31]12454 %cmp = icmp eq i32 %b, 012455 br i1 %cmp, label %cmp.true, label %cmp.false12456 12457cmp.true:12458 %a1 = fadd <6 x half> %a, splat (half 0xH0200)12459 %a2 = bitcast <6 x half> %a1 to <6 x bfloat>12460 br label %end12461 12462cmp.false:12463 %a3 = bitcast <6 x half> %a to <6 x bfloat>12464 br label %end12465 12466end:12467 %phi = phi <6 x bfloat> [ %a2, %cmp.true ], [ %a3, %cmp.false ]12468 ret <6 x bfloat> %phi12469}12470 12471define <6 x i16> @bitcast_v6bf16_to_v6i16(<6 x bfloat> %a, i32 %b) {12472; SI-LABEL: bitcast_v6bf16_to_v6i16:12473; SI: ; %bb.0:12474; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12475; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v612476; SI-NEXT: v_mul_f32_e32 v11, 1.0, v012477; SI-NEXT: v_mul_f32_e32 v10, 1.0, v112478; SI-NEXT: v_mul_f32_e32 v7, 1.0, v212479; SI-NEXT: v_mul_f32_e32 v6, 1.0, v312480; SI-NEXT: v_mul_f32_e32 v9, 1.0, v412481; SI-NEXT: v_mul_f32_e32 v8, 1.0, v512482; SI-NEXT: ; implicit-def: $vgpr012483; SI-NEXT: ; implicit-def: $vgpr112484; SI-NEXT: ; implicit-def: $vgpr212485; SI-NEXT: ; implicit-def: $vgpr312486; SI-NEXT: ; implicit-def: $vgpr412487; SI-NEXT: ; implicit-def: $vgpr512488; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc12489; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]12490; SI-NEXT: s_cbranch_execnz .LBB52_312491; SI-NEXT: ; %bb.1: ; %Flow12492; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]12493; SI-NEXT: s_cbranch_execnz .LBB52_412494; SI-NEXT: .LBB52_2: ; %end12495; SI-NEXT: s_or_b64 exec, exec, s[4:5]12496; SI-NEXT: s_setpc_b64 s[30:31]12497; SI-NEXT: .LBB52_3: ; %cmp.false12498; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v1112499; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1012500; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v712501; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v612502; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v912503; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v812504; SI-NEXT: ; implicit-def: $vgpr1112505; SI-NEXT: ; implicit-def: $vgpr1012506; SI-NEXT: ; implicit-def: $vgpr912507; SI-NEXT: ; implicit-def: $vgpr812508; SI-NEXT: ; implicit-def: $vgpr712509; SI-NEXT: ; implicit-def: $vgpr612510; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]12511; SI-NEXT: s_cbranch_execz .LBB52_212512; SI-NEXT: .LBB52_4: ; %cmp.true12513; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1012514; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v1112515; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v112516; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v012517; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v112518; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v812519; SI-NEXT: v_alignbit_b32 v0, v2, v0, 1612520; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v912521; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v312522; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v212523; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v312524; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v612525; SI-NEXT: v_alignbit_b32 v4, v5, v2, 1612526; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v712527; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v312528; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v212529; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v312530; SI-NEXT: v_alignbit_b32 v2, v3, v2, 1612531; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v112532; SI-NEXT: v_alignbit_b32 v1, v2, v1, 1612533; SI-NEXT: s_or_b64 exec, exec, s[4:5]12534; SI-NEXT: s_setpc_b64 s[30:31]12535;12536; VI-LABEL: bitcast_v6bf16_to_v6i16:12537; VI: ; %bb.0:12538; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12539; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v312540; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc12541; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]12542; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]12543; VI-NEXT: s_cbranch_execz .LBB52_212544; VI-NEXT: ; %bb.1: ; %cmp.true12545; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v012546; VI-NEXT: v_add_f32_e32 v3, 0x40c00000, v312547; VI-NEXT: v_bfe_u32 v4, v3, 16, 112548; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v312549; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v412550; VI-NEXT: v_and_b32_e32 v0, 0xffff0000, v012551; VI-NEXT: v_or_b32_e32 v5, 0x400000, v312552; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v312553; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v012554; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc12555; VI-NEXT: v_bfe_u32 v4, v0, 16, 112556; VI-NEXT: s_movk_i32 s6, 0x7fff12557; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v012558; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v412559; VI-NEXT: v_or_b32_e32 v5, 0x400000, v012560; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v012561; VI-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc12562; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v112563; VI-NEXT: v_add_f32_e32 v4, 0x40c00000, v412564; VI-NEXT: v_bfe_u32 v5, v4, 16, 112565; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v412566; VI-NEXT: v_add_u32_e32 v5, vcc, s6, v512567; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v112568; VI-NEXT: v_or_b32_e32 v6, 0x400000, v412569; VI-NEXT: v_cmp_u_f32_e32 vcc, v4, v412570; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v112571; VI-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc12572; VI-NEXT: v_bfe_u32 v5, v1, 16, 112573; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v112574; VI-NEXT: v_add_u32_e32 v5, vcc, s6, v512575; VI-NEXT: v_or_b32_e32 v6, 0x400000, v112576; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v112577; VI-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc12578; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v212579; VI-NEXT: v_add_f32_e32 v5, 0x40c00000, v512580; VI-NEXT: v_bfe_u32 v6, v5, 16, 112581; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v512582; VI-NEXT: v_add_u32_e32 v6, vcc, s6, v612583; VI-NEXT: v_and_b32_e32 v2, 0xffff0000, v212584; VI-NEXT: v_or_b32_e32 v7, 0x400000, v512585; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v512586; VI-NEXT: v_add_f32_e32 v2, 0x40c00000, v212587; VI-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc12588; VI-NEXT: v_bfe_u32 v6, v2, 16, 112589; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v212590; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v612591; VI-NEXT: v_or_b32_e32 v7, 0x400000, v212592; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v212593; VI-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc12594; VI-NEXT: v_lshrrev_b32_e32 v0, 16, v012595; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v112596; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v212597; VI-NEXT: v_alignbit_b32 v2, v2, v5, 1612598; VI-NEXT: v_alignbit_b32 v1, v1, v4, 1612599; VI-NEXT: v_alignbit_b32 v0, v0, v3, 1612600; VI-NEXT: .LBB52_2: ; %end12601; VI-NEXT: s_or_b64 exec, exec, s[4:5]12602; VI-NEXT: s_setpc_b64 s[30:31]12603;12604; GFX9-LABEL: bitcast_v6bf16_to_v6i16:12605; GFX9: ; %bb.0:12606; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12607; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v312608; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc12609; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]12610; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]12611; GFX9-NEXT: s_cbranch_execz .LBB52_212612; GFX9-NEXT: ; %bb.1: ; %cmp.true12613; GFX9-NEXT: v_and_b32_e32 v3, 0xffff0000, v012614; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v312615; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 112616; GFX9-NEXT: s_movk_i32 s6, 0x7fff12617; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v012618; GFX9-NEXT: v_add3_u32 v4, v4, v3, s612619; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v312620; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v312621; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v012622; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc12623; GFX9-NEXT: v_bfe_u32 v4, v0, 16, 112624; GFX9-NEXT: v_add3_u32 v4, v4, v0, s612625; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v012626; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v012627; GFX9-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc12628; GFX9-NEXT: v_and_b32_e32 v4, 0xffff0000, v112629; GFX9-NEXT: v_add_f32_e32 v4, 0x40c00000, v412630; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 112631; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v112632; GFX9-NEXT: v_add3_u32 v5, v5, v4, s612633; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v412634; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v412635; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v112636; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc12637; GFX9-NEXT: v_bfe_u32 v5, v1, 16, 112638; GFX9-NEXT: v_add3_u32 v5, v5, v1, s612639; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v112640; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v112641; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc12642; GFX9-NEXT: v_and_b32_e32 v5, 0xffff0000, v212643; GFX9-NEXT: v_add_f32_e32 v5, 0x40c00000, v512644; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 112645; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v212646; GFX9-NEXT: v_add3_u32 v6, v6, v5, s612647; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v512648; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v512649; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v212650; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc12651; GFX9-NEXT: v_bfe_u32 v6, v2, 16, 112652; GFX9-NEXT: v_add3_u32 v6, v6, v2, s612653; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v212654; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v212655; GFX9-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc12656; GFX9-NEXT: s_mov_b32 s6, 0x706030212657; GFX9-NEXT: v_perm_b32 v2, v5, v2, s612658; GFX9-NEXT: v_perm_b32 v1, v4, v1, s612659; GFX9-NEXT: v_perm_b32 v0, v3, v0, s612660; GFX9-NEXT: .LBB52_2: ; %end12661; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]12662; GFX9-NEXT: s_setpc_b64 s[30:31]12663;12664; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v6i16:12665; GFX11-TRUE16: ; %bb.0:12666; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12667; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo12668; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v312669; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s012670; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)12671; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s012672; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB52_212673; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true12674; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, 012675; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l12676; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)12677; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v312678; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v1.l12679; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v4, 16, 112680; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v412681; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)12682; GFX11-TRUE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v312683; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v412684; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v2.l12685; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v4, 0x7fff12686; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v112687; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff0000, v212688; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)12689; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v312690; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v6, v7, vcc_lo12691; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v912692; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v012693; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)12694; GFX11-TRUE16-NEXT: v_dual_add_f32 v7, 0x40c00000, v1 :: v_dual_add_f32 v0, 0x40c00000, v012695; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v712696; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)12697; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 112698; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v012699; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v012700; GFX11-TRUE16-NEXT: v_add3_u32 v2, v8, v0, 0x7fff12701; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)12702; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v10, vcc_lo12703; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v9, 16, 112704; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v512705; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v912706; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.h12707; GFX11-TRUE16-NEXT: v_add3_u32 v5, v8, v9, 0x7fff12708; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 112709; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v2, 16, 112710; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v312711; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v212712; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo12713; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v3, 0x7fff12714; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v312715; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v7, 16, 112716; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v2, 0x7fff12717; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)12718; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo12719; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v212720; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v7, 0x7fff12721; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)12722; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc_lo12723; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v712724; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v5.h12725; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v11, vcc_lo12726; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h12727; GFX11-TRUE16-NEXT: .LBB52_2: ; %end12728; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s012729; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]12730;12731; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v6i16:12732; GFX11-FAKE16: ; %bb.0:12733; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12734; GFX11-FAKE16-NEXT: s_mov_b32 s0, exec_lo12735; GFX11-FAKE16-NEXT: v_cmpx_ne_u32_e32 0, v312736; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s012737; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)12738; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s012739; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB52_212740; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.true12741; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v212742; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)12743; GFX11-FAKE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v512744; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v5, 16, 112745; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v512746; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)12747; GFX11-FAKE16-NEXT: v_add3_u32 v11, v11, v5, 0x7fff12748; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v112749; GFX11-FAKE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v412750; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)12751; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v4, 16, 112752; GFX11-FAKE16-NEXT: v_add3_u32 v8, v8, v4, 0x7fff12753; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v012754; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)12755; GFX11-FAKE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v0, 16, v012756; GFX11-FAKE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_lshlrev_b32 v1, 16, v112757; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v212758; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)12759; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v3, 16, 112760; GFX11-FAKE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v112761; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v312762; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v312763; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v0, 16, 112764; GFX11-FAKE16-NEXT: v_add3_u32 v6, v6, v3, 0x7fff12765; GFX11-FAKE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v212766; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v012767; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)12768; GFX11-FAKE16-NEXT: v_add3_u32 v7, v7, v0, 0x7fff12769; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v6, v9, vcc_lo12770; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v412771; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v1, 16, 112772; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v412773; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v212774; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)12775; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v8, v6, vcc_lo12776; GFX11-FAKE16-NEXT: v_add3_u32 v8, v9, v1, 0x7fff12777; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v112778; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v112779; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v2, 16, 112780; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)12781; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v8, v9, vcc_lo12782; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v512783; GFX11-FAKE16-NEXT: v_add3_u32 v6, v6, v2, 0x7fff12784; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v11, v12, vcc_lo12785; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v212786; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)12787; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v6, v13, vcc_lo12788; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v012789; GFX11-FAKE16-NEXT: v_perm_b32 v2, v5, v2, 0x706030212790; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v7, v10, vcc_lo12791; GFX11-FAKE16-NEXT: v_perm_b32 v1, v4, v1, 0x706030212792; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)12793; GFX11-FAKE16-NEXT: v_perm_b32 v0, v3, v0, 0x706030212794; GFX11-FAKE16-NEXT: .LBB52_2: ; %end12795; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s012796; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]12797 %cmp = icmp eq i32 %b, 012798 br i1 %cmp, label %cmp.true, label %cmp.false12799 12800cmp.true:12801 %a1 = fadd <6 x bfloat> %a, splat (bfloat 0xR40C0)12802 %a2 = bitcast <6 x bfloat> %a1 to <6 x i16>12803 br label %end12804 12805cmp.false:12806 %a3 = bitcast <6 x bfloat> %a to <6 x i16>12807 br label %end12808 12809end:12810 %phi = phi <6 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]12811 ret <6 x i16> %phi12812}12813 12814define inreg <6 x i16> @bitcast_v6bf16_to_v6i16_scalar(<6 x bfloat> inreg %a, i32 inreg %b) {12815; SI-LABEL: bitcast_v6bf16_to_v6i16_scalar:12816; SI: ; %bb.0:12817; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12818; SI-NEXT: s_cmp_lg_u32 s22, 012819; SI-NEXT: v_mul_f32_e64 v11, 1.0, s1612820; SI-NEXT: v_mul_f32_e64 v1, 1.0, s1712821; SI-NEXT: v_mul_f32_e64 v3, 1.0, s1812822; SI-NEXT: v_mul_f32_e64 v8, 1.0, s1912823; SI-NEXT: v_mul_f32_e64 v10, 1.0, s2012824; SI-NEXT: v_mul_f32_e64 v9, 1.0, s2112825; SI-NEXT: s_cbranch_scc0 .LBB53_412826; SI-NEXT: ; %bb.1: ; %cmp.false12827; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v1112828; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v112829; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v312830; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v812831; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v1012832; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v912833; SI-NEXT: s_cbranch_execnz .LBB53_312834; SI-NEXT: .LBB53_2: ; %cmp.true12835; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v112836; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v1112837; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v112838; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v012839; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1112840; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 1612841; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1012842; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v112843; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v912844; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v112845; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v112846; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v312847; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v112848; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v812849; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v112850; SI-NEXT: v_lshr_b64 v[6:7], v[4:5], 1612851; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v112852; SI-NEXT: v_lshr_b64 v[2:3], v[3:4], 1612853; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1112854; SI-NEXT: v_lshr_b64 v[7:8], v[1:2], 1612855; SI-NEXT: .LBB53_3: ; %end12856; SI-NEXT: v_mov_b32_e32 v1, v712857; SI-NEXT: v_mov_b32_e32 v3, v412858; SI-NEXT: v_mov_b32_e32 v4, v612859; SI-NEXT: s_setpc_b64 s[30:31]12860; SI-NEXT: .LBB53_4:12861; SI-NEXT: ; implicit-def: $vgpr012862; SI-NEXT: ; implicit-def: $vgpr712863; SI-NEXT: ; implicit-def: $vgpr212864; SI-NEXT: ; implicit-def: $vgpr412865; SI-NEXT: ; implicit-def: $vgpr612866; SI-NEXT: ; implicit-def: $vgpr512867; SI-NEXT: s_branch .LBB53_212868;12869; VI-LABEL: bitcast_v6bf16_to_v6i16_scalar:12870; VI: ; %bb.0:12871; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12872; VI-NEXT: s_cmp_lg_u32 s19, 012873; VI-NEXT: s_cbranch_scc0 .LBB53_312874; VI-NEXT: ; %bb.1: ; %cmp.false12875; VI-NEXT: s_cbranch_execnz .LBB53_412876; VI-NEXT: .LBB53_2: ; %cmp.true12877; VI-NEXT: s_lshl_b32 s4, s16, 1612878; VI-NEXT: v_mov_b32_e32 v3, 0x40c0000012879; VI-NEXT: v_add_f32_e32 v0, s4, v312880; VI-NEXT: v_bfe_u32 v1, v0, 16, 112881; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v012882; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v112883; VI-NEXT: v_or_b32_e32 v2, 0x400000, v012884; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v012885; VI-NEXT: s_and_b32 s4, s16, 0xffff000012886; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc12887; VI-NEXT: v_add_f32_e32 v1, s4, v312888; VI-NEXT: v_bfe_u32 v2, v1, 16, 112889; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v112890; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v212891; VI-NEXT: v_or_b32_e32 v4, 0x400000, v112892; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v112893; VI-NEXT: s_lshl_b32 s4, s17, 1612894; VI-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc12895; VI-NEXT: v_add_f32_e32 v2, s4, v312896; VI-NEXT: v_bfe_u32 v4, v2, 16, 112897; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v212898; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v412899; VI-NEXT: s_and_b32 s4, s17, 0xffff000012900; VI-NEXT: v_or_b32_e32 v5, 0x400000, v212901; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v212902; VI-NEXT: v_add_f32_e32 v2, s4, v312903; VI-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc12904; VI-NEXT: v_bfe_u32 v5, v2, 16, 112905; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v212906; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v512907; VI-NEXT: v_or_b32_e32 v6, 0x400000, v212908; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v212909; VI-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc12910; VI-NEXT: s_lshl_b32 s4, s18, 1612911; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v212912; VI-NEXT: v_add_f32_e32 v2, s4, v312913; VI-NEXT: v_bfe_u32 v6, v2, 16, 112914; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v212915; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v612916; VI-NEXT: s_and_b32 s4, s18, 0xffff000012917; VI-NEXT: v_or_b32_e32 v7, 0x400000, v212918; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v212919; VI-NEXT: v_add_f32_e32 v3, s4, v312920; VI-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc12921; VI-NEXT: v_bfe_u32 v6, v3, 16, 112922; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v312923; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v612924; VI-NEXT: v_or_b32_e32 v7, 0x400000, v312925; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v312926; VI-NEXT: v_cndmask_b32_e32 v3, v6, v7, vcc12927; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v312928; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[2:3]12929; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v112930; VI-NEXT: v_lshrrev_b64 v[3:4], 16, v[4:5]12931; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1]12932; VI-NEXT: v_mov_b32_e32 v1, v312933; VI-NEXT: s_setpc_b64 s[30:31]12934; VI-NEXT: .LBB53_3:12935; VI-NEXT: s_branch .LBB53_212936; VI-NEXT: .LBB53_4:12937; VI-NEXT: v_mov_b32_e32 v0, s1612938; VI-NEXT: v_mov_b32_e32 v1, s1712939; VI-NEXT: v_mov_b32_e32 v2, s1812940; VI-NEXT: v_mov_b32_e32 v3, s1912941; VI-NEXT: s_setpc_b64 s[30:31]12942;12943; GFX9-LABEL: bitcast_v6bf16_to_v6i16_scalar:12944; GFX9: ; %bb.0:12945; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12946; GFX9-NEXT: s_cmp_lg_u32 s19, 012947; GFX9-NEXT: s_cbranch_scc0 .LBB53_312948; GFX9-NEXT: ; %bb.1: ; %cmp.false12949; GFX9-NEXT: s_cbranch_execnz .LBB53_412950; GFX9-NEXT: .LBB53_2: ; %cmp.true12951; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s1612952; GFX9-NEXT: v_mov_b32_e32 v0, 0x40c0000012953; GFX9-NEXT: v_add_f32_e32 v1, s4, v012954; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 112955; GFX9-NEXT: v_add_u32_e32 v2, v2, v112956; GFX9-NEXT: s_lshl_b32 s4, s16, 1612957; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v212958; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v112959; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v112960; GFX9-NEXT: v_add_f32_e32 v1, s4, v012961; GFX9-NEXT: v_cndmask_b32_e32 v3, v2, v3, vcc12962; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 112963; GFX9-NEXT: v_add_u32_e32 v2, v2, v112964; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s1712965; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v212966; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v112967; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v112968; GFX9-NEXT: v_add_f32_e32 v1, s4, v012969; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v4, vcc12970; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 112971; GFX9-NEXT: v_add_u32_e32 v2, v2, v112972; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v212973; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v112974; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v112975; GFX9-NEXT: s_lshl_b32 s4, s17, 1612976; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v5, vcc12977; GFX9-NEXT: v_add_f32_e32 v2, s4, v012978; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 112979; GFX9-NEXT: v_add_u32_e32 v5, v5, v212980; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s1812981; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v512982; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v212983; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v212984; GFX9-NEXT: v_add_f32_e32 v2, s4, v012985; GFX9-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc12986; GFX9-NEXT: v_bfe_u32 v6, v2, 16, 112987; GFX9-NEXT: v_add_u32_e32 v6, v6, v212988; GFX9-NEXT: s_lshl_b32 s4, s18, 1612989; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v612990; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v212991; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v212992; GFX9-NEXT: v_add_f32_e32 v0, s4, v012993; GFX9-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc12994; GFX9-NEXT: v_bfe_u32 v6, v0, 16, 112995; GFX9-NEXT: v_add_u32_e32 v6, v6, v012996; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v612997; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v012998; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v012999; GFX9-NEXT: v_cndmask_b32_e32 v0, v6, v7, vcc13000; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v013001; GFX9-NEXT: v_mov_b32_e32 v6, 0xffff000013002; GFX9-NEXT: v_and_or_b32 v2, v2, v6, v013003; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v513004; GFX9-NEXT: v_and_or_b32 v1, v1, v6, v013005; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v413006; GFX9-NEXT: v_and_or_b32 v0, v3, v6, v013007; GFX9-NEXT: s_setpc_b64 s[30:31]13008; GFX9-NEXT: .LBB53_3:13009; GFX9-NEXT: s_branch .LBB53_213010; GFX9-NEXT: .LBB53_4:13011; GFX9-NEXT: v_mov_b32_e32 v0, s1613012; GFX9-NEXT: v_mov_b32_e32 v1, s1713013; GFX9-NEXT: v_mov_b32_e32 v2, s1813014; GFX9-NEXT: v_mov_b32_e32 v3, s1913015; GFX9-NEXT: s_setpc_b64 s[30:31]13016;13017; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v6i16_scalar:13018; GFX11-TRUE16: ; %bb.0:13019; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13020; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 013021; GFX11-TRUE16-NEXT: s_mov_b32 s4, 013022; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB53_313023; GFX11-TRUE16-NEXT: ; %bb.1: ; %Flow13024; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s413025; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB53_413026; GFX11-TRUE16-NEXT: .LBB53_2: ; %cmp.true13027; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s013028; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 1613029; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s313030; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s113031; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 1613032; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s013033; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s113034; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 113035; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s313036; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s213037; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 113038; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v513039; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v013040; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 1613041; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v3, 16, 113042; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s213043; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v113044; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v013045; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v213046; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v013047; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v113048; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v313049; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v413050; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 113051; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo13052; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v113053; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v5, 16, 113054; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s013055; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v613056; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v4, v9 :: v_dual_add_nc_u32 v9, v10, v613057; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v513058; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v313059; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)13060; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.h13061; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v913062; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v2, v513063; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v713064; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v8, 16, 113065; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)13066; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v813067; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v713068; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v113069; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)13070; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v1, v11, vcc_lo13071; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v613072; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v813073; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v9, v12, vcc_lo13074; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v313075; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v10, vcc_lo13076; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v813077; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v5.h13078; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v7, v11, vcc_lo13079; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v6.h13080; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]13081; GFX11-TRUE16-NEXT: .LBB53_3:13082; GFX11-TRUE16-NEXT: s_branch .LBB53_213083; GFX11-TRUE16-NEXT: .LBB53_4:13084; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s113085; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s313086; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]13087;13088; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v6i16_scalar:13089; GFX11-FAKE16: ; %bb.0:13090; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13091; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 013092; GFX11-FAKE16-NEXT: s_mov_b32 s4, 013093; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB53_313094; GFX11-FAKE16-NEXT: ; %bb.1: ; %Flow13095; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s413096; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB53_413097; GFX11-FAKE16-NEXT: .LBB53_2: ; %cmp.true13098; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s013099; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 1613100; GFX11-FAKE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s313101; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s013102; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s113103; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 1613104; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s313105; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 113106; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v1, 16, 113107; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v113108; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s0, 0, s213109; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 1613110; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s113111; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v4, v113112; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s213113; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v3, 16, 113114; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v013115; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v013116; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v413117; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v013118; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v6, 16, 113119; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v513120; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v613121; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)13122; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v213123; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v0, v2, v8 :: v_dual_add_nc_u32 v7, v7, v313124; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v5, 16, 113125; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v113126; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s013127; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)13128; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v1, v4, v9 :: v_dual_add_nc_u32 v4, 0x7fff, v713129; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v10, v613130; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v313131; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v513132; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v8, 16, 113133; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v513134; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v913135; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)13136; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v213137; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v2, v2, v11 :: v_dual_add_nc_u32 v7, v7, v813138; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v613139; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)13140; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v713141; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v813142; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v9, v12, vcc_lo13143; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v313144; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v4, v10, vcc_lo13145; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v813146; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v5, v7, vcc_lo13147; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v613148; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v213149; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v113150; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)13151; GFX11-FAKE16-NEXT: v_and_or_b32 v2, 0xffff0000, v4, v513152; GFX11-FAKE16-NEXT: v_and_or_b32 v1, 0xffff0000, v3, v613153; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)13154; GFX11-FAKE16-NEXT: v_and_or_b32 v0, 0xffff0000, v0, v713155; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]13156; GFX11-FAKE16-NEXT: .LBB53_3:13157; GFX11-FAKE16-NEXT: s_branch .LBB53_213158; GFX11-FAKE16-NEXT: .LBB53_4:13159; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s113160; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s313161; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]13162 %cmp = icmp eq i32 %b, 013163 br i1 %cmp, label %cmp.true, label %cmp.false13164 13165cmp.true:13166 %a1 = fadd <6 x bfloat> %a, splat (bfloat 0xR40C0)13167 %a2 = bitcast <6 x bfloat> %a1 to <6 x i16>13168 br label %end13169 13170cmp.false:13171 %a3 = bitcast <6 x bfloat> %a to <6 x i16>13172 br label %end13173 13174end:13175 %phi = phi <6 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]13176 ret <6 x i16> %phi13177}13178 13179define <6 x bfloat> @bitcast_v6i16_to_v6bf16(<6 x i16> %a, i32 %b) {13180; SI-LABEL: bitcast_v6i16_to_v6bf16:13181; SI: ; %bb.0:13182; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13183; SI-NEXT: v_mov_b32_e32 v9, v413184; SI-NEXT: v_mov_b32_e32 v7, v213185; SI-NEXT: v_mov_b32_e32 v8, v013186; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v613187; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v113188; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v313189; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v513190; SI-NEXT: ; implicit-def: $vgpr013191; SI-NEXT: ; implicit-def: $vgpr213192; SI-NEXT: ; implicit-def: $vgpr413193; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc13194; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]13195; SI-NEXT: s_cbranch_execnz .LBB54_313196; SI-NEXT: ; %bb.1: ; %Flow13197; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]13198; SI-NEXT: s_cbranch_execnz .LBB54_413199; SI-NEXT: .LBB54_2: ; %end13200; SI-NEXT: s_or_b64 exec, exec, s[4:5]13201; SI-NEXT: s_setpc_b64 s[30:31]13202; SI-NEXT: .LBB54_3: ; %cmp.false13203; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v813204; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v713205; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v913206; SI-NEXT: ; implicit-def: $vgpr913207; SI-NEXT: ; implicit-def: $vgpr713208; SI-NEXT: ; implicit-def: $vgpr813209; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]13210; SI-NEXT: s_cbranch_execz .LBB54_213211; SI-NEXT: .LBB54_4: ; %cmp.true13212; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v913213; SI-NEXT: v_and_b32_e32 v0, 0xffff, v013214; SI-NEXT: v_or_b32_e32 v0, v5, v013215; SI-NEXT: v_add_i32_e32 v4, vcc, 0x30000, v013216; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v713217; SI-NEXT: v_and_b32_e32 v0, 0xffff, v013218; SI-NEXT: v_or_b32_e32 v0, v3, v013219; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v013220; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v813221; SI-NEXT: v_and_b32_e32 v0, 0xffff, v013222; SI-NEXT: v_or_b32_e32 v0, v1, v013223; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v013224; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v013225; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v013226; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v213227; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v213228; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v413229; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v413230; SI-NEXT: s_or_b64 exec, exec, s[4:5]13231; SI-NEXT: s_setpc_b64 s[30:31]13232;13233; VI-LABEL: bitcast_v6i16_to_v6bf16:13234; VI: ; %bb.0:13235; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13236; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v313237; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc13238; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]13239; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]13240; VI-NEXT: s_cbranch_execz .LBB54_213241; VI-NEXT: ; %bb.1: ; %cmp.true13242; VI-NEXT: v_mov_b32_e32 v3, 313243; VI-NEXT: v_add_u16_sdwa v4, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD13244; VI-NEXT: v_add_u16_sdwa v5, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD13245; VI-NEXT: v_add_u16_sdwa v3, v2, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD13246; VI-NEXT: v_add_u16_e32 v2, 3, v213247; VI-NEXT: v_add_u16_e32 v1, 3, v113248; VI-NEXT: v_add_u16_e32 v0, 3, v013249; VI-NEXT: v_or_b32_e32 v2, v2, v313250; VI-NEXT: v_or_b32_e32 v1, v1, v513251; VI-NEXT: v_or_b32_e32 v0, v0, v413252; VI-NEXT: .LBB54_2: ; %end13253; VI-NEXT: s_or_b64 exec, exec, s[4:5]13254; VI-NEXT: s_setpc_b64 s[30:31]13255;13256; GFX9-LABEL: bitcast_v6i16_to_v6bf16:13257; GFX9: ; %bb.0:13258; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13259; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v313260; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc13261; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]13262; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]13263; GFX9-NEXT: ; %bb.1: ; %cmp.true13264; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]13265; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]13266; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]13267; GFX9-NEXT: ; %bb.2: ; %end13268; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]13269; GFX9-NEXT: s_setpc_b64 s[30:31]13270;13271; GFX11-LABEL: bitcast_v6i16_to_v6bf16:13272; GFX11: ; %bb.0:13273; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13274; GFX11-NEXT: s_mov_b32 s0, exec_lo13275; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v313276; GFX11-NEXT: s_xor_b32 s0, exec_lo, s013277; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)13278; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s013279; GFX11-NEXT: ; %bb.1: ; %cmp.true13280; GFX11-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]13281; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]13282; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]13283; GFX11-NEXT: ; %bb.2: ; %end13284; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s013285; GFX11-NEXT: s_setpc_b64 s[30:31]13286 %cmp = icmp eq i32 %b, 013287 br i1 %cmp, label %cmp.true, label %cmp.false13288 13289cmp.true:13290 %a1 = add <6 x i16> %a, splat (i16 3)13291 %a2 = bitcast <6 x i16> %a1 to <6 x bfloat>13292 br label %end13293 13294cmp.false:13295 %a3 = bitcast <6 x i16> %a to <6 x bfloat>13296 br label %end13297 13298end:13299 %phi = phi <6 x bfloat> [ %a2, %cmp.true ], [ %a3, %cmp.false ]13300 ret <6 x bfloat> %phi13301}13302 13303define inreg <6 x bfloat> @bitcast_v6i16_to_v6bf16_scalar(<6 x i16> inreg %a, i32 inreg %b) {13304; SI-LABEL: bitcast_v6i16_to_v6bf16_scalar:13305; SI: ; %bb.0:13306; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13307; SI-NEXT: s_cmp_lg_u32 s22, 013308; SI-NEXT: s_cbranch_scc0 .LBB55_413309; SI-NEXT: ; %bb.1: ; %cmp.false13310; SI-NEXT: s_lshl_b32 s6, s16, 1613311; SI-NEXT: s_lshl_b32 s7, s17, 1613312; SI-NEXT: s_lshl_b32 s8, s18, 1613313; SI-NEXT: s_lshl_b32 s9, s19, 1613314; SI-NEXT: s_lshl_b32 s11, s20, 1613315; SI-NEXT: s_lshl_b32 s10, s21, 1613316; SI-NEXT: s_cbranch_execnz .LBB55_313317; SI-NEXT: .LBB55_2: ; %cmp.true13318; SI-NEXT: s_add_i32 s20, s20, 313319; SI-NEXT: s_and_b32 s4, s20, 0xffff13320; SI-NEXT: s_lshl_b32 s5, s21, 1613321; SI-NEXT: s_add_i32 s18, s18, 313322; SI-NEXT: s_or_b32 s4, s5, s413323; SI-NEXT: s_and_b32 s5, s18, 0xffff13324; SI-NEXT: s_lshl_b32 s6, s19, 1613325; SI-NEXT: s_add_i32 s16, s16, 313326; SI-NEXT: s_or_b32 s5, s6, s513327; SI-NEXT: s_and_b32 s6, s16, 0xffff13328; SI-NEXT: s_lshl_b32 s7, s17, 1613329; SI-NEXT: s_or_b32 s6, s7, s613330; SI-NEXT: s_add_i32 s4, s4, 0x3000013331; SI-NEXT: s_add_i32 s5, s5, 0x3000013332; SI-NEXT: s_add_i32 s6, s6, 0x3000013333; SI-NEXT: s_and_b32 s7, s6, 0xffff000013334; SI-NEXT: s_lshl_b32 s6, s6, 1613335; SI-NEXT: s_and_b32 s9, s5, 0xffff000013336; SI-NEXT: s_lshl_b32 s8, s5, 1613337; SI-NEXT: s_and_b32 s10, s4, 0xffff000013338; SI-NEXT: s_lshl_b32 s11, s4, 1613339; SI-NEXT: .LBB55_3: ; %end13340; SI-NEXT: v_mov_b32_e32 v0, s613341; SI-NEXT: v_mov_b32_e32 v1, s713342; SI-NEXT: v_mov_b32_e32 v2, s813343; SI-NEXT: v_mov_b32_e32 v3, s913344; SI-NEXT: v_mov_b32_e32 v4, s1113345; SI-NEXT: v_mov_b32_e32 v5, s1013346; SI-NEXT: s_setpc_b64 s[30:31]13347; SI-NEXT: .LBB55_4:13348; SI-NEXT: ; implicit-def: $sgpr613349; SI-NEXT: ; implicit-def: $sgpr713350; SI-NEXT: ; implicit-def: $sgpr813351; SI-NEXT: ; implicit-def: $sgpr913352; SI-NEXT: ; implicit-def: $sgpr1113353; SI-NEXT: ; implicit-def: $sgpr1013354; SI-NEXT: s_branch .LBB55_213355;13356; VI-LABEL: bitcast_v6i16_to_v6bf16_scalar:13357; VI: ; %bb.0:13358; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13359; VI-NEXT: s_cmp_lg_u32 s19, 013360; VI-NEXT: s_cbranch_scc0 .LBB55_413361; VI-NEXT: ; %bb.1: ; %cmp.false13362; VI-NEXT: s_cbranch_execnz .LBB55_313363; VI-NEXT: .LBB55_2: ; %cmp.true13364; VI-NEXT: s_add_i32 s5, s16, 313365; VI-NEXT: s_add_i32 s7, s17, 313366; VI-NEXT: s_add_i32 s9, s18, 313367; VI-NEXT: s_and_b32 s4, s16, 0xffff000013368; VI-NEXT: s_and_b32 s6, s17, 0xffff000013369; VI-NEXT: s_and_b32 s8, s18, 0xffff000013370; VI-NEXT: s_and_b32 s9, s9, 0xffff13371; VI-NEXT: s_and_b32 s7, s7, 0xffff13372; VI-NEXT: s_and_b32 s5, s5, 0xffff13373; VI-NEXT: s_or_b32 s8, s8, s913374; VI-NEXT: s_or_b32 s6, s6, s713375; VI-NEXT: s_or_b32 s4, s4, s513376; VI-NEXT: s_add_i32 s18, s8, 0x3000013377; VI-NEXT: s_add_i32 s17, s6, 0x3000013378; VI-NEXT: s_add_i32 s16, s4, 0x3000013379; VI-NEXT: .LBB55_3: ; %end13380; VI-NEXT: v_mov_b32_e32 v0, s1613381; VI-NEXT: v_mov_b32_e32 v1, s1713382; VI-NEXT: v_mov_b32_e32 v2, s1813383; VI-NEXT: s_setpc_b64 s[30:31]13384; VI-NEXT: .LBB55_4:13385; VI-NEXT: s_branch .LBB55_213386;13387; GFX9-LABEL: bitcast_v6i16_to_v6bf16_scalar:13388; GFX9: ; %bb.0:13389; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13390; GFX9-NEXT: s_cmp_lg_u32 s19, 013391; GFX9-NEXT: s_cbranch_scc0 .LBB55_313392; GFX9-NEXT: ; %bb.1: ; %cmp.false13393; GFX9-NEXT: s_cbranch_execnz .LBB55_413394; GFX9-NEXT: .LBB55_2: ; %cmp.true13395; GFX9-NEXT: v_pk_add_u16 v2, s18, 3 op_sel_hi:[1,0]13396; GFX9-NEXT: v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]13397; GFX9-NEXT: v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]13398; GFX9-NEXT: s_setpc_b64 s[30:31]13399; GFX9-NEXT: .LBB55_3:13400; GFX9-NEXT: s_branch .LBB55_213401; GFX9-NEXT: .LBB55_4:13402; GFX9-NEXT: v_mov_b32_e32 v0, s1613403; GFX9-NEXT: v_mov_b32_e32 v1, s1713404; GFX9-NEXT: v_mov_b32_e32 v2, s1813405; GFX9-NEXT: v_mov_b32_e32 v3, s1913406; GFX9-NEXT: s_setpc_b64 s[30:31]13407;13408; GFX11-LABEL: bitcast_v6i16_to_v6bf16_scalar:13409; GFX11: ; %bb.0:13410; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13411; GFX11-NEXT: s_cmp_lg_u32 s3, 013412; GFX11-NEXT: s_mov_b32 s4, 013413; GFX11-NEXT: s_cbranch_scc0 .LBB55_313414; GFX11-NEXT: ; %bb.1: ; %Flow13415; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s413416; GFX11-NEXT: s_cbranch_vccnz .LBB55_413417; GFX11-NEXT: .LBB55_2: ; %cmp.true13418; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]13419; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]13420; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]13421; GFX11-NEXT: s_setpc_b64 s[30:31]13422; GFX11-NEXT: .LBB55_3:13423; GFX11-NEXT: s_branch .LBB55_213424; GFX11-NEXT: .LBB55_4:13425; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s113426; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s313427; GFX11-NEXT: s_setpc_b64 s[30:31]13428 %cmp = icmp eq i32 %b, 013429 br i1 %cmp, label %cmp.true, label %cmp.false13430 13431cmp.true:13432 %a1 = add <6 x i16> %a, splat (i16 3)13433 %a2 = bitcast <6 x i16> %a1 to <6 x bfloat>13434 br label %end13435 13436cmp.false:13437 %a3 = bitcast <6 x i16> %a to <6 x bfloat>13438 br label %end13439 13440end:13441 %phi = phi <6 x bfloat> [ %a2, %cmp.true ], [ %a3, %cmp.false ]13442 ret <6 x bfloat> %phi13443}13444 13445define <6 x i16> @bitcast_v6f16_to_v6i16(<6 x half> %a, i32 %b) {13446; SI-LABEL: bitcast_v6f16_to_v6i16:13447; SI: ; %bb.0:13448; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13449; SI-NEXT: v_cvt_f16_f32_e32 v0, v013450; SI-NEXT: v_cvt_f16_f32_e32 v1, v113451; SI-NEXT: v_cvt_f16_f32_e32 v2, v213452; SI-NEXT: v_cvt_f16_f32_e32 v3, v313453; SI-NEXT: v_cvt_f16_f32_e32 v4, v413454; SI-NEXT: v_cvt_f16_f32_e32 v5, v513455; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v613456; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc13457; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]13458; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]13459; SI-NEXT: s_cbranch_execz .LBB56_213460; SI-NEXT: ; %bb.1: ; %cmp.true13461; SI-NEXT: v_cvt_f32_f16_e32 v5, v513462; SI-NEXT: v_cvt_f32_f16_e32 v4, v413463; SI-NEXT: v_cvt_f32_f16_e32 v3, v313464; SI-NEXT: v_cvt_f32_f16_e32 v1, v113465; SI-NEXT: v_cvt_f32_f16_e32 v2, v213466; SI-NEXT: v_cvt_f32_f16_e32 v0, v013467; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v513468; SI-NEXT: v_cvt_f16_f32_e32 v5, v513469; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v413470; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v313471; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v113472; SI-NEXT: v_cvt_f16_f32_e32 v4, v413473; SI-NEXT: v_cvt_f16_f32_e32 v3, v313474; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v213475; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v013476; SI-NEXT: v_cvt_f16_f32_e32 v1, v113477; SI-NEXT: v_cvt_f16_f32_e32 v2, v213478; SI-NEXT: v_cvt_f16_f32_e32 v0, v013479; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v513480; SI-NEXT: v_or_b32_e32 v4, v4, v613481; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v313482; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v113483; SI-NEXT: v_or_b32_e32 v2, v2, v613484; SI-NEXT: v_or_b32_e32 v0, v0, v113485; SI-NEXT: v_alignbit_b32 v1, v2, v1, 1613486; SI-NEXT: .LBB56_2: ; %end13487; SI-NEXT: s_or_b64 exec, exec, s[4:5]13488; SI-NEXT: s_setpc_b64 s[30:31]13489;13490; VI-LABEL: bitcast_v6f16_to_v6i16:13491; VI: ; %bb.0:13492; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13493; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v313494; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc13495; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]13496; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]13497; VI-NEXT: s_cbranch_execz .LBB56_213498; VI-NEXT: ; %bb.1: ; %cmp.true13499; VI-NEXT: v_mov_b32_e32 v4, 0x20013500; VI-NEXT: v_add_f16_e32 v3, 0x200, v013501; VI-NEXT: v_add_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD13502; VI-NEXT: v_add_f16_e32 v5, 0x200, v113503; VI-NEXT: v_add_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD13504; VI-NEXT: v_add_f16_e32 v6, 0x200, v213505; VI-NEXT: v_add_f16_sdwa v2, v2, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD13506; VI-NEXT: v_or_b32_e32 v2, v6, v213507; VI-NEXT: v_or_b32_e32 v1, v5, v113508; VI-NEXT: v_or_b32_e32 v0, v3, v013509; VI-NEXT: .LBB56_2: ; %end13510; VI-NEXT: s_or_b64 exec, exec, s[4:5]13511; VI-NEXT: s_setpc_b64 s[30:31]13512;13513; GFX9-LABEL: bitcast_v6f16_to_v6i16:13514; GFX9: ; %bb.0:13515; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13516; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v313517; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc13518; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]13519; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]13520; GFX9-NEXT: ; %bb.1: ; %cmp.true13521; GFX9-NEXT: s_movk_i32 s6, 0x20013522; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0]13523; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0]13524; GFX9-NEXT: v_pk_add_f16 v0, v0, s6 op_sel_hi:[1,0]13525; GFX9-NEXT: ; %bb.2: ; %end13526; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]13527; GFX9-NEXT: s_setpc_b64 s[30:31]13528;13529; GFX11-LABEL: bitcast_v6f16_to_v6i16:13530; GFX11: ; %bb.0:13531; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13532; GFX11-NEXT: s_mov_b32 s0, exec_lo13533; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v313534; GFX11-NEXT: s_xor_b32 s0, exec_lo, s013535; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)13536; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s013537; GFX11-NEXT: ; %bb.1: ; %cmp.true13538; GFX11-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]13539; GFX11-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]13540; GFX11-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]13541; GFX11-NEXT: ; %bb.2: ; %end13542; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s013543; GFX11-NEXT: s_setpc_b64 s[30:31]13544 %cmp = icmp eq i32 %b, 013545 br i1 %cmp, label %cmp.true, label %cmp.false13546 13547cmp.true:13548 %a1 = fadd <6 x half> %a, splat (half 0xH0200)13549 %a2 = bitcast <6 x half> %a1 to <6 x i16>13550 br label %end13551 13552cmp.false:13553 %a3 = bitcast <6 x half> %a to <6 x i16>13554 br label %end13555 13556end:13557 %phi = phi <6 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]13558 ret <6 x i16> %phi13559}13560 13561define inreg <6 x i16> @bitcast_v6f16_to_v6i16_scalar(<6 x half> inreg %a, i32 inreg %b) {13562; SI-LABEL: bitcast_v6f16_to_v6i16_scalar:13563; SI: ; %bb.0:13564; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13565; SI-NEXT: v_cvt_f16_f32_e32 v0, s1613566; SI-NEXT: v_cvt_f16_f32_e32 v6, s1713567; SI-NEXT: v_cvt_f16_f32_e32 v2, s1813568; SI-NEXT: v_cvt_f16_f32_e32 v3, s1913569; SI-NEXT: v_cvt_f16_f32_e32 v4, s2013570; SI-NEXT: v_cvt_f16_f32_e32 v5, s2113571; SI-NEXT: s_cmp_lg_u32 s22, 013572; SI-NEXT: s_cbranch_scc0 .LBB57_413573; SI-NEXT: ; %bb.1: ; %cmp.false13574; SI-NEXT: s_cbranch_execnz .LBB57_313575; SI-NEXT: .LBB57_2: ; %cmp.true13576; SI-NEXT: v_cvt_f32_f16_e32 v3, v313577; SI-NEXT: v_cvt_f32_f16_e32 v1, v613578; SI-NEXT: v_cvt_f32_f16_e32 v2, v213579; SI-NEXT: v_cvt_f32_f16_e32 v5, v513580; SI-NEXT: v_cvt_f32_f16_e32 v0, v013581; SI-NEXT: v_cvt_f32_f16_e32 v4, v413582; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v313583; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v113584; SI-NEXT: v_cvt_f16_f32_e32 v3, v313585; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v213586; SI-NEXT: v_cvt_f16_f32_e32 v1, v113587; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v513588; SI-NEXT: v_cvt_f16_f32_e32 v2, v213589; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v013590; SI-NEXT: v_cvt_f16_f32_e32 v5, v513591; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v413592; SI-NEXT: v_cvt_f16_f32_e32 v0, v013593; SI-NEXT: v_cvt_f16_f32_e32 v4, v413594; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v313595; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v113596; SI-NEXT: v_or_b32_e32 v2, v2, v613597; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v513598; SI-NEXT: v_lshr_b64 v[6:7], v[1:2], 1613599; SI-NEXT: v_or_b32_e32 v0, v0, v113600; SI-NEXT: v_or_b32_e32 v4, v4, v813601; SI-NEXT: .LBB57_3: ; %end13602; SI-NEXT: v_mov_b32_e32 v1, v613603; SI-NEXT: s_setpc_b64 s[30:31]13604; SI-NEXT: .LBB57_4:13605; SI-NEXT: s_branch .LBB57_213606;13607; VI-LABEL: bitcast_v6f16_to_v6i16_scalar:13608; VI: ; %bb.0:13609; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13610; VI-NEXT: s_cmp_lg_u32 s19, 013611; VI-NEXT: s_cbranch_scc0 .LBB57_313612; VI-NEXT: ; %bb.1: ; %cmp.false13613; VI-NEXT: s_cbranch_execnz .LBB57_413614; VI-NEXT: .LBB57_2: ; %cmp.true13615; VI-NEXT: s_lshr_b32 s4, s16, 1613616; VI-NEXT: v_mov_b32_e32 v1, s413617; VI-NEXT: s_lshr_b32 s4, s17, 1613618; VI-NEXT: v_mov_b32_e32 v2, s413619; VI-NEXT: s_lshr_b32 s4, s18, 1613620; VI-NEXT: v_mov_b32_e32 v0, 0x20013621; VI-NEXT: v_mov_b32_e32 v6, s413622; VI-NEXT: v_add_f16_e32 v3, s16, v013623; VI-NEXT: v_add_f16_sdwa v4, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD13624; VI-NEXT: v_add_f16_e32 v1, s17, v013625; VI-NEXT: v_add_f16_sdwa v5, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD13626; VI-NEXT: v_add_f16_e32 v2, s18, v013627; VI-NEXT: v_add_f16_sdwa v0, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD13628; VI-NEXT: v_or_b32_e32 v2, v2, v013629; VI-NEXT: v_or_b32_e32 v1, v1, v513630; VI-NEXT: v_or_b32_e32 v0, v3, v413631; VI-NEXT: s_setpc_b64 s[30:31]13632; VI-NEXT: .LBB57_3:13633; VI-NEXT: s_branch .LBB57_213634; VI-NEXT: .LBB57_4:13635; VI-NEXT: v_mov_b32_e32 v0, s1613636; VI-NEXT: v_mov_b32_e32 v1, s1713637; VI-NEXT: v_mov_b32_e32 v2, s1813638; VI-NEXT: v_mov_b32_e32 v3, s1913639; VI-NEXT: s_setpc_b64 s[30:31]13640;13641; GFX9-LABEL: bitcast_v6f16_to_v6i16_scalar:13642; GFX9: ; %bb.0:13643; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13644; GFX9-NEXT: s_cmp_lg_u32 s19, 013645; GFX9-NEXT: s_cbranch_scc0 .LBB57_313646; GFX9-NEXT: ; %bb.1: ; %cmp.false13647; GFX9-NEXT: s_cbranch_execnz .LBB57_413648; GFX9-NEXT: .LBB57_2: ; %cmp.true13649; GFX9-NEXT: v_mov_b32_e32 v0, 0x20013650; GFX9-NEXT: v_pk_add_f16 v2, s18, v0 op_sel_hi:[1,0]13651; GFX9-NEXT: v_pk_add_f16 v1, s17, v0 op_sel_hi:[1,0]13652; GFX9-NEXT: v_pk_add_f16 v0, s16, v0 op_sel_hi:[1,0]13653; GFX9-NEXT: s_setpc_b64 s[30:31]13654; GFX9-NEXT: .LBB57_3:13655; GFX9-NEXT: s_branch .LBB57_213656; GFX9-NEXT: .LBB57_4:13657; GFX9-NEXT: v_mov_b32_e32 v0, s1613658; GFX9-NEXT: v_mov_b32_e32 v1, s1713659; GFX9-NEXT: v_mov_b32_e32 v2, s1813660; GFX9-NEXT: v_mov_b32_e32 v3, s1913661; GFX9-NEXT: s_setpc_b64 s[30:31]13662;13663; GFX11-LABEL: bitcast_v6f16_to_v6i16_scalar:13664; GFX11: ; %bb.0:13665; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13666; GFX11-NEXT: s_cmp_lg_u32 s3, 013667; GFX11-NEXT: s_mov_b32 s4, 013668; GFX11-NEXT: s_cbranch_scc0 .LBB57_313669; GFX11-NEXT: ; %bb.1: ; %Flow13670; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s413671; GFX11-NEXT: s_cbranch_vccnz .LBB57_413672; GFX11-NEXT: .LBB57_2: ; %cmp.true13673; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]13674; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]13675; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]13676; GFX11-NEXT: s_setpc_b64 s[30:31]13677; GFX11-NEXT: .LBB57_3:13678; GFX11-NEXT: s_branch .LBB57_213679; GFX11-NEXT: .LBB57_4:13680; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s113681; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s313682; GFX11-NEXT: s_setpc_b64 s[30:31]13683 %cmp = icmp eq i32 %b, 013684 br i1 %cmp, label %cmp.true, label %cmp.false13685 13686cmp.true:13687 %a1 = fadd <6 x half> %a, splat (half 0xH0200)13688 %a2 = bitcast <6 x half> %a1 to <6 x i16>13689 br label %end13690 13691cmp.false:13692 %a3 = bitcast <6 x half> %a to <6 x i16>13693 br label %end13694 13695end:13696 %phi = phi <6 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]13697 ret <6 x i16> %phi13698}13699 13700define <6 x half> @bitcast_v6i16_to_v6f16(<6 x i16> %a, i32 %b) {13701; SI-LABEL: bitcast_v6i16_to_v6f16:13702; SI: ; %bb.0:13703; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13704; SI-NEXT: v_mov_b32_e32 v12, v513705; SI-NEXT: v_mov_b32_e32 v7, v413706; SI-NEXT: v_mov_b32_e32 v8, v313707; SI-NEXT: v_mov_b32_e32 v9, v213708; SI-NEXT: v_mov_b32_e32 v10, v113709; SI-NEXT: v_mov_b32_e32 v11, v013710; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v613711; SI-NEXT: ; implicit-def: $vgpr013712; SI-NEXT: ; implicit-def: $vgpr113713; SI-NEXT: ; implicit-def: $vgpr213714; SI-NEXT: ; implicit-def: $vgpr313715; SI-NEXT: ; implicit-def: $vgpr413716; SI-NEXT: ; implicit-def: $vgpr513717; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc13718; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]13719; SI-NEXT: s_cbranch_execnz .LBB58_313720; SI-NEXT: ; %bb.1: ; %Flow13721; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]13722; SI-NEXT: s_cbranch_execnz .LBB58_413723; SI-NEXT: .LBB58_2: ; %end13724; SI-NEXT: s_or_b64 exec, exec, s[4:5]13725; SI-NEXT: s_setpc_b64 s[30:31]13726; SI-NEXT: .LBB58_3: ; %cmp.false13727; SI-NEXT: v_cvt_f32_f16_e32 v0, v1113728; SI-NEXT: v_cvt_f32_f16_e32 v1, v1013729; SI-NEXT: v_cvt_f32_f16_e32 v2, v913730; SI-NEXT: v_cvt_f32_f16_e32 v3, v813731; SI-NEXT: v_cvt_f32_f16_e32 v4, v713732; SI-NEXT: v_cvt_f32_f16_e32 v5, v1213733; SI-NEXT: ; implicit-def: $vgpr1213734; SI-NEXT: ; implicit-def: $vgpr713735; SI-NEXT: ; implicit-def: $vgpr813736; SI-NEXT: ; implicit-def: $vgpr913737; SI-NEXT: ; implicit-def: $vgpr1013738; SI-NEXT: ; implicit-def: $vgpr1113739; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]13740; SI-NEXT: s_cbranch_execz .LBB58_213741; SI-NEXT: .LBB58_4: ; %cmp.true13742; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v1213743; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v713744; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v813745; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v913746; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1013747; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1113748; SI-NEXT: v_cvt_f32_f16_e32 v0, v013749; SI-NEXT: v_cvt_f32_f16_e32 v1, v113750; SI-NEXT: v_cvt_f32_f16_e32 v2, v213751; SI-NEXT: v_cvt_f32_f16_e32 v3, v313752; SI-NEXT: v_cvt_f32_f16_e32 v4, v413753; SI-NEXT: v_cvt_f32_f16_e32 v5, v513754; SI-NEXT: s_or_b64 exec, exec, s[4:5]13755; SI-NEXT: s_setpc_b64 s[30:31]13756;13757; VI-LABEL: bitcast_v6i16_to_v6f16:13758; VI: ; %bb.0:13759; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13760; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v313761; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc13762; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]13763; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]13764; VI-NEXT: s_cbranch_execz .LBB58_213765; VI-NEXT: ; %bb.1: ; %cmp.true13766; VI-NEXT: v_mov_b32_e32 v3, 313767; VI-NEXT: v_add_u16_sdwa v4, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD13768; VI-NEXT: v_add_u16_sdwa v5, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD13769; VI-NEXT: v_add_u16_sdwa v3, v2, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD13770; VI-NEXT: v_add_u16_e32 v2, 3, v213771; VI-NEXT: v_add_u16_e32 v1, 3, v113772; VI-NEXT: v_add_u16_e32 v0, 3, v013773; VI-NEXT: v_or_b32_e32 v2, v2, v313774; VI-NEXT: v_or_b32_e32 v1, v1, v513775; VI-NEXT: v_or_b32_e32 v0, v0, v413776; VI-NEXT: .LBB58_2: ; %end13777; VI-NEXT: s_or_b64 exec, exec, s[4:5]13778; VI-NEXT: s_setpc_b64 s[30:31]13779;13780; GFX9-LABEL: bitcast_v6i16_to_v6f16:13781; GFX9: ; %bb.0:13782; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13783; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v313784; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc13785; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]13786; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]13787; GFX9-NEXT: ; %bb.1: ; %cmp.true13788; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]13789; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]13790; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]13791; GFX9-NEXT: ; %bb.2: ; %end13792; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]13793; GFX9-NEXT: s_setpc_b64 s[30:31]13794;13795; GFX11-LABEL: bitcast_v6i16_to_v6f16:13796; GFX11: ; %bb.0:13797; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13798; GFX11-NEXT: s_mov_b32 s0, exec_lo13799; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v313800; GFX11-NEXT: s_xor_b32 s0, exec_lo, s013801; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)13802; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s013803; GFX11-NEXT: ; %bb.1: ; %cmp.true13804; GFX11-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]13805; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]13806; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]13807; GFX11-NEXT: ; %bb.2: ; %end13808; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s013809; GFX11-NEXT: s_setpc_b64 s[30:31]13810 %cmp = icmp eq i32 %b, 013811 br i1 %cmp, label %cmp.true, label %cmp.false13812 13813cmp.true:13814 %a1 = add <6 x i16> %a, splat (i16 3)13815 %a2 = bitcast <6 x i16> %a1 to <6 x half>13816 br label %end13817 13818cmp.false:13819 %a3 = bitcast <6 x i16> %a to <6 x half>13820 br label %end13821 13822end:13823 %phi = phi <6 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]13824 ret <6 x half> %phi13825}13826 13827define inreg <6 x half> @bitcast_v6i16_to_v6f16_scalar(<6 x i16> inreg %a, i32 inreg %b) {13828; SI-LABEL: bitcast_v6i16_to_v6f16_scalar:13829; SI: ; %bb.0:13830; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13831; SI-NEXT: s_cmp_lg_u32 s22, 013832; SI-NEXT: s_cbranch_scc0 .LBB59_413833; SI-NEXT: ; %bb.1: ; %cmp.false13834; SI-NEXT: v_cvt_f32_f16_e32 v0, s1613835; SI-NEXT: v_cvt_f32_f16_e32 v1, s1713836; SI-NEXT: v_cvt_f32_f16_e32 v2, s1813837; SI-NEXT: v_cvt_f32_f16_e32 v3, s1913838; SI-NEXT: v_cvt_f32_f16_e32 v4, s2013839; SI-NEXT: v_cvt_f32_f16_e32 v5, s2113840; SI-NEXT: s_cbranch_execnz .LBB59_313841; SI-NEXT: .LBB59_2: ; %cmp.true13842; SI-NEXT: s_add_i32 s21, s21, 313843; SI-NEXT: s_add_i32 s20, s20, 313844; SI-NEXT: s_add_i32 s19, s19, 313845; SI-NEXT: s_add_i32 s18, s18, 313846; SI-NEXT: s_add_i32 s17, s17, 313847; SI-NEXT: s_add_i32 s16, s16, 313848; SI-NEXT: v_cvt_f32_f16_e32 v0, s1613849; SI-NEXT: v_cvt_f32_f16_e32 v1, s1713850; SI-NEXT: v_cvt_f32_f16_e32 v2, s1813851; SI-NEXT: v_cvt_f32_f16_e32 v3, s1913852; SI-NEXT: v_cvt_f32_f16_e32 v4, s2013853; SI-NEXT: v_cvt_f32_f16_e32 v5, s2113854; SI-NEXT: .LBB59_3: ; %end13855; SI-NEXT: s_setpc_b64 s[30:31]13856; SI-NEXT: .LBB59_4:13857; SI-NEXT: ; implicit-def: $vgpr013858; SI-NEXT: ; implicit-def: $vgpr113859; SI-NEXT: ; implicit-def: $vgpr213860; SI-NEXT: ; implicit-def: $vgpr313861; SI-NEXT: ; implicit-def: $vgpr413862; SI-NEXT: ; implicit-def: $vgpr513863; SI-NEXT: s_branch .LBB59_213864;13865; VI-LABEL: bitcast_v6i16_to_v6f16_scalar:13866; VI: ; %bb.0:13867; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13868; VI-NEXT: s_cmp_lg_u32 s19, 013869; VI-NEXT: s_cbranch_scc0 .LBB59_413870; VI-NEXT: ; %bb.1: ; %cmp.false13871; VI-NEXT: s_cbranch_execnz .LBB59_313872; VI-NEXT: .LBB59_2: ; %cmp.true13873; VI-NEXT: s_add_i32 s5, s16, 313874; VI-NEXT: s_add_i32 s7, s17, 313875; VI-NEXT: s_add_i32 s9, s18, 313876; VI-NEXT: s_and_b32 s4, s16, 0xffff000013877; VI-NEXT: s_and_b32 s6, s17, 0xffff000013878; VI-NEXT: s_and_b32 s8, s18, 0xffff000013879; VI-NEXT: s_and_b32 s9, s9, 0xffff13880; VI-NEXT: s_and_b32 s7, s7, 0xffff13881; VI-NEXT: s_and_b32 s5, s5, 0xffff13882; VI-NEXT: s_or_b32 s8, s8, s913883; VI-NEXT: s_or_b32 s6, s6, s713884; VI-NEXT: s_or_b32 s4, s4, s513885; VI-NEXT: s_add_i32 s18, s8, 0x3000013886; VI-NEXT: s_add_i32 s17, s6, 0x3000013887; VI-NEXT: s_add_i32 s16, s4, 0x3000013888; VI-NEXT: .LBB59_3: ; %end13889; VI-NEXT: v_mov_b32_e32 v0, s1613890; VI-NEXT: v_mov_b32_e32 v1, s1713891; VI-NEXT: v_mov_b32_e32 v2, s1813892; VI-NEXT: s_setpc_b64 s[30:31]13893; VI-NEXT: .LBB59_4:13894; VI-NEXT: s_branch .LBB59_213895;13896; GFX9-LABEL: bitcast_v6i16_to_v6f16_scalar:13897; GFX9: ; %bb.0:13898; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13899; GFX9-NEXT: s_cmp_lg_u32 s19, 013900; GFX9-NEXT: s_cbranch_scc0 .LBB59_313901; GFX9-NEXT: ; %bb.1: ; %cmp.false13902; GFX9-NEXT: s_cbranch_execnz .LBB59_413903; GFX9-NEXT: .LBB59_2: ; %cmp.true13904; GFX9-NEXT: v_pk_add_u16 v2, s18, 3 op_sel_hi:[1,0]13905; GFX9-NEXT: v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]13906; GFX9-NEXT: v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]13907; GFX9-NEXT: s_setpc_b64 s[30:31]13908; GFX9-NEXT: .LBB59_3:13909; GFX9-NEXT: s_branch .LBB59_213910; GFX9-NEXT: .LBB59_4:13911; GFX9-NEXT: v_mov_b32_e32 v0, s1613912; GFX9-NEXT: v_mov_b32_e32 v1, s1713913; GFX9-NEXT: v_mov_b32_e32 v2, s1813914; GFX9-NEXT: v_mov_b32_e32 v3, s1913915; GFX9-NEXT: s_setpc_b64 s[30:31]13916;13917; GFX11-LABEL: bitcast_v6i16_to_v6f16_scalar:13918; GFX11: ; %bb.0:13919; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13920; GFX11-NEXT: s_cmp_lg_u32 s3, 013921; GFX11-NEXT: s_mov_b32 s4, 013922; GFX11-NEXT: s_cbranch_scc0 .LBB59_313923; GFX11-NEXT: ; %bb.1: ; %Flow13924; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s413925; GFX11-NEXT: s_cbranch_vccnz .LBB59_413926; GFX11-NEXT: .LBB59_2: ; %cmp.true13927; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]13928; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]13929; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]13930; GFX11-NEXT: s_setpc_b64 s[30:31]13931; GFX11-NEXT: .LBB59_3:13932; GFX11-NEXT: s_branch .LBB59_213933; GFX11-NEXT: .LBB59_4:13934; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s113935; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s313936; GFX11-NEXT: s_setpc_b64 s[30:31]13937 %cmp = icmp eq i32 %b, 013938 br i1 %cmp, label %cmp.true, label %cmp.false13939 13940cmp.true:13941 %a1 = add <6 x i16> %a, splat (i16 3)13942 %a2 = bitcast <6 x i16> %a1 to <6 x half>13943 br label %end13944 13945cmp.false:13946 %a3 = bitcast <6 x i16> %a to <6 x half>13947 br label %end13948 13949end:13950 %phi = phi <6 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]13951 ret <6 x half> %phi13952}13953