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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes='amdgpu-attributor' %s -o - | FileCheck %s3 4%struct.ShaderClosure = type { <3 x float>, i32, float, <3 x float>, [10 x float], [8 x i8] }5%struct.ShaderData = type { <3 x float>, <3 x float>, <3 x float>, <3 x float>, i32, i32, i32, i32, i32, float, float, i32, i32, float, float, %struct.differential3, %struct.differential3, %struct.differential, %struct.differential, <3 x float>, <3 x float>, <3 x float>, %struct.differential3, i32, i32, i32, float, <3 x float>, <3 x float>, <3 x float>, [64 x %struct.ShaderClosure] }6%struct.differential = type { float, float }7%struct.differential3 = type { <3 x float>, <3 x float> }8 9define internal fastcc void @foo(ptr %kg) {10; CHECK-LABEL: define internal fastcc void @foo(11; CHECK-SAME: ptr [[KG:%.*]]) #[[ATTR0:[0-9]+]] {12; CHECK-NEXT: [[ENTRY:.*:]]13; CHECK-NEXT: [[CLOSURE_I25_I:%.*]] = getelementptr i8, ptr [[KG]], i64 33614; CHECK-NEXT: [[NUM_CLOSURE_I26_I:%.*]] = getelementptr i8, ptr [[KG]], i64 27615; CHECK-NEXT: br label %[[WHILE_COND:.*]]16; CHECK: [[WHILE_COND]]:17; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[KG]], align 418; CHECK-NEXT: [[IDXPROM_I:%.*]] = zext i32 [[TMP1]] to i6419; CHECK-NEXT: switch i32 0, label %[[SW_BB92:.*]] [20; CHECK-NEXT: i32 1, label %[[SW_BB92]]21; CHECK-NEXT: i32 0, label %[[SUBD_TRIANGLE_PATCH_EXIT_I_I35:.*]]22; CHECK-NEXT: ]23; CHECK: [[SUBD_TRIANGLE_PATCH_EXIT_I_I35]]:24; CHECK-NEXT: [[ARRAYIDX_I27_I:%.*]] = getelementptr float, ptr [[KG]], i64 [[IDXPROM_I]]25; CHECK-NEXT: store float 0.000000e+00, ptr [[ARRAYIDX_I27_I]], align 426; CHECK-NEXT: br label %[[WHILE_COND]]27; CHECK: [[SW_BB92]]:28; CHECK-NEXT: [[INSERT:%.*]] = insertelement <3 x i32> zeroinitializer, i32 [[TMP1]], i64 029; CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = bitcast <3 x i32> [[INSERT]] to <3 x float>30; CHECK-NEXT: [[SHFL:%.*]] = shufflevector <3 x float> [[SPLAT_SPLATINSERT_I]], <3 x float> zeroinitializer, <4 x i32> zeroinitializer31; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[NUM_CLOSURE_I26_I]], align 432; CHECK-NEXT: [[IDXPROM_I27_I:%.*]] = sext i32 [[LOAD]] to i6433; CHECK-NEXT: [[ARRAYIDX_I28_I:%.*]] = getelementptr [64 x %struct.ShaderClosure], ptr [[CLOSURE_I25_I]], i64 0, i64 [[IDXPROM_I27_I]]34; CHECK-NEXT: store <4 x float> [[SHFL]], ptr [[ARRAYIDX_I28_I]], align 1635; CHECK-NEXT: [[INC_I30_I:%.*]] = or i32 [[LOAD]], 136; CHECK-NEXT: store i32 [[INC_I30_I]], ptr [[NUM_CLOSURE_I26_I]], align 437; CHECK-NEXT: br label %[[WHILE_COND]]38;39entry:40 %closure.i25.i = getelementptr i8, ptr %kg, i64 33641 %num_closure.i26.i = getelementptr i8, ptr %kg, i64 27642 br label %while.cond43 44while.cond:45 %load = load i32, ptr %kg, align 446 %idxprom.i = zext i32 %load to i6447 switch i32 0, label %sw.bb92 [48 i32 1, label %sw.bb9249 i32 0, label %subd_triangle_patch.exit.i.i3550 ]51 52subd_triangle_patch.exit.i.i35:53 %arrayidx.i27.i = getelementptr float, ptr %kg, i64 %idxprom.i54 store float 0.000000e+00, ptr %arrayidx.i27.i, align 455 br label %while.cond56 57sw.bb92:58 %insert = insertelement <3 x i32> zeroinitializer, i32 %load, i64 059 %splat.splatinsert.i = bitcast <3 x i32> %insert to <3 x float>60 %shfl = shufflevector <3 x float> %splat.splatinsert.i, <3 x float> zeroinitializer, <4 x i32> zeroinitializer61 %load.1 = load i32, ptr %num_closure.i26.i, align 462 %idxprom.i27.i = sext i32 %load.1 to i6463 %arrayidx.i28.i = getelementptr [64 x %struct.ShaderClosure], ptr %closure.i25.i, i64 0, i64 %idxprom.i27.i64 store <4 x float> %shfl, ptr %arrayidx.i28.i, align 1665 %inc.i30.i = or i32 %load.1, 166 store i32 %inc.i30.i, ptr %num_closure.i26.i, align 467 br label %while.cond68}69 70define amdgpu_kernel void @kernel() #0 {71; CHECK-LABEL: define amdgpu_kernel void @kernel(72; CHECK-SAME: ) #[[ATTR1:[0-9]+]] {73; CHECK-NEXT: [[ENTRY:.*:]]74; CHECK-NEXT: [[SD:%.*]] = alloca [[STRUCT_SHADERDATA:%.*]], align 16, addrspace(5)75; CHECK-NEXT: [[KGLOBALS_ASCAST1:%.*]] = addrspacecast ptr addrspace(5) [[SD]] to ptr76; CHECK-NEXT: [[NUM_CLOSURE_I_I:%.*]] = getelementptr i8, ptr addrspace(5) [[SD]], i32 27677; CHECK-NEXT: store <2 x i32> zeroinitializer, ptr addrspace(5) [[NUM_CLOSURE_I_I]], align 478; CHECK-NEXT: call fastcc void @foo(ptr [[KGLOBALS_ASCAST1]])79; CHECK-NEXT: ret void80;81entry:82 %sd = alloca %struct.ShaderData, align 16, addrspace(5)83 %kglobals.ascast1 = addrspacecast ptr addrspace(5) %sd to ptr84 %num_closure.i.i = getelementptr i8, ptr addrspace(5) %sd, i32 27685 store <2 x i32> zeroinitializer, ptr addrspace(5) %num_closure.i.i, align 486 call fastcc void @foo(ptr %kglobals.ascast1)87 ret void88}89 90attributes #0 = { norecurse }91