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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-attributes --check-globals all --version 42; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx90a -passes=amdgpu-attributor %s | FileCheck %s3 4; Shrink result attribute list by preventing use of most attributes.5define internal void @use_most() {6; CHECK-LABEL: define internal void @use_most(7; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {8; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [256 x i8], align 1, addrspace(5)9; CHECK-NEXT: [[ALLOCA_CAST:%.*]] = addrspacecast ptr addrspace(5) [[ALLOCA]] to ptr10; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()11; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.amdgcn.workitem.id.y()12; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.amdgcn.workitem.id.z()13; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.amdgcn.workgroup.id.x()14; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.amdgcn.workgroup.id.y()15; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.amdgcn.workgroup.id.z()16; CHECK-NEXT: [[TMP10:%.*]] = call i32 @llvm.amdgcn.cluster.id.x()17; CHECK-NEXT: [[TMP11:%.*]] = call i32 @llvm.amdgcn.cluster.id.y()18; CHECK-NEXT: [[TMP12:%.*]] = call i32 @llvm.amdgcn.cluster.id.z()19; CHECK-NEXT: [[TMP7:%.*]] = call ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()20; CHECK-NEXT: [[TMP8:%.*]] = call ptr addrspace(4) @llvm.amdgcn.queue.ptr()21; CHECK-NEXT: [[TMP9:%.*]] = call i64 @llvm.amdgcn.dispatch.id()22; CHECK-NEXT: [[TMP13:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()23; CHECK-NEXT: [[IMPLICIT_ARG_PTR:%.*]] = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()24; CHECK-NEXT: call void @llvm.memcpy.p0.p4.i64(ptr [[ALLOCA_CAST]], ptr addrspace(4) [[IMPLICIT_ARG_PTR]], i64 256, i1 false)25; CHECK-NEXT: ret void26;27 %alloca = alloca [256 x i8], addrspace(5)28 %alloca.cast = addrspacecast ptr addrspace(5) %alloca to ptr29 call i32 @llvm.amdgcn.workitem.id.x()30 call i32 @llvm.amdgcn.workitem.id.y()31 call i32 @llvm.amdgcn.workitem.id.z()32 call i32 @llvm.amdgcn.workgroup.id.x()33 call i32 @llvm.amdgcn.workgroup.id.y()34 call i32 @llvm.amdgcn.workgroup.id.z()35 call i32 @llvm.amdgcn.cluster.id.x()36 call i32 @llvm.amdgcn.cluster.id.y()37 call i32 @llvm.amdgcn.cluster.id.z()38 call ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()39 call ptr addrspace(4) @llvm.amdgcn.queue.ptr()40 call i64 @llvm.amdgcn.dispatch.id()41 call i32 @llvm.amdgcn.lds.kernel.id()42 %implicit.arg.ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()43 call void @llvm.memcpy.p0.p4(ptr %alloca.cast, ptr addrspace(4) %implicit.arg.ptr, i64 256, i1 false)44 ret void45}46 47define amdgpu_kernel void @kernel_uses_asm_virtreg() {48; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg(49; CHECK-SAME: ) #[[ATTR1:[0-9]+]] {50; CHECK-NEXT: call void asm sideeffect "51; CHECK-NEXT: call void @use_most()52; CHECK-NEXT: ret void53;54 call void asm sideeffect "; use $0", "a"(i32 poison)55 call void @use_most()56 ret void57}58 59define amdgpu_kernel void @kernel_uses_asm_virtreg_def() {60; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg_def(61; CHECK-SAME: ) #[[ATTR1]] {62; CHECK-NEXT: [[DEF:%.*]] = call i32 asm sideeffect "63; CHECK-NEXT: call void @use_most()64; CHECK-NEXT: ret void65;66 %def = call i32 asm sideeffect "; def $0", "=a"()67 call void @use_most()68 ret void69}70 71define amdgpu_kernel void @kernel_uses_asm_physreg_def_tuple() {72; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_physreg_def_tuple(73; CHECK-SAME: ) #[[ATTR2:[0-9]+]] {74; CHECK-NEXT: [[DEF:%.*]] = call i64 asm sideeffect "75; CHECK-NEXT: call void @use_most()76; CHECK-NEXT: ret void77;78 %def = call i64 asm sideeffect "; def $0", "={a[0:1]}"()79 call void @use_most()80 ret void81}82 83define amdgpu_kernel void @kernel_uses_asm_virtreg_second_arg() {84; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg_second_arg(85; CHECK-SAME: ) #[[ATTR1]] {86; CHECK-NEXT: call void asm sideeffect "87; CHECK-NEXT: call void @use_most()88; CHECK-NEXT: ret void89;90 call void asm sideeffect "; use $0", "v,a"(i32 poison, i32 poison)91 call void @use_most()92 ret void93}94 95define amdgpu_kernel void @kernel_uses_non_agpr_asm() {96; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_non_agpr_asm(97; CHECK-SAME: ) #[[ATTR0]] {98; CHECK-NEXT: call void asm sideeffect "99; CHECK-NEXT: call void @use_most()100; CHECK-NEXT: ret void101;102 call void asm sideeffect "; use $0", "v"(i32 poison)103 call void @use_most()104 ret void105}106 107define amdgpu_kernel void @kernel_uses_asm_physreg() {108; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_physreg(109; CHECK-SAME: ) #[[ATTR1]] {110; CHECK-NEXT: call void asm sideeffect "111; CHECK-NEXT: call void @use_most()112; CHECK-NEXT: ret void113;114 call void asm sideeffect "; use $0", "{a0}"(i32 poison)115 call void @use_most()116 ret void117}118 119define amdgpu_kernel void @kernel_uses_asm_physreg_tuple() {120; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_physreg_tuple(121; CHECK-SAME: ) #[[ATTR2]] {122; CHECK-NEXT: call void asm sideeffect "123; CHECK-NEXT: call void @use_most()124; CHECK-NEXT: ret void125;126 call void asm sideeffect "; use $0", "{a[0:1]}"(i64 poison)127 call void @use_most()128 ret void129}130 131define void @func_uses_asm_virtreg_agpr() {132; CHECK-LABEL: define void @func_uses_asm_virtreg_agpr(133; CHECK-SAME: ) #[[ATTR1]] {134; CHECK-NEXT: call void asm sideeffect "135; CHECK-NEXT: call void @use_most()136; CHECK-NEXT: ret void137;138 call void asm sideeffect "; use $0", "a"(i32 poison)139 call void @use_most()140 ret void141}142 143define void @func_uses_asm_physreg_agpr() {144; CHECK-LABEL: define void @func_uses_asm_physreg_agpr(145; CHECK-SAME: ) #[[ATTR1]] {146; CHECK-NEXT: call void asm sideeffect "147; CHECK-NEXT: call void @use_most()148; CHECK-NEXT: ret void149;150 call void asm sideeffect "; use $0", "{a0}"(i32 poison)151 call void @use_most()152 ret void153}154 155define void @func_uses_asm_physreg_agpr_tuple() {156; CHECK-LABEL: define void @func_uses_asm_physreg_agpr_tuple(157; CHECK-SAME: ) #[[ATTR2]] {158; CHECK-NEXT: call void asm sideeffect "159; CHECK-NEXT: call void @use_most()160; CHECK-NEXT: ret void161;162 call void asm sideeffect "; use $0", "{a[0:1]}"(i64 poison)163 call void @use_most()164 ret void165}166 167declare void @unknown()168 169define amdgpu_kernel void @kernel_calls_extern() {170; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_extern(171; CHECK-SAME: ) #[[ATTR3:[0-9]+]] {172; CHECK-NEXT: call void @unknown()173; CHECK-NEXT: call void @use_most()174; CHECK-NEXT: ret void175;176 call void @unknown()177 call void @use_most()178 ret void179}180 181define amdgpu_kernel void @kernel_calls_extern_marked_callsite() {182; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_extern_marked_callsite(183; CHECK-SAME: ) #[[ATTR3]] {184; CHECK-NEXT: call void @unknown() #[[ATTR29:[0-9]+]]185; CHECK-NEXT: call void @use_most()186; CHECK-NEXT: ret void187;188 call void @unknown() #0189 call void @use_most()190 ret void191}192 193define amdgpu_kernel void @kernel_calls_indirect(ptr %indirect) {194; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_indirect(195; CHECK-SAME: ptr [[INDIRECT:%.*]]) #[[ATTR3]] {196; CHECK-NEXT: call void [[INDIRECT]]()197; CHECK-NEXT: call void @use_most()198; CHECK-NEXT: ret void199;200 call void %indirect()201 call void @use_most()202 ret void203}204 205define amdgpu_kernel void @kernel_calls_indirect_marked_callsite(ptr %indirect) {206; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_indirect_marked_callsite(207; CHECK-SAME: ptr [[INDIRECT:%.*]]) #[[ATTR3]] {208; CHECK-NEXT: call void [[INDIRECT]]() #[[ATTR29]]209; CHECK-NEXT: call void @use_most()210; CHECK-NEXT: ret void211;212 call void %indirect() #0213 call void @use_most()214 ret void215}216 217define amdgpu_kernel void @kernel_transitively_uses_agpr_asm() {218; CHECK-LABEL: define amdgpu_kernel void @kernel_transitively_uses_agpr_asm(219; CHECK-SAME: ) #[[ATTR1]] {220; CHECK-NEXT: call void @func_uses_asm_physreg_agpr()221; CHECK-NEXT: call void @use_most()222; CHECK-NEXT: ret void223;224 call void @func_uses_asm_physreg_agpr()225 call void @use_most()226 ret void227}228 229define void @empty() {230; CHECK-LABEL: define void @empty(231; CHECK-SAME: ) #[[ATTR0]] {232; CHECK-NEXT: call void @use_most()233; CHECK-NEXT: ret void234;235 call void @use_most()236 ret void237}238 239define void @also_empty() {240; CHECK-LABEL: define void @also_empty(241; CHECK-SAME: ) #[[ATTR0]] {242; CHECK-NEXT: call void @use_most()243; CHECK-NEXT: ret void244;245 call void @use_most()246 ret void247}248 249define amdgpu_kernel void @kernel_calls_empty() {250; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_empty(251; CHECK-SAME: ) #[[ATTR0]] {252; CHECK-NEXT: call void @empty()253; CHECK-NEXT: call void @use_most()254; CHECK-NEXT: ret void255;256 call void @empty()257 call void @use_most()258 ret void259}260 261define amdgpu_kernel void @kernel_calls_non_agpr_and_agpr() {262; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_non_agpr_and_agpr(263; CHECK-SAME: ) #[[ATTR1]] {264; CHECK-NEXT: call void @empty()265; CHECK-NEXT: call void @func_uses_asm_physreg_agpr()266; CHECK-NEXT: call void @use_most()267; CHECK-NEXT: ret void268;269 call void @empty()270 call void @func_uses_asm_physreg_agpr()271 call void @use_most()272 ret void273}274 275define amdgpu_kernel void @kernel_calls_generic_intrinsic(ptr %ptr0, ptr %ptr1, i64 %size) {276; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_generic_intrinsic(277; CHECK-SAME: ptr [[PTR0:%.*]], ptr [[PTR1:%.*]], i64 [[SIZE:%.*]]) #[[ATTR0]] {278; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr [[PTR0]], ptr [[PTR1]], i64 [[SIZE]], i1 false)279; CHECK-NEXT: call void @use_most()280; CHECK-NEXT: ret void281;282 call void @llvm.memcpy.p0.p0.i64(ptr %ptr0, ptr %ptr1, i64 %size, i1 false)283 call void @use_most()284 ret void285}286 287declare <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float, float, <32 x float>, i32 immarg, i32 immarg, i32 immarg)288 289define amdgpu_kernel void @kernel_calls_mfma.f32.32x32x1f32(ptr addrspace(1) %out, float %a, float %b, <32 x float> %c) {290; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_mfma.f32.32x32x1f32(291; CHECK-SAME: ptr addrspace(1) [[OUT:%.*]], float [[A:%.*]], float [[B:%.*]], <32 x float> [[C:%.*]]) #[[ATTR0]] {292; CHECK-NEXT: [[RESULT:%.*]] = call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float [[A]], float [[B]], <32 x float> [[C]], i32 0, i32 0, i32 0)293; CHECK-NEXT: store <32 x float> [[RESULT]], ptr addrspace(1) [[OUT]], align 128294; CHECK-NEXT: call void @use_most()295; CHECK-NEXT: ret void296;297 %result = call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float %a, float %b, <32 x float> %c, i32 0, i32 0, i32 0)298 store <32 x float> %result, ptr addrspace(1) %out299 call void @use_most()300 ret void301}302 303define amdgpu_kernel void @kernel_calls_workitem_id_x(ptr addrspace(1) %out) {304; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_workitem_id_x(305; CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR0]] {306; CHECK-NEXT: [[RESULT:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()307; CHECK-NEXT: store i32 [[RESULT]], ptr addrspace(1) [[OUT]], align 4308; CHECK-NEXT: call void @use_most()309; CHECK-NEXT: ret void310;311 %result = call i32 @llvm.amdgcn.workitem.id.x()312 store i32 %result, ptr addrspace(1) %out313 call void @use_most()314 ret void315}316 317define amdgpu_kernel void @indirect_calls_none_agpr(i1 %cond) {318; CHECK-LABEL: define amdgpu_kernel void @indirect_calls_none_agpr(319; CHECK-SAME: i1 [[COND:%.*]]) #[[ATTR0]] {320; CHECK-NEXT: [[FPTR:%.*]] = select i1 [[COND]], ptr @empty, ptr @also_empty321; CHECK-NEXT: [[TMP1:%.*]] = icmp eq ptr [[FPTR]], @also_empty322; CHECK-NEXT: br i1 [[TMP1]], label [[TMP2:%.*]], label [[TMP3:%.*]]323; CHECK: 2:324; CHECK-NEXT: call void @also_empty()325; CHECK-NEXT: br label [[TMP6:%.*]]326; CHECK: 3:327; CHECK-NEXT: br i1 true, label [[TMP4:%.*]], label [[TMP5:%.*]]328; CHECK: 4:329; CHECK-NEXT: call void @empty()330; CHECK-NEXT: br label [[TMP6]]331; CHECK: 5:332; CHECK-NEXT: unreachable333; CHECK: 6:334; CHECK-NEXT: call void @use_most()335; CHECK-NEXT: ret void336;337 %fptr = select i1 %cond, ptr @empty, ptr @also_empty338 call void %fptr()339 call void @use_most()340 ret void341}342 343define amdgpu_kernel void @kernel_uses_asm_virtreg_def_struct_0() {344; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg_def_struct_0(345; CHECK-SAME: ) #[[ATTR2]] {346; CHECK-NEXT: [[DEF:%.*]] = call { i32, i32 } asm sideeffect "347; CHECK-NEXT: call void @use_most()348; CHECK-NEXT: ret void349;350 %def = call {i32, i32} asm sideeffect "; def $0", "=a,=a"()351 call void @use_most()352 ret void353}354 355define amdgpu_kernel void @kernel_uses_asm_virtreg_use_struct_1() {356; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg_use_struct_1(357; CHECK-SAME: ) #[[ATTR5:[0-9]+]] {358; CHECK-NEXT: [[DEF:%.*]] = call { i32, <2 x i32> } asm sideeffect "359; CHECK-NEXT: call void @use_most()360; CHECK-NEXT: ret void361;362 %def = call {i32, <2 x i32>} asm sideeffect "; def $0", "=a,=a"()363 call void @use_most()364 ret void365}366 367define amdgpu_kernel void @kernel_uses_asm_virtreg_use_struct_2() {368; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg_use_struct_2(369; CHECK-SAME: ) #[[ATTR1]] {370; CHECK-NEXT: [[DEF:%.*]] = call { i32, <2 x i32> } asm sideeffect "371; CHECK-NEXT: call void @use_most()372; CHECK-NEXT: ret void373;374 %def = call {i32, <2 x i32>} asm sideeffect "; def $0", "=a,=v"()375 call void @use_most()376 ret void377}378 379define amdgpu_kernel void @kernel_uses_asm_virtreg_ptr_ty() {380; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg_ptr_ty(381; CHECK-SAME: ) #[[ATTR2]] {382; CHECK-NEXT: call void asm sideeffect "383; CHECK-NEXT: call void @use_most()384; CHECK-NEXT: ret void385;386 call void asm sideeffect "; use $0", "a"(ptr poison)387 call void @use_most()388 ret void389}390 391define amdgpu_kernel void @kernel_uses_asm_virtreg_def_ptr_ty() {392; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg_def_ptr_ty(393; CHECK-SAME: ) #[[ATTR2]] {394; CHECK-NEXT: [[DEF:%.*]] = call ptr asm sideeffect "395; CHECK-NEXT: call void @use_most()396; CHECK-NEXT: ret void397;398 %def = call ptr asm sideeffect "; def $0", "=a"()399 call void @use_most()400 ret void401}402 403define amdgpu_kernel void @kernel_uses_asm_virtreg_def_vector_ptr_ty() {404; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg_def_vector_ptr_ty(405; CHECK-SAME: ) #[[ATTR5]] {406; CHECK-NEXT: [[DEF:%.*]] = call <2 x ptr> asm sideeffect "407; CHECK-NEXT: call void @use_most()408; CHECK-NEXT: ret void409;410 %def = call <2 x ptr> asm sideeffect "; def $0", "=a"()411 call void @use_most()412 ret void413}414 415define amdgpu_kernel void @kernel_uses_asm_physreg_def_struct_0() {416; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_physreg_def_struct_0(417; CHECK-SAME: ) #[[ATTR6:[0-9]+]] {418; CHECK-NEXT: [[DEF:%.*]] = call { i32, i32 } asm sideeffect "419; CHECK-NEXT: call void @use_most()420; CHECK-NEXT: ret void421;422 %def = call {i32, i32} asm sideeffect "; def $0", "={a0},={a[4:5]}"()423 call void @use_most()424 ret void425}426 427define amdgpu_kernel void @kernel_uses_asm_clobber() {428; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_clobber(429; CHECK-SAME: ) #[[ATTR7:[0-9]+]] {430; CHECK-NEXT: call void asm sideeffect "431; CHECK-NEXT: call void @use_most()432; CHECK-NEXT: ret void433;434 call void asm sideeffect "; clobber $0", "~{a4}"()435 call void @use_most()436 ret void437}438 439define amdgpu_kernel void @kernel_uses_asm_clobber_tuple() {440; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_clobber_tuple(441; CHECK-SAME: ) #[[ATTR8:[0-9]+]] {442; CHECK-NEXT: call void asm sideeffect "443; CHECK-NEXT: call void @use_most()444; CHECK-NEXT: ret void445;446 call void asm sideeffect "; clobber $0", "~{a[10:13]}"()447 call void @use_most()448 ret void449}450 451define amdgpu_kernel void @kernel_uses_asm_clobber_oob() {452; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_clobber_oob(453; CHECK-SAME: ) #[[ATTR9:[0-9]+]] {454; CHECK-NEXT: call void asm sideeffect "455; CHECK-NEXT: call void @use_most()456; CHECK-NEXT: ret void457;458 call void asm sideeffect "; clobber $0", "~{a256}"()459 call void @use_most()460 ret void461}462 463define amdgpu_kernel void @kernel_uses_asm_clobber_max() {464; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_clobber_max(465; CHECK-SAME: ) #[[ATTR9]] {466; CHECK-NEXT: call void asm sideeffect "467; CHECK-NEXT: call void @use_most()468; CHECK-NEXT: ret void469;470 call void asm sideeffect "; clobber $0", "~{a255}"()471 call void @use_most()472 ret void473}474 475define amdgpu_kernel void @kernel_uses_asm_physreg_oob() {476; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_physreg_oob(477; CHECK-SAME: ) #[[ATTR9]] {478; CHECK-NEXT: call void asm sideeffect "479; CHECK-NEXT: call void @use_most()480; CHECK-NEXT: ret void481;482 call void asm sideeffect "; use $0", "{a256}"(i32 poison)483 call void @use_most()484 ret void485}486 487define amdgpu_kernel void @kernel_uses_asm_virtreg_def_max_ty() {488; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg_def_max_ty(489; CHECK-SAME: ) #[[ATTR10:[0-9]+]] {490; CHECK-NEXT: [[DEF:%.*]] = call <32 x i32> asm sideeffect "491; CHECK-NEXT: call void @use_most()492; CHECK-NEXT: ret void493;494 %def = call <32 x i32> asm sideeffect "; def $0", "=a"()495 call void @use_most()496 ret void497}498 499define amdgpu_kernel void @kernel_uses_asm_virtreg_use_max_ty() {500; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg_use_max_ty(501; CHECK-SAME: ) #[[ATTR10]] {502; CHECK-NEXT: call void asm sideeffect "503; CHECK-NEXT: call void @use_most()504; CHECK-NEXT: ret void505;506 call void asm sideeffect "; use $0", "a"(<32 x i32> poison)507 call void @use_most()508 ret void509}510 511define amdgpu_kernel void @kernel_uses_asm_virtreg_use_def_max_ty() {512; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg_use_def_max_ty(513; CHECK-SAME: ) #[[ATTR10]] {514; CHECK-NEXT: [[DEF:%.*]] = call <32 x i32> asm sideeffect "515; CHECK-NEXT: call void @use_most()516; CHECK-NEXT: ret void517;518 %def = call <32 x i32> asm sideeffect "; use $0", "=a,a"(<32 x i32> poison)519 call void @use_most()520 ret void521}522 523define amdgpu_kernel void @vreg_use_exceeds_register_file() {524; CHECK-LABEL: define amdgpu_kernel void @vreg_use_exceeds_register_file(525; CHECK-SAME: ) #[[ATTR9]] {526; CHECK-NEXT: call void asm sideeffect "527; CHECK-NEXT: call void @use_most()528; CHECK-NEXT: ret void529;530 call void asm sideeffect "; use $0", "a"(<257 x i32> poison)531 call void @use_most()532 ret void533}534 535define amdgpu_kernel void @vreg_def_exceeds_register_file() {536; CHECK-LABEL: define amdgpu_kernel void @vreg_def_exceeds_register_file(537; CHECK-SAME: ) #[[ATTR9]] {538; CHECK-NEXT: [[DEF:%.*]] = call <257 x i32> asm sideeffect "539; CHECK-NEXT: call void @use_most()540; CHECK-NEXT: ret void541;542 %def = call <257 x i32> asm sideeffect "; def $0", "=a"()543 call void @use_most()544 ret void545}546 547define amdgpu_kernel void @multiple() {548; CHECK-LABEL: define amdgpu_kernel void @multiple(549; CHECK-SAME: ) #[[ATTR10]] {550; CHECK-NEXT: [[DEF:%.*]] = call { <16 x i32>, <8 x i32>, <8 x i32> } asm sideeffect "551; CHECK-NEXT: call void @use_most()552; CHECK-NEXT: ret void553;554 %def = call {<16 x i32>, <8 x i32>, <8 x i32>} asm sideeffect "; def $0", "=a,=a,=a,a,a,a"(<4 x i32> splat (i32 0), <8 x i32> splat (i32 1), i64 999)555 call void @use_most()556 ret void557}558 559define amdgpu_kernel void @earlyclobber_0() {560; CHECK-LABEL: define amdgpu_kernel void @earlyclobber_0(561; CHECK-SAME: ) #[[ATTR11:[0-9]+]] {562; CHECK-NEXT: [[DEF:%.*]] = call <8 x i32> asm sideeffect "563; CHECK-NEXT: call void @use_most()564; CHECK-NEXT: ret void565;566 %def = call <8 x i32> asm sideeffect "; def $0", "=&a,a"(i32 0)567 call void @use_most()568 ret void569}570 571define amdgpu_kernel void @earlyclobber_1() {572; CHECK-LABEL: define amdgpu_kernel void @earlyclobber_1(573; CHECK-SAME: ) #[[ATTR12:[0-9]+]] {574; CHECK-NEXT: [[DEF:%.*]] = call { <8 x i32>, <16 x i32> } asm sideeffect "575; CHECK-NEXT: call void @use_most()576; CHECK-NEXT: ret void577;578 %def = call { <8 x i32>, <16 x i32 > } asm sideeffect "; def $0, $1", "=&a,=&a,a,a"(i32 0, <16 x i32> splat (i32 1))579 call void @use_most()580 ret void581}582 583define amdgpu_kernel void @physreg_a32__vreg_a256__vreg_a512() {584; CHECK-LABEL: define amdgpu_kernel void @physreg_a32__vreg_a256__vreg_a512(585; CHECK-SAME: ) #[[ATTR13:[0-9]+]] {586; CHECK-NEXT: call void asm sideeffect "587; CHECK-NEXT: call void @use_most()588; CHECK-NEXT: ret void589;590 call void asm sideeffect "; use $0, $1, $2", "{a16},a,a"(i32 poison, <8 x i32> poison, <16 x i32> poison)591 call void @use_most()592 ret void593}594 595define amdgpu_kernel void @physreg_def_a32__def_vreg_a256__def_vreg_a512() {596; CHECK-LABEL: define amdgpu_kernel void @physreg_def_a32__def_vreg_a256__def_vreg_a512(597; CHECK-SAME: ) #[[ATTR13]] {598; CHECK-NEXT: [[TMP1:%.*]] = call { i32, <8 x i32>, <16 x i32> } asm sideeffect "599; CHECK-NEXT: call void @use_most()600; CHECK-NEXT: ret void601;602 call {i32, <8 x i32>, <16 x i32>} asm sideeffect "; def $0, $1, $2", "={a16},=a,=a"()603 call void @use_most()604 ret void605}606 607define amdgpu_kernel void @physreg_def_a32___def_vreg_a512_use_vreg_a256() {608; CHECK-LABEL: define amdgpu_kernel void @physreg_def_a32___def_vreg_a512_use_vreg_a256(609; CHECK-SAME: ) #[[ATTR14:[0-9]+]] {610; CHECK-NEXT: [[TMP1:%.*]] = call { i32, <16 x i32> } asm sideeffect "611; CHECK-NEXT: call void @use_most()612; CHECK-NEXT: ret void613;614 call {i32, <16 x i32>} asm sideeffect "; def $0, $1, $2", "={a16},=a,a"(<8 x i32> poison)615 call void @use_most()616 ret void617}618 619define amdgpu_kernel void @mixed_physreg_vreg_tuples_0() {620; CHECK-LABEL: define amdgpu_kernel void @mixed_physreg_vreg_tuples_0(621; CHECK-SAME: ) #[[ATTR11]] {622; CHECK-NEXT: call void asm sideeffect "623; CHECK-NEXT: call void @use_most()624; CHECK-NEXT: ret void625;626 call void asm sideeffect "; use $0, $1", "{a[1:4]},a"(<4 x i32> poison, <4 x i32> poison)627 call void @use_most()628 ret void629}630 631define amdgpu_kernel void @mixed_physreg_vreg_tuples_1() {632; CHECK-LABEL: define amdgpu_kernel void @mixed_physreg_vreg_tuples_1(633; CHECK-SAME: ) #[[ATTR15:[0-9]+]] {634; CHECK-NEXT: call void asm sideeffect "635; CHECK-NEXT: call void @use_most()636; CHECK-NEXT: ret void637;638 call void asm sideeffect "; use $0, $1", "a,{a[0:3]}"(<4 x i32> poison, <4 x i32> poison)639 call void @use_most()640 ret void641}642 643define amdgpu_kernel void @physreg_raises_limit() {644; CHECK-LABEL: define amdgpu_kernel void @physreg_raises_limit(645; CHECK-SAME: ) #[[ATTR16:[0-9]+]] {646; CHECK-NEXT: call void asm sideeffect "647; CHECK-NEXT: call void @use_most()648; CHECK-NEXT: ret void649;650 call void asm sideeffect "; use $0, $1", "a,{a[5:8]}"(<4 x i32> poison, <4 x i32> poison)651 call void @use_most()652 ret void653}654 655define amdgpu_kernel void @physreg_tuple_alignment_raises_limit() {656; CHECK-LABEL: define amdgpu_kernel void @physreg_tuple_alignment_raises_limit(657; CHECK-SAME: ) #[[ATTR11]] {658; CHECK-NEXT: call void asm sideeffect "659; CHECK-NEXT: call void @use_most()660; CHECK-NEXT: ret void661;662 call void asm sideeffect "; use $0, $1", "a,{a[1:4]}"(<4 x i32> poison, <4 x i32> poison)663 call void @use_most()664 ret void665}666 667define amdgpu_kernel void @align3_virtreg() {668; CHECK-LABEL: define amdgpu_kernel void @align3_virtreg(669; CHECK-SAME: ) #[[ATTR6]] {670; CHECK-NEXT: call void asm sideeffect "671; CHECK-NEXT: call void @use_most()672; CHECK-NEXT: ret void673;674 call void asm sideeffect "; use $0, $1", "a,a"(<3 x i32> poison, <3 x i32> poison)675 call void @use_most()676 ret void677}678 679define amdgpu_kernel void @align3_align4_virtreg() {680; CHECK-LABEL: define amdgpu_kernel void @align3_align4_virtreg(681; CHECK-SAME: ) #[[ATTR15]] {682; CHECK-NEXT: call void asm sideeffect "683; CHECK-NEXT: call void @use_most()684; CHECK-NEXT: ret void685;686 call void asm sideeffect "; use $0, $1", "a,a"(<3 x i32> poison, <4 x i32> poison)687 call void @use_most()688 ret void689}690 691define amdgpu_kernel void @align2_align4_virtreg() {692; CHECK-LABEL: define amdgpu_kernel void @align2_align4_virtreg(693; CHECK-SAME: ) #[[ATTR15]] {694; CHECK-NEXT: call void asm sideeffect "695; CHECK-NEXT: call void @use_most()696; CHECK-NEXT: ret void697;698 call void asm sideeffect "; use $0, $1", "a,a"(<2 x i32> poison, <4 x i32> poison)699 call void @use_most()700 ret void701}702 703define amdgpu_kernel void @kernel_uses_write_register_a55() {704; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_write_register_a55(705; CHECK-SAME: ) #[[ATTR17:[0-9]+]] {706; CHECK-NEXT: call void @llvm.write_register.i32(metadata [[META0:![0-9]+]], i32 0)707; CHECK-NEXT: ret void708;709 call void @llvm.write_register.i64(metadata !0, i32 0)710 ret void711}712 713define amdgpu_kernel void @kernel_uses_write_register_v55() {714; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_write_register_v55(715; CHECK-SAME: ) #[[ATTR0]] {716; CHECK-NEXT: call void @llvm.write_register.i32(metadata [[META1:![0-9]+]], i32 0)717; CHECK-NEXT: call void @use_most()718; CHECK-NEXT: ret void719;720 call void @llvm.write_register.i64(metadata !1, i32 0)721 call void @use_most()722 ret void723}724 725define amdgpu_kernel void @kernel_uses_write_register_a55_57() {726; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_write_register_a55_57(727; CHECK-SAME: ) #[[ATTR18:[0-9]+]] {728; CHECK-NEXT: call void @llvm.write_register.i96(metadata [[META2:![0-9]+]], i96 0)729; CHECK-NEXT: call void @use_most()730; CHECK-NEXT: ret void731;732 call void @llvm.write_register.i64(metadata !2, i96 0)733 call void @use_most()734 ret void735}736 737define amdgpu_kernel void @kernel_uses_read_register_a55(ptr addrspace(1) %ptr) {738; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_read_register_a55(739; CHECK-SAME: ptr addrspace(1) [[PTR:%.*]]) #[[ATTR19:[0-9]+]] {740; CHECK-NEXT: [[REG:%.*]] = call i32 @llvm.read_register.i32(metadata [[META0]])741; CHECK-NEXT: store i32 [[REG]], ptr addrspace(1) [[PTR]], align 4742; CHECK-NEXT: call void @use_most()743; CHECK-NEXT: ret void744;745 %reg = call i32 @llvm.read_register.i64(metadata !0)746 store i32 %reg, ptr addrspace(1) %ptr747 call void @use_most()748 ret void749}750 751define amdgpu_kernel void @kernel_uses_read_volatile_register_a55(ptr addrspace(1) %ptr) {752; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_read_volatile_register_a55(753; CHECK-SAME: ptr addrspace(1) [[PTR:%.*]]) #[[ATTR19]] {754; CHECK-NEXT: [[REG:%.*]] = call i32 @llvm.read_volatile_register.i32(metadata [[META0]])755; CHECK-NEXT: store i32 [[REG]], ptr addrspace(1) [[PTR]], align 4756; CHECK-NEXT: call void @use_most()757; CHECK-NEXT: ret void758;759 %reg = call i32 @llvm.read_volatile_register.i64(metadata !0)760 store i32 %reg, ptr addrspace(1) %ptr761 call void @use_most()762 ret void763}764 765define amdgpu_kernel void @kernel_uses_read_register_a56_59(ptr addrspace(1) %ptr) {766; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_read_register_a56_59(767; CHECK-SAME: ptr addrspace(1) [[PTR:%.*]]) #[[ATTR20:[0-9]+]] {768; CHECK-NEXT: [[REG:%.*]] = call i128 @llvm.read_register.i128(metadata [[META3:![0-9]+]])769; CHECK-NEXT: store i128 [[REG]], ptr addrspace(1) [[PTR]], align 8770; CHECK-NEXT: call void @use_most()771; CHECK-NEXT: ret void772;773 %reg = call i128 @llvm.read_register.i64(metadata !3)774 store i128 %reg, ptr addrspace(1) %ptr775 call void @use_most()776 ret void777}778 779define amdgpu_kernel void @kernel_uses_write_register_out_of_bounds_a256() {780; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_write_register_out_of_bounds_a256(781; CHECK-SAME: ) #[[ATTR9]] {782; CHECK-NEXT: call void @llvm.write_register.i32(metadata [[META4:![0-9]+]], i32 0)783; CHECK-NEXT: call void @use_most()784; CHECK-NEXT: ret void785;786 call void @llvm.write_register.i64(metadata !4, i32 0)787 call void @use_most()788 ret void789}790 791define amdgpu_kernel void @kernel_multiple_uses() {792; CHECK-LABEL: define amdgpu_kernel void @kernel_multiple_uses(793; CHECK-SAME: ) #[[ATTR5]] {794; CHECK-NEXT: call void asm sideeffect "795; CHECK-NEXT: call void asm sideeffect "796; CHECK-NEXT: call void asm sideeffect "797; CHECK-NEXT: call void @use_most()798; CHECK-NEXT: ret void799;800 call void asm sideeffect "; use $0", "a"(i64 poison)801 call void asm sideeffect "; use $0", "a"(i32 poison)802 call void asm sideeffect "; use $0", "a"(i128 poison)803 call void @use_most()804 ret void805}806 807define amdgpu_kernel void @kernel_multiple_defs() {808; CHECK-LABEL: define amdgpu_kernel void @kernel_multiple_defs(809; CHECK-SAME: ) #[[ATTR5]] {810; CHECK-NEXT: [[TMP1:%.*]] = call i64 asm sideeffect "811; CHECK-NEXT: [[TMP2:%.*]] = call i32 asm sideeffect "812; CHECK-NEXT: [[TMP3:%.*]] = call i128 asm sideeffect "813; CHECK-NEXT: call void @use_most()814; CHECK-NEXT: ret void815;816 call i64 asm sideeffect "; def $0", "=a"()817 call i32 asm sideeffect "; def $0", "=a"()818 call i128 asm sideeffect "; def $0", "=a"()819 call void @use_most()820 ret void821}822 823define amdgpu_kernel void @kernel_multiple_use_defs() {824; CHECK-LABEL: define amdgpu_kernel void @kernel_multiple_use_defs(825; CHECK-SAME: ) #[[ATTR5]] {826; CHECK-NEXT: call void asm sideeffect "827; CHECK-NEXT: [[TMP1:%.*]] = call i128 asm sideeffect "828; CHECK-NEXT: call void @use_most()829; CHECK-NEXT: ret void830;831 call void asm sideeffect "; use $0", "a"(i32 poison)832 call i128 asm sideeffect "; def $0", "=a"()833 call void @use_most()834 ret void835}836 837define void @callgraph_b() {838; CHECK-LABEL: define void @callgraph_b(839; CHECK-SAME: ) #[[ATTR15]] {840; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> asm sideeffect "841; CHECK-NEXT: call void asm sideeffect "842; CHECK-NEXT: call void @use_most()843; CHECK-NEXT: ret void844;845 call <4 x i32> asm sideeffect "; def $0", "=a"()846 call void asm sideeffect "; use $0", "a"(<8 x i32> poison)847 call void @use_most()848 ret void849}850 851define void @callgraph_c() {852; CHECK-LABEL: define void @callgraph_c(853; CHECK-SAME: ) #[[ATTR2]] {854; CHECK-NEXT: [[TMP1:%.*]] = call i32 asm sideeffect "855; CHECK-NEXT: call void asm sideeffect "856; CHECK-NEXT: call void @use_most()857; CHECK-NEXT: ret void858;859 call i32 asm sideeffect "; def $0", "=a"()860 call void asm sideeffect "; use $0", "a"(<2 x i32> poison)861 call void @use_most()862 ret void863}864 865define void @callgraph_a(i1 %cond) {866; CHECK-LABEL: define void @callgraph_a(867; CHECK-SAME: i1 [[COND:%.*]]) #[[ATTR15]] {868; CHECK-NEXT: br i1 [[COND]], label [[A:%.*]], label [[B:%.*]]869; CHECK: a:870; CHECK-NEXT: call void @callgraph_b()871; CHECK-NEXT: ret void872; CHECK: b:873; CHECK-NEXT: call void @callgraph_c()874; CHECK-NEXT: ret void875;876 br i1 %cond, label %a, label %b877 878a:879 call void @callgraph_b()880 ret void881 882b:883 call void @callgraph_c()884 ret void885}886 887 888define void @kernel_max_callgraph(i1 %cond) {889; CHECK-LABEL: define void @kernel_max_callgraph(890; CHECK-SAME: i1 [[COND:%.*]]) #[[ATTR15]] {891; CHECK-NEXT: call void @callgraph_a(i1 [[COND]])892; CHECK-NEXT: ret void893;894 call void @callgraph_a(i1 %cond)895 ret void896}897 898define amdgpu_kernel void @kernel_uses_all_virtregs() #1 {899; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_all_virtregs(900; CHECK-SAME: ) #[[ATTR21:[0-9]+]] {901; CHECK-NEXT: call void asm sideeffect "902; CHECK-NEXT: call void @use_most()903; CHECK-NEXT: ret void904;905 call void asm sideeffect "; use $0", "a,a,a,a,a,a,a,a"(<32 x i32> poison, <32 x i32> poison, <32 x i32> poison, <32 x i32> poison, <32 x i32> poison, <32 x i32> poison, <32 x i32> poison, <32 x i32> poison)906 call void @use_most()907 ret void908}909 910define amdgpu_kernel void @kernel_uses_all_virtregs_plus_1() #1 {911; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_all_virtregs_plus_1(912; CHECK-SAME: ) #[[ATTR21]] {913; CHECK-NEXT: call void asm sideeffect "914; CHECK-NEXT: call void @use_most()915; CHECK-NEXT: ret void916;917 call void asm sideeffect "; use $0", "a,a,a,a,a,a,a,a,a"(<32 x i32> poison, <32 x i32> poison, <32 x i32> poison, <32 x i32> poison, <32 x i32> poison, <32 x i32> poison, <32 x i32> poison, <32 x i32> poison, i32 poison)918 call void @use_most()919 ret void920}921 922define void @recursive() {923; CHECK-LABEL: define void @recursive(924; CHECK-SAME: ) #[[ATTR22:[0-9]+]] {925; CHECK-NEXT: call void asm sideeffect "926; CHECK-NEXT: call void @use_most()927; CHECK-NEXT: call void @recursive()928; CHECK-NEXT: ret void929;930 call void asm sideeffect "; use $0", "a"(<7 x i32> poison)931 call void @use_most()932 call void @recursive()933 ret void934}935 936define void @indirect_0() {937; CHECK-LABEL: define void @indirect_0(938; CHECK-SAME: ) #[[ATTR22]] {939; CHECK-NEXT: call void asm sideeffect "940; CHECK-NEXT: call void @use_most()941; CHECK-NEXT: ret void942;943 call void asm sideeffect "; use $0", "a"(<7 x i32> poison)944 call void @use_most()945 ret void946}947 948define void @indirect_1() {949; CHECK-LABEL: define void @indirect_1(950; CHECK-SAME: ) #[[ATTR23:[0-9]+]] {951; CHECK-NEXT: [[TMP1:%.*]] = call <3 x i32> asm sideeffect "952; CHECK-NEXT: call void @use_most()953; CHECK-NEXT: ret void954;955 call <3 x i32> asm sideeffect "; def $0", "=a"()956 call void @use_most()957 ret void958}959 960define amdgpu_kernel void @knowable_indirect_call(i1 %cond) {961; CHECK-LABEL: define amdgpu_kernel void @knowable_indirect_call(962; CHECK-SAME: i1 [[COND:%.*]]) #[[ATTR22]] {963; CHECK-NEXT: [[FPTR:%.*]] = select i1 [[COND]], ptr @indirect_0, ptr @indirect_1964; CHECK-NEXT: [[TMP1:%.*]] = icmp eq ptr [[FPTR]], @indirect_1965; CHECK-NEXT: br i1 [[TMP1]], label [[TMP2:%.*]], label [[TMP3:%.*]]966; CHECK: 2:967; CHECK-NEXT: call void @indirect_1()968; CHECK-NEXT: br label [[TMP6:%.*]]969; CHECK: 3:970; CHECK-NEXT: br i1 true, label [[TMP4:%.*]], label [[TMP5:%.*]]971; CHECK: 4:972; CHECK-NEXT: call void @indirect_0()973; CHECK-NEXT: br label [[TMP6]]974; CHECK: 5:975; CHECK-NEXT: unreachable976; CHECK: 6:977; CHECK-NEXT: call void @use_most()978; CHECK-NEXT: ret void979;980 %fptr = select i1 %cond, ptr @indirect_0, ptr @indirect_1981 call void %fptr()982 call void @use_most()983 ret void984}985 986define amdgpu_kernel void @calls_poison(i1 %cond) {987; CHECK-LABEL: define amdgpu_kernel void @calls_poison(988; CHECK-SAME: i1 [[COND:%.*]]) #[[ATTR3]] {989; CHECK-NEXT: call void poison()990; CHECK-NEXT: call void @use_most()991; CHECK-NEXT: ret void992;993 call void poison()994 call void @use_most()995 ret void996}997 998define amdgpu_kernel void @calls_null(i1 %cond) {999; CHECK-LABEL: define amdgpu_kernel void @calls_null(1000; CHECK-SAME: i1 [[COND:%.*]]) #[[ATTR3]] {1001; CHECK-NEXT: call void null()1002; CHECK-NEXT: call void @use_most()1003; CHECK-NEXT: ret void1004;1005 call void null()1006 call void @use_most()1007 ret void1008}1009 1010define amdgpu_kernel void @indirect_unknown(ptr %fptr) {1011; CHECK-LABEL: define amdgpu_kernel void @indirect_unknown(1012; CHECK-SAME: ptr [[FPTR:%.*]]) #[[ATTR3]] {1013; CHECK-NEXT: call void [[FPTR]]()1014; CHECK-NEXT: ret void1015;1016 call void %fptr()1017 ret void1018}1019 1020attributes #0 = { "amdgpu-agpr-alloc"="0" }1021attributes #1 = { "amdgpu-waves-per-eu"="1,1" }1022 1023!0 = !{!"a55"}1024!1 = !{!"v55"}1025!2 = !{!"a[55:57]"}1026!3 = !{!"a[56:59]"}1027!4 = !{!"a256"}1028 1029;.1030; CHECK: attributes #[[ATTR0]] = { "amdgpu-agpr-alloc"="0" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1031; CHECK: attributes #[[ATTR1]] = { "amdgpu-agpr-alloc"="1" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1032; CHECK: attributes #[[ATTR2]] = { "amdgpu-agpr-alloc"="2" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1033; CHECK: attributes #[[ATTR3]] = { "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1034; CHECK: attributes #[[ATTR4:[0-9]+]] = { convergent nocallback nofree nosync nounwind willreturn memory(none) "target-cpu"="gfx90a" }1035; CHECK: attributes #[[ATTR5]] = { "amdgpu-agpr-alloc"="4" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1036; CHECK: attributes #[[ATTR6]] = { "amdgpu-agpr-alloc"="6" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1037; CHECK: attributes #[[ATTR7]] = { "amdgpu-agpr-alloc"="5" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1038; CHECK: attributes #[[ATTR8]] = { "amdgpu-agpr-alloc"="14" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1039; CHECK: attributes #[[ATTR9]] = { "amdgpu-agpr-alloc"="256" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1040; CHECK: attributes #[[ATTR10]] = { "amdgpu-agpr-alloc"="32" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1041; CHECK: attributes #[[ATTR11]] = { "amdgpu-agpr-alloc"="9" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1042; CHECK: attributes #[[ATTR12]] = { "amdgpu-agpr-alloc"="64" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1043; CHECK: attributes #[[ATTR13]] = { "amdgpu-agpr-alloc"="49" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1044; CHECK: attributes #[[ATTR14]] = { "amdgpu-agpr-alloc"="33" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1045; CHECK: attributes #[[ATTR15]] = { "amdgpu-agpr-alloc"="8" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1046; CHECK: attributes #[[ATTR16]] = { "amdgpu-agpr-alloc"="13" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1047; CHECK: attributes #[[ATTR17]] = { "amdgpu-agpr-alloc"="56" "amdgpu-no-cluster-id-x" "amdgpu-no-cluster-id-y" "amdgpu-no-cluster-id-z" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1048; CHECK: attributes #[[ATTR18]] = { "amdgpu-agpr-alloc"="58" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1049; CHECK: attributes #[[ATTR19]] = { "amdgpu-agpr-alloc"="56" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1050; CHECK: attributes #[[ATTR20]] = { "amdgpu-agpr-alloc"="60" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1051; CHECK: attributes #[[ATTR21]] = { "amdgpu-agpr-alloc"="256" "amdgpu-waves-per-eu"="1,1" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1052; CHECK: attributes #[[ATTR22]] = { "amdgpu-agpr-alloc"="7" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1053; CHECK: attributes #[[ATTR23]] = { "amdgpu-agpr-alloc"="3" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }1054; CHECK: attributes #[[ATTR24:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) "target-cpu"="gfx90a" }1055; CHECK: attributes #[[ATTR25:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: readwrite) "target-cpu"="gfx90a" }1056; CHECK: attributes #[[ATTR26:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(read) "target-cpu"="gfx90a" }1057; CHECK: attributes #[[ATTR27:[0-9]+]] = { nounwind "target-cpu"="gfx90a" }1058; CHECK: attributes #[[ATTR28:[0-9]+]] = { nocallback nounwind "target-cpu"="gfx90a" }1059; CHECK: attributes #[[ATTR29]] = { "amdgpu-agpr-alloc"="0" }1060;.1061; CHECK: [[META0]] = !{!"a55"}1062; CHECK: [[META1]] = !{!"v55"}1063; CHECK: [[META2]] = !{!"a[55:57]"}1064; CHECK: [[META3]] = !{!"a[56:59]"}1065; CHECK: [[META4]] = !{!"a256"}1066;.1067