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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefix=ATTRIB %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -amdgpu-nsa-threshold=2 < %s | FileCheck -check-prefix=FORCE-2 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -amdgpu-nsa-threshold=3 < %s | FileCheck -check-prefix=FORCE-3 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -amdgpu-nsa-threshold=4 < %s | FileCheck -check-prefix=FORCE-4 %s6 7; Note: command line argument should override function attribute.8 9define amdgpu_ps <4 x float> @sample_2d_nsa2(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %t, float %s) #2 {10; ATTRIB-LABEL: sample_2d_nsa2:11; ATTRIB: ; %bb.0: ; %main_body12; ATTRIB-NEXT: s_mov_b32 s12, exec_lo13; ATTRIB-NEXT: s_wqm_b32 exec_lo, exec_lo14; ATTRIB-NEXT: s_delay_alu instid0(SALU_CYCLE_1)15; ATTRIB-NEXT: s_and_b32 exec_lo, exec_lo, s1216; ATTRIB-NEXT: image_sample v[0:3], [v1, v0], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D17; ATTRIB-NEXT: s_waitcnt vmcnt(0)18; ATTRIB-NEXT: ; return to shader part epilog19;20; FORCE-2-LABEL: sample_2d_nsa2:21; FORCE-2: ; %bb.0: ; %main_body22; FORCE-2-NEXT: s_mov_b32 s12, exec_lo23; FORCE-2-NEXT: s_wqm_b32 exec_lo, exec_lo24; FORCE-2-NEXT: s_delay_alu instid0(SALU_CYCLE_1)25; FORCE-2-NEXT: s_and_b32 exec_lo, exec_lo, s1226; FORCE-2-NEXT: image_sample v[0:3], [v1, v0], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D27; FORCE-2-NEXT: s_waitcnt vmcnt(0)28; FORCE-2-NEXT: ; return to shader part epilog29;30; FORCE-3-LABEL: sample_2d_nsa2:31; FORCE-3: ; %bb.0: ; %main_body32; FORCE-3-NEXT: s_mov_b32 s12, exec_lo33; FORCE-3-NEXT: s_wqm_b32 exec_lo, exec_lo34; FORCE-3-NEXT: v_mov_b32_e32 v2, v035; FORCE-3-NEXT: s_and_b32 exec_lo, exec_lo, s1236; FORCE-3-NEXT: image_sample v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D37; FORCE-3-NEXT: s_waitcnt vmcnt(0)38; FORCE-3-NEXT: ; return to shader part epilog39;40; FORCE-4-LABEL: sample_2d_nsa2:41; FORCE-4: ; %bb.0: ; %main_body42; FORCE-4-NEXT: s_mov_b32 s12, exec_lo43; FORCE-4-NEXT: s_wqm_b32 exec_lo, exec_lo44; FORCE-4-NEXT: v_mov_b32_e32 v2, v045; FORCE-4-NEXT: s_and_b32 exec_lo, exec_lo, s1246; FORCE-4-NEXT: image_sample v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D47; FORCE-4-NEXT: s_waitcnt vmcnt(0)48; FORCE-4-NEXT: ; return to shader part epilog49main_body:50 %v = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)51 ret <4 x float> %v52}53 54define amdgpu_ps <4 x float> @sample_3d_nsa2(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %r, float %s, float %t) #2 {55; ATTRIB-LABEL: sample_3d_nsa2:56; ATTRIB: ; %bb.0: ; %main_body57; ATTRIB-NEXT: s_mov_b32 s12, exec_lo58; ATTRIB-NEXT: s_wqm_b32 exec_lo, exec_lo59; ATTRIB-NEXT: s_delay_alu instid0(SALU_CYCLE_1)60; ATTRIB-NEXT: s_and_b32 exec_lo, exec_lo, s1261; ATTRIB-NEXT: image_sample v[0:3], [v1, v2, v0], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D62; ATTRIB-NEXT: s_waitcnt vmcnt(0)63; ATTRIB-NEXT: ; return to shader part epilog64;65; FORCE-2-LABEL: sample_3d_nsa2:66; FORCE-2: ; %bb.0: ; %main_body67; FORCE-2-NEXT: s_mov_b32 s12, exec_lo68; FORCE-2-NEXT: s_wqm_b32 exec_lo, exec_lo69; FORCE-2-NEXT: s_delay_alu instid0(SALU_CYCLE_1)70; FORCE-2-NEXT: s_and_b32 exec_lo, exec_lo, s1271; FORCE-2-NEXT: image_sample v[0:3], [v1, v2, v0], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D72; FORCE-2-NEXT: s_waitcnt vmcnt(0)73; FORCE-2-NEXT: ; return to shader part epilog74;75; FORCE-3-LABEL: sample_3d_nsa2:76; FORCE-3: ; %bb.0: ; %main_body77; FORCE-3-NEXT: s_mov_b32 s12, exec_lo78; FORCE-3-NEXT: s_wqm_b32 exec_lo, exec_lo79; FORCE-3-NEXT: s_delay_alu instid0(SALU_CYCLE_1)80; FORCE-3-NEXT: s_and_b32 exec_lo, exec_lo, s1281; FORCE-3-NEXT: image_sample v[0:3], [v1, v2, v0], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D82; FORCE-3-NEXT: s_waitcnt vmcnt(0)83; FORCE-3-NEXT: ; return to shader part epilog84;85; FORCE-4-LABEL: sample_3d_nsa2:86; FORCE-4: ; %bb.0: ; %main_body87; FORCE-4-NEXT: s_mov_b32 s12, exec_lo88; FORCE-4-NEXT: s_wqm_b32 exec_lo, exec_lo89; FORCE-4-NEXT: v_mov_b32_e32 v3, v090; FORCE-4-NEXT: s_and_b32 exec_lo, exec_lo, s1291; FORCE-4-NEXT: image_sample v[0:3], v[1:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D92; FORCE-4-NEXT: s_waitcnt vmcnt(0)93; FORCE-4-NEXT: ; return to shader part epilog94main_body:95 %v = call <4 x float> @llvm.amdgcn.image.sample.3d.v4f32.f32(i32 15, float %s, float %t, float %r, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)96 ret <4 x float> %v97}98 99define amdgpu_ps <4 x float> @sample_2d_nsa3(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %t, float %s) #3 {100; ATTRIB-LABEL: sample_2d_nsa3:101; ATTRIB: ; %bb.0: ; %main_body102; ATTRIB-NEXT: s_mov_b32 s12, exec_lo103; ATTRIB-NEXT: s_wqm_b32 exec_lo, exec_lo104; ATTRIB-NEXT: v_mov_b32_e32 v2, v0105; ATTRIB-NEXT: s_and_b32 exec_lo, exec_lo, s12106; ATTRIB-NEXT: image_sample v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D107; ATTRIB-NEXT: s_waitcnt vmcnt(0)108; ATTRIB-NEXT: ; return to shader part epilog109;110; FORCE-2-LABEL: sample_2d_nsa3:111; FORCE-2: ; %bb.0: ; %main_body112; FORCE-2-NEXT: s_mov_b32 s12, exec_lo113; FORCE-2-NEXT: s_wqm_b32 exec_lo, exec_lo114; FORCE-2-NEXT: s_delay_alu instid0(SALU_CYCLE_1)115; FORCE-2-NEXT: s_and_b32 exec_lo, exec_lo, s12116; FORCE-2-NEXT: image_sample v[0:3], [v1, v0], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D117; FORCE-2-NEXT: s_waitcnt vmcnt(0)118; FORCE-2-NEXT: ; return to shader part epilog119;120; FORCE-3-LABEL: sample_2d_nsa3:121; FORCE-3: ; %bb.0: ; %main_body122; FORCE-3-NEXT: s_mov_b32 s12, exec_lo123; FORCE-3-NEXT: s_wqm_b32 exec_lo, exec_lo124; FORCE-3-NEXT: v_mov_b32_e32 v2, v0125; FORCE-3-NEXT: s_and_b32 exec_lo, exec_lo, s12126; FORCE-3-NEXT: image_sample v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D127; FORCE-3-NEXT: s_waitcnt vmcnt(0)128; FORCE-3-NEXT: ; return to shader part epilog129;130; FORCE-4-LABEL: sample_2d_nsa3:131; FORCE-4: ; %bb.0: ; %main_body132; FORCE-4-NEXT: s_mov_b32 s12, exec_lo133; FORCE-4-NEXT: s_wqm_b32 exec_lo, exec_lo134; FORCE-4-NEXT: v_mov_b32_e32 v2, v0135; FORCE-4-NEXT: s_and_b32 exec_lo, exec_lo, s12136; FORCE-4-NEXT: image_sample v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D137; FORCE-4-NEXT: s_waitcnt vmcnt(0)138; FORCE-4-NEXT: ; return to shader part epilog139main_body:140 %v = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)141 ret <4 x float> %v142}143 144define amdgpu_ps <4 x float> @sample_3d_nsa3(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %r, float %s, float %t) #3 {145; ATTRIB-LABEL: sample_3d_nsa3:146; ATTRIB: ; %bb.0: ; %main_body147; ATTRIB-NEXT: s_mov_b32 s12, exec_lo148; ATTRIB-NEXT: s_wqm_b32 exec_lo, exec_lo149; ATTRIB-NEXT: s_delay_alu instid0(SALU_CYCLE_1)150; ATTRIB-NEXT: s_and_b32 exec_lo, exec_lo, s12151; ATTRIB-NEXT: image_sample v[0:3], [v1, v2, v0], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D152; ATTRIB-NEXT: s_waitcnt vmcnt(0)153; ATTRIB-NEXT: ; return to shader part epilog154;155; FORCE-2-LABEL: sample_3d_nsa3:156; FORCE-2: ; %bb.0: ; %main_body157; FORCE-2-NEXT: s_mov_b32 s12, exec_lo158; FORCE-2-NEXT: s_wqm_b32 exec_lo, exec_lo159; FORCE-2-NEXT: s_delay_alu instid0(SALU_CYCLE_1)160; FORCE-2-NEXT: s_and_b32 exec_lo, exec_lo, s12161; FORCE-2-NEXT: image_sample v[0:3], [v1, v2, v0], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D162; FORCE-2-NEXT: s_waitcnt vmcnt(0)163; FORCE-2-NEXT: ; return to shader part epilog164;165; FORCE-3-LABEL: sample_3d_nsa3:166; FORCE-3: ; %bb.0: ; %main_body167; FORCE-3-NEXT: s_mov_b32 s12, exec_lo168; FORCE-3-NEXT: s_wqm_b32 exec_lo, exec_lo169; FORCE-3-NEXT: s_delay_alu instid0(SALU_CYCLE_1)170; FORCE-3-NEXT: s_and_b32 exec_lo, exec_lo, s12171; FORCE-3-NEXT: image_sample v[0:3], [v1, v2, v0], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D172; FORCE-3-NEXT: s_waitcnt vmcnt(0)173; FORCE-3-NEXT: ; return to shader part epilog174;175; FORCE-4-LABEL: sample_3d_nsa3:176; FORCE-4: ; %bb.0: ; %main_body177; FORCE-4-NEXT: s_mov_b32 s12, exec_lo178; FORCE-4-NEXT: s_wqm_b32 exec_lo, exec_lo179; FORCE-4-NEXT: v_mov_b32_e32 v3, v0180; FORCE-4-NEXT: s_and_b32 exec_lo, exec_lo, s12181; FORCE-4-NEXT: image_sample v[0:3], v[1:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D182; FORCE-4-NEXT: s_waitcnt vmcnt(0)183; FORCE-4-NEXT: ; return to shader part epilog184main_body:185 %v = call <4 x float> @llvm.amdgcn.image.sample.3d.v4f32.f32(i32 15, float %s, float %t, float %r, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)186 ret <4 x float> %v187}188 189define amdgpu_ps <4 x float> @sample_2d_nsa4(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %t, float %s) #4 {190; ATTRIB-LABEL: sample_2d_nsa4:191; ATTRIB: ; %bb.0: ; %main_body192; ATTRIB-NEXT: s_mov_b32 s12, exec_lo193; ATTRIB-NEXT: s_wqm_b32 exec_lo, exec_lo194; ATTRIB-NEXT: v_mov_b32_e32 v2, v0195; ATTRIB-NEXT: s_and_b32 exec_lo, exec_lo, s12196; ATTRIB-NEXT: image_sample v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D197; ATTRIB-NEXT: s_waitcnt vmcnt(0)198; ATTRIB-NEXT: ; return to shader part epilog199;200; FORCE-2-LABEL: sample_2d_nsa4:201; FORCE-2: ; %bb.0: ; %main_body202; FORCE-2-NEXT: s_mov_b32 s12, exec_lo203; FORCE-2-NEXT: s_wqm_b32 exec_lo, exec_lo204; FORCE-2-NEXT: s_delay_alu instid0(SALU_CYCLE_1)205; FORCE-2-NEXT: s_and_b32 exec_lo, exec_lo, s12206; FORCE-2-NEXT: image_sample v[0:3], [v1, v0], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D207; FORCE-2-NEXT: s_waitcnt vmcnt(0)208; FORCE-2-NEXT: ; return to shader part epilog209;210; FORCE-3-LABEL: sample_2d_nsa4:211; FORCE-3: ; %bb.0: ; %main_body212; FORCE-3-NEXT: s_mov_b32 s12, exec_lo213; FORCE-3-NEXT: s_wqm_b32 exec_lo, exec_lo214; FORCE-3-NEXT: v_mov_b32_e32 v2, v0215; FORCE-3-NEXT: s_and_b32 exec_lo, exec_lo, s12216; FORCE-3-NEXT: image_sample v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D217; FORCE-3-NEXT: s_waitcnt vmcnt(0)218; FORCE-3-NEXT: ; return to shader part epilog219;220; FORCE-4-LABEL: sample_2d_nsa4:221; FORCE-4: ; %bb.0: ; %main_body222; FORCE-4-NEXT: s_mov_b32 s12, exec_lo223; FORCE-4-NEXT: s_wqm_b32 exec_lo, exec_lo224; FORCE-4-NEXT: v_mov_b32_e32 v2, v0225; FORCE-4-NEXT: s_and_b32 exec_lo, exec_lo, s12226; FORCE-4-NEXT: image_sample v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D227; FORCE-4-NEXT: s_waitcnt vmcnt(0)228; FORCE-4-NEXT: ; return to shader part epilog229main_body:230 %v = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)231 ret <4 x float> %v232}233 234define amdgpu_ps <4 x float> @sample_3d_nsa4(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %r, float %s, float %t) #4 {235; ATTRIB-LABEL: sample_3d_nsa4:236; ATTRIB: ; %bb.0: ; %main_body237; ATTRIB-NEXT: s_mov_b32 s12, exec_lo238; ATTRIB-NEXT: s_wqm_b32 exec_lo, exec_lo239; ATTRIB-NEXT: v_mov_b32_e32 v3, v0240; ATTRIB-NEXT: s_and_b32 exec_lo, exec_lo, s12241; ATTRIB-NEXT: image_sample v[0:3], v[1:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D242; ATTRIB-NEXT: s_waitcnt vmcnt(0)243; ATTRIB-NEXT: ; return to shader part epilog244;245; FORCE-2-LABEL: sample_3d_nsa4:246; FORCE-2: ; %bb.0: ; %main_body247; FORCE-2-NEXT: s_mov_b32 s12, exec_lo248; FORCE-2-NEXT: s_wqm_b32 exec_lo, exec_lo249; FORCE-2-NEXT: s_delay_alu instid0(SALU_CYCLE_1)250; FORCE-2-NEXT: s_and_b32 exec_lo, exec_lo, s12251; FORCE-2-NEXT: image_sample v[0:3], [v1, v2, v0], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D252; FORCE-2-NEXT: s_waitcnt vmcnt(0)253; FORCE-2-NEXT: ; return to shader part epilog254;255; FORCE-3-LABEL: sample_3d_nsa4:256; FORCE-3: ; %bb.0: ; %main_body257; FORCE-3-NEXT: s_mov_b32 s12, exec_lo258; FORCE-3-NEXT: s_wqm_b32 exec_lo, exec_lo259; FORCE-3-NEXT: s_delay_alu instid0(SALU_CYCLE_1)260; FORCE-3-NEXT: s_and_b32 exec_lo, exec_lo, s12261; FORCE-3-NEXT: image_sample v[0:3], [v1, v2, v0], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D262; FORCE-3-NEXT: s_waitcnt vmcnt(0)263; FORCE-3-NEXT: ; return to shader part epilog264;265; FORCE-4-LABEL: sample_3d_nsa4:266; FORCE-4: ; %bb.0: ; %main_body267; FORCE-4-NEXT: s_mov_b32 s12, exec_lo268; FORCE-4-NEXT: s_wqm_b32 exec_lo, exec_lo269; FORCE-4-NEXT: v_mov_b32_e32 v3, v0270; FORCE-4-NEXT: s_and_b32 exec_lo, exec_lo, s12271; FORCE-4-NEXT: image_sample v[0:3], v[1:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D272; FORCE-4-NEXT: s_waitcnt vmcnt(0)273; FORCE-4-NEXT: ; return to shader part epilog274main_body:275 %v = call <4 x float> @llvm.amdgcn.image.sample.3d.v4f32.f32(i32 15, float %s, float %t, float %r, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)276 ret <4 x float> %v277}278 279declare <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1280declare <4 x float> @llvm.amdgcn.image.sample.3d.v4f32.f32(i32, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1281 282attributes #1 = { nounwind readonly }283attributes #2 = { nounwind readonly "amdgpu-nsa-threshold"="2" }284attributes #3 = { nounwind readonly "amdgpu-nsa-threshold"="3" }285attributes #4 = { nounwind readonly "amdgpu-nsa-threshold"="4" }286