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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt < %s -passes=amdgpu-sw-lower-lds -S -mtriple=amdgcn-amd-amdhsa | FileCheck %s3 4; Test to check when multiple kernels access the same non-kernel, LDS accesses are lowere correctly.5@lds_1 = internal addrspace(3) global [1 x i8] poison, align 16@lds_2 = internal addrspace(3) global [1 x i32] poison, align 27@lds_3 = external addrspace(3) global [0 x i8], align 48@lds_4 = external addrspace(3) global [0 x i8], align 89 10define void @use_variables_1() sanitize_address {11; CHECK-LABEL: define void @use_variables_1(12; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {13; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()14; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x ptr addrspace(3)], ptr addrspace(1) @llvm.amdgcn.sw.lds.base.table, i32 0, i32 [[TMP1]]15; CHECK-NEXT: [[TMP4:%.*]] = load ptr addrspace(3), ptr addrspace(1) [[TMP2]], align 416; CHECK-NEXT: [[TMP7:%.*]] = load ptr addrspace(1), ptr addrspace(3) [[TMP4]], align 817; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x [4 x ptr addrspace(1)]], ptr addrspace(1) @llvm.amdgcn.sw.lds.offset.table, i32 0, i32 [[TMP1]], i32 218; CHECK-NEXT: [[TMP5:%.*]] = load ptr addrspace(1), ptr addrspace(1) [[TMP6]], align 819; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(1) [[TMP5]], align 420; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP4]], i32 [[TMP8]]21; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x [4 x ptr addrspace(1)]], ptr addrspace(1) @llvm.amdgcn.sw.lds.offset.table, i32 0, i32 [[TMP1]], i32 322; CHECK-NEXT: [[TMP12:%.*]] = load ptr addrspace(1), ptr addrspace(1) [[TMP11]], align 823; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(1) [[TMP12]], align 424; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP4]], i32 [[TMP10]]25; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr addrspace(3) [[TMP9]] to i3226; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP7]], i32 [[TMP13]]27; CHECK-NEXT: [[TMP47:%.*]] = ptrtoint ptr addrspace(1) [[TMP14]] to i6428; CHECK-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP47]], 329; CHECK-NEXT: [[TMP17:%.*]] = add i64 [[TMP16]], 214745088030; CHECK-NEXT: [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr31; CHECK-NEXT: [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 132; CHECK-NEXT: [[TMP20:%.*]] = icmp ne i8 [[TMP19]], 033; CHECK-NEXT: [[TMP21:%.*]] = and i64 [[TMP47]], 734; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i835; CHECK-NEXT: [[TMP23:%.*]] = icmp sge i8 [[TMP22]], [[TMP19]]36; CHECK-NEXT: [[TMP24:%.*]] = and i1 [[TMP20]], [[TMP23]]37; CHECK-NEXT: [[TMP25:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP24]])38; CHECK-NEXT: [[TMP26:%.*]] = icmp ne i64 [[TMP25]], 039; CHECK-NEXT: br i1 [[TMP26]], label [[ASAN_REPORT:%.*]], label [[TMP29:%.*]], !prof [[PROF3:![0-9]+]]40; CHECK: asan.report:41; CHECK-NEXT: br i1 [[TMP24]], label [[TMP27:%.*]], label [[TMP28:%.*]]42; CHECK: 27:43; CHECK-NEXT: call void @__asan_report_store1(i64 [[TMP47]]) #[[ATTR7:[0-9]+]]44; CHECK-NEXT: call void @llvm.amdgcn.unreachable()45; CHECK-NEXT: br label [[TMP28]]46; CHECK: 28:47; CHECK-NEXT: br label [[TMP29]]48; CHECK: 29:49; CHECK-NEXT: store i8 3, ptr addrspace(1) [[TMP14]], align 450; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr addrspace(3) [[TMP15]] to i3251; CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP7]], i32 [[TMP30]]52; CHECK-NEXT: [[TMP32:%.*]] = ptrtoint ptr addrspace(1) [[TMP31]] to i6453; CHECK-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 354; CHECK-NEXT: [[TMP34:%.*]] = add i64 [[TMP33]], 214745088055; CHECK-NEXT: [[TMP35:%.*]] = inttoptr i64 [[TMP34]] to ptr56; CHECK-NEXT: [[TMP36:%.*]] = load i8, ptr [[TMP35]], align 157; CHECK-NEXT: [[TMP37:%.*]] = icmp ne i8 [[TMP36]], 058; CHECK-NEXT: [[TMP38:%.*]] = and i64 [[TMP32]], 759; CHECK-NEXT: [[TMP39:%.*]] = trunc i64 [[TMP38]] to i860; CHECK-NEXT: [[TMP40:%.*]] = icmp sge i8 [[TMP39]], [[TMP36]]61; CHECK-NEXT: [[TMP41:%.*]] = and i1 [[TMP37]], [[TMP40]]62; CHECK-NEXT: [[TMP42:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP41]])63; CHECK-NEXT: [[TMP43:%.*]] = icmp ne i64 [[TMP42]], 064; CHECK-NEXT: br i1 [[TMP43]], label [[ASAN_REPORT1:%.*]], label [[TMP46:%.*]], !prof [[PROF3]]65; CHECK: asan.report1:66; CHECK-NEXT: br i1 [[TMP41]], label [[TMP44:%.*]], label [[TMP45:%.*]]67; CHECK: 44:68; CHECK-NEXT: call void @__asan_report_store1(i64 [[TMP32]]) #[[ATTR7]]69; CHECK-NEXT: call void @llvm.amdgcn.unreachable()70; CHECK-NEXT: br label [[TMP45]]71; CHECK: 45:72; CHECK-NEXT: br label [[TMP46]]73; CHECK: 46:74; CHECK-NEXT: store i8 3, ptr addrspace(1) [[TMP31]], align 875; CHECK-NEXT: ret void76;77 store i8 3, ptr addrspace(3) @lds_3, align 478 store i8 3, ptr addrspace(3) @lds_4, align 879 ret void80}81 82define void @use_variables_2() sanitize_address {83; CHECK-LABEL: define void @use_variables_2(84; CHECK-SAME: ) #[[ATTR0]] {85; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()86; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x ptr addrspace(3)], ptr addrspace(1) @llvm.amdgcn.sw.lds.base.table, i32 0, i32 [[TMP1]]87; CHECK-NEXT: [[TMP4:%.*]] = load ptr addrspace(3), ptr addrspace(1) [[TMP2]], align 488; CHECK-NEXT: [[TMP7:%.*]] = load ptr addrspace(1), ptr addrspace(3) [[TMP4]], align 889; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x [4 x ptr addrspace(1)]], ptr addrspace(1) @llvm.amdgcn.sw.lds.offset.table, i32 0, i32 [[TMP1]], i32 090; CHECK-NEXT: [[TMP5:%.*]] = load ptr addrspace(1), ptr addrspace(1) [[TMP6]], align 891; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(1) [[TMP5]], align 492; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP4]], i32 [[TMP8]]93; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x [4 x ptr addrspace(1)]], ptr addrspace(1) @llvm.amdgcn.sw.lds.offset.table, i32 0, i32 [[TMP1]], i32 194; CHECK-NEXT: [[TMP12:%.*]] = load ptr addrspace(1), ptr addrspace(1) [[TMP11]], align 895; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(1) [[TMP12]], align 496; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP4]], i32 [[TMP10]]97; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr addrspace(3) [[TMP9]] to i3298; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP7]], i32 [[TMP13]]99; CHECK-NEXT: [[TMP48:%.*]] = ptrtoint ptr addrspace(1) [[TMP14]] to i64100; CHECK-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP48]], 3101; CHECK-NEXT: [[TMP17:%.*]] = add i64 [[TMP16]], 2147450880102; CHECK-NEXT: [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr103; CHECK-NEXT: [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1104; CHECK-NEXT: [[TMP20:%.*]] = icmp ne i8 [[TMP19]], 0105; CHECK-NEXT: [[TMP21:%.*]] = and i64 [[TMP48]], 7106; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i8107; CHECK-NEXT: [[TMP23:%.*]] = icmp sge i8 [[TMP22]], [[TMP19]]108; CHECK-NEXT: [[TMP24:%.*]] = and i1 [[TMP20]], [[TMP23]]109; CHECK-NEXT: [[TMP25:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP24]])110; CHECK-NEXT: [[TMP26:%.*]] = icmp ne i64 [[TMP25]], 0111; CHECK-NEXT: br i1 [[TMP26]], label [[ASAN_REPORT:%.*]], label [[TMP29:%.*]], !prof [[PROF3]]112; CHECK: asan.report:113; CHECK-NEXT: br i1 [[TMP24]], label [[TMP27:%.*]], label [[TMP28:%.*]]114; CHECK: 27:115; CHECK-NEXT: call void @__asan_report_store1(i64 [[TMP48]]) #[[ATTR7]]116; CHECK-NEXT: call void @llvm.amdgcn.unreachable()117; CHECK-NEXT: br label [[TMP28]]118; CHECK: 28:119; CHECK-NEXT: br label [[TMP29]]120; CHECK: 29:121; CHECK-NEXT: store i8 7, ptr addrspace(1) [[TMP14]], align 1122; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr addrspace(3) [[TMP15]] to i32123; CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP7]], i32 [[TMP30]]124; CHECK-NEXT: [[TMP32:%.*]] = ptrtoint ptr addrspace(1) [[TMP31]] to i64125; CHECK-NEXT: [[TMP38:%.*]] = add i64 [[TMP32]], 3126; CHECK-NEXT: [[TMP49:%.*]] = inttoptr i64 [[TMP38]] to ptr addrspace(1)127; CHECK-NEXT: [[TMP65:%.*]] = ptrtoint ptr addrspace(1) [[TMP31]] to i64128; CHECK-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP65]], 3129; CHECK-NEXT: [[TMP34:%.*]] = add i64 [[TMP33]], 2147450880130; CHECK-NEXT: [[TMP35:%.*]] = inttoptr i64 [[TMP34]] to ptr131; CHECK-NEXT: [[TMP36:%.*]] = load i8, ptr [[TMP35]], align 1132; CHECK-NEXT: [[TMP37:%.*]] = icmp ne i8 [[TMP36]], 0133; CHECK-NEXT: [[TMP39:%.*]] = and i64 [[TMP65]], 7134; CHECK-NEXT: [[TMP40:%.*]] = trunc i64 [[TMP39]] to i8135; CHECK-NEXT: [[TMP41:%.*]] = icmp sge i8 [[TMP40]], [[TMP36]]136; CHECK-NEXT: [[TMP42:%.*]] = and i1 [[TMP37]], [[TMP41]]137; CHECK-NEXT: [[TMP43:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP42]])138; CHECK-NEXT: [[TMP44:%.*]] = icmp ne i64 [[TMP43]], 0139; CHECK-NEXT: br i1 [[TMP44]], label [[ASAN_REPORT1:%.*]], label [[TMP47:%.*]], !prof [[PROF3]]140; CHECK: asan.report1:141; CHECK-NEXT: br i1 [[TMP42]], label [[TMP45:%.*]], label [[TMP46:%.*]]142; CHECK: 47:143; CHECK-NEXT: call void @__asan_report_store1(i64 [[TMP65]]) #[[ATTR7]]144; CHECK-NEXT: call void @llvm.amdgcn.unreachable()145; CHECK-NEXT: br label [[TMP46]]146; CHECK: 48:147; CHECK-NEXT: br label [[TMP47]]148; CHECK: 49:149; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr addrspace(1) [[TMP49]] to i64150; CHECK-NEXT: [[TMP51:%.*]] = lshr i64 [[TMP50]], 3151; CHECK-NEXT: [[TMP52:%.*]] = add i64 [[TMP51]], 2147450880152; CHECK-NEXT: [[TMP53:%.*]] = inttoptr i64 [[TMP52]] to ptr153; CHECK-NEXT: [[TMP54:%.*]] = load i8, ptr [[TMP53]], align 1154; CHECK-NEXT: [[TMP55:%.*]] = icmp ne i8 [[TMP54]], 0155; CHECK-NEXT: [[TMP56:%.*]] = and i64 [[TMP50]], 7156; CHECK-NEXT: [[TMP57:%.*]] = trunc i64 [[TMP56]] to i8157; CHECK-NEXT: [[TMP58:%.*]] = icmp sge i8 [[TMP57]], [[TMP54]]158; CHECK-NEXT: [[TMP59:%.*]] = and i1 [[TMP55]], [[TMP58]]159; CHECK-NEXT: [[TMP60:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP59]])160; CHECK-NEXT: [[TMP61:%.*]] = icmp ne i64 [[TMP60]], 0161; CHECK-NEXT: br i1 [[TMP61]], label [[ASAN_REPORT2:%.*]], label [[TMP64:%.*]], !prof [[PROF3]]162; CHECK: asan.report2:163; CHECK-NEXT: br i1 [[TMP59]], label [[TMP62:%.*]], label [[TMP63:%.*]]164; CHECK: 62:165; CHECK-NEXT: call void @__asan_report_store1(i64 [[TMP50]]) #[[ATTR7]]166; CHECK-NEXT: call void @llvm.amdgcn.unreachable()167; CHECK-NEXT: br label [[TMP63]]168; CHECK: 63:169; CHECK-NEXT: br label [[TMP64]]170; CHECK: 64:171; CHECK-NEXT: store i32 8, ptr addrspace(1) [[TMP31]], align 2172; CHECK-NEXT: ret void173;174 store i8 7, ptr addrspace(3) @lds_1, align 1175 store i32 8, ptr addrspace(3) @lds_2, align 2176 ret void177}178 179define amdgpu_kernel void @k0() sanitize_address {180; CHECK-LABEL: define amdgpu_kernel void @k0(181; CHECK-SAME: ) #[[ATTR1:[0-9]+]] !llvm.amdgcn.lds.kernel.id [[META4:![0-9]+]] {182; CHECK-NEXT: WId:183; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()184; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.workitem.id.y()185; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.amdgcn.workitem.id.z()186; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP0]], [[TMP1]]187; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[TMP2]]188; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0189; CHECK-NEXT: br i1 [[TMP5]], label [[MALLOC:%.*]], label [[TMP21:%.*]]190; CHECK: Malloc:191; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE:%.*]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 1, i32 0), align 4192; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 1, i32 2), align 4193; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP9]], [[TMP7]]194; CHECK-NEXT: [[TMP6:%.*]] = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()195; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds ptr addrspace(4), ptr addrspace(4) [[TMP6]], i64 15196; CHECK-NEXT: store i32 [[TMP8]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 2, i32 0), align 4197; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(4) [[TMP10]], align 4198; CHECK-NEXT: store i32 [[TMP11]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 2, i32 1), align 4199; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[TMP11]], 7200; CHECK-NEXT: [[TMP13:%.*]] = udiv i32 [[TMP12]], 8201; CHECK-NEXT: [[TMP14:%.*]] = mul i32 [[TMP13]], 8202; CHECK-NEXT: store i32 [[TMP14]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 2, i32 2), align 4203; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[TMP8]], [[TMP14]]204; CHECK-NEXT: store i32 [[TMP15]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 3, i32 0), align 4205; CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr addrspace(4) [[TMP10]], align 4206; CHECK-NEXT: store i32 [[TMP25]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 3, i32 1), align 4207; CHECK-NEXT: [[TMP17:%.*]] = add i32 [[TMP25]], 7208; CHECK-NEXT: [[TMP18:%.*]] = udiv i32 [[TMP17]], 8209; CHECK-NEXT: [[TMP19:%.*]] = mul i32 [[TMP18]], 8210; CHECK-NEXT: store i32 [[TMP19]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 3, i32 2), align 4211; CHECK-NEXT: [[TMP26:%.*]] = add i32 [[TMP15]], [[TMP19]]212; CHECK-NEXT: [[TMP27:%.*]] = zext i32 [[TMP26]] to i64213; CHECK-NEXT: [[TMP28:%.*]] = call ptr @llvm.returnaddress(i32 0)214; CHECK-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP28]] to i64215; CHECK-NEXT: [[TMP24:%.*]] = call i64 @__asan_malloc_impl(i64 [[TMP27]], i64 [[TMP33]])216; CHECK-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP24]] to ptr addrspace(1)217; CHECK-NEXT: store ptr addrspace(1) [[TMP20]], ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, align 8218; CHECK-NEXT: [[TMP49:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP20]], i64 8219; CHECK-NEXT: [[TMP51:%.*]] = ptrtoint ptr addrspace(1) [[TMP49]] to i64220; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP51]], i64 24)221; CHECK-NEXT: [[TMP52:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP20]], i64 33222; CHECK-NEXT: [[TMP53:%.*]] = ptrtoint ptr addrspace(1) [[TMP52]] to i64223; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP53]], i64 31)224; CHECK-NEXT: br label [[TMP21]]225; CHECK: 30:226; CHECK-NEXT: [[XYZCOND:%.*]] = phi i1 [ false, [[WID:%.*]] ], [ true, [[MALLOC]] ]227; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()228; CHECK-NEXT: [[TMP29:%.*]] = load ptr addrspace(1), ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, align 8229; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 1, i32 0), align 4230; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds i8, ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, i32 [[TMP22]]231; CHECK-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.k0.dynlds) ]232; CHECK-NEXT: call void @use_variables_1()233; CHECK-NEXT: [[TMP34:%.*]] = ptrtoint ptr addrspace(3) [[TMP23]] to i32234; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP29]], i32 [[TMP34]]235; CHECK-NEXT: [[TMP36:%.*]] = ptrtoint ptr addrspace(1) [[TMP35]] to i64236; CHECK-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 3237; CHECK-NEXT: [[TMP38:%.*]] = add i64 [[TMP37]], 2147450880238; CHECK-NEXT: [[TMP39:%.*]] = inttoptr i64 [[TMP38]] to ptr239; CHECK-NEXT: [[TMP40:%.*]] = load i8, ptr [[TMP39]], align 1240; CHECK-NEXT: [[TMP41:%.*]] = icmp ne i8 [[TMP40]], 0241; CHECK-NEXT: [[TMP42:%.*]] = and i64 [[TMP36]], 7242; CHECK-NEXT: [[TMP43:%.*]] = trunc i64 [[TMP42]] to i8243; CHECK-NEXT: [[TMP44:%.*]] = icmp sge i8 [[TMP43]], [[TMP40]]244; CHECK-NEXT: [[TMP45:%.*]] = and i1 [[TMP41]], [[TMP44]]245; CHECK-NEXT: [[TMP46:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP45]])246; CHECK-NEXT: [[TMP47:%.*]] = icmp ne i64 [[TMP46]], 0247; CHECK-NEXT: br i1 [[TMP47]], label [[ASAN_REPORT:%.*]], label [[TMP50:%.*]], !prof [[PROF3]]248; CHECK: asan.report:249; CHECK-NEXT: br i1 [[TMP45]], label [[TMP48:%.*]], label [[CONDFREE:%.*]]250; CHECK: 48:251; CHECK-NEXT: call void @__asan_report_store1(i64 [[TMP36]]) #[[ATTR7]]252; CHECK-NEXT: call void @llvm.amdgcn.unreachable()253; CHECK-NEXT: br label [[CONDFREE]]254; CHECK: 49:255; CHECK-NEXT: br label [[TMP50]]256; CHECK: 50:257; CHECK-NEXT: store i8 7, ptr addrspace(1) [[TMP35]], align 1258; CHECK-NEXT: br label [[CONDFREE1:%.*]]259; CHECK: CondFree:260; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()261; CHECK-NEXT: br i1 [[XYZCOND]], label [[FREE:%.*]], label [[END:%.*]]262; CHECK: Free:263; CHECK-NEXT: [[TMP30:%.*]] = call ptr @llvm.returnaddress(i32 0)264; CHECK-NEXT: [[TMP31:%.*]] = ptrtoint ptr [[TMP30]] to i64265; CHECK-NEXT: [[TMP32:%.*]] = ptrtoint ptr addrspace(1) [[TMP29]] to i64266; CHECK-NEXT: call void @__asan_free_impl(i64 [[TMP32]], i64 [[TMP31]])267; CHECK-NEXT: br label [[END]]268; CHECK: End:269; CHECK-NEXT: ret void270;271 call void @use_variables_1()272 store i8 7, ptr addrspace(3) @lds_1, align 1273 ret void274}275 276define amdgpu_kernel void @k1() sanitize_address {277; CHECK-LABEL: define amdgpu_kernel void @k1(278; CHECK-SAME: ) #[[ATTR1]] !llvm.amdgcn.lds.kernel.id [[META5:![0-9]+]] {279; CHECK-NEXT: WId:280; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()281; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.workitem.id.y()282; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.amdgcn.workitem.id.z()283; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP0]], [[TMP1]]284; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[TMP2]]285; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0286; CHECK-NEXT: br i1 [[TMP5]], label [[MALLOC:%.*]], label [[TMP14:%.*]]287; CHECK: Malloc:288; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K1_MD_TYPE:%.*]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k1.md, i32 0, i32 2, i32 0), align 4289; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K1_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k1.md, i32 0, i32 2, i32 2), align 4290; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP9]], [[TMP7]]291; CHECK-NEXT: [[TMP6:%.*]] = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()292; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds ptr addrspace(4), ptr addrspace(4) [[TMP6]], i64 15293; CHECK-NEXT: store i32 [[TMP8]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K1_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k1.md, i32 0, i32 3, i32 0), align 4294; CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr addrspace(4) [[TMP10]], align 4295; CHECK-NEXT: store i32 [[TMP30]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K1_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k1.md, i32 0, i32 3, i32 1), align 4296; CHECK-NEXT: [[TMP33:%.*]] = add i32 [[TMP30]], 7297; CHECK-NEXT: [[TMP18:%.*]] = udiv i32 [[TMP33]], 8298; CHECK-NEXT: [[TMP19:%.*]] = mul i32 [[TMP18]], 8299; CHECK-NEXT: store i32 [[TMP19]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K1_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k1.md, i32 0, i32 3, i32 2), align 4300; CHECK-NEXT: [[TMP20:%.*]] = add i32 [[TMP8]], [[TMP19]]301; CHECK-NEXT: store i32 [[TMP20]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K1_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k1.md, i32 0, i32 4, i32 0), align 4302; CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr addrspace(4) [[TMP10]], align 4303; CHECK-NEXT: store i32 [[TMP21]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K1_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k1.md, i32 0, i32 4, i32 1), align 4304; CHECK-NEXT: [[TMP22:%.*]] = add i32 [[TMP21]], 7305; CHECK-NEXT: [[TMP23:%.*]] = udiv i32 [[TMP22]], 8306; CHECK-NEXT: [[TMP24:%.*]] = mul i32 [[TMP23]], 8307; CHECK-NEXT: store i32 [[TMP24]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K1_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k1.md, i32 0, i32 4, i32 2), align 4308; CHECK-NEXT: [[TMP25:%.*]] = add i32 [[TMP20]], [[TMP24]]309; CHECK-NEXT: [[TMP26:%.*]] = zext i32 [[TMP25]] to i64310; CHECK-NEXT: [[TMP27:%.*]] = call ptr @llvm.returnaddress(i32 0)311; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[TMP27]] to i64312; CHECK-NEXT: [[TMP34:%.*]] = call i64 @__asan_malloc_impl(i64 [[TMP26]], i64 [[TMP28]])313; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP34]] to ptr addrspace(1)314; CHECK-NEXT: store ptr addrspace(1) [[TMP13]], ptr addrspace(3) @llvm.amdgcn.sw.lds.k1, align 8315; CHECK-NEXT: [[TMP51:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 8316; CHECK-NEXT: [[TMP53:%.*]] = ptrtoint ptr addrspace(1) [[TMP51]] to i64317; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP53]], i64 24)318; CHECK-NEXT: [[TMP54:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 33319; CHECK-NEXT: [[TMP55:%.*]] = ptrtoint ptr addrspace(1) [[TMP54]] to i64320; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP55]], i64 31)321; CHECK-NEXT: [[TMP56:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 68322; CHECK-NEXT: [[TMP57:%.*]] = ptrtoint ptr addrspace(1) [[TMP56]] to i64323; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP57]], i64 28)324; CHECK-NEXT: br label [[TMP14]]325; CHECK: 32:326; CHECK-NEXT: [[XYZCOND:%.*]] = phi i1 [ false, [[WID:%.*]] ], [ true, [[MALLOC]] ]327; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()328; CHECK-NEXT: [[TMP29:%.*]] = load ptr addrspace(1), ptr addrspace(3) @llvm.amdgcn.sw.lds.k1, align 8329; CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K1_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k1.md, i32 0, i32 3, i32 0), align 4330; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds i8, ptr addrspace(3) @llvm.amdgcn.sw.lds.k1, i32 [[TMP31]]331; CHECK-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.k1.dynlds) ]332; CHECK-NEXT: call void @use_variables_1()333; CHECK-NEXT: call void @use_variables_2()334; CHECK-NEXT: [[TMP58:%.*]] = ptrtoint ptr addrspace(3) [[TMP32]] to i32335; CHECK-NEXT: [[TMP59:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP29]], i32 [[TMP58]]336; CHECK-NEXT: [[TMP38:%.*]] = ptrtoint ptr addrspace(1) [[TMP59]] to i64337; CHECK-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 3338; CHECK-NEXT: [[TMP40:%.*]] = add i64 [[TMP39]], 2147450880339; CHECK-NEXT: [[TMP41:%.*]] = inttoptr i64 [[TMP40]] to ptr340; CHECK-NEXT: [[TMP42:%.*]] = load i8, ptr [[TMP41]], align 1341; CHECK-NEXT: [[TMP43:%.*]] = icmp ne i8 [[TMP42]], 0342; CHECK-NEXT: [[TMP44:%.*]] = and i64 [[TMP38]], 7343; CHECK-NEXT: [[TMP45:%.*]] = trunc i64 [[TMP44]] to i8344; CHECK-NEXT: [[TMP46:%.*]] = icmp sge i8 [[TMP45]], [[TMP42]]345; CHECK-NEXT: [[TMP47:%.*]] = and i1 [[TMP43]], [[TMP46]]346; CHECK-NEXT: [[TMP48:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP47]])347; CHECK-NEXT: [[TMP49:%.*]] = icmp ne i64 [[TMP48]], 0348; CHECK-NEXT: br i1 [[TMP49]], label [[ASAN_REPORT:%.*]], label [[TMP52:%.*]], !prof [[PROF3]]349; CHECK: asan.report:350; CHECK-NEXT: br i1 [[TMP47]], label [[TMP50:%.*]], label [[CONDFREE:%.*]]351; CHECK: 50:352; CHECK-NEXT: call void @__asan_report_store1(i64 [[TMP38]]) #[[ATTR7]]353; CHECK-NEXT: call void @llvm.amdgcn.unreachable()354; CHECK-NEXT: br label [[CONDFREE]]355; CHECK: 51:356; CHECK-NEXT: br label [[TMP52]]357; CHECK: 52:358; CHECK-NEXT: store i8 3, ptr addrspace(1) [[TMP59]], align 4359; CHECK-NEXT: br label [[CONDFREE1:%.*]]360; CHECK: CondFree:361; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()362; CHECK-NEXT: br i1 [[XYZCOND]], label [[FREE:%.*]], label [[END:%.*]]363; CHECK: Free:364; CHECK-NEXT: [[TMP35:%.*]] = call ptr @llvm.returnaddress(i32 0)365; CHECK-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[TMP35]] to i64366; CHECK-NEXT: [[TMP37:%.*]] = ptrtoint ptr addrspace(1) [[TMP29]] to i64367; CHECK-NEXT: call void @__asan_free_impl(i64 [[TMP37]], i64 [[TMP36]])368; CHECK-NEXT: br label [[END]]369; CHECK: End:370; CHECK-NEXT: ret void371;372 call void @use_variables_1()373 call void @use_variables_2()374 store i8 3, ptr addrspace(3) @lds_3, align 4375 ret void376}377 378!llvm.module.flags = !{!0}379!0 = !{i32 4, !"nosanitize_address", i32 1}380 381;.382; CHECK: [[PROF3]] = !{!"branch_weights", i32 1, i32 1048575}383; CHECK: [[META4]] = !{i32 0}384; CHECK: [[META5]] = !{i32 1}385;.386