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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 52; RUN: opt < %s -passes=amdgpu-sw-lower-lds -S -mtriple=amdgcn-amd-amdhsa | FileCheck %s3 4; Test to check if static LDS is lowered correctly when a non-kernel with LDS accesses is called from kernel.5@lds_1 = internal addrspace(3) global [1 x i8] poison, align 16@lds_2 = internal addrspace(3) global [1 x i32] poison, align 27@lds_3 = external addrspace(3) global [3 x i8], align 48@lds_4 = external addrspace(3) global [4 x i8], align 89 10;.11; CHECK: @llvm.amdgcn.sw.lds.k0 = internal addrspace(3) global ptr poison, no_sanitize_address, align 8, !absolute_symbol [[META0:![0-9]+]]12; CHECK: @llvm.amdgcn.sw.lds.k0.md = internal addrspace(1) global %llvm.amdgcn.sw.lds.k0.md.type { %llvm.amdgcn.sw.lds.k0.md.item { i32 0, i32 8, i32 32 }, %llvm.amdgcn.sw.lds.k0.md.item { i32 32, i32 1, i32 32 }, %llvm.amdgcn.sw.lds.k0.md.item { i32 64, i32 4, i32 32 }, %llvm.amdgcn.sw.lds.k0.md.item { i32 96, i32 3, i32 32 }, %llvm.amdgcn.sw.lds.k0.md.item { i32 128, i32 4, i32 32 } }, no_sanitize_address13; @llvm.amdgcn.sw.lds.base.table = internal addrspace(1) constant [1 x ptr addrspace(3)] [ptr addrspace(3) @llvm.amdgcn.sw.lds.k0], no_sanitize_address14; @llvm.amdgcn.sw.lds.offset.table = internal addrspace(1) constant [1 x [2 x ptr addrspace(1)]] [[2 x ptr addrspace(1)] [ptr addrspace(1) getelementptr inbounds (%llvm.amdgcn.sw.lds.k0.md.type, ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 3, i32 0), ptr addrspace(1) getelementptr inbounds (%llvm.amdgcn.sw.lds.k0.md.type, ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 4, i32 0)]], no_sanitize_address15;.16define void @use_variables() sanitize_address {17; CHECK-LABEL: define void @use_variables(18; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {19; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()20; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr addrspace(3)], ptr addrspace(1) @llvm.amdgcn.sw.lds.base.table, i32 0, i32 [[TMP1]]21; CHECK-NEXT: [[TMP4:%.*]] = load ptr addrspace(3), ptr addrspace(1) [[TMP2]], align 422; CHECK-NEXT: [[TMP7:%.*]] = load ptr addrspace(1), ptr addrspace(3) [[TMP4]], align 823; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x [2 x ptr addrspace(1)]], ptr addrspace(1) @llvm.amdgcn.sw.lds.offset.table, i32 0, i32 [[TMP1]], i32 024; CHECK-NEXT: [[TMP5:%.*]] = load ptr addrspace(1), ptr addrspace(1) [[TMP6]], align 825; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(1) [[TMP5]], align 426; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP4]], i32 [[TMP8]]27; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x [2 x ptr addrspace(1)]], ptr addrspace(1) @llvm.amdgcn.sw.lds.offset.table, i32 0, i32 [[TMP1]], i32 128; CHECK-NEXT: [[TMP12:%.*]] = load ptr addrspace(1), ptr addrspace(1) [[TMP11]], align 829; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(1) [[TMP12]], align 430; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP4]], i32 [[TMP10]]31; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr addrspace(3) [[TMP9]] to i3232; CHECK-NEXT: [[TMP33:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP7]], i32 [[TMP13]]33; CHECK-NEXT: [[TMP34:%.*]] = addrspacecast ptr addrspace(1) [[TMP33]] to ptr34; CHECK-NEXT: [[TMP35:%.*]] = ptrtoint ptr addrspace(3) [[TMP9]] to i3235; CHECK-NEXT: [[TMP36:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP7]], i32 [[TMP35]]36; CHECK-NEXT: [[TMP16:%.*]] = addrspacecast ptr addrspace(1) [[TMP36]] to ptr37; CHECK-NEXT: store i8 3, ptr [[TMP16]], align 438; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr addrspace(3) [[TMP15]] to i3239; CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP7]], i32 [[TMP14]]40; CHECK-NEXT: [[TMP32:%.*]] = ptrtoint ptr addrspace(1) [[TMP31]] to i6441; CHECK-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP32]], 342; CHECK-NEXT: [[TMP18:%.*]] = add i64 [[TMP17]], 214745088043; CHECK-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr44; CHECK-NEXT: [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 145; CHECK-NEXT: [[TMP21:%.*]] = icmp ne i8 [[TMP20]], 046; CHECK-NEXT: [[TMP22:%.*]] = and i64 [[TMP32]], 747; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP22]] to i848; CHECK-NEXT: [[TMP24:%.*]] = icmp sge i8 [[TMP23]], [[TMP20]]49; CHECK-NEXT: [[TMP25:%.*]] = and i1 [[TMP21]], [[TMP24]]50; CHECK-NEXT: [[TMP26:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP25]])51; CHECK-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP26]], 052; CHECK-NEXT: br i1 [[TMP27]], label %[[ASAN_REPORT:.*]], label %[[BB35:.*]], !prof [[PROF2:![0-9]+]]53; CHECK: [[ASAN_REPORT]]:54; CHECK-NEXT: br i1 [[TMP25]], label %[[BB33:.*]], label %[[BB34:.*]]55; CHECK: [[BB33]]:56; CHECK-NEXT: call void @__asan_report_store1(i64 [[TMP32]]) #[[ATTR7:[0-9]+]]57; CHECK-NEXT: call void @llvm.amdgcn.unreachable()58; CHECK-NEXT: br label %[[BB34]]59; CHECK: [[BB34]]:60; CHECK-NEXT: br label %[[BB35]]61; CHECK: [[BB35]]:62; CHECK-NEXT: store i8 3, ptr addrspace(1) [[TMP31]], align 863; CHECK-NEXT: ret void64;65 %X = addrspacecast ptr addrspace(3) @lds_3 to ptr66 store i8 3, ptr addrspacecast( ptr addrspace(3) @lds_3 to ptr), align 467 store i8 3, ptr addrspace(3) @lds_4, align 868 ret void69}70 71define amdgpu_kernel void @k0() sanitize_address {72; CHECK-LABEL: define amdgpu_kernel void @k0(73; CHECK-SAME: ) #[[ATTR1:[0-9]+]] !llvm.amdgcn.lds.kernel.id [[META3:![0-9]+]] {74; CHECK-NEXT: [[WID:.*]]:75; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()76; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.workitem.id.y()77; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.amdgcn.workitem.id.z()78; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP0]], [[TMP1]]79; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[TMP2]]80; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 081; CHECK-NEXT: br i1 [[TMP5]], label %[[MALLOC:.*]], label %[[BB24:.*]]82; CHECK: [[MALLOC]]:83; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE:%.*]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 4, i32 0), align 484; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 4, i32 2), align 485; CHECK-NEXT: [[TMP16:%.*]] = add i32 [[TMP13]], [[TMP14]]86; CHECK-NEXT: [[TMP15:%.*]] = zext i32 [[TMP16]] to i6487; CHECK-NEXT: [[TMP23:%.*]] = call ptr @llvm.returnaddress(i32 0)88; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[TMP23]] to i6489; CHECK-NEXT: [[TMP12:%.*]] = call i64 @__asan_malloc_impl(i64 [[TMP15]], i64 [[TMP24]])90; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP12]] to ptr addrspace(1)91; CHECK-NEXT: store ptr addrspace(1) [[TMP6]], ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, align 892; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP6]], i64 893; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr addrspace(1) [[TMP25]] to i6494; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP26]], i64 24)95; CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP6]], i64 3396; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr addrspace(1) [[TMP27]] to i6497; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP28]], i64 31)98; CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP6]], i64 6899; CHECK-NEXT: [[TMP45:%.*]] = ptrtoint ptr addrspace(1) [[TMP29]] to i64100; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP45]], i64 28)101; CHECK-NEXT: [[TMP65:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP6]], i64 99102; CHECK-NEXT: [[TMP66:%.*]] = ptrtoint ptr addrspace(1) [[TMP65]] to i64103; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP66]], i64 29)104; CHECK-NEXT: [[TMP67:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP6]], i64 132105; CHECK-NEXT: [[TMP68:%.*]] = ptrtoint ptr addrspace(1) [[TMP67]] to i64106; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP68]], i64 28)107; CHECK-NEXT: br label %[[BB24]]108; CHECK: [[BB24]]:109; CHECK-NEXT: [[XYZCOND:%.*]] = phi i1 [ false, %[[WID]] ], [ true, %[[MALLOC]] ]110; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()111; CHECK-NEXT: [[TMP19:%.*]] = load ptr addrspace(1), ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, align 8112; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 1, i32 0), align 4113; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, i32 [[TMP10]]114; CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 2, i32 0), align 4115; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i8, ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, i32 [[TMP17]]116; CHECK-NEXT: call void @use_variables()117; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr addrspace(3) [[TMP11]] to i32118; CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP19]], i32 [[TMP30]]119; CHECK-NEXT: [[TMP32:%.*]] = ptrtoint ptr addrspace(1) [[TMP31]] to i64120; CHECK-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 3121; CHECK-NEXT: [[TMP34:%.*]] = add i64 [[TMP33]], 2147450880122; CHECK-NEXT: [[TMP35:%.*]] = inttoptr i64 [[TMP34]] to ptr123; CHECK-NEXT: [[TMP36:%.*]] = load i8, ptr [[TMP35]], align 1124; CHECK-NEXT: [[TMP37:%.*]] = icmp ne i8 [[TMP36]], 0125; CHECK-NEXT: [[TMP38:%.*]] = and i64 [[TMP32]], 7126; CHECK-NEXT: [[TMP39:%.*]] = trunc i64 [[TMP38]] to i8127; CHECK-NEXT: [[TMP40:%.*]] = icmp sge i8 [[TMP39]], [[TMP36]]128; CHECK-NEXT: [[TMP41:%.*]] = and i1 [[TMP37]], [[TMP40]]129; CHECK-NEXT: [[TMP42:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP41]])130; CHECK-NEXT: [[TMP43:%.*]] = icmp ne i64 [[TMP42]], 0131; CHECK-NEXT: br i1 [[TMP43]], label %[[ASAN_REPORT:.*]], label %[[BB46:.*]], !prof [[PROF2]]132; CHECK: [[ASAN_REPORT]]:133; CHECK-NEXT: br i1 [[TMP41]], label %[[BB44:.*]], label %[[BB45:.*]]134; CHECK: [[BB44]]:135; CHECK-NEXT: call void @__asan_report_store1(i64 [[TMP32]]) #[[ATTR7]]136; CHECK-NEXT: call void @llvm.amdgcn.unreachable()137; CHECK-NEXT: br label %[[BB45]]138; CHECK: [[BB45]]:139; CHECK-NEXT: br label %[[BB46]]140; CHECK: [[BB46]]:141; CHECK-NEXT: store i8 7, ptr addrspace(1) [[TMP31]], align 1142; CHECK-NEXT: [[TMP47:%.*]] = ptrtoint ptr addrspace(3) [[TMP18]] to i32143; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP19]], i32 [[TMP47]]144; CHECK-NEXT: [[TMP49:%.*]] = ptrtoint ptr addrspace(1) [[TMP48]] to i64145; CHECK-NEXT: [[TMP55:%.*]] = add i64 [[TMP49]], 3146; CHECK-NEXT: [[TMP82:%.*]] = inttoptr i64 [[TMP55]] to ptr addrspace(1)147; CHECK-NEXT: [[TMP83:%.*]] = ptrtoint ptr addrspace(1) [[TMP48]] to i64148; CHECK-NEXT: [[TMP50:%.*]] = lshr i64 [[TMP83]], 3149; CHECK-NEXT: [[TMP51:%.*]] = add i64 [[TMP50]], 2147450880150; CHECK-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr151; CHECK-NEXT: [[TMP53:%.*]] = load i8, ptr [[TMP52]], align 1152; CHECK-NEXT: [[TMP54:%.*]] = icmp ne i8 [[TMP53]], 0153; CHECK-NEXT: [[TMP56:%.*]] = and i64 [[TMP83]], 7154; CHECK-NEXT: [[TMP57:%.*]] = trunc i64 [[TMP56]] to i8155; CHECK-NEXT: [[TMP58:%.*]] = icmp sge i8 [[TMP57]], [[TMP53]]156; CHECK-NEXT: [[TMP59:%.*]] = and i1 [[TMP54]], [[TMP58]]157; CHECK-NEXT: [[TMP60:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP59]])158; CHECK-NEXT: [[TMP61:%.*]] = icmp ne i64 [[TMP60]], 0159; CHECK-NEXT: br i1 [[TMP61]], label %[[ASAN_REPORT1:.*]], label %[[BB66:.*]], !prof [[PROF2]]160; CHECK: [[ASAN_REPORT1]]:161; CHECK-NEXT: br i1 [[TMP59]], label %[[BB64:.*]], label %[[BB65:.*]]162; CHECK: [[BB64]]:163; CHECK-NEXT: call void @__asan_report_store1(i64 [[TMP83]]) #[[ATTR7]]164; CHECK-NEXT: call void @llvm.amdgcn.unreachable()165; CHECK-NEXT: br label %[[BB65]]166; CHECK: [[BB65]]:167; CHECK-NEXT: br label %[[BB66]]168; CHECK: [[BB66]]:169; CHECK-NEXT: [[TMP84:%.*]] = ptrtoint ptr addrspace(1) [[TMP82]] to i64170; CHECK-NEXT: [[TMP85:%.*]] = lshr i64 [[TMP84]], 3171; CHECK-NEXT: [[TMP69:%.*]] = add i64 [[TMP85]], 2147450880172; CHECK-NEXT: [[TMP70:%.*]] = inttoptr i64 [[TMP69]] to ptr173; CHECK-NEXT: [[TMP71:%.*]] = load i8, ptr [[TMP70]], align 1174; CHECK-NEXT: [[TMP72:%.*]] = icmp ne i8 [[TMP71]], 0175; CHECK-NEXT: [[TMP73:%.*]] = and i64 [[TMP84]], 7176; CHECK-NEXT: [[TMP74:%.*]] = trunc i64 [[TMP73]] to i8177; CHECK-NEXT: [[TMP75:%.*]] = icmp sge i8 [[TMP74]], [[TMP71]]178; CHECK-NEXT: [[TMP76:%.*]] = and i1 [[TMP72]], [[TMP75]]179; CHECK-NEXT: [[TMP77:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP76]])180; CHECK-NEXT: [[TMP78:%.*]] = icmp ne i64 [[TMP77]], 0181; CHECK-NEXT: br i1 [[TMP78]], label %[[ASAN_REPORT2:.*]], label %[[BB81:.*]], !prof [[PROF2]]182; CHECK: [[ASAN_REPORT2]]:183; CHECK-NEXT: br i1 [[TMP76]], label %[[BB79:.*]], label %[[BB80:.*]]184; CHECK: [[BB79]]:185; CHECK-NEXT: call void @__asan_report_store1(i64 [[TMP84]]) #[[ATTR7]]186; CHECK-NEXT: call void @llvm.amdgcn.unreachable()187; CHECK-NEXT: br label %[[BB80]]188; CHECK: [[BB80]]:189; CHECK-NEXT: br label %[[BB81]]190; CHECK: [[BB81]]:191; CHECK-NEXT: store i32 8, ptr addrspace(1) [[TMP48]], align 2192; CHECK-NEXT: br label %[[CONDFREE:.*]]193; CHECK: [[CONDFREE]]:194; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()195; CHECK-NEXT: br i1 [[XYZCOND]], label %[[FREE:.*]], label %[[END:.*]]196; CHECK: [[FREE]]:197; CHECK-NEXT: [[TMP20:%.*]] = call ptr @llvm.returnaddress(i32 0)198; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64199; CHECK-NEXT: [[TMP22:%.*]] = ptrtoint ptr addrspace(1) [[TMP19]] to i64200; CHECK-NEXT: call void @__asan_free_impl(i64 [[TMP22]], i64 [[TMP21]])201; CHECK-NEXT: br label %[[END]]202; CHECK: [[END]]:203; CHECK-NEXT: ret void204;205 call void @use_variables()206 store i8 7, ptr addrspace(3) @lds_1, align 1207 store i32 8, ptr addrspace(3) @lds_2, align 2208 ret void209}210 211!llvm.module.flags = !{!0}212!0 = !{i32 4, !"nosanitize_address", i32 1}213 214;.215; CHECK: attributes #[[ATTR0]] = { sanitize_address }216; CHECK: attributes #[[ATTR1]] = { sanitize_address "amdgpu-lds-size"="8" }217; CHECK: attributes #[[ATTR2:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }218; CHECK: attributes #[[ATTR3:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(none) }219; CHECK: attributes #[[ATTR4:[0-9]+]] = { convergent nocallback nofree nounwind willreturn }220; CHECK: attributes #[[ATTR5:[0-9]+]] = { convergent nocallback nofree nounwind willreturn memory(none) }221; CHECK: attributes #[[ATTR6:[0-9]+]] = { convergent nocallback nofree nounwind }222; CHECK: attributes #[[ATTR7]] = { nomerge }223;.224; CHECK: [[META0]] = !{i32 0, i32 1}225; CHECK: [[META1:![0-9]+]] = !{i32 4, !"nosanitize_address", i32 1}226; CHECK: [[PROF2]] = !{!"branch_weights", i32 1, i32 1048575}227; CHECK: [[META3]] = !{i32 0}228;.229