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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 42; RUN: opt < %s -passes=amdgpu-sw-lower-lds -amdgpu-asan-instrument-lds=false -S -mtriple=amdgcn-amd-amdhsa | FileCheck %s3 4; Test to check if LDS accesses are lowered correctly when LDS is passed as function5; argument to non-kernel.6 7@lds_var = internal addrspace(3) global [1024 x i32] poison, align 48 9;.10; CHECK: @llvm.amdgcn.sw.lds.my_kernel = internal addrspace(3) global ptr poison, no_sanitize_address, align 4, !absolute_symbol [[META0:![0-9]+]]11; CHECK: @llvm.amdgcn.sw.lds.my_kernel.md = internal addrspace(1) global %llvm.amdgcn.sw.lds.my_kernel.md.type { %llvm.amdgcn.sw.lds.my_kernel.md.item { i32 0, i32 8, i32 32 }, %llvm.amdgcn.sw.lds.my_kernel.md.item { i32 32, i32 4096, i32 5120 } }, no_sanitize_address12; CHECK: @llvm.amdgcn.sw.lds.base.table = internal addrspace(1) constant [1 x ptr addrspace(3)] [ptr addrspace(3) @llvm.amdgcn.sw.lds.my_kernel], no_sanitize_address13;.14define void @my_function(ptr addrspace(3) %lds_arg) sanitize_address {15; CHECK-LABEL: define void @my_function(16; CHECK-SAME: ptr addrspace(3) [[LDS_ARG:%.*]]) #[[ATTR0:[0-9]+]] {17; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()18; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr addrspace(3)], ptr addrspace(1) @llvm.amdgcn.sw.lds.base.table, i32 0, i32 [[TMP1]]19; CHECK-NEXT: [[TMP3:%.*]] = load ptr addrspace(3), ptr addrspace(1) [[TMP2]], align 420; CHECK-NEXT: [[TMP4:%.*]] = load ptr addrspace(1), ptr addrspace(3) [[TMP3]], align 821; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr addrspace(3) [[LDS_ARG]] to i3222; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP4]], i32 [[TMP5]]23; CHECK-NEXT: [[LDS_VAL:%.*]] = load i32, ptr addrspace(1) [[TMP6]], align 424; CHECK-NEXT: [[NEW_LDS_VAL:%.*]] = add i32 [[LDS_VAL]], 125; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr addrspace(3) [[LDS_ARG]] to i3226; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP4]], i32 [[TMP24]]27; CHECK-NEXT: store i32 [[NEW_LDS_VAL]], ptr addrspace(1) [[TMP25]], align 428; CHECK-NEXT: ret void29;30 %lds_val = load i32, ptr addrspace(3) %lds_arg, align 431 %new_lds_val = add i32 %lds_val, 132 store i32 %new_lds_val, ptr addrspace(3) %lds_arg, align 433 ret void34}35 36define amdgpu_kernel void @my_kernel() sanitize_address {37; CHECK-LABEL: define amdgpu_kernel void @my_kernel(38; CHECK-SAME: ) #[[ATTR1:[0-9]+]] !llvm.amdgcn.lds.kernel.id [[META1:![0-9]+]] {39; CHECK-NEXT: WId:40; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()41; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.workitem.id.y()42; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.amdgcn.workitem.id.z()43; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP0]], [[TMP1]]44; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[TMP2]]45; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 046; CHECK-NEXT: br i1 [[TMP5]], label [[MALLOC:%.*]], label [[TMP7:%.*]]47; CHECK: Malloc:48; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_MY_KERNEL_MD_TYPE:%.*]], ptr addrspace(1) @llvm.amdgcn.sw.lds.my_kernel.md, i32 0, i32 1, i32 0), align 449; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_MY_KERNEL_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.my_kernel.md, i32 0, i32 1, i32 2), align 450; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[TMP11]], [[TMP12]]51; CHECK-NEXT: [[TMP13:%.*]] = zext i32 [[TMP14]] to i6452; CHECK-NEXT: [[TMP10:%.*]] = call ptr @llvm.returnaddress(i32 0)53; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[TMP10]] to i6454; CHECK-NEXT: [[TMP16:%.*]] = call i64 @__asan_malloc_impl(i64 [[TMP13]], i64 [[TMP15]])55; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP16]] to ptr addrspace(1)56; CHECK-NEXT: store ptr addrspace(1) [[TMP6]], ptr addrspace(3) @llvm.amdgcn.sw.lds.my_kernel, align 857; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP6]], i64 858; CHECK-NEXT: [[TMP22:%.*]] = ptrtoint ptr addrspace(1) [[TMP21]] to i6459; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP22]], i64 24)60; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP6]], i64 412861; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr addrspace(1) [[TMP23]] to i6462; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP24]], i64 1024)63; CHECK-NEXT: br label [[TMP7]]64; CHECK: 18:65; CHECK-NEXT: [[XYZCOND:%.*]] = phi i1 [ false, [[WID:%.*]] ], [ true, [[MALLOC]] ]66; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()67; CHECK-NEXT: [[TMP17:%.*]] = load ptr addrspace(1), ptr addrspace(3) @llvm.amdgcn.sw.lds.my_kernel, align 868; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_MY_KERNEL_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.my_kernel.md, i32 0, i32 1, i32 0), align 469; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr addrspace(3) @llvm.amdgcn.sw.lds.my_kernel, i32 [[TMP8]]70; CHECK-NEXT: [[LDS_PTR:%.*]] = getelementptr [1024 x i32], ptr addrspace(3) [[TMP9]], i32 0, i32 071; CHECK-NEXT: call void @my_function(ptr addrspace(3) [[LDS_PTR]])72; CHECK-NEXT: br label [[CONDFREE:%.*]]73; CHECK: CondFree:74; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()75; CHECK-NEXT: br i1 [[XYZCOND]], label [[FREE:%.*]], label [[END:%.*]]76; CHECK: Free:77; CHECK-NEXT: [[TMP18:%.*]] = call ptr @llvm.returnaddress(i32 0)78; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[TMP18]] to i6479; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr addrspace(1) [[TMP17]] to i6480; CHECK-NEXT: call void @__asan_free_impl(i64 [[TMP20]], i64 [[TMP19]])81; CHECK-NEXT: br label [[END]]82; CHECK: End:83; CHECK-NEXT: ret void84;85 %lds_ptr = getelementptr [1024 x i32], ptr addrspace(3) @lds_var, i32 0, i32 086 call void @my_function(ptr addrspace(3) %lds_ptr)87 ret void88}89 90!llvm.module.flags = !{!0}91!0 = !{i32 4, !"nosanitize_address", i32 1}92 93;.94; CHECK: attributes #[[ATTR0]] = { sanitize_address }95; CHECK: attributes #[[ATTR1]] = { sanitize_address "amdgpu-lds-size"="8" }96; CHECK: attributes #[[ATTR2:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }97; CHECK: attributes #[[ATTR3:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(none) }98; CHECK: attributes #[[ATTR4:[0-9]+]] = { convergent nocallback nofree nounwind willreturn }99;.100; CHECK: [[META0]] = !{i32 0, i32 1}101; CHECK: [[META1]] = !{i32 0}102;.103