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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 52; RUN: opt < %s -passes=amdgpu-sw-lower-lds -amdgpu-asan-instrument-lds=false -S -mtriple=amdgcn-amd-amdhsa | FileCheck %s3 4; Test to check if static LDS is lowered correctly when a non-kernel without sanitize_address attr with LDS accesses is called from 5; kernel which has sanitize_address attr.6@lds_1 = internal addrspace(3) global [1 x i8] poison, align 17@lds_2 = internal addrspace(3) global [1 x i32] poison, align 28@lds_3 = external addrspace(3) global [3 x i8], align 49@lds_4 = external addrspace(3) global [4 x i8], align 810 11;.12; @llvm.amdgcn.sw.lds.k0 = internal addrspace(3) global ptr poison, no_sanitize_address, align 8, !absolute_symbol [[META0:![0-9]+]]13; @llvm.amdgcn.sw.lds.k0.md = internal addrspace(1) global %llvm.amdgcn.sw.lds.k0.md.type { %llvm.amdgcn.sw.lds.k0.md.item { i32 0, i32 8, i32 32 }, %llvm.amdgcn.sw.lds.k0.md.item { i32 32, i32 1, i32 32 }, %llvm.amdgcn.sw.lds.k0.md.item { i32 64, i32 4, i32 32 }, %llvm.amdgcn.sw.lds.k0.md.item { i32 96, i32 3, i32 32 }, %llvm.amdgcn.sw.lds.k0.md.item { i32 128, i32 4, i32 32 } }, no_sanitize_address14; @llvm.amdgcn.sw.lds.base.table = internal addrspace(1) constant [1 x ptr addrspace(3)] [ptr addrspace(3) @llvm.amdgcn.sw.lds.k0], no_sanitize_address15; @llvm.amdgcn.sw.lds.offset.table = internal addrspace(1) constant [1 x [2 x ptr addrspace(1)]] [[2 x ptr addrspace(1)] [ptr addrspace(1) getelementptr inbounds (%llvm.amdgcn.sw.lds.k0.md.type, ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 3, i32 0), ptr addrspace(1) getelementptr inbounds (%llvm.amdgcn.sw.lds.k0.md.type, ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 4, i32 0)]], no_sanitize_address16;.17define void @use_variables() {18; CHECK-LABEL: define void @use_variables() {19; CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()20; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr addrspace(3)], ptr addrspace(1) @llvm.amdgcn.sw.lds.base.table, i32 0, i32 [[TMP18]]21; CHECK-NEXT: [[TMP3:%.*]] = load ptr addrspace(3), ptr addrspace(1) [[TMP2]], align 422; CHECK-NEXT: [[TMP4:%.*]] = load ptr addrspace(1), ptr addrspace(3) [[TMP3]], align 823; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x [2 x ptr addrspace(1)]], ptr addrspace(1) @llvm.amdgcn.sw.lds.offset.table, i32 0, i32 [[TMP18]], i32 024; CHECK-NEXT: [[TMP6:%.*]] = load ptr addrspace(1), ptr addrspace(1) [[TMP5]], align 825; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(1) [[TMP6]], align 426; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP3]], i32 [[TMP7]]27; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x [2 x ptr addrspace(1)]], ptr addrspace(1) @llvm.amdgcn.sw.lds.offset.table, i32 0, i32 [[TMP18]], i32 128; CHECK-NEXT: [[TMP10:%.*]] = load ptr addrspace(1), ptr addrspace(1) [[TMP9]], align 829; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(1) [[TMP10]], align 430; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP3]], i32 [[TMP11]]31; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr addrspace(3) [[TMP8]] to i3232; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP4]], i32 [[TMP13]]33; CHECK-NEXT: [[TMP15:%.*]] = addrspacecast ptr addrspace(1) [[TMP14]] to ptr34; CHECK-NEXT: [[TMP16:%.*]] = ptrtoint ptr addrspace(3) [[TMP8]] to i3235; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP4]], i32 [[TMP16]]36; CHECK-NEXT: [[TMP1:%.*]] = addrspacecast ptr addrspace(1) [[TMP17]] to ptr37; CHECK-NEXT: store i8 3, ptr [[TMP1]], align 438; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr addrspace(3) [[TMP12]] to i3239; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP4]], i32 [[TMP19]]40; CHECK-NEXT: store i8 3, ptr addrspace(1) [[TMP20]], align 841; CHECK-NEXT: ret void42;43 %X = addrspacecast ptr addrspace(3) @lds_3 to ptr44 store i8 3, ptr addrspacecast( ptr addrspace(3) @lds_3 to ptr), align 445 store i8 3, ptr addrspace(3) @lds_4, align 846 ret void47}48 49define amdgpu_kernel void @k0() sanitize_address {50; CHECK-LABEL: define amdgpu_kernel void @k0(51; CHECK-SAME: ) #[[ATTR0:[0-9]+]] !llvm.amdgcn.lds.kernel.id [[META2:![0-9]+]] {52; CHECK-NEXT: [[WID:.*]]:53; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()54; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.workitem.id.y()55; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.amdgcn.workitem.id.z()56; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP0]], [[TMP1]]57; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[TMP2]]58; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 059; CHECK-NEXT: br i1 [[TMP5]], label %[[MALLOC:.*]], label %[[BB24:.*]]60; CHECK: [[MALLOC]]:61; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE:%.*]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 4, i32 0), align 462; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 4, i32 2), align 463; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP6]], [[TMP7]]64; CHECK-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i6465; CHECK-NEXT: [[TMP10:%.*]] = call ptr @llvm.returnaddress(i32 0)66; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[TMP10]] to i6467; CHECK-NEXT: [[TMP12:%.*]] = call i64 @__asan_malloc_impl(i64 [[TMP9]], i64 [[TMP11]])68; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr addrspace(1)69; CHECK-NEXT: store ptr addrspace(1) [[TMP13]], ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, align 870; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 871; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr addrspace(1) [[TMP14]] to i6472; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP15]], i64 24)73; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 3374; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr addrspace(1) [[TMP16]] to i6475; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP17]], i64 31)76; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 6877; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr addrspace(1) [[TMP18]] to i6478; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP19]], i64 28)79; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 9980; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr addrspace(1) [[TMP20]] to i6481; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP21]], i64 29)82; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 13283; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr addrspace(1) [[TMP22]] to i6484; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP23]], i64 28)85; CHECK-NEXT: br label %[[BB24]]86; CHECK: [[BB24]]:87; CHECK-NEXT: [[XYZCOND:%.*]] = phi i1 [ false, %[[WID]] ], [ true, %[[MALLOC]] ]88; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()89; CHECK-NEXT: [[TMP25:%.*]] = load ptr addrspace(1), ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, align 890; CHECK-NEXT: [[TMP26:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 1, i32 0), align 491; CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds i8, ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, i32 [[TMP26]]92; CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 2, i32 0), align 493; CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds i8, ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, i32 [[TMP28]]94; CHECK-NEXT: call void @use_variables()95; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr addrspace(3) [[TMP27]] to i3296; CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP25]], i32 [[TMP30]]97; CHECK-NEXT: store i8 7, ptr addrspace(1) [[TMP31]], align 198; CHECK-NEXT: [[TMP32:%.*]] = ptrtoint ptr addrspace(3) [[TMP29]] to i3299; CHECK-NEXT: [[TMP33:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP25]], i32 [[TMP32]]100; CHECK-NEXT: store i32 8, ptr addrspace(1) [[TMP33]], align 2101; CHECK-NEXT: br label %[[CONDFREE:.*]]102; CHECK: [[CONDFREE]]:103; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()104; CHECK-NEXT: br i1 [[XYZCOND]], label %[[FREE:.*]], label %[[END:.*]]105; CHECK: [[FREE]]:106; CHECK-NEXT: [[TMP34:%.*]] = call ptr @llvm.returnaddress(i32 0)107; CHECK-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP34]] to i64108; CHECK-NEXT: [[TMP36:%.*]] = ptrtoint ptr addrspace(1) [[TMP25]] to i64109; CHECK-NEXT: call void @__asan_free_impl(i64 [[TMP36]], i64 [[TMP35]])110; CHECK-NEXT: br label %[[END]]111; CHECK: [[END]]:112; CHECK-NEXT: ret void113;114 call void @use_variables()115 store i8 7, ptr addrspace(3) @lds_1, align 1116 store i32 8, ptr addrspace(3) @lds_2, align 2117 ret void118}119 120!llvm.module.flags = !{!0}121!0 = !{i32 4, !"nosanitize_address", i32 1}122;.123; CHECK: attributes #[[ATTR0]] = { sanitize_address "amdgpu-lds-size"="8" }124; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }125; CHECK: attributes #[[ATTR2:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(none) }126; CHECK: attributes #[[ATTR3:[0-9]+]] = { convergent nocallback nofree nounwind willreturn }127;.128