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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 52; RUN: opt < %s -passes=amdgpu-sw-lower-lds -amdgpu-asan-instrument-lds=false -S -mtriple=amdgcn-amd-amdhsa | FileCheck %s3 4; Test to check if LDS accesses are lowered correctly when a call is made to nested non-kernel.5 6@A = external addrspace(3) global [8 x ptr]7@B = external addrspace(3) global [0 x i32]8 9;.10; @llvm.amdgcn.sw.lds.kernel_2 = internal addrspace(3) global ptr poison, no_sanitize_address, align 8, !absolute_symbol [[META0:![0-9]+]]11; @llvm.amdgcn.sw.lds.kernel_2.md = internal addrspace(1) global %llvm.amdgcn.sw.lds.kernel_2.md.type { %llvm.amdgcn.sw.lds.kernel_2.md.item { i32 0, i32 8, i32 32 }, %llvm.amdgcn.sw.lds.kernel_2.md.item { i32 32, i32 64, i32 96 } }, no_sanitize_address12; @llvm.amdgcn.sw.lds.kernel_1 = internal addrspace(3) global ptr poison, no_sanitize_address, align 4, !absolute_symbol [[META0]]13; @llvm.amdgcn.kernel_1.dynlds = external addrspace(3) global [0 x i8], no_sanitize_address, align 4, !absolute_symbol [[META1:![0-9]+]]14; @llvm.amdgcn.sw.lds.kernel_1.md = internal addrspace(1) global %llvm.amdgcn.sw.lds.kernel_1.md.type { %llvm.amdgcn.sw.lds.kernel_1.md.item { i32 0, i32 8, i32 32 }, %llvm.amdgcn.sw.lds.kernel_1.md.item { i32 32, i32 0, i32 32 } }, no_sanitize_address15; @llvm.amdgcn.sw.lds.kernel_3 = internal addrspace(3) global ptr poison, no_sanitize_address, align 4, !absolute_symbol [[META0]]16; @llvm.amdgcn.kernel_3.dynlds = external addrspace(3) global [0 x i8], no_sanitize_address, align 4, !absolute_symbol [[META1]]17; @llvm.amdgcn.sw.lds.kernel_3.md = internal addrspace(1) global %llvm.amdgcn.sw.lds.kernel_3.md.type { %llvm.amdgcn.sw.lds.kernel_3.md.item { i32 0, i32 8, i32 32 }, %llvm.amdgcn.sw.lds.kernel_3.md.item { i32 32, i32 0, i32 32 } }, no_sanitize_address18; @llvm.amdgcn.sw.lds.kernel_0 = internal addrspace(3) global ptr poison, no_sanitize_address, align 8, !absolute_symbol [[META0]]19; @llvm.amdgcn.sw.lds.kernel_0.md = internal addrspace(1) global %llvm.amdgcn.sw.lds.kernel_0.md.type { %llvm.amdgcn.sw.lds.kernel_0.md.item { i32 0, i32 8, i32 32 }, %llvm.amdgcn.sw.lds.kernel_0.md.item { i32 32, i32 64, i32 96 } }, no_sanitize_address20; @llvm.amdgcn.sw.lds.base.table = internal addrspace(1) constant [4 x ptr addrspace(3)] [ptr addrspace(3) @llvm.amdgcn.sw.lds.kernel_0, ptr addrspace(3) @llvm.amdgcn.sw.lds.kernel_1, ptr addrspace(3) @llvm.amdgcn.sw.lds.kernel_2, ptr addrspace(3) @llvm.amdgcn.sw.lds.kernel_3], no_sanitize_address21; @llvm.amdgcn.sw.lds.offset.table = internal addrspace(1) constant [4 x [2 x ptr addrspace(1)]] [[2 x ptr addrspace(1)] [ptr addrspace(1) getelementptr inbounds (%llvm.amdgcn.sw.lds.kernel_0.md.type, ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_0.md, i32 0, i32 1, i32 0), ptr addrspace(1) poison], [2 x ptr addrspace(1)] [ptr addrspace(1) poison, ptr addrspace(1) getelementptr inbounds (%llvm.amdgcn.sw.lds.kernel_1.md.type, ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_1.md, i32 0, i32 1, i32 0)], [2 x ptr addrspace(1)] [ptr addrspace(1) getelementptr inbounds (%llvm.amdgcn.sw.lds.kernel_2.md.type, ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_2.md, i32 0, i32 1, i32 0), ptr addrspace(1) poison], [2 x ptr addrspace(1)] [ptr addrspace(1) poison, ptr addrspace(1) getelementptr inbounds (%llvm.amdgcn.sw.lds.kernel_3.md.type, ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_3.md, i32 0, i32 1, i32 0)]], no_sanitize_address22;.23define amdgpu_kernel void @kernel_0() sanitize_address {24; CHECK-LABEL: define amdgpu_kernel void @kernel_0(25; CHECK-SAME: ) #[[ATTR0:[0-9]+]] !llvm.amdgcn.lds.kernel.id [[META3:![0-9]+]] {26; CHECK-NEXT: [[WID:.*]]:27; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()28; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.workitem.id.y()29; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.amdgcn.workitem.id.z()30; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP0]], [[TMP1]]31; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[TMP2]]32; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 033; CHECK-NEXT: br i1 [[TMP5]], label %[[MALLOC:.*]], label %[[BB18:.*]]34; CHECK: [[MALLOC]]:35; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_KERNEL_0_MD_TYPE:%.*]], ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_0.md, i32 0, i32 1, i32 0), align 436; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_KERNEL_0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_0.md, i32 0, i32 1, i32 2), align 437; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[TMP9]], [[TMP10]]38; CHECK-NEXT: [[TMP11:%.*]] = zext i32 [[TMP12]] to i6439; CHECK-NEXT: [[TMP13:%.*]] = call ptr @llvm.returnaddress(i32 0)40; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i6441; CHECK-NEXT: [[TMP19:%.*]] = call i64 @__asan_malloc_impl(i64 [[TMP11]], i64 [[TMP14]])42; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP19]] to ptr addrspace(1)43; CHECK-NEXT: store ptr addrspace(1) [[TMP6]], ptr addrspace(3) @llvm.amdgcn.sw.lds.kernel_0, align 844; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP6]], i64 845; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr addrspace(1) [[TMP20]] to i6446; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP21]], i64 24)47; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP6]], i64 9648; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr addrspace(1) [[TMP22]] to i6449; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP23]], i64 32)50; CHECK-NEXT: br label %[[BB18]]51; CHECK: [[BB18]]:52; CHECK-NEXT: [[XYZCOND:%.*]] = phi i1 [ false, %[[WID]] ], [ true, %[[MALLOC]] ]53; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()54; CHECK-NEXT: [[TMP15:%.*]] = load ptr addrspace(1), ptr addrspace(3) @llvm.amdgcn.sw.lds.kernel_0, align 855; CHECK-NEXT: call void @call_store_A()56; CHECK-NEXT: br label %[[CONDFREE:.*]]57; CHECK: [[CONDFREE]]:58; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()59; CHECK-NEXT: br i1 [[XYZCOND]], label %[[FREE:.*]], label %[[END:.*]]60; CHECK: [[FREE]]:61; CHECK-NEXT: [[TMP16:%.*]] = call ptr @llvm.returnaddress(i32 0)62; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[TMP16]] to i6463; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr addrspace(1) [[TMP15]] to i6464; CHECK-NEXT: call void @__asan_free_impl(i64 [[TMP18]], i64 [[TMP17]])65; CHECK-NEXT: br label %[[END]]66; CHECK: [[END]]:67; CHECK-NEXT: ret void68;69 call void @call_store_A()70 ret void71}72 73define amdgpu_kernel void @kernel_1() sanitize_address {74; CHECK-LABEL: define amdgpu_kernel void @kernel_1(75; CHECK-SAME: ) #[[ATTR1:[0-9]+]] !llvm.amdgcn.lds.kernel.id [[META4:![0-9]+]] {76; CHECK-NEXT: [[WID:.*]]:77; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()78; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.workitem.id.y()79; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.amdgcn.workitem.id.z()80; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP0]], [[TMP1]]81; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[TMP2]]82; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 083; CHECK-NEXT: br i1 [[TMP5]], label %[[MALLOC:.*]], label %[[BB23:.*]]84; CHECK: [[MALLOC]]:85; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_1.md, align 486; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_KERNEL_1_MD_TYPE:%.*]], ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_1.md, i32 0, i32 0, i32 2), align 487; CHECK-NEXT: [[TMP21:%.*]] = add i32 [[TMP12]], [[TMP20]]88; CHECK-NEXT: [[TMP6:%.*]] = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()89; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds ptr addrspace(4), ptr addrspace(4) [[TMP6]], i64 1590; CHECK-NEXT: store i32 [[TMP21]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_KERNEL_1_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_1.md, i32 0, i32 1, i32 0), align 491; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(4) [[TMP7]], align 492; CHECK-NEXT: store i32 [[TMP8]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_KERNEL_1_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_1.md, i32 0, i32 1, i32 1), align 493; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], 394; CHECK-NEXT: [[TMP10:%.*]] = udiv i32 [[TMP9]], 495; CHECK-NEXT: [[TMP11:%.*]] = mul i32 [[TMP10]], 496; CHECK-NEXT: store i32 [[TMP11]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_KERNEL_1_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_1.md, i32 0, i32 1, i32 2), align 497; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[TMP21]], [[TMP11]]98; CHECK-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i6499; CHECK-NEXT: [[TMP17:%.*]] = call ptr @llvm.returnaddress(i32 0)100; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[TMP17]] to i64101; CHECK-NEXT: [[TMP19:%.*]] = call i64 @__asan_malloc_impl(i64 [[TMP16]], i64 [[TMP18]])102; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP19]] to ptr addrspace(1)103; CHECK-NEXT: store ptr addrspace(1) [[TMP13]], ptr addrspace(3) @llvm.amdgcn.sw.lds.kernel_1, align 8104; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 8105; CHECK-NEXT: [[TMP27:%.*]] = ptrtoint ptr addrspace(1) [[TMP26]] to i64106; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP27]], i64 24)107; CHECK-NEXT: br label %[[BB23]]108; CHECK: [[BB23]]:109; CHECK-NEXT: [[XYZCOND:%.*]] = phi i1 [ false, %[[WID]] ], [ true, %[[MALLOC]] ]110; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()111; CHECK-NEXT: [[TMP22:%.*]] = load ptr addrspace(1), ptr addrspace(3) @llvm.amdgcn.sw.lds.kernel_1, align 8112; CHECK-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.kernel_1.dynlds) ]113; CHECK-NEXT: [[PTR:%.*]] = call ptr @get_B_ptr()114; CHECK-NEXT: br label %[[CONDFREE:.*]]115; CHECK: [[CONDFREE]]:116; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()117; CHECK-NEXT: br i1 [[XYZCOND]], label %[[FREE:.*]], label %[[END:.*]]118; CHECK: [[FREE]]:119; CHECK-NEXT: [[TMP23:%.*]] = call ptr @llvm.returnaddress(i32 0)120; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[TMP23]] to i64121; CHECK-NEXT: [[TMP25:%.*]] = ptrtoint ptr addrspace(1) [[TMP22]] to i64122; CHECK-NEXT: call void @__asan_free_impl(i64 [[TMP25]], i64 [[TMP24]])123; CHECK-NEXT: br label %[[END]]124; CHECK: [[END]]:125; CHECK-NEXT: ret void126;127 %ptr = call ptr @get_B_ptr()128 ret void129}130 131define amdgpu_kernel void @kernel_2() sanitize_address {132; CHECK-LABEL: define amdgpu_kernel void @kernel_2(133; CHECK-SAME: ) #[[ATTR0]] !llvm.amdgcn.lds.kernel.id [[META5:![0-9]+]] {134; CHECK-NEXT: [[WID:.*]]:135; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()136; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.workitem.id.y()137; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.amdgcn.workitem.id.z()138; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP0]], [[TMP1]]139; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[TMP2]]140; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0141; CHECK-NEXT: br i1 [[TMP5]], label %[[MALLOC:.*]], label %[[BB18:.*]]142; CHECK: [[MALLOC]]:143; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_KERNEL_2_MD_TYPE:%.*]], ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_2.md, i32 0, i32 1, i32 0), align 4144; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_KERNEL_2_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_2.md, i32 0, i32 1, i32 2), align 4145; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[TMP9]], [[TMP10]]146; CHECK-NEXT: [[TMP11:%.*]] = zext i32 [[TMP12]] to i64147; CHECK-NEXT: [[TMP13:%.*]] = call ptr @llvm.returnaddress(i32 0)148; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i64149; CHECK-NEXT: [[TMP19:%.*]] = call i64 @__asan_malloc_impl(i64 [[TMP11]], i64 [[TMP14]])150; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP19]] to ptr addrspace(1)151; CHECK-NEXT: store ptr addrspace(1) [[TMP6]], ptr addrspace(3) @llvm.amdgcn.sw.lds.kernel_2, align 8152; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP6]], i64 8153; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr addrspace(1) [[TMP20]] to i64154; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP21]], i64 24)155; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP6]], i64 96156; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr addrspace(1) [[TMP22]] to i64157; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP23]], i64 32)158; CHECK-NEXT: br label %[[BB18]]159; CHECK: [[BB18]]:160; CHECK-NEXT: [[XYZCOND:%.*]] = phi i1 [ false, %[[WID]] ], [ true, %[[MALLOC]] ]161; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()162; CHECK-NEXT: [[TMP15:%.*]] = load ptr addrspace(1), ptr addrspace(3) @llvm.amdgcn.sw.lds.kernel_2, align 8163; CHECK-NEXT: call void @store_A()164; CHECK-NEXT: br label %[[CONDFREE:.*]]165; CHECK: [[CONDFREE]]:166; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()167; CHECK-NEXT: br i1 [[XYZCOND]], label %[[FREE:.*]], label %[[END:.*]]168; CHECK: [[FREE]]:169; CHECK-NEXT: [[TMP16:%.*]] = call ptr @llvm.returnaddress(i32 0)170; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[TMP16]] to i64171; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr addrspace(1) [[TMP15]] to i64172; CHECK-NEXT: call void @__asan_free_impl(i64 [[TMP18]], i64 [[TMP17]])173; CHECK-NEXT: br label %[[END]]174; CHECK: [[END]]:175; CHECK-NEXT: ret void176;177 call void @store_A()178 ret void179}180 181define amdgpu_kernel void @kernel_3() sanitize_address {182; CHECK-LABEL: define amdgpu_kernel void @kernel_3(183; CHECK-SAME: ) #[[ATTR1]] !llvm.amdgcn.lds.kernel.id [[META6:![0-9]+]] {184; CHECK-NEXT: [[WID:.*]]:185; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()186; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.workitem.id.y()187; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.amdgcn.workitem.id.z()188; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP0]], [[TMP1]]189; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[TMP2]]190; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0191; CHECK-NEXT: br i1 [[TMP5]], label %[[MALLOC:.*]], label %[[BB23:.*]]192; CHECK: [[MALLOC]]:193; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_3.md, align 4194; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_KERNEL_3_MD_TYPE:%.*]], ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_3.md, i32 0, i32 0, i32 2), align 4195; CHECK-NEXT: [[TMP21:%.*]] = add i32 [[TMP12]], [[TMP20]]196; CHECK-NEXT: [[TMP6:%.*]] = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()197; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds ptr addrspace(4), ptr addrspace(4) [[TMP6]], i64 15198; CHECK-NEXT: store i32 [[TMP21]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_KERNEL_3_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_3.md, i32 0, i32 1, i32 0), align 4199; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(4) [[TMP7]], align 4200; CHECK-NEXT: store i32 [[TMP8]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_KERNEL_3_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_3.md, i32 0, i32 1, i32 1), align 4201; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], 3202; CHECK-NEXT: [[TMP10:%.*]] = udiv i32 [[TMP9]], 4203; CHECK-NEXT: [[TMP11:%.*]] = mul i32 [[TMP10]], 4204; CHECK-NEXT: store i32 [[TMP11]], ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_KERNEL_3_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.kernel_3.md, i32 0, i32 1, i32 2), align 4205; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[TMP21]], [[TMP11]]206; CHECK-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64207; CHECK-NEXT: [[TMP17:%.*]] = call ptr @llvm.returnaddress(i32 0)208; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[TMP17]] to i64209; CHECK-NEXT: [[TMP19:%.*]] = call i64 @__asan_malloc_impl(i64 [[TMP16]], i64 [[TMP18]])210; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP19]] to ptr addrspace(1)211; CHECK-NEXT: store ptr addrspace(1) [[TMP13]], ptr addrspace(3) @llvm.amdgcn.sw.lds.kernel_3, align 8212; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 8213; CHECK-NEXT: [[TMP27:%.*]] = ptrtoint ptr addrspace(1) [[TMP26]] to i64214; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP27]], i64 24)215; CHECK-NEXT: br label %[[BB23]]216; CHECK: [[BB23]]:217; CHECK-NEXT: [[XYZCOND:%.*]] = phi i1 [ false, %[[WID]] ], [ true, %[[MALLOC]] ]218; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()219; CHECK-NEXT: [[TMP22:%.*]] = load ptr addrspace(1), ptr addrspace(3) @llvm.amdgcn.sw.lds.kernel_3, align 8220; CHECK-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.kernel_3.dynlds) ]221; CHECK-NEXT: [[PTR:%.*]] = call ptr @get_B_ptr()222; CHECK-NEXT: br label %[[CONDFREE:.*]]223; CHECK: [[CONDFREE]]:224; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()225; CHECK-NEXT: br i1 [[XYZCOND]], label %[[FREE:.*]], label %[[END:.*]]226; CHECK: [[FREE]]:227; CHECK-NEXT: [[TMP23:%.*]] = call ptr @llvm.returnaddress(i32 0)228; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[TMP23]] to i64229; CHECK-NEXT: [[TMP25:%.*]] = ptrtoint ptr addrspace(1) [[TMP22]] to i64230; CHECK-NEXT: call void @__asan_free_impl(i64 [[TMP25]], i64 [[TMP24]])231; CHECK-NEXT: br label %[[END]]232; CHECK: [[END]]:233; CHECK-NEXT: ret void234;235 %ptr = call ptr @get_B_ptr()236 ret void237}238 239define private void @call_store_A() sanitize_address {240; CHECK-LABEL: define private void @call_store_A(241; CHECK-SAME: ) #[[ATTR2:[0-9]+]] {242; CHECK-NEXT: call void @store_A()243; CHECK-NEXT: ret void244;245 call void @store_A()246 ret void247}248 249define private void @store_A() sanitize_address {250; CHECK-LABEL: define private void @store_A(251; CHECK-SAME: ) #[[ATTR2]] {252; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()253; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [4 x ptr addrspace(3)], ptr addrspace(1) @llvm.amdgcn.sw.lds.base.table, i32 0, i32 [[TMP1]]254; CHECK-NEXT: [[TMP4:%.*]] = load ptr addrspace(3), ptr addrspace(1) [[TMP2]], align 4255; CHECK-NEXT: [[TMP7:%.*]] = load ptr addrspace(1), ptr addrspace(3) [[TMP4]], align 8256; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x [2 x ptr addrspace(1)]], ptr addrspace(1) @llvm.amdgcn.sw.lds.offset.table, i32 0, i32 [[TMP1]], i32 0257; CHECK-NEXT: [[TMP5:%.*]] = load ptr addrspace(1), ptr addrspace(1) [[TMP6]], align 8258; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(1) [[TMP5]], align 4259; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP4]], i32 [[TMP8]]260; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr addrspace(3) [[TMP9]] to i32261; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP7]], i32 [[TMP11]]262; CHECK-NEXT: [[TMP10:%.*]] = addrspacecast ptr addrspace(1) [[TMP12]] to ptr263; CHECK-NEXT: store ptr [[TMP10]], ptr null, align 8264; CHECK-NEXT: ret void265;266 store ptr addrspacecast (ptr addrspace(3) @A to ptr), ptr null267 ret void268}269 270define private ptr @get_B_ptr() sanitize_address {271; CHECK-LABEL: define private ptr @get_B_ptr(272; CHECK-SAME: ) #[[ATTR2]] {273; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()274; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [4 x ptr addrspace(3)], ptr addrspace(1) @llvm.amdgcn.sw.lds.base.table, i32 0, i32 [[TMP1]]275; CHECK-NEXT: [[TMP4:%.*]] = load ptr addrspace(3), ptr addrspace(1) [[TMP2]], align 4276; CHECK-NEXT: [[TMP7:%.*]] = load ptr addrspace(1), ptr addrspace(3) [[TMP4]], align 8277; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x [2 x ptr addrspace(1)]], ptr addrspace(1) @llvm.amdgcn.sw.lds.offset.table, i32 0, i32 [[TMP1]], i32 1278; CHECK-NEXT: [[TMP5:%.*]] = load ptr addrspace(1), ptr addrspace(1) [[TMP6]], align 8279; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(1) [[TMP5]], align 4280; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP4]], i32 [[TMP8]]281; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr addrspace(3) [[TMP9]] to i32282; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP7]], i32 [[TMP11]]283; CHECK-NEXT: [[TMP10:%.*]] = addrspacecast ptr addrspace(1) [[TMP12]] to ptr284; CHECK-NEXT: ret ptr [[TMP10]]285;286 ret ptr addrspacecast (ptr addrspace(3) @B to ptr)287}288 289!llvm.module.flags = !{!0}290!0 = !{i32 4, !"nosanitize_address", i32 1}291 292;.293; CHECK: attributes #[[ATTR0]] = { sanitize_address "amdgpu-lds-size"="8" }294; CHECK: attributes #[[ATTR1]] = { sanitize_address "amdgpu-lds-size"="8,8" }295;.296