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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -passes=amdgpu-uniform-intrinsic-combine -S < %s | FileCheck %s -check-prefix=PASS-CHECK3; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -amdgpu-uniform-intrinsic-combine -S < %s | FileCheck %s -check-prefix=PASS-CHECK4; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -passes=amdgpu-uniform-intrinsic-combine,instcombine,early-cse,simplifycfg -S < %s | FileCheck %s -check-prefix=COMB-CHECK5 6; This should not be optimized7define amdgpu_cs void @temporal_divergence(ptr addrspace(1) %out, i32 %n) {8; PASS-CHECK-LABEL: define amdgpu_cs void @temporal_divergence(9; PASS-CHECK-SAME: ptr addrspace(1) [[OUT:%.*]], i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {10; PASS-CHECK-NEXT: [[ENTRY:.*]]:11; PASS-CHECK-NEXT: [[TID:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()12; PASS-CHECK-NEXT: br label %[[H:.*]]13; PASS-CHECK: [[H]]:14; PASS-CHECK-NEXT: [[UNI_MERGE_H:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[UNI_INC:%.*]], %[[H]] ]15; PASS-CHECK-NEXT: [[UNI_INC]] = add i32 [[UNI_MERGE_H]], 116; PASS-CHECK-NEXT: [[DIV_EXITX:%.*]] = icmp eq i32 [[TID]], 017; PASS-CHECK-NEXT: br i1 [[DIV_EXITX]], label %[[X:.*]], label %[[H]]18; PASS-CHECK: [[X]]:19; PASS-CHECK-NEXT: [[UNI_JOIN:%.*]] = call i32 @llvm.amdgcn.readfirstlane.i32(i32 [[UNI_INC]])20; PASS-CHECK-NEXT: [[JOIN_USER:%.*]] = add i32 [[UNI_JOIN]], 521; PASS-CHECK-NEXT: store i32 [[JOIN_USER]], ptr addrspace(1) [[OUT]], align 422; PASS-CHECK-NEXT: ret void23;24; COMB-CHECK-LABEL: define amdgpu_cs void @temporal_divergence(25; COMB-CHECK-SAME: ptr addrspace(1) [[OUT:%.*]], i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {26; COMB-CHECK-NEXT: [[ENTRY:.*]]:27; COMB-CHECK-NEXT: [[TID:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()28; COMB-CHECK-NEXT: br label %[[H:.*]]29; COMB-CHECK: [[H]]:30; COMB-CHECK-NEXT: [[UNI_MERGE_H:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[UNI_INC:%.*]], %[[H]] ]31; COMB-CHECK-NEXT: [[UNI_INC]] = add i32 [[UNI_MERGE_H]], 132; COMB-CHECK-NEXT: [[DIV_EXITX:%.*]] = icmp eq i32 [[TID]], 033; COMB-CHECK-NEXT: br i1 [[DIV_EXITX]], label %[[X:.*]], label %[[H]]34; COMB-CHECK: [[X]]:35; COMB-CHECK-NEXT: [[UNI_JOIN:%.*]] = call i32 @llvm.amdgcn.readfirstlane.i32(i32 [[UNI_INC]])36; COMB-CHECK-NEXT: [[JOIN_USER:%.*]] = add i32 [[UNI_JOIN]], 537; COMB-CHECK-NEXT: store i32 [[JOIN_USER]], ptr addrspace(1) [[OUT]], align 438; COMB-CHECK-NEXT: ret void39;40entry:41 %tid = call i32 @llvm.amdgcn.workitem.id.x()42 br label %H43 44H:45 %uni.merge.h = phi i32 [ 0, %entry ], [ %uni.inc, %H ]46 %uni.inc = add i32 %uni.merge.h, 147 %div.exitx = icmp eq i32 %tid, 048 br i1 %div.exitx, label %X, label %H ; divergent branch49 50X:51 %uni.join = call i32 @llvm.amdgcn.readfirstlane.i32(i32 %uni.inc)52 %join.user = add i32 %uni.join, 553 store i32 %join.user, ptr addrspace(1) %out54 ret void55}56 57declare i32 @llvm.amdgcn.workitem.id.x()58declare i32 @llvm.amdgcn.readfirstlane.i32(i32)59