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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GFX6 %s3; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GFX8 %s4 5 6declare i32 @llvm.amdgcn.workitem.id.x() #07 8define amdgpu_ps <2 x i32> @s_and_v2i32(<2 x i32> inreg %num, <2 x i32> inreg %den) {9; GFX6-LABEL: s_and_v2i32:10; GFX6: ; %bb.0:11; GFX6-NEXT: s_and_b64 s[0:1], s[0:1], s[2:3]12; GFX6-NEXT: ; return to shader part epilog13;14; GFX8-LABEL: s_and_v2i32:15; GFX8: ; %bb.0:16; GFX8-NEXT: s_and_b64 s[0:1], s[0:1], s[2:3]17; GFX8-NEXT: ; return to shader part epilog18 %result = and <2 x i32> %num, %den19 ret <2 x i32> %result20}21 22define <2 x i32> @v_and_v2i32(<2 x i32> %num, <2 x i32> %den) {23; GFX6-LABEL: v_and_v2i32:24; GFX6: ; %bb.0:25; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)26; GFX6-NEXT: v_and_b32_e32 v1, v1, v327; GFX6-NEXT: v_and_b32_e32 v0, v0, v228; GFX6-NEXT: s_setpc_b64 s[30:31]29;30; GFX8-LABEL: v_and_v2i32:31; GFX8: ; %bb.0:32; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)33; GFX8-NEXT: v_and_b32_e32 v1, v1, v334; GFX8-NEXT: v_and_b32_e32 v0, v0, v235; GFX8-NEXT: s_setpc_b64 s[30:31]36 %result = and <2 x i32> %num, %den37 ret <2 x i32> %result38}39 40define amdgpu_kernel void @test2(ptr addrspace(1) %out, ptr addrspace(1) %in) {41; GFX6-LABEL: test2:42; GFX6: ; %bb.0:43; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x944; GFX6-NEXT: s_waitcnt lgkmcnt(0)45; GFX6-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x046; GFX6-NEXT: s_mov_b32 s3, 0xf00047; GFX6-NEXT: s_mov_b32 s2, -148; GFX6-NEXT: s_waitcnt lgkmcnt(0)49; GFX6-NEXT: s_and_b64 s[4:5], s[4:5], s[6:7]50; GFX6-NEXT: v_mov_b32_e32 v0, s451; GFX6-NEXT: v_mov_b32_e32 v1, s552; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 053; GFX6-NEXT: s_endpgm54;55; GFX8-LABEL: test2:56; GFX8: ; %bb.0:57; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2458; GFX8-NEXT: s_waitcnt lgkmcnt(0)59; GFX8-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x060; GFX8-NEXT: s_mov_b32 s3, 0xf00061; GFX8-NEXT: s_mov_b32 s2, -162; GFX8-NEXT: s_waitcnt lgkmcnt(0)63; GFX8-NEXT: s_and_b64 s[4:5], s[4:5], s[6:7]64; GFX8-NEXT: v_mov_b32_e32 v0, s465; GFX8-NEXT: v_mov_b32_e32 v1, s566; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 067; GFX8-NEXT: s_endpgm68 %b_ptr = getelementptr <2 x i32>, ptr addrspace(1) %in, i32 169 %a = load <2 x i32>, ptr addrspace(1) %in70 %b = load <2 x i32>, ptr addrspace(1) %b_ptr71 %result = and <2 x i32> %a, %b72 store <2 x i32> %result, ptr addrspace(1) %out73 ret void74}75 76define amdgpu_kernel void @test4(ptr addrspace(1) %out, ptr addrspace(1) %in) {77; GFX6-LABEL: test4:78; GFX6: ; %bb.0:79; GFX6-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x980; GFX6-NEXT: s_waitcnt lgkmcnt(0)81; GFX6-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x082; GFX6-NEXT: s_mov_b32 s11, 0xf00083; GFX6-NEXT: s_mov_b32 s10, -184; GFX6-NEXT: s_waitcnt lgkmcnt(0)85; GFX6-NEXT: s_and_b32 s3, s3, s786; GFX6-NEXT: s_and_b32 s2, s2, s687; GFX6-NEXT: s_and_b32 s1, s1, s588; GFX6-NEXT: s_and_b32 s0, s0, s489; GFX6-NEXT: v_mov_b32_e32 v0, s090; GFX6-NEXT: v_mov_b32_e32 v1, s191; GFX6-NEXT: v_mov_b32_e32 v2, s292; GFX6-NEXT: v_mov_b32_e32 v3, s393; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 094; GFX6-NEXT: s_endpgm95;96; GFX8-LABEL: test4:97; GFX8: ; %bb.0:98; GFX8-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x2499; GFX8-NEXT: s_waitcnt lgkmcnt(0)100; GFX8-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0101; GFX8-NEXT: s_mov_b32 s11, 0xf000102; GFX8-NEXT: s_mov_b32 s10, -1103; GFX8-NEXT: s_waitcnt lgkmcnt(0)104; GFX8-NEXT: s_and_b32 s3, s3, s7105; GFX8-NEXT: s_and_b32 s2, s2, s6106; GFX8-NEXT: s_and_b32 s1, s1, s5107; GFX8-NEXT: s_and_b32 s0, s0, s4108; GFX8-NEXT: v_mov_b32_e32 v0, s0109; GFX8-NEXT: v_mov_b32_e32 v1, s1110; GFX8-NEXT: v_mov_b32_e32 v2, s2111; GFX8-NEXT: v_mov_b32_e32 v3, s3112; GFX8-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0113; GFX8-NEXT: s_endpgm114 %b_ptr = getelementptr <4 x i32>, ptr addrspace(1) %in, i32 1115 %a = load <4 x i32>, ptr addrspace(1) %in116 %b = load <4 x i32>, ptr addrspace(1) %b_ptr117 %result = and <4 x i32> %a, %b118 store <4 x i32> %result, ptr addrspace(1) %out119 ret void120}121 122define amdgpu_kernel void @s_and_i32(ptr addrspace(1) %out, i32 %a, i32 %b) {123; GFX6-LABEL: s_and_i32:124; GFX6: ; %bb.0:125; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9126; GFX6-NEXT: s_waitcnt lgkmcnt(0)127; GFX6-NEXT: s_mov_b64 s[4:5], s[2:3]128; GFX6-NEXT: s_and_b32 s4, s4, s5129; GFX6-NEXT: s_mov_b32 s3, 0xf000130; GFX6-NEXT: s_mov_b32 s2, -1131; GFX6-NEXT: v_mov_b32_e32 v0, s4132; GFX6-NEXT: buffer_store_dword v0, off, s[0:3], 0133; GFX6-NEXT: s_endpgm134;135; GFX8-LABEL: s_and_i32:136; GFX8: ; %bb.0:137; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24138; GFX8-NEXT: s_waitcnt lgkmcnt(0)139; GFX8-NEXT: s_mov_b64 s[4:5], s[2:3]140; GFX8-NEXT: s_and_b32 s4, s4, s5141; GFX8-NEXT: s_mov_b32 s3, 0xf000142; GFX8-NEXT: s_mov_b32 s2, -1143; GFX8-NEXT: v_mov_b32_e32 v0, s4144; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0145; GFX8-NEXT: s_endpgm146 %and = and i32 %a, %b147 store i32 %and, ptr addrspace(1) %out, align 4148 ret void149}150 151define amdgpu_kernel void @s_and_constant_i32(ptr addrspace(1) %out, i32 %a) {152; GFX6-LABEL: s_and_constant_i32:153; GFX6: ; %bb.0:154; GFX6-NEXT: s_load_dword s6, s[4:5], 0xb155; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9156; GFX6-NEXT: s_mov_b32 s3, 0xf000157; GFX6-NEXT: s_mov_b32 s2, -1158; GFX6-NEXT: s_waitcnt lgkmcnt(0)159; GFX6-NEXT: s_and_b32 s4, s6, 0x12d687160; GFX6-NEXT: v_mov_b32_e32 v0, s4161; GFX6-NEXT: buffer_store_dword v0, off, s[0:3], 0162; GFX6-NEXT: s_endpgm163;164; GFX8-LABEL: s_and_constant_i32:165; GFX8: ; %bb.0:166; GFX8-NEXT: s_load_dword s6, s[4:5], 0x2c167; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24168; GFX8-NEXT: s_mov_b32 s3, 0xf000169; GFX8-NEXT: s_mov_b32 s2, -1170; GFX8-NEXT: s_waitcnt lgkmcnt(0)171; GFX8-NEXT: s_and_b32 s4, s6, 0x12d687172; GFX8-NEXT: v_mov_b32_e32 v0, s4173; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0174; GFX8-NEXT: s_endpgm175 %and = and i32 %a, 1234567176 store i32 %and, ptr addrspace(1) %out, align 4177 ret void178}179 180; FIXME: We should really duplicate the constant so that the SALU use181; can fold into the s_and_b32 and the VALU one is materialized182; directly without copying from the SGPR.183 184; Second use is a VGPR use of the constant.185 186define amdgpu_kernel void @s_and_multi_use_constant_i32_0(ptr addrspace(1) %out, i32 %a, i32 %b) {187; GFX6-LABEL: s_and_multi_use_constant_i32_0:188; GFX6: ; %bb.0:189; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9190; GFX6-NEXT: v_mov_b32_e32 v0, 0x12d687191; GFX6-NEXT: s_waitcnt lgkmcnt(0)192; GFX6-NEXT: s_mov_b64 s[4:5], s[2:3]193; GFX6-NEXT: s_and_b32 s4, s4, 0x12d687194; GFX6-NEXT: s_add_i32 s4, s4, s5195; GFX6-NEXT: s_mov_b32 s3, 0xf000196; GFX6-NEXT: s_mov_b32 s2, -1197; GFX6-NEXT: v_mov_b32_e32 v1, s4198; GFX6-NEXT: buffer_store_dword v1, off, s[0:3], 0199; GFX6-NEXT: s_waitcnt vmcnt(0)200; GFX6-NEXT: buffer_store_dword v0, off, s[0:3], 0201; GFX6-NEXT: s_waitcnt vmcnt(0)202; GFX6-NEXT: s_endpgm203;204; GFX8-LABEL: s_and_multi_use_constant_i32_0:205; GFX8: ; %bb.0:206; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24207; GFX8-NEXT: v_mov_b32_e32 v0, 0x12d687208; GFX8-NEXT: s_waitcnt lgkmcnt(0)209; GFX8-NEXT: s_mov_b64 s[4:5], s[2:3]210; GFX8-NEXT: s_and_b32 s4, s4, 0x12d687211; GFX8-NEXT: s_add_i32 s4, s4, s5212; GFX8-NEXT: s_mov_b32 s3, 0xf000213; GFX8-NEXT: s_mov_b32 s2, -1214; GFX8-NEXT: v_mov_b32_e32 v1, s4215; GFX8-NEXT: buffer_store_dword v1, off, s[0:3], 0216; GFX8-NEXT: s_waitcnt vmcnt(0)217; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0218; GFX8-NEXT: s_waitcnt vmcnt(0)219; GFX8-NEXT: s_endpgm220 %and = and i32 %a, 1234567221 222 ; Just to stop future replacement of copy to vgpr + store with VALU op.223 %foo = add i32 %and, %b224 store volatile i32 %foo, ptr addrspace(1) %out225 store volatile i32 1234567, ptr addrspace(1) %out226 ret void227}228 229; Second use is another SGPR use of the constant.230 231define amdgpu_kernel void @s_and_multi_use_constant_i32_1(ptr addrspace(1) %out, i32 %a, i32 %b) {232; GFX6-LABEL: s_and_multi_use_constant_i32_1:233; GFX6: ; %bb.0:234; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9235; GFX6-NEXT: s_waitcnt lgkmcnt(0)236; GFX6-NEXT: s_mov_b64 s[4:5], s[2:3]237; GFX6-NEXT: s_and_b32 s4, s4, 0x12d687238; GFX6-NEXT: s_add_i32 s4, s4, s5239; GFX6-NEXT: s_add_i32 s4, s4, 0x12d687240; GFX6-NEXT: s_mov_b32 s3, 0xf000241; GFX6-NEXT: s_mov_b32 s2, -1242; GFX6-NEXT: v_mov_b32_e32 v0, s4243; GFX6-NEXT: buffer_store_dword v0, off, s[0:3], 0244; GFX6-NEXT: s_waitcnt vmcnt(0)245; GFX6-NEXT: s_endpgm246;247; GFX8-LABEL: s_and_multi_use_constant_i32_1:248; GFX8: ; %bb.0:249; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24250; GFX8-NEXT: s_waitcnt lgkmcnt(0)251; GFX8-NEXT: s_mov_b64 s[4:5], s[2:3]252; GFX8-NEXT: s_and_b32 s4, s4, 0x12d687253; GFX8-NEXT: s_add_i32 s4, s4, s5254; GFX8-NEXT: s_add_i32 s4, s4, 0x12d687255; GFX8-NEXT: s_mov_b32 s3, 0xf000256; GFX8-NEXT: s_mov_b32 s2, -1257; GFX8-NEXT: v_mov_b32_e32 v0, s4258; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0259; GFX8-NEXT: s_waitcnt vmcnt(0)260; GFX8-NEXT: s_endpgm261 %and = and i32 %a, 1234567262 %foo = add i32 %and, 1234567263 %bar = add i32 %foo, %b264 store volatile i32 %bar, ptr addrspace(1) %out265 ret void266}267 268define amdgpu_kernel void @v_and_i32_vgpr_vgpr(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) {269; GFX6-LABEL: v_and_i32_vgpr_vgpr:270; GFX6: ; %bb.0:271; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9272; GFX6-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd273; GFX6-NEXT: s_mov_b32 s7, 0xf000274; GFX6-NEXT: s_mov_b32 s6, 0275; GFX6-NEXT: v_lshlrev_b32_e32 v0, 2, v0276; GFX6-NEXT: s_waitcnt lgkmcnt(0)277; GFX6-NEXT: s_mov_b64 s[4:5], s[2:3]278; GFX6-NEXT: v_mov_b32_e32 v1, 0279; GFX6-NEXT: s_mov_b64 s[10:11], s[6:7]280; GFX6-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64281; GFX6-NEXT: buffer_load_dword v3, v[0:1], s[8:11], 0 addr64282; GFX6-NEXT: s_mov_b64 s[2:3], s[6:7]283; GFX6-NEXT: s_waitcnt vmcnt(0)284; GFX6-NEXT: v_and_b32_e32 v2, v2, v3285; GFX6-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64286; GFX6-NEXT: s_endpgm287;288; GFX8-LABEL: v_and_i32_vgpr_vgpr:289; GFX8: ; %bb.0:290; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24291; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34292; GFX8-NEXT: v_lshlrev_b32_e32 v4, 2, v0293; GFX8-NEXT: s_waitcnt lgkmcnt(0)294; GFX8-NEXT: v_mov_b32_e32 v1, s3295; GFX8-NEXT: v_add_u32_e32 v0, vcc, s2, v4296; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc297; GFX8-NEXT: v_mov_b32_e32 v3, s5298; GFX8-NEXT: v_add_u32_e32 v2, vcc, s4, v4299; GFX8-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc300; GFX8-NEXT: flat_load_dword v5, v[0:1]301; GFX8-NEXT: flat_load_dword v2, v[2:3]302; GFX8-NEXT: v_mov_b32_e32 v1, s1303; GFX8-NEXT: v_add_u32_e32 v0, vcc, s0, v4304; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc305; GFX8-NEXT: s_waitcnt vmcnt(0)306; GFX8-NEXT: v_and_b32_e32 v2, v5, v2307; GFX8-NEXT: flat_store_dword v[0:1], v2308; GFX8-NEXT: s_endpgm309 %tid = call i32 @llvm.amdgcn.workitem.id.x() #0310 %gep.a = getelementptr i32, ptr addrspace(1) %aptr, i32 %tid311 %gep.b = getelementptr i32, ptr addrspace(1) %bptr, i32 %tid312 %gep.out = getelementptr i32, ptr addrspace(1) %out, i32 %tid313 %a = load i32, ptr addrspace(1) %gep.a314 %b = load i32, ptr addrspace(1) %gep.b315 %and = and i32 %a, %b316 store i32 %and, ptr addrspace(1) %gep.out317 ret void318}319 320define amdgpu_kernel void @v_and_i32_sgpr_vgpr(ptr addrspace(1) %out, i32 %a, ptr addrspace(1) %bptr) {321; GFX6-LABEL: v_and_i32_sgpr_vgpr:322; GFX6: ; %bb.0:323; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xd324; GFX6-NEXT: s_mov_b32 s3, 0xf000325; GFX6-NEXT: s_mov_b32 s2, 0326; GFX6-NEXT: v_lshlrev_b32_e32 v0, 2, v0327; GFX6-NEXT: v_mov_b32_e32 v1, 0328; GFX6-NEXT: s_waitcnt lgkmcnt(0)329; GFX6-NEXT: buffer_load_dword v2, v[0:1], s[0:3], 0 addr64330; GFX6-NEXT: s_load_dword s6, s[4:5], 0xb331; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9332; GFX6-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)333; GFX6-NEXT: v_and_b32_e32 v2, s6, v2334; GFX6-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64335; GFX6-NEXT: s_endpgm336;337; GFX8-LABEL: v_and_i32_sgpr_vgpr:338; GFX8: ; %bb.0:339; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34340; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0341; GFX8-NEXT: s_waitcnt lgkmcnt(0)342; GFX8-NEXT: v_mov_b32_e32 v1, s1343; GFX8-NEXT: v_add_u32_e32 v0, vcc, s0, v2344; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc345; GFX8-NEXT: flat_load_dword v3, v[0:1]346; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24347; GFX8-NEXT: s_load_dword s2, s[4:5], 0x2c348; GFX8-NEXT: s_waitcnt lgkmcnt(0)349; GFX8-NEXT: v_mov_b32_e32 v1, s1350; GFX8-NEXT: v_add_u32_e32 v0, vcc, s0, v2351; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc352; GFX8-NEXT: s_waitcnt vmcnt(0)353; GFX8-NEXT: v_and_b32_e32 v2, s2, v3354; GFX8-NEXT: flat_store_dword v[0:1], v2355; GFX8-NEXT: s_endpgm356 %tid = call i32 @llvm.amdgcn.workitem.id.x() #0357 %gep.b = getelementptr i32, ptr addrspace(1) %bptr, i32 %tid358 %gep.out = getelementptr i32, ptr addrspace(1) %out, i32 %tid359 %b = load i32, ptr addrspace(1) %gep.b360 %and = and i32 %a, %b361 store i32 %and, ptr addrspace(1) %gep.out362 ret void363}364 365define amdgpu_kernel void @v_and_i32_vgpr_sgpr(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i32 %b) {366; GFX6-LABEL: v_and_i32_vgpr_sgpr:367; GFX6: ; %bb.0:368; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9369; GFX6-NEXT: s_load_dword s8, s[4:5], 0xd370; GFX6-NEXT: s_mov_b32 s7, 0xf000371; GFX6-NEXT: s_mov_b32 s6, 0372; GFX6-NEXT: v_lshlrev_b32_e32 v0, 2, v0373; GFX6-NEXT: s_waitcnt lgkmcnt(0)374; GFX6-NEXT: s_mov_b64 s[4:5], s[2:3]375; GFX6-NEXT: v_mov_b32_e32 v1, 0376; GFX6-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64377; GFX6-NEXT: s_mov_b64 s[2:3], s[6:7]378; GFX6-NEXT: s_waitcnt vmcnt(0)379; GFX6-NEXT: v_and_b32_e32 v2, s8, v2380; GFX6-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64381; GFX6-NEXT: s_endpgm382;383; GFX8-LABEL: v_and_i32_vgpr_sgpr:384; GFX8: ; %bb.0:385; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24386; GFX8-NEXT: s_load_dword s4, s[4:5], 0x34387; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0388; GFX8-NEXT: s_waitcnt lgkmcnt(0)389; GFX8-NEXT: v_mov_b32_e32 v1, s3390; GFX8-NEXT: v_add_u32_e32 v0, vcc, s2, v2391; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc392; GFX8-NEXT: flat_load_dword v3, v[0:1]393; GFX8-NEXT: v_mov_b32_e32 v1, s1394; GFX8-NEXT: v_add_u32_e32 v0, vcc, s0, v2395; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc396; GFX8-NEXT: s_waitcnt vmcnt(0)397; GFX8-NEXT: v_and_b32_e32 v2, s4, v3398; GFX8-NEXT: flat_store_dword v[0:1], v2399; GFX8-NEXT: s_endpgm400 %tid = call i32 @llvm.amdgcn.workitem.id.x() #0401 %gep.a = getelementptr i32, ptr addrspace(1) %aptr, i32 %tid402 %gep.out = getelementptr i32, ptr addrspace(1) %out, i32 %tid403 %a = load i32, ptr addrspace(1) %gep.a404 %and = and i32 %a, %b405 store i32 %and, ptr addrspace(1) %gep.out406 ret void407}408 409define amdgpu_kernel void @v_and_constant_i32(ptr addrspace(1) %out, ptr addrspace(1) %aptr) {410; GFX6-LABEL: v_and_constant_i32:411; GFX6: ; %bb.0:412; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9413; GFX6-NEXT: s_mov_b32 s7, 0xf000414; GFX6-NEXT: s_mov_b32 s10, 0415; GFX6-NEXT: s_mov_b32 s11, s7416; GFX6-NEXT: v_lshlrev_b32_e32 v0, 2, v0417; GFX6-NEXT: s_waitcnt lgkmcnt(0)418; GFX6-NEXT: s_mov_b64 s[8:9], s[2:3]419; GFX6-NEXT: v_mov_b32_e32 v1, 0420; GFX6-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr64421; GFX6-NEXT: s_mov_b32 s6, -1422; GFX6-NEXT: s_mov_b32 s4, s0423; GFX6-NEXT: s_mov_b32 s5, s1424; GFX6-NEXT: s_waitcnt vmcnt(0)425; GFX6-NEXT: v_and_b32_e32 v0, 0x12d687, v0426; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 0427; GFX6-NEXT: s_endpgm428;429; GFX8-LABEL: v_and_constant_i32:430; GFX8: ; %bb.0:431; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24432; GFX8-NEXT: v_lshlrev_b32_e32 v0, 2, v0433; GFX8-NEXT: s_waitcnt lgkmcnt(0)434; GFX8-NEXT: v_mov_b32_e32 v1, s3435; GFX8-NEXT: v_add_u32_e32 v0, vcc, s2, v0436; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc437; GFX8-NEXT: flat_load_dword v0, v[0:1]438; GFX8-NEXT: s_mov_b32 s3, 0xf000439; GFX8-NEXT: s_mov_b32 s2, -1440; GFX8-NEXT: s_waitcnt vmcnt(0)441; GFX8-NEXT: v_and_b32_e32 v0, 0x12d687, v0442; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0443; GFX8-NEXT: s_endpgm444 %tid = call i32 @llvm.amdgcn.workitem.id.x() #0445 %gep = getelementptr i32, ptr addrspace(1) %aptr, i32 %tid446 %a = load i32, ptr addrspace(1) %gep, align 4447 %and = and i32 %a, 1234567448 store i32 %and, ptr addrspace(1) %out, align 4449 ret void450}451 452define amdgpu_kernel void @v_and_inline_imm_64_i32(ptr addrspace(1) %out, ptr addrspace(1) %aptr) {453; GFX6-LABEL: v_and_inline_imm_64_i32:454; GFX6: ; %bb.0:455; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9456; GFX6-NEXT: s_mov_b32 s7, 0xf000457; GFX6-NEXT: s_mov_b32 s10, 0458; GFX6-NEXT: s_mov_b32 s11, s7459; GFX6-NEXT: v_lshlrev_b32_e32 v0, 2, v0460; GFX6-NEXT: s_waitcnt lgkmcnt(0)461; GFX6-NEXT: s_mov_b64 s[8:9], s[2:3]462; GFX6-NEXT: v_mov_b32_e32 v1, 0463; GFX6-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr64464; GFX6-NEXT: s_mov_b32 s6, -1465; GFX6-NEXT: s_mov_b32 s4, s0466; GFX6-NEXT: s_mov_b32 s5, s1467; GFX6-NEXT: s_waitcnt vmcnt(0)468; GFX6-NEXT: v_and_b32_e32 v0, 64, v0469; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 0470; GFX6-NEXT: s_endpgm471;472; GFX8-LABEL: v_and_inline_imm_64_i32:473; GFX8: ; %bb.0:474; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24475; GFX8-NEXT: v_lshlrev_b32_e32 v0, 2, v0476; GFX8-NEXT: s_waitcnt lgkmcnt(0)477; GFX8-NEXT: v_mov_b32_e32 v1, s3478; GFX8-NEXT: v_add_u32_e32 v0, vcc, s2, v0479; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc480; GFX8-NEXT: flat_load_dword v0, v[0:1]481; GFX8-NEXT: s_mov_b32 s3, 0xf000482; GFX8-NEXT: s_mov_b32 s2, -1483; GFX8-NEXT: s_waitcnt vmcnt(0)484; GFX8-NEXT: v_and_b32_e32 v0, 64, v0485; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0486; GFX8-NEXT: s_endpgm487 %tid = call i32 @llvm.amdgcn.workitem.id.x() #0488 %gep = getelementptr i32, ptr addrspace(1) %aptr, i32 %tid489 %a = load i32, ptr addrspace(1) %gep, align 4490 %and = and i32 %a, 64491 store i32 %and, ptr addrspace(1) %out, align 4492 ret void493}494 495define amdgpu_kernel void @v_and_inline_imm_neg_16_i32(ptr addrspace(1) %out, ptr addrspace(1) %aptr) {496; GFX6-LABEL: v_and_inline_imm_neg_16_i32:497; GFX6: ; %bb.0:498; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9499; GFX6-NEXT: s_mov_b32 s7, 0xf000500; GFX6-NEXT: s_mov_b32 s10, 0501; GFX6-NEXT: s_mov_b32 s11, s7502; GFX6-NEXT: v_lshlrev_b32_e32 v0, 2, v0503; GFX6-NEXT: s_waitcnt lgkmcnt(0)504; GFX6-NEXT: s_mov_b64 s[8:9], s[2:3]505; GFX6-NEXT: v_mov_b32_e32 v1, 0506; GFX6-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr64507; GFX6-NEXT: s_mov_b32 s6, -1508; GFX6-NEXT: s_mov_b32 s4, s0509; GFX6-NEXT: s_mov_b32 s5, s1510; GFX6-NEXT: s_waitcnt vmcnt(0)511; GFX6-NEXT: v_and_b32_e32 v0, -16, v0512; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 0513; GFX6-NEXT: s_endpgm514;515; GFX8-LABEL: v_and_inline_imm_neg_16_i32:516; GFX8: ; %bb.0:517; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24518; GFX8-NEXT: v_lshlrev_b32_e32 v0, 2, v0519; GFX8-NEXT: s_waitcnt lgkmcnt(0)520; GFX8-NEXT: v_mov_b32_e32 v1, s3521; GFX8-NEXT: v_add_u32_e32 v0, vcc, s2, v0522; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc523; GFX8-NEXT: flat_load_dword v0, v[0:1]524; GFX8-NEXT: s_mov_b32 s3, 0xf000525; GFX8-NEXT: s_mov_b32 s2, -1526; GFX8-NEXT: s_waitcnt vmcnt(0)527; GFX8-NEXT: v_and_b32_e32 v0, -16, v0528; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0529; GFX8-NEXT: s_endpgm530 %tid = call i32 @llvm.amdgcn.workitem.id.x() #0531 %gep = getelementptr i32, ptr addrspace(1) %aptr, i32 %tid532 %a = load i32, ptr addrspace(1) %gep, align 4533 %and = and i32 %a, -16534 store i32 %and, ptr addrspace(1) %out, align 4535 ret void536}537 538define amdgpu_kernel void @s_and_i64(ptr addrspace(1) %out, i64 %a, i64 %b) {539; GFX6-LABEL: s_and_i64:540; GFX6: ; %bb.0:541; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9542; GFX6-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd543; GFX6-NEXT: s_mov_b32 s7, 0xf000544; GFX6-NEXT: s_mov_b32 s6, -1545; GFX6-NEXT: s_waitcnt lgkmcnt(0)546; GFX6-NEXT: s_mov_b32 s4, s0547; GFX6-NEXT: s_mov_b32 s5, s1548; GFX6-NEXT: s_and_b64 s[0:1], s[2:3], s[8:9]549; GFX6-NEXT: v_mov_b32_e32 v0, s0550; GFX6-NEXT: v_mov_b32_e32 v1, s1551; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0552; GFX6-NEXT: s_endpgm553;554; GFX8-LABEL: s_and_i64:555; GFX8: ; %bb.0:556; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24557; GFX8-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34558; GFX8-NEXT: s_mov_b32 s7, 0xf000559; GFX8-NEXT: s_mov_b32 s6, -1560; GFX8-NEXT: s_waitcnt lgkmcnt(0)561; GFX8-NEXT: s_mov_b32 s4, s0562; GFX8-NEXT: s_mov_b32 s5, s1563; GFX8-NEXT: s_and_b64 s[0:1], s[2:3], s[8:9]564; GFX8-NEXT: v_mov_b32_e32 v0, s0565; GFX8-NEXT: v_mov_b32_e32 v1, s1566; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0567; GFX8-NEXT: s_endpgm568 %and = and i64 %a, %b569 store i64 %and, ptr addrspace(1) %out, align 8570 ret void571}572 573define amdgpu_kernel void @s_and_i1(ptr addrspace(1) %out, i1 %a, i1 %b) {574; GFX6-LABEL: s_and_i1:575; GFX6: ; %bb.0:576; GFX6-NEXT: s_load_dword s6, s[4:5], 0xb577; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9578; GFX6-NEXT: s_mov_b32 s3, 0xf000579; GFX6-NEXT: s_mov_b32 s2, -1580; GFX6-NEXT: s_waitcnt lgkmcnt(0)581; GFX6-NEXT: s_lshr_b32 s4, s6, 8582; GFX6-NEXT: s_and_b32 s4, s6, s4583; GFX6-NEXT: s_and_b32 s4, s4, 1584; GFX6-NEXT: v_mov_b32_e32 v0, s4585; GFX6-NEXT: buffer_store_byte v0, off, s[0:3], 0586; GFX6-NEXT: s_endpgm587;588; GFX8-LABEL: s_and_i1:589; GFX8: ; %bb.0:590; GFX8-NEXT: s_load_dword s6, s[4:5], 0x2c591; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24592; GFX8-NEXT: s_mov_b32 s3, 0xf000593; GFX8-NEXT: s_mov_b32 s2, -1594; GFX8-NEXT: s_waitcnt lgkmcnt(0)595; GFX8-NEXT: s_lshr_b32 s4, s6, 8596; GFX8-NEXT: s_and_b32 s4, s6, s4597; GFX8-NEXT: s_and_b32 s4, s4, 1598; GFX8-NEXT: v_mov_b32_e32 v0, s4599; GFX8-NEXT: buffer_store_byte v0, off, s[0:3], 0600; GFX8-NEXT: s_endpgm601 %and = and i1 %a, %b602 store i1 %and, ptr addrspace(1) %out603 ret void604}605 606define amdgpu_kernel void @s_and_constant_i64(ptr addrspace(1) %out, i64 %a) {607; GFX6-LABEL: s_and_constant_i64:608; GFX6: ; %bb.0:609; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9610; GFX6-NEXT: s_mov_b32 s7, 0xf000611; GFX6-NEXT: s_mov_b32 s6, -1612; GFX6-NEXT: s_waitcnt lgkmcnt(0)613; GFX6-NEXT: s_mov_b32 s4, s0614; GFX6-NEXT: s_mov_b32 s5, s1615; GFX6-NEXT: s_and_b32 s0, s3, 0x80616; GFX6-NEXT: s_and_b32 s1, s2, 0x80000617; GFX6-NEXT: v_mov_b32_e32 v0, s1618; GFX6-NEXT: v_mov_b32_e32 v1, s0619; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0620; GFX6-NEXT: s_endpgm621;622; GFX8-LABEL: s_and_constant_i64:623; GFX8: ; %bb.0:624; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24625; GFX8-NEXT: s_mov_b32 s7, 0xf000626; GFX8-NEXT: s_mov_b32 s6, -1627; GFX8-NEXT: s_waitcnt lgkmcnt(0)628; GFX8-NEXT: s_mov_b32 s4, s0629; GFX8-NEXT: s_mov_b32 s5, s1630; GFX8-NEXT: s_and_b32 s0, s3, 0x80631; GFX8-NEXT: s_and_b32 s1, s2, 0x80000632; GFX8-NEXT: v_mov_b32_e32 v0, s1633; GFX8-NEXT: v_mov_b32_e32 v1, s0634; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0635; GFX8-NEXT: s_endpgm636 %and = and i64 %a, 549756338176637 store i64 %and, ptr addrspace(1) %out, align 8638 ret void639}640 641define amdgpu_kernel void @s_and_multi_use_constant_i64(ptr addrspace(1) %out, i64 %a, i64 %b) {642; GFX6-LABEL: s_and_multi_use_constant_i64:643; GFX6: ; %bb.0:644; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9645; GFX6-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd646; GFX6-NEXT: s_mov_b32 s7, 0xf000647; GFX6-NEXT: s_mov_b32 s6, -1648; GFX6-NEXT: s_waitcnt lgkmcnt(0)649; GFX6-NEXT: s_mov_b32 s4, s0650; GFX6-NEXT: s_mov_b32 s5, s1651; GFX6-NEXT: s_mov_b32 s0, 0x80000652; GFX6-NEXT: s_movk_i32 s1, 0x80653; GFX6-NEXT: s_and_b64 s[2:3], s[2:3], s[0:1]654; GFX6-NEXT: v_mov_b32_e32 v0, s2655; GFX6-NEXT: s_and_b64 s[0:1], s[8:9], s[0:1]656; GFX6-NEXT: v_mov_b32_e32 v1, s3657; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0658; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0)659; GFX6-NEXT: v_mov_b32_e32 v0, s0660; GFX6-NEXT: v_mov_b32_e32 v1, s1661; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0662; GFX6-NEXT: s_waitcnt vmcnt(0)663; GFX6-NEXT: s_endpgm664;665; GFX8-LABEL: s_and_multi_use_constant_i64:666; GFX8: ; %bb.0:667; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24668; GFX8-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34669; GFX8-NEXT: s_mov_b32 s7, 0xf000670; GFX8-NEXT: s_mov_b32 s6, -1671; GFX8-NEXT: s_waitcnt lgkmcnt(0)672; GFX8-NEXT: s_mov_b32 s4, s0673; GFX8-NEXT: s_mov_b32 s5, s1674; GFX8-NEXT: s_mov_b32 s0, 0x80000675; GFX8-NEXT: s_movk_i32 s1, 0x80676; GFX8-NEXT: s_and_b64 s[2:3], s[2:3], s[0:1]677; GFX8-NEXT: v_mov_b32_e32 v0, s2678; GFX8-NEXT: s_and_b64 s[0:1], s[8:9], s[0:1]679; GFX8-NEXT: v_mov_b32_e32 v1, s3680; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0681; GFX8-NEXT: s_waitcnt vmcnt(0)682; GFX8-NEXT: v_mov_b32_e32 v0, s0683; GFX8-NEXT: v_mov_b32_e32 v1, s1684; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0685; GFX8-NEXT: s_waitcnt vmcnt(0)686; GFX8-NEXT: s_endpgm687 %and0 = and i64 %a, 549756338176688 %and1 = and i64 %b, 549756338176689 store volatile i64 %and0, ptr addrspace(1) %out690 store volatile i64 %and1, ptr addrspace(1) %out691 ret void692}693 694define amdgpu_kernel void @s_and_32_bit_constant_i64(ptr addrspace(1) %out, i32, i64 %a) {695; GFX6-LABEL: s_and_32_bit_constant_i64:696; GFX6: ; %bb.0:697; GFX6-NEXT: s_load_dword s6, s[4:5], 0xd698; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9699; GFX6-NEXT: s_mov_b32 s3, 0xf000700; GFX6-NEXT: s_mov_b32 s2, -1701; GFX6-NEXT: v_mov_b32_e32 v1, 0702; GFX6-NEXT: s_waitcnt lgkmcnt(0)703; GFX6-NEXT: s_and_b32 s4, s6, 0x12d687704; GFX6-NEXT: v_mov_b32_e32 v0, s4705; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0706; GFX6-NEXT: s_endpgm707;708; GFX8-LABEL: s_and_32_bit_constant_i64:709; GFX8: ; %bb.0:710; GFX8-NEXT: s_load_dword s6, s[4:5], 0x34711; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24712; GFX8-NEXT: s_mov_b32 s3, 0xf000713; GFX8-NEXT: s_mov_b32 s2, -1714; GFX8-NEXT: v_mov_b32_e32 v1, 0715; GFX8-NEXT: s_waitcnt lgkmcnt(0)716; GFX8-NEXT: s_and_b32 s4, s6, 0x12d687717; GFX8-NEXT: v_mov_b32_e32 v0, s4718; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0719; GFX8-NEXT: s_endpgm720 %and = and i64 %a, 1234567721 store i64 %and, ptr addrspace(1) %out, align 8722 ret void723}724 725define amdgpu_kernel void @s_and_multi_use_inline_imm_i64(ptr addrspace(1) %out, i32, i64 %a, i32, i64 %b, i32, i64 %c) {726; GFX6-LABEL: s_and_multi_use_inline_imm_i64:727; GFX6: ; %bb.0:728; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9729; GFX6-NEXT: s_load_dword s6, s[4:5], 0xd730; GFX6-NEXT: s_load_dword s7, s[4:5], 0x11731; GFX6-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x15732; GFX6-NEXT: s_mov_b32 s3, 0xf000733; GFX6-NEXT: s_mov_b32 s2, -1734; GFX6-NEXT: s_waitcnt lgkmcnt(0)735; GFX6-NEXT: s_lshl_b32 s6, s6, 1736; GFX6-NEXT: s_lshl_b32 s7, s7, 1737; GFX6-NEXT: s_and_b32 s6, s6, 62738; GFX6-NEXT: s_and_b32 s8, s7, 62739; GFX6-NEXT: s_add_u32 s6, s6, s4740; GFX6-NEXT: s_addc_u32 s7, 0, s5741; GFX6-NEXT: v_mov_b32_e32 v0, s6742; GFX6-NEXT: s_add_u32 s4, s8, s4743; GFX6-NEXT: v_mov_b32_e32 v1, s7744; GFX6-NEXT: s_addc_u32 s5, 0, s5745; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0746; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0)747; GFX6-NEXT: v_mov_b32_e32 v0, s4748; GFX6-NEXT: v_mov_b32_e32 v1, s5749; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0750; GFX6-NEXT: s_waitcnt vmcnt(0)751; GFX6-NEXT: s_endpgm752;753; GFX8-LABEL: s_and_multi_use_inline_imm_i64:754; GFX8: ; %bb.0:755; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24756; GFX8-NEXT: s_load_dword s6, s[4:5], 0x34757; GFX8-NEXT: s_load_dword s7, s[4:5], 0x44758; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x54759; GFX8-NEXT: s_mov_b32 s3, 0xf000760; GFX8-NEXT: s_mov_b32 s2, -1761; GFX8-NEXT: s_waitcnt lgkmcnt(0)762; GFX8-NEXT: s_lshl_b32 s6, s6, 1763; GFX8-NEXT: s_lshl_b32 s7, s7, 1764; GFX8-NEXT: s_and_b32 s6, s6, 62765; GFX8-NEXT: s_and_b32 s8, s7, 62766; GFX8-NEXT: s_add_u32 s6, s6, s4767; GFX8-NEXT: s_addc_u32 s7, 0, s5768; GFX8-NEXT: v_mov_b32_e32 v0, s6769; GFX8-NEXT: s_add_u32 s4, s8, s4770; GFX8-NEXT: v_mov_b32_e32 v1, s7771; GFX8-NEXT: s_addc_u32 s5, 0, s5772; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0773; GFX8-NEXT: s_waitcnt vmcnt(0)774; GFX8-NEXT: v_mov_b32_e32 v0, s4775; GFX8-NEXT: v_mov_b32_e32 v1, s5776; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0777; GFX8-NEXT: s_waitcnt vmcnt(0)778; GFX8-NEXT: s_endpgm779 %shl.a = shl i64 %a, 1780 %shl.b = shl i64 %b, 1781 %and0 = and i64 %shl.a, 62782 %and1 = and i64 %shl.b, 62783 %add0 = add i64 %and0, %c784 %add1 = add i64 %and1, %c785 store volatile i64 %add0, ptr addrspace(1) %out786 store volatile i64 %add1, ptr addrspace(1) %out787 ret void788}789 790define amdgpu_kernel void @v_and_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) {791; GFX6-LABEL: v_and_i64:792; GFX6: ; %bb.0:793; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9794; GFX6-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd795; GFX6-NEXT: s_mov_b32 s11, 0xf000796; GFX6-NEXT: s_mov_b32 s14, 0797; GFX6-NEXT: s_mov_b32 s15, s11798; GFX6-NEXT: v_lshlrev_b32_e32 v0, 3, v0799; GFX6-NEXT: v_mov_b32_e32 v1, 0800; GFX6-NEXT: s_mov_b64 s[6:7], s[14:15]801; GFX6-NEXT: s_waitcnt lgkmcnt(0)802; GFX6-NEXT: s_mov_b64 s[12:13], s[2:3]803; GFX6-NEXT: buffer_load_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64804; GFX6-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[12:15], 0 addr64805; GFX6-NEXT: s_mov_b32 s10, -1806; GFX6-NEXT: s_mov_b32 s8, s0807; GFX6-NEXT: s_mov_b32 s9, s1808; GFX6-NEXT: s_waitcnt vmcnt(0)809; GFX6-NEXT: v_and_b32_e32 v1, v1, v3810; GFX6-NEXT: v_and_b32_e32 v0, v0, v2811; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0812; GFX6-NEXT: s_endpgm813;814; GFX8-LABEL: v_and_i64:815; GFX8: ; %bb.0:816; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24817; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34818; GFX8-NEXT: v_lshlrev_b32_e32 v2, 3, v0819; GFX8-NEXT: s_waitcnt lgkmcnt(0)820; GFX8-NEXT: v_mov_b32_e32 v1, s3821; GFX8-NEXT: v_add_u32_e32 v0, vcc, s2, v2822; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc823; GFX8-NEXT: v_mov_b32_e32 v3, s5824; GFX8-NEXT: v_add_u32_e32 v2, vcc, s4, v2825; GFX8-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc826; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]827; GFX8-NEXT: flat_load_dwordx2 v[2:3], v[2:3]828; GFX8-NEXT: s_mov_b32 s3, 0xf000829; GFX8-NEXT: s_mov_b32 s2, -1830; GFX8-NEXT: s_waitcnt vmcnt(0)831; GFX8-NEXT: v_and_b32_e32 v1, v1, v3832; GFX8-NEXT: v_and_b32_e32 v0, v0, v2833; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0834; GFX8-NEXT: s_endpgm835 %tid = call i32 @llvm.amdgcn.workitem.id.x() #0836 %gep.a = getelementptr i64, ptr addrspace(1) %aptr, i32 %tid837 %a = load i64, ptr addrspace(1) %gep.a, align 8838 %gep.b = getelementptr i64, ptr addrspace(1) %bptr, i32 %tid839 %b = load i64, ptr addrspace(1) %gep.b, align 8840 %and = and i64 %a, %b841 store i64 %and, ptr addrspace(1) %out, align 8842 ret void843}844 845define amdgpu_kernel void @v_and_constant_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr) {846; GFX6-LABEL: v_and_constant_i64:847; GFX6: ; %bb.0:848; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9849; GFX6-NEXT: s_mov_b32 s7, 0xf000850; GFX6-NEXT: s_mov_b32 s10, 0851; GFX6-NEXT: s_mov_b32 s11, s7852; GFX6-NEXT: v_lshlrev_b32_e32 v0, 3, v0853; GFX6-NEXT: s_waitcnt lgkmcnt(0)854; GFX6-NEXT: s_mov_b64 s[8:9], s[2:3]855; GFX6-NEXT: v_mov_b32_e32 v1, 0856; GFX6-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[8:11], 0 addr64857; GFX6-NEXT: s_mov_b32 s6, -1858; GFX6-NEXT: s_mov_b32 s4, s0859; GFX6-NEXT: s_mov_b32 s5, s1860; GFX6-NEXT: s_waitcnt vmcnt(0)861; GFX6-NEXT: v_and_b32_e32 v1, 0x11e, v1862; GFX6-NEXT: v_and_b32_e32 v0, 0xab19b207, v0863; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0864; GFX6-NEXT: s_endpgm865;866; GFX8-LABEL: v_and_constant_i64:867; GFX8: ; %bb.0:868; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24869; GFX8-NEXT: v_lshlrev_b32_e32 v0, 3, v0870; GFX8-NEXT: s_waitcnt lgkmcnt(0)871; GFX8-NEXT: v_mov_b32_e32 v1, s3872; GFX8-NEXT: v_add_u32_e32 v0, vcc, s2, v0873; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc874; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]875; GFX8-NEXT: s_mov_b32 s3, 0xf000876; GFX8-NEXT: s_mov_b32 s2, -1877; GFX8-NEXT: s_waitcnt vmcnt(0)878; GFX8-NEXT: v_and_b32_e32 v1, 0x11e, v1879; GFX8-NEXT: v_and_b32_e32 v0, 0xab19b207, v0880; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0881; GFX8-NEXT: s_endpgm882 %tid = call i32 @llvm.amdgcn.workitem.id.x() #0883 %gep.a = getelementptr i64, ptr addrspace(1) %aptr, i32 %tid884 %a = load i64, ptr addrspace(1) %gep.a, align 8885 %and = and i64 %a, 1231231234567886 store i64 %and, ptr addrspace(1) %out, align 8887 ret void888}889 890define amdgpu_kernel void @v_and_multi_use_constant_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr) {891; GFX6-LABEL: v_and_multi_use_constant_i64:892; GFX6: ; %bb.0:893; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9894; GFX6-NEXT: s_mov_b32 s7, 0xf000895; GFX6-NEXT: s_mov_b32 s6, -1896; GFX6-NEXT: s_mov_b32 s10, s6897; GFX6-NEXT: s_mov_b32 s11, s7898; GFX6-NEXT: s_waitcnt lgkmcnt(0)899; GFX6-NEXT: s_mov_b32 s8, s2900; GFX6-NEXT: s_mov_b32 s9, s3901; GFX6-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 glc902; GFX6-NEXT: s_waitcnt vmcnt(0)903; GFX6-NEXT: buffer_load_dwordx2 v[2:3], off, s[8:11], 0 glc904; GFX6-NEXT: s_waitcnt vmcnt(0)905; GFX6-NEXT: s_mov_b32 s4, s0906; GFX6-NEXT: s_mov_b32 s5, s1907; GFX6-NEXT: v_and_b32_e32 v0, 0xab19b207, v0908; GFX6-NEXT: v_and_b32_e32 v1, 0x11e, v1909; GFX6-NEXT: v_and_b32_e32 v2, 0xab19b207, v2910; GFX6-NEXT: v_and_b32_e32 v3, 0x11e, v3911; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0912; GFX6-NEXT: s_waitcnt vmcnt(0)913; GFX6-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0914; GFX6-NEXT: s_waitcnt vmcnt(0)915; GFX6-NEXT: s_endpgm916;917; GFX8-LABEL: v_and_multi_use_constant_i64:918; GFX8: ; %bb.0:919; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24920; GFX8-NEXT: s_mov_b32 s7, 0xf000921; GFX8-NEXT: s_mov_b32 s6, -1922; GFX8-NEXT: s_mov_b32 s10, s6923; GFX8-NEXT: s_mov_b32 s11, s7924; GFX8-NEXT: s_waitcnt lgkmcnt(0)925; GFX8-NEXT: s_mov_b32 s8, s2926; GFX8-NEXT: s_mov_b32 s9, s3927; GFX8-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 glc928; GFX8-NEXT: s_waitcnt vmcnt(0)929; GFX8-NEXT: buffer_load_dwordx2 v[2:3], off, s[8:11], 0 glc930; GFX8-NEXT: s_waitcnt vmcnt(0)931; GFX8-NEXT: s_mov_b32 s4, s0932; GFX8-NEXT: s_mov_b32 s5, s1933; GFX8-NEXT: v_and_b32_e32 v0, 0xab19b207, v0934; GFX8-NEXT: v_and_b32_e32 v1, 0x11e, v1935; GFX8-NEXT: v_and_b32_e32 v2, 0xab19b207, v2936; GFX8-NEXT: v_and_b32_e32 v3, 0x11e, v3937; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0938; GFX8-NEXT: s_waitcnt vmcnt(0)939; GFX8-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0940; GFX8-NEXT: s_waitcnt vmcnt(0)941; GFX8-NEXT: s_endpgm942 %a = load volatile i64, ptr addrspace(1) %aptr943 %b = load volatile i64, ptr addrspace(1) %aptr944 %and0 = and i64 %a, 1231231234567945 %and1 = and i64 %b, 1231231234567946 store volatile i64 %and0, ptr addrspace(1) %out947 store volatile i64 %and1, ptr addrspace(1) %out948 ret void949}950 951define amdgpu_kernel void @v_and_multi_use_inline_imm_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr) {952; GFX6-LABEL: v_and_multi_use_inline_imm_i64:953; GFX6: ; %bb.0:954; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9955; GFX6-NEXT: s_mov_b32 s7, 0xf000956; GFX6-NEXT: s_mov_b32 s6, -1957; GFX6-NEXT: s_mov_b32 s10, s6958; GFX6-NEXT: s_mov_b32 s11, s7959; GFX6-NEXT: s_waitcnt lgkmcnt(0)960; GFX6-NEXT: s_mov_b32 s8, s2961; GFX6-NEXT: s_mov_b32 s9, s3962; GFX6-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 glc963; GFX6-NEXT: s_waitcnt vmcnt(0)964; GFX6-NEXT: buffer_load_dwordx2 v[1:2], off, s[8:11], 0 glc965; GFX6-NEXT: s_waitcnt vmcnt(0)966; GFX6-NEXT: v_mov_b32_e32 v3, 0967; GFX6-NEXT: s_mov_b32 s4, s0968; GFX6-NEXT: s_mov_b32 s5, s1969; GFX6-NEXT: v_mov_b32_e32 v5, v3970; GFX6-NEXT: v_and_b32_e32 v2, 63, v0971; GFX6-NEXT: v_and_b32_e32 v4, 63, v1972; GFX6-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0973; GFX6-NEXT: s_waitcnt vmcnt(0)974; GFX6-NEXT: buffer_store_dwordx2 v[4:5], off, s[4:7], 0975; GFX6-NEXT: s_waitcnt vmcnt(0)976; GFX6-NEXT: s_endpgm977;978; GFX8-LABEL: v_and_multi_use_inline_imm_i64:979; GFX8: ; %bb.0:980; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24981; GFX8-NEXT: s_mov_b32 s7, 0xf000982; GFX8-NEXT: s_mov_b32 s6, -1983; GFX8-NEXT: s_mov_b32 s10, s6984; GFX8-NEXT: s_mov_b32 s11, s7985; GFX8-NEXT: s_waitcnt lgkmcnt(0)986; GFX8-NEXT: s_mov_b32 s8, s2987; GFX8-NEXT: s_mov_b32 s9, s3988; GFX8-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 glc989; GFX8-NEXT: s_waitcnt vmcnt(0)990; GFX8-NEXT: buffer_load_dwordx2 v[1:2], off, s[8:11], 0 glc991; GFX8-NEXT: s_waitcnt vmcnt(0)992; GFX8-NEXT: v_mov_b32_e32 v3, 0993; GFX8-NEXT: s_mov_b32 s4, s0994; GFX8-NEXT: s_mov_b32 s5, s1995; GFX8-NEXT: v_mov_b32_e32 v5, v3996; GFX8-NEXT: v_and_b32_e32 v2, 63, v0997; GFX8-NEXT: v_and_b32_e32 v4, 63, v1998; GFX8-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0999; GFX8-NEXT: s_waitcnt vmcnt(0)1000; GFX8-NEXT: buffer_store_dwordx2 v[4:5], off, s[4:7], 01001; GFX8-NEXT: s_waitcnt vmcnt(0)1002; GFX8-NEXT: s_endpgm1003 %a = load volatile i64, ptr addrspace(1) %aptr1004 %b = load volatile i64, ptr addrspace(1) %aptr1005 %and0 = and i64 %a, 631006 %and1 = and i64 %b, 631007 store volatile i64 %and0, ptr addrspace(1) %out1008 store volatile i64 %and1, ptr addrspace(1) %out1009 ret void1010}1011 1012define amdgpu_kernel void @v_and_i64_32_bit_constant(ptr addrspace(1) %out, ptr addrspace(1) %aptr) {1013; GFX6-LABEL: v_and_i64_32_bit_constant:1014; GFX6: ; %bb.0:1015; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91016; GFX6-NEXT: s_mov_b32 s7, 0xf0001017; GFX6-NEXT: s_mov_b32 s10, 01018; GFX6-NEXT: s_mov_b32 s11, s71019; GFX6-NEXT: v_lshlrev_b32_e32 v0, 3, v01020; GFX6-NEXT: s_waitcnt lgkmcnt(0)1021; GFX6-NEXT: s_mov_b64 s[8:9], s[2:3]1022; GFX6-NEXT: v_mov_b32_e32 v1, 01023; GFX6-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr641024; GFX6-NEXT: s_mov_b32 s6, -11025; GFX6-NEXT: s_mov_b32 s4, s01026; GFX6-NEXT: s_mov_b32 s5, s11027; GFX6-NEXT: s_waitcnt vmcnt(0)1028; GFX6-NEXT: v_and_b32_e32 v0, 0x12d687, v01029; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01030; GFX6-NEXT: s_endpgm1031;1032; GFX8-LABEL: v_and_i64_32_bit_constant:1033; GFX8: ; %bb.0:1034; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241035; GFX8-NEXT: v_lshlrev_b32_e32 v0, 3, v01036; GFX8-NEXT: s_waitcnt lgkmcnt(0)1037; GFX8-NEXT: v_mov_b32_e32 v1, s31038; GFX8-NEXT: v_add_u32_e32 v0, vcc, s2, v01039; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1040; GFX8-NEXT: flat_load_dword v0, v[0:1]1041; GFX8-NEXT: s_mov_b32 s3, 0xf0001042; GFX8-NEXT: s_mov_b32 s2, -11043; GFX8-NEXT: v_mov_b32_e32 v1, 01044; GFX8-NEXT: s_waitcnt vmcnt(0)1045; GFX8-NEXT: v_and_b32_e32 v0, 0x12d687, v01046; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01047; GFX8-NEXT: s_endpgm1048 %tid = call i32 @llvm.amdgcn.workitem.id.x() #01049 %gep.a = getelementptr i64, ptr addrspace(1) %aptr, i32 %tid1050 %a = load i64, ptr addrspace(1) %gep.a, align 81051 %and = and i64 %a, 12345671052 store i64 %and, ptr addrspace(1) %out, align 81053 ret void1054}1055 1056define amdgpu_kernel void @v_and_inline_imm_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr) {1057; GFX6-LABEL: v_and_inline_imm_i64:1058; GFX6: ; %bb.0:1059; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91060; GFX6-NEXT: s_mov_b32 s7, 0xf0001061; GFX6-NEXT: s_mov_b32 s10, 01062; GFX6-NEXT: s_mov_b32 s11, s71063; GFX6-NEXT: v_lshlrev_b32_e32 v0, 3, v01064; GFX6-NEXT: s_waitcnt lgkmcnt(0)1065; GFX6-NEXT: s_mov_b64 s[8:9], s[2:3]1066; GFX6-NEXT: v_mov_b32_e32 v1, 01067; GFX6-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr641068; GFX6-NEXT: s_mov_b32 s6, -11069; GFX6-NEXT: s_mov_b32 s4, s01070; GFX6-NEXT: s_mov_b32 s5, s11071; GFX6-NEXT: s_waitcnt vmcnt(0)1072; GFX6-NEXT: v_and_b32_e32 v0, 64, v01073; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01074; GFX6-NEXT: s_endpgm1075;1076; GFX8-LABEL: v_and_inline_imm_i64:1077; GFX8: ; %bb.0:1078; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241079; GFX8-NEXT: v_lshlrev_b32_e32 v0, 3, v01080; GFX8-NEXT: s_waitcnt lgkmcnt(0)1081; GFX8-NEXT: v_mov_b32_e32 v1, s31082; GFX8-NEXT: v_add_u32_e32 v0, vcc, s2, v01083; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1084; GFX8-NEXT: flat_load_dword v0, v[0:1]1085; GFX8-NEXT: s_mov_b32 s3, 0xf0001086; GFX8-NEXT: s_mov_b32 s2, -11087; GFX8-NEXT: v_mov_b32_e32 v1, 01088; GFX8-NEXT: s_waitcnt vmcnt(0)1089; GFX8-NEXT: v_and_b32_e32 v0, 64, v01090; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01091; GFX8-NEXT: s_endpgm1092 %tid = call i32 @llvm.amdgcn.workitem.id.x() #01093 %gep.a = getelementptr i64, ptr addrspace(1) %aptr, i32 %tid1094 %a = load i64, ptr addrspace(1) %gep.a, align 81095 %and = and i64 %a, 641096 store i64 %and, ptr addrspace(1) %out, align 81097 ret void1098}1099 1100; FIXME: Should be able to reduce load width1101 1102define amdgpu_kernel void @v_and_inline_neg_imm_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr) {1103; GFX6-LABEL: v_and_inline_neg_imm_i64:1104; GFX6: ; %bb.0:1105; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91106; GFX6-NEXT: s_mov_b32 s7, 0xf0001107; GFX6-NEXT: s_mov_b32 s10, 01108; GFX6-NEXT: s_mov_b32 s11, s71109; GFX6-NEXT: v_lshlrev_b32_e32 v0, 3, v01110; GFX6-NEXT: s_waitcnt lgkmcnt(0)1111; GFX6-NEXT: s_mov_b64 s[8:9], s[2:3]1112; GFX6-NEXT: v_mov_b32_e32 v1, 01113; GFX6-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[8:11], 0 addr641114; GFX6-NEXT: s_mov_b32 s6, -11115; GFX6-NEXT: s_mov_b32 s4, s01116; GFX6-NEXT: s_mov_b32 s5, s11117; GFX6-NEXT: s_waitcnt vmcnt(0)1118; GFX6-NEXT: v_and_b32_e32 v0, -8, v01119; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01120; GFX6-NEXT: s_endpgm1121;1122; GFX8-LABEL: v_and_inline_neg_imm_i64:1123; GFX8: ; %bb.0:1124; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241125; GFX8-NEXT: v_lshlrev_b32_e32 v0, 3, v01126; GFX8-NEXT: s_waitcnt lgkmcnt(0)1127; GFX8-NEXT: v_mov_b32_e32 v1, s31128; GFX8-NEXT: v_add_u32_e32 v0, vcc, s2, v01129; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1130; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]1131; GFX8-NEXT: s_mov_b32 s3, 0xf0001132; GFX8-NEXT: s_mov_b32 s2, -11133; GFX8-NEXT: s_waitcnt vmcnt(0)1134; GFX8-NEXT: v_and_b32_e32 v0, -8, v01135; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01136; GFX8-NEXT: s_endpgm1137 %tid = call i32 @llvm.amdgcn.workitem.id.x() #01138 %gep.a = getelementptr i64, ptr addrspace(1) %aptr, i32 %tid1139 %a = load i64, ptr addrspace(1) %gep.a, align 81140 %and = and i64 %a, -81141 store i64 %and, ptr addrspace(1) %out, align 81142 ret void1143}1144 1145define amdgpu_kernel void @s_and_inline_imm_64_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a) {1146; GFX6-LABEL: s_and_inline_imm_64_i64:1147; GFX6: ; %bb.0:1148; GFX6-NEXT: s_load_dword s6, s[4:5], 0xd1149; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91150; GFX6-NEXT: s_mov_b32 s3, 0xf0001151; GFX6-NEXT: s_mov_b32 s2, -11152; GFX6-NEXT: v_mov_b32_e32 v1, 01153; GFX6-NEXT: s_waitcnt lgkmcnt(0)1154; GFX6-NEXT: s_and_b32 s4, s6, 641155; GFX6-NEXT: v_mov_b32_e32 v0, s41156; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01157; GFX6-NEXT: s_endpgm1158;1159; GFX8-LABEL: s_and_inline_imm_64_i64:1160; GFX8: ; %bb.0:1161; GFX8-NEXT: s_load_dword s6, s[4:5], 0x341162; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241163; GFX8-NEXT: s_mov_b32 s3, 0xf0001164; GFX8-NEXT: s_mov_b32 s2, -11165; GFX8-NEXT: v_mov_b32_e32 v1, 01166; GFX8-NEXT: s_waitcnt lgkmcnt(0)1167; GFX8-NEXT: s_and_b32 s4, s6, 641168; GFX8-NEXT: v_mov_b32_e32 v0, s41169; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01170; GFX8-NEXT: s_endpgm1171 %and = and i64 %a, 641172 store i64 %and, ptr addrspace(1) %out, align 81173 ret void1174}1175 1176define amdgpu_kernel void @s_and_inline_imm_64_i64_noshrink(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a, i32, i64 %b) {1177; GFX6-LABEL: s_and_inline_imm_64_i64_noshrink:1178; GFX6: ; %bb.0:1179; GFX6-NEXT: s_load_dword s6, s[4:5], 0xd1180; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91181; GFX6-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x111182; GFX6-NEXT: s_mov_b32 s3, 0xf0001183; GFX6-NEXT: s_mov_b32 s2, -11184; GFX6-NEXT: s_waitcnt lgkmcnt(0)1185; GFX6-NEXT: s_lshl_b32 s6, s6, 11186; GFX6-NEXT: s_and_b32 s6, s6, 641187; GFX6-NEXT: s_add_u32 s4, s6, s41188; GFX6-NEXT: s_addc_u32 s5, 0, s51189; GFX6-NEXT: v_mov_b32_e32 v0, s41190; GFX6-NEXT: v_mov_b32_e32 v1, s51191; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01192; GFX6-NEXT: s_endpgm1193;1194; GFX8-LABEL: s_and_inline_imm_64_i64_noshrink:1195; GFX8: ; %bb.0:1196; GFX8-NEXT: s_load_dword s6, s[4:5], 0x341197; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241198; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x441199; GFX8-NEXT: s_mov_b32 s3, 0xf0001200; GFX8-NEXT: s_mov_b32 s2, -11201; GFX8-NEXT: s_waitcnt lgkmcnt(0)1202; GFX8-NEXT: s_lshl_b32 s6, s6, 11203; GFX8-NEXT: s_and_b32 s6, s6, 641204; GFX8-NEXT: s_add_u32 s4, s6, s41205; GFX8-NEXT: s_addc_u32 s5, 0, s51206; GFX8-NEXT: v_mov_b32_e32 v0, s41207; GFX8-NEXT: v_mov_b32_e32 v1, s51208; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01209; GFX8-NEXT: s_endpgm1210 %shl = shl i64 %a, 11211 %and = and i64 %shl, 641212 %add = add i64 %and, %b1213 store i64 %add, ptr addrspace(1) %out, align 81214 ret void1215}1216 1217define amdgpu_kernel void @s_and_inline_imm_1_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a) {1218; GFX6-LABEL: s_and_inline_imm_1_i64:1219; GFX6: ; %bb.0:1220; GFX6-NEXT: s_load_dword s6, s[4:5], 0xd1221; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91222; GFX6-NEXT: s_mov_b32 s3, 0xf0001223; GFX6-NEXT: s_mov_b32 s2, -11224; GFX6-NEXT: v_mov_b32_e32 v1, 01225; GFX6-NEXT: s_waitcnt lgkmcnt(0)1226; GFX6-NEXT: s_and_b32 s4, s6, 11227; GFX6-NEXT: v_mov_b32_e32 v0, s41228; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01229; GFX6-NEXT: s_endpgm1230;1231; GFX8-LABEL: s_and_inline_imm_1_i64:1232; GFX8: ; %bb.0:1233; GFX8-NEXT: s_load_dword s6, s[4:5], 0x341234; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241235; GFX8-NEXT: s_mov_b32 s3, 0xf0001236; GFX8-NEXT: s_mov_b32 s2, -11237; GFX8-NEXT: v_mov_b32_e32 v1, 01238; GFX8-NEXT: s_waitcnt lgkmcnt(0)1239; GFX8-NEXT: s_and_b32 s4, s6, 11240; GFX8-NEXT: v_mov_b32_e32 v0, s41241; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01242; GFX8-NEXT: s_endpgm1243 %and = and i64 %a, 11244 store i64 %and, ptr addrspace(1) %out, align 81245 ret void1246}1247 1248define amdgpu_kernel void @s_and_inline_imm_1.0_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a) {1249; GFX6-LABEL: s_and_inline_imm_1.0_i64:1250; GFX6: ; %bb.0:1251; GFX6-NEXT: s_load_dword s6, s[4:5], 0xe1252; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91253; GFX6-NEXT: s_mov_b32 s3, 0xf0001254; GFX6-NEXT: s_mov_b32 s2, -11255; GFX6-NEXT: v_mov_b32_e32 v0, 01256; GFX6-NEXT: s_waitcnt lgkmcnt(0)1257; GFX6-NEXT: s_and_b32 s4, s6, 0x3ff000001258; GFX6-NEXT: v_mov_b32_e32 v1, s41259; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01260; GFX6-NEXT: s_endpgm1261;1262; GFX8-LABEL: s_and_inline_imm_1.0_i64:1263; GFX8: ; %bb.0:1264; GFX8-NEXT: s_load_dword s6, s[4:5], 0x381265; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241266; GFX8-NEXT: s_mov_b32 s3, 0xf0001267; GFX8-NEXT: s_mov_b32 s2, -11268; GFX8-NEXT: v_mov_b32_e32 v0, 01269; GFX8-NEXT: s_waitcnt lgkmcnt(0)1270; GFX8-NEXT: s_and_b32 s4, s6, 0x3ff000001271; GFX8-NEXT: v_mov_b32_e32 v1, s41272; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01273; GFX8-NEXT: s_endpgm1274 %and = and i64 %a, 46071824188000174081275 store i64 %and, ptr addrspace(1) %out, align 81276 ret void1277}1278 1279define amdgpu_kernel void @s_and_inline_imm_neg_1.0_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a) {1280; GFX6-LABEL: s_and_inline_imm_neg_1.0_i64:1281; GFX6: ; %bb.0:1282; GFX6-NEXT: s_load_dword s6, s[4:5], 0xe1283; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91284; GFX6-NEXT: s_mov_b32 s3, 0xf0001285; GFX6-NEXT: s_mov_b32 s2, -11286; GFX6-NEXT: v_mov_b32_e32 v0, 01287; GFX6-NEXT: s_waitcnt lgkmcnt(0)1288; GFX6-NEXT: s_and_b32 s4, s6, 0xbff000001289; GFX6-NEXT: v_mov_b32_e32 v1, s41290; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01291; GFX6-NEXT: s_endpgm1292;1293; GFX8-LABEL: s_and_inline_imm_neg_1.0_i64:1294; GFX8: ; %bb.0:1295; GFX8-NEXT: s_load_dword s6, s[4:5], 0x381296; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241297; GFX8-NEXT: s_mov_b32 s3, 0xf0001298; GFX8-NEXT: s_mov_b32 s2, -11299; GFX8-NEXT: v_mov_b32_e32 v0, 01300; GFX8-NEXT: s_waitcnt lgkmcnt(0)1301; GFX8-NEXT: s_and_b32 s4, s6, 0xbff000001302; GFX8-NEXT: v_mov_b32_e32 v1, s41303; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01304; GFX8-NEXT: s_endpgm1305 %and = and i64 %a, 138305544556547932161306 store i64 %and, ptr addrspace(1) %out, align 81307 ret void1308}1309 1310define amdgpu_kernel void @s_and_inline_imm_0.5_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a) {1311; GFX6-LABEL: s_and_inline_imm_0.5_i64:1312; GFX6: ; %bb.0:1313; GFX6-NEXT: s_load_dword s6, s[4:5], 0xe1314; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91315; GFX6-NEXT: s_mov_b32 s3, 0xf0001316; GFX6-NEXT: s_mov_b32 s2, -11317; GFX6-NEXT: v_mov_b32_e32 v0, 01318; GFX6-NEXT: s_waitcnt lgkmcnt(0)1319; GFX6-NEXT: s_and_b32 s4, s6, 0x3fe000001320; GFX6-NEXT: v_mov_b32_e32 v1, s41321; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01322; GFX6-NEXT: s_endpgm1323;1324; GFX8-LABEL: s_and_inline_imm_0.5_i64:1325; GFX8: ; %bb.0:1326; GFX8-NEXT: s_load_dword s6, s[4:5], 0x381327; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241328; GFX8-NEXT: s_mov_b32 s3, 0xf0001329; GFX8-NEXT: s_mov_b32 s2, -11330; GFX8-NEXT: v_mov_b32_e32 v0, 01331; GFX8-NEXT: s_waitcnt lgkmcnt(0)1332; GFX8-NEXT: s_and_b32 s4, s6, 0x3fe000001333; GFX8-NEXT: v_mov_b32_e32 v1, s41334; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01335; GFX8-NEXT: s_endpgm1336 %and = and i64 %a, 46026788191726469121337 store i64 %and, ptr addrspace(1) %out, align 81338 ret void1339}1340 1341define amdgpu_kernel void @s_and_inline_imm_neg_0.5_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a) {1342; GFX6-LABEL: s_and_inline_imm_neg_0.5_i64:1343; GFX6: ; %bb.0:1344; GFX6-NEXT: s_load_dword s6, s[4:5], 0xe1345; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91346; GFX6-NEXT: s_mov_b32 s3, 0xf0001347; GFX6-NEXT: s_mov_b32 s2, -11348; GFX6-NEXT: v_mov_b32_e32 v0, 01349; GFX6-NEXT: s_waitcnt lgkmcnt(0)1350; GFX6-NEXT: s_and_b32 s4, s6, 0xbfe000001351; GFX6-NEXT: v_mov_b32_e32 v1, s41352; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01353; GFX6-NEXT: s_endpgm1354;1355; GFX8-LABEL: s_and_inline_imm_neg_0.5_i64:1356; GFX8: ; %bb.0:1357; GFX8-NEXT: s_load_dword s6, s[4:5], 0x381358; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241359; GFX8-NEXT: s_mov_b32 s3, 0xf0001360; GFX8-NEXT: s_mov_b32 s2, -11361; GFX8-NEXT: v_mov_b32_e32 v0, 01362; GFX8-NEXT: s_waitcnt lgkmcnt(0)1363; GFX8-NEXT: s_and_b32 s4, s6, 0xbfe000001364; GFX8-NEXT: v_mov_b32_e32 v1, s41365; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01366; GFX8-NEXT: s_endpgm1367 %and = and i64 %a, 138260508560274227201368 store i64 %and, ptr addrspace(1) %out, align 81369 ret void1370}1371 1372define amdgpu_kernel void @s_and_inline_imm_2.0_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a) {1373; GFX6-LABEL: s_and_inline_imm_2.0_i64:1374; GFX6: ; %bb.0:1375; GFX6-NEXT: s_load_dword s6, s[4:5], 0xe1376; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91377; GFX6-NEXT: s_mov_b32 s3, 0xf0001378; GFX6-NEXT: s_mov_b32 s2, -11379; GFX6-NEXT: v_mov_b32_e32 v0, 01380; GFX6-NEXT: s_waitcnt lgkmcnt(0)1381; GFX6-NEXT: s_and_b32 s4, s6, 2.01382; GFX6-NEXT: v_mov_b32_e32 v1, s41383; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01384; GFX6-NEXT: s_endpgm1385;1386; GFX8-LABEL: s_and_inline_imm_2.0_i64:1387; GFX8: ; %bb.0:1388; GFX8-NEXT: s_load_dword s6, s[4:5], 0x381389; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241390; GFX8-NEXT: s_mov_b32 s3, 0xf0001391; GFX8-NEXT: s_mov_b32 s2, -11392; GFX8-NEXT: v_mov_b32_e32 v0, 01393; GFX8-NEXT: s_waitcnt lgkmcnt(0)1394; GFX8-NEXT: s_and_b32 s4, s6, 2.01395; GFX8-NEXT: v_mov_b32_e32 v1, s41396; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01397; GFX8-NEXT: s_endpgm1398 %and = and i64 %a, 46116860184273879041399 store i64 %and, ptr addrspace(1) %out, align 81400 ret void1401}1402 1403define amdgpu_kernel void @s_and_inline_imm_neg_2.0_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a) {1404; GFX6-LABEL: s_and_inline_imm_neg_2.0_i64:1405; GFX6: ; %bb.0:1406; GFX6-NEXT: s_load_dword s6, s[4:5], 0xe1407; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91408; GFX6-NEXT: s_mov_b32 s3, 0xf0001409; GFX6-NEXT: s_mov_b32 s2, -11410; GFX6-NEXT: v_mov_b32_e32 v0, 01411; GFX6-NEXT: s_waitcnt lgkmcnt(0)1412; GFX6-NEXT: s_and_b32 s4, s6, -2.01413; GFX6-NEXT: v_mov_b32_e32 v1, s41414; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01415; GFX6-NEXT: s_endpgm1416;1417; GFX8-LABEL: s_and_inline_imm_neg_2.0_i64:1418; GFX8: ; %bb.0:1419; GFX8-NEXT: s_load_dword s6, s[4:5], 0x381420; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241421; GFX8-NEXT: s_mov_b32 s3, 0xf0001422; GFX8-NEXT: s_mov_b32 s2, -11423; GFX8-NEXT: v_mov_b32_e32 v0, 01424; GFX8-NEXT: s_waitcnt lgkmcnt(0)1425; GFX8-NEXT: s_and_b32 s4, s6, -2.01426; GFX8-NEXT: v_mov_b32_e32 v1, s41427; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01428; GFX8-NEXT: s_endpgm1429 %and = and i64 %a, 138350580552821637121430 store i64 %and, ptr addrspace(1) %out, align 81431 ret void1432}1433 1434define amdgpu_kernel void @s_and_inline_imm_4.0_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a) {1435; GFX6-LABEL: s_and_inline_imm_4.0_i64:1436; GFX6: ; %bb.0:1437; GFX6-NEXT: s_load_dword s6, s[4:5], 0xe1438; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91439; GFX6-NEXT: s_mov_b32 s3, 0xf0001440; GFX6-NEXT: s_mov_b32 s2, -11441; GFX6-NEXT: v_mov_b32_e32 v0, 01442; GFX6-NEXT: s_waitcnt lgkmcnt(0)1443; GFX6-NEXT: s_and_b32 s4, s6, 0x401000001444; GFX6-NEXT: v_mov_b32_e32 v1, s41445; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01446; GFX6-NEXT: s_endpgm1447;1448; GFX8-LABEL: s_and_inline_imm_4.0_i64:1449; GFX8: ; %bb.0:1450; GFX8-NEXT: s_load_dword s6, s[4:5], 0x381451; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241452; GFX8-NEXT: s_mov_b32 s3, 0xf0001453; GFX8-NEXT: s_mov_b32 s2, -11454; GFX8-NEXT: v_mov_b32_e32 v0, 01455; GFX8-NEXT: s_waitcnt lgkmcnt(0)1456; GFX8-NEXT: s_and_b32 s4, s6, 0x401000001457; GFX8-NEXT: v_mov_b32_e32 v1, s41458; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01459; GFX8-NEXT: s_endpgm1460 %and = and i64 %a, 46161896180547584001461 store i64 %and, ptr addrspace(1) %out, align 81462 ret void1463}1464 1465define amdgpu_kernel void @s_and_inline_imm_neg_4.0_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a) {1466; GFX6-LABEL: s_and_inline_imm_neg_4.0_i64:1467; GFX6: ; %bb.0:1468; GFX6-NEXT: s_load_dword s6, s[4:5], 0xe1469; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91470; GFX6-NEXT: s_mov_b32 s3, 0xf0001471; GFX6-NEXT: s_mov_b32 s2, -11472; GFX6-NEXT: v_mov_b32_e32 v0, 01473; GFX6-NEXT: s_waitcnt lgkmcnt(0)1474; GFX6-NEXT: s_and_b32 s4, s6, 0xc01000001475; GFX6-NEXT: v_mov_b32_e32 v1, s41476; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01477; GFX6-NEXT: s_endpgm1478;1479; GFX8-LABEL: s_and_inline_imm_neg_4.0_i64:1480; GFX8: ; %bb.0:1481; GFX8-NEXT: s_load_dword s6, s[4:5], 0x381482; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241483; GFX8-NEXT: s_mov_b32 s3, 0xf0001484; GFX8-NEXT: s_mov_b32 s2, -11485; GFX8-NEXT: v_mov_b32_e32 v0, 01486; GFX8-NEXT: s_waitcnt lgkmcnt(0)1487; GFX8-NEXT: s_and_b32 s4, s6, 0xc01000001488; GFX8-NEXT: v_mov_b32_e32 v1, s41489; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01490; GFX8-NEXT: s_endpgm1491 %and = and i64 %a, 138395616549095342081492 store i64 %and, ptr addrspace(1) %out, align 81493 ret void1494}1495 1496; Test with the 64-bit integer bitpattern for a 32-bit float in the1497; low 32-bits, which is not a valid 64-bit inline immmediate.1498 1499define amdgpu_kernel void @s_and_inline_imm_f32_4.0_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a) {1500; GFX6-LABEL: s_and_inline_imm_f32_4.0_i64:1501; GFX6: ; %bb.0:1502; GFX6-NEXT: s_load_dword s6, s[4:5], 0xd1503; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91504; GFX6-NEXT: s_mov_b32 s3, 0xf0001505; GFX6-NEXT: s_mov_b32 s2, -11506; GFX6-NEXT: v_mov_b32_e32 v1, 01507; GFX6-NEXT: s_waitcnt lgkmcnt(0)1508; GFX6-NEXT: s_and_b32 s4, s6, 4.01509; GFX6-NEXT: v_mov_b32_e32 v0, s41510; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01511; GFX6-NEXT: s_endpgm1512;1513; GFX8-LABEL: s_and_inline_imm_f32_4.0_i64:1514; GFX8: ; %bb.0:1515; GFX8-NEXT: s_load_dword s6, s[4:5], 0x341516; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241517; GFX8-NEXT: s_mov_b32 s3, 0xf0001518; GFX8-NEXT: s_mov_b32 s2, -11519; GFX8-NEXT: v_mov_b32_e32 v1, 01520; GFX8-NEXT: s_waitcnt lgkmcnt(0)1521; GFX8-NEXT: s_and_b32 s4, s6, 4.01522; GFX8-NEXT: v_mov_b32_e32 v0, s41523; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01524; GFX8-NEXT: s_endpgm1525 %and = and i64 %a, 10821304321526 store i64 %and, ptr addrspace(1) %out, align 81527 ret void1528}1529 1530define amdgpu_kernel void @s_and_inline_imm_f32_neg_4.0_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a) {1531; GFX6-LABEL: s_and_inline_imm_f32_neg_4.0_i64:1532; GFX6: ; %bb.0:1533; GFX6-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0xd1534; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91535; GFX6-NEXT: s_mov_b32 s3, 0xf0001536; GFX6-NEXT: s_mov_b32 s2, -11537; GFX6-NEXT: s_waitcnt lgkmcnt(0)1538; GFX6-NEXT: s_and_b32 s4, s6, -4.01539; GFX6-NEXT: v_mov_b32_e32 v0, s41540; GFX6-NEXT: v_mov_b32_e32 v1, s71541; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01542; GFX6-NEXT: s_endpgm1543;1544; GFX8-LABEL: s_and_inline_imm_f32_neg_4.0_i64:1545; GFX8: ; %bb.0:1546; GFX8-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341547; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241548; GFX8-NEXT: s_mov_b32 s3, 0xf0001549; GFX8-NEXT: s_mov_b32 s2, -11550; GFX8-NEXT: s_waitcnt lgkmcnt(0)1551; GFX8-NEXT: s_and_b32 s4, s6, -4.01552; GFX8-NEXT: v_mov_b32_e32 v0, s41553; GFX8-NEXT: v_mov_b32_e32 v1, s71554; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01555; GFX8-NEXT: s_endpgm1556 %and = and i64 %a, -10653532161557 store i64 %and, ptr addrspace(1) %out, align 81558 ret void1559}1560 1561; Shift into upper 32-bits1562 1563define amdgpu_kernel void @s_and_inline_high_imm_f32_4.0_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a) {1564; GFX6-LABEL: s_and_inline_high_imm_f32_4.0_i64:1565; GFX6: ; %bb.0:1566; GFX6-NEXT: s_load_dword s6, s[4:5], 0xe1567; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91568; GFX6-NEXT: s_mov_b32 s3, 0xf0001569; GFX6-NEXT: s_mov_b32 s2, -11570; GFX6-NEXT: v_mov_b32_e32 v0, 01571; GFX6-NEXT: s_waitcnt lgkmcnt(0)1572; GFX6-NEXT: s_and_b32 s4, s6, 4.01573; GFX6-NEXT: v_mov_b32_e32 v1, s41574; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01575; GFX6-NEXT: s_endpgm1576;1577; GFX8-LABEL: s_and_inline_high_imm_f32_4.0_i64:1578; GFX8: ; %bb.0:1579; GFX8-NEXT: s_load_dword s6, s[4:5], 0x381580; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241581; GFX8-NEXT: s_mov_b32 s3, 0xf0001582; GFX8-NEXT: s_mov_b32 s2, -11583; GFX8-NEXT: v_mov_b32_e32 v0, 01584; GFX8-NEXT: s_waitcnt lgkmcnt(0)1585; GFX8-NEXT: s_and_b32 s4, s6, 4.01586; GFX8-NEXT: v_mov_b32_e32 v1, s41587; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01588; GFX8-NEXT: s_endpgm1589 %and = and i64 %a, 46477148154463518721590 store i64 %and, ptr addrspace(1) %out, align 81591 ret void1592}1593 1594define amdgpu_kernel void @s_and_inline_high_imm_f32_neg_4.0_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, i64 %a) {1595; GFX6-LABEL: s_and_inline_high_imm_f32_neg_4.0_i64:1596; GFX6: ; %bb.0:1597; GFX6-NEXT: s_load_dword s6, s[4:5], 0xe1598; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91599; GFX6-NEXT: s_mov_b32 s3, 0xf0001600; GFX6-NEXT: s_mov_b32 s2, -11601; GFX6-NEXT: v_mov_b32_e32 v0, 01602; GFX6-NEXT: s_waitcnt lgkmcnt(0)1603; GFX6-NEXT: s_and_b32 s4, s6, -4.01604; GFX6-NEXT: v_mov_b32_e32 v1, s41605; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01606; GFX6-NEXT: s_endpgm1607;1608; GFX8-LABEL: s_and_inline_high_imm_f32_neg_4.0_i64:1609; GFX8: ; %bb.0:1610; GFX8-NEXT: s_load_dword s6, s[4:5], 0x381611; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241612; GFX8-NEXT: s_mov_b32 s3, 0xf0001613; GFX8-NEXT: s_mov_b32 s2, -11614; GFX8-NEXT: v_mov_b32_e32 v0, 01615; GFX8-NEXT: s_waitcnt lgkmcnt(0)1616; GFX8-NEXT: s_and_b32 s4, s6, -4.01617; GFX8-NEXT: v_mov_b32_e32 v1, s41618; GFX8-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01619; GFX8-NEXT: s_endpgm1620 %and = and i64 %a, 138710868523011276801621 store i64 %and, ptr addrspace(1) %out, align 81622 ret void1623}1624attributes #0 = { nounwind readnone }1625