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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=SI %s3 4define amdgpu_kernel void @s_clear_msb(ptr addrspace(1) %out, i32 %in) {5; SI-LABEL: s_clear_msb:6; SI: ; %bb.0:7; SI-NEXT: s_load_dword s6, s[4:5], 0xb8; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x99; SI-NEXT: s_mov_b32 s3, 0xf00010; SI-NEXT: s_mov_b32 s2, -111; SI-NEXT: s_waitcnt lgkmcnt(0)12; SI-NEXT: s_and_b32 s4, s6, 0x7fffffff13; SI-NEXT: v_mov_b32_e32 v0, s414; SI-NEXT: buffer_store_dword v0, off, s[0:3], 015; SI-NEXT: s_endpgm16 %x = and i32 %in, 214748364717 store i32 %x, ptr addrspace(1) %out18 ret void19}20 21define amdgpu_kernel void @s_set_msb(ptr addrspace(1) %out, i32 %in) {22; SI-LABEL: s_set_msb:23; SI: ; %bb.0:24; SI-NEXT: s_load_dword s6, s[4:5], 0xb25; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x926; SI-NEXT: s_mov_b32 s3, 0xf00027; SI-NEXT: s_mov_b32 s2, -128; SI-NEXT: s_waitcnt lgkmcnt(0)29; SI-NEXT: s_or_b32 s4, s6, 0x8000000030; SI-NEXT: v_mov_b32_e32 v0, s431; SI-NEXT: buffer_store_dword v0, off, s[0:3], 032; SI-NEXT: s_endpgm33 %x = or i32 %in, 214748364834 store i32 %x, ptr addrspace(1) %out35 ret void36}37 38define amdgpu_kernel void @s_clear_lsb(ptr addrspace(1) %out, i32 %in) {39; SI-LABEL: s_clear_lsb:40; SI: ; %bb.0:41; SI-NEXT: s_load_dword s6, s[4:5], 0xb42; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x943; SI-NEXT: s_mov_b32 s3, 0xf00044; SI-NEXT: s_mov_b32 s2, -145; SI-NEXT: s_waitcnt lgkmcnt(0)46; SI-NEXT: s_and_b32 s4, s6, -247; SI-NEXT: v_mov_b32_e32 v0, s448; SI-NEXT: buffer_store_dword v0, off, s[0:3], 049; SI-NEXT: s_endpgm50 %x = and i32 %in, 429496729451 store i32 %x, ptr addrspace(1) %out52 ret void53}54 55define amdgpu_kernel void @s_set_lsb(ptr addrspace(1) %out, i32 %in) {56; SI-LABEL: s_set_lsb:57; SI: ; %bb.0:58; SI-NEXT: s_load_dword s6, s[4:5], 0xb59; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x960; SI-NEXT: s_mov_b32 s3, 0xf00061; SI-NEXT: s_mov_b32 s2, -162; SI-NEXT: s_waitcnt lgkmcnt(0)63; SI-NEXT: s_or_b32 s4, s6, 164; SI-NEXT: v_mov_b32_e32 v0, s465; SI-NEXT: buffer_store_dword v0, off, s[0:3], 066; SI-NEXT: s_endpgm67 %x = or i32 %in, 168 store i32 %x, ptr addrspace(1) %out69 ret void70}71 72define amdgpu_kernel void @s_clear_midbit(ptr addrspace(1) %out, i32 %in) {73; SI-LABEL: s_clear_midbit:74; SI: ; %bb.0:75; SI-NEXT: s_load_dword s6, s[4:5], 0xb76; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x977; SI-NEXT: s_mov_b32 s3, 0xf00078; SI-NEXT: s_mov_b32 s2, -179; SI-NEXT: s_waitcnt lgkmcnt(0)80; SI-NEXT: s_and_b32 s4, s6, 0xfffffeff81; SI-NEXT: v_mov_b32_e32 v0, s482; SI-NEXT: buffer_store_dword v0, off, s[0:3], 083; SI-NEXT: s_endpgm84 %x = and i32 %in, 429496703985 store i32 %x, ptr addrspace(1) %out86 ret void87}88 89define amdgpu_kernel void @s_set_midbit(ptr addrspace(1) %out, i32 %in) {90; SI-LABEL: s_set_midbit:91; SI: ; %bb.0:92; SI-NEXT: s_load_dword s6, s[4:5], 0xb93; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x994; SI-NEXT: s_mov_b32 s3, 0xf00095; SI-NEXT: s_mov_b32 s2, -196; SI-NEXT: s_waitcnt lgkmcnt(0)97; SI-NEXT: s_or_b32 s4, s6, 0x10098; SI-NEXT: v_mov_b32_e32 v0, s499; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0100; SI-NEXT: s_endpgm101 %x = or i32 %in, 256102 store i32 %x, ptr addrspace(1) %out103 ret void104}105 106@gv = external addrspace(1) global i32107 108; Make sure there's no verifier error with an undef source.109define void @bitset_verifier_error_freeze_poison() local_unnamed_addr #0 {110; SI-LABEL: bitset_verifier_error_freeze_poison:111; SI: ; %bb.0: ; %bb112; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)113; SI-NEXT: s_getpc_b64 s[4:5]114; SI-NEXT: s_add_u32 s4, s4, gv@gotpcrel32@lo+4115; SI-NEXT: s_addc_u32 s5, s5, gv@gotpcrel32@hi+12116; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0117; SI-NEXT: s_mov_b32 s7, 0xf000118; SI-NEXT: s_mov_b32 s6, -1119; SI-NEXT: s_waitcnt lgkmcnt(0)120; SI-NEXT: s_and_b32 s8, s4, 0x7fffffff121; SI-NEXT: v_mov_b32_e32 v0, s8122; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0123; SI-NEXT: s_waitcnt expcnt(0)124; SI-NEXT: v_mov_b32_e32 v0, 0x3f7fbe77125; SI-NEXT: v_cmp_ge_f32_e64 s[4:5], |s4|, v0126; SI-NEXT: s_and_b64 vcc, exec, s[4:5]127; SI-NEXT: s_cbranch_vccnz .LBB6_2128; SI-NEXT: ; %bb.1: ; %bb5129; SI-NEXT: .LBB6_2: ; %bb6130bb:131 %undef0 = freeze float poison132 %i = call float @llvm.fabs.f32(float %undef0) #0133 %i1 = bitcast float %i to i32134 store i32 %i1, ptr addrspace(1) @gv135 br label %bb2136 137bb2:138 %undef1 = freeze float poison139 %i3 = call float @llvm.fabs.f32(float %undef1) #0140 %i4 = fcmp fast ult float %i3, 0x3FEFF7CEE0000000141 br i1 %i4, label %bb5, label %bb6142 143bb5:144 unreachable145 146bb6:147 unreachable148}149 150define void @bitset_verifier_error_poison() local_unnamed_addr #0 {151; SI-LABEL: bitset_verifier_error_poison:152; SI: ; %bb.0: ; %bb153; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)154; SI-NEXT: s_cbranch_scc1 .LBB7_2155; SI-NEXT: ; %bb.1: ; %bb5156; SI-NEXT: .LBB7_2: ; %bb6157bb:158 %i = call float @llvm.fabs.f32(float poison) #0159 %i1 = bitcast float %i to i32160 store i32 %i1, ptr addrspace(1) @gv161 br label %bb2162 163bb2:164 %i3 = call float @llvm.fabs.f32(float poison) #0165 %i4 = fcmp fast ult float %i3, 0x3FEFF7CEE0000000166 br i1 %i4, label %bb5, label %bb6167 168bb5:169 unreachable170 171bb6:172 unreachable173}174 175declare float @llvm.fabs.f32(float) #0176 177attributes #0 = { nounwind readnone speculatable willreturn }178