50 lines · plain
1; RUN: llc -mtriple=amdgcn -mcpu=tahiti -mattr=-promote-alloca < %s | FileCheck -check-prefix=SI-ALLOCA -check-prefix=SI %s2; RUN: llc -mtriple=amdgcn -mcpu=tahiti -mattr=+promote-alloca < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI %s3 4declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #15declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #16declare void @llvm.amdgcn.s.barrier() #27 8; The required pointer calculations for the alloca'd actually requires9; an add and won't be folded into the addressing, which fails with a10; 64-bit pointer add. This should work since private pointers should11; be 32-bits.12 13; SI-LABEL: {{^}}test_private_array_ptr_calc:14 15; SI-ALLOCA: buffer_load_dword [[LOAD_A:v[0-9]+]]16; SI-ALLOCA: buffer_load_dword [[LOAD_B:v[0-9]+]]17 18; SI-ALLOCA: v_lshlrev_b32_e32 [[SIZE_SCALE:v[0-9]+]], 2, [[LOAD_A]]19 20; SI-ALLOCA: v_mov_b32_e32 [[PTRREG:v[0-9]+]], [[SIZE_SCALE]]21; SI-ALLOCA: buffer_store_dword {{v[0-9]+}}, [[PTRREG]], s[{{[0-9]+:[0-9]+}}], 0 offen offset:6422; SI-ALLOCA: s_barrier23; SI-ALLOCA: buffer_load_dword {{v[0-9]+}}, [[PTRREG]], s[{{[0-9]+:[0-9]+}}], 0 offen offset:6424;25; SI-PROMOTE: LDSByteSize: 026define amdgpu_kernel void @test_private_array_ptr_calc(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %inA, ptr addrspace(1) noalias %inB) #0 {27 %alloca = alloca [16 x i32], align 16, addrspace(5)28 %mbcnt.lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0);29 %tid = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 %mbcnt.lo)30 %a_ptr = getelementptr inbounds i32, ptr addrspace(1) %inA, i32 %tid31 %b_ptr = getelementptr inbounds i32, ptr addrspace(1) %inB, i32 %tid32 %a = load i32, ptr addrspace(1) %a_ptr, !range !0, !noundef !{}33 %b = load i32, ptr addrspace(1) %b_ptr, !range !0, !noundef !{}34 %result = add i32 %a, %b35 %alloca_ptr = getelementptr inbounds [16 x i32], ptr addrspace(5) %alloca, i32 1, i32 %b36 store i32 %result, ptr addrspace(5) %alloca_ptr, align 437 ; Dummy call38 call void @llvm.amdgcn.s.barrier()39 %reload = load i32, ptr addrspace(5) %alloca_ptr, align 4, !range !0, !noundef !{}40 %out_ptr = getelementptr inbounds i32, ptr addrspace(1) %out, i32 %tid41 store i32 %reload, ptr addrspace(1) %out_ptr, align 442 ret void43}44 45attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,1" "amdgpu-flat-work-group-size"="1,256" }46attributes #1 = { nounwind readnone }47attributes #2 = { nounwind convergent }48 49!0 = !{i32 0, i32 65536 }50