53 lines · plain
1; RUN: llc -mtriple=amdgcn -amdgpu-atomic-optimizer-strategy=None < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SICIVI,FUNC %s2; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -amdgpu-atomic-optimizer-strategy=None < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SICIVI,FUNC %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -amdgpu-atomic-optimizer-strategy=None < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9,FUNC %s4; RUN: llc -mtriple=r600 -mcpu=redwood -amdgpu-atomic-optimizer-strategy=None < %s | FileCheck -enable-var-scope -check-prefixes=R600,FUNC %s5 6; FUNC-LABEL: {{^}}atomic_sub_local:7; SICIVI: s_mov_b32 m08; GFX9-NOT: m09 10; R600: LDS_SUB *11; GCN: ds_sub_u3212define amdgpu_kernel void @atomic_sub_local(ptr addrspace(3) %local) {13 %unused = atomicrmw volatile sub ptr addrspace(3) %local, i32 5 seq_cst14 ret void15}16 17; FUNC-LABEL: {{^}}atomic_sub_local_const_offset:18; SICIVI: s_mov_b32 m019; GFX9-NOT: m020 21; R600: LDS_SUB *22; GCN: ds_sub_u32 v{{[0-9]+}}, v{{[0-9]+}} offset:1623define amdgpu_kernel void @atomic_sub_local_const_offset(ptr addrspace(3) %local) {24 %gep = getelementptr i32, ptr addrspace(3) %local, i32 425 %val = atomicrmw volatile sub ptr addrspace(3) %gep, i32 5 seq_cst26 ret void27}28 29; FUNC-LABEL: {{^}}atomic_sub_ret_local:30; SICIVI: s_mov_b32 m031; GFX9-NOT: m032 33; R600: LDS_SUB_RET *34; GCN: ds_sub_rtn_u3235define amdgpu_kernel void @atomic_sub_ret_local(ptr addrspace(1) %out, ptr addrspace(3) %local) {36 %val = atomicrmw volatile sub ptr addrspace(3) %local, i32 5 seq_cst37 store i32 %val, ptr addrspace(1) %out38 ret void39}40 41; FUNC-LABEL: {{^}}atomic_sub_ret_local_const_offset:42; SICIVI: s_mov_b32 m043; GFX9-NOT: m044 45; R600: LDS_SUB_RET *46; GCN: ds_sub_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:2047define amdgpu_kernel void @atomic_sub_ret_local_const_offset(ptr addrspace(1) %out, ptr addrspace(3) %local) {48 %gep = getelementptr i32, ptr addrspace(3) %local, i32 549 %val = atomicrmw volatile sub ptr addrspace(3) %gep, i32 5 seq_cst50 store i32 %val, ptr addrspace(1) %out51 ret void52}53