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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-- - -amdgpu-atomic-optimizer-strategy=DPP -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -enable-var-scope -check-prefixes=GFX7 %s3; RUN: llc -mtriple=amdgcn-- -mcpu=tonga -mattr=-flat-for-global - -amdgpu-atomic-optimizer-strategy=DPP -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -enable-var-scope -check-prefixes=GFX89,GFX8 %s4; RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -mattr=-flat-for-global - -amdgpu-atomic-optimizer-strategy=DPP -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -enable-var-scope -check-prefixes=GFX89,GFX9 %s5; RUN: llc -mtriple=amdgcn-- -mcpu=gfx1010 -mattr=+wavefrontsize64 -mattr=-flat-for-global - -amdgpu-atomic-optimizer-strategy=DPP -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -enable-var-scope -check-prefixes=GFX1064 %s6; RUN: llc -mtriple=amdgcn-- -mcpu=gfx1010 -mattr=+wavefrontsize32 -mattr=-flat-for-global - -amdgpu-atomic-optimizer-strategy=DPP -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -enable-var-scope -check-prefixes=GFX1032 %s7; RUN: llc -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=+wavefrontsize64 -mattr=-flat-for-global - -amdgpu-atomic-optimizer-strategy=DPP -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -enable-var-scope -check-prefixes=GFX1164 %s8; RUN: llc -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=+wavefrontsize32 -mattr=-flat-for-global - -amdgpu-atomic-optimizer-strategy=DPP -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -enable-var-scope -check-prefixes=GFX1132 %s9 10declare i1 @llvm.amdgcn.wqm.vote(i1)11declare i32 @llvm.amdgcn.raw.ptr.buffer.atomic.add(i32, ptr addrspace(8), i32, i32, i32 immarg)12declare void @llvm.amdgcn.raw.ptr.buffer.store.f32(float, ptr addrspace(8), i32, i32, i32 immarg)13 14; Show what the atomic optimization pass will do for raw buffers.15 16define amdgpu_ps void @add_i32_constant(ptr addrspace(8) inreg %out, ptr addrspace(8) inreg %inout) {17; GFX7-LABEL: add_i32_constant:18; GFX7: ; %bb.0: ; %entry19; GFX7-NEXT: s_mov_b64 s[10:11], exec20; GFX7-NEXT: ; implicit-def: $vgpr021; GFX7-NEXT: s_and_saveexec_b64 s[8:9], s[10:11]22; GFX7-NEXT: s_cbranch_execz .LBB0_423; GFX7-NEXT: ; %bb.1:24; GFX7-NEXT: s_mov_b64 s[12:13], exec25; GFX7-NEXT: v_mbcnt_lo_u32_b32_e64 v0, s12, 026; GFX7-NEXT: v_mbcnt_hi_u32_b32_e32 v0, s13, v027; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 0, v028; GFX7-NEXT: ; implicit-def: $vgpr129; GFX7-NEXT: s_and_saveexec_b64 s[10:11], vcc30; GFX7-NEXT: s_cbranch_execz .LBB0_331; GFX7-NEXT: ; %bb.2:32; GFX7-NEXT: s_bcnt1_i32_b64 s12, s[12:13]33; GFX7-NEXT: s_mul_i32 s12, s12, 534; GFX7-NEXT: v_mov_b32_e32 v1, s1235; GFX7-NEXT: buffer_atomic_add v1, off, s[4:7], 0 glc36; GFX7-NEXT: .LBB0_3:37; GFX7-NEXT: s_or_b64 exec, exec, s[10:11]38; GFX7-NEXT: s_waitcnt vmcnt(0)39; GFX7-NEXT: v_readfirstlane_b32 s4, v140; GFX7-NEXT: v_mad_u32_u24 v0, v0, 5, s441; GFX7-NEXT: .LBB0_4: ; %Flow42; GFX7-NEXT: s_or_b64 exec, exec, s[8:9]43; GFX7-NEXT: s_wqm_b64 s[4:5], -144; GFX7-NEXT: s_and_b64 s[4:5], s[4:5], s[4:5]45; GFX7-NEXT: s_andn2_b64 vcc, exec, s[4:5]46; GFX7-NEXT: s_cbranch_vccnz .LBB0_647; GFX7-NEXT: ; %bb.5: ; %if48; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 049; GFX7-NEXT: .LBB0_6: ; %UnifiedReturnBlock50; GFX7-NEXT: s_endpgm51;52; GFX89-LABEL: add_i32_constant:53; GFX89: ; %bb.0: ; %entry54; GFX89-NEXT: s_mov_b64 s[10:11], exec55; GFX89-NEXT: ; implicit-def: $vgpr056; GFX89-NEXT: s_and_saveexec_b64 s[8:9], s[10:11]57; GFX89-NEXT: s_cbranch_execz .LBB0_458; GFX89-NEXT: ; %bb.1:59; GFX89-NEXT: s_mov_b64 s[12:13], exec60; GFX89-NEXT: v_mbcnt_lo_u32_b32 v0, s12, 061; GFX89-NEXT: v_mbcnt_hi_u32_b32 v0, s13, v062; GFX89-NEXT: v_cmp_eq_u32_e32 vcc, 0, v063; GFX89-NEXT: ; implicit-def: $vgpr164; GFX89-NEXT: s_and_saveexec_b64 s[10:11], vcc65; GFX89-NEXT: s_cbranch_execz .LBB0_366; GFX89-NEXT: ; %bb.2:67; GFX89-NEXT: s_bcnt1_i32_b64 s12, s[12:13]68; GFX89-NEXT: s_mul_i32 s12, s12, 569; GFX89-NEXT: v_mov_b32_e32 v1, s1270; GFX89-NEXT: buffer_atomic_add v1, off, s[4:7], 0 glc71; GFX89-NEXT: .LBB0_3:72; GFX89-NEXT: s_or_b64 exec, exec, s[10:11]73; GFX89-NEXT: s_waitcnt vmcnt(0)74; GFX89-NEXT: v_readfirstlane_b32 s4, v175; GFX89-NEXT: v_mad_u32_u24 v0, v0, 5, s476; GFX89-NEXT: .LBB0_4: ; %Flow77; GFX89-NEXT: s_or_b64 exec, exec, s[8:9]78; GFX89-NEXT: s_wqm_b64 s[4:5], -179; GFX89-NEXT: s_and_b64 s[4:5], s[4:5], s[4:5]80; GFX89-NEXT: s_andn2_b64 vcc, exec, s[4:5]81; GFX89-NEXT: s_cbranch_vccnz .LBB0_682; GFX89-NEXT: ; %bb.5: ; %if83; GFX89-NEXT: buffer_store_dword v0, off, s[0:3], 084; GFX89-NEXT: .LBB0_6: ; %UnifiedReturnBlock85; GFX89-NEXT: s_endpgm86;87; GFX1064-LABEL: add_i32_constant:88; GFX1064: ; %bb.0: ; %entry89; GFX1064-NEXT: s_mov_b64 s[10:11], exec90; GFX1064-NEXT: ; implicit-def: $vgpr091; GFX1064-NEXT: s_and_saveexec_b64 s[8:9], s[10:11]92; GFX1064-NEXT: s_cbranch_execz .LBB0_493; GFX1064-NEXT: ; %bb.1:94; GFX1064-NEXT: s_mov_b64 s[12:13], exec95; GFX1064-NEXT: ; implicit-def: $vgpr196; GFX1064-NEXT: v_mbcnt_lo_u32_b32 v0, s12, 097; GFX1064-NEXT: v_mbcnt_hi_u32_b32 v0, s13, v098; GFX1064-NEXT: v_cmp_eq_u32_e32 vcc, 0, v099; GFX1064-NEXT: s_and_saveexec_b64 s[10:11], vcc100; GFX1064-NEXT: s_cbranch_execz .LBB0_3101; GFX1064-NEXT: ; %bb.2:102; GFX1064-NEXT: s_bcnt1_i32_b64 s12, s[12:13]103; GFX1064-NEXT: s_mul_i32 s12, s12, 5104; GFX1064-NEXT: v_mov_b32_e32 v1, s12105; GFX1064-NEXT: buffer_atomic_add v1, off, s[4:7], 0 glc106; GFX1064-NEXT: .LBB0_3:107; GFX1064-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)108; GFX1064-NEXT: s_or_b64 exec, exec, s[10:11]109; GFX1064-NEXT: s_waitcnt vmcnt(0)110; GFX1064-NEXT: v_readfirstlane_b32 s4, v1111; GFX1064-NEXT: v_mad_u32_u24 v0, v0, 5, s4112; GFX1064-NEXT: .LBB0_4: ; %Flow113; GFX1064-NEXT: s_or_b64 exec, exec, s[8:9]114; GFX1064-NEXT: s_wqm_b64 s[4:5], -1115; GFX1064-NEXT: s_and_b64 s[4:5], s[4:5], s[4:5]116; GFX1064-NEXT: s_andn2_b64 vcc, exec, s[4:5]117; GFX1064-NEXT: s_cbranch_vccnz .LBB0_6118; GFX1064-NEXT: ; %bb.5: ; %if119; GFX1064-NEXT: buffer_store_dword v0, off, s[0:3], 0120; GFX1064-NEXT: .LBB0_6: ; %UnifiedReturnBlock121; GFX1064-NEXT: s_endpgm122;123; GFX1032-LABEL: add_i32_constant:124; GFX1032: ; %bb.0: ; %entry125; GFX1032-NEXT: s_mov_b32 s9, exec_lo126; GFX1032-NEXT: ; implicit-def: $vgpr0127; GFX1032-NEXT: s_and_saveexec_b32 s8, s9128; GFX1032-NEXT: s_cbranch_execz .LBB0_4129; GFX1032-NEXT: ; %bb.1:130; GFX1032-NEXT: s_mov_b32 s10, exec_lo131; GFX1032-NEXT: ; implicit-def: $vgpr1132; GFX1032-NEXT: v_mbcnt_lo_u32_b32 v0, s10, 0133; GFX1032-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0134; GFX1032-NEXT: s_and_saveexec_b32 s9, vcc_lo135; GFX1032-NEXT: s_cbranch_execz .LBB0_3136; GFX1032-NEXT: ; %bb.2:137; GFX1032-NEXT: s_bcnt1_i32_b32 s10, s10138; GFX1032-NEXT: s_mul_i32 s10, s10, 5139; GFX1032-NEXT: v_mov_b32_e32 v1, s10140; GFX1032-NEXT: buffer_atomic_add v1, off, s[4:7], 0 glc141; GFX1032-NEXT: .LBB0_3:142; GFX1032-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)143; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s9144; GFX1032-NEXT: s_waitcnt vmcnt(0)145; GFX1032-NEXT: v_readfirstlane_b32 s4, v1146; GFX1032-NEXT: v_mad_u32_u24 v0, v0, 5, s4147; GFX1032-NEXT: .LBB0_4: ; %Flow148; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s8149; GFX1032-NEXT: s_wqm_b32 s4, -1150; GFX1032-NEXT: s_and_b32 s4, s4, s4151; GFX1032-NEXT: s_andn2_b32 vcc_lo, exec_lo, s4152; GFX1032-NEXT: s_cbranch_vccnz .LBB0_6153; GFX1032-NEXT: ; %bb.5: ; %if154; GFX1032-NEXT: buffer_store_dword v0, off, s[0:3], 0155; GFX1032-NEXT: .LBB0_6: ; %UnifiedReturnBlock156; GFX1032-NEXT: s_endpgm157;158; GFX1164-LABEL: add_i32_constant:159; GFX1164: ; %bb.0: ; %entry160; GFX1164-NEXT: s_mov_b64 s[10:11], exec161; GFX1164-NEXT: ; implicit-def: $vgpr0162; GFX1164-NEXT: s_delay_alu instid0(SALU_CYCLE_1)163; GFX1164-NEXT: s_and_saveexec_b64 s[8:9], s[10:11]164; GFX1164-NEXT: s_cbranch_execz .LBB0_4165; GFX1164-NEXT: ; %bb.1:166; GFX1164-NEXT: s_mov_b64 s[12:13], exec167; GFX1164-NEXT: s_mov_b64 s[10:11], exec168; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, s12, 0169; GFX1164-NEXT: ; implicit-def: $vgpr1170; GFX1164-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)171; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, s13, v0172; GFX1164-NEXT: v_cmpx_eq_u32_e32 0, v0173; GFX1164-NEXT: s_cbranch_execz .LBB0_3174; GFX1164-NEXT: ; %bb.2:175; GFX1164-NEXT: s_bcnt1_i32_b64 s12, s[12:13]176; GFX1164-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)177; GFX1164-NEXT: s_mul_i32 s12, s12, 5178; GFX1164-NEXT: v_mov_b32_e32 v1, s12179; GFX1164-NEXT: buffer_atomic_add_u32 v1, off, s[4:7], 0 glc180; GFX1164-NEXT: .LBB0_3:181; GFX1164-NEXT: s_or_b64 exec, exec, s[10:11]182; GFX1164-NEXT: s_waitcnt vmcnt(0)183; GFX1164-NEXT: v_readfirstlane_b32 s4, v1184; GFX1164-NEXT: s_delay_alu instid0(VALU_DEP_1)185; GFX1164-NEXT: v_mad_u32_u24 v0, v0, 5, s4186; GFX1164-NEXT: .LBB0_4: ; %Flow187; GFX1164-NEXT: s_or_b64 exec, exec, s[8:9]188; GFX1164-NEXT: s_wqm_b64 s[4:5], -1189; GFX1164-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)190; GFX1164-NEXT: s_and_b64 s[4:5], s[4:5], s[4:5]191; GFX1164-NEXT: s_and_not1_b64 vcc, exec, s[4:5]192; GFX1164-NEXT: s_cbranch_vccnz .LBB0_6193; GFX1164-NEXT: ; %bb.5: ; %if194; GFX1164-NEXT: buffer_store_b32 v0, off, s[0:3], 0195; GFX1164-NEXT: .LBB0_6: ; %UnifiedReturnBlock196; GFX1164-NEXT: s_endpgm197;198; GFX1132-LABEL: add_i32_constant:199; GFX1132: ; %bb.0: ; %entry200; GFX1132-NEXT: s_mov_b32 s9, exec_lo201; GFX1132-NEXT: ; implicit-def: $vgpr0202; GFX1132-NEXT: s_delay_alu instid0(SALU_CYCLE_1)203; GFX1132-NEXT: s_and_saveexec_b32 s8, s9204; GFX1132-NEXT: s_cbranch_execz .LBB0_4205; GFX1132-NEXT: ; %bb.1:206; GFX1132-NEXT: s_mov_b32 s10, exec_lo207; GFX1132-NEXT: s_mov_b32 s9, exec_lo208; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, s10, 0209; GFX1132-NEXT: ; implicit-def: $vgpr1210; GFX1132-NEXT: s_delay_alu instid0(VALU_DEP_1)211; GFX1132-NEXT: v_cmpx_eq_u32_e32 0, v0212; GFX1132-NEXT: s_cbranch_execz .LBB0_3213; GFX1132-NEXT: ; %bb.2:214; GFX1132-NEXT: s_bcnt1_i32_b32 s10, s10215; GFX1132-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)216; GFX1132-NEXT: s_mul_i32 s10, s10, 5217; GFX1132-NEXT: v_mov_b32_e32 v1, s10218; GFX1132-NEXT: buffer_atomic_add_u32 v1, off, s[4:7], 0 glc219; GFX1132-NEXT: .LBB0_3:220; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s9221; GFX1132-NEXT: s_waitcnt vmcnt(0)222; GFX1132-NEXT: v_readfirstlane_b32 s4, v1223; GFX1132-NEXT: s_delay_alu instid0(VALU_DEP_1)224; GFX1132-NEXT: v_mad_u32_u24 v0, v0, 5, s4225; GFX1132-NEXT: .LBB0_4: ; %Flow226; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s8227; GFX1132-NEXT: s_wqm_b32 s4, -1228; GFX1132-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)229; GFX1132-NEXT: s_and_b32 s4, s4, s4230; GFX1132-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s4231; GFX1132-NEXT: s_cbranch_vccnz .LBB0_6232; GFX1132-NEXT: ; %bb.5: ; %if233; GFX1132-NEXT: buffer_store_b32 v0, off, s[0:3], 0234; GFX1132-NEXT: .LBB0_6: ; %UnifiedReturnBlock235; GFX1132-NEXT: s_endpgm236entry:237 %cond1 = call i1 @llvm.amdgcn.wqm.vote(i1 true)238 %old = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.add(i32 5, ptr addrspace(8) %inout, i32 0, i32 0, i32 0)239 %cond2 = call i1 @llvm.amdgcn.wqm.vote(i1 true)240 %cond = and i1 %cond1, %cond2241 br i1 %cond, label %if, label %else242if:243 %bitcast = bitcast i32 %old to float244 call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %bitcast, ptr addrspace(8) %out, i32 0, i32 0, i32 0)245 ret void246else:247 ret void248}249 250define amdgpu_ps void @add_i32_varying(ptr addrspace(8) inreg %out, ptr addrspace(8) inreg %inout, i32 %val) {251; GFX7-LABEL: add_i32_varying:252; GFX7: ; %bb.0: ; %entry253; GFX7-NEXT: s_wqm_b64 s[8:9], -1254; GFX7-NEXT: buffer_atomic_add v0, off, s[4:7], 0 glc255; GFX7-NEXT: s_andn2_b64 vcc, exec, s[8:9]256; GFX7-NEXT: s_cbranch_vccnz .LBB1_2257; GFX7-NEXT: ; %bb.1: ; %if258; GFX7-NEXT: s_waitcnt vmcnt(0)259; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0260; GFX7-NEXT: .LBB1_2: ; %else261; GFX7-NEXT: s_endpgm262;263; GFX8-LABEL: add_i32_varying:264; GFX8: ; %bb.0: ; %entry265; GFX8-NEXT: s_mov_b64 s[8:9], exec266; GFX8-NEXT: s_mov_b64 s[10:11], s[8:9]267; GFX8-NEXT: ; implicit-def: $vgpr3268; GFX8-NEXT: s_and_saveexec_b64 s[8:9], s[10:11]269; GFX8-NEXT: s_cbranch_execz .LBB1_4270; GFX8-NEXT: ; %bb.1:271; GFX8-NEXT: s_or_saveexec_b64 s[10:11], -1272; GFX8-NEXT: v_mov_b32_e32 v1, 0273; GFX8-NEXT: s_mov_b64 exec, s[10:11]274; GFX8-NEXT: v_mbcnt_lo_u32_b32 v3, exec_lo, 0275; GFX8-NEXT: v_mbcnt_hi_u32_b32 v3, exec_hi, v3276; GFX8-NEXT: s_or_saveexec_b64 s[10:11], -1277; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, v0, s[10:11]278; GFX8-NEXT: s_nop 1279; GFX8-NEXT: v_add_u32_dpp v2, vcc, v2, v2 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1280; GFX8-NEXT: s_nop 1281; GFX8-NEXT: v_add_u32_dpp v2, vcc, v2, v2 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1282; GFX8-NEXT: s_nop 1283; GFX8-NEXT: v_add_u32_dpp v2, vcc, v2, v2 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1284; GFX8-NEXT: s_nop 1285; GFX8-NEXT: v_add_u32_dpp v2, vcc, v2, v2 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1286; GFX8-NEXT: s_nop 1287; GFX8-NEXT: v_add_u32_dpp v2, vcc, v2, v2 row_bcast:15 row_mask:0xa bank_mask:0xf288; GFX8-NEXT: s_nop 1289; GFX8-NEXT: v_add_u32_dpp v2, vcc, v2, v2 row_bcast:31 row_mask:0xc bank_mask:0xf290; GFX8-NEXT: v_readlane_b32 s12, v2, 63291; GFX8-NEXT: s_nop 0292; GFX8-NEXT: v_mov_b32_dpp v1, v2 wave_shr:1 row_mask:0xf bank_mask:0xf293; GFX8-NEXT: s_mov_b64 exec, s[10:11]294; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3295; GFX8-NEXT: ; implicit-def: $vgpr0296; GFX8-NEXT: s_and_saveexec_b64 s[10:11], vcc297; GFX8-NEXT: s_cbranch_execz .LBB1_3298; GFX8-NEXT: ; %bb.2:299; GFX8-NEXT: v_mov_b32_e32 v0, s12300; GFX8-NEXT: buffer_atomic_add v0, off, s[4:7], 0 glc301; GFX8-NEXT: .LBB1_3:302; GFX8-NEXT: s_or_b64 exec, exec, s[10:11]303; GFX8-NEXT: s_waitcnt vmcnt(0)304; GFX8-NEXT: v_readfirstlane_b32 s4, v0305; GFX8-NEXT: v_mov_b32_e32 v0, v1306; GFX8-NEXT: v_add_u32_e32 v3, vcc, s4, v0307; GFX8-NEXT: .LBB1_4: ; %Flow308; GFX8-NEXT: s_or_b64 exec, exec, s[8:9]309; GFX8-NEXT: s_wqm_b64 s[4:5], -1310; GFX8-NEXT: s_and_b64 s[4:5], s[4:5], s[4:5]311; GFX8-NEXT: s_andn2_b64 vcc, exec, s[4:5]312; GFX8-NEXT: s_cbranch_vccnz .LBB1_6313; GFX8-NEXT: ; %bb.5: ; %if314; GFX8-NEXT: buffer_store_dword v3, off, s[0:3], 0315; GFX8-NEXT: .LBB1_6: ; %UnifiedReturnBlock316; GFX8-NEXT: s_endpgm317;318; GFX9-LABEL: add_i32_varying:319; GFX9: ; %bb.0: ; %entry320; GFX9-NEXT: s_mov_b64 s[8:9], exec321; GFX9-NEXT: s_mov_b64 s[10:11], s[8:9]322; GFX9-NEXT: ; implicit-def: $vgpr3323; GFX9-NEXT: s_and_saveexec_b64 s[8:9], s[10:11]324; GFX9-NEXT: s_cbranch_execz .LBB1_4325; GFX9-NEXT: ; %bb.1:326; GFX9-NEXT: s_or_saveexec_b64 s[10:11], -1327; GFX9-NEXT: v_mov_b32_e32 v1, 0328; GFX9-NEXT: s_mov_b64 exec, s[10:11]329; GFX9-NEXT: v_mbcnt_lo_u32_b32 v3, exec_lo, 0330; GFX9-NEXT: v_mbcnt_hi_u32_b32 v3, exec_hi, v3331; GFX9-NEXT: s_or_saveexec_b64 s[10:11], -1332; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, v0, s[10:11]333; GFX9-NEXT: s_nop 1334; GFX9-NEXT: v_add_u32_dpp v2, v2, v2 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1335; GFX9-NEXT: s_nop 1336; GFX9-NEXT: v_add_u32_dpp v2, v2, v2 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1337; GFX9-NEXT: s_nop 1338; GFX9-NEXT: v_add_u32_dpp v2, v2, v2 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1339; GFX9-NEXT: s_nop 1340; GFX9-NEXT: v_add_u32_dpp v2, v2, v2 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1341; GFX9-NEXT: s_nop 1342; GFX9-NEXT: v_add_u32_dpp v2, v2, v2 row_bcast:15 row_mask:0xa bank_mask:0xf343; GFX9-NEXT: s_nop 1344; GFX9-NEXT: v_add_u32_dpp v2, v2, v2 row_bcast:31 row_mask:0xc bank_mask:0xf345; GFX9-NEXT: v_readlane_b32 s12, v2, 63346; GFX9-NEXT: s_nop 0347; GFX9-NEXT: v_mov_b32_dpp v1, v2 wave_shr:1 row_mask:0xf bank_mask:0xf348; GFX9-NEXT: s_mov_b64 exec, s[10:11]349; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3350; GFX9-NEXT: ; implicit-def: $vgpr0351; GFX9-NEXT: s_and_saveexec_b64 s[10:11], vcc352; GFX9-NEXT: s_cbranch_execz .LBB1_3353; GFX9-NEXT: ; %bb.2:354; GFX9-NEXT: v_mov_b32_e32 v0, s12355; GFX9-NEXT: buffer_atomic_add v0, off, s[4:7], 0 glc356; GFX9-NEXT: .LBB1_3:357; GFX9-NEXT: s_or_b64 exec, exec, s[10:11]358; GFX9-NEXT: s_waitcnt vmcnt(0)359; GFX9-NEXT: v_readfirstlane_b32 s4, v0360; GFX9-NEXT: v_mov_b32_e32 v0, v1361; GFX9-NEXT: v_add_u32_e32 v3, s4, v0362; GFX9-NEXT: .LBB1_4: ; %Flow363; GFX9-NEXT: s_or_b64 exec, exec, s[8:9]364; GFX9-NEXT: s_wqm_b64 s[4:5], -1365; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], s[4:5]366; GFX9-NEXT: s_andn2_b64 vcc, exec, s[4:5]367; GFX9-NEXT: s_cbranch_vccnz .LBB1_6368; GFX9-NEXT: ; %bb.5: ; %if369; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], 0370; GFX9-NEXT: .LBB1_6: ; %UnifiedReturnBlock371; GFX9-NEXT: s_endpgm372;373; GFX1064-LABEL: add_i32_varying:374; GFX1064: ; %bb.0: ; %entry375; GFX1064-NEXT: s_mov_b64 s[8:9], exec376; GFX1064-NEXT: ; implicit-def: $vgpr4377; GFX1064-NEXT: s_mov_b64 s[10:11], s[8:9]378; GFX1064-NEXT: s_and_saveexec_b64 s[8:9], s[10:11]379; GFX1064-NEXT: s_cbranch_execz .LBB1_4380; GFX1064-NEXT: ; %bb.1:381; GFX1064-NEXT: s_or_saveexec_b64 s[10:11], -1382; GFX1064-NEXT: v_cndmask_b32_e64 v1, 0, v0, s[10:11]383; GFX1064-NEXT: v_mov_b32_e32 v3, 0384; GFX1064-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1385; GFX1064-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1386; GFX1064-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1387; GFX1064-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1388; GFX1064-NEXT: v_permlanex16_b32 v2, v1, -1, -1389; GFX1064-NEXT: v_add_nc_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf390; GFX1064-NEXT: v_readlane_b32 s12, v1, 31391; GFX1064-NEXT: v_mov_b32_e32 v2, s12392; GFX1064-NEXT: v_add_nc_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xc bank_mask:0xf393; GFX1064-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf394; GFX1064-NEXT: v_readlane_b32 s12, v1, 15395; GFX1064-NEXT: v_readlane_b32 s13, v1, 31396; GFX1064-NEXT: v_writelane_b32 v3, s12, 16397; GFX1064-NEXT: s_mov_b64 exec, s[10:11]398; GFX1064-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0399; GFX1064-NEXT: s_or_saveexec_b64 s[10:11], -1400; GFX1064-NEXT: v_readlane_b32 s12, v1, 63401; GFX1064-NEXT: v_readlane_b32 s14, v1, 47402; GFX1064-NEXT: v_writelane_b32 v3, s13, 32403; GFX1064-NEXT: s_mov_b64 exec, s[10:11]404; GFX1064-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0405; GFX1064-NEXT: s_or_saveexec_b64 s[10:11], -1406; GFX1064-NEXT: v_writelane_b32 v3, s14, 48407; GFX1064-NEXT: s_mov_b64 exec, s[10:11]408; GFX1064-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0409; GFX1064-NEXT: ; implicit-def: $vgpr0410; GFX1064-NEXT: s_and_saveexec_b64 s[10:11], vcc411; GFX1064-NEXT: s_cbranch_execz .LBB1_3412; GFX1064-NEXT: ; %bb.2:413; GFX1064-NEXT: v_mov_b32_e32 v0, s12414; GFX1064-NEXT: buffer_atomic_add v0, off, s[4:7], 0 glc415; GFX1064-NEXT: .LBB1_3:416; GFX1064-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)417; GFX1064-NEXT: s_or_b64 exec, exec, s[10:11]418; GFX1064-NEXT: s_waitcnt vmcnt(0)419; GFX1064-NEXT: v_readfirstlane_b32 s4, v0420; GFX1064-NEXT: v_mov_b32_e32 v0, v3421; GFX1064-NEXT: v_add_nc_u32_e32 v4, s4, v0422; GFX1064-NEXT: .LBB1_4: ; %Flow423; GFX1064-NEXT: s_or_b64 exec, exec, s[8:9]424; GFX1064-NEXT: s_wqm_b64 s[4:5], -1425; GFX1064-NEXT: s_and_b64 s[4:5], s[4:5], s[4:5]426; GFX1064-NEXT: s_andn2_b64 vcc, exec, s[4:5]427; GFX1064-NEXT: s_cbranch_vccnz .LBB1_6428; GFX1064-NEXT: ; %bb.5: ; %if429; GFX1064-NEXT: buffer_store_dword v4, off, s[0:3], 0430; GFX1064-NEXT: .LBB1_6: ; %UnifiedReturnBlock431; GFX1064-NEXT: s_endpgm432;433; GFX1032-LABEL: add_i32_varying:434; GFX1032: ; %bb.0: ; %entry435; GFX1032-NEXT: s_mov_b32 s8, exec_lo436; GFX1032-NEXT: ; implicit-def: $vgpr4437; GFX1032-NEXT: s_mov_b32 s9, s8438; GFX1032-NEXT: s_and_saveexec_b32 s8, s9439; GFX1032-NEXT: s_cbranch_execz .LBB1_4440; GFX1032-NEXT: ; %bb.1:441; GFX1032-NEXT: s_or_saveexec_b32 s9, -1442; GFX1032-NEXT: v_cndmask_b32_e64 v1, 0, v0, s9443; GFX1032-NEXT: v_mov_b32_e32 v3, 0444; GFX1032-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1445; GFX1032-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1446; GFX1032-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1447; GFX1032-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1448; GFX1032-NEXT: v_permlanex16_b32 v2, v1, -1, -1449; GFX1032-NEXT: v_add_nc_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf450; GFX1032-NEXT: v_readlane_b32 s11, v1, 31451; GFX1032-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf452; GFX1032-NEXT: v_readlane_b32 s10, v1, 15453; GFX1032-NEXT: s_mov_b32 exec_lo, s9454; GFX1032-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0455; GFX1032-NEXT: s_or_saveexec_b32 s9, -1456; GFX1032-NEXT: v_writelane_b32 v3, s10, 16457; GFX1032-NEXT: s_mov_b32 exec_lo, s9458; GFX1032-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0459; GFX1032-NEXT: ; implicit-def: $vgpr0460; GFX1032-NEXT: s_and_saveexec_b32 s9, vcc_lo461; GFX1032-NEXT: s_cbranch_execz .LBB1_3462; GFX1032-NEXT: ; %bb.2:463; GFX1032-NEXT: v_mov_b32_e32 v0, s11464; GFX1032-NEXT: buffer_atomic_add v0, off, s[4:7], 0 glc465; GFX1032-NEXT: .LBB1_3:466; GFX1032-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)467; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s9468; GFX1032-NEXT: s_waitcnt vmcnt(0)469; GFX1032-NEXT: v_readfirstlane_b32 s4, v0470; GFX1032-NEXT: v_mov_b32_e32 v0, v3471; GFX1032-NEXT: v_add_nc_u32_e32 v4, s4, v0472; GFX1032-NEXT: .LBB1_4: ; %Flow473; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s8474; GFX1032-NEXT: s_wqm_b32 s4, -1475; GFX1032-NEXT: s_and_b32 s4, s4, s4476; GFX1032-NEXT: s_andn2_b32 vcc_lo, exec_lo, s4477; GFX1032-NEXT: s_cbranch_vccnz .LBB1_6478; GFX1032-NEXT: ; %bb.5: ; %if479; GFX1032-NEXT: buffer_store_dword v4, off, s[0:3], 0480; GFX1032-NEXT: .LBB1_6: ; %UnifiedReturnBlock481; GFX1032-NEXT: s_endpgm482;483; GFX1164-LABEL: add_i32_varying:484; GFX1164: ; %bb.0: ; %entry485; GFX1164-NEXT: s_mov_b64 s[8:9], exec486; GFX1164-NEXT: ; implicit-def: $vgpr4487; GFX1164-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)488; GFX1164-NEXT: s_mov_b64 s[10:11], s[8:9]489; GFX1164-NEXT: s_and_saveexec_b64 s[8:9], s[10:11]490; GFX1164-NEXT: s_cbranch_execz .LBB1_4491; GFX1164-NEXT: ; %bb.1:492; GFX1164-NEXT: s_or_saveexec_b64 s[10:11], -1493; GFX1164-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)494; GFX1164-NEXT: v_cndmask_b32_e64 v1, 0, v0, s[10:11]495; GFX1164-NEXT: v_mov_b32_e32 v3, 0496; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1497; GFX1164-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)498; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1499; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1500; GFX1164-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)501; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1502; GFX1164-NEXT: v_permlanex16_b32 v2, v1, -1, -1503; GFX1164-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)504; GFX1164-NEXT: v_add_nc_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf505; GFX1164-NEXT: v_readlane_b32 s12, v1, 31506; GFX1164-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)507; GFX1164-NEXT: v_mov_b32_e32 v2, s12508; GFX1164-NEXT: v_add_nc_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xc bank_mask:0xf509; GFX1164-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)510; GFX1164-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf511; GFX1164-NEXT: v_readlane_b32 s12, v1, 15512; GFX1164-NEXT: v_readlane_b32 s13, v1, 31513; GFX1164-NEXT: v_writelane_b32 v3, s12, 16514; GFX1164-NEXT: s_mov_b64 exec, s[10:11]515; GFX1164-NEXT: s_delay_alu instid0(SALU_CYCLE_1)516; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0517; GFX1164-NEXT: s_or_saveexec_b64 s[10:11], -1518; GFX1164-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)519; GFX1164-NEXT: v_readlane_b32 s12, v1, 63520; GFX1164-NEXT: v_readlane_b32 s14, v1, 47521; GFX1164-NEXT: v_writelane_b32 v3, s13, 32522; GFX1164-NEXT: s_mov_b64 exec, s[10:11]523; GFX1164-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)524; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0525; GFX1164-NEXT: s_or_saveexec_b64 s[10:11], -1526; GFX1164-NEXT: v_writelane_b32 v3, s14, 48527; GFX1164-NEXT: s_mov_b64 exec, s[10:11]528; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0529; GFX1164-NEXT: ; implicit-def: $vgpr0530; GFX1164-NEXT: s_and_saveexec_b64 s[10:11], vcc531; GFX1164-NEXT: s_cbranch_execz .LBB1_3532; GFX1164-NEXT: ; %bb.2:533; GFX1164-NEXT: v_mov_b32_e32 v0, s12534; GFX1164-NEXT: buffer_atomic_add_u32 v0, off, s[4:7], 0 glc535; GFX1164-NEXT: .LBB1_3:536; GFX1164-NEXT: s_or_b64 exec, exec, s[10:11]537; GFX1164-NEXT: s_waitcnt vmcnt(0)538; GFX1164-NEXT: v_readfirstlane_b32 s4, v0539; GFX1164-NEXT: v_mov_b32_e32 v0, v3540; GFX1164-NEXT: s_delay_alu instid0(VALU_DEP_1)541; GFX1164-NEXT: v_add_nc_u32_e32 v4, s4, v0542; GFX1164-NEXT: .LBB1_4: ; %Flow543; GFX1164-NEXT: s_or_b64 exec, exec, s[8:9]544; GFX1164-NEXT: s_wqm_b64 s[4:5], -1545; GFX1164-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)546; GFX1164-NEXT: s_and_b64 s[4:5], s[4:5], s[4:5]547; GFX1164-NEXT: s_and_not1_b64 vcc, exec, s[4:5]548; GFX1164-NEXT: s_cbranch_vccnz .LBB1_6549; GFX1164-NEXT: ; %bb.5: ; %if550; GFX1164-NEXT: buffer_store_b32 v4, off, s[0:3], 0551; GFX1164-NEXT: .LBB1_6: ; %UnifiedReturnBlock552; GFX1164-NEXT: s_endpgm553;554; GFX1132-LABEL: add_i32_varying:555; GFX1132: ; %bb.0: ; %entry556; GFX1132-NEXT: s_mov_b32 s8, exec_lo557; GFX1132-NEXT: ; implicit-def: $vgpr4558; GFX1132-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)559; GFX1132-NEXT: s_mov_b32 s9, s8560; GFX1132-NEXT: s_and_saveexec_b32 s8, s9561; GFX1132-NEXT: s_cbranch_execz .LBB1_4562; GFX1132-NEXT: ; %bb.1:563; GFX1132-NEXT: s_or_saveexec_b32 s9, -1564; GFX1132-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)565; GFX1132-NEXT: v_cndmask_b32_e64 v1, 0, v0, s9566; GFX1132-NEXT: v_mov_b32_e32 v3, 0567; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1568; GFX1132-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)569; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1570; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1571; GFX1132-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)572; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1573; GFX1132-NEXT: v_permlanex16_b32 v2, v1, -1, -1574; GFX1132-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)575; GFX1132-NEXT: v_add_nc_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf576; GFX1132-NEXT: v_readlane_b32 s11, v1, 31577; GFX1132-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf578; GFX1132-NEXT: v_readlane_b32 s10, v1, 15579; GFX1132-NEXT: s_mov_b32 exec_lo, s9580; GFX1132-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)581; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0582; GFX1132-NEXT: s_or_saveexec_b32 s9, -1583; GFX1132-NEXT: v_writelane_b32 v3, s10, 16584; GFX1132-NEXT: s_mov_b32 exec_lo, s9585; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0586; GFX1132-NEXT: ; implicit-def: $vgpr0587; GFX1132-NEXT: s_and_saveexec_b32 s9, vcc_lo588; GFX1132-NEXT: s_cbranch_execz .LBB1_3589; GFX1132-NEXT: ; %bb.2:590; GFX1132-NEXT: v_mov_b32_e32 v0, s11591; GFX1132-NEXT: buffer_atomic_add_u32 v0, off, s[4:7], 0 glc592; GFX1132-NEXT: .LBB1_3:593; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s9594; GFX1132-NEXT: s_waitcnt vmcnt(0)595; GFX1132-NEXT: v_readfirstlane_b32 s4, v0596; GFX1132-NEXT: v_mov_b32_e32 v0, v3597; GFX1132-NEXT: s_delay_alu instid0(VALU_DEP_1)598; GFX1132-NEXT: v_add_nc_u32_e32 v4, s4, v0599; GFX1132-NEXT: .LBB1_4: ; %Flow600; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s8601; GFX1132-NEXT: s_wqm_b32 s4, -1602; GFX1132-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)603; GFX1132-NEXT: s_and_b32 s4, s4, s4604; GFX1132-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s4605; GFX1132-NEXT: s_cbranch_vccnz .LBB1_6606; GFX1132-NEXT: ; %bb.5: ; %if607; GFX1132-NEXT: buffer_store_b32 v4, off, s[0:3], 0608; GFX1132-NEXT: .LBB1_6: ; %UnifiedReturnBlock609; GFX1132-NEXT: s_endpgm610entry:611 %cond1 = call i1 @llvm.amdgcn.wqm.vote(i1 true)612 %old = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.add(i32 %val, ptr addrspace(8) %inout, i32 0, i32 0, i32 0)613 %cond2 = call i1 @llvm.amdgcn.wqm.vote(i1 true)614 %cond = and i1 %cond1, %cond2615 br i1 %cond, label %if, label %else616if:617 %bitcast = bitcast i32 %old to float618 call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %bitcast, ptr addrspace(8) %out, i32 0, i32 0, i32 0)619 ret void620else:621 ret void622}623