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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck --check-prefixes=GFX11-TRUE16 %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck --check-prefixes=GFX11-FAKE16 %s4 5@global_smem = external local_unnamed_addr addrspace(1) global [0 x i8], align 166 7define amdgpu_kernel void @v_atomicrmw_fadd_bf16(ptr addrspace(1) %out, i1 %in, ptr addrspace(1) %ptr) #0 {8; GFX11-TRUE16-LABEL: v_atomicrmw_fadd_bf16:9; GFX11-TRUE16: ; %bb.0:10; GFX11-TRUE16-NEXT: s_clause 0x111; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x3412; GFX11-TRUE16-NEXT: s_load_b64 s[2:3], s[4:5], 0x2413; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v014; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, 015; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, 016; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)17; GFX11-TRUE16-NEXT: global_load_b32 v2, v0, s[0:1] offset:418; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, -419; GFX11-TRUE16-NEXT: s_mov_b32 s1, s320; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 321; GFX11-TRUE16-NEXT: s_load_b32 s3, s[0:1], 0x022; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 323; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)24; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h25; GFX11-TRUE16-NEXT: s_lshl_b32 s4, 0xffff, s226; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)27; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s328; GFX11-TRUE16-NEXT: s_not_b32 s3, s429; GFX11-TRUE16-NEXT: s_mov_b32 s4, 030; GFX11-TRUE16-NEXT: .p2align 631; GFX11-TRUE16-NEXT: .LBB0_1: ; %atomicrmw.start32; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=133; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)34; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v135; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v036; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)37; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, v0, v238; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v0, 16, 139; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v040; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v041; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)42; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v0, 0x7fff43; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v6, vcc_lo44; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)45; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v0.h46; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, s2, v347; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)48; GFX11-TRUE16-NEXT: v_and_or_b32 v0, v1, s3, v049; GFX11-TRUE16-NEXT: global_atomic_cmpswap_b32 v0, v4, v[0:1], s[0:1] glc50; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)51; GFX11-TRUE16-NEXT: buffer_gl1_inv52; GFX11-TRUE16-NEXT: buffer_gl0_inv53; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v154; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, v055; GFX11-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s456; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)57; GFX11-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s458; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB0_159; GFX11-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end60; GFX11-TRUE16-NEXT: s_endpgm61;62; GFX11-FAKE16-LABEL: v_atomicrmw_fadd_bf16:63; GFX11-FAKE16: ; %bb.0:64; GFX11-FAKE16-NEXT: s_clause 0x165; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x3466; GFX11-FAKE16-NEXT: s_load_b64 s[2:3], s[4:5], 0x2467; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v068; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)69; GFX11-FAKE16-NEXT: global_load_b32 v0, v0, s[0:1] offset:470; GFX11-FAKE16-NEXT: s_and_b32 s0, s2, -471; GFX11-FAKE16-NEXT: s_mov_b32 s1, s372; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 373; GFX11-FAKE16-NEXT: s_load_b32 s3, s[0:1], 0x074; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 375; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)76; GFX11-FAKE16-NEXT: s_lshl_b32 s4, 0xffff, s277; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)78; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, s379; GFX11-FAKE16-NEXT: s_not_b32 s3, s480; GFX11-FAKE16-NEXT: s_mov_b32 s4, 081; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)82; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v083; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)84; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v085; GFX11-FAKE16-NEXT: .p2align 686; GFX11-FAKE16-NEXT: .LBB0_1: ; %atomicrmw.start87; GFX11-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=188; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)89; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s2, v190; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v091; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)92; GFX11-FAKE16-NEXT: v_add_f32_e32 v0, v0, v293; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v0, 16, 194; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v095; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v096; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)97; GFX11-FAKE16-NEXT: v_add3_u32 v4, v4, v0, 0x7fff98; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc_lo99; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)100; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0101; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0102; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)103; GFX11-FAKE16-NEXT: v_and_or_b32 v0, v1, s3, v0104; GFX11-FAKE16-NEXT: global_atomic_cmpswap_b32 v0, v3, v[0:1], s[0:1] glc105; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)106; GFX11-FAKE16-NEXT: buffer_gl1_inv107; GFX11-FAKE16-NEXT: buffer_gl0_inv108; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1109; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, v0110; GFX11-FAKE16-NEXT: s_or_b32 s4, vcc_lo, s4111; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)112; GFX11-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4113; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB0_1114; GFX11-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end115; GFX11-FAKE16-NEXT: s_endpgm116 %tid = call i32 @llvm.amdgcn.workitem.id.x()117 %in.gep = getelementptr <{ [0 x i8] }>, ptr addrspace(1) %ptr, i64 0, i32 0, i32 %tid118 %load = load <4 x bfloat>, ptr addrspace(1) %in.gep119 %extract1 = extractelement <4 x bfloat> %load, i64 3120 %fadd = atomicrmw fadd ptr addrspace(1) %out, bfloat %extract1 syncscope("agent") acq_rel121 ret void122}123