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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefixes=GFX12-SDAG %s3; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefixes=GFX12-GISEL %s4 5declare i32 @llvm.amdgcn.atomic.cond.sub.u32.p3(ptr addrspace(3), i32)6declare i32 @llvm.amdgcn.atomic.cond.sub.u32.p1(ptr addrspace(1), i32)7declare i32 @llvm.amdgcn.atomic.cond.sub.u32.p0(ptr, i32)8 9define amdgpu_kernel void @flat_atomic_cond_sub_no_rtn_u32(ptr %addr, i32 %in) {10; GFX12-SDAG-LABEL: flat_atomic_cond_sub_no_rtn_u32:11; GFX12-SDAG: ; %bb.0: ; %entry12; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x2413; GFX12-SDAG-NEXT: s_wait_kmcnt 0x014; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s115; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, s216; GFX12-SDAG-NEXT: flat_atomic_cond_sub_u32 v0, v[0:1], v2 offset:-16 th:TH_ATOMIC_RETURN17; GFX12-SDAG-NEXT: s_endpgm18;19; GFX12-GISEL-LABEL: flat_atomic_cond_sub_no_rtn_u32:20; GFX12-GISEL: ; %bb.0: ; %entry21; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x2422; GFX12-GISEL-NEXT: s_wait_kmcnt 0x023; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s024; GFX12-GISEL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s125; GFX12-GISEL-NEXT: flat_atomic_cond_sub_u32 v0, v[0:1], v2 offset:-16 th:TH_ATOMIC_RETURN26; GFX12-GISEL-NEXT: s_endpgm27entry:28 %gep = getelementptr inbounds i32, ptr %addr, i32 -429 %unused = call i32 @llvm.amdgcn.atomic.cond.sub.u32.p0(ptr %gep, i32 %in)30 ret void31}32 33define amdgpu_kernel void @flat_atomic_cond_sub_no_rtn_u32_forced(ptr %addr, i32 %in) "target-features"="+atomic-csub-no-rtn-insts" {34; GFX12-SDAG-LABEL: flat_atomic_cond_sub_no_rtn_u32_forced:35; GFX12-SDAG: ; %bb.0: ; %entry36; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x2437; GFX12-SDAG-NEXT: s_wait_kmcnt 0x038; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s139; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, s240; GFX12-SDAG-NEXT: flat_atomic_cond_sub_u32 v[0:1], v2 offset:-1641; GFX12-SDAG-NEXT: s_endpgm42;43; GFX12-GISEL-LABEL: flat_atomic_cond_sub_no_rtn_u32_forced:44; GFX12-GISEL: ; %bb.0: ; %entry45; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x2446; GFX12-GISEL-NEXT: s_wait_kmcnt 0x047; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s048; GFX12-GISEL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s149; GFX12-GISEL-NEXT: flat_atomic_cond_sub_u32 v[0:1], v2 offset:-1650; GFX12-GISEL-NEXT: s_endpgm51entry:52 %gep = getelementptr inbounds i32, ptr %addr, i32 -453 %unused = call i32 @llvm.amdgcn.atomic.cond.sub.u32.p0(ptr %gep, i32 %in)54 ret void55}56 57define amdgpu_kernel void @flat_atomic_cond_sub_rtn_u32(ptr %addr, i32 %in, ptr %use) {58; GFX12-SDAG-LABEL: flat_atomic_cond_sub_rtn_u32:59; GFX12-SDAG: ; %bb.0: ; %entry60; GFX12-SDAG-NEXT: s_clause 0x161; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x2462; GFX12-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x3463; GFX12-SDAG-NEXT: s_wait_kmcnt 0x064; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s165; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, s266; GFX12-SDAG-NEXT: flat_atomic_cond_sub_u32 v2, v[0:1], v2 offset:16 th:TH_ATOMIC_RETURN67; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s568; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x069; GFX12-SDAG-NEXT: flat_store_b32 v[0:1], v270; GFX12-SDAG-NEXT: s_endpgm71;72; GFX12-GISEL-LABEL: flat_atomic_cond_sub_rtn_u32:73; GFX12-GISEL: ; %bb.0: ; %entry74; GFX12-GISEL-NEXT: s_clause 0x175; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x2476; GFX12-GISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x3477; GFX12-GISEL-NEXT: s_wait_kmcnt 0x078; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s079; GFX12-GISEL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s180; GFX12-GISEL-NEXT: flat_atomic_cond_sub_u32 v2, v[0:1], v2 offset:16 th:TH_ATOMIC_RETURN81; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s582; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x083; GFX12-GISEL-NEXT: flat_store_b32 v[0:1], v284; GFX12-GISEL-NEXT: s_endpgm85entry:86 %gep = getelementptr inbounds i32, ptr %addr, i32 487 %val = call i32 @llvm.amdgcn.atomic.cond.sub.u32.p0(ptr %gep, i32 %in)88 store i32 %val, ptr %use89 ret void90}91 92define amdgpu_kernel void @global_atomic_cond_sub_no_rtn_u32(ptr addrspace(1) %addr, i32 %in) {93; GFX12-SDAG-LABEL: global_atomic_cond_sub_no_rtn_u32:94; GFX12-SDAG: ; %bb.0: ; %entry95; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x2496; GFX12-SDAG-NEXT: s_wait_kmcnt 0x097; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s298; GFX12-SDAG-NEXT: global_atomic_cond_sub_u32 v0, v0, v1, s[0:1] offset:-16 th:TH_ATOMIC_RETURN99; GFX12-SDAG-NEXT: s_endpgm100;101; GFX12-GISEL-LABEL: global_atomic_cond_sub_no_rtn_u32:102; GFX12-GISEL: ; %bb.0: ; %entry103; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x24104; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0105; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2106; GFX12-GISEL-NEXT: global_atomic_cond_sub_u32 v0, v1, v0, s[0:1] offset:-16 th:TH_ATOMIC_RETURN107; GFX12-GISEL-NEXT: s_endpgm108entry:109 %gep = getelementptr i32, ptr addrspace(1) %addr, i32 -4110 %unused = call i32 @llvm.amdgcn.atomic.cond.sub.u32.p1(ptr addrspace(1) %gep, i32 %in)111 ret void112}113 114define amdgpu_kernel void @global_atomic_cond_sub_no_rtn_u32_forced(ptr addrspace(1) %addr, i32 %in) "target-features"="+atomic-csub-no-rtn-insts" {115; GFX12-SDAG-LABEL: global_atomic_cond_sub_no_rtn_u32_forced:116; GFX12-SDAG: ; %bb.0: ; %entry117; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24118; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0119; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2120; GFX12-SDAG-NEXT: global_atomic_cond_sub_u32 v0, v1, s[0:1] offset:-16121; GFX12-SDAG-NEXT: s_endpgm122;123; GFX12-GISEL-LABEL: global_atomic_cond_sub_no_rtn_u32_forced:124; GFX12-GISEL: ; %bb.0: ; %entry125; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x24126; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0127; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2128; GFX12-GISEL-NEXT: global_atomic_cond_sub_u32 v1, v0, s[0:1] offset:-16129; GFX12-GISEL-NEXT: s_endpgm130entry:131 %gep = getelementptr i32, ptr addrspace(1) %addr, i32 -4132 %unused = call i32 @llvm.amdgcn.atomic.cond.sub.u32.p1(ptr addrspace(1) %gep, i32 %in)133 ret void134}135 136define amdgpu_kernel void @global_atomic_cond_sub_rtn_u32(ptr addrspace(1) %addr, i32 %in, ptr addrspace(1) %use) {137; GFX12-SDAG-LABEL: global_atomic_cond_sub_rtn_u32:138; GFX12-SDAG: ; %bb.0: ; %entry139; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24140; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0141; GFX12-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34142; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0143; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s2144; GFX12-SDAG-NEXT: global_atomic_cond_sub_u32 v1, v0, v1, s[0:1] offset:16 th:TH_ATOMIC_RETURN145; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0146; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[4:5]147; GFX12-SDAG-NEXT: s_endpgm148;149; GFX12-GISEL-LABEL: global_atomic_cond_sub_rtn_u32:150; GFX12-GISEL: ; %bb.0: ; %entry151; GFX12-GISEL-NEXT: s_clause 0x1152; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x24153; GFX12-GISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34154; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0155; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2156; GFX12-GISEL-NEXT: global_atomic_cond_sub_u32 v0, v1, v0, s[0:1] offset:16 th:TH_ATOMIC_RETURN157; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0158; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[4:5]159; GFX12-GISEL-NEXT: s_endpgm160entry:161 %gep = getelementptr i32, ptr addrspace(1) %addr, i32 4162 %val = call i32 @llvm.amdgcn.atomic.cond.sub.u32.p1(ptr addrspace(1) %gep, i32 %in)163 store i32 %val, ptr addrspace(1) %use164 ret void165}166 167define amdgpu_kernel void @ds_cond_sub_no_rtn_u32(ptr addrspace(3) %addr, i32 %in) {168; GFX12-SDAG-LABEL: ds_cond_sub_no_rtn_u32:169; GFX12-SDAG: ; %bb.0: ; %entry170; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24171; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0172; GFX12-SDAG-NEXT: s_add_co_i32 s0, s0, -16173; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)174; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0175; GFX12-SDAG-NEXT: ds_cond_sub_rtn_u32 v0, v0, v1176; GFX12-SDAG-NEXT: s_endpgm177;178; GFX12-GISEL-LABEL: ds_cond_sub_no_rtn_u32:179; GFX12-GISEL: ; %bb.0: ; %entry180; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24181; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0182; GFX12-GISEL-NEXT: s_add_co_u32 s0, s0, -16183; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)184; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0185; GFX12-GISEL-NEXT: ds_cond_sub_rtn_u32 v0, v0, v1186; GFX12-GISEL-NEXT: s_endpgm187entry:188 %gep = getelementptr i32, ptr addrspace(3) %addr, i32 -4189 %unused = call i32 @llvm.amdgcn.atomic.cond.sub.u32.p3(ptr addrspace(3) %gep, i32 %in)190 ret void191}192 193define amdgpu_kernel void @ds_cond_sub_no_rtn_u32_forced(ptr addrspace(3) %addr, i32 %in) "target-features"="+atomic-csub-no-rtn-insts" {194; GFX12-SDAG-LABEL: ds_cond_sub_no_rtn_u32_forced:195; GFX12-SDAG: ; %bb.0: ; %entry196; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24197; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0198; GFX12-SDAG-NEXT: s_add_co_i32 s0, s0, -16199; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)200; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0201; GFX12-SDAG-NEXT: ds_cond_sub_u32 v0, v1202; GFX12-SDAG-NEXT: s_endpgm203;204; GFX12-GISEL-LABEL: ds_cond_sub_no_rtn_u32_forced:205; GFX12-GISEL: ; %bb.0: ; %entry206; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24207; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0208; GFX12-GISEL-NEXT: s_add_co_u32 s0, s0, -16209; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)210; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0211; GFX12-GISEL-NEXT: ds_cond_sub_u32 v0, v1212; GFX12-GISEL-NEXT: s_endpgm213entry:214 %gep = getelementptr i32, ptr addrspace(3) %addr, i32 -4215 %unused = call i32 @llvm.amdgcn.atomic.cond.sub.u32.p3(ptr addrspace(3) %gep, i32 %in)216 ret void217}218 219define amdgpu_kernel void @ds_cond_sub_rtn_u32(ptr addrspace(3) %addr, i32 %in, ptr addrspace(3) %use) {220; GFX12-SDAG-LABEL: ds_cond_sub_rtn_u32:221; GFX12-SDAG: ; %bb.0: ; %entry222; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24223; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0224; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1225; GFX12-SDAG-NEXT: ds_cond_sub_rtn_u32 v0, v0, v1 offset:16226; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s2227; GFX12-SDAG-NEXT: s_wait_dscnt 0x0228; GFX12-SDAG-NEXT: ds_store_b32 v1, v0229; GFX12-SDAG-NEXT: s_endpgm230;231; GFX12-GISEL-LABEL: ds_cond_sub_rtn_u32:232; GFX12-GISEL: ; %bb.0: ; %entry233; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x24234; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0235; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0236; GFX12-GISEL-NEXT: ds_cond_sub_rtn_u32 v0, v1, v0 offset:16237; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, s2238; GFX12-GISEL-NEXT: s_wait_dscnt 0x0239; GFX12-GISEL-NEXT: ds_store_b32 v1, v0240; GFX12-GISEL-NEXT: s_endpgm241entry:242 %gep = getelementptr i32, ptr addrspace(3) %addr, i32 4243 %val = call i32 @llvm.amdgcn.atomic.cond.sub.u32.p3(ptr addrspace(3) %gep, i32 %in)244 store i32 %val, ptr addrspace(3) %use245 ret void246}247