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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -stress-regalloc=18 < %s | FileCheck %s3 4define amdgpu_kernel void @vgpr_mfma_pass_av_split_crash(double %arg1, i1 %arg2, i1 %cond.i.i.i2295, ptr addrspace(1) %ptr, ptr %ptr1) #0 {5; CHECK-LABEL: vgpr_mfma_pass_av_split_crash:6; CHECK: ; %bb.0: ; %entry7; CHECK-NEXT: s_load_dword s0, s[4:5], 0x88; CHECK-NEXT: s_load_dwordx2 s[10:11], s[4:5], 0x09; CHECK-NEXT: s_load_dwordx4 s[12:15], s[4:5], 0x1010; CHECK-NEXT: v_mov_b32_e32 v20, 011; CHECK-NEXT: v_mov_b32_e32 v1, 0x3e21eeb612; CHECK-NEXT: s_waitcnt lgkmcnt(0)13; CHECK-NEXT: s_bitcmp1_b32 s0, 014; CHECK-NEXT: s_cselect_b64 s[16:17], -1, 015; CHECK-NEXT: s_xor_b64 s[18:19], s[16:17], -116; CHECK-NEXT: s_bitcmp1_b32 s0, 817; CHECK-NEXT: s_cselect_b64 s[2:3], -1, 018; CHECK-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[2:3]19; CHECK-NEXT: s_xor_b64 s[20:21], s[2:3], -120; CHECK-NEXT: v_cmp_ne_u32_e64 s[0:1], 1, v021; CHECK-NEXT: s_and_b64 s[2:3], exec, s[2:3]22; CHECK-NEXT: v_mov_b32_e32 v0, 0x9037ab7823; CHECK-NEXT: v_mov_b32_e32 v2, 0xa17f65f624; CHECK-NEXT: v_mov_b32_e32 v3, 0xbe927e4f25; CHECK-NEXT: v_mov_b32_e32 v4, 0x19f4ec9026; CHECK-NEXT: v_mov_b32_e32 v5, 0x3efa01a027; CHECK-NEXT: v_mov_b32_e32 v6, 0x16c1696728; CHECK-NEXT: v_mov_b32_e32 v7, 0xbf56c16c29; CHECK-NEXT: v_mov_b32_e32 v8, 0x69efb38430; CHECK-NEXT: v_mov_b32_e32 v9, 0x3f4b2bb031; CHECK-NEXT: v_mov_b32_e32 v10, 0xa57d958232; CHECK-NEXT: v_mov_b32_e32 v11, 0xbf8c6ea433; CHECK-NEXT: v_mov_b32_e32 v12, 0xe82d3ff034; CHECK-NEXT: v_mov_b32_e32 v13, 0xbfa5997635; CHECK-NEXT: v_mov_b32_e32 v14, 0x8427b88336; CHECK-NEXT: v_mov_b32_e32 v15, 0x3fae1bb437; CHECK-NEXT: s_mov_b64 s[22:23], 038; CHECK-NEXT: v_mov_b32_e32 v16, 0x57b8703639; CHECK-NEXT: v_mov_b32_e32 v17, 0x3fb3b13640; CHECK-NEXT: s_and_b64 s[4:5], exec, s[16:17]41; CHECK-NEXT: v_mov_b32_e32 v18, 0x5555552342; CHECK-NEXT: v_mov_b32_e32 v19, 0xbfd5555543; CHECK-NEXT: s_and_b64 s[6:7], exec, s[18:19]44; CHECK-NEXT: v_mov_b32_e32 v21, v2045; CHECK-NEXT: ; implicit-def: $vgpr30_vgpr3146; CHECK-NEXT: ; implicit-def: $vgpr22_vgpr2347; CHECK-NEXT: s_branch .LBB0_248; CHECK-NEXT: .LBB0_1: ; %Flow949; CHECK-NEXT: ; in Loop: Header=BB0_2 Depth=150; CHECK-NEXT: s_andn2_b64 vcc, exec, s[24:25]51; CHECK-NEXT: v_mov_b64_e32 v[30:31], v[24:25]52; CHECK-NEXT: s_cbranch_vccz .LBB0_1853; CHECK-NEXT: .LBB0_2: ; %._crit_edge1942.i.i.i354854; CHECK-NEXT: ; =>This Loop Header: Depth=155; CHECK-NEXT: ; Child Loop BB0_7 Depth 256; CHECK-NEXT: s_and_b64 vcc, exec, s[0:1]57; CHECK-NEXT: s_cbranch_vccnz .LBB0_1158; CHECK-NEXT: ; %bb.3: ; %.preheader1868.i.i.i324459; CHECK-NEXT: ; in Loop: Header=BB0_2 Depth=160; CHECK-NEXT: s_mov_b64 vcc, s[4:5]61; CHECK-NEXT: s_cbranch_vccz .LBB0_1262; CHECK-NEXT: ; %bb.4: ; %.preheader1855.i.i.i3329.preheader63; CHECK-NEXT: ; in Loop: Header=BB0_2 Depth=164; CHECK-NEXT: v_mov_b64_e32 v[24:25], s[14:15]65; CHECK-NEXT: flat_load_dwordx2 v[24:25], v[24:25]66; CHECK-NEXT: v_mov_b64_e32 v[26:27], v[0:1]67; CHECK-NEXT: v_mov_b64_e32 v[28:29], v[2:3]68; CHECK-NEXT: v_accvgpr_write_b32 a0, 069; CHECK-NEXT: v_accvgpr_write_b32 a1, 070; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)71; CHECK-NEXT: v_fmac_f64_e32 v[26:27], 0, v[24:25]72; CHECK-NEXT: v_fmac_f64_e32 v[28:29], 0, v[26:27]73; CHECK-NEXT: v_mov_b64_e32 v[26:27], v[4:5]74; CHECK-NEXT: v_fmac_f64_e32 v[26:27], 0, v[28:29]75; CHECK-NEXT: v_mov_b64_e32 v[28:29], v[6:7]76; CHECK-NEXT: v_fmac_f64_e32 v[28:29], 0, v[26:27]77; CHECK-NEXT: v_mov_b64_e32 v[26:27], v[8:9]78; CHECK-NEXT: v_fmac_f64_e32 v[26:27], 0, v[28:29]79; CHECK-NEXT: v_mov_b64_e32 v[28:29], v[10:11]80; CHECK-NEXT: v_fmac_f64_e32 v[28:29], 0, v[26:27]81; CHECK-NEXT: v_mov_b64_e32 v[26:27], v[12:13]82; CHECK-NEXT: v_fmac_f64_e32 v[26:27], 0, v[28:29]83; CHECK-NEXT: v_mov_b64_e32 v[28:29], v[14:15]84; CHECK-NEXT: v_fmac_f64_e32 v[28:29], 0, v[26:27]85; CHECK-NEXT: v_mov_b64_e32 v[26:27], v[16:17]86; CHECK-NEXT: v_fmac_f64_e32 v[26:27], 0, v[28:29]87; CHECK-NEXT: v_mov_b64_e32 v[28:29], v[18:19]88; CHECK-NEXT: v_fmac_f64_e32 v[28:29], 0, v[26:27]89; CHECK-NEXT: s_branch .LBB0_790; CHECK-NEXT: .LBB0_5: ; in Loop: Header=BB0_7 Depth=291; CHECK-NEXT: s_mov_b64 s[24:25], -192; CHECK-NEXT: ; implicit-def: $agpr0_agpr193; CHECK-NEXT: s_mov_b64 s[8:9], -194; CHECK-NEXT: .LBB0_6: ; %Flow95; CHECK-NEXT: ; in Loop: Header=BB0_7 Depth=296; CHECK-NEXT: s_and_b64 vcc, exec, s[8:9]97; CHECK-NEXT: s_cbranch_vccnz .LBB0_1398; CHECK-NEXT: .LBB0_7: ; %.preheader1855.i.i.i332999; CHECK-NEXT: ; Parent Loop BB0_2 Depth=1100; CHECK-NEXT: ; => This Inner Loop Header: Depth=2101; CHECK-NEXT: v_accvgpr_read_b32 v27, a1102; CHECK-NEXT: v_accvgpr_read_b32 v26, a0103; CHECK-NEXT: s_mov_b64 vcc, s[2:3]104; CHECK-NEXT: s_cbranch_vccz .LBB0_5105; CHECK-NEXT: ; %bb.8: ; %.lr.ph2070.i.i.i3291106; CHECK-NEXT: ; in Loop: Header=BB0_7 Depth=2107; CHECK-NEXT: s_mov_b64 vcc, s[6:7]108; CHECK-NEXT: s_cbranch_vccz .LBB0_10109; CHECK-NEXT: ; %bb.9: ; %.preheader1856.preheader.i.i.i3325110; CHECK-NEXT: ; in Loop: Header=BB0_7 Depth=2111; CHECK-NEXT: v_accvgpr_write_b32 a0, v28112; CHECK-NEXT: s_mov_b64 s[24:25], 0113; CHECK-NEXT: v_accvgpr_write_b32 a1, v29114; CHECK-NEXT: s_mov_b64 s[8:9], 0115; CHECK-NEXT: s_branch .LBB0_6116; CHECK-NEXT: .LBB0_10: ; in Loop: Header=BB0_7 Depth=2117; CHECK-NEXT: v_accvgpr_write_b32 a0, v30118; CHECK-NEXT: s_mov_b64 s[24:25], -1119; CHECK-NEXT: v_accvgpr_write_b32 a1, v31120; CHECK-NEXT: s_mov_b64 s[8:9], s[18:19]121; CHECK-NEXT: s_branch .LBB0_6122; CHECK-NEXT: .LBB0_11: ; in Loop: Header=BB0_2 Depth=1123; CHECK-NEXT: v_mov_b64_e32 v[24:25], s[10:11]124; CHECK-NEXT: s_mov_b64 s[22:23], 0125; CHECK-NEXT: s_mov_b64 s[8:9], s[20:21]126; CHECK-NEXT: s_branch .LBB0_16127; CHECK-NEXT: .LBB0_12: ; in Loop: Header=BB0_2 Depth=1128; CHECK-NEXT: s_mov_b64 s[8:9], -1129; CHECK-NEXT: v_mov_b64_e32 v[22:23], 0130; CHECK-NEXT: v_mov_b64_e32 v[24:25], v[30:31]131; CHECK-NEXT: s_branch .LBB0_16132; CHECK-NEXT: .LBB0_13: ; %loop.exit.guard133; CHECK-NEXT: ; in Loop: Header=BB0_2 Depth=1134; CHECK-NEXT: s_and_b64 vcc, exec, s[24:25]135; CHECK-NEXT: s_cbranch_vccz .LBB0_15136; CHECK-NEXT: ; %bb.14: ; %._crit_edge2105.i.i.i2330.loopexit137; CHECK-NEXT: ; in Loop: Header=BB0_2 Depth=1138; CHECK-NEXT: v_cmp_nlg_f64_e64 s[8:9], 0, v[26:27]139; CHECK-NEXT: v_cndmask_b32_e64 v23, v23, 0, s[16:17]140; CHECK-NEXT: v_cndmask_b32_e64 v22, v22, 0, s[16:17]141; CHECK-NEXT: v_cndmask_b32_e64 v26, 0, 1, s[8:9]142; CHECK-NEXT: v_mov_b32_e32 v27, v26143; CHECK-NEXT: s_and_b64 s[8:9], exec, s[16:17]144; CHECK-NEXT: global_store_dwordx2 v20, v[26:27], s[12:13]145; CHECK-NEXT: s_cselect_b32 s23, s23, 0146; CHECK-NEXT: s_cselect_b32 s22, s22, 0147; CHECK-NEXT: s_mov_b64 s[8:9], -1148; CHECK-NEXT: s_branch .LBB0_16149; CHECK-NEXT: .LBB0_15: ; in Loop: Header=BB0_2 Depth=1150; CHECK-NEXT: s_mov_b64 s[8:9], 0151; CHECK-NEXT: v_mov_b64_e32 v[22:23], 0152; CHECK-NEXT: .LBB0_16: ; %Flow6153; CHECK-NEXT: ; in Loop: Header=BB0_2 Depth=1154; CHECK-NEXT: s_mov_b64 s[24:25], -1155; CHECK-NEXT: s_and_b64 vcc, exec, s[8:9]156; CHECK-NEXT: s_cbranch_vccz .LBB0_1157; CHECK-NEXT: ; %bb.17: ; %._crit_edge2105.i.i.i2330158; CHECK-NEXT: ; in Loop: Header=BB0_2 Depth=1159; CHECK-NEXT: s_mov_b64 s[24:25], 0160; CHECK-NEXT: global_store_dwordx2 v20, v[20:21], s[12:13]161; CHECK-NEXT: s_branch .LBB0_1162; CHECK-NEXT: .LBB0_18: ; %DummyReturnBlock163; CHECK-NEXT: s_endpgm164entry:165 br label %._crit_edge1942.i.i.i3548166 167._crit_edge1942.i.i.i3548: ; preds = %._crit_edge2105.i.i.i2330, %entry168 %.sroa.02591.0.i.i.i226323 = phi double [ poison, %entry ], [ %.sroa.02591.3.i.i.i2301, %._crit_edge2105.i.i.i2330 ]169 %.sroa.3.0.i.i.i2270 = phi double [ poison, %entry ], [ %.sroa.3.3.i.i.i2308, %._crit_edge2105.i.i.i2330 ]170 %.014942244.i.i.i2280 = phi double [ 0.000000e+00, %entry ], [ %.31497.i.i.i2317, %._crit_edge2105.i.i.i2330 ]171 br i1 %cond.i.i.i2295, label %.preheader1868.i.i.i3244, label %._crit_edge2105.i.i.i2330172 173.preheader1868.i.i.i3244: ; preds = %._crit_edge1942.i.i.i3548174 %i = load double, ptr %ptr1, align 8175 %i3 = call double @llvm.fma.f64(double %i, double 0.000000e+00, double 0x3E21EEB69037AB78)176 %i4 = call double @llvm.fma.f64(double 0.000000e+00, double %i3, double 0xBE927E4FA17F65F6)177 %i5 = call double @llvm.fma.f64(double 0.000000e+00, double %i4, double 0x3EFA01A019F4EC90)178 %i6 = call double @llvm.fma.f64(double 0.000000e+00, double %i5, double 0xBF56C16C16C16967)179 %spec.select.i.i.i3288 = select i1 %arg2, double 0.000000e+00, double %.sroa.3.0.i.i.i2270180 br i1 %arg2, label %.preheader1855.i.i.i3329, label %._crit_edge2105.i.i.i2330181 182.lr.ph2070.i.i.i3291: ; preds = %.preheader1855.i.i.i3329183 br i1 %arg2, label %.preheader1855.i.i.i3329, label %.preheader1856.preheader.i.i.i3325184 185.preheader1856.preheader.i.i.i3325: ; preds = %.lr.ph2070.i.i.i3291186 %i11 = call double @llvm.fma.f64(double 0.000000e+00, double %i6, double 0x3F4B2BB069EFB384)187 %i14 = call double @llvm.fma.f64(double 0.000000e+00, double %i11, double 0xBF8C6EA4A57D9582)188 %i18 = call double @llvm.fma.f64(double 0.000000e+00, double %i14, double 0xBFA59976E82D3FF0)189 %i21 = call double @llvm.fma.f64(double 0.000000e+00, double %i18, double 0x3FAE1BB48427B883)190 %i23 = call double @llvm.fma.f64(double 0.000000e+00, double %i21, double 0x3FB3B13657B87036)191 %i28 = call double @llvm.fma.f64(double 0.000000e+00, double %i23, double 0xBFD5555555555523)192 br label %.preheader1855.i.i.i3329193 194.preheader1855.i.i.i3329: ; preds = %.preheader1856.preheader.i.i.i3325, %.lr.ph2070.i.i.i3291, %.preheader1868.i.i.i3244195 %.sroa.02591.4.i.i.i3335 = phi double [ %i28, %.preheader1856.preheader.i.i.i3325 ], [ %.sroa.02591.0.i.i.i226323, %.lr.ph2070.i.i.i3291 ], [ 0.000000e+00, %.preheader1868.i.i.i3244 ]196 %.21496.ph.i.i.i3348 = select i1 %arg2, double %.014942244.i.i.i2280, double 0.000000e+00197 %i31 = fcmp one double %.sroa.02591.4.i.i.i3335, 0.000000e+00198 %i32 = select i1 %i31, <2 x i32> zeroinitializer, <2 x i32> splat (i32 1)199 store <2 x i32> %i32, ptr addrspace(1) %ptr, align 8200 br i1 %cond.i.i.i2295, label %.lr.ph2070.i.i.i3291, label %._crit_edge2105.i.i.i2330201 202._crit_edge2105.i.i.i2330: ; preds = %.preheader1855.i.i.i3329, %.preheader1868.i.i.i3244, %._crit_edge1942.i.i.i3548203 %.sroa.02591.3.i.i.i2301 = phi double [ %.sroa.02591.0.i.i.i226323, %.preheader1868.i.i.i3244 ], [ %arg1, %._crit_edge1942.i.i.i3548 ], [ %i, %.preheader1855.i.i.i3329 ]204 %.sroa.3.3.i.i.i2308 = phi double [ 0.000000e+00, %.preheader1868.i.i.i3244 ], [ %.sroa.3.0.i.i.i2270, %._crit_edge1942.i.i.i3548 ], [ %spec.select.i.i.i3288, %.preheader1855.i.i.i3329 ]205 %.31497.i.i.i2317 = phi double [ %.014942244.i.i.i2280, %.preheader1868.i.i.i3244 ], [ 0.000000e+00, %._crit_edge1942.i.i.i3548 ], [ %.21496.ph.i.i.i3348, %.preheader1855.i.i.i3329 ]206 store double 0.000000e+00, ptr addrspace(1) %ptr, align 8207 br label %._crit_edge1942.i.i.i3548208}209 210declare double @llvm.fma.f64(double, double, double) #1211 212attributes #0 = { "amdgpu-waves-per-eu"="8,8" "target-cpu"="gfx942" }213attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }214