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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=fiji -amdgpu-sdwa-peephole=0 < %s | FileCheck %s --check-prefixes=VI3; RUN: llc -mtriple=amdgcn -mcpu=fiji < %s | FileCheck %s --check-prefixes=VI-SDWA4; RUN: llc -mtriple=amdgcn -mcpu=bonaire < %s | FileCheck %s --check-prefixes=CI5 6define amdgpu_kernel void @bfe_combine8(ptr addrspace(1) nocapture %arg, i32 %x) {7; VI-LABEL: bfe_combine8:8; VI: ; %bb.0:9; VI-NEXT: s_load_dword s2, s[4:5], 0x2c10; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2411; VI-NEXT: s_waitcnt lgkmcnt(0)12; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v013; VI-NEXT: v_bfe_u32 v0, v0, 8, 814; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v015; VI-NEXT: v_mov_b32_e32 v1, s116; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v017; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc18; VI-NEXT: flat_load_dword v2, v[0:1]19; VI-NEXT: v_mov_b32_e32 v0, s020; VI-NEXT: v_mov_b32_e32 v1, s121; VI-NEXT: s_waitcnt vmcnt(0)22; VI-NEXT: flat_store_dword v[0:1], v223; VI-NEXT: s_endpgm24;25; VI-SDWA-LABEL: bfe_combine8:26; VI-SDWA: ; %bb.0:27; VI-SDWA-NEXT: s_load_dword s2, s[4:5], 0x2c28; VI-SDWA-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2429; VI-SDWA-NEXT: v_mov_b32_e32 v1, 230; VI-SDWA-NEXT: s_waitcnt lgkmcnt(0)31; VI-SDWA-NEXT: v_add_u32_e32 v0, vcc, s2, v032; VI-SDWA-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_133; VI-SDWA-NEXT: v_mov_b32_e32 v1, s134; VI-SDWA-NEXT: v_add_u32_e32 v0, vcc, s0, v035; VI-SDWA-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc36; VI-SDWA-NEXT: flat_load_dword v2, v[0:1]37; VI-SDWA-NEXT: v_mov_b32_e32 v0, s038; VI-SDWA-NEXT: v_mov_b32_e32 v1, s139; VI-SDWA-NEXT: s_waitcnt vmcnt(0)40; VI-SDWA-NEXT: flat_store_dword v[0:1], v241; VI-SDWA-NEXT: s_endpgm42;43; CI-LABEL: bfe_combine8:44; CI: ; %bb.0:45; CI-NEXT: s_load_dword s2, s[4:5], 0xb46; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x947; CI-NEXT: s_mov_b32 s3, 0xf00048; CI-NEXT: s_mov_b32 s6, 049; CI-NEXT: s_mov_b32 s7, s350; CI-NEXT: s_waitcnt lgkmcnt(0)51; CI-NEXT: v_add_i32_e32 v0, vcc, s2, v052; CI-NEXT: v_lshrrev_b32_e32 v0, 6, v053; CI-NEXT: s_mov_b64 s[4:5], s[0:1]54; CI-NEXT: v_and_b32_e32 v0, 0x3fc, v055; CI-NEXT: v_mov_b32_e32 v1, 056; CI-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr6457; CI-NEXT: s_mov_b32 s2, -158; CI-NEXT: s_waitcnt vmcnt(0)59; CI-NEXT: buffer_store_dword v0, off, s[0:3], 060; CI-NEXT: s_endpgm61 %id = tail call i32 @llvm.amdgcn.workitem.id.x() #262 %idx = add i32 %x, %id63 %srl = lshr i32 %idx, 864 %and = and i32 %srl, 25565 %ptr = getelementptr inbounds i32, ptr addrspace(1) %arg, i32 %and66 %val = load i32, ptr addrspace(1) %ptr, align 467 store i32 %val, ptr addrspace(1) %arg, align 468 ret void69}70 71define amdgpu_kernel void @bfe_combine16(ptr addrspace(1) nocapture %arg, i32 %x) {72; VI-LABEL: bfe_combine16:73; VI: ; %bb.0:74; VI-NEXT: s_load_dword s2, s[4:5], 0x2c75; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2476; VI-NEXT: v_mov_b32_e32 v1, 077; VI-NEXT: s_waitcnt lgkmcnt(0)78; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v079; VI-NEXT: v_bfe_u32 v0, v0, 16, 1680; VI-NEXT: v_lshlrev_b32_e32 v0, 15, v081; VI-NEXT: v_lshlrev_b64 v[0:1], 2, v[0:1]82; VI-NEXT: v_mov_b32_e32 v2, s183; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v084; VI-NEXT: v_addc_u32_e32 v1, vcc, v2, v1, vcc85; VI-NEXT: flat_load_dword v2, v[0:1]86; VI-NEXT: v_mov_b32_e32 v0, s087; VI-NEXT: v_mov_b32_e32 v1, s188; VI-NEXT: s_waitcnt vmcnt(0)89; VI-NEXT: flat_store_dword v[0:1], v290; VI-NEXT: s_endpgm91;92; VI-SDWA-LABEL: bfe_combine16:93; VI-SDWA: ; %bb.0:94; VI-SDWA-NEXT: s_load_dword s2, s[4:5], 0x2c95; VI-SDWA-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2496; VI-SDWA-NEXT: v_mov_b32_e32 v1, 1597; VI-SDWA-NEXT: s_waitcnt lgkmcnt(0)98; VI-SDWA-NEXT: v_add_u32_e32 v0, vcc, s2, v099; VI-SDWA-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1100; VI-SDWA-NEXT: v_mov_b32_e32 v1, 0101; VI-SDWA-NEXT: v_lshlrev_b64 v[0:1], 2, v[0:1]102; VI-SDWA-NEXT: v_mov_b32_e32 v2, s1103; VI-SDWA-NEXT: v_add_u32_e32 v0, vcc, s0, v0104; VI-SDWA-NEXT: v_addc_u32_e32 v1, vcc, v2, v1, vcc105; VI-SDWA-NEXT: flat_load_dword v2, v[0:1]106; VI-SDWA-NEXT: v_mov_b32_e32 v0, s0107; VI-SDWA-NEXT: v_mov_b32_e32 v1, s1108; VI-SDWA-NEXT: s_waitcnt vmcnt(0)109; VI-SDWA-NEXT: flat_store_dword v[0:1], v2110; VI-SDWA-NEXT: s_endpgm111;112; CI-LABEL: bfe_combine16:113; CI: ; %bb.0:114; CI-NEXT: s_load_dword s2, s[4:5], 0xb115; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9116; CI-NEXT: v_mov_b32_e32 v1, 0117; CI-NEXT: s_mov_b32 s3, 0xf000118; CI-NEXT: s_mov_b32 s6, 0119; CI-NEXT: s_waitcnt lgkmcnt(0)120; CI-NEXT: v_add_i32_e32 v0, vcc, s2, v0121; CI-NEXT: v_lshrrev_b32_e32 v0, 1, v0122; CI-NEXT: v_and_b32_e32 v0, 0x7fff8000, v0123; CI-NEXT: v_lshl_b64 v[0:1], v[0:1], 2124; CI-NEXT: s_mov_b32 s7, s3125; CI-NEXT: s_mov_b64 s[4:5], s[0:1]126; CI-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64127; CI-NEXT: s_mov_b32 s2, -1128; CI-NEXT: s_waitcnt vmcnt(0)129; CI-NEXT: buffer_store_dword v0, off, s[0:3], 0130; CI-NEXT: s_endpgm131 %id = tail call i32 @llvm.amdgcn.workitem.id.x() #2132 %idx = add i32 %x, %id133 %srl = lshr i32 %idx, 1134 %and = and i32 %srl, 2147450880135 %ptr = getelementptr inbounds i32, ptr addrspace(1) %arg, i32 %and136 %val = load i32, ptr addrspace(1) %ptr, align 4137 store i32 %val, ptr addrspace(1) %arg, align 4138 ret void139}140 141declare i32 @llvm.amdgcn.workitem.id.x() #1142