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1; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=GCN %s2; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=GCN %s3 4; The bitcast should be pushed through the bitcasts so the vectors can5; be broken down and the shared components can be CSEd6 7; GCN-LABEL: {{^}}store_bitcast_constant_v8i32_to_v8f32:8; GCN: buffer_store_dwordx49; GCN: buffer_store_dwordx410; GCN-NOT: v_mov_b3211; GCN: buffer_store_dwordx412; GCN-NOT: v_mov_b3213; GCN: buffer_store_dwordx414define amdgpu_kernel void @store_bitcast_constant_v8i32_to_v8f32(ptr addrspace(1) %out, <8 x i32> %vec) {15 %vec0.bc = bitcast <8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 8> to <8 x float>16 store volatile <8 x float> %vec0.bc, ptr addrspace(1) %out17 18 %vec1.bc = bitcast <8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 9> to <8 x float>19 store volatile <8 x float> %vec1.bc, ptr addrspace(1) %out20 ret void21}22 23; GCN-LABEL: {{^}}store_bitcast_constant_v4i64_to_v8f32:24; GCN: buffer_store_dwordx425; GCN: buffer_store_dwordx426; GCN-NOT: v_mov_b3227; GCN: buffer_store_dwordx428; GCN-NOT: v_mov_b3229; GCN: buffer_store_dwordx430define amdgpu_kernel void @store_bitcast_constant_v4i64_to_v8f32(ptr addrspace(1) %out, <4 x i64> %vec) {31 %vec0.bc = bitcast <4 x i64> <i64 7, i64 7, i64 7, i64 8> to <8 x float>32 store volatile <8 x float> %vec0.bc, ptr addrspace(1) %out33 34 %vec1.bc = bitcast <4 x i64> <i64 7, i64 7, i64 7, i64 9> to <8 x float>35 store volatile <8 x float> %vec1.bc, ptr addrspace(1) %out36 ret void37}38 39; GCN-LABEL: {{^}}store_bitcast_constant_v4i64_to_v4f64:40; GCN: buffer_store_dwordx441; GCN: buffer_store_dwordx442; GCN-NOT: v_mov_b3243; GCN: buffer_store_dwordx444; GCN-NOT: v_mov_b3245; GCN: buffer_store_dwordx446define amdgpu_kernel void @store_bitcast_constant_v4i64_to_v4f64(ptr addrspace(1) %out, <4 x i64> %vec) {47 %vec0.bc = bitcast <4 x i64> <i64 7, i64 7, i64 7, i64 8> to <4 x double>48 store volatile <4 x double> %vec0.bc, ptr addrspace(1) %out49 50 %vec1.bc = bitcast <4 x i64> <i64 7, i64 7, i64 7, i64 9> to <4 x double>51 store volatile <4 x double> %vec1.bc, ptr addrspace(1) %out52 ret void53}54 55; GCN-LABEL: {{^}}store_bitcast_constant_v8i32_to_v16i16:56; GCN: buffer_store_dwordx457; GCN: buffer_store_dwordx458; GCN-NOT: v_mov_b3259; GCN: buffer_store_dwordx460; GCN-NOT: v_mov_b3261; GCN: buffer_store_dwordx462define amdgpu_kernel void @store_bitcast_constant_v8i32_to_v16i16(ptr addrspace(1) %out, <16 x i16> %vec) {63 %vec0.bc = bitcast <16 x i16> <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 8> to <8 x float>64 store volatile <8 x float> %vec0.bc, ptr addrspace(1) %out65 66 %vec1.bc = bitcast <16 x i16> <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 9> to <8 x float>67 store volatile <8 x float> %vec1.bc, ptr addrspace(1) %out68 ret void69}70 71; GCN-LABEL: {{^}}store_value_lowered_to_undef_bitcast_source:72; GCN-NOT: store_dword73define amdgpu_kernel void @store_value_lowered_to_undef_bitcast_source(ptr addrspace(1) %out, i64 %a, i64 %b) #0 {74 %undef = call i64 @llvm.amdgcn.icmp.i64(i64 %a, i64 %b, i32 999) #175 %bc = bitcast i64 %undef to <2 x i32>76 store <2 x i32> %bc, ptr addrspace(1) %out77 ret void78}79 80; GCN-LABEL: {{^}}store_value_lowered_to_undef_bitcast_source_extractelt:81; GCN-NOT: store_dword82define amdgpu_kernel void @store_value_lowered_to_undef_bitcast_source_extractelt(ptr addrspace(1) %out, i64 %a, i64 %b) #0 {83 %undef = call i64 @llvm.amdgcn.icmp.i64(i64 %a, i64 %b, i32 9999) #184 %bc = bitcast i64 %undef to <2 x i32>85 %elt1 = extractelement <2 x i32> %bc, i32 186 store i32 %elt1, ptr addrspace(1) %out87 ret void88}89 90declare i64 @llvm.amdgcn.icmp.i64(i64, i64, i32) #191 92attributes #0 = { nounwind }93attributes #1 = { nounwind readnone convergent }94