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1; RUN: llc -mtriple=amdgcn -mcpu=tahiti -amdgpu-s-branch-bits=5 < %s | FileCheck -check-prefix=GCN %s2 3; Restrict maximum branch to between +15 and -16 dwords4 5; Instructions inside a bundle were collectively counted as6; 0-bytes. Make sure this is accounted for when estimating branch7; distances8 9; Bundle used for address in call sequence: 20 bytes10; s_getpc_b6411; s_add_u3212; s_addc_u3213 14; plus additional overhead15; s_setpc_b6416; and some register copies17 18declare void @func() #019 20; GCN-LABEL: {{^}}bundle_size:21; GCN: s_cbranch_scc0 [[BB_EXPANSION:.LBB[0-9]+_[0-9]+]]22; GCN: s_getpc_b6423; GCN-NEXT: .Lpost_getpc{{[0-9]+}}:{{$}}24; GCN-NEXT: s_add_u3225; GCN-NEXT: s_addc_u3226; GCN-NEXT: s_setpc_b6427 28; GCN: {{^}}[[BB_EXPANSION]]:29; GCN: s_getpc_b6430; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, func@31; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, func@32; GCN: s_swappc_b6433define amdgpu_kernel void @bundle_size(ptr addrspace(1) %arg, i32 %cnd) #0 {34bb:35 %cmp = icmp eq i32 %cnd, 036 br i1 %cmp, label %bb3, label %bb2 ; +8 dword branch37 38bb2:39 call void @func()40 call void asm sideeffect41 "v_nop_e6442 v_nop_e6443 v_nop_e6444 v_nop_e6445 v_nop_e64", ""() #046 br label %bb347 48bb3:49 store volatile i32 %cnd, ptr addrspace(1) %arg50 ret void51}52 53attributes #0 = { nounwind }54attributes #1 = { nounwind readnone }55