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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=tahiti -amdgpu-s-branch-bits=5 -amdgpu-long-branch-factor=0 -o - %s | FileCheck %s3 4define amdgpu_kernel void @spill(ptr addrspace(1) %arg, i32 %cnd) #0 {5; CHECK-LABEL: spill:6; CHECK:       ; %bb.0: ; %entry7; CHECK-NEXT:    s_load_dword s27, s[8:9], 0x28; CHECK-NEXT:    s_mov_b64 s[98:99], s[2:3]9; CHECK-NEXT:    s_mov_b64 s[96:97], s[0:1]10; CHECK-NEXT:    s_add_u32 s96, s96, s1511; CHECK-NEXT:    s_addc_u32 s97, s97, 012; CHECK-NEXT:    s_waitcnt lgkmcnt(0)13; CHECK-NEXT:    s_cmp_eq_u32 s27, 014; CHECK-NEXT:    ;;#ASMSTART15; CHECK-NEXT:    s_mov_b32 s0, 016; CHECK-NEXT:    ;;#ASMEND17; CHECK-NEXT:    ;;#ASMSTART18; CHECK-NEXT:    s_mov_b32 s1, 019; CHECK-NEXT:    ;;#ASMEND20; CHECK-NEXT:    ;;#ASMSTART21; CHECK-NEXT:    s_mov_b32 s2, 022; CHECK-NEXT:    ;;#ASMEND23; CHECK-NEXT:    ;;#ASMSTART24; CHECK-NEXT:    s_mov_b32 s3, 025; CHECK-NEXT:    ;;#ASMEND26; CHECK-NEXT:    ;;#ASMSTART27; CHECK-NEXT:    s_mov_b32 s4, 028; CHECK-NEXT:    ;;#ASMEND29; CHECK-NEXT:    ;;#ASMSTART30; CHECK-NEXT:    s_mov_b32 s5, 031; CHECK-NEXT:    ;;#ASMEND32; CHECK-NEXT:    ;;#ASMSTART33; CHECK-NEXT:    s_mov_b32 s6, 034; CHECK-NEXT:    ;;#ASMEND35; CHECK-NEXT:    ;;#ASMSTART36; CHECK-NEXT:    s_mov_b32 s7, 037; CHECK-NEXT:    ;;#ASMEND38; CHECK-NEXT:    ;;#ASMSTART39; CHECK-NEXT:    s_mov_b32 s8, 040; CHECK-NEXT:    ;;#ASMEND41; CHECK-NEXT:    ;;#ASMSTART42; CHECK-NEXT:    s_mov_b32 s9, 043; CHECK-NEXT:    ;;#ASMEND44; CHECK-NEXT:    ;;#ASMSTART45; CHECK-NEXT:    s_mov_b32 s10, 046; CHECK-NEXT:    ;;#ASMEND47; CHECK-NEXT:    ;;#ASMSTART48; CHECK-NEXT:    s_mov_b32 s11, 049; CHECK-NEXT:    ;;#ASMEND50; CHECK-NEXT:    ;;#ASMSTART51; CHECK-NEXT:    s_mov_b32 s12, 052; CHECK-NEXT:    ;;#ASMEND53; CHECK-NEXT:    ;;#ASMSTART54; CHECK-NEXT:    s_mov_b32 s13, 055; CHECK-NEXT:    ;;#ASMEND56; CHECK-NEXT:    ;;#ASMSTART57; CHECK-NEXT:    s_mov_b32 s14, 058; CHECK-NEXT:    ;;#ASMEND59; CHECK-NEXT:    ;;#ASMSTART60; CHECK-NEXT:    s_mov_b32 s15, 061; CHECK-NEXT:    ;;#ASMEND62; CHECK-NEXT:    ;;#ASMSTART63; CHECK-NEXT:    s_mov_b32 s16, 064; CHECK-NEXT:    ;;#ASMEND65; CHECK-NEXT:    ;;#ASMSTART66; CHECK-NEXT:    s_mov_b32 s17, 067; CHECK-NEXT:    ;;#ASMEND68; CHECK-NEXT:    ;;#ASMSTART69; CHECK-NEXT:    s_mov_b32 s18, 070; CHECK-NEXT:    ;;#ASMEND71; CHECK-NEXT:    ;;#ASMSTART72; CHECK-NEXT:    s_mov_b32 s19, 073; CHECK-NEXT:    ;;#ASMEND74; CHECK-NEXT:    ;;#ASMSTART75; CHECK-NEXT:    s_mov_b32 s20, 076; CHECK-NEXT:    ;;#ASMEND77; CHECK-NEXT:    ;;#ASMSTART78; CHECK-NEXT:    s_mov_b32 s21, 079; CHECK-NEXT:    ;;#ASMEND80; CHECK-NEXT:    ;;#ASMSTART81; CHECK-NEXT:    s_mov_b32 s22, 082; CHECK-NEXT:    ;;#ASMEND83; CHECK-NEXT:    ;;#ASMSTART84; CHECK-NEXT:    s_mov_b32 s23, 085; CHECK-NEXT:    ;;#ASMEND86; CHECK-NEXT:    ;;#ASMSTART87; CHECK-NEXT:    s_mov_b32 s24, 088; CHECK-NEXT:    ;;#ASMEND89; CHECK-NEXT:    ;;#ASMSTART90; CHECK-NEXT:    s_mov_b32 s25, 091; CHECK-NEXT:    ;;#ASMEND92; CHECK-NEXT:    ;;#ASMSTART93; CHECK-NEXT:    s_mov_b32 s26, 094; CHECK-NEXT:    ;;#ASMEND95; CHECK-NEXT:    ;;#ASMSTART96; CHECK-NEXT:    s_mov_b32 s27, 097; CHECK-NEXT:    ;;#ASMEND98; CHECK-NEXT:    ;;#ASMSTART99; CHECK-NEXT:    s_mov_b32 s28, 0100; CHECK-NEXT:    ;;#ASMEND101; CHECK-NEXT:    ;;#ASMSTART102; CHECK-NEXT:    s_mov_b32 s29, 0103; CHECK-NEXT:    ;;#ASMEND104; CHECK-NEXT:    ;;#ASMSTART105; CHECK-NEXT:    s_mov_b32 s30, 0106; CHECK-NEXT:    ;;#ASMEND107; CHECK-NEXT:    ;;#ASMSTART108; CHECK-NEXT:    s_mov_b32 s31, 0109; CHECK-NEXT:    ;;#ASMEND110; CHECK-NEXT:    ;;#ASMSTART111; CHECK-NEXT:    s_mov_b32 s32, 0112; CHECK-NEXT:    ;;#ASMEND113; CHECK-NEXT:    ;;#ASMSTART114; CHECK-NEXT:    s_mov_b32 s33, 0115; CHECK-NEXT:    ;;#ASMEND116; CHECK-NEXT:    ;;#ASMSTART117; CHECK-NEXT:    s_mov_b32 s34, 0118; CHECK-NEXT:    ;;#ASMEND119; CHECK-NEXT:    ;;#ASMSTART120; CHECK-NEXT:    s_mov_b32 s35, 0121; CHECK-NEXT:    ;;#ASMEND122; CHECK-NEXT:    ;;#ASMSTART123; CHECK-NEXT:    s_mov_b32 s36, 0124; CHECK-NEXT:    ;;#ASMEND125; CHECK-NEXT:    ;;#ASMSTART126; CHECK-NEXT:    s_mov_b32 s37, 0127; CHECK-NEXT:    ;;#ASMEND128; CHECK-NEXT:    ;;#ASMSTART129; CHECK-NEXT:    s_mov_b32 s38, 0130; CHECK-NEXT:    ;;#ASMEND131; CHECK-NEXT:    ;;#ASMSTART132; CHECK-NEXT:    s_mov_b32 s39, 0133; CHECK-NEXT:    ;;#ASMEND134; CHECK-NEXT:    ;;#ASMSTART135; CHECK-NEXT:    s_mov_b32 s40, 0136; CHECK-NEXT:    ;;#ASMEND137; CHECK-NEXT:    ;;#ASMSTART138; CHECK-NEXT:    s_mov_b32 s41, 0139; CHECK-NEXT:    ;;#ASMEND140; CHECK-NEXT:    ;;#ASMSTART141; CHECK-NEXT:    s_mov_b32 s42, 0142; CHECK-NEXT:    ;;#ASMEND143; CHECK-NEXT:    ;;#ASMSTART144; CHECK-NEXT:    s_mov_b32 s43, 0145; CHECK-NEXT:    ;;#ASMEND146; CHECK-NEXT:    ;;#ASMSTART147; CHECK-NEXT:    s_mov_b32 s44, 0148; CHECK-NEXT:    ;;#ASMEND149; CHECK-NEXT:    ;;#ASMSTART150; CHECK-NEXT:    s_mov_b32 s45, 0151; CHECK-NEXT:    ;;#ASMEND152; CHECK-NEXT:    ;;#ASMSTART153; CHECK-NEXT:    s_mov_b32 s46, 0154; CHECK-NEXT:    ;;#ASMEND155; CHECK-NEXT:    ;;#ASMSTART156; CHECK-NEXT:    s_mov_b32 s47, 0157; CHECK-NEXT:    ;;#ASMEND158; CHECK-NEXT:    ;;#ASMSTART159; CHECK-NEXT:    s_mov_b32 s48, 0160; CHECK-NEXT:    ;;#ASMEND161; CHECK-NEXT:    ;;#ASMSTART162; CHECK-NEXT:    s_mov_b32 s49, 0163; CHECK-NEXT:    ;;#ASMEND164; CHECK-NEXT:    ;;#ASMSTART165; CHECK-NEXT:    s_mov_b32 s50, 0166; CHECK-NEXT:    ;;#ASMEND167; CHECK-NEXT:    ;;#ASMSTART168; CHECK-NEXT:    s_mov_b32 s51, 0169; CHECK-NEXT:    ;;#ASMEND170; CHECK-NEXT:    ;;#ASMSTART171; CHECK-NEXT:    s_mov_b32 s52, 0172; CHECK-NEXT:    ;;#ASMEND173; CHECK-NEXT:    ;;#ASMSTART174; CHECK-NEXT:    s_mov_b32 s53, 0175; CHECK-NEXT:    ;;#ASMEND176; CHECK-NEXT:    ;;#ASMSTART177; CHECK-NEXT:    s_mov_b32 s54, 0178; CHECK-NEXT:    ;;#ASMEND179; CHECK-NEXT:    ;;#ASMSTART180; CHECK-NEXT:    s_mov_b32 s55, 0181; CHECK-NEXT:    ;;#ASMEND182; CHECK-NEXT:    ;;#ASMSTART183; CHECK-NEXT:    s_mov_b32 s56, 0184; CHECK-NEXT:    ;;#ASMEND185; CHECK-NEXT:    ;;#ASMSTART186; CHECK-NEXT:    s_mov_b32 s57, 0187; CHECK-NEXT:    ;;#ASMEND188; CHECK-NEXT:    ;;#ASMSTART189; CHECK-NEXT:    s_mov_b32 s58, 0190; CHECK-NEXT:    ;;#ASMEND191; CHECK-NEXT:    ;;#ASMSTART192; CHECK-NEXT:    s_mov_b32 s59, 0193; CHECK-NEXT:    ;;#ASMEND194; CHECK-NEXT:    ;;#ASMSTART195; CHECK-NEXT:    s_mov_b32 s60, 0196; CHECK-NEXT:    ;;#ASMEND197; CHECK-NEXT:    ;;#ASMSTART198; CHECK-NEXT:    s_mov_b32 s61, 0199; CHECK-NEXT:    ;;#ASMEND200; CHECK-NEXT:    ;;#ASMSTART201; CHECK-NEXT:    s_mov_b32 s62, 0202; CHECK-NEXT:    ;;#ASMEND203; CHECK-NEXT:    ;;#ASMSTART204; CHECK-NEXT:    s_mov_b32 s63, 0205; CHECK-NEXT:    ;;#ASMEND206; CHECK-NEXT:    ;;#ASMSTART207; CHECK-NEXT:    s_mov_b32 s64, 0208; CHECK-NEXT:    ;;#ASMEND209; CHECK-NEXT:    ;;#ASMSTART210; CHECK-NEXT:    s_mov_b32 s65, 0211; CHECK-NEXT:    ;;#ASMEND212; CHECK-NEXT:    ;;#ASMSTART213; CHECK-NEXT:    s_mov_b32 s66, 0214; CHECK-NEXT:    ;;#ASMEND215; CHECK-NEXT:    ;;#ASMSTART216; CHECK-NEXT:    s_mov_b32 s67, 0217; CHECK-NEXT:    ;;#ASMEND218; CHECK-NEXT:    ;;#ASMSTART219; CHECK-NEXT:    s_mov_b32 s68, 0220; CHECK-NEXT:    ;;#ASMEND221; CHECK-NEXT:    ;;#ASMSTART222; CHECK-NEXT:    s_mov_b32 s69, 0223; CHECK-NEXT:    ;;#ASMEND224; CHECK-NEXT:    ;;#ASMSTART225; CHECK-NEXT:    s_mov_b32 s70, 0226; CHECK-NEXT:    ;;#ASMEND227; CHECK-NEXT:    ;;#ASMSTART228; CHECK-NEXT:    s_mov_b32 s71, 0229; CHECK-NEXT:    ;;#ASMEND230; CHECK-NEXT:    ;;#ASMSTART231; CHECK-NEXT:    s_mov_b32 s72, 0232; CHECK-NEXT:    ;;#ASMEND233; CHECK-NEXT:    ;;#ASMSTART234; CHECK-NEXT:    s_mov_b32 s73, 0235; CHECK-NEXT:    ;;#ASMEND236; CHECK-NEXT:    ;;#ASMSTART237; CHECK-NEXT:    s_mov_b32 s74, 0238; CHECK-NEXT:    ;;#ASMEND239; CHECK-NEXT:    ;;#ASMSTART240; CHECK-NEXT:    s_mov_b32 s75, 0241; CHECK-NEXT:    ;;#ASMEND242; CHECK-NEXT:    ;;#ASMSTART243; CHECK-NEXT:    s_mov_b32 s76, 0244; CHECK-NEXT:    ;;#ASMEND245; CHECK-NEXT:    ;;#ASMSTART246; CHECK-NEXT:    s_mov_b32 s77, 0247; CHECK-NEXT:    ;;#ASMEND248; CHECK-NEXT:    ;;#ASMSTART249; CHECK-NEXT:    s_mov_b32 s78, 0250; CHECK-NEXT:    ;;#ASMEND251; CHECK-NEXT:    ;;#ASMSTART252; CHECK-NEXT:    s_mov_b32 s79, 0253; CHECK-NEXT:    ;;#ASMEND254; CHECK-NEXT:    ;;#ASMSTART255; CHECK-NEXT:    s_mov_b32 s80, 0256; CHECK-NEXT:    ;;#ASMEND257; CHECK-NEXT:    ;;#ASMSTART258; CHECK-NEXT:    s_mov_b32 s81, 0259; CHECK-NEXT:    ;;#ASMEND260; CHECK-NEXT:    ;;#ASMSTART261; CHECK-NEXT:    s_mov_b32 s82, 0262; CHECK-NEXT:    ;;#ASMEND263; CHECK-NEXT:    ;;#ASMSTART264; CHECK-NEXT:    s_mov_b32 s83, 0265; CHECK-NEXT:    ;;#ASMEND266; CHECK-NEXT:    ;;#ASMSTART267; CHECK-NEXT:    s_mov_b32 s84, 0268; CHECK-NEXT:    ;;#ASMEND269; CHECK-NEXT:    ;;#ASMSTART270; CHECK-NEXT:    s_mov_b32 s85, 0271; CHECK-NEXT:    ;;#ASMEND272; CHECK-NEXT:    ;;#ASMSTART273; CHECK-NEXT:    s_mov_b32 s86, 0274; CHECK-NEXT:    ;;#ASMEND275; CHECK-NEXT:    ;;#ASMSTART276; CHECK-NEXT:    s_mov_b32 s87, 0277; CHECK-NEXT:    ;;#ASMEND278; CHECK-NEXT:    ;;#ASMSTART279; CHECK-NEXT:    s_mov_b32 s88, 0280; CHECK-NEXT:    ;;#ASMEND281; CHECK-NEXT:    ;;#ASMSTART282; CHECK-NEXT:    s_mov_b32 s89, 0283; CHECK-NEXT:    ;;#ASMEND284; CHECK-NEXT:    ;;#ASMSTART285; CHECK-NEXT:    s_mov_b32 s90, 0286; CHECK-NEXT:    ;;#ASMEND287; CHECK-NEXT:    ;;#ASMSTART288; CHECK-NEXT:    s_mov_b32 s91, 0289; CHECK-NEXT:    ;;#ASMEND290; CHECK-NEXT:    ;;#ASMSTART291; CHECK-NEXT:    s_mov_b32 s92, 0292; CHECK-NEXT:    ;;#ASMEND293; CHECK-NEXT:    ;;#ASMSTART294; CHECK-NEXT:    s_mov_b32 s93, 0295; CHECK-NEXT:    ;;#ASMEND296; CHECK-NEXT:    ;;#ASMSTART297; CHECK-NEXT:    s_mov_b32 s94, 0298; CHECK-NEXT:    ;;#ASMEND299; CHECK-NEXT:    ;;#ASMSTART300; CHECK-NEXT:    s_mov_b32 s95, 0301; CHECK-NEXT:    ;;#ASMEND302; CHECK-NEXT:    ;;#ASMSTART303; CHECK-NEXT:    s_mov_b32 s96, 0304; CHECK-NEXT:    ;;#ASMEND305; CHECK-NEXT:    ;;#ASMSTART306; CHECK-NEXT:    s_mov_b32 s97, 0307; CHECK-NEXT:    ;;#ASMEND308; CHECK-NEXT:    ;;#ASMSTART309; CHECK-NEXT:    s_mov_b32 s98, 0310; CHECK-NEXT:    ;;#ASMEND311; CHECK-NEXT:    ;;#ASMSTART312; CHECK-NEXT:    s_mov_b32 s99, 0313; CHECK-NEXT:    ;;#ASMEND314; CHECK-NEXT:    ;;#ASMSTART315; CHECK-NEXT:    s_mov_b32 s100, 0316; CHECK-NEXT:    ;;#ASMEND317; CHECK-NEXT:    ;;#ASMSTART318; CHECK-NEXT:    s_mov_b32 s101, 0319; CHECK-NEXT:    ;;#ASMEND320; CHECK-NEXT:    ;;#ASMSTART321; CHECK-NEXT:    s_mov_b32 vcc_lo, 0322; CHECK-NEXT:    ;;#ASMEND323; CHECK-NEXT:    ;;#ASMSTART324; CHECK-NEXT:    s_mov_b32 vcc_hi, 0325; CHECK-NEXT:    ;;#ASMEND326; CHECK-NEXT:    s_cbranch_scc0 .LBB0_1327; CHECK-NEXT:  ; %bb.3: ; %entry328; CHECK-NEXT:    s_not_b64 exec, exec329; CHECK-NEXT:    buffer_store_dword v0, off, s[96:99], 0330; CHECK-NEXT:    v_writelane_b32 v0, s0, 0331; CHECK-NEXT:    v_writelane_b32 v0, s1, 1332; CHECK-NEXT:    s_getpc_b64 s[0:1]333; CHECK-NEXT:  .Lpost_getpc0:334; CHECK-NEXT:    s_add_u32 s0, s0, (.LBB0_4-.Lpost_getpc0)&4294967295335; CHECK-NEXT:    s_addc_u32 s1, s1, (.LBB0_4-.Lpost_getpc0)>>32336; CHECK-NEXT:    s_setpc_b64 s[0:1]337; CHECK-NEXT:  .LBB0_1: ; %bb2338; CHECK-NEXT:    ;;#ASMSTART339; CHECK-NEXT:    v_nop_e64340; CHECK-NEXT:    v_nop_e64341; CHECK-NEXT:    v_nop_e64342; CHECK-NEXT:    v_nop_e64343; CHECK-NEXT:    v_nop_e64344; CHECK-NEXT:    v_nop_e64345; CHECK-NEXT:    v_nop_e64346; CHECK-NEXT:    v_nop_e64347; CHECK-NEXT:    ;;#ASMEND348; CHECK-NEXT:    s_branch .LBB0_2349; CHECK-NEXT:  .LBB0_4: ; %bb3350; CHECK-NEXT:    v_readlane_b32 s0, v0, 0351; CHECK-NEXT:    v_readlane_b32 s1, v0, 1352; CHECK-NEXT:    buffer_load_dword v0, off, s[96:99], 0353; CHECK-NEXT:    s_not_b64 exec, exec354; CHECK-NEXT:  .LBB0_2: ; %bb3355; CHECK-NEXT:    ;;#ASMSTART356; CHECK-NEXT:    ; reg use s0357; CHECK-NEXT:    ;;#ASMEND358; CHECK-NEXT:    ;;#ASMSTART359; CHECK-NEXT:    ; reg use s1360; CHECK-NEXT:    ;;#ASMEND361; CHECK-NEXT:    ;;#ASMSTART362; CHECK-NEXT:    ; reg use s2363; CHECK-NEXT:    ;;#ASMEND364; CHECK-NEXT:    ;;#ASMSTART365; CHECK-NEXT:    ; reg use s3366; CHECK-NEXT:    ;;#ASMEND367; CHECK-NEXT:    ;;#ASMSTART368; CHECK-NEXT:    ; reg use s4369; CHECK-NEXT:    ;;#ASMEND370; CHECK-NEXT:    ;;#ASMSTART371; CHECK-NEXT:    ; reg use s5372; CHECK-NEXT:    ;;#ASMEND373; CHECK-NEXT:    ;;#ASMSTART374; CHECK-NEXT:    ; reg use s6375; CHECK-NEXT:    ;;#ASMEND376; CHECK-NEXT:    ;;#ASMSTART377; CHECK-NEXT:    ; reg use s7378; CHECK-NEXT:    ;;#ASMEND379; CHECK-NEXT:    ;;#ASMSTART380; CHECK-NEXT:    ; reg use s8381; CHECK-NEXT:    ;;#ASMEND382; CHECK-NEXT:    ;;#ASMSTART383; CHECK-NEXT:    ; reg use s9384; CHECK-NEXT:    ;;#ASMEND385; CHECK-NEXT:    ;;#ASMSTART386; CHECK-NEXT:    ; reg use s10387; CHECK-NEXT:    ;;#ASMEND388; CHECK-NEXT:    ;;#ASMSTART389; CHECK-NEXT:    ; reg use s11390; CHECK-NEXT:    ;;#ASMEND391; CHECK-NEXT:    ;;#ASMSTART392; CHECK-NEXT:    ; reg use s12393; CHECK-NEXT:    ;;#ASMEND394; CHECK-NEXT:    ;;#ASMSTART395; CHECK-NEXT:    ; reg use s13396; CHECK-NEXT:    ;;#ASMEND397; CHECK-NEXT:    ;;#ASMSTART398; CHECK-NEXT:    ; reg use s14399; CHECK-NEXT:    ;;#ASMEND400; CHECK-NEXT:    ;;#ASMSTART401; CHECK-NEXT:    ; reg use s15402; CHECK-NEXT:    ;;#ASMEND403; CHECK-NEXT:    ;;#ASMSTART404; CHECK-NEXT:    ; reg use s16405; CHECK-NEXT:    ;;#ASMEND406; CHECK-NEXT:    ;;#ASMSTART407; CHECK-NEXT:    ; reg use s17408; CHECK-NEXT:    ;;#ASMEND409; CHECK-NEXT:    ;;#ASMSTART410; CHECK-NEXT:    ; reg use s18411; CHECK-NEXT:    ;;#ASMEND412; CHECK-NEXT:    ;;#ASMSTART413; CHECK-NEXT:    ; reg use s19414; CHECK-NEXT:    ;;#ASMEND415; CHECK-NEXT:    ;;#ASMSTART416; CHECK-NEXT:    ; reg use s20417; CHECK-NEXT:    ;;#ASMEND418; CHECK-NEXT:    ;;#ASMSTART419; CHECK-NEXT:    ; reg use s21420; CHECK-NEXT:    ;;#ASMEND421; CHECK-NEXT:    ;;#ASMSTART422; CHECK-NEXT:    ; reg use s22423; CHECK-NEXT:    ;;#ASMEND424; CHECK-NEXT:    ;;#ASMSTART425; CHECK-NEXT:    ; reg use s23426; CHECK-NEXT:    ;;#ASMEND427; CHECK-NEXT:    ;;#ASMSTART428; CHECK-NEXT:    ; reg use s24429; CHECK-NEXT:    ;;#ASMEND430; CHECK-NEXT:    ;;#ASMSTART431; CHECK-NEXT:    ; reg use s25432; CHECK-NEXT:    ;;#ASMEND433; CHECK-NEXT:    ;;#ASMSTART434; CHECK-NEXT:    ; reg use s26435; CHECK-NEXT:    ;;#ASMEND436; CHECK-NEXT:    ;;#ASMSTART437; CHECK-NEXT:    ; reg use s27438; CHECK-NEXT:    ;;#ASMEND439; CHECK-NEXT:    ;;#ASMSTART440; CHECK-NEXT:    ; reg use s28441; CHECK-NEXT:    ;;#ASMEND442; CHECK-NEXT:    ;;#ASMSTART443; CHECK-NEXT:    ; reg use s29444; CHECK-NEXT:    ;;#ASMEND445; CHECK-NEXT:    ;;#ASMSTART446; CHECK-NEXT:    ; reg use s30447; CHECK-NEXT:    ;;#ASMEND448; CHECK-NEXT:    ;;#ASMSTART449; CHECK-NEXT:    ; reg use s31450; CHECK-NEXT:    ;;#ASMEND451; CHECK-NEXT:    ;;#ASMSTART452; CHECK-NEXT:    ; reg use s32453; CHECK-NEXT:    ;;#ASMEND454; CHECK-NEXT:    ;;#ASMSTART455; CHECK-NEXT:    ; reg use s33456; CHECK-NEXT:    ;;#ASMEND457; CHECK-NEXT:    ;;#ASMSTART458; CHECK-NEXT:    ; reg use s34459; CHECK-NEXT:    ;;#ASMEND460; CHECK-NEXT:    ;;#ASMSTART461; CHECK-NEXT:    ; reg use s35462; CHECK-NEXT:    ;;#ASMEND463; CHECK-NEXT:    ;;#ASMSTART464; CHECK-NEXT:    ; reg use s36465; CHECK-NEXT:    ;;#ASMEND466; CHECK-NEXT:    ;;#ASMSTART467; CHECK-NEXT:    ; reg use s37468; CHECK-NEXT:    ;;#ASMEND469; CHECK-NEXT:    ;;#ASMSTART470; CHECK-NEXT:    ; reg use s38471; CHECK-NEXT:    ;;#ASMEND472; CHECK-NEXT:    ;;#ASMSTART473; CHECK-NEXT:    ; reg use s39474; CHECK-NEXT:    ;;#ASMEND475; CHECK-NEXT:    ;;#ASMSTART476; CHECK-NEXT:    ; reg use s40477; CHECK-NEXT:    ;;#ASMEND478; CHECK-NEXT:    ;;#ASMSTART479; CHECK-NEXT:    ; reg use s41480; CHECK-NEXT:    ;;#ASMEND481; CHECK-NEXT:    ;;#ASMSTART482; CHECK-NEXT:    ; reg use s42483; CHECK-NEXT:    ;;#ASMEND484; CHECK-NEXT:    ;;#ASMSTART485; CHECK-NEXT:    ; reg use s43486; CHECK-NEXT:    ;;#ASMEND487; CHECK-NEXT:    ;;#ASMSTART488; CHECK-NEXT:    ; reg use s44489; CHECK-NEXT:    ;;#ASMEND490; CHECK-NEXT:    ;;#ASMSTART491; CHECK-NEXT:    ; reg use s45492; CHECK-NEXT:    ;;#ASMEND493; CHECK-NEXT:    ;;#ASMSTART494; CHECK-NEXT:    ; reg use s46495; CHECK-NEXT:    ;;#ASMEND496; CHECK-NEXT:    ;;#ASMSTART497; CHECK-NEXT:    ; reg use s47498; CHECK-NEXT:    ;;#ASMEND499; CHECK-NEXT:    ;;#ASMSTART500; CHECK-NEXT:    ; reg use s48501; CHECK-NEXT:    ;;#ASMEND502; CHECK-NEXT:    ;;#ASMSTART503; CHECK-NEXT:    ; reg use s49504; CHECK-NEXT:    ;;#ASMEND505; CHECK-NEXT:    ;;#ASMSTART506; CHECK-NEXT:    ; reg use s50507; CHECK-NEXT:    ;;#ASMEND508; CHECK-NEXT:    ;;#ASMSTART509; CHECK-NEXT:    ; reg use s51510; CHECK-NEXT:    ;;#ASMEND511; CHECK-NEXT:    ;;#ASMSTART512; CHECK-NEXT:    ; reg use s52513; CHECK-NEXT:    ;;#ASMEND514; CHECK-NEXT:    ;;#ASMSTART515; CHECK-NEXT:    ; reg use s53516; CHECK-NEXT:    ;;#ASMEND517; CHECK-NEXT:    ;;#ASMSTART518; CHECK-NEXT:    ; reg use s54519; CHECK-NEXT:    ;;#ASMEND520; CHECK-NEXT:    ;;#ASMSTART521; CHECK-NEXT:    ; reg use s55522; CHECK-NEXT:    ;;#ASMEND523; CHECK-NEXT:    ;;#ASMSTART524; CHECK-NEXT:    ; reg use s56525; CHECK-NEXT:    ;;#ASMEND526; CHECK-NEXT:    ;;#ASMSTART527; CHECK-NEXT:    ; reg use s57528; CHECK-NEXT:    ;;#ASMEND529; CHECK-NEXT:    ;;#ASMSTART530; CHECK-NEXT:    ; reg use s58531; CHECK-NEXT:    ;;#ASMEND532; CHECK-NEXT:    ;;#ASMSTART533; CHECK-NEXT:    ; reg use s59534; CHECK-NEXT:    ;;#ASMEND535; CHECK-NEXT:    ;;#ASMSTART536; CHECK-NEXT:    ; reg use s60537; CHECK-NEXT:    ;;#ASMEND538; CHECK-NEXT:    ;;#ASMSTART539; CHECK-NEXT:    ; reg use s61540; CHECK-NEXT:    ;;#ASMEND541; CHECK-NEXT:    ;;#ASMSTART542; CHECK-NEXT:    ; reg use s62543; CHECK-NEXT:    ;;#ASMEND544; CHECK-NEXT:    ;;#ASMSTART545; CHECK-NEXT:    ; reg use s63546; CHECK-NEXT:    ;;#ASMEND547; CHECK-NEXT:    ;;#ASMSTART548; CHECK-NEXT:    ; reg use s64549; CHECK-NEXT:    ;;#ASMEND550; CHECK-NEXT:    ;;#ASMSTART551; CHECK-NEXT:    ; reg use s65552; CHECK-NEXT:    ;;#ASMEND553; CHECK-NEXT:    ;;#ASMSTART554; CHECK-NEXT:    ; reg use s66555; CHECK-NEXT:    ;;#ASMEND556; CHECK-NEXT:    ;;#ASMSTART557; CHECK-NEXT:    ; reg use s67558; CHECK-NEXT:    ;;#ASMEND559; CHECK-NEXT:    ;;#ASMSTART560; CHECK-NEXT:    ; reg use s68561; CHECK-NEXT:    ;;#ASMEND562; CHECK-NEXT:    ;;#ASMSTART563; CHECK-NEXT:    ; reg use s69564; CHECK-NEXT:    ;;#ASMEND565; CHECK-NEXT:    ;;#ASMSTART566; CHECK-NEXT:    ; reg use s70567; CHECK-NEXT:    ;;#ASMEND568; CHECK-NEXT:    ;;#ASMSTART569; CHECK-NEXT:    ; reg use s71570; CHECK-NEXT:    ;;#ASMEND571; CHECK-NEXT:    ;;#ASMSTART572; CHECK-NEXT:    ; reg use s72573; CHECK-NEXT:    ;;#ASMEND574; CHECK-NEXT:    ;;#ASMSTART575; CHECK-NEXT:    ; reg use s73576; CHECK-NEXT:    ;;#ASMEND577; CHECK-NEXT:    ;;#ASMSTART578; CHECK-NEXT:    ; reg use s74579; CHECK-NEXT:    ;;#ASMEND580; CHECK-NEXT:    ;;#ASMSTART581; CHECK-NEXT:    ; reg use s75582; CHECK-NEXT:    ;;#ASMEND583; CHECK-NEXT:    ;;#ASMSTART584; CHECK-NEXT:    ; reg use s76585; CHECK-NEXT:    ;;#ASMEND586; CHECK-NEXT:    ;;#ASMSTART587; CHECK-NEXT:    ; reg use s77588; CHECK-NEXT:    ;;#ASMEND589; CHECK-NEXT:    ;;#ASMSTART590; CHECK-NEXT:    ; reg use s78591; CHECK-NEXT:    ;;#ASMEND592; CHECK-NEXT:    ;;#ASMSTART593; CHECK-NEXT:    ; reg use s79594; CHECK-NEXT:    ;;#ASMEND595; CHECK-NEXT:    ;;#ASMSTART596; CHECK-NEXT:    ; reg use s80597; CHECK-NEXT:    ;;#ASMEND598; CHECK-NEXT:    ;;#ASMSTART599; CHECK-NEXT:    ; reg use s81600; CHECK-NEXT:    ;;#ASMEND601; CHECK-NEXT:    ;;#ASMSTART602; CHECK-NEXT:    ; reg use s82603; CHECK-NEXT:    ;;#ASMEND604; CHECK-NEXT:    ;;#ASMSTART605; CHECK-NEXT:    ; reg use s83606; CHECK-NEXT:    ;;#ASMEND607; CHECK-NEXT:    ;;#ASMSTART608; CHECK-NEXT:    ; reg use s84609; CHECK-NEXT:    ;;#ASMEND610; CHECK-NEXT:    ;;#ASMSTART611; CHECK-NEXT:    ; reg use s85612; CHECK-NEXT:    ;;#ASMEND613; CHECK-NEXT:    ;;#ASMSTART614; CHECK-NEXT:    ; reg use s86615; CHECK-NEXT:    ;;#ASMEND616; CHECK-NEXT:    ;;#ASMSTART617; CHECK-NEXT:    ; reg use s87618; CHECK-NEXT:    ;;#ASMEND619; CHECK-NEXT:    ;;#ASMSTART620; CHECK-NEXT:    ; reg use s88621; CHECK-NEXT:    ;;#ASMEND622; CHECK-NEXT:    ;;#ASMSTART623; CHECK-NEXT:    ; reg use s89624; CHECK-NEXT:    ;;#ASMEND625; CHECK-NEXT:    ;;#ASMSTART626; CHECK-NEXT:    ; reg use s90627; CHECK-NEXT:    ;;#ASMEND628; CHECK-NEXT:    ;;#ASMSTART629; CHECK-NEXT:    ; reg use s91630; CHECK-NEXT:    ;;#ASMEND631; CHECK-NEXT:    ;;#ASMSTART632; CHECK-NEXT:    ; reg use s92633; CHECK-NEXT:    ;;#ASMEND634; CHECK-NEXT:    ;;#ASMSTART635; CHECK-NEXT:    ; reg use s93636; CHECK-NEXT:    ;;#ASMEND637; CHECK-NEXT:    ;;#ASMSTART638; CHECK-NEXT:    ; reg use s94639; CHECK-NEXT:    ;;#ASMEND640; CHECK-NEXT:    ;;#ASMSTART641; CHECK-NEXT:    ; reg use s95642; CHECK-NEXT:    ;;#ASMEND643; CHECK-NEXT:    ;;#ASMSTART644; CHECK-NEXT:    ; reg use s96645; CHECK-NEXT:    ;;#ASMEND646; CHECK-NEXT:    ;;#ASMSTART647; CHECK-NEXT:    ; reg use s97648; CHECK-NEXT:    ;;#ASMEND649; CHECK-NEXT:    ;;#ASMSTART650; CHECK-NEXT:    ; reg use s98651; CHECK-NEXT:    ;;#ASMEND652; CHECK-NEXT:    ;;#ASMSTART653; CHECK-NEXT:    ; reg use s99654; CHECK-NEXT:    ;;#ASMEND655; CHECK-NEXT:    ;;#ASMSTART656; CHECK-NEXT:    ; reg use s100657; CHECK-NEXT:    ;;#ASMEND658; CHECK-NEXT:    ;;#ASMSTART659; CHECK-NEXT:    ; reg use s101660; CHECK-NEXT:    ;;#ASMEND661; CHECK-NEXT:    ;;#ASMSTART662; CHECK-NEXT:    ; reg use vcc_lo663; CHECK-NEXT:    ;;#ASMEND664; CHECK-NEXT:    ;;#ASMSTART665; CHECK-NEXT:    ; reg use vcc_hi666; CHECK-NEXT:    ;;#ASMEND667; CHECK-NEXT:    s_endpgm668entry:669  %sgpr0 = tail call i32 asm sideeffect "s_mov_b32 s0, 0", "={s0}"() #0670  %sgpr1 = tail call i32 asm sideeffect "s_mov_b32 s1, 0", "={s1}"() #0671  %sgpr2 = tail call i32 asm sideeffect "s_mov_b32 s2, 0", "={s2}"() #0672  %sgpr3 = tail call i32 asm sideeffect "s_mov_b32 s3, 0", "={s3}"() #0673  %sgpr4 = tail call i32 asm sideeffect "s_mov_b32 s4, 0", "={s4}"() #0674  %sgpr5 = tail call i32 asm sideeffect "s_mov_b32 s5, 0", "={s5}"() #0675  %sgpr6 = tail call i32 asm sideeffect "s_mov_b32 s6, 0", "={s6}"() #0676  %sgpr7 = tail call i32 asm sideeffect "s_mov_b32 s7, 0", "={s7}"() #0677  %sgpr8 = tail call i32 asm sideeffect "s_mov_b32 s8, 0", "={s8}"() #0678  %sgpr9 = tail call i32 asm sideeffect "s_mov_b32 s9, 0", "={s9}"() #0679  %sgpr10 = tail call i32 asm sideeffect "s_mov_b32 s10, 0", "={s10}"() #0680  %sgpr11 = tail call i32 asm sideeffect "s_mov_b32 s11, 0", "={s11}"() #0681  %sgpr12 = tail call i32 asm sideeffect "s_mov_b32 s12, 0", "={s12}"() #0682  %sgpr13 = tail call i32 asm sideeffect "s_mov_b32 s13, 0", "={s13}"() #0683  %sgpr14 = tail call i32 asm sideeffect "s_mov_b32 s14, 0", "={s14}"() #0684  %sgpr15 = tail call i32 asm sideeffect "s_mov_b32 s15, 0", "={s15}"() #0685  %sgpr16 = tail call i32 asm sideeffect "s_mov_b32 s16, 0", "={s16}"() #0686  %sgpr17 = tail call i32 asm sideeffect "s_mov_b32 s17, 0", "={s17}"() #0687  %sgpr18 = tail call i32 asm sideeffect "s_mov_b32 s18, 0", "={s18}"() #0688  %sgpr19 = tail call i32 asm sideeffect "s_mov_b32 s19, 0", "={s19}"() #0689  %sgpr20 = tail call i32 asm sideeffect "s_mov_b32 s20, 0", "={s20}"() #0690  %sgpr21 = tail call i32 asm sideeffect "s_mov_b32 s21, 0", "={s21}"() #0691  %sgpr22 = tail call i32 asm sideeffect "s_mov_b32 s22, 0", "={s22}"() #0692  %sgpr23 = tail call i32 asm sideeffect "s_mov_b32 s23, 0", "={s23}"() #0693  %sgpr24 = tail call i32 asm sideeffect "s_mov_b32 s24, 0", "={s24}"() #0694  %sgpr25 = tail call i32 asm sideeffect "s_mov_b32 s25, 0", "={s25}"() #0695  %sgpr26 = tail call i32 asm sideeffect "s_mov_b32 s26, 0", "={s26}"() #0696  %sgpr27 = tail call i32 asm sideeffect "s_mov_b32 s27, 0", "={s27}"() #0697  %sgpr28 = tail call i32 asm sideeffect "s_mov_b32 s28, 0", "={s28}"() #0698  %sgpr29 = tail call i32 asm sideeffect "s_mov_b32 s29, 0", "={s29}"() #0699  %sgpr30 = tail call i32 asm sideeffect "s_mov_b32 s30, 0", "={s30}"() #0700  %sgpr31 = tail call i32 asm sideeffect "s_mov_b32 s31, 0", "={s31}"() #0701  %sgpr32 = tail call i32 asm sideeffect "s_mov_b32 s32, 0", "={s32}"() #0702  %sgpr33 = tail call i32 asm sideeffect "s_mov_b32 s33, 0", "={s33}"() #0703  %sgpr34 = tail call i32 asm sideeffect "s_mov_b32 s34, 0", "={s34}"() #0704  %sgpr35 = tail call i32 asm sideeffect "s_mov_b32 s35, 0", "={s35}"() #0705  %sgpr36 = tail call i32 asm sideeffect "s_mov_b32 s36, 0", "={s36}"() #0706  %sgpr37 = tail call i32 asm sideeffect "s_mov_b32 s37, 0", "={s37}"() #0707  %sgpr38 = tail call i32 asm sideeffect "s_mov_b32 s38, 0", "={s38}"() #0708  %sgpr39 = tail call i32 asm sideeffect "s_mov_b32 s39, 0", "={s39}"() #0709  %sgpr40 = tail call i32 asm sideeffect "s_mov_b32 s40, 0", "={s40}"() #0710  %sgpr41 = tail call i32 asm sideeffect "s_mov_b32 s41, 0", "={s41}"() #0711  %sgpr42 = tail call i32 asm sideeffect "s_mov_b32 s42, 0", "={s42}"() #0712  %sgpr43 = tail call i32 asm sideeffect "s_mov_b32 s43, 0", "={s43}"() #0713  %sgpr44 = tail call i32 asm sideeffect "s_mov_b32 s44, 0", "={s44}"() #0714  %sgpr45 = tail call i32 asm sideeffect "s_mov_b32 s45, 0", "={s45}"() #0715  %sgpr46 = tail call i32 asm sideeffect "s_mov_b32 s46, 0", "={s46}"() #0716  %sgpr47 = tail call i32 asm sideeffect "s_mov_b32 s47, 0", "={s47}"() #0717  %sgpr48 = tail call i32 asm sideeffect "s_mov_b32 s48, 0", "={s48}"() #0718  %sgpr49 = tail call i32 asm sideeffect "s_mov_b32 s49, 0", "={s49}"() #0719  %sgpr50 = tail call i32 asm sideeffect "s_mov_b32 s50, 0", "={s50}"() #0720  %sgpr51 = tail call i32 asm sideeffect "s_mov_b32 s51, 0", "={s51}"() #0721  %sgpr52 = tail call i32 asm sideeffect "s_mov_b32 s52, 0", "={s52}"() #0722  %sgpr53 = tail call i32 asm sideeffect "s_mov_b32 s53, 0", "={s53}"() #0723  %sgpr54 = tail call i32 asm sideeffect "s_mov_b32 s54, 0", "={s54}"() #0724  %sgpr55 = tail call i32 asm sideeffect "s_mov_b32 s55, 0", "={s55}"() #0725  %sgpr56 = tail call i32 asm sideeffect "s_mov_b32 s56, 0", "={s56}"() #0726  %sgpr57 = tail call i32 asm sideeffect "s_mov_b32 s57, 0", "={s57}"() #0727  %sgpr58 = tail call i32 asm sideeffect "s_mov_b32 s58, 0", "={s58}"() #0728  %sgpr59 = tail call i32 asm sideeffect "s_mov_b32 s59, 0", "={s59}"() #0729  %sgpr60 = tail call i32 asm sideeffect "s_mov_b32 s60, 0", "={s60}"() #0730  %sgpr61 = tail call i32 asm sideeffect "s_mov_b32 s61, 0", "={s61}"() #0731  %sgpr62 = tail call i32 asm sideeffect "s_mov_b32 s62, 0", "={s62}"() #0732  %sgpr63 = tail call i32 asm sideeffect "s_mov_b32 s63, 0", "={s63}"() #0733  %sgpr64 = tail call i32 asm sideeffect "s_mov_b32 s64, 0", "={s64}"() #0734  %sgpr65 = tail call i32 asm sideeffect "s_mov_b32 s65, 0", "={s65}"() #0735  %sgpr66 = tail call i32 asm sideeffect "s_mov_b32 s66, 0", "={s66}"() #0736  %sgpr67 = tail call i32 asm sideeffect "s_mov_b32 s67, 0", "={s67}"() #0737  %sgpr68 = tail call i32 asm sideeffect "s_mov_b32 s68, 0", "={s68}"() #0738  %sgpr69 = tail call i32 asm sideeffect "s_mov_b32 s69, 0", "={s69}"() #0739  %sgpr70 = tail call i32 asm sideeffect "s_mov_b32 s70, 0", "={s70}"() #0740  %sgpr71 = tail call i32 asm sideeffect "s_mov_b32 s71, 0", "={s71}"() #0741  %sgpr72 = tail call i32 asm sideeffect "s_mov_b32 s72, 0", "={s72}"() #0742  %sgpr73 = tail call i32 asm sideeffect "s_mov_b32 s73, 0", "={s73}"() #0743  %sgpr74 = tail call i32 asm sideeffect "s_mov_b32 s74, 0", "={s74}"() #0744  %sgpr75 = tail call i32 asm sideeffect "s_mov_b32 s75, 0", "={s75}"() #0745  %sgpr76 = tail call i32 asm sideeffect "s_mov_b32 s76, 0", "={s76}"() #0746  %sgpr77 = tail call i32 asm sideeffect "s_mov_b32 s77, 0", "={s77}"() #0747  %sgpr78 = tail call i32 asm sideeffect "s_mov_b32 s78, 0", "={s78}"() #0748  %sgpr79 = tail call i32 asm sideeffect "s_mov_b32 s79, 0", "={s79}"() #0749  %sgpr80 = tail call i32 asm sideeffect "s_mov_b32 s80, 0", "={s80}"() #0750  %sgpr81 = tail call i32 asm sideeffect "s_mov_b32 s81, 0", "={s81}"() #0751  %sgpr82 = tail call i32 asm sideeffect "s_mov_b32 s82, 0", "={s82}"() #0752  %sgpr83 = tail call i32 asm sideeffect "s_mov_b32 s83, 0", "={s83}"() #0753  %sgpr84 = tail call i32 asm sideeffect "s_mov_b32 s84, 0", "={s84}"() #0754  %sgpr85 = tail call i32 asm sideeffect "s_mov_b32 s85, 0", "={s85}"() #0755  %sgpr86 = tail call i32 asm sideeffect "s_mov_b32 s86, 0", "={s86}"() #0756  %sgpr87 = tail call i32 asm sideeffect "s_mov_b32 s87, 0", "={s87}"() #0757  %sgpr88 = tail call i32 asm sideeffect "s_mov_b32 s88, 0", "={s88}"() #0758  %sgpr89 = tail call i32 asm sideeffect "s_mov_b32 s89, 0", "={s89}"() #0759  %sgpr90 = tail call i32 asm sideeffect "s_mov_b32 s90, 0", "={s90}"() #0760  %sgpr91 = tail call i32 asm sideeffect "s_mov_b32 s91, 0", "={s91}"() #0761  %sgpr92 = tail call i32 asm sideeffect "s_mov_b32 s92, 0", "={s92}"() #0762  %sgpr93 = tail call i32 asm sideeffect "s_mov_b32 s93, 0", "={s93}"() #0763  %sgpr94 = tail call i32 asm sideeffect "s_mov_b32 s94, 0", "={s94}"() #0764  %sgpr95 = tail call i32 asm sideeffect "s_mov_b32 s95, 0", "={s95}"() #0765  %sgpr96 = tail call i32 asm sideeffect "s_mov_b32 s96, 0", "={s96}"() #0766  %sgpr97 = tail call i32 asm sideeffect "s_mov_b32 s97, 0", "={s97}"() #0767  %sgpr98 = tail call i32 asm sideeffect "s_mov_b32 s98, 0", "={s98}"() #0768  %sgpr99 = tail call i32 asm sideeffect "s_mov_b32 s99, 0", "={s99}"() #0769  %sgpr100 = tail call i32 asm sideeffect "s_mov_b32 s100, 0", "={s100}"() #0770  %sgpr101 = tail call i32 asm sideeffect "s_mov_b32 s101, 0", "={s101}"() #0771  %vcc_lo = tail call i32 asm sideeffect "s_mov_b32 $0, 0", "={vcc_lo}"() #0772  %vcc_hi = tail call i32 asm sideeffect "s_mov_b32 $0, 0", "={vcc_hi}"() #0773  %cmp = icmp eq i32 %cnd, 0774  br i1 %cmp, label %bb3, label %bb2 ; +8 dword branch775 776bb2: ; 68 bytes777  ; 64 byte asm778  call void asm sideeffect779   "v_nop_e64780    v_nop_e64781    v_nop_e64782    v_nop_e64783    v_nop_e64784    v_nop_e64785    v_nop_e64786    v_nop_e64",""() #0787  br label %bb3788 789bb3:790  tail call void asm sideeffect "; reg use $0", "{s0}"(i32 %sgpr0) #0791  tail call void asm sideeffect "; reg use $0", "{s1}"(i32 %sgpr1) #0792  tail call void asm sideeffect "; reg use $0", "{s2}"(i32 %sgpr2) #0793  tail call void asm sideeffect "; reg use $0", "{s3}"(i32 %sgpr3) #0794  tail call void asm sideeffect "; reg use $0", "{s4}"(i32 %sgpr4) #0795  tail call void asm sideeffect "; reg use $0", "{s5}"(i32 %sgpr5) #0796  tail call void asm sideeffect "; reg use $0", "{s6}"(i32 %sgpr6) #0797  tail call void asm sideeffect "; reg use $0", "{s7}"(i32 %sgpr7) #0798  tail call void asm sideeffect "; reg use $0", "{s8}"(i32 %sgpr8) #0799  tail call void asm sideeffect "; reg use $0", "{s9}"(i32 %sgpr9) #0800  tail call void asm sideeffect "; reg use $0", "{s10}"(i32 %sgpr10) #0801  tail call void asm sideeffect "; reg use $0", "{s11}"(i32 %sgpr11) #0802  tail call void asm sideeffect "; reg use $0", "{s12}"(i32 %sgpr12) #0803  tail call void asm sideeffect "; reg use $0", "{s13}"(i32 %sgpr13) #0804  tail call void asm sideeffect "; reg use $0", "{s14}"(i32 %sgpr14) #0805  tail call void asm sideeffect "; reg use $0", "{s15}"(i32 %sgpr15) #0806  tail call void asm sideeffect "; reg use $0", "{s16}"(i32 %sgpr16) #0807  tail call void asm sideeffect "; reg use $0", "{s17}"(i32 %sgpr17) #0808  tail call void asm sideeffect "; reg use $0", "{s18}"(i32 %sgpr18) #0809  tail call void asm sideeffect "; reg use $0", "{s19}"(i32 %sgpr19) #0810  tail call void asm sideeffect "; reg use $0", "{s20}"(i32 %sgpr20) #0811  tail call void asm sideeffect "; reg use $0", "{s21}"(i32 %sgpr21) #0812  tail call void asm sideeffect "; reg use $0", "{s22}"(i32 %sgpr22) #0813  tail call void asm sideeffect "; reg use $0", "{s23}"(i32 %sgpr23) #0814  tail call void asm sideeffect "; reg use $0", "{s24}"(i32 %sgpr24) #0815  tail call void asm sideeffect "; reg use $0", "{s25}"(i32 %sgpr25) #0816  tail call void asm sideeffect "; reg use $0", "{s26}"(i32 %sgpr26) #0817  tail call void asm sideeffect "; reg use $0", "{s27}"(i32 %sgpr27) #0818  tail call void asm sideeffect "; reg use $0", "{s28}"(i32 %sgpr28) #0819  tail call void asm sideeffect "; reg use $0", "{s29}"(i32 %sgpr29) #0820  tail call void asm sideeffect "; reg use $0", "{s30}"(i32 %sgpr30) #0821  tail call void asm sideeffect "; reg use $0", "{s31}"(i32 %sgpr31) #0822  tail call void asm sideeffect "; reg use $0", "{s32}"(i32 %sgpr32) #0823  tail call void asm sideeffect "; reg use $0", "{s33}"(i32 %sgpr33) #0824  tail call void asm sideeffect "; reg use $0", "{s34}"(i32 %sgpr34) #0825  tail call void asm sideeffect "; reg use $0", "{s35}"(i32 %sgpr35) #0826  tail call void asm sideeffect "; reg use $0", "{s36}"(i32 %sgpr36) #0827  tail call void asm sideeffect "; reg use $0", "{s37}"(i32 %sgpr37) #0828  tail call void asm sideeffect "; reg use $0", "{s38}"(i32 %sgpr38) #0829  tail call void asm sideeffect "; reg use $0", "{s39}"(i32 %sgpr39) #0830  tail call void asm sideeffect "; reg use $0", "{s40}"(i32 %sgpr40) #0831  tail call void asm sideeffect "; reg use $0", "{s41}"(i32 %sgpr41) #0832  tail call void asm sideeffect "; reg use $0", "{s42}"(i32 %sgpr42) #0833  tail call void asm sideeffect "; reg use $0", "{s43}"(i32 %sgpr43) #0834  tail call void asm sideeffect "; reg use $0", "{s44}"(i32 %sgpr44) #0835  tail call void asm sideeffect "; reg use $0", "{s45}"(i32 %sgpr45) #0836  tail call void asm sideeffect "; reg use $0", "{s46}"(i32 %sgpr46) #0837  tail call void asm sideeffect "; reg use $0", "{s47}"(i32 %sgpr47) #0838  tail call void asm sideeffect "; reg use $0", "{s48}"(i32 %sgpr48) #0839  tail call void asm sideeffect "; reg use $0", "{s49}"(i32 %sgpr49) #0840  tail call void asm sideeffect "; reg use $0", "{s50}"(i32 %sgpr50) #0841  tail call void asm sideeffect "; reg use $0", "{s51}"(i32 %sgpr51) #0842  tail call void asm sideeffect "; reg use $0", "{s52}"(i32 %sgpr52) #0843  tail call void asm sideeffect "; reg use $0", "{s53}"(i32 %sgpr53) #0844  tail call void asm sideeffect "; reg use $0", "{s54}"(i32 %sgpr54) #0845  tail call void asm sideeffect "; reg use $0", "{s55}"(i32 %sgpr55) #0846  tail call void asm sideeffect "; reg use $0", "{s56}"(i32 %sgpr56) #0847  tail call void asm sideeffect "; reg use $0", "{s57}"(i32 %sgpr57) #0848  tail call void asm sideeffect "; reg use $0", "{s58}"(i32 %sgpr58) #0849  tail call void asm sideeffect "; reg use $0", "{s59}"(i32 %sgpr59) #0850  tail call void asm sideeffect "; reg use $0", "{s60}"(i32 %sgpr60) #0851  tail call void asm sideeffect "; reg use $0", "{s61}"(i32 %sgpr61) #0852  tail call void asm sideeffect "; reg use $0", "{s62}"(i32 %sgpr62) #0853  tail call void asm sideeffect "; reg use $0", "{s63}"(i32 %sgpr63) #0854  tail call void asm sideeffect "; reg use $0", "{s64}"(i32 %sgpr64) #0855  tail call void asm sideeffect "; reg use $0", "{s65}"(i32 %sgpr65) #0856  tail call void asm sideeffect "; reg use $0", "{s66}"(i32 %sgpr66) #0857  tail call void asm sideeffect "; reg use $0", "{s67}"(i32 %sgpr67) #0858  tail call void asm sideeffect "; reg use $0", "{s68}"(i32 %sgpr68) #0859  tail call void asm sideeffect "; reg use $0", "{s69}"(i32 %sgpr69) #0860  tail call void asm sideeffect "; reg use $0", "{s70}"(i32 %sgpr70) #0861  tail call void asm sideeffect "; reg use $0", "{s71}"(i32 %sgpr71) #0862  tail call void asm sideeffect "; reg use $0", "{s72}"(i32 %sgpr72) #0863  tail call void asm sideeffect "; reg use $0", "{s73}"(i32 %sgpr73) #0864  tail call void asm sideeffect "; reg use $0", "{s74}"(i32 %sgpr74) #0865  tail call void asm sideeffect "; reg use $0", "{s75}"(i32 %sgpr75) #0866  tail call void asm sideeffect "; reg use $0", "{s76}"(i32 %sgpr76) #0867  tail call void asm sideeffect "; reg use $0", "{s77}"(i32 %sgpr77) #0868  tail call void asm sideeffect "; reg use $0", "{s78}"(i32 %sgpr78) #0869  tail call void asm sideeffect "; reg use $0", "{s79}"(i32 %sgpr79) #0870  tail call void asm sideeffect "; reg use $0", "{s80}"(i32 %sgpr80) #0871  tail call void asm sideeffect "; reg use $0", "{s81}"(i32 %sgpr81) #0872  tail call void asm sideeffect "; reg use $0", "{s82}"(i32 %sgpr82) #0873  tail call void asm sideeffect "; reg use $0", "{s83}"(i32 %sgpr83) #0874  tail call void asm sideeffect "; reg use $0", "{s84}"(i32 %sgpr84) #0875  tail call void asm sideeffect "; reg use $0", "{s85}"(i32 %sgpr85) #0876  tail call void asm sideeffect "; reg use $0", "{s86}"(i32 %sgpr86) #0877  tail call void asm sideeffect "; reg use $0", "{s87}"(i32 %sgpr87) #0878  tail call void asm sideeffect "; reg use $0", "{s88}"(i32 %sgpr88) #0879  tail call void asm sideeffect "; reg use $0", "{s89}"(i32 %sgpr89) #0880  tail call void asm sideeffect "; reg use $0", "{s90}"(i32 %sgpr90) #0881  tail call void asm sideeffect "; reg use $0", "{s91}"(i32 %sgpr91) #0882  tail call void asm sideeffect "; reg use $0", "{s92}"(i32 %sgpr92) #0883  tail call void asm sideeffect "; reg use $0", "{s93}"(i32 %sgpr93) #0884  tail call void asm sideeffect "; reg use $0", "{s94}"(i32 %sgpr94) #0885  tail call void asm sideeffect "; reg use $0", "{s95}"(i32 %sgpr95) #0886  tail call void asm sideeffect "; reg use $0", "{s96}"(i32 %sgpr96) #0887  tail call void asm sideeffect "; reg use $0", "{s97}"(i32 %sgpr97) #0888  tail call void asm sideeffect "; reg use $0", "{s98}"(i32 %sgpr98) #0889  tail call void asm sideeffect "; reg use $0", "{s99}"(i32 %sgpr99) #0890  tail call void asm sideeffect "; reg use $0", "{s100}"(i32 %sgpr100) #0891  tail call void asm sideeffect "; reg use $0", "{s101}"(i32 %sgpr101) #0892  tail call void asm sideeffect "; reg use $0", "{vcc_lo}"(i32 %vcc_lo) #0893  tail call void asm sideeffect "; reg use $0", "{vcc_hi}"(i32 %vcc_hi) #0894  ret void895}896 897define void @spill_func(ptr addrspace(1) %arg) #0 {898; CHECK-LABEL: spill_func:899; CHECK:       ; %bb.0: ; %entry900; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)901; CHECK-NEXT:    s_xor_saveexec_b64 s[4:5], -1902; CHECK-NEXT:    buffer_store_dword v0, off, s[0:3], s32 ; 4-byte Folded Spill903; CHECK-NEXT:    s_mov_b64 exec, s[4:5]904; CHECK-NEXT:    s_waitcnt expcnt(0)905; CHECK-NEXT:    v_writelane_b32 v0, s30, 0906; CHECK-NEXT:    v_writelane_b32 v0, s31, 1907; CHECK-NEXT:    v_writelane_b32 v0, s33, 2908; CHECK-NEXT:    v_writelane_b32 v0, s34, 3909; CHECK-NEXT:    v_writelane_b32 v0, s35, 4910; CHECK-NEXT:    v_writelane_b32 v0, s36, 5911; CHECK-NEXT:    v_writelane_b32 v0, s37, 6912; CHECK-NEXT:    v_writelane_b32 v0, s38, 7913; CHECK-NEXT:    v_writelane_b32 v0, s39, 8914; CHECK-NEXT:    v_writelane_b32 v0, s48, 9915; CHECK-NEXT:    v_writelane_b32 v0, s49, 10916; CHECK-NEXT:    v_writelane_b32 v0, s50, 11917; CHECK-NEXT:    v_writelane_b32 v0, s51, 12918; CHECK-NEXT:    v_writelane_b32 v0, s52, 13919; CHECK-NEXT:    v_writelane_b32 v0, s53, 14920; CHECK-NEXT:    v_writelane_b32 v0, s54, 15921; CHECK-NEXT:    v_writelane_b32 v0, s55, 16922; CHECK-NEXT:    v_writelane_b32 v0, s64, 17923; CHECK-NEXT:    v_writelane_b32 v0, s65, 18924; CHECK-NEXT:    v_writelane_b32 v0, s66, 19925; CHECK-NEXT:    v_writelane_b32 v0, s67, 20926; CHECK-NEXT:    v_writelane_b32 v0, s68, 21927; CHECK-NEXT:    v_writelane_b32 v0, s69, 22928; CHECK-NEXT:    v_writelane_b32 v0, s70, 23929; CHECK-NEXT:    v_writelane_b32 v0, s71, 24930; CHECK-NEXT:    v_writelane_b32 v0, s80, 25931; CHECK-NEXT:    v_writelane_b32 v0, s81, 26932; CHECK-NEXT:    v_writelane_b32 v0, s82, 27933; CHECK-NEXT:    v_writelane_b32 v0, s83, 28934; CHECK-NEXT:    v_writelane_b32 v0, s84, 29935; CHECK-NEXT:    v_writelane_b32 v0, s85, 30936; CHECK-NEXT:    v_writelane_b32 v0, s86, 31937; CHECK-NEXT:    v_writelane_b32 v0, s87, 32938; CHECK-NEXT:    v_writelane_b32 v0, s96, 33939; CHECK-NEXT:    v_writelane_b32 v0, s97, 34940; CHECK-NEXT:    v_writelane_b32 v0, s98, 35941; CHECK-NEXT:    v_writelane_b32 v0, s99, 36942; CHECK-NEXT:    s_mov_b32 s40, s12943; CHECK-NEXT:    v_writelane_b32 v0, s100, 37944; CHECK-NEXT:    s_cmp_eq_u32 s40, 0945; CHECK-NEXT:    v_writelane_b32 v0, s101, 38946; CHECK-NEXT:    ;;#ASMSTART947; CHECK-NEXT:    s_mov_b32 s0, 0948; CHECK-NEXT:    ;;#ASMEND949; CHECK-NEXT:    ;;#ASMSTART950; CHECK-NEXT:    s_mov_b32 s1, 0951; CHECK-NEXT:    ;;#ASMEND952; CHECK-NEXT:    ;;#ASMSTART953; CHECK-NEXT:    s_mov_b32 s2, 0954; CHECK-NEXT:    ;;#ASMEND955; CHECK-NEXT:    ;;#ASMSTART956; CHECK-NEXT:    s_mov_b32 s3, 0957; CHECK-NEXT:    ;;#ASMEND958; CHECK-NEXT:    ;;#ASMSTART959; CHECK-NEXT:    s_mov_b32 s4, 0960; CHECK-NEXT:    ;;#ASMEND961; CHECK-NEXT:    ;;#ASMSTART962; CHECK-NEXT:    s_mov_b32 s5, 0963; CHECK-NEXT:    ;;#ASMEND964; CHECK-NEXT:    ;;#ASMSTART965; CHECK-NEXT:    s_mov_b32 s6, 0966; CHECK-NEXT:    ;;#ASMEND967; CHECK-NEXT:    ;;#ASMSTART968; CHECK-NEXT:    s_mov_b32 s7, 0969; CHECK-NEXT:    ;;#ASMEND970; CHECK-NEXT:    ;;#ASMSTART971; CHECK-NEXT:    s_mov_b32 s8, 0972; CHECK-NEXT:    ;;#ASMEND973; CHECK-NEXT:    ;;#ASMSTART974; CHECK-NEXT:    s_mov_b32 s9, 0975; CHECK-NEXT:    ;;#ASMEND976; CHECK-NEXT:    ;;#ASMSTART977; CHECK-NEXT:    s_mov_b32 s10, 0978; CHECK-NEXT:    ;;#ASMEND979; CHECK-NEXT:    ;;#ASMSTART980; CHECK-NEXT:    s_mov_b32 s11, 0981; CHECK-NEXT:    ;;#ASMEND982; CHECK-NEXT:    ;;#ASMSTART983; CHECK-NEXT:    s_mov_b32 s12, 0984; CHECK-NEXT:    ;;#ASMEND985; CHECK-NEXT:    ;;#ASMSTART986; CHECK-NEXT:    s_mov_b32 s13, 0987; CHECK-NEXT:    ;;#ASMEND988; CHECK-NEXT:    ;;#ASMSTART989; CHECK-NEXT:    s_mov_b32 s14, 0990; CHECK-NEXT:    ;;#ASMEND991; CHECK-NEXT:    ;;#ASMSTART992; CHECK-NEXT:    s_mov_b32 s15, 0993; CHECK-NEXT:    ;;#ASMEND994; CHECK-NEXT:    ;;#ASMSTART995; CHECK-NEXT:    s_mov_b32 s16, 0996; CHECK-NEXT:    ;;#ASMEND997; CHECK-NEXT:    ;;#ASMSTART998; CHECK-NEXT:    s_mov_b32 s17, 0999; CHECK-NEXT:    ;;#ASMEND1000; CHECK-NEXT:    ;;#ASMSTART1001; CHECK-NEXT:    s_mov_b32 s18, 01002; CHECK-NEXT:    ;;#ASMEND1003; CHECK-NEXT:    ;;#ASMSTART1004; CHECK-NEXT:    s_mov_b32 s19, 01005; CHECK-NEXT:    ;;#ASMEND1006; CHECK-NEXT:    ;;#ASMSTART1007; CHECK-NEXT:    s_mov_b32 s20, 01008; CHECK-NEXT:    ;;#ASMEND1009; CHECK-NEXT:    ;;#ASMSTART1010; CHECK-NEXT:    s_mov_b32 s21, 01011; CHECK-NEXT:    ;;#ASMEND1012; CHECK-NEXT:    ;;#ASMSTART1013; CHECK-NEXT:    s_mov_b32 s22, 01014; CHECK-NEXT:    ;;#ASMEND1015; CHECK-NEXT:    ;;#ASMSTART1016; CHECK-NEXT:    s_mov_b32 s23, 01017; CHECK-NEXT:    ;;#ASMEND1018; CHECK-NEXT:    ;;#ASMSTART1019; CHECK-NEXT:    s_mov_b32 s24, 01020; CHECK-NEXT:    ;;#ASMEND1021; CHECK-NEXT:    ;;#ASMSTART1022; CHECK-NEXT:    s_mov_b32 s25, 01023; CHECK-NEXT:    ;;#ASMEND1024; CHECK-NEXT:    ;;#ASMSTART1025; CHECK-NEXT:    s_mov_b32 s26, 01026; CHECK-NEXT:    ;;#ASMEND1027; CHECK-NEXT:    ;;#ASMSTART1028; CHECK-NEXT:    s_mov_b32 s27, 01029; CHECK-NEXT:    ;;#ASMEND1030; CHECK-NEXT:    ;;#ASMSTART1031; CHECK-NEXT:    s_mov_b32 s28, 01032; CHECK-NEXT:    ;;#ASMEND1033; CHECK-NEXT:    ;;#ASMSTART1034; CHECK-NEXT:    s_mov_b32 s29, 01035; CHECK-NEXT:    ;;#ASMEND1036; CHECK-NEXT:    ;;#ASMSTART1037; CHECK-NEXT:    s_mov_b32 s30, 01038; CHECK-NEXT:    ;;#ASMEND1039; CHECK-NEXT:    ;;#ASMSTART1040; CHECK-NEXT:    s_mov_b32 s31, 01041; CHECK-NEXT:    ;;#ASMEND1042; CHECK-NEXT:    ;;#ASMSTART1043; CHECK-NEXT:    s_mov_b32 s32, 01044; CHECK-NEXT:    ;;#ASMEND1045; CHECK-NEXT:    ;;#ASMSTART1046; CHECK-NEXT:    s_mov_b32 s33, 01047; CHECK-NEXT:    ;;#ASMEND1048; CHECK-NEXT:    ;;#ASMSTART1049; CHECK-NEXT:    s_mov_b32 s34, 01050; CHECK-NEXT:    ;;#ASMEND1051; CHECK-NEXT:    ;;#ASMSTART1052; CHECK-NEXT:    s_mov_b32 s35, 01053; CHECK-NEXT:    ;;#ASMEND1054; CHECK-NEXT:    ;;#ASMSTART1055; CHECK-NEXT:    s_mov_b32 s36, 01056; CHECK-NEXT:    ;;#ASMEND1057; CHECK-NEXT:    ;;#ASMSTART1058; CHECK-NEXT:    s_mov_b32 s37, 01059; CHECK-NEXT:    ;;#ASMEND1060; CHECK-NEXT:    ;;#ASMSTART1061; CHECK-NEXT:    s_mov_b32 s38, 01062; CHECK-NEXT:    ;;#ASMEND1063; CHECK-NEXT:    ;;#ASMSTART1064; CHECK-NEXT:    s_mov_b32 s39, 01065; CHECK-NEXT:    ;;#ASMEND1066; CHECK-NEXT:    ;;#ASMSTART1067; CHECK-NEXT:    s_mov_b32 s40, 01068; CHECK-NEXT:    ;;#ASMEND1069; CHECK-NEXT:    ;;#ASMSTART1070; CHECK-NEXT:    s_mov_b32 s41, 01071; CHECK-NEXT:    ;;#ASMEND1072; CHECK-NEXT:    ;;#ASMSTART1073; CHECK-NEXT:    s_mov_b32 s42, 01074; CHECK-NEXT:    ;;#ASMEND1075; CHECK-NEXT:    ;;#ASMSTART1076; CHECK-NEXT:    s_mov_b32 s43, 01077; CHECK-NEXT:    ;;#ASMEND1078; CHECK-NEXT:    ;;#ASMSTART1079; CHECK-NEXT:    s_mov_b32 s44, 01080; CHECK-NEXT:    ;;#ASMEND1081; CHECK-NEXT:    ;;#ASMSTART1082; CHECK-NEXT:    s_mov_b32 s45, 01083; CHECK-NEXT:    ;;#ASMEND1084; CHECK-NEXT:    ;;#ASMSTART1085; CHECK-NEXT:    s_mov_b32 s46, 01086; CHECK-NEXT:    ;;#ASMEND1087; CHECK-NEXT:    ;;#ASMSTART1088; CHECK-NEXT:    s_mov_b32 s47, 01089; CHECK-NEXT:    ;;#ASMEND1090; CHECK-NEXT:    ;;#ASMSTART1091; CHECK-NEXT:    s_mov_b32 s48, 01092; CHECK-NEXT:    ;;#ASMEND1093; CHECK-NEXT:    ;;#ASMSTART1094; CHECK-NEXT:    s_mov_b32 s49, 01095; CHECK-NEXT:    ;;#ASMEND1096; CHECK-NEXT:    ;;#ASMSTART1097; CHECK-NEXT:    s_mov_b32 s50, 01098; CHECK-NEXT:    ;;#ASMEND1099; CHECK-NEXT:    ;;#ASMSTART1100; CHECK-NEXT:    s_mov_b32 s51, 01101; CHECK-NEXT:    ;;#ASMEND1102; CHECK-NEXT:    ;;#ASMSTART1103; CHECK-NEXT:    s_mov_b32 s52, 01104; CHECK-NEXT:    ;;#ASMEND1105; CHECK-NEXT:    ;;#ASMSTART1106; CHECK-NEXT:    s_mov_b32 s53, 01107; CHECK-NEXT:    ;;#ASMEND1108; CHECK-NEXT:    ;;#ASMSTART1109; CHECK-NEXT:    s_mov_b32 s54, 01110; CHECK-NEXT:    ;;#ASMEND1111; CHECK-NEXT:    ;;#ASMSTART1112; CHECK-NEXT:    s_mov_b32 s55, 01113; CHECK-NEXT:    ;;#ASMEND1114; CHECK-NEXT:    ;;#ASMSTART1115; CHECK-NEXT:    s_mov_b32 s56, 01116; CHECK-NEXT:    ;;#ASMEND1117; CHECK-NEXT:    ;;#ASMSTART1118; CHECK-NEXT:    s_mov_b32 s57, 01119; CHECK-NEXT:    ;;#ASMEND1120; CHECK-NEXT:    ;;#ASMSTART1121; CHECK-NEXT:    s_mov_b32 s58, 01122; CHECK-NEXT:    ;;#ASMEND1123; CHECK-NEXT:    ;;#ASMSTART1124; CHECK-NEXT:    s_mov_b32 s59, 01125; CHECK-NEXT:    ;;#ASMEND1126; CHECK-NEXT:    ;;#ASMSTART1127; CHECK-NEXT:    s_mov_b32 s60, 01128; CHECK-NEXT:    ;;#ASMEND1129; CHECK-NEXT:    ;;#ASMSTART1130; CHECK-NEXT:    s_mov_b32 s61, 01131; CHECK-NEXT:    ;;#ASMEND1132; CHECK-NEXT:    ;;#ASMSTART1133; CHECK-NEXT:    s_mov_b32 s62, 01134; CHECK-NEXT:    ;;#ASMEND1135; CHECK-NEXT:    ;;#ASMSTART1136; CHECK-NEXT:    s_mov_b32 s63, 01137; CHECK-NEXT:    ;;#ASMEND1138; CHECK-NEXT:    ;;#ASMSTART1139; CHECK-NEXT:    s_mov_b32 s64, 01140; CHECK-NEXT:    ;;#ASMEND1141; CHECK-NEXT:    ;;#ASMSTART1142; CHECK-NEXT:    s_mov_b32 s65, 01143; CHECK-NEXT:    ;;#ASMEND1144; CHECK-NEXT:    ;;#ASMSTART1145; CHECK-NEXT:    s_mov_b32 s66, 01146; CHECK-NEXT:    ;;#ASMEND1147; CHECK-NEXT:    ;;#ASMSTART1148; CHECK-NEXT:    s_mov_b32 s67, 01149; CHECK-NEXT:    ;;#ASMEND1150; CHECK-NEXT:    ;;#ASMSTART1151; CHECK-NEXT:    s_mov_b32 s68, 01152; CHECK-NEXT:    ;;#ASMEND1153; CHECK-NEXT:    ;;#ASMSTART1154; CHECK-NEXT:    s_mov_b32 s69, 01155; CHECK-NEXT:    ;;#ASMEND1156; CHECK-NEXT:    ;;#ASMSTART1157; CHECK-NEXT:    s_mov_b32 s70, 01158; CHECK-NEXT:    ;;#ASMEND1159; CHECK-NEXT:    ;;#ASMSTART1160; CHECK-NEXT:    s_mov_b32 s71, 01161; CHECK-NEXT:    ;;#ASMEND1162; CHECK-NEXT:    ;;#ASMSTART1163; CHECK-NEXT:    s_mov_b32 s72, 01164; CHECK-NEXT:    ;;#ASMEND1165; CHECK-NEXT:    ;;#ASMSTART1166; CHECK-NEXT:    s_mov_b32 s73, 01167; CHECK-NEXT:    ;;#ASMEND1168; CHECK-NEXT:    ;;#ASMSTART1169; CHECK-NEXT:    s_mov_b32 s74, 01170; CHECK-NEXT:    ;;#ASMEND1171; CHECK-NEXT:    ;;#ASMSTART1172; CHECK-NEXT:    s_mov_b32 s75, 01173; CHECK-NEXT:    ;;#ASMEND1174; CHECK-NEXT:    ;;#ASMSTART1175; CHECK-NEXT:    s_mov_b32 s76, 01176; CHECK-NEXT:    ;;#ASMEND1177; CHECK-NEXT:    ;;#ASMSTART1178; CHECK-NEXT:    s_mov_b32 s77, 01179; CHECK-NEXT:    ;;#ASMEND1180; CHECK-NEXT:    ;;#ASMSTART1181; CHECK-NEXT:    s_mov_b32 s78, 01182; CHECK-NEXT:    ;;#ASMEND1183; CHECK-NEXT:    ;;#ASMSTART1184; CHECK-NEXT:    s_mov_b32 s79, 01185; CHECK-NEXT:    ;;#ASMEND1186; CHECK-NEXT:    ;;#ASMSTART1187; CHECK-NEXT:    s_mov_b32 s80, 01188; CHECK-NEXT:    ;;#ASMEND1189; CHECK-NEXT:    ;;#ASMSTART1190; CHECK-NEXT:    s_mov_b32 s81, 01191; CHECK-NEXT:    ;;#ASMEND1192; CHECK-NEXT:    ;;#ASMSTART1193; CHECK-NEXT:    s_mov_b32 s82, 01194; CHECK-NEXT:    ;;#ASMEND1195; CHECK-NEXT:    ;;#ASMSTART1196; CHECK-NEXT:    s_mov_b32 s83, 01197; CHECK-NEXT:    ;;#ASMEND1198; CHECK-NEXT:    ;;#ASMSTART1199; CHECK-NEXT:    s_mov_b32 s84, 01200; CHECK-NEXT:    ;;#ASMEND1201; CHECK-NEXT:    ;;#ASMSTART1202; CHECK-NEXT:    s_mov_b32 s85, 01203; CHECK-NEXT:    ;;#ASMEND1204; CHECK-NEXT:    ;;#ASMSTART1205; CHECK-NEXT:    s_mov_b32 s86, 01206; CHECK-NEXT:    ;;#ASMEND1207; CHECK-NEXT:    ;;#ASMSTART1208; CHECK-NEXT:    s_mov_b32 s87, 01209; CHECK-NEXT:    ;;#ASMEND1210; CHECK-NEXT:    ;;#ASMSTART1211; CHECK-NEXT:    s_mov_b32 s88, 01212; CHECK-NEXT:    ;;#ASMEND1213; CHECK-NEXT:    ;;#ASMSTART1214; CHECK-NEXT:    s_mov_b32 s89, 01215; CHECK-NEXT:    ;;#ASMEND1216; CHECK-NEXT:    ;;#ASMSTART1217; CHECK-NEXT:    s_mov_b32 s90, 01218; CHECK-NEXT:    ;;#ASMEND1219; CHECK-NEXT:    ;;#ASMSTART1220; CHECK-NEXT:    s_mov_b32 s91, 01221; CHECK-NEXT:    ;;#ASMEND1222; CHECK-NEXT:    ;;#ASMSTART1223; CHECK-NEXT:    s_mov_b32 s92, 01224; CHECK-NEXT:    ;;#ASMEND1225; CHECK-NEXT:    ;;#ASMSTART1226; CHECK-NEXT:    s_mov_b32 s93, 01227; CHECK-NEXT:    ;;#ASMEND1228; CHECK-NEXT:    ;;#ASMSTART1229; CHECK-NEXT:    s_mov_b32 s94, 01230; CHECK-NEXT:    ;;#ASMEND1231; CHECK-NEXT:    ;;#ASMSTART1232; CHECK-NEXT:    s_mov_b32 s95, 01233; CHECK-NEXT:    ;;#ASMEND1234; CHECK-NEXT:    ;;#ASMSTART1235; CHECK-NEXT:    s_mov_b32 s96, 01236; CHECK-NEXT:    ;;#ASMEND1237; CHECK-NEXT:    ;;#ASMSTART1238; CHECK-NEXT:    s_mov_b32 s97, 01239; CHECK-NEXT:    ;;#ASMEND1240; CHECK-NEXT:    ;;#ASMSTART1241; CHECK-NEXT:    s_mov_b32 s98, 01242; CHECK-NEXT:    ;;#ASMEND1243; CHECK-NEXT:    ;;#ASMSTART1244; CHECK-NEXT:    s_mov_b32 s99, 01245; CHECK-NEXT:    ;;#ASMEND1246; CHECK-NEXT:    ;;#ASMSTART1247; CHECK-NEXT:    s_mov_b32 s100, 01248; CHECK-NEXT:    ;;#ASMEND1249; CHECK-NEXT:    ;;#ASMSTART1250; CHECK-NEXT:    s_mov_b32 s101, 01251; CHECK-NEXT:    ;;#ASMEND1252; CHECK-NEXT:    ;;#ASMSTART1253; CHECK-NEXT:    s_mov_b32 vcc_lo, 01254; CHECK-NEXT:    ;;#ASMEND1255; CHECK-NEXT:    ;;#ASMSTART1256; CHECK-NEXT:    s_mov_b32 vcc_hi, 01257; CHECK-NEXT:    ;;#ASMEND1258; CHECK-NEXT:    s_cbranch_scc0 .LBB1_11259; CHECK-NEXT:  ; %bb.3: ; %entry1260; CHECK-NEXT:    s_not_b64 exec, exec1261; CHECK-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:41262; CHECK-NEXT:    v_writelane_b32 v1, s0, 01263; CHECK-NEXT:    v_writelane_b32 v1, s1, 11264; CHECK-NEXT:    s_getpc_b64 s[0:1]1265; CHECK-NEXT:  .Lpost_getpc1:1266; CHECK-NEXT:    s_add_u32 s0, s0, (.LBB1_4-.Lpost_getpc1)&42949672951267; CHECK-NEXT:    s_addc_u32 s1, s1, (.LBB1_4-.Lpost_getpc1)>>321268; CHECK-NEXT:    s_setpc_b64 s[0:1]1269; CHECK-NEXT:  .LBB1_1: ; %bb21270; CHECK-NEXT:    ;;#ASMSTART1271; CHECK-NEXT:    v_nop_e641272; CHECK-NEXT:    v_nop_e641273; CHECK-NEXT:    v_nop_e641274; CHECK-NEXT:    v_nop_e641275; CHECK-NEXT:    v_nop_e641276; CHECK-NEXT:    v_nop_e641277; CHECK-NEXT:    v_nop_e641278; CHECK-NEXT:    v_nop_e641279; CHECK-NEXT:    ;;#ASMEND1280; CHECK-NEXT:    s_branch .LBB1_21281; CHECK-NEXT:  .LBB1_4: ; %bb31282; CHECK-NEXT:    v_readlane_b32 s0, v1, 01283; CHECK-NEXT:    v_readlane_b32 s1, v1, 11284; CHECK-NEXT:    buffer_load_dword v1, off, s[0:3], s32 offset:41285; CHECK-NEXT:    s_not_b64 exec, exec1286; CHECK-NEXT:  .LBB1_2: ; %bb31287; CHECK-NEXT:    ;;#ASMSTART1288; CHECK-NEXT:    ; reg use s01289; CHECK-NEXT:    ;;#ASMEND1290; CHECK-NEXT:    ;;#ASMSTART1291; CHECK-NEXT:    ; reg use s11292; CHECK-NEXT:    ;;#ASMEND1293; CHECK-NEXT:    ;;#ASMSTART1294; CHECK-NEXT:    ; reg use s21295; CHECK-NEXT:    ;;#ASMEND1296; CHECK-NEXT:    ;;#ASMSTART1297; CHECK-NEXT:    ; reg use s31298; CHECK-NEXT:    ;;#ASMEND1299; CHECK-NEXT:    ;;#ASMSTART1300; CHECK-NEXT:    ; reg use s41301; CHECK-NEXT:    ;;#ASMEND1302; CHECK-NEXT:    ;;#ASMSTART1303; CHECK-NEXT:    ; reg use s51304; CHECK-NEXT:    ;;#ASMEND1305; CHECK-NEXT:    ;;#ASMSTART1306; CHECK-NEXT:    ; reg use s61307; CHECK-NEXT:    ;;#ASMEND1308; CHECK-NEXT:    ;;#ASMSTART1309; CHECK-NEXT:    ; reg use s71310; CHECK-NEXT:    ;;#ASMEND1311; CHECK-NEXT:    ;;#ASMSTART1312; CHECK-NEXT:    ; reg use s81313; CHECK-NEXT:    ;;#ASMEND1314; CHECK-NEXT:    ;;#ASMSTART1315; CHECK-NEXT:    ; reg use s91316; CHECK-NEXT:    ;;#ASMEND1317; CHECK-NEXT:    ;;#ASMSTART1318; CHECK-NEXT:    ; reg use s101319; CHECK-NEXT:    ;;#ASMEND1320; CHECK-NEXT:    ;;#ASMSTART1321; CHECK-NEXT:    ; reg use s111322; CHECK-NEXT:    ;;#ASMEND1323; CHECK-NEXT:    ;;#ASMSTART1324; CHECK-NEXT:    ; reg use s121325; CHECK-NEXT:    ;;#ASMEND1326; CHECK-NEXT:    ;;#ASMSTART1327; CHECK-NEXT:    ; reg use s131328; CHECK-NEXT:    ;;#ASMEND1329; CHECK-NEXT:    ;;#ASMSTART1330; CHECK-NEXT:    ; reg use s141331; CHECK-NEXT:    ;;#ASMEND1332; CHECK-NEXT:    ;;#ASMSTART1333; CHECK-NEXT:    ; reg use s151334; CHECK-NEXT:    ;;#ASMEND1335; CHECK-NEXT:    ;;#ASMSTART1336; CHECK-NEXT:    ; reg use s161337; CHECK-NEXT:    ;;#ASMEND1338; CHECK-NEXT:    ;;#ASMSTART1339; CHECK-NEXT:    ; reg use s171340; CHECK-NEXT:    ;;#ASMEND1341; CHECK-NEXT:    ;;#ASMSTART1342; CHECK-NEXT:    ; reg use s181343; CHECK-NEXT:    ;;#ASMEND1344; CHECK-NEXT:    ;;#ASMSTART1345; CHECK-NEXT:    ; reg use s191346; CHECK-NEXT:    ;;#ASMEND1347; CHECK-NEXT:    ;;#ASMSTART1348; CHECK-NEXT:    ; reg use s201349; CHECK-NEXT:    ;;#ASMEND1350; CHECK-NEXT:    ;;#ASMSTART1351; CHECK-NEXT:    ; reg use s211352; CHECK-NEXT:    ;;#ASMEND1353; CHECK-NEXT:    ;;#ASMSTART1354; CHECK-NEXT:    ; reg use s221355; CHECK-NEXT:    ;;#ASMEND1356; CHECK-NEXT:    ;;#ASMSTART1357; CHECK-NEXT:    ; reg use s231358; CHECK-NEXT:    ;;#ASMEND1359; CHECK-NEXT:    ;;#ASMSTART1360; CHECK-NEXT:    ; reg use s241361; CHECK-NEXT:    ;;#ASMEND1362; CHECK-NEXT:    ;;#ASMSTART1363; CHECK-NEXT:    ; reg use s251364; CHECK-NEXT:    ;;#ASMEND1365; CHECK-NEXT:    ;;#ASMSTART1366; CHECK-NEXT:    ; reg use s261367; CHECK-NEXT:    ;;#ASMEND1368; CHECK-NEXT:    ;;#ASMSTART1369; CHECK-NEXT:    ; reg use s271370; CHECK-NEXT:    ;;#ASMEND1371; CHECK-NEXT:    ;;#ASMSTART1372; CHECK-NEXT:    ; reg use s281373; CHECK-NEXT:    ;;#ASMEND1374; CHECK-NEXT:    ;;#ASMSTART1375; CHECK-NEXT:    ; reg use s291376; CHECK-NEXT:    ;;#ASMEND1377; CHECK-NEXT:    ;;#ASMSTART1378; CHECK-NEXT:    ; reg use s301379; CHECK-NEXT:    ;;#ASMEND1380; CHECK-NEXT:    ;;#ASMSTART1381; CHECK-NEXT:    ; reg use s311382; CHECK-NEXT:    ;;#ASMEND1383; CHECK-NEXT:    ;;#ASMSTART1384; CHECK-NEXT:    ; reg use s321385; CHECK-NEXT:    ;;#ASMEND1386; CHECK-NEXT:    ;;#ASMSTART1387; CHECK-NEXT:    ; reg use s331388; CHECK-NEXT:    ;;#ASMEND1389; CHECK-NEXT:    ;;#ASMSTART1390; CHECK-NEXT:    ; reg use s341391; CHECK-NEXT:    ;;#ASMEND1392; CHECK-NEXT:    ;;#ASMSTART1393; CHECK-NEXT:    ; reg use s351394; CHECK-NEXT:    ;;#ASMEND1395; CHECK-NEXT:    ;;#ASMSTART1396; CHECK-NEXT:    ; reg use s361397; CHECK-NEXT:    ;;#ASMEND1398; CHECK-NEXT:    ;;#ASMSTART1399; CHECK-NEXT:    ; reg use s371400; CHECK-NEXT:    ;;#ASMEND1401; CHECK-NEXT:    ;;#ASMSTART1402; CHECK-NEXT:    ; reg use s381403; CHECK-NEXT:    ;;#ASMEND1404; CHECK-NEXT:    ;;#ASMSTART1405; CHECK-NEXT:    ; reg use s391406; CHECK-NEXT:    ;;#ASMEND1407; CHECK-NEXT:    ;;#ASMSTART1408; CHECK-NEXT:    ; reg use s401409; CHECK-NEXT:    ;;#ASMEND1410; CHECK-NEXT:    ;;#ASMSTART1411; CHECK-NEXT:    ; reg use s411412; CHECK-NEXT:    ;;#ASMEND1413; CHECK-NEXT:    ;;#ASMSTART1414; CHECK-NEXT:    ; reg use s421415; CHECK-NEXT:    ;;#ASMEND1416; CHECK-NEXT:    ;;#ASMSTART1417; CHECK-NEXT:    ; reg use s431418; CHECK-NEXT:    ;;#ASMEND1419; CHECK-NEXT:    ;;#ASMSTART1420; CHECK-NEXT:    ; reg use s441421; CHECK-NEXT:    ;;#ASMEND1422; CHECK-NEXT:    ;;#ASMSTART1423; CHECK-NEXT:    ; reg use s451424; CHECK-NEXT:    ;;#ASMEND1425; CHECK-NEXT:    ;;#ASMSTART1426; CHECK-NEXT:    ; reg use s461427; CHECK-NEXT:    ;;#ASMEND1428; CHECK-NEXT:    ;;#ASMSTART1429; CHECK-NEXT:    ; reg use s471430; CHECK-NEXT:    ;;#ASMEND1431; CHECK-NEXT:    ;;#ASMSTART1432; CHECK-NEXT:    ; reg use s481433; CHECK-NEXT:    ;;#ASMEND1434; CHECK-NEXT:    ;;#ASMSTART1435; CHECK-NEXT:    ; reg use s491436; CHECK-NEXT:    ;;#ASMEND1437; CHECK-NEXT:    ;;#ASMSTART1438; CHECK-NEXT:    ; reg use s501439; CHECK-NEXT:    ;;#ASMEND1440; CHECK-NEXT:    ;;#ASMSTART1441; CHECK-NEXT:    ; reg use s511442; CHECK-NEXT:    ;;#ASMEND1443; CHECK-NEXT:    ;;#ASMSTART1444; CHECK-NEXT:    ; reg use s521445; CHECK-NEXT:    ;;#ASMEND1446; CHECK-NEXT:    ;;#ASMSTART1447; CHECK-NEXT:    ; reg use s531448; CHECK-NEXT:    ;;#ASMEND1449; CHECK-NEXT:    ;;#ASMSTART1450; CHECK-NEXT:    ; reg use s541451; CHECK-NEXT:    ;;#ASMEND1452; CHECK-NEXT:    ;;#ASMSTART1453; CHECK-NEXT:    ; reg use s551454; CHECK-NEXT:    ;;#ASMEND1455; CHECK-NEXT:    ;;#ASMSTART1456; CHECK-NEXT:    ; reg use s561457; CHECK-NEXT:    ;;#ASMEND1458; CHECK-NEXT:    ;;#ASMSTART1459; CHECK-NEXT:    ; reg use s571460; CHECK-NEXT:    ;;#ASMEND1461; CHECK-NEXT:    ;;#ASMSTART1462; CHECK-NEXT:    ; reg use s581463; CHECK-NEXT:    ;;#ASMEND1464; CHECK-NEXT:    ;;#ASMSTART1465; CHECK-NEXT:    ; reg use s591466; CHECK-NEXT:    ;;#ASMEND1467; CHECK-NEXT:    ;;#ASMSTART1468; CHECK-NEXT:    ; reg use s601469; CHECK-NEXT:    ;;#ASMEND1470; CHECK-NEXT:    ;;#ASMSTART1471; CHECK-NEXT:    ; reg use s611472; CHECK-NEXT:    ;;#ASMEND1473; CHECK-NEXT:    ;;#ASMSTART1474; CHECK-NEXT:    ; reg use s621475; CHECK-NEXT:    ;;#ASMEND1476; CHECK-NEXT:    ;;#ASMSTART1477; CHECK-NEXT:    ; reg use s631478; CHECK-NEXT:    ;;#ASMEND1479; CHECK-NEXT:    ;;#ASMSTART1480; CHECK-NEXT:    ; reg use s641481; CHECK-NEXT:    ;;#ASMEND1482; CHECK-NEXT:    ;;#ASMSTART1483; CHECK-NEXT:    ; reg use s651484; CHECK-NEXT:    ;;#ASMEND1485; CHECK-NEXT:    ;;#ASMSTART1486; CHECK-NEXT:    ; reg use s661487; CHECK-NEXT:    ;;#ASMEND1488; CHECK-NEXT:    ;;#ASMSTART1489; CHECK-NEXT:    ; reg use s671490; CHECK-NEXT:    ;;#ASMEND1491; CHECK-NEXT:    ;;#ASMSTART1492; CHECK-NEXT:    ; reg use s681493; CHECK-NEXT:    ;;#ASMEND1494; CHECK-NEXT:    ;;#ASMSTART1495; CHECK-NEXT:    ; reg use s691496; CHECK-NEXT:    ;;#ASMEND1497; CHECK-NEXT:    ;;#ASMSTART1498; CHECK-NEXT:    ; reg use s701499; CHECK-NEXT:    ;;#ASMEND1500; CHECK-NEXT:    ;;#ASMSTART1501; CHECK-NEXT:    ; reg use s711502; CHECK-NEXT:    ;;#ASMEND1503; CHECK-NEXT:    ;;#ASMSTART1504; CHECK-NEXT:    ; reg use s721505; CHECK-NEXT:    ;;#ASMEND1506; CHECK-NEXT:    ;;#ASMSTART1507; CHECK-NEXT:    ; reg use s731508; CHECK-NEXT:    ;;#ASMEND1509; CHECK-NEXT:    ;;#ASMSTART1510; CHECK-NEXT:    ; reg use s741511; CHECK-NEXT:    ;;#ASMEND1512; CHECK-NEXT:    ;;#ASMSTART1513; CHECK-NEXT:    ; reg use s751514; CHECK-NEXT:    ;;#ASMEND1515; CHECK-NEXT:    ;;#ASMSTART1516; CHECK-NEXT:    ; reg use s761517; CHECK-NEXT:    ;;#ASMEND1518; CHECK-NEXT:    ;;#ASMSTART1519; CHECK-NEXT:    ; reg use s771520; CHECK-NEXT:    ;;#ASMEND1521; CHECK-NEXT:    ;;#ASMSTART1522; CHECK-NEXT:    ; reg use s781523; CHECK-NEXT:    ;;#ASMEND1524; CHECK-NEXT:    ;;#ASMSTART1525; CHECK-NEXT:    ; reg use s791526; CHECK-NEXT:    ;;#ASMEND1527; CHECK-NEXT:    ;;#ASMSTART1528; CHECK-NEXT:    ; reg use s801529; CHECK-NEXT:    ;;#ASMEND1530; CHECK-NEXT:    ;;#ASMSTART1531; CHECK-NEXT:    ; reg use s811532; CHECK-NEXT:    ;;#ASMEND1533; CHECK-NEXT:    ;;#ASMSTART1534; CHECK-NEXT:    ; reg use s821535; CHECK-NEXT:    ;;#ASMEND1536; CHECK-NEXT:    ;;#ASMSTART1537; CHECK-NEXT:    ; reg use s831538; CHECK-NEXT:    ;;#ASMEND1539; CHECK-NEXT:    ;;#ASMSTART1540; CHECK-NEXT:    ; reg use s841541; CHECK-NEXT:    ;;#ASMEND1542; CHECK-NEXT:    ;;#ASMSTART1543; CHECK-NEXT:    ; reg use s851544; CHECK-NEXT:    ;;#ASMEND1545; CHECK-NEXT:    ;;#ASMSTART1546; CHECK-NEXT:    ; reg use s861547; CHECK-NEXT:    ;;#ASMEND1548; CHECK-NEXT:    ;;#ASMSTART1549; CHECK-NEXT:    ; reg use s871550; CHECK-NEXT:    ;;#ASMEND1551; CHECK-NEXT:    ;;#ASMSTART1552; CHECK-NEXT:    ; reg use s881553; CHECK-NEXT:    ;;#ASMEND1554; CHECK-NEXT:    ;;#ASMSTART1555; CHECK-NEXT:    ; reg use s891556; CHECK-NEXT:    ;;#ASMEND1557; CHECK-NEXT:    ;;#ASMSTART1558; CHECK-NEXT:    ; reg use s901559; CHECK-NEXT:    ;;#ASMEND1560; CHECK-NEXT:    ;;#ASMSTART1561; CHECK-NEXT:    ; reg use s911562; CHECK-NEXT:    ;;#ASMEND1563; CHECK-NEXT:    ;;#ASMSTART1564; CHECK-NEXT:    ; reg use s921565; CHECK-NEXT:    ;;#ASMEND1566; CHECK-NEXT:    ;;#ASMSTART1567; CHECK-NEXT:    ; reg use s931568; CHECK-NEXT:    ;;#ASMEND1569; CHECK-NEXT:    ;;#ASMSTART1570; CHECK-NEXT:    ; reg use s941571; CHECK-NEXT:    ;;#ASMEND1572; CHECK-NEXT:    ;;#ASMSTART1573; CHECK-NEXT:    ; reg use s951574; CHECK-NEXT:    ;;#ASMEND1575; CHECK-NEXT:    ;;#ASMSTART1576; CHECK-NEXT:    ; reg use s961577; CHECK-NEXT:    ;;#ASMEND1578; CHECK-NEXT:    ;;#ASMSTART1579; CHECK-NEXT:    ; reg use s971580; CHECK-NEXT:    ;;#ASMEND1581; CHECK-NEXT:    ;;#ASMSTART1582; CHECK-NEXT:    ; reg use s981583; CHECK-NEXT:    ;;#ASMEND1584; CHECK-NEXT:    ;;#ASMSTART1585; CHECK-NEXT:    ; reg use s991586; CHECK-NEXT:    ;;#ASMEND1587; CHECK-NEXT:    ;;#ASMSTART1588; CHECK-NEXT:    ; reg use s1001589; CHECK-NEXT:    ;;#ASMEND1590; CHECK-NEXT:    ;;#ASMSTART1591; CHECK-NEXT:    ; reg use s1011592; CHECK-NEXT:    ;;#ASMEND1593; CHECK-NEXT:    ;;#ASMSTART1594; CHECK-NEXT:    ; reg use vcc_lo1595; CHECK-NEXT:    ;;#ASMEND1596; CHECK-NEXT:    ;;#ASMSTART1597; CHECK-NEXT:    ; reg use vcc_hi1598; CHECK-NEXT:    ;;#ASMEND1599; CHECK-NEXT:    v_readlane_b32 s101, v0, 381600; CHECK-NEXT:    v_readlane_b32 s100, v0, 371601; CHECK-NEXT:    v_readlane_b32 s99, v0, 361602; CHECK-NEXT:    v_readlane_b32 s98, v0, 351603; CHECK-NEXT:    v_readlane_b32 s97, v0, 341604; CHECK-NEXT:    v_readlane_b32 s96, v0, 331605; CHECK-NEXT:    v_readlane_b32 s87, v0, 321606; CHECK-NEXT:    v_readlane_b32 s86, v0, 311607; CHECK-NEXT:    v_readlane_b32 s85, v0, 301608; CHECK-NEXT:    v_readlane_b32 s84, v0, 291609; CHECK-NEXT:    v_readlane_b32 s83, v0, 281610; CHECK-NEXT:    v_readlane_b32 s82, v0, 271611; CHECK-NEXT:    v_readlane_b32 s81, v0, 261612; CHECK-NEXT:    v_readlane_b32 s80, v0, 251613; CHECK-NEXT:    v_readlane_b32 s71, v0, 241614; CHECK-NEXT:    v_readlane_b32 s70, v0, 231615; CHECK-NEXT:    v_readlane_b32 s69, v0, 221616; CHECK-NEXT:    v_readlane_b32 s68, v0, 211617; CHECK-NEXT:    v_readlane_b32 s67, v0, 201618; CHECK-NEXT:    v_readlane_b32 s66, v0, 191619; CHECK-NEXT:    v_readlane_b32 s65, v0, 181620; CHECK-NEXT:    v_readlane_b32 s64, v0, 171621; CHECK-NEXT:    v_readlane_b32 s55, v0, 161622; CHECK-NEXT:    v_readlane_b32 s54, v0, 151623; CHECK-NEXT:    v_readlane_b32 s53, v0, 141624; CHECK-NEXT:    v_readlane_b32 s52, v0, 131625; CHECK-NEXT:    v_readlane_b32 s51, v0, 121626; CHECK-NEXT:    v_readlane_b32 s50, v0, 111627; CHECK-NEXT:    v_readlane_b32 s49, v0, 101628; CHECK-NEXT:    v_readlane_b32 s48, v0, 91629; CHECK-NEXT:    v_readlane_b32 s39, v0, 81630; CHECK-NEXT:    v_readlane_b32 s38, v0, 71631; CHECK-NEXT:    v_readlane_b32 s37, v0, 61632; CHECK-NEXT:    v_readlane_b32 s36, v0, 51633; CHECK-NEXT:    v_readlane_b32 s35, v0, 41634; CHECK-NEXT:    v_readlane_b32 s34, v0, 31635; CHECK-NEXT:    v_readlane_b32 s33, v0, 21636; CHECK-NEXT:    v_readlane_b32 s31, v0, 11637; CHECK-NEXT:    v_readlane_b32 s30, v0, 01638; CHECK-NEXT:    s_xor_saveexec_b64 s[4:5], -11639; CHECK-NEXT:    buffer_load_dword v0, off, s[0:3], s32 ; 4-byte Folded Reload1640; CHECK-NEXT:    s_mov_b64 exec, s[4:5]1641; CHECK-NEXT:    s_waitcnt vmcnt(0)1642; CHECK-NEXT:    s_setpc_b64 s[30:31]1643entry:1644  %cnd = tail call i32 @llvm.amdgcn.workgroup.id.x() #01645  %sgpr0 = tail call i32 asm sideeffect "s_mov_b32 s0, 0", "={s0}"() #01646  %sgpr1 = tail call i32 asm sideeffect "s_mov_b32 s1, 0", "={s1}"() #01647  %sgpr2 = tail call i32 asm sideeffect "s_mov_b32 s2, 0", "={s2}"() #01648  %sgpr3 = tail call i32 asm sideeffect "s_mov_b32 s3, 0", "={s3}"() #01649  %sgpr4 = tail call i32 asm sideeffect "s_mov_b32 s4, 0", "={s4}"() #01650  %sgpr5 = tail call i32 asm sideeffect "s_mov_b32 s5, 0", "={s5}"() #01651  %sgpr6 = tail call i32 asm sideeffect "s_mov_b32 s6, 0", "={s6}"() #01652  %sgpr7 = tail call i32 asm sideeffect "s_mov_b32 s7, 0", "={s7}"() #01653  %sgpr8 = tail call i32 asm sideeffect "s_mov_b32 s8, 0", "={s8}"() #01654  %sgpr9 = tail call i32 asm sideeffect "s_mov_b32 s9, 0", "={s9}"() #01655  %sgpr10 = tail call i32 asm sideeffect "s_mov_b32 s10, 0", "={s10}"() #01656  %sgpr11 = tail call i32 asm sideeffect "s_mov_b32 s11, 0", "={s11}"() #01657  %sgpr12 = tail call i32 asm sideeffect "s_mov_b32 s12, 0", "={s12}"() #01658  %sgpr13 = tail call i32 asm sideeffect "s_mov_b32 s13, 0", "={s13}"() #01659  %sgpr14 = tail call i32 asm sideeffect "s_mov_b32 s14, 0", "={s14}"() #01660  %sgpr15 = tail call i32 asm sideeffect "s_mov_b32 s15, 0", "={s15}"() #01661  %sgpr16 = tail call i32 asm sideeffect "s_mov_b32 s16, 0", "={s16}"() #01662  %sgpr17 = tail call i32 asm sideeffect "s_mov_b32 s17, 0", "={s17}"() #01663  %sgpr18 = tail call i32 asm sideeffect "s_mov_b32 s18, 0", "={s18}"() #01664  %sgpr19 = tail call i32 asm sideeffect "s_mov_b32 s19, 0", "={s19}"() #01665  %sgpr20 = tail call i32 asm sideeffect "s_mov_b32 s20, 0", "={s20}"() #01666  %sgpr21 = tail call i32 asm sideeffect "s_mov_b32 s21, 0", "={s21}"() #01667  %sgpr22 = tail call i32 asm sideeffect "s_mov_b32 s22, 0", "={s22}"() #01668  %sgpr23 = tail call i32 asm sideeffect "s_mov_b32 s23, 0", "={s23}"() #01669  %sgpr24 = tail call i32 asm sideeffect "s_mov_b32 s24, 0", "={s24}"() #01670  %sgpr25 = tail call i32 asm sideeffect "s_mov_b32 s25, 0", "={s25}"() #01671  %sgpr26 = tail call i32 asm sideeffect "s_mov_b32 s26, 0", "={s26}"() #01672  %sgpr27 = tail call i32 asm sideeffect "s_mov_b32 s27, 0", "={s27}"() #01673  %sgpr28 = tail call i32 asm sideeffect "s_mov_b32 s28, 0", "={s28}"() #01674  %sgpr29 = tail call i32 asm sideeffect "s_mov_b32 s29, 0", "={s29}"() #01675  %sgpr30 = tail call i32 asm sideeffect "s_mov_b32 s30, 0", "={s30}"() #01676  %sgpr31 = tail call i32 asm sideeffect "s_mov_b32 s31, 0", "={s31}"() #01677  %sgpr32 = tail call i32 asm sideeffect "s_mov_b32 s32, 0", "={s32}"() #01678  %sgpr33 = tail call i32 asm sideeffect "s_mov_b32 s33, 0", "={s33}"() #01679  %sgpr34 = tail call i32 asm sideeffect "s_mov_b32 s34, 0", "={s34}"() #01680  %sgpr35 = tail call i32 asm sideeffect "s_mov_b32 s35, 0", "={s35}"() #01681  %sgpr36 = tail call i32 asm sideeffect "s_mov_b32 s36, 0", "={s36}"() #01682  %sgpr37 = tail call i32 asm sideeffect "s_mov_b32 s37, 0", "={s37}"() #01683  %sgpr38 = tail call i32 asm sideeffect "s_mov_b32 s38, 0", "={s38}"() #01684  %sgpr39 = tail call i32 asm sideeffect "s_mov_b32 s39, 0", "={s39}"() #01685  %sgpr40 = tail call i32 asm sideeffect "s_mov_b32 s40, 0", "={s40}"() #01686  %sgpr41 = tail call i32 asm sideeffect "s_mov_b32 s41, 0", "={s41}"() #01687  %sgpr42 = tail call i32 asm sideeffect "s_mov_b32 s42, 0", "={s42}"() #01688  %sgpr43 = tail call i32 asm sideeffect "s_mov_b32 s43, 0", "={s43}"() #01689  %sgpr44 = tail call i32 asm sideeffect "s_mov_b32 s44, 0", "={s44}"() #01690  %sgpr45 = tail call i32 asm sideeffect "s_mov_b32 s45, 0", "={s45}"() #01691  %sgpr46 = tail call i32 asm sideeffect "s_mov_b32 s46, 0", "={s46}"() #01692  %sgpr47 = tail call i32 asm sideeffect "s_mov_b32 s47, 0", "={s47}"() #01693  %sgpr48 = tail call i32 asm sideeffect "s_mov_b32 s48, 0", "={s48}"() #01694  %sgpr49 = tail call i32 asm sideeffect "s_mov_b32 s49, 0", "={s49}"() #01695  %sgpr50 = tail call i32 asm sideeffect "s_mov_b32 s50, 0", "={s50}"() #01696  %sgpr51 = tail call i32 asm sideeffect "s_mov_b32 s51, 0", "={s51}"() #01697  %sgpr52 = tail call i32 asm sideeffect "s_mov_b32 s52, 0", "={s52}"() #01698  %sgpr53 = tail call i32 asm sideeffect "s_mov_b32 s53, 0", "={s53}"() #01699  %sgpr54 = tail call i32 asm sideeffect "s_mov_b32 s54, 0", "={s54}"() #01700  %sgpr55 = tail call i32 asm sideeffect "s_mov_b32 s55, 0", "={s55}"() #01701  %sgpr56 = tail call i32 asm sideeffect "s_mov_b32 s56, 0", "={s56}"() #01702  %sgpr57 = tail call i32 asm sideeffect "s_mov_b32 s57, 0", "={s57}"() #01703  %sgpr58 = tail call i32 asm sideeffect "s_mov_b32 s58, 0", "={s58}"() #01704  %sgpr59 = tail call i32 asm sideeffect "s_mov_b32 s59, 0", "={s59}"() #01705  %sgpr60 = tail call i32 asm sideeffect "s_mov_b32 s60, 0", "={s60}"() #01706  %sgpr61 = tail call i32 asm sideeffect "s_mov_b32 s61, 0", "={s61}"() #01707  %sgpr62 = tail call i32 asm sideeffect "s_mov_b32 s62, 0", "={s62}"() #01708  %sgpr63 = tail call i32 asm sideeffect "s_mov_b32 s63, 0", "={s63}"() #01709  %sgpr64 = tail call i32 asm sideeffect "s_mov_b32 s64, 0", "={s64}"() #01710  %sgpr65 = tail call i32 asm sideeffect "s_mov_b32 s65, 0", "={s65}"() #01711  %sgpr66 = tail call i32 asm sideeffect "s_mov_b32 s66, 0", "={s66}"() #01712  %sgpr67 = tail call i32 asm sideeffect "s_mov_b32 s67, 0", "={s67}"() #01713  %sgpr68 = tail call i32 asm sideeffect "s_mov_b32 s68, 0", "={s68}"() #01714  %sgpr69 = tail call i32 asm sideeffect "s_mov_b32 s69, 0", "={s69}"() #01715  %sgpr70 = tail call i32 asm sideeffect "s_mov_b32 s70, 0", "={s70}"() #01716  %sgpr71 = tail call i32 asm sideeffect "s_mov_b32 s71, 0", "={s71}"() #01717  %sgpr72 = tail call i32 asm sideeffect "s_mov_b32 s72, 0", "={s72}"() #01718  %sgpr73 = tail call i32 asm sideeffect "s_mov_b32 s73, 0", "={s73}"() #01719  %sgpr74 = tail call i32 asm sideeffect "s_mov_b32 s74, 0", "={s74}"() #01720  %sgpr75 = tail call i32 asm sideeffect "s_mov_b32 s75, 0", "={s75}"() #01721  %sgpr76 = tail call i32 asm sideeffect "s_mov_b32 s76, 0", "={s76}"() #01722  %sgpr77 = tail call i32 asm sideeffect "s_mov_b32 s77, 0", "={s77}"() #01723  %sgpr78 = tail call i32 asm sideeffect "s_mov_b32 s78, 0", "={s78}"() #01724  %sgpr79 = tail call i32 asm sideeffect "s_mov_b32 s79, 0", "={s79}"() #01725  %sgpr80 = tail call i32 asm sideeffect "s_mov_b32 s80, 0", "={s80}"() #01726  %sgpr81 = tail call i32 asm sideeffect "s_mov_b32 s81, 0", "={s81}"() #01727  %sgpr82 = tail call i32 asm sideeffect "s_mov_b32 s82, 0", "={s82}"() #01728  %sgpr83 = tail call i32 asm sideeffect "s_mov_b32 s83, 0", "={s83}"() #01729  %sgpr84 = tail call i32 asm sideeffect "s_mov_b32 s84, 0", "={s84}"() #01730  %sgpr85 = tail call i32 asm sideeffect "s_mov_b32 s85, 0", "={s85}"() #01731  %sgpr86 = tail call i32 asm sideeffect "s_mov_b32 s86, 0", "={s86}"() #01732  %sgpr87 = tail call i32 asm sideeffect "s_mov_b32 s87, 0", "={s87}"() #01733  %sgpr88 = tail call i32 asm sideeffect "s_mov_b32 s88, 0", "={s88}"() #01734  %sgpr89 = tail call i32 asm sideeffect "s_mov_b32 s89, 0", "={s89}"() #01735  %sgpr90 = tail call i32 asm sideeffect "s_mov_b32 s90, 0", "={s90}"() #01736  %sgpr91 = tail call i32 asm sideeffect "s_mov_b32 s91, 0", "={s91}"() #01737  %sgpr92 = tail call i32 asm sideeffect "s_mov_b32 s92, 0", "={s92}"() #01738  %sgpr93 = tail call i32 asm sideeffect "s_mov_b32 s93, 0", "={s93}"() #01739  %sgpr94 = tail call i32 asm sideeffect "s_mov_b32 s94, 0", "={s94}"() #01740  %sgpr95 = tail call i32 asm sideeffect "s_mov_b32 s95, 0", "={s95}"() #01741  %sgpr96 = tail call i32 asm sideeffect "s_mov_b32 s96, 0", "={s96}"() #01742  %sgpr97 = tail call i32 asm sideeffect "s_mov_b32 s97, 0", "={s97}"() #01743  %sgpr98 = tail call i32 asm sideeffect "s_mov_b32 s98, 0", "={s98}"() #01744  %sgpr99 = tail call i32 asm sideeffect "s_mov_b32 s99, 0", "={s99}"() #01745  %sgpr100 = tail call i32 asm sideeffect "s_mov_b32 s100, 0", "={s100}"() #01746  %sgpr101 = tail call i32 asm sideeffect "s_mov_b32 s101, 0", "={s101}"() #01747  %vcc_lo = tail call i32 asm sideeffect "s_mov_b32 $0, 0", "={vcc_lo}"() #01748  %vcc_hi = tail call i32 asm sideeffect "s_mov_b32 $0, 0", "={vcc_hi}"() #01749  %cmp = icmp eq i32 %cnd, 01750  br i1 %cmp, label %bb3, label %bb2 ; +8 dword branch1751 1752bb2: ; 68 bytes1753  ; 64 byte asm1754  call void asm sideeffect1755   "v_nop_e641756    v_nop_e641757    v_nop_e641758    v_nop_e641759    v_nop_e641760    v_nop_e641761    v_nop_e641762    v_nop_e64",""() #01763  br label %bb31764 1765bb3:1766  tail call void asm sideeffect "; reg use $0", "{s0}"(i32 %sgpr0) #01767  tail call void asm sideeffect "; reg use $0", "{s1}"(i32 %sgpr1) #01768  tail call void asm sideeffect "; reg use $0", "{s2}"(i32 %sgpr2) #01769  tail call void asm sideeffect "; reg use $0", "{s3}"(i32 %sgpr3) #01770  tail call void asm sideeffect "; reg use $0", "{s4}"(i32 %sgpr4) #01771  tail call void asm sideeffect "; reg use $0", "{s5}"(i32 %sgpr5) #01772  tail call void asm sideeffect "; reg use $0", "{s6}"(i32 %sgpr6) #01773  tail call void asm sideeffect "; reg use $0", "{s7}"(i32 %sgpr7) #01774  tail call void asm sideeffect "; reg use $0", "{s8}"(i32 %sgpr8) #01775  tail call void asm sideeffect "; reg use $0", "{s9}"(i32 %sgpr9) #01776  tail call void asm sideeffect "; reg use $0", "{s10}"(i32 %sgpr10) #01777  tail call void asm sideeffect "; reg use $0", "{s11}"(i32 %sgpr11) #01778  tail call void asm sideeffect "; reg use $0", "{s12}"(i32 %sgpr12) #01779  tail call void asm sideeffect "; reg use $0", "{s13}"(i32 %sgpr13) #01780  tail call void asm sideeffect "; reg use $0", "{s14}"(i32 %sgpr14) #01781  tail call void asm sideeffect "; reg use $0", "{s15}"(i32 %sgpr15) #01782  tail call void asm sideeffect "; reg use $0", "{s16}"(i32 %sgpr16) #01783  tail call void asm sideeffect "; reg use $0", "{s17}"(i32 %sgpr17) #01784  tail call void asm sideeffect "; reg use $0", "{s18}"(i32 %sgpr18) #01785  tail call void asm sideeffect "; reg use $0", "{s19}"(i32 %sgpr19) #01786  tail call void asm sideeffect "; reg use $0", "{s20}"(i32 %sgpr20) #01787  tail call void asm sideeffect "; reg use $0", "{s21}"(i32 %sgpr21) #01788  tail call void asm sideeffect "; reg use $0", "{s22}"(i32 %sgpr22) #01789  tail call void asm sideeffect "; reg use $0", "{s23}"(i32 %sgpr23) #01790  tail call void asm sideeffect "; reg use $0", "{s24}"(i32 %sgpr24) #01791  tail call void asm sideeffect "; reg use $0", "{s25}"(i32 %sgpr25) #01792  tail call void asm sideeffect "; reg use $0", "{s26}"(i32 %sgpr26) #01793  tail call void asm sideeffect "; reg use $0", "{s27}"(i32 %sgpr27) #01794  tail call void asm sideeffect "; reg use $0", "{s28}"(i32 %sgpr28) #01795  tail call void asm sideeffect "; reg use $0", "{s29}"(i32 %sgpr29) #01796  tail call void asm sideeffect "; reg use $0", "{s30}"(i32 %sgpr30) #01797  tail call void asm sideeffect "; reg use $0", "{s31}"(i32 %sgpr31) #01798  tail call void asm sideeffect "; reg use $0", "{s32}"(i32 %sgpr32) #01799  tail call void asm sideeffect "; reg use $0", "{s33}"(i32 %sgpr33) #01800  tail call void asm sideeffect "; reg use $0", "{s34}"(i32 %sgpr34) #01801  tail call void asm sideeffect "; reg use $0", "{s35}"(i32 %sgpr35) #01802  tail call void asm sideeffect "; reg use $0", "{s36}"(i32 %sgpr36) #01803  tail call void asm sideeffect "; reg use $0", "{s37}"(i32 %sgpr37) #01804  tail call void asm sideeffect "; reg use $0", "{s38}"(i32 %sgpr38) #01805  tail call void asm sideeffect "; reg use $0", "{s39}"(i32 %sgpr39) #01806  tail call void asm sideeffect "; reg use $0", "{s40}"(i32 %sgpr40) #01807  tail call void asm sideeffect "; reg use $0", "{s41}"(i32 %sgpr41) #01808  tail call void asm sideeffect "; reg use $0", "{s42}"(i32 %sgpr42) #01809  tail call void asm sideeffect "; reg use $0", "{s43}"(i32 %sgpr43) #01810  tail call void asm sideeffect "; reg use $0", "{s44}"(i32 %sgpr44) #01811  tail call void asm sideeffect "; reg use $0", "{s45}"(i32 %sgpr45) #01812  tail call void asm sideeffect "; reg use $0", "{s46}"(i32 %sgpr46) #01813  tail call void asm sideeffect "; reg use $0", "{s47}"(i32 %sgpr47) #01814  tail call void asm sideeffect "; reg use $0", "{s48}"(i32 %sgpr48) #01815  tail call void asm sideeffect "; reg use $0", "{s49}"(i32 %sgpr49) #01816  tail call void asm sideeffect "; reg use $0", "{s50}"(i32 %sgpr50) #01817  tail call void asm sideeffect "; reg use $0", "{s51}"(i32 %sgpr51) #01818  tail call void asm sideeffect "; reg use $0", "{s52}"(i32 %sgpr52) #01819  tail call void asm sideeffect "; reg use $0", "{s53}"(i32 %sgpr53) #01820  tail call void asm sideeffect "; reg use $0", "{s54}"(i32 %sgpr54) #01821  tail call void asm sideeffect "; reg use $0", "{s55}"(i32 %sgpr55) #01822  tail call void asm sideeffect "; reg use $0", "{s56}"(i32 %sgpr56) #01823  tail call void asm sideeffect "; reg use $0", "{s57}"(i32 %sgpr57) #01824  tail call void asm sideeffect "; reg use $0", "{s58}"(i32 %sgpr58) #01825  tail call void asm sideeffect "; reg use $0", "{s59}"(i32 %sgpr59) #01826  tail call void asm sideeffect "; reg use $0", "{s60}"(i32 %sgpr60) #01827  tail call void asm sideeffect "; reg use $0", "{s61}"(i32 %sgpr61) #01828  tail call void asm sideeffect "; reg use $0", "{s62}"(i32 %sgpr62) #01829  tail call void asm sideeffect "; reg use $0", "{s63}"(i32 %sgpr63) #01830  tail call void asm sideeffect "; reg use $0", "{s64}"(i32 %sgpr64) #01831  tail call void asm sideeffect "; reg use $0", "{s65}"(i32 %sgpr65) #01832  tail call void asm sideeffect "; reg use $0", "{s66}"(i32 %sgpr66) #01833  tail call void asm sideeffect "; reg use $0", "{s67}"(i32 %sgpr67) #01834  tail call void asm sideeffect "; reg use $0", "{s68}"(i32 %sgpr68) #01835  tail call void asm sideeffect "; reg use $0", "{s69}"(i32 %sgpr69) #01836  tail call void asm sideeffect "; reg use $0", "{s70}"(i32 %sgpr70) #01837  tail call void asm sideeffect "; reg use $0", "{s71}"(i32 %sgpr71) #01838  tail call void asm sideeffect "; reg use $0", "{s72}"(i32 %sgpr72) #01839  tail call void asm sideeffect "; reg use $0", "{s73}"(i32 %sgpr73) #01840  tail call void asm sideeffect "; reg use $0", "{s74}"(i32 %sgpr74) #01841  tail call void asm sideeffect "; reg use $0", "{s75}"(i32 %sgpr75) #01842  tail call void asm sideeffect "; reg use $0", "{s76}"(i32 %sgpr76) #01843  tail call void asm sideeffect "; reg use $0", "{s77}"(i32 %sgpr77) #01844  tail call void asm sideeffect "; reg use $0", "{s78}"(i32 %sgpr78) #01845  tail call void asm sideeffect "; reg use $0", "{s79}"(i32 %sgpr79) #01846  tail call void asm sideeffect "; reg use $0", "{s80}"(i32 %sgpr80) #01847  tail call void asm sideeffect "; reg use $0", "{s81}"(i32 %sgpr81) #01848  tail call void asm sideeffect "; reg use $0", "{s82}"(i32 %sgpr82) #01849  tail call void asm sideeffect "; reg use $0", "{s83}"(i32 %sgpr83) #01850  tail call void asm sideeffect "; reg use $0", "{s84}"(i32 %sgpr84) #01851  tail call void asm sideeffect "; reg use $0", "{s85}"(i32 %sgpr85) #01852  tail call void asm sideeffect "; reg use $0", "{s86}"(i32 %sgpr86) #01853  tail call void asm sideeffect "; reg use $0", "{s87}"(i32 %sgpr87) #01854  tail call void asm sideeffect "; reg use $0", "{s88}"(i32 %sgpr88) #01855  tail call void asm sideeffect "; reg use $0", "{s89}"(i32 %sgpr89) #01856  tail call void asm sideeffect "; reg use $0", "{s90}"(i32 %sgpr90) #01857  tail call void asm sideeffect "; reg use $0", "{s91}"(i32 %sgpr91) #01858  tail call void asm sideeffect "; reg use $0", "{s92}"(i32 %sgpr92) #01859  tail call void asm sideeffect "; reg use $0", "{s93}"(i32 %sgpr93) #01860  tail call void asm sideeffect "; reg use $0", "{s94}"(i32 %sgpr94) #01861  tail call void asm sideeffect "; reg use $0", "{s95}"(i32 %sgpr95) #01862  tail call void asm sideeffect "; reg use $0", "{s96}"(i32 %sgpr96) #01863  tail call void asm sideeffect "; reg use $0", "{s97}"(i32 %sgpr97) #01864  tail call void asm sideeffect "; reg use $0", "{s98}"(i32 %sgpr98) #01865  tail call void asm sideeffect "; reg use $0", "{s99}"(i32 %sgpr99) #01866  tail call void asm sideeffect "; reg use $0", "{s100}"(i32 %sgpr100) #01867  tail call void asm sideeffect "; reg use $0", "{s101}"(i32 %sgpr101) #01868  tail call void asm sideeffect "; reg use $0", "{vcc_lo}"(i32 %vcc_lo) #01869  tail call void asm sideeffect "; reg use $0", "{vcc_hi}"(i32 %vcc_hi) #01870  ret void1871}1872 1873declare i32 @llvm.amdgcn.workgroup.id.x() #01874 1875attributes #0 = { nounwind }1876