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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -amdgpu-s-branch-bits=4 -mattr=+real-true16 < %s | FileCheck -enable-var-scope -check-prefixes=GFX11 %s3 4; Make sure the inst size estimate for D16 pseudo insts are not 05 6define amdgpu_kernel void @long_forward_branch_gfx11plus(ptr addrspace(1) %in, ptr addrspace(1) %out, i32 %cnd) #0 {7; GFX11-LABEL: long_forward_branch_gfx11plus:8; GFX11: ; %bb.0: ; %bb09; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x3410; GFX11-NEXT: s_waitcnt lgkmcnt(0)11; GFX11-NEXT: s_cmp_eq_u32 s0, 012; GFX11-NEXT: s_cbranch_scc0 .LBB0_113; GFX11-NEXT: ; %bb.3: ; %bb014; GFX11-NEXT: s_getpc_b64 s[6:7]15; GFX11-NEXT: .Lpost_getpc0:16; GFX11-NEXT: s_add_u32 s6, s6, (.LBB0_2-.Lpost_getpc0)&429496729517; GFX11-NEXT: s_addc_u32 s7, s7, (.LBB0_2-.Lpost_getpc0)>>3218; GFX11-NEXT: s_setpc_b64 s[6:7]19; GFX11-NEXT: .LBB0_1: ; %bb220; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2421; GFX11-NEXT: v_mov_b32_e32 v1, 022; GFX11-NEXT: s_waitcnt lgkmcnt(0)23; GFX11-NEXT: s_clause 0x124; GFX11-NEXT: global_load_d16_b16 v0, v1, s[0:1]25; GFX11-NEXT: global_load_d16_hi_b16 v0, v1, s[0:1] offset:226; GFX11-NEXT: s_waitcnt vmcnt(0)27; GFX11-NEXT: s_clause 0x128; GFX11-NEXT: global_store_b16 v1, v0, s[2:3]29; GFX11-NEXT: global_store_d16_hi_b16 v1, v0, s[2:3] offset:230; GFX11-NEXT: .LBB0_2: ; %bb331; GFX11-NEXT: s_endpgm32bb0:33 ;%idx = call i32 @llvm.amdgcn.workitem.id.x()34 %gep0 = getelementptr inbounds i16, ptr addrspace(1) %in, i32 035 %gep1 = getelementptr inbounds i16, ptr addrspace(1) %in, i32 136 %out0 = getelementptr inbounds i16, ptr addrspace(1) %out, i32 037 %out1 = getelementptr inbounds i16, ptr addrspace(1) %out, i32 138 %cmp = icmp eq i32 %cnd, 039 br i1 %cmp, label %bb3, label %bb2 ; +9 dword branch40bb2:41 ; Estimated as 32-bytes on gfx11 (requiring a long branch)42 %load0 = load i16, ptr addrspace(1) %gep043 %load1 = load i16, ptr addrspace(1) %gep144 store i16 %load0, ptr addrspace(1) %out045 store i16 %load1, ptr addrspace(1) %out146 br label %bb347bb3:48 ret void49}50 51declare i32 @llvm.amdgcn.workitem.id.x() #152