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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=tahiti -amdgpu-s-branch-bits=4 -simplifycfg-require-and-preserve-domtree=1 -amdgpu-long-branch-factor=0 < %s | FileCheck -enable-var-scope -check-prefix=GCN %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -amdgpu-s-branch-bits=5 -simplifycfg-require-and-preserve-domtree=1 -amdgpu-long-branch-factor=0 < %s | FileCheck -enable-var-scope -check-prefix=GFX11 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -amdgpu-s-branch-bits=5 -simplifycfg-require-and-preserve-domtree=1 -amdgpu-long-branch-factor=0 < %s | FileCheck -enable-var-scope -check-prefix=GFX12 %s5 6 7; FIXME: We should use llvm-mc for this, but we can't even parse our own output.8; See PR33579.9; RUN: llc -mtriple=amdgcn -amdgpu-s-branch-bits=4 -amdgpu-long-branch-factor=0 -o %t.o -filetype=obj -simplifycfg-require-and-preserve-domtree=1 %s10; RUN: llvm-readobj -r %t.o | FileCheck --check-prefix=OBJ %s11 12; OBJ: Relocations [13; OBJ-NEXT: ]14 15; Restrict maximum branch to between +7 and -8 dwords16 17; Used to emit an always 4 byte instruction. Inline asm always assumes18; each instruction is the maximum size.19declare void @llvm.amdgcn.s.sleep(i32) #020 21declare i32 @llvm.amdgcn.workitem.id.x() #122 23 24define amdgpu_kernel void @uniform_conditional_max_short_forward_branch(ptr addrspace(1) %arg, i32 %cnd) #0 {25; GCN-LABEL: uniform_conditional_max_short_forward_branch:26; GCN: ; %bb.0: ; %bb27; GCN-NEXT: s_load_dword s0, s[4:5], 0xb28; GCN-NEXT: s_waitcnt lgkmcnt(0)29; GCN-NEXT: s_cmp_eq_u32 s0, 030; GCN-NEXT: s_cbranch_scc1 .LBB0_231; GCN-NEXT: ; %bb.1: ; %bb232; GCN-NEXT: ;;#ASMSTART33; GCN-NEXT: v_nop_e6434; GCN-NEXT: v_nop_e6435; GCN-NEXT: v_nop_e6436; GCN-NEXT: ;;#ASMEND37; GCN-NEXT: s_sleep 038; GCN-NEXT: .LBB0_2: ; %bb339; GCN-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x940; GCN-NEXT: s_mov_b32 s7, 0xf00041; GCN-NEXT: s_mov_b32 s6, -142; GCN-NEXT: v_mov_b32_e32 v0, s043; GCN-NEXT: s_waitcnt lgkmcnt(0)44; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 045; GCN-NEXT: s_waitcnt vmcnt(0)46; GCN-NEXT: s_endpgm47;48; GFX11-LABEL: uniform_conditional_max_short_forward_branch:49; GFX11: ; %bb.0: ; %bb50; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x2c51; GFX11-NEXT: s_waitcnt lgkmcnt(0)52; GFX11-NEXT: s_cmp_eq_u32 s0, 053; GFX11-NEXT: s_cbranch_scc0 .LBB0_154; GFX11-NEXT: ; %bb.3: ; %bb55; GFX11-NEXT: s_getpc_b64 s[2:3]56; GFX11-NEXT: .Lpost_getpc0:57; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)58; GFX11-NEXT: s_add_u32 s2, s2, (.LBB0_2-.Lpost_getpc0)&429496729559; GFX11-NEXT: s_addc_u32 s3, s3, (.LBB0_2-.Lpost_getpc0)>>3260; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)61; GFX11-NEXT: s_setpc_b64 s[2:3]62; GFX11-NEXT: .LBB0_1: ; %bb263; GFX11-NEXT: ;;#ASMSTART64; GFX11-NEXT: v_nop_e6465; GFX11-NEXT: v_nop_e6466; GFX11-NEXT: v_nop_e6467; GFX11-NEXT: ;;#ASMEND68; GFX11-NEXT: s_sleep 069; GFX11-NEXT: .LBB0_2: ; %bb370; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x2471; GFX11-NEXT: v_mov_b32_e32 v0, 072; GFX11-NEXT: v_mov_b32_e32 v1, s073; GFX11-NEXT: s_waitcnt lgkmcnt(0)74; GFX11-NEXT: global_store_b32 v0, v1, s[2:3] dlc75; GFX11-NEXT: s_waitcnt_vscnt null, 0x076; GFX11-NEXT: s_endpgm77;78; GFX12-LABEL: uniform_conditional_max_short_forward_branch:79; GFX12: ; %bb.0: ; %bb80; GFX12-NEXT: s_load_b32 s0, s[4:5], 0x2c81; GFX12-NEXT: s_wait_kmcnt 0x082; GFX12-NEXT: s_cmp_eq_u32 s0, 083; GFX12-NEXT: s_cbranch_scc0 .LBB0_184; GFX12-NEXT: ; %bb.3: ; %bb85; GFX12-NEXT: s_getpc_b64 s[2:3]86; GFX12-NEXT: .Lpost_getpc0:87; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)88; GFX12-NEXT: s_add_co_u32 s2, s2, (.LBB0_2-.Lpost_getpc0)&429496729589; GFX12-NEXT: s_add_co_ci_u32 s3, s3, (.LBB0_2-.Lpost_getpc0)>>3290; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)91; GFX12-NEXT: s_setpc_b64 s[2:3]92; GFX12-NEXT: .LBB0_1: ; %bb293; GFX12-NEXT: ;;#ASMSTART94; GFX12-NEXT: v_nop_e6495; GFX12-NEXT: v_nop_e6496; GFX12-NEXT: v_nop_e6497; GFX12-NEXT: ;;#ASMEND98; GFX12-NEXT: s_sleep 099; GFX12-NEXT: .LBB0_2: ; %bb3100; GFX12-NEXT: s_load_b64 s[2:3], s[4:5], 0x24101; GFX12-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0102; GFX12-NEXT: s_wait_kmcnt 0x0103; GFX12-NEXT: global_store_b32 v0, v1, s[2:3] scope:SCOPE_SYS104; GFX12-NEXT: s_wait_storecnt 0x0105; GFX12-NEXT: s_endpgm106bb:107 %cmp = icmp eq i32 %cnd, 0108 br i1 %cmp, label %bb3, label %bb2 ; +8 dword branch109 110bb2:111; 24 bytes112 call void asm sideeffect113 "v_nop_e64114 v_nop_e64115 v_nop_e64", ""() #0116 call void @llvm.amdgcn.s.sleep(i32 0)117 br label %bb3118 119bb3:120 store volatile i32 %cnd, ptr addrspace(1) %arg121 ret void122}123 124define amdgpu_kernel void @uniform_conditional_min_long_forward_branch(ptr addrspace(1) %arg, i32 %cnd) #0 {125; GCN-LABEL: uniform_conditional_min_long_forward_branch:126; GCN: ; %bb.0: ; %bb0127; GCN-NEXT: s_load_dword s0, s[4:5], 0xb128; GCN-NEXT: s_waitcnt lgkmcnt(0)129; GCN-NEXT: s_cmp_eq_u32 s0, 0130; GCN-NEXT: s_cbranch_scc0 .LBB1_1131; GCN-NEXT: ; %bb.3: ; %bb0132; GCN-NEXT: s_getpc_b64 s[2:3]133; GCN-NEXT: .Lpost_getpc0:134; GCN-NEXT: s_add_u32 s2, s2, (.LBB1_2-.Lpost_getpc0)&4294967295135; GCN-NEXT: s_addc_u32 s3, s3, (.LBB1_2-.Lpost_getpc0)>>32136; GCN-NEXT: s_setpc_b64 s[2:3]137; GCN-NEXT: .LBB1_1: ; %bb2138; GCN-NEXT: ;;#ASMSTART139; GCN-NEXT: v_nop_e64140; GCN-NEXT: v_nop_e64141; GCN-NEXT: v_nop_e64142; GCN-NEXT: v_nop_e64143; GCN-NEXT: ;;#ASMEND144; GCN-NEXT: .LBB1_2: ; %bb3145; GCN-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x9146; GCN-NEXT: s_mov_b32 s7, 0xf000147; GCN-NEXT: s_mov_b32 s6, -1148; GCN-NEXT: v_mov_b32_e32 v0, s0149; GCN-NEXT: s_waitcnt lgkmcnt(0)150; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0151; GCN-NEXT: s_waitcnt vmcnt(0)152; GCN-NEXT: s_endpgm153;154; GFX11-LABEL: uniform_conditional_min_long_forward_branch:155; GFX11: ; %bb.0: ; %bb0156; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x2c157; GFX11-NEXT: s_waitcnt lgkmcnt(0)158; GFX11-NEXT: s_cmp_eq_u32 s0, 0159; GFX11-NEXT: s_cbranch_scc0 .LBB1_1160; GFX11-NEXT: ; %bb.3: ; %bb0161; GFX11-NEXT: s_getpc_b64 s[2:3]162; GFX11-NEXT: .Lpost_getpc1:163; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)164; GFX11-NEXT: s_add_u32 s2, s2, (.LBB1_2-.Lpost_getpc1)&4294967295165; GFX11-NEXT: s_addc_u32 s3, s3, (.LBB1_2-.Lpost_getpc1)>>32166; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)167; GFX11-NEXT: s_setpc_b64 s[2:3]168; GFX11-NEXT: .LBB1_1: ; %bb2169; GFX11-NEXT: ;;#ASMSTART170; GFX11-NEXT: v_nop_e64171; GFX11-NEXT: v_nop_e64172; GFX11-NEXT: v_nop_e64173; GFX11-NEXT: v_nop_e64174; GFX11-NEXT: ;;#ASMEND175; GFX11-NEXT: .LBB1_2: ; %bb3176; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x24177; GFX11-NEXT: v_mov_b32_e32 v0, 0178; GFX11-NEXT: v_mov_b32_e32 v1, s0179; GFX11-NEXT: s_waitcnt lgkmcnt(0)180; GFX11-NEXT: global_store_b32 v0, v1, s[2:3] dlc181; GFX11-NEXT: s_waitcnt_vscnt null, 0x0182; GFX11-NEXT: s_endpgm183;184; GFX12-LABEL: uniform_conditional_min_long_forward_branch:185; GFX12: ; %bb.0: ; %bb0186; GFX12-NEXT: s_load_b32 s0, s[4:5], 0x2c187; GFX12-NEXT: s_wait_kmcnt 0x0188; GFX12-NEXT: s_cmp_eq_u32 s0, 0189; GFX12-NEXT: s_cbranch_scc0 .LBB1_1190; GFX12-NEXT: ; %bb.3: ; %bb0191; GFX12-NEXT: s_getpc_b64 s[2:3]192; GFX12-NEXT: .Lpost_getpc1:193; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)194; GFX12-NEXT: s_add_co_u32 s2, s2, (.LBB1_2-.Lpost_getpc1)&4294967295195; GFX12-NEXT: s_add_co_ci_u32 s3, s3, (.LBB1_2-.Lpost_getpc1)>>32196; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)197; GFX12-NEXT: s_setpc_b64 s[2:3]198; GFX12-NEXT: .LBB1_1: ; %bb2199; GFX12-NEXT: ;;#ASMSTART200; GFX12-NEXT: v_nop_e64201; GFX12-NEXT: v_nop_e64202; GFX12-NEXT: v_nop_e64203; GFX12-NEXT: v_nop_e64204; GFX12-NEXT: ;;#ASMEND205; GFX12-NEXT: .LBB1_2: ; %bb3206; GFX12-NEXT: s_load_b64 s[2:3], s[4:5], 0x24207; GFX12-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0208; GFX12-NEXT: s_wait_kmcnt 0x0209; GFX12-NEXT: global_store_b32 v0, v1, s[2:3] scope:SCOPE_SYS210; GFX12-NEXT: s_wait_storecnt 0x0211; GFX12-NEXT: s_endpgm212bb0:213 %cmp = icmp eq i32 %cnd, 0214 br i1 %cmp, label %bb3, label %bb2 ; +9 dword branch215 216bb2:217; 32 bytes218 call void asm sideeffect219 "v_nop_e64220 v_nop_e64221 v_nop_e64222 v_nop_e64", ""() #0223 br label %bb3224 225bb3:226 store volatile i32 %cnd, ptr addrspace(1) %arg227 ret void228}229 230define amdgpu_kernel void @uniform_conditional_min_long_forward_vcnd_branch(ptr addrspace(1) %arg, float %cnd) #0 {231; GCN-LABEL: uniform_conditional_min_long_forward_vcnd_branch:232; GCN: ; %bb.0: ; %bb0233; GCN-NEXT: s_load_dword s0, s[4:5], 0xb234; GCN-NEXT: s_waitcnt lgkmcnt(0)235; GCN-NEXT: v_cmp_eq_f32_e64 s[2:3], s0, 0236; GCN-NEXT: s_and_b64 vcc, exec, s[2:3]237; GCN-NEXT: s_cbranch_vccz .LBB2_1238; GCN-NEXT: ; %bb.3: ; %bb0239; GCN-NEXT: s_getpc_b64 s[2:3]240; GCN-NEXT: .Lpost_getpc1:241; GCN-NEXT: s_add_u32 s2, s2, (.LBB2_2-.Lpost_getpc1)&4294967295242; GCN-NEXT: s_addc_u32 s3, s3, (.LBB2_2-.Lpost_getpc1)>>32243; GCN-NEXT: s_setpc_b64 s[2:3]244; GCN-NEXT: .LBB2_1: ; %bb2245; GCN-NEXT: ;;#ASMSTART246; GCN-NEXT: ; 32 bytes247; GCN-NEXT: v_nop_e64248; GCN-NEXT: v_nop_e64249; GCN-NEXT: v_nop_e64250; GCN-NEXT: v_nop_e64251; GCN-NEXT: ;;#ASMEND252; GCN-NEXT: .LBB2_2: ; %bb3253; GCN-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x9254; GCN-NEXT: s_mov_b32 s7, 0xf000255; GCN-NEXT: s_mov_b32 s6, -1256; GCN-NEXT: v_mov_b32_e32 v0, s0257; GCN-NEXT: s_waitcnt lgkmcnt(0)258; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0259; GCN-NEXT: s_waitcnt vmcnt(0)260; GCN-NEXT: s_endpgm261;262; GFX11-LABEL: uniform_conditional_min_long_forward_vcnd_branch:263; GFX11: ; %bb.0: ; %bb0264; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x2c265; GFX11-NEXT: s_waitcnt lgkmcnt(0)266; GFX11-NEXT: v_cmp_eq_f32_e64 s[2:3], s0, 0267; GFX11-NEXT: s_and_b64 vcc, exec, s[2:3]268; GFX11-NEXT: s_cbranch_vccz .LBB2_1269; GFX11-NEXT: ; %bb.3: ; %bb0270; GFX11-NEXT: s_getpc_b64 s[2:3]271; GFX11-NEXT: .Lpost_getpc2:272; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)273; GFX11-NEXT: s_add_u32 s2, s2, (.LBB2_2-.Lpost_getpc2)&4294967295274; GFX11-NEXT: s_addc_u32 s3, s3, (.LBB2_2-.Lpost_getpc2)>>32275; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)276; GFX11-NEXT: s_setpc_b64 s[2:3]277; GFX11-NEXT: .LBB2_1: ; %bb2278; GFX11-NEXT: ;;#ASMSTART279; GFX11-NEXT: ; 32 bytes280; GFX11-NEXT: v_nop_e64281; GFX11-NEXT: v_nop_e64282; GFX11-NEXT: v_nop_e64283; GFX11-NEXT: v_nop_e64284; GFX11-NEXT: ;;#ASMEND285; GFX11-NEXT: .LBB2_2: ; %bb3286; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x24287; GFX11-NEXT: v_mov_b32_e32 v0, 0288; GFX11-NEXT: v_mov_b32_e32 v1, s0289; GFX11-NEXT: s_waitcnt lgkmcnt(0)290; GFX11-NEXT: global_store_b32 v0, v1, s[2:3] dlc291; GFX11-NEXT: s_waitcnt_vscnt null, 0x0292; GFX11-NEXT: s_endpgm293;294; GFX12-LABEL: uniform_conditional_min_long_forward_vcnd_branch:295; GFX12: ; %bb.0: ; %bb0296; GFX12-NEXT: s_load_b32 s0, s[4:5], 0x2c297; GFX12-NEXT: s_wait_kmcnt 0x0298; GFX12-NEXT: s_cmp_eq_f32 s0, 0299; GFX12-NEXT: s_cbranch_scc0 .LBB2_1300; GFX12-NEXT: ; %bb.3: ; %bb0301; GFX12-NEXT: s_getpc_b64 s[2:3]302; GFX12-NEXT: .Lpost_getpc2:303; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)304; GFX12-NEXT: s_add_co_u32 s2, s2, (.LBB2_2-.Lpost_getpc2)&4294967295305; GFX12-NEXT: s_add_co_ci_u32 s3, s3, (.LBB2_2-.Lpost_getpc2)>>32306; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)307; GFX12-NEXT: s_setpc_b64 s[2:3]308; GFX12-NEXT: .LBB2_1: ; %bb2309; GFX12-NEXT: ;;#ASMSTART310; GFX12-NEXT: ; 32 bytes311; GFX12-NEXT: v_nop_e64312; GFX12-NEXT: v_nop_e64313; GFX12-NEXT: v_nop_e64314; GFX12-NEXT: v_nop_e64315; GFX12-NEXT: ;;#ASMEND316; GFX12-NEXT: .LBB2_2: ; %bb3317; GFX12-NEXT: s_load_b64 s[2:3], s[4:5], 0x24318; GFX12-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0319; GFX12-NEXT: s_wait_kmcnt 0x0320; GFX12-NEXT: global_store_b32 v0, v1, s[2:3] scope:SCOPE_SYS321; GFX12-NEXT: s_wait_storecnt 0x0322; GFX12-NEXT: s_endpgm323bb0:324 %cmp = fcmp oeq float %cnd, 0.0325 br i1 %cmp, label %bb3, label %bb2 ; + 8 dword branch326 327bb2:328 call void asm sideeffect " ; 32 bytes329 v_nop_e64330 v_nop_e64331 v_nop_e64332 v_nop_e64", ""() #0333 br label %bb3334 335bb3:336 store volatile float %cnd, ptr addrspace(1) %arg337 ret void338}339 340define amdgpu_kernel void @min_long_forward_vbranch(ptr addrspace(1) %arg) #0 {341; GCN-LABEL: min_long_forward_vbranch:342; GCN: ; %bb.0: ; %bb343; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9344; GCN-NEXT: v_lshlrev_b32_e32 v0, 2, v0345; GCN-NEXT: v_mov_b32_e32 v1, 0346; GCN-NEXT: s_mov_b32 s3, 0xf000347; GCN-NEXT: s_mov_b32 s2, 0348; GCN-NEXT: s_waitcnt lgkmcnt(0)349; GCN-NEXT: buffer_load_dword v2, v[0:1], s[0:3], 0 addr64 glc350; GCN-NEXT: s_waitcnt vmcnt(0)351; GCN-NEXT: v_mov_b32_e32 v1, s1352; GCN-NEXT: v_add_i32_e32 v0, vcc, s0, v0353; GCN-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc354; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2355; GCN-NEXT: s_and_saveexec_b64 s[0:1], vcc356; GCN-NEXT: s_cbranch_execnz .LBB3_1357; GCN-NEXT: ; %bb.3: ; %bb358; GCN-NEXT: s_getpc_b64 s[4:5]359; GCN-NEXT: .Lpost_getpc2:360; GCN-NEXT: s_add_u32 s4, s4, (.LBB3_2-.Lpost_getpc2)&4294967295361; GCN-NEXT: s_addc_u32 s5, s5, (.LBB3_2-.Lpost_getpc2)>>32362; GCN-NEXT: s_setpc_b64 s[4:5]363; GCN-NEXT: .LBB3_1: ; %bb2364; GCN-NEXT: ;;#ASMSTART365; GCN-NEXT: ; 32 bytes366; GCN-NEXT: v_nop_e64367; GCN-NEXT: v_nop_e64368; GCN-NEXT: v_nop_e64369; GCN-NEXT: v_nop_e64370; GCN-NEXT: ;;#ASMEND371; GCN-NEXT: .LBB3_2: ; %bb3372; GCN-NEXT: s_or_b64 exec, exec, s[0:1]373; GCN-NEXT: s_mov_b32 s0, s2374; GCN-NEXT: s_mov_b32 s1, s2375; GCN-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64376; GCN-NEXT: s_waitcnt vmcnt(0)377; GCN-NEXT: s_endpgm378;379; GFX11-LABEL: min_long_forward_vbranch:380; GFX11: ; %bb.0: ; %bb381; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24382; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0383; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)384; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0385; GFX11-NEXT: s_waitcnt lgkmcnt(0)386; GFX11-NEXT: global_load_b32 v2, v0, s[0:1] glc dlc387; GFX11-NEXT: s_waitcnt vmcnt(0)388; GFX11-NEXT: v_add_co_u32 v0, s[2:3], s0, v0389; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, s1, 0, s[2:3]390; GFX11-NEXT: s_mov_b64 s[0:1], exec391; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v2392; GFX11-NEXT: s_cbranch_execnz .LBB3_1393; GFX11-NEXT: ; %bb.3: ; %bb394; GFX11-NEXT: s_getpc_b64 s[2:3]395; GFX11-NEXT: .Lpost_getpc3:396; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)397; GFX11-NEXT: s_add_u32 s2, s2, (.LBB3_2-.Lpost_getpc3)&4294967295398; GFX11-NEXT: s_addc_u32 s3, s3, (.LBB3_2-.Lpost_getpc3)>>32399; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)400; GFX11-NEXT: s_setpc_b64 s[2:3]401; GFX11-NEXT: .LBB3_1: ; %bb2402; GFX11-NEXT: ;;#ASMSTART403; GFX11-NEXT: ; 32 bytes404; GFX11-NEXT: v_nop_e64405; GFX11-NEXT: v_nop_e64406; GFX11-NEXT: v_nop_e64407; GFX11-NEXT: v_nop_e64408; GFX11-NEXT: ;;#ASMEND409; GFX11-NEXT: .LBB3_2: ; %bb3410; GFX11-NEXT: s_or_b64 exec, exec, s[0:1]411; GFX11-NEXT: global_store_b32 v[0:1], v2, off dlc412; GFX11-NEXT: s_waitcnt_vscnt null, 0x0413; GFX11-NEXT: s_endpgm414;415; GFX12-LABEL: min_long_forward_vbranch:416; GFX12: ; %bb.0: ; %bb417; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x24418; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0419; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)420; GFX12-NEXT: v_lshlrev_b32_e32 v0, 2, v0421; GFX12-NEXT: s_wait_kmcnt 0x0422; GFX12-NEXT: global_load_b32 v2, v0, s[0:1] scope:SCOPE_SYS423; GFX12-NEXT: s_wait_loadcnt 0x0424; GFX12-NEXT: v_add_co_u32 v0, s0, s0, v0425; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)426; GFX12-NEXT: v_add_co_ci_u32_e64 v1, null, s1, 0, s0427; GFX12-NEXT: s_mov_b32 s0, exec_lo428; GFX12-NEXT: v_cmpx_ne_u32_e32 0, v2429; GFX12-NEXT: s_cbranch_execnz .LBB3_1430; GFX12-NEXT: ; %bb.3: ; %bb431; GFX12-NEXT: s_getpc_b64 s[2:3]432; GFX12-NEXT: .Lpost_getpc3:433; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)434; GFX12-NEXT: s_add_co_u32 s2, s2, (.LBB3_2-.Lpost_getpc3)&4294967295435; GFX12-NEXT: s_add_co_ci_u32 s3, s3, (.LBB3_2-.Lpost_getpc3)>>32436; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)437; GFX12-NEXT: s_setpc_b64 s[2:3]438; GFX12-NEXT: .LBB3_1: ; %bb2439; GFX12-NEXT: ;;#ASMSTART440; GFX12-NEXT: ; 32 bytes441; GFX12-NEXT: v_nop_e64442; GFX12-NEXT: v_nop_e64443; GFX12-NEXT: v_nop_e64444; GFX12-NEXT: v_nop_e64445; GFX12-NEXT: ;;#ASMEND446; GFX12-NEXT: .LBB3_2: ; %bb3447; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)448; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0449; GFX12-NEXT: global_store_b32 v[0:1], v2, off scope:SCOPE_SYS450; GFX12-NEXT: s_wait_storecnt 0x0451; GFX12-NEXT: s_endpgm452bb:453 %tid = call i32 @llvm.amdgcn.workitem.id.x()454 %tid.ext = zext i32 %tid to i64455 %gep = getelementptr inbounds i32, ptr addrspace(1) %arg, i64 %tid.ext456 %load = load volatile i32, ptr addrspace(1) %gep457 %cmp = icmp eq i32 %load, 0458 br i1 %cmp, label %bb3, label %bb2 ; + 8 dword branch459 460bb2:461 call void asm sideeffect " ; 32 bytes462 v_nop_e64463 v_nop_e64464 v_nop_e64465 v_nop_e64", ""() #0466 br label %bb3467 468bb3:469 store volatile i32 %load, ptr addrspace(1) %gep470 ret void471}472 473define amdgpu_kernel void @long_backward_sbranch(ptr addrspace(1) %arg) #0 {474; GCN-LABEL: long_backward_sbranch:475; GCN: ; %bb.0: ; %bb476; GCN-NEXT: s_mov_b32 s0, 0477; GCN-NEXT: .LBB4_1: ; %bb2478; GCN-NEXT: ; =>This Inner Loop Header: Depth=1479; GCN-NEXT: s_add_i32 s0, s0, 1480; GCN-NEXT: s_cmp_lt_i32 s0, 10481; GCN-NEXT: ;;#ASMSTART482; GCN-NEXT: v_nop_e64483; GCN-NEXT: v_nop_e64484; GCN-NEXT: v_nop_e64485; GCN-NEXT: ;;#ASMEND486; GCN-NEXT: s_cbranch_scc0 .LBB4_2487; GCN-NEXT: ; %bb.3: ; %bb2488; GCN-NEXT: ; in Loop: Header=BB4_1 Depth=1489; GCN-NEXT: s_getpc_b64 s[2:3]490; GCN-NEXT: .Lpost_getpc3:491; GCN-NEXT: s_add_u32 s2, s2, (.LBB4_1-.Lpost_getpc3)&4294967295492; GCN-NEXT: s_addc_u32 s3, s3, (.LBB4_1-.Lpost_getpc3)>>32493; GCN-NEXT: s_setpc_b64 s[2:3]494; GCN-NEXT: .LBB4_2: ; %bb3495; GCN-NEXT: s_endpgm496;497; GFX11-LABEL: long_backward_sbranch:498; GFX11: ; %bb.0: ; %bb499; GFX11-NEXT: s_mov_b32 s0, 0500; GFX11-NEXT: .p2align 6501; GFX11-NEXT: .LBB4_1: ; %bb2502; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1503; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)504; GFX11-NEXT: s_add_i32 s0, s0, 1505; GFX11-NEXT: ;;#ASMSTART506; GFX11-NEXT: v_nop_e64507; GFX11-NEXT: v_nop_e64508; GFX11-NEXT: v_nop_e64509; GFX11-NEXT: ;;#ASMEND510; GFX11-NEXT: s_cmp_lt_i32 s0, 10511; GFX11-NEXT: s_cbranch_scc0 .LBB4_2512; GFX11-NEXT: ; %bb.3: ; %bb2513; GFX11-NEXT: ; in Loop: Header=BB4_1 Depth=1514; GFX11-NEXT: s_getpc_b64 s[2:3]515; GFX11-NEXT: .Lpost_getpc4:516; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)517; GFX11-NEXT: s_add_u32 s2, s2, (.LBB4_1-.Lpost_getpc4)&4294967295518; GFX11-NEXT: s_addc_u32 s3, s3, (.LBB4_1-.Lpost_getpc4)>>32519; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)520; GFX11-NEXT: s_setpc_b64 s[2:3]521; GFX11-NEXT: .LBB4_2: ; %bb3522; GFX11-NEXT: s_endpgm523;524; GFX12-LABEL: long_backward_sbranch:525; GFX12: ; %bb.0: ; %bb526; GFX12-NEXT: s_mov_b32 s0, 0527; GFX12-NEXT: .LBB4_1: ; %bb2528; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1529; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)530; GFX12-NEXT: s_add_co_i32 s0, s0, 1531; GFX12-NEXT: ;;#ASMSTART532; GFX12-NEXT: v_nop_e64533; GFX12-NEXT: v_nop_e64534; GFX12-NEXT: v_nop_e64535; GFX12-NEXT: ;;#ASMEND536; GFX12-NEXT: s_cmp_lt_i32 s0, 10537; GFX12-NEXT: s_cbranch_scc0 .LBB4_2538; GFX12-NEXT: ; %bb.3: ; %bb2539; GFX12-NEXT: ; in Loop: Header=BB4_1 Depth=1540; GFX12-NEXT: s_getpc_b64 s[2:3]541; GFX12-NEXT: .Lpost_getpc4:542; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)543; GFX12-NEXT: s_add_co_u32 s2, s2, (.LBB4_1-.Lpost_getpc4)&4294967295544; GFX12-NEXT: s_add_co_ci_u32 s3, s3, (.LBB4_1-.Lpost_getpc4)>>32545; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)546; GFX12-NEXT: s_setpc_b64 s[2:3]547; GFX12-NEXT: .LBB4_2: ; %bb3548; GFX12-NEXT: s_endpgm549bb:550 br label %bb2551 552bb2:553 %loop.idx = phi i32 [ 0, %bb ], [ %inc, %bb2 ]554 ; 24 bytes555 call void asm sideeffect556 "v_nop_e64557 v_nop_e64558 v_nop_e64", ""() #0559 %inc = add nsw i32 %loop.idx, 1 ; add cost 4560 %cmp = icmp slt i32 %inc, 10 ; condition cost = 8561 br i1 %cmp, label %bb2, label %bb3 ; -562 563bb3:564 ret void565}566 567; Requires expansion of unconditional branch from %bb2 to %bb4 (and568; expansion of conditional branch from %bb to %bb3.569 570define amdgpu_kernel void @uniform_unconditional_min_long_forward_branch(ptr addrspace(1) %arg, i32 %arg1) {571; GCN-LABEL: uniform_unconditional_min_long_forward_branch:572; GCN: ; %bb.0: ; %bb0573; GCN-NEXT: s_load_dword s0, s[4:5], 0xb574; GCN-NEXT: s_waitcnt lgkmcnt(0)575; GCN-NEXT: s_cmp_eq_u32 s0, 0576; GCN-NEXT: s_mov_b64 s[0:1], -1577; GCN-NEXT: s_cbranch_scc0 .LBB5_1578; GCN-NEXT: ; %bb.7: ; %bb0579; GCN-NEXT: s_getpc_b64 s[0:1]580; GCN-NEXT: .Lpost_getpc5:581; GCN-NEXT: s_add_u32 s0, s0, (.LBB5_4-.Lpost_getpc5)&4294967295582; GCN-NEXT: s_addc_u32 s1, s1, (.LBB5_4-.Lpost_getpc5)>>32583; GCN-NEXT: s_setpc_b64 s[0:1]584; GCN-NEXT: .LBB5_1: ; %Flow585; GCN-NEXT: s_andn2_b64 vcc, exec, s[0:1]586; GCN-NEXT: s_cbranch_vccnz .LBB5_3587; GCN-NEXT: .LBB5_2: ; %bb2588; GCN-NEXT: s_mov_b32 s3, 0xf000589; GCN-NEXT: s_mov_b32 s2, -1590; GCN-NEXT: v_mov_b32_e32 v0, 17591; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0592; GCN-NEXT: s_waitcnt vmcnt(0)593; GCN-NEXT: .LBB5_3: ; %bb4594; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9595; GCN-NEXT: s_mov_b32 s3, 0xf000596; GCN-NEXT: s_mov_b32 s2, -1597; GCN-NEXT: s_waitcnt expcnt(0)598; GCN-NEXT: v_mov_b32_e32 v0, 63599; GCN-NEXT: s_waitcnt lgkmcnt(0)600; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0601; GCN-NEXT: s_waitcnt vmcnt(0)602; GCN-NEXT: s_endpgm603; GCN-NEXT: .LBB5_4: ; %bb3604; GCN-NEXT: ;;#ASMSTART605; GCN-NEXT: v_nop_e64606; GCN-NEXT: v_nop_e64607; GCN-NEXT: v_nop_e64608; GCN-NEXT: v_nop_e64609; GCN-NEXT: ;;#ASMEND610; GCN-NEXT: s_cbranch_execnz .LBB5_5611; GCN-NEXT: ; %bb.9: ; %bb3612; GCN-NEXT: s_getpc_b64 s[0:1]613; GCN-NEXT: .Lpost_getpc6:614; GCN-NEXT: s_add_u32 s0, s0, (.LBB5_2-.Lpost_getpc6)&4294967295615; GCN-NEXT: s_addc_u32 s1, s1, (.LBB5_2-.Lpost_getpc6)>>32616; GCN-NEXT: s_setpc_b64 s[0:1]617; GCN-NEXT: .LBB5_5: ; %bb3618; GCN-NEXT: s_getpc_b64 s[0:1]619; GCN-NEXT: .Lpost_getpc4:620; GCN-NEXT: s_add_u32 s0, s0, (.LBB5_3-.Lpost_getpc4)&4294967295621; GCN-NEXT: s_addc_u32 s1, s1, (.LBB5_3-.Lpost_getpc4)>>32622; GCN-NEXT: s_setpc_b64 s[0:1]623;624; GFX11-LABEL: uniform_unconditional_min_long_forward_branch:625; GFX11: ; %bb.0: ; %bb0626; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x2c627; GFX11-NEXT: s_waitcnt lgkmcnt(0)628; GFX11-NEXT: s_cmp_eq_u32 s0, 0629; GFX11-NEXT: s_mov_b64 s[0:1], -1630; GFX11-NEXT: s_cbranch_scc1 .LBB5_4631; GFX11-NEXT: ; %bb.1: ; %Flow632; GFX11-NEXT: s_and_not1_b64 vcc, exec, s[0:1]633; GFX11-NEXT: s_cbranch_vccnz .LBB5_3634; GFX11-NEXT: .LBB5_2: ; %bb2635; GFX11-NEXT: v_mov_b32_e32 v0, 17636; GFX11-NEXT: global_store_b32 v[0:1], v0, off dlc637; GFX11-NEXT: s_waitcnt_vscnt null, 0x0638; GFX11-NEXT: .LBB5_3: ; %bb4639; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24640; GFX11-NEXT: v_mov_b32_e32 v0, 0641; GFX11-NEXT: v_mov_b32_e32 v1, 63642; GFX11-NEXT: s_waitcnt lgkmcnt(0)643; GFX11-NEXT: global_store_b32 v0, v1, s[0:1] dlc644; GFX11-NEXT: s_waitcnt_vscnt null, 0x0645; GFX11-NEXT: s_endpgm646; GFX11-NEXT: .LBB5_4: ; %bb3647; GFX11-NEXT: ;;#ASMSTART648; GFX11-NEXT: v_nop_e64649; GFX11-NEXT: v_nop_e64650; GFX11-NEXT: v_nop_e64651; GFX11-NEXT: v_nop_e64652; GFX11-NEXT: ;;#ASMEND653; GFX11-NEXT: s_cbranch_execnz .LBB5_5654; GFX11-NEXT: ; %bb.7: ; %bb3655; GFX11-NEXT: s_getpc_b64 s[0:1]656; GFX11-NEXT: .Lpost_getpc6:657; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)658; GFX11-NEXT: s_add_u32 s0, s0, (.LBB5_2-.Lpost_getpc6)&4294967295659; GFX11-NEXT: s_addc_u32 s1, s1, (.LBB5_2-.Lpost_getpc6)>>32660; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)661; GFX11-NEXT: s_setpc_b64 s[0:1]662; GFX11-NEXT: .LBB5_5: ; %bb3663; GFX11-NEXT: s_getpc_b64 s[0:1]664; GFX11-NEXT: .Lpost_getpc5:665; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)666; GFX11-NEXT: s_add_u32 s0, s0, (.LBB5_3-.Lpost_getpc5)&4294967295667; GFX11-NEXT: s_addc_u32 s1, s1, (.LBB5_3-.Lpost_getpc5)>>32668; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)669; GFX11-NEXT: s_setpc_b64 s[0:1]670;671; GFX12-LABEL: uniform_unconditional_min_long_forward_branch:672; GFX12: ; %bb.0: ; %bb0673; GFX12-NEXT: s_load_b32 s0, s[4:5], 0x2c674; GFX12-NEXT: s_wait_kmcnt 0x0675; GFX12-NEXT: s_cmp_eq_u32 s0, 0676; GFX12-NEXT: s_mov_b32 s0, -1677; GFX12-NEXT: s_cbranch_scc0 .LBB5_1678; GFX12-NEXT: ; %bb.7: ; %bb0679; GFX12-NEXT: s_getpc_b64 s[0:1]680; GFX12-NEXT: .Lpost_getpc6:681; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)682; GFX12-NEXT: s_add_co_u32 s0, s0, (.LBB5_4-.Lpost_getpc6)&4294967295683; GFX12-NEXT: s_add_co_ci_u32 s1, s1, (.LBB5_4-.Lpost_getpc6)>>32684; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)685; GFX12-NEXT: s_setpc_b64 s[0:1]686; GFX12-NEXT: .LBB5_1: ; %Flow687; GFX12-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s0688; GFX12-NEXT: s_cbranch_vccnz .LBB5_3689; GFX12-NEXT: .LBB5_2: ; %bb2690; GFX12-NEXT: v_mov_b32_e32 v0, 17691; GFX12-NEXT: global_store_b32 v[0:1], v0, off scope:SCOPE_SYS692; GFX12-NEXT: s_wait_storecnt 0x0693; GFX12-NEXT: .LBB5_3: ; %bb4694; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x24695; GFX12-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 63696; GFX12-NEXT: s_wait_kmcnt 0x0697; GFX12-NEXT: global_store_b32 v0, v1, s[0:1] scope:SCOPE_SYS698; GFX12-NEXT: s_wait_storecnt 0x0699; GFX12-NEXT: s_endpgm700; GFX12-NEXT: .LBB5_4: ; %bb3701; GFX12-NEXT: ;;#ASMSTART702; GFX12-NEXT: v_nop_e64703; GFX12-NEXT: v_nop_e64704; GFX12-NEXT: v_nop_e64705; GFX12-NEXT: v_nop_e64706; GFX12-NEXT: ;;#ASMEND707; GFX12-NEXT: s_cbranch_execnz .LBB5_5708; GFX12-NEXT: ; %bb.9: ; %bb3709; GFX12-NEXT: s_getpc_b64 s[0:1]710; GFX12-NEXT: .Lpost_getpc7:711; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)712; GFX12-NEXT: s_add_co_u32 s0, s0, (.LBB5_2-.Lpost_getpc7)&4294967295713; GFX12-NEXT: s_add_co_ci_u32 s1, s1, (.LBB5_2-.Lpost_getpc7)>>32714; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)715; GFX12-NEXT: s_setpc_b64 s[0:1]716; GFX12-NEXT: .LBB5_5: ; %bb3717; GFX12-NEXT: s_getpc_b64 s[0:1]718; GFX12-NEXT: .Lpost_getpc5:719; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)720; GFX12-NEXT: s_add_co_u32 s0, s0, (.LBB5_3-.Lpost_getpc5)&4294967295721; GFX12-NEXT: s_add_co_ci_u32 s1, s1, (.LBB5_3-.Lpost_getpc5)>>32722; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)723; GFX12-NEXT: s_setpc_b64 s[0:1]724bb0:725 %tmp = icmp ne i32 %arg1, 0726 br i1 %tmp, label %bb2, label %bb3727 728bb2:729 store volatile i32 17, ptr addrspace(1) poison730 br label %bb4731 732bb3:733 ; 32 byte asm734 call void asm sideeffect735 "v_nop_e64736 v_nop_e64737 v_nop_e64738 v_nop_e64", ""() #0739 br label %bb4740 741bb4:742 store volatile i32 63, ptr addrspace(1) %arg743 ret void744}745 746define amdgpu_kernel void @uniform_unconditional_min_long_backward_branch(ptr addrspace(1) %arg, i32 %arg1) {747; GCN-LABEL: uniform_unconditional_min_long_backward_branch:748; GCN: ; %bb.0: ; %entry749; GCN-NEXT: s_and_b64 vcc, exec, -1750; GCN-NEXT: .LBB6_1: ; %loop751; GCN-NEXT: ; =>This Inner Loop Header: Depth=1752; GCN-NEXT: ;;#ASMSTART753; GCN-NEXT: v_nop_e64754; GCN-NEXT: v_nop_e64755; GCN-NEXT: v_nop_e64756; GCN-NEXT: v_nop_e64757; GCN-NEXT: ;;#ASMEND758; GCN-NEXT: s_mov_b64 vcc, vcc759; GCN-NEXT: s_cbranch_vccz .LBB6_2760; GCN-NEXT: ; %bb.3: ; %loop761; GCN-NEXT: ; in Loop: Header=BB6_1 Depth=1762; GCN-NEXT: s_getpc_b64 s[0:1]763; GCN-NEXT: .Lpost_getpc7:764; GCN-NEXT: s_add_u32 s0, s0, (.LBB6_1-.Lpost_getpc7)&4294967295765; GCN-NEXT: s_addc_u32 s1, s1, (.LBB6_1-.Lpost_getpc7)>>32766; GCN-NEXT: s_setpc_b64 s[0:1]767; GCN-NEXT: .LBB6_2: ; %DummyReturnBlock768; GCN-NEXT: s_endpgm769;770; GFX11-LABEL: uniform_unconditional_min_long_backward_branch:771; GFX11: ; %bb.0: ; %entry772; GFX11-NEXT: s_and_b64 vcc, exec, -1773; GFX11-NEXT: .p2align 6774; GFX11-NEXT: .LBB6_1: ; %loop775; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1776; GFX11-NEXT: ;;#ASMSTART777; GFX11-NEXT: v_nop_e64778; GFX11-NEXT: v_nop_e64779; GFX11-NEXT: v_nop_e64780; GFX11-NEXT: v_nop_e64781; GFX11-NEXT: ;;#ASMEND782; GFX11-NEXT: s_cbranch_vccz .LBB6_2783; GFX11-NEXT: ; %bb.3: ; %loop784; GFX11-NEXT: ; in Loop: Header=BB6_1 Depth=1785; GFX11-NEXT: s_getpc_b64 s[0:1]786; GFX11-NEXT: .Lpost_getpc7:787; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)788; GFX11-NEXT: s_add_u32 s0, s0, (.LBB6_1-.Lpost_getpc7)&4294967295789; GFX11-NEXT: s_addc_u32 s1, s1, (.LBB6_1-.Lpost_getpc7)>>32790; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)791; GFX11-NEXT: s_setpc_b64 s[0:1]792; GFX11-NEXT: .LBB6_2: ; %DummyReturnBlock793; GFX11-NEXT: s_endpgm794;795; GFX12-LABEL: uniform_unconditional_min_long_backward_branch:796; GFX12: ; %bb.0: ; %entry797; GFX12-NEXT: s_mov_b32 vcc_lo, exec_lo798; GFX12-NEXT: .LBB6_1: ; %loop799; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1800; GFX12-NEXT: ;;#ASMSTART801; GFX12-NEXT: v_nop_e64802; GFX12-NEXT: v_nop_e64803; GFX12-NEXT: v_nop_e64804; GFX12-NEXT: v_nop_e64805; GFX12-NEXT: ;;#ASMEND806; GFX12-NEXT: s_cbranch_vccz .LBB6_2807; GFX12-NEXT: ; %bb.3: ; %loop808; GFX12-NEXT: ; in Loop: Header=BB6_1 Depth=1809; GFX12-NEXT: s_getpc_b64 s[0:1]810; GFX12-NEXT: .Lpost_getpc8:811; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)812; GFX12-NEXT: s_add_co_u32 s0, s0, (.LBB6_1-.Lpost_getpc8)&4294967295813; GFX12-NEXT: s_add_co_ci_u32 s1, s1, (.LBB6_1-.Lpost_getpc8)>>32814; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)815; GFX12-NEXT: s_setpc_b64 s[0:1]816; GFX12-NEXT: .LBB6_2: ; %DummyReturnBlock817; GFX12-NEXT: s_endpgm818entry:819 br label %loop820 821loop:822 ; 32 byte asm823 call void asm sideeffect824 "v_nop_e64825 v_nop_e64826 v_nop_e64827 v_nop_e64", ""() #0828 br label %loop829}830 831; Expansion of branch from %bb1 to %bb3 introduces need to expand832; branch from %bb0 to %bb2833 834define amdgpu_kernel void @expand_requires_expand(i32 %cond0) #0 {835; GCN-LABEL: expand_requires_expand:836; GCN: ; %bb.0: ; %bb0837; GCN-NEXT: s_load_dword s0, s[4:5], 0x9838; GCN-NEXT: s_waitcnt lgkmcnt(0)839; GCN-NEXT: s_cmp_lt_i32 s0, 0840; GCN-NEXT: s_cselect_b64 s[0:1], -1, 0841; GCN-NEXT: s_and_b64 vcc, exec, s[0:1]842; GCN-NEXT: s_cbranch_vccnz .LBB7_2843; GCN-NEXT: ; %bb.1: ; %bb1844; GCN-NEXT: s_load_dword s0, s[0:1], 0x0845; GCN-NEXT: s_waitcnt lgkmcnt(0)846; GCN-NEXT: s_cmp_lg_u32 s0, 3847; GCN-NEXT: s_cselect_b64 s[0:1], -1, 0848; GCN-NEXT: .LBB7_2: ; %Flow849; GCN-NEXT: s_andn2_b64 vcc, exec, s[0:1]850; GCN-NEXT: s_cbranch_vccz .LBB7_3851; GCN-NEXT: ; %bb.5: ; %Flow852; GCN-NEXT: s_getpc_b64 s[0:1]853; GCN-NEXT: .Lpost_getpc8:854; GCN-NEXT: s_add_u32 s0, s0, (.LBB7_4-.Lpost_getpc8)&4294967295855; GCN-NEXT: s_addc_u32 s1, s1, (.LBB7_4-.Lpost_getpc8)>>32856; GCN-NEXT: s_setpc_b64 s[0:1]857; GCN-NEXT: .LBB7_3: ; %bb2858; GCN-NEXT: ;;#ASMSTART859; GCN-NEXT: v_nop_e64860; GCN-NEXT: v_nop_e64861; GCN-NEXT: v_nop_e64862; GCN-NEXT: v_nop_e64863; GCN-NEXT: ;;#ASMEND864; GCN-NEXT: .LBB7_4: ; %bb3865; GCN-NEXT: ;;#ASMSTART866; GCN-NEXT: v_nop_e64867; GCN-NEXT: ;;#ASMEND868; GCN-NEXT: ;;#ASMSTART869; GCN-NEXT: v_nop_e64870; GCN-NEXT: ;;#ASMEND871; GCN-NEXT: s_endpgm872;873; GFX11-LABEL: expand_requires_expand:874; GFX11: ; %bb.0: ; %bb0875; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x24876; GFX11-NEXT: s_waitcnt lgkmcnt(0)877; GFX11-NEXT: s_cmp_lt_i32 s0, 0878; GFX11-NEXT: s_cselect_b64 s[0:1], -1, 0879; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)880; GFX11-NEXT: s_and_b64 vcc, exec, s[0:1]881; GFX11-NEXT: s_cbranch_vccnz .LBB7_2882; GFX11-NEXT: ; %bb.1: ; %bb1883; GFX11-NEXT: s_load_b32 s0, s[0:1], 0x0884; GFX11-NEXT: s_waitcnt lgkmcnt(0)885; GFX11-NEXT: s_cmp_lg_u32 s0, 3886; GFX11-NEXT: s_cselect_b64 s[0:1], -1, 0887; GFX11-NEXT: .LBB7_2: ; %Flow888; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)889; GFX11-NEXT: s_and_not1_b64 vcc, exec, s[0:1]890; GFX11-NEXT: s_cbranch_vccz .LBB7_3891; GFX11-NEXT: ; %bb.5: ; %Flow892; GFX11-NEXT: s_getpc_b64 s[0:1]893; GFX11-NEXT: .Lpost_getpc8:894; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)895; GFX11-NEXT: s_add_u32 s0, s0, (.LBB7_4-.Lpost_getpc8)&4294967295896; GFX11-NEXT: s_addc_u32 s1, s1, (.LBB7_4-.Lpost_getpc8)>>32897; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)898; GFX11-NEXT: s_setpc_b64 s[0:1]899; GFX11-NEXT: .LBB7_3: ; %bb2900; GFX11-NEXT: ;;#ASMSTART901; GFX11-NEXT: v_nop_e64902; GFX11-NEXT: v_nop_e64903; GFX11-NEXT: v_nop_e64904; GFX11-NEXT: v_nop_e64905; GFX11-NEXT: ;;#ASMEND906; GFX11-NEXT: .LBB7_4: ; %bb3907; GFX11-NEXT: ;;#ASMSTART908; GFX11-NEXT: v_nop_e64909; GFX11-NEXT: ;;#ASMEND910; GFX11-NEXT: ;;#ASMSTART911; GFX11-NEXT: v_nop_e64912; GFX11-NEXT: ;;#ASMEND913; GFX11-NEXT: s_endpgm914;915; GFX12-LABEL: expand_requires_expand:916; GFX12: ; %bb.0: ; %bb0917; GFX12-NEXT: s_load_b32 s0, s[4:5], 0x24918; GFX12-NEXT: s_wait_kmcnt 0x0919; GFX12-NEXT: s_cmp_lt_i32 s0, 0920; GFX12-NEXT: s_cselect_b32 s0, -1, 0921; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)922; GFX12-NEXT: s_and_b32 vcc_lo, exec_lo, s0923; GFX12-NEXT: s_cbranch_vccnz .LBB7_2924; GFX12-NEXT: ; %bb.1: ; %bb1925; GFX12-NEXT: s_load_b32 s0, s[0:1], 0x0926; GFX12-NEXT: s_wait_kmcnt 0x0927; GFX12-NEXT: s_cmp_lg_u32 s0, 3928; GFX12-NEXT: s_cselect_b32 s0, -1, 0929; GFX12-NEXT: .LBB7_2: ; %Flow930; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)931; GFX12-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s0932; GFX12-NEXT: s_cbranch_vccz .LBB7_3933; GFX12-NEXT: ; %bb.5: ; %Flow934; GFX12-NEXT: s_getpc_b64 s[0:1]935; GFX12-NEXT: .Lpost_getpc9:936; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)937; GFX12-NEXT: s_add_co_u32 s0, s0, (.LBB7_4-.Lpost_getpc9)&4294967295938; GFX12-NEXT: s_add_co_ci_u32 s1, s1, (.LBB7_4-.Lpost_getpc9)>>32939; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)940; GFX12-NEXT: s_setpc_b64 s[0:1]941; GFX12-NEXT: .LBB7_3: ; %bb2942; GFX12-NEXT: ;;#ASMSTART943; GFX12-NEXT: v_nop_e64944; GFX12-NEXT: v_nop_e64945; GFX12-NEXT: v_nop_e64946; GFX12-NEXT: v_nop_e64947; GFX12-NEXT: ;;#ASMEND948; GFX12-NEXT: .LBB7_4: ; %bb3949; GFX12-NEXT: ;;#ASMSTART950; GFX12-NEXT: v_nop_e64951; GFX12-NEXT: ;;#ASMEND952; GFX12-NEXT: ;;#ASMSTART953; GFX12-NEXT: v_nop_e64954; GFX12-NEXT: ;;#ASMEND955; GFX12-NEXT: s_endpgm956bb0:957 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x() #0958 %cmp0 = icmp slt i32 %cond0, 0959 br i1 %cmp0, label %bb2, label %bb1960 961bb1:962 %val = load volatile i32, ptr addrspace(4) poison963 %cmp1 = icmp eq i32 %val, 3964 br i1 %cmp1, label %bb3, label %bb2965 966bb2:967 call void asm sideeffect968 "v_nop_e64969 v_nop_e64970 v_nop_e64971 v_nop_e64", ""() #0972 br label %bb3973 974bb3:975; These NOPs prevent tail-duplication-based outlining976; from firing, which defeats the need to expand the branches and this test.977 call void asm sideeffect978 "v_nop_e64", ""() #0979 call void asm sideeffect980 "v_nop_e64", ""() #0981 ret void982}983 984; Requires expanding of required skip branch.985 986define amdgpu_kernel void @uniform_inside_divergent(ptr addrspace(1) %out, i32 %cond) #0 {987; GCN-LABEL: uniform_inside_divergent:988; GCN: ; %bb.0: ; %entry989; GCN-NEXT: v_cmp_gt_u32_e32 vcc, 16, v0990; GCN-NEXT: s_and_saveexec_b64 s[6:7], vcc991; GCN-NEXT: s_cbranch_execnz .LBB8_1992; GCN-NEXT: ; %bb.4: ; %entry993; GCN-NEXT: s_getpc_b64 s[0:1]994; GCN-NEXT: .Lpost_getpc9:995; GCN-NEXT: s_add_u32 s0, s0, (.LBB8_3-.Lpost_getpc9)&4294967295996; GCN-NEXT: s_addc_u32 s1, s1, (.LBB8_3-.Lpost_getpc9)>>32997; GCN-NEXT: s_setpc_b64 s[0:1]998; GCN-NEXT: .LBB8_1: ; %if999; GCN-NEXT: s_load_dword s8, s[4:5], 0xb1000; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91001; GCN-NEXT: s_mov_b32 s3, 0xf0001002; GCN-NEXT: s_mov_b32 s2, -11003; GCN-NEXT: v_mov_b32_e32 v0, 01004; GCN-NEXT: s_waitcnt lgkmcnt(0)1005; GCN-NEXT: s_cmp_lg_u32 s8, 01006; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 01007; GCN-NEXT: s_cbranch_scc1 .LBB8_31008; GCN-NEXT: ; %bb.2: ; %if_uniform1009; GCN-NEXT: s_waitcnt expcnt(0)1010; GCN-NEXT: v_mov_b32_e32 v0, 11011; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 01012; GCN-NEXT: .LBB8_3: ; %endif1013; GCN-NEXT: s_or_b64 exec, exec, s[6:7]1014; GCN-NEXT: s_sleep 51015; GCN-NEXT: s_endpgm1016;1017; GFX11-LABEL: uniform_inside_divergent:1018; GFX11: ; %bb.0: ; %entry1019; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v01020; GFX11-NEXT: s_mov_b64 s[0:1], exec1021; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1022; GFX11-NEXT: v_cmpx_gt_u32_e32 16, v01023; GFX11-NEXT: s_cbranch_execz .LBB8_31024; GFX11-NEXT: ; %bb.1: ; %if1025; GFX11-NEXT: s_clause 0x11026; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x2c1027; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x241028; GFX11-NEXT: v_mov_b32_e32 v0, 01029; GFX11-NEXT: s_waitcnt lgkmcnt(0)1030; GFX11-NEXT: s_cmp_lg_u32 s6, 01031; GFX11-NEXT: global_store_b32 v0, v0, s[2:3]1032; GFX11-NEXT: s_cbranch_scc1 .LBB8_31033; GFX11-NEXT: ; %bb.2: ; %if_uniform1034; GFX11-NEXT: v_mov_b32_e32 v1, 11035; GFX11-NEXT: global_store_b32 v0, v1, s[2:3]1036; GFX11-NEXT: .LBB8_3: ; %endif1037; GFX11-NEXT: s_or_b64 exec, exec, s[0:1]1038; GFX11-NEXT: s_sleep 51039; GFX11-NEXT: s_endpgm1040;1041; GFX12-LABEL: uniform_inside_divergent:1042; GFX12: ; %bb.0: ; %entry1043; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v01044; GFX12-NEXT: s_mov_b32 s3, exec_lo1045; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)1046; GFX12-NEXT: v_cmpx_gt_u32_e32 16, v01047; GFX12-NEXT: s_cbranch_execz .LBB8_31048; GFX12-NEXT: ; %bb.1: ; %if1049; GFX12-NEXT: s_load_b96 s[0:2], s[4:5], 0x241050; GFX12-NEXT: v_mov_b32_e32 v0, 01051; GFX12-NEXT: s_wait_kmcnt 0x01052; GFX12-NEXT: s_cmp_lg_u32 s2, 01053; GFX12-NEXT: global_store_b32 v0, v0, s[0:1]1054; GFX12-NEXT: s_cbranch_scc1 .LBB8_31055; GFX12-NEXT: ; %bb.2: ; %if_uniform1056; GFX12-NEXT: v_mov_b32_e32 v1, 11057; GFX12-NEXT: global_store_b32 v0, v1, s[0:1]1058; GFX12-NEXT: .LBB8_3: ; %endif1059; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s31060; GFX12-NEXT: s_sleep 51061; GFX12-NEXT: s_endpgm1062entry:1063 %tid = call i32 @llvm.amdgcn.workitem.id.x()1064 %d_cmp = icmp ult i32 %tid, 161065 br i1 %d_cmp, label %if, label %endif1066 1067if:1068 store i32 0, ptr addrspace(1) %out1069 %u_cmp = icmp eq i32 %cond, 01070 br i1 %u_cmp, label %if_uniform, label %endif1071 1072if_uniform:1073 store i32 1, ptr addrspace(1) %out1074 br label %endif1075 1076endif:1077 ; layout can remove the split branch if it can copy the return block.1078 ; This call makes the return block long enough that it doesn't get copied.1079 call void @llvm.amdgcn.s.sleep(i32 5);1080 ret void1081}1082 1083; si_mask_branch1084 1085define amdgpu_kernel void @analyze_mask_branch() #0 {1086; GCN-LABEL: analyze_mask_branch:1087; GCN: ; %bb.0: ; %entry1088; GCN-NEXT: ;;#ASMSTART1089; GCN-NEXT: v_mov_b32_e64 v0, 01090; GCN-NEXT: ;;#ASMEND1091; GCN-NEXT: v_cmp_nlt_f32_e32 vcc, 0, v01092; GCN-NEXT: s_and_saveexec_b64 s[0:1], vcc1093; GCN-NEXT: s_xor_b64 s[0:1], exec, s[0:1]1094; GCN-NEXT: s_cbranch_execz .LBB9_21095; GCN-NEXT: ; %bb.1: ; %ret1096; GCN-NEXT: s_mov_b32 s3, 0xf0001097; GCN-NEXT: s_mov_b32 s2, -11098; GCN-NEXT: v_mov_b32_e32 v0, 71099; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 01100; GCN-NEXT: s_waitcnt vmcnt(0)1101; GCN-NEXT: .LBB9_2: ; %Flow11102; GCN-NEXT: s_andn2_saveexec_b64 s[0:1], s[0:1]1103; GCN-NEXT: s_cbranch_execnz .LBB9_31104; GCN-NEXT: ; %bb.6: ; %Flow11105; GCN-NEXT: s_getpc_b64 s[0:1]1106; GCN-NEXT: .Lpost_getpc10:1107; GCN-NEXT: s_add_u32 s0, s0, (.LBB9_5-.Lpost_getpc10)&42949672951108; GCN-NEXT: s_addc_u32 s1, s1, (.LBB9_5-.Lpost_getpc10)>>321109; GCN-NEXT: s_setpc_b64 s[0:1]1110; GCN-NEXT: .LBB9_3: ; %loop.preheader1111; GCN-NEXT: s_and_b64 vcc, exec, 01112; GCN-NEXT: .LBB9_4: ; %loop1113; GCN-NEXT: ; =>This Inner Loop Header: Depth=11114; GCN-NEXT: ;;#ASMSTART1115; GCN-NEXT: v_nop_e641116; GCN-NEXT: v_nop_e641117; GCN-NEXT: ;;#ASMEND1118; GCN-NEXT: ;;#ASMSTART1119; GCN-NEXT: v_nop_e641120; GCN-NEXT: v_nop_e641121; GCN-NEXT: v_nop_e641122; GCN-NEXT: v_nop_e641123; GCN-NEXT: ;;#ASMEND1124; GCN-NEXT: s_mov_b64 vcc, vcc1125; GCN-NEXT: s_cbranch_vccnz .LBB9_51126; GCN-NEXT: ; %bb.8: ; %loop1127; GCN-NEXT: ; in Loop: Header=BB9_4 Depth=11128; GCN-NEXT: s_getpc_b64 s[0:1]1129; GCN-NEXT: .Lpost_getpc11:1130; GCN-NEXT: s_add_u32 s0, s0, (.LBB9_4-.Lpost_getpc11)&42949672951131; GCN-NEXT: s_addc_u32 s1, s1, (.LBB9_4-.Lpost_getpc11)>>321132; GCN-NEXT: s_setpc_b64 s[0:1]1133; GCN-NEXT: .LBB9_5: ; %UnifiedReturnBlock1134; GCN-NEXT: s_endpgm1135;1136; GFX11-LABEL: analyze_mask_branch:1137; GFX11: ; %bb.0: ; %entry1138; GFX11-NEXT: s_mov_b64 s[0:1], exec1139; GFX11-NEXT: ;;#ASMSTART1140; GFX11-NEXT: v_mov_b32_e64 v0, 01141; GFX11-NEXT: ;;#ASMEND1142; GFX11-NEXT: v_cmpx_nlt_f32_e32 0, v01143; GFX11-NEXT: s_xor_b64 s[0:1], exec, s[0:1]1144; GFX11-NEXT: s_cbranch_execz .LBB9_21145; GFX11-NEXT: ; %bb.1: ; %ret1146; GFX11-NEXT: v_mov_b32_e32 v0, 71147; GFX11-NEXT: global_store_b32 v[0:1], v0, off dlc1148; GFX11-NEXT: s_waitcnt_vscnt null, 0x01149; GFX11-NEXT: .LBB9_2: ; %Flow11150; GFX11-NEXT: s_and_not1_saveexec_b64 s[0:1], s[0:1]1151; GFX11-NEXT: s_cbranch_execnz .LBB9_31152; GFX11-NEXT: ; %bb.6: ; %Flow11153; GFX11-NEXT: s_getpc_b64 s[0:1]1154; GFX11-NEXT: .Lpost_getpc9:1155; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)1156; GFX11-NEXT: s_add_u32 s0, s0, (.LBB9_5-.Lpost_getpc9)&42949672951157; GFX11-NEXT: s_addc_u32 s1, s1, (.LBB9_5-.Lpost_getpc9)>>321158; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)1159; GFX11-NEXT: s_setpc_b64 s[0:1]1160; GFX11-NEXT: .LBB9_3: ; %loop.preheader1161; GFX11-NEXT: s_and_b64 vcc, exec, 01162; GFX11-NEXT: .p2align 61163; GFX11-NEXT: .LBB9_4: ; %loop1164; GFX11-NEXT: ; =>This Inner Loop Header: Depth=11165; GFX11-NEXT: ;;#ASMSTART1166; GFX11-NEXT: v_nop_e641167; GFX11-NEXT: v_nop_e641168; GFX11-NEXT: ;;#ASMEND1169; GFX11-NEXT: ;;#ASMSTART1170; GFX11-NEXT: v_nop_e641171; GFX11-NEXT: v_nop_e641172; GFX11-NEXT: v_nop_e641173; GFX11-NEXT: v_nop_e641174; GFX11-NEXT: ;;#ASMEND1175; GFX11-NEXT: s_cbranch_vccnz .LBB9_51176; GFX11-NEXT: ; %bb.8: ; %loop1177; GFX11-NEXT: ; in Loop: Header=BB9_4 Depth=11178; GFX11-NEXT: s_getpc_b64 s[0:1]1179; GFX11-NEXT: .Lpost_getpc10:1180; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)1181; GFX11-NEXT: s_add_u32 s0, s0, (.LBB9_4-.Lpost_getpc10)&42949672951182; GFX11-NEXT: s_addc_u32 s1, s1, (.LBB9_4-.Lpost_getpc10)>>321183; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)1184; GFX11-NEXT: s_setpc_b64 s[0:1]1185; GFX11-NEXT: .LBB9_5: ; %UnifiedReturnBlock1186; GFX11-NEXT: s_endpgm1187;1188; GFX12-LABEL: analyze_mask_branch:1189; GFX12: ; %bb.0: ; %entry1190; GFX12-NEXT: s_mov_b32 s0, exec_lo1191; GFX12-NEXT: ;;#ASMSTART1192; GFX12-NEXT: v_mov_b32_e64 v0, 01193; GFX12-NEXT: ;;#ASMEND1194; GFX12-NEXT: v_cmpx_nlt_f32_e32 0, v01195; GFX12-NEXT: s_xor_b32 s0, exec_lo, s01196; GFX12-NEXT: s_cbranch_execz .LBB9_21197; GFX12-NEXT: ; %bb.1: ; %ret1198; GFX12-NEXT: v_mov_b32_e32 v0, 71199; GFX12-NEXT: global_store_b32 v[0:1], v0, off scope:SCOPE_SYS1200; GFX12-NEXT: s_wait_storecnt 0x01201; GFX12-NEXT: .LBB9_2: ; %Flow11202; GFX12-NEXT: s_and_not1_saveexec_b32 s0, s01203; GFX12-NEXT: s_cbranch_execnz .LBB9_31204; GFX12-NEXT: ; %bb.6: ; %Flow11205; GFX12-NEXT: s_getpc_b64 s[0:1]1206; GFX12-NEXT: .Lpost_getpc10:1207; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1208; GFX12-NEXT: s_add_co_u32 s0, s0, (.LBB9_5-.Lpost_getpc10)&42949672951209; GFX12-NEXT: s_add_co_ci_u32 s1, s1, (.LBB9_5-.Lpost_getpc10)>>321210; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1211; GFX12-NEXT: s_setpc_b64 s[0:1]1212; GFX12-NEXT: .LBB9_3: ; %loop.preheader1213; GFX12-NEXT: s_mov_b32 vcc_lo, 01214; GFX12-NEXT: .LBB9_4: ; %loop1215; GFX12-NEXT: ; =>This Inner Loop Header: Depth=11216; GFX12-NEXT: ;;#ASMSTART1217; GFX12-NEXT: v_nop_e641218; GFX12-NEXT: v_nop_e641219; GFX12-NEXT: ;;#ASMEND1220; GFX12-NEXT: ;;#ASMSTART1221; GFX12-NEXT: v_nop_e641222; GFX12-NEXT: v_nop_e641223; GFX12-NEXT: v_nop_e641224; GFX12-NEXT: v_nop_e641225; GFX12-NEXT: ;;#ASMEND1226; GFX12-NEXT: s_cbranch_vccnz .LBB9_51227; GFX12-NEXT: ; %bb.8: ; %loop1228; GFX12-NEXT: ; in Loop: Header=BB9_4 Depth=11229; GFX12-NEXT: s_getpc_b64 s[0:1]1230; GFX12-NEXT: .Lpost_getpc11:1231; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1232; GFX12-NEXT: s_add_co_u32 s0, s0, (.LBB9_4-.Lpost_getpc11)&42949672951233; GFX12-NEXT: s_add_co_ci_u32 s1, s1, (.LBB9_4-.Lpost_getpc11)>>321234; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1235; GFX12-NEXT: s_setpc_b64 s[0:1]1236; GFX12-NEXT: .LBB9_5: ; %UnifiedReturnBlock1237; GFX12-NEXT: s_endpgm1238entry:1239 %reg = call float asm sideeffect "v_mov_b32_e64 $0, 0", "=v"()1240 %cmp0 = fcmp ogt float %reg, 0.000000e+001241 br i1 %cmp0, label %loop, label %ret1242 1243loop:1244 %phi = phi float [ 0.000000e+00, %loop_body ], [ 1.000000e+00, %entry ]1245 call void asm sideeffect1246 "v_nop_e641247 v_nop_e64", ""() #01248 %cmp1 = fcmp olt float %phi, 8.01249 br i1 %cmp1, label %loop_body, label %ret1250 1251loop_body:1252 call void asm sideeffect1253 "v_nop_e641254 v_nop_e641255 v_nop_e641256 v_nop_e64", ""() #01257 br label %loop1258 1259ret:1260 store volatile i32 7, ptr addrspace(1) poison1261 ret void1262}1263 1264define amdgpu_kernel void @long_branch_hang(ptr addrspace(1) nocapture %arg, i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4, i64 %arg5) #0 {1265; GCN-LABEL: long_branch_hang:1266; GCN: ; %bb.0: ; %bb1267; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0xb1268; GCN-NEXT: s_waitcnt lgkmcnt(0)1269; GCN-NEXT: s_cmp_eq_u32 s0, 01270; GCN-NEXT: s_cselect_b64 s[6:7], -1, 01271; GCN-NEXT: s_cmp_lg_u32 s0, 01272; GCN-NEXT: s_cselect_b64 s[8:9], -1, 01273; GCN-NEXT: s_cmp_lt_i32 s3, 61274; GCN-NEXT: s_cbranch_scc1 .LBB10_11275; GCN-NEXT: ; %bb.8: ; %bb1276; GCN-NEXT: s_getpc_b64 s[8:9]1277; GCN-NEXT: .Lpost_getpc12:1278; GCN-NEXT: s_add_u32 s8, s8, (.LBB10_2-.Lpost_getpc12)&42949672951279; GCN-NEXT: s_addc_u32 s9, s9, (.LBB10_2-.Lpost_getpc12)>>321280; GCN-NEXT: s_setpc_b64 s[8:9]1281; GCN-NEXT: .LBB10_1: ; %bb131282; GCN-NEXT: ;;#ASMSTART1283; GCN-NEXT: v_nop_e641284; GCN-NEXT: v_nop_e641285; GCN-NEXT: v_nop_e641286; GCN-NEXT: v_nop_e641287; GCN-NEXT: ;;#ASMEND1288; GCN-NEXT: s_cbranch_execz .LBB10_31289; GCN-NEXT: s_branch .LBB10_41290; GCN-NEXT: .LBB10_2:1291; GCN-NEXT: s_mov_b64 s[8:9], 01292; GCN-NEXT: .LBB10_3: ; %bb91293; GCN-NEXT: s_cmp_lt_i32 s3, 111294; GCN-NEXT: s_cselect_b64 s[8:9], -1, 01295; GCN-NEXT: s_cmp_ge_i32 s2, s31296; GCN-NEXT: s_cselect_b64 s[10:11], -1, 01297; GCN-NEXT: s_and_b64 s[8:9], s[10:11], s[8:9]1298; GCN-NEXT: .LBB10_4: ; %Flow51299; GCN-NEXT: s_andn2_b64 vcc, exec, s[8:9]1300; GCN-NEXT: s_cbranch_vccz .LBB10_51301; GCN-NEXT: ; %bb.10: ; %Flow51302; GCN-NEXT: s_getpc_b64 s[0:1]1303; GCN-NEXT: .Lpost_getpc13:1304; GCN-NEXT: s_add_u32 s0, s0, (.LBB10_6-.Lpost_getpc13)&42949672951305; GCN-NEXT: s_addc_u32 s1, s1, (.LBB10_6-.Lpost_getpc13)>>321306; GCN-NEXT: s_setpc_b64 s[0:1]1307; GCN-NEXT: .LBB10_5: ; %bb141308; GCN-NEXT: s_cmp_lt_i32 s1, 91309; GCN-NEXT: s_cselect_b64 s[0:1], -1, 01310; GCN-NEXT: s_cmp_lt_i32 s2, s31311; GCN-NEXT: s_cselect_b64 s[2:3], -1, 01312; GCN-NEXT: s_or_b64 s[0:1], s[2:3], s[0:1]1313; GCN-NEXT: s_and_b64 s[0:1], s[6:7], s[0:1]1314; GCN-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]1315; GCN-NEXT: s_branch .LBB10_71316; GCN-NEXT: .LBB10_6:1317; GCN-NEXT: ; implicit-def: $vgpr01318; GCN-NEXT: .LBB10_7: ; %bb191319; GCN-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0xf1320; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91321; GCN-NEXT: s_mov_b32 s3, 0xf0001322; GCN-NEXT: s_mov_b32 s2, 01323; GCN-NEXT: s_waitcnt lgkmcnt(0)1324; GCN-NEXT: s_lshl_b64 s[4:5], s[6:7], 21325; GCN-NEXT: v_mov_b32_e32 v1, s41326; GCN-NEXT: v_mov_b32_e32 v2, s51327; GCN-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr641328; GCN-NEXT: s_endpgm1329;1330; GFX11-LABEL: long_branch_hang:1331; GFX11: ; %bb.0: ; %bb1332; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2c1333; GFX11-NEXT: s_waitcnt lgkmcnt(0)1334; GFX11-NEXT: s_cmp_eq_u32 s0, 01335; GFX11-NEXT: s_cselect_b64 s[6:7], -1, 01336; GFX11-NEXT: s_cmp_lg_u32 s0, 01337; GFX11-NEXT: s_cselect_b64 s[8:9], -1, 01338; GFX11-NEXT: s_cmp_lt_i32 s3, 61339; GFX11-NEXT: s_cbranch_scc1 .LBB10_11340; GFX11-NEXT: ; %bb.8: ; %bb1341; GFX11-NEXT: s_getpc_b64 s[8:9]1342; GFX11-NEXT: .Lpost_getpc11:1343; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)1344; GFX11-NEXT: s_add_u32 s8, s8, (.LBB10_2-.Lpost_getpc11)&42949672951345; GFX11-NEXT: s_addc_u32 s9, s9, (.LBB10_2-.Lpost_getpc11)>>321346; GFX11-NEXT: s_waitcnt_depctr depctr_sa_sdst(0)1347; GFX11-NEXT: s_setpc_b64 s[8:9]1348; GFX11-NEXT: .LBB10_1: ; %bb131349; GFX11-NEXT: ;;#ASMSTART1350; GFX11-NEXT: v_nop_e641351; GFX11-NEXT: v_nop_e641352; GFX11-NEXT: v_nop_e641353; GFX11-NEXT: v_nop_e641354; GFX11-NEXT: ;;#ASMEND1355; GFX11-NEXT: s_cbranch_execz .LBB10_31356; GFX11-NEXT: s_branch .LBB10_41357; GFX11-NEXT: .LBB10_2:1358; GFX11-NEXT: s_mov_b64 s[8:9], 01359; GFX11-NEXT: .LBB10_3: ; %bb91360; GFX11-NEXT: s_cmp_lt_i32 s3, 111361; GFX11-NEXT: s_cselect_b64 s[8:9], -1, 01362; GFX11-NEXT: s_cmp_ge_i32 s2, s31363; GFX11-NEXT: s_cselect_b64 s[10:11], -1, 01364; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1365; GFX11-NEXT: s_and_b64 s[8:9], s[10:11], s[8:9]1366; GFX11-NEXT: .LBB10_4: ; %Flow51367; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1368; GFX11-NEXT: s_and_not1_b64 vcc, exec, s[8:9]1369; GFX11-NEXT: s_cbranch_vccnz .LBB10_61370; GFX11-NEXT: ; %bb.5: ; %bb141371; GFX11-NEXT: s_cmp_lt_i32 s1, 91372; GFX11-NEXT: s_cselect_b64 s[0:1], -1, 01373; GFX11-NEXT: s_cmp_lt_i32 s2, s31374; GFX11-NEXT: s_cselect_b64 s[2:3], -1, 01375; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)1376; GFX11-NEXT: s_or_b64 s[0:1], s[2:3], s[0:1]1377; GFX11-NEXT: s_and_b64 s[0:1], s[6:7], s[0:1]1378; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1379; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]1380; GFX11-NEXT: s_branch .LBB10_71381; GFX11-NEXT: .LBB10_6:1382; GFX11-NEXT: ; implicit-def: $vgpr01383; GFX11-NEXT: .LBB10_7: ; %bb191384; GFX11-NEXT: s_clause 0x11385; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x3c1386; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x241387; GFX11-NEXT: v_mov_b32_e32 v1, 01388; GFX11-NEXT: s_waitcnt lgkmcnt(0)1389; GFX11-NEXT: s_lshl_b64 s[0:1], s[0:1], 21390; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1391; GFX11-NEXT: s_add_u32 s0, s2, s01392; GFX11-NEXT: s_addc_u32 s1, s3, s11393; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]1394; GFX11-NEXT: s_endpgm1395;1396; GFX12-LABEL: long_branch_hang:1397; GFX12: ; %bb.0: ; %bb1398; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x2c1399; GFX12-NEXT: s_mov_b32 s7, -11400; GFX12-NEXT: s_wait_kmcnt 0x01401; GFX12-NEXT: s_cmp_eq_u32 s0, 01402; GFX12-NEXT: s_cselect_b32 s6, -1, 01403; GFX12-NEXT: s_cmp_lg_u32 s0, 01404; GFX12-NEXT: s_mov_b32 s0, 01405; GFX12-NEXT: s_cselect_b32 s8, -1, 01406; GFX12-NEXT: s_cmp_lt_i32 s3, 61407; GFX12-NEXT: s_cbranch_scc0 .LBB10_11408; GFX12-NEXT: ; %bb.18: ; %bb1409; GFX12-NEXT: s_getpc_b64 s[10:11]1410; GFX12-NEXT: .Lpost_getpc17:1411; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1412; GFX12-NEXT: s_add_co_u32 s10, s10, (.LBB10_4-.Lpost_getpc17)&42949672951413; GFX12-NEXT: s_add_co_ci_u32 s11, s11, (.LBB10_4-.Lpost_getpc17)>>321414; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1415; GFX12-NEXT: s_setpc_b64 s[10:11]1416; GFX12-NEXT: .LBB10_1: ; %Flow1417; GFX12-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s71418; GFX12-NEXT: s_cbranch_vccnz .LBB10_21419; GFX12-NEXT: ; %bb.10: ; %Flow1420; GFX12-NEXT: s_getpc_b64 s[8:9]1421; GFX12-NEXT: .Lpost_getpc13:1422; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1423; GFX12-NEXT: s_add_co_u32 s8, s8, (.LBB10_5-.Lpost_getpc13)&42949672951424; GFX12-NEXT: s_add_co_ci_u32 s9, s9, (.LBB10_5-.Lpost_getpc13)>>321425; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1426; GFX12-NEXT: s_setpc_b64 s[8:9]1427; GFX12-NEXT: .LBB10_2: ; %Flow51428; GFX12-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s01429; GFX12-NEXT: s_cbranch_vccz .LBB10_31430; GFX12-NEXT: ; %bb.12: ; %Flow51431; GFX12-NEXT: s_getpc_b64 s[0:1]1432; GFX12-NEXT: .Lpost_getpc14:1433; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1434; GFX12-NEXT: s_add_co_u32 s0, s0, (.LBB10_6-.Lpost_getpc14)&42949672951435; GFX12-NEXT: s_add_co_ci_u32 s1, s1, (.LBB10_6-.Lpost_getpc14)>>321436; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1437; GFX12-NEXT: s_setpc_b64 s[0:1]1438; GFX12-NEXT: .LBB10_3: ; %bb141439; GFX12-NEXT: s_cmp_lt_i32 s1, 91440; GFX12-NEXT: s_cselect_b32 s0, -1, 01441; GFX12-NEXT: s_cmp_lt_i32 s2, s31442; GFX12-NEXT: s_cselect_b32 s1, -1, 01443; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)1444; GFX12-NEXT: s_or_b32 s0, s1, s01445; GFX12-NEXT: s_and_b32 s0, s6, s01446; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1447; GFX12-NEXT: v_cndmask_b32_e64 v0, 0, 1, s01448; GFX12-NEXT: ; %bb.8: ; %bb141449; GFX12-NEXT: s_getpc_b64 s[0:1]1450; GFX12-NEXT: .Lpost_getpc12:1451; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1452; GFX12-NEXT: s_add_co_u32 s0, s0, (.LBB10_7-.Lpost_getpc12)&42949672951453; GFX12-NEXT: s_add_co_ci_u32 s1, s1, (.LBB10_7-.Lpost_getpc12)>>321454; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1455; GFX12-NEXT: s_setpc_b64 s[0:1]1456; GFX12-NEXT: .LBB10_4: ; %bb131457; GFX12-NEXT: s_mov_b32 s0, s81458; GFX12-NEXT: ;;#ASMSTART1459; GFX12-NEXT: v_nop_e641460; GFX12-NEXT: v_nop_e641461; GFX12-NEXT: v_nop_e641462; GFX12-NEXT: v_nop_e641463; GFX12-NEXT: ;;#ASMEND1464; GFX12-NEXT: s_cbranch_execz .LBB10_51465; GFX12-NEXT: ; %bb.14: ; %bb131466; GFX12-NEXT: s_getpc_b64 s[8:9]1467; GFX12-NEXT: .Lpost_getpc15:1468; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1469; GFX12-NEXT: s_add_co_u32 s8, s8, (.LBB10_2-.Lpost_getpc15)&42949672951470; GFX12-NEXT: s_add_co_ci_u32 s9, s9, (.LBB10_2-.Lpost_getpc15)>>321471; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1472; GFX12-NEXT: s_setpc_b64 s[8:9]1473; GFX12-NEXT: .LBB10_5: ; %bb91474; GFX12-NEXT: s_cmp_lt_i32 s3, 111475; GFX12-NEXT: s_cselect_b32 s0, -1, 01476; GFX12-NEXT: s_cmp_ge_i32 s2, s31477; GFX12-NEXT: s_cselect_b32 s7, -1, 01478; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)1479; GFX12-NEXT: s_and_b32 s0, s7, s01480; GFX12-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s01481; GFX12-NEXT: s_cbranch_vccnz .LBB10_61482; GFX12-NEXT: ; %bb.16: ; %bb91483; GFX12-NEXT: s_getpc_b64 s[8:9]1484; GFX12-NEXT: .Lpost_getpc16:1485; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1486; GFX12-NEXT: s_add_co_u32 s8, s8, (.LBB10_3-.Lpost_getpc16)&42949672951487; GFX12-NEXT: s_add_co_ci_u32 s9, s9, (.LBB10_3-.Lpost_getpc16)>>321488; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1489; GFX12-NEXT: s_setpc_b64 s[8:9]1490; GFX12-NEXT: .LBB10_6:1491; GFX12-NEXT: ; implicit-def: $vgpr01492; GFX12-NEXT: .LBB10_7: ; %bb191493; GFX12-NEXT: s_clause 0x11494; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x3c1495; GFX12-NEXT: s_load_b64 s[2:3], s[4:5], 0x241496; GFX12-NEXT: v_mov_b32_e32 v1, 01497; GFX12-NEXT: s_wait_kmcnt 0x01498; GFX12-NEXT: s_lshl_b64 s[0:1], s[0:1], 21499; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1500; GFX12-NEXT: s_add_nc_u64 s[0:1], s[2:3], s[0:1]1501; GFX12-NEXT: global_store_b32 v1, v0, s[0:1]1502; GFX12-NEXT: s_endpgm1503bb:1504 %tmp = icmp slt i32 %arg2, 91505 %tmp6 = icmp eq i32 %arg1, 01506 %tmp8 = icmp sgt i32 %arg4, 51507 br i1 %tmp8, label %bb9, label %bb131508 1509bb9: ; preds = %bb1510 %tmp7 = icmp sgt i32 %arg4, 10 ; avoid being optimized away through the domination1511 %tmp11 = icmp slt i32 %arg3, %arg41512 %tmp12 = or i1 %tmp11, %tmp71513 br i1 %tmp12, label %bb19, label %bb141514 1515bb13: ; preds = %bb1516 call void asm sideeffect1517 "v_nop_e641518 v_nop_e641519 v_nop_e641520 v_nop_e64", ""() #01521 br i1 %tmp6, label %bb19, label %bb141522 1523bb14: ; preds = %bb13, %bb91524 %tmp15 = icmp slt i32 %arg3, %arg41525 %tmp16 = or i1 %tmp15, %tmp1526 %tmp17 = and i1 %tmp6, %tmp161527 %tmp18 = zext i1 %tmp17 to i321528 br label %bb191529 1530bb19: ; preds = %bb14, %bb13, %bb91531 %tmp20 = phi i32 [ poison, %bb9 ], [ poison, %bb13 ], [ %tmp18, %bb14 ]1532 %tmp21 = getelementptr inbounds i32, ptr addrspace(1) %arg, i64 %arg51533 store i32 %tmp20, ptr addrspace(1) %tmp21, align 41534 ret void1535}1536 1537attributes #0 = { nounwind }1538attributes #1 = { nounwind readnone }1539