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1; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -enable-ipra=0 | FileCheck -check-prefixes=GCN,CI %s2; RUN: sed 's/CODE_OBJECT_VERSION/500/g' %s | llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -enable-ipra=0 | FileCheck -check-prefixes=GCN-V5 %s3; RUN: sed 's/CODE_OBJECT_VERSION/600/g' %s | llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -enable-ipra=0 | FileCheck -check-prefixes=GCN-V5 %s4; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -enable-ipra=0 | FileCheck -check-prefixes=GCN,VI,VI-NOBUG %s5; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=iceland -enable-ipra=0 | FileCheck -check-prefixes=GCN,VI,VI-BUG %s6; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -enable-ipra=0 | FileCheck -check-prefixes=GCN,CI %s7; RUN: sed 's/CODE_OBJECT_VERSION/500/g' %s | llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -enable-ipra=0 | FileCheck -check-prefixes=GCN-V5 %s8; RUN: sed 's/CODE_OBJECT_VERSION/600/g' %s | llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -enable-ipra=0 | FileCheck -check-prefixes=GCN-V5 %s9; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -enable-ipra=0 | FileCheck -check-prefixes=GCN,VI,VI-NOBUG %s10; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=iceland -enable-ipra=0 | FileCheck -check-prefixes=GCN,VI,VI-BUG %s11 12; Make sure to run a GPU with the SGPR allocation bug.13 14; GCN-LABEL: {{^}}use_vcc:15; GCN: ; TotalNumSgprs: 3416; GCN: ; NumVgprs: 017define void @use_vcc() #1 {18  call void asm sideeffect "", "~{vcc}" () #019  ret void20}21 22; GCN-LABEL: {{^}}indirect_use_vcc:23; GCN: s_mov_b32 s4, s3324; GCN: v_writelane_b32 v40, s4, 225; GCN: v_writelane_b32 v40, s30, 026; GCN: v_writelane_b32 v40, s31, 127; GCN: s_swappc_b6428; GCN: v_readlane_b32 s31, v40, 129; GCN: v_readlane_b32 s30, v40, 030; GCN: v_readlane_b32 s4, v40, 231; GCN: s_mov_b32 s33, s432; GCN: s_setpc_b64 s[30:31]33; GCN: ; TotalNumSgprs: 3634; GCN: ; NumVgprs: 4135define void @indirect_use_vcc() #1 {36  call void @use_vcc()37  ret void38}39 40; GCN-LABEL: {{^}}indirect_2level_use_vcc_kernel:41; CI: ; TotalNumSgprs: 3842; VI-NOBUG: ; TotalNumSgprs: 4043; VI-BUG: ; TotalNumSgprs: 9644; GCN: ; NumVgprs: 4145define amdgpu_kernel void @indirect_2level_use_vcc_kernel(ptr addrspace(1) %out) #0 {46  call void @indirect_use_vcc()47  ret void48}49 50; GCN-LABEL: {{^}}use_flat_scratch:51; CI: ; TotalNumSgprs: 3652; VI: ; TotalNumSgprs: 3853; GCN: ; NumVgprs: 054define void @use_flat_scratch() #1 {55  call void asm sideeffect "", "~{flat_scratch}" () #056  ret void57}58 59; GCN-LABEL: {{^}}indirect_use_flat_scratch:60; CI: ; TotalNumSgprs: 3861; VI: ; TotalNumSgprs: 4062; GCN: ; NumVgprs: 4163define void @indirect_use_flat_scratch() #1 {64  call void @use_flat_scratch()65  ret void66}67 68; GCN-LABEL: {{^}}indirect_2level_use_flat_scratch_kernel:69; CI: ; TotalNumSgprs: 3870; VI-NOBUG: ; TotalNumSgprs: 4071; VI-BUG: ; TotalNumSgprs: 9672; GCN: ; NumVgprs: 4173define amdgpu_kernel void @indirect_2level_use_flat_scratch_kernel(ptr addrspace(1) %out) #0 {74  call void @indirect_use_flat_scratch()75  ret void76}77 78; GCN-LABEL: {{^}}use_10_vgpr:79; GCN: ; NumVgprs: 1080define void @use_10_vgpr() #1 {81  call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4}"() #082  call void asm sideeffect "", "~{v5},~{v6},~{v7},~{v8},~{v9}"() #083  ret void84}85 86; GCN-LABEL: {{^}}indirect_use_10_vgpr:87; GCN: ; NumVgprs: 4188define void @indirect_use_10_vgpr() #0 {89  call void @use_10_vgpr()90  ret void91}92 93; GCN-LABEL: {{^}}indirect_2_level_use_10_vgpr:94; GCN: ; NumVgprs: 4195define amdgpu_kernel void @indirect_2_level_use_10_vgpr() #0 {96  call void @indirect_use_10_vgpr()97  ret void98}99 100; GCN-LABEL: {{^}}use_50_vgpr:101; GCN: ; NumVgprs: 50102define void @use_50_vgpr() #1 {103  call void asm sideeffect "", "~{v49}"() #0104  ret void105}106 107; GCN-LABEL: {{^}}indirect_use_50_vgpr:108; GCN: ; NumVgprs: 50109define void @indirect_use_50_vgpr() #0 {110  call void @use_50_vgpr()111  ret void112}113 114; GCN-LABEL: {{^}}use_80_sgpr:115; GCN: ; TotalNumSgprs: 80116define void @use_80_sgpr() #1 {117  call void asm sideeffect "", "~{s79}"() #0118  ret void119}120 121; GCN-LABEL: {{^}}indirect_use_80_sgpr:122; GCN: ; TotalNumSgprs: 82123define void @indirect_use_80_sgpr() #1 {124  call void @use_80_sgpr()125  ret void126}127 128; GCN-LABEL: {{^}}indirect_2_level_use_80_sgpr:129; CI: ; TotalNumSgprs: 84130; VI-NOBUG: ; TotalNumSgprs: 86131; VI-BUG: ; TotalNumSgprs: 96132define amdgpu_kernel void @indirect_2_level_use_80_sgpr() #0 {133  call void @indirect_use_80_sgpr()134  ret void135}136 137 138; GCN-LABEL: {{^}}use_stack0:139; GCN: ScratchSize: 2052140define void @use_stack0() #1 {141  %alloca = alloca [512 x i32], align 4, addrspace(5)142  call void asm sideeffect "; use $0", "v"(ptr addrspace(5) %alloca) #0143  ret void144}145 146; GCN-LABEL: {{^}}use_stack1:147; GCN: ScratchSize: 404148define void @use_stack1() #1 {149  %alloca = alloca [100 x i32], align 4, addrspace(5)150  call void asm sideeffect "; use $0", "v"(ptr addrspace(5) %alloca) #0151  ret void152}153 154; GCN-LABEL: {{^}}indirect_use_stack:155; GCN: ScratchSize: 2132156define void @indirect_use_stack() #1 {157  %alloca = alloca [16 x i32], align 4, addrspace(5)158  call void asm sideeffect "; use $0", "v"(ptr addrspace(5) %alloca) #0159  call void @use_stack0()160  ret void161}162 163; GCN-LABEL: {{^}}indirect_2_level_use_stack:164; GCN: ScratchSize: 2132165define amdgpu_kernel void @indirect_2_level_use_stack() #0 {166  call void @indirect_use_stack()167  ret void168}169 170 171; Should be maximum of callee usage172; GCN-LABEL: {{^}}multi_call_use_use_stack:173; GCN: ScratchSize: 2052174define amdgpu_kernel void @multi_call_use_use_stack() #0 {175  call void @use_stack0()176  call void @use_stack1()177  ret void178}179 180 181declare void @external() #0182 183; GCN-LABEL: {{^}}usage_external:184; TotalNumSgprs: 48185; NumVgprs: 24186; GCN: ScratchSize: 16384187;188; GCN-V5-LABEL: {{^}}usage_external:189; GCN-V5: ScratchSize: 0190define amdgpu_kernel void @usage_external() #0 {191  call void @external()192  ret void193}194 195declare void @external_recurse() #2196 197; GCN-LABEL: {{^}}usage_external_recurse:198; TotalNumSgprs: 48199; NumVgprs: 24200; GCN: ScratchSize: 16384201;202; GCN-V5-LABEL: {{^}}usage_external_recurse:203; GCN-V5: ScratchSize: 0204define amdgpu_kernel void @usage_external_recurse() #0 {205  call void @external_recurse()206  ret void207}208 209; GCN-LABEL: {{^}}direct_recursion_use_stack:210; GCN: ScratchSize: 18448{{$}}211;212; GCN-V5-LABEL: {{^}}direct_recursion_use_stack:213; GCN-V5: ScratchSize: 2064{{$}}214define void @direct_recursion_use_stack(i32 %val) #2 {215  %alloca = alloca [512 x i32], align 4, addrspace(5)216  call void asm sideeffect "; use $0", "v"(ptr addrspace(5) %alloca) #0217  %cmp = icmp eq i32 %val, 0218  br i1 %cmp, label %ret, label %call219 220call:221  %val.sub1 = sub i32 %val, 1222  call void @direct_recursion_use_stack(i32 %val.sub1)223  br label %ret224 225ret:226  ret void227}228 229; GCN-LABEL: {{^}}usage_direct_recursion:230; GCN: .amdhsa_private_segment_fixed_size 18448231;232; GCN-V5-LABEL: {{^}}usage_direct_recursion:233; GCN-V5: .amdhsa_private_segment_fixed_size 2064{{$}}234define amdgpu_kernel void @usage_direct_recursion(i32 %n) #0 {235  call void @direct_recursion_use_stack(i32 %n)236  ret void237}238 239; Make sure there's no assert when a sgpr96 is used.240; GCN-LABEL: {{^}}count_use_sgpr96_external_call241; GCN: ; sgpr96 s[{{[0-9]+}}:{{[0-9]+}}]242; GCN: .set count_use_sgpr96_external_call.num_vgpr, max(0, amdgpu.max_num_vgpr)243; GCN: .set count_use_sgpr96_external_call.numbered_sgpr, max(33, amdgpu.max_num_sgpr)244; CI: TotalNumSgprs: count_use_sgpr96_external_call.numbered_sgpr+4245; VI-BUG: TotalNumSgprs: 96246; GCN: NumVgprs: count_use_sgpr96_external_call.num_vgpr247define amdgpu_kernel void @count_use_sgpr96_external_call()  {248entry:249  tail call void asm sideeffect "; sgpr96 $0", "s"(<3 x i32> <i32 10, i32 11, i32 12>) #1250  call void @external()251  ret void252}253 254; Make sure there's no assert when a sgpr160 is used.255; GCN-LABEL: {{^}}count_use_sgpr160_external_call256; GCN: ; sgpr160 s[{{[0-9]+}}:{{[0-9]+}}]257; GCN: .set count_use_sgpr160_external_call.num_vgpr, max(0, amdgpu.max_num_vgpr)258; GCN: .set count_use_sgpr160_external_call.numbered_sgpr, max(33, amdgpu.max_num_sgpr)259; CI: TotalNumSgprs: count_use_sgpr160_external_call.numbered_sgpr+4260; VI-BUG: TotalNumSgprs: 96261; GCN: NumVgprs: count_use_sgpr160_external_call.num_vgpr262define amdgpu_kernel void @count_use_sgpr160_external_call()  {263entry:264  tail call void asm sideeffect "; sgpr160 $0", "s"(<5 x i32> <i32 10, i32 11, i32 12, i32 13, i32 14>) #1265  call void @external()266  ret void267}268 269; Make sure there's no assert when a vgpr160 is used.270; GCN-LABEL: {{^}}count_use_vgpr160_external_call271; GCN: ; vgpr160 v[{{[0-9]+}}:{{[0-9]+}}]272; GCN: .set count_use_vgpr160_external_call.num_vgpr, max(5, amdgpu.max_num_vgpr)273; GCN: .set count_use_vgpr160_external_call.numbered_sgpr, max(33, amdgpu.max_num_sgpr)274; CI: TotalNumSgprs: count_use_vgpr160_external_call.numbered_sgpr+4275; VI-BUG: TotalNumSgprs: 96276; GCN: NumVgprs: count_use_vgpr160_external_call.num_vgpr277define amdgpu_kernel void @count_use_vgpr160_external_call()  {278entry:279  tail call void asm sideeffect "; vgpr160 $0", "v"(<5 x i32> <i32 10, i32 11, i32 12, i32 13, i32 14>) #1280  call void @external()281  ret void282}283 284; GCN: .set amdgpu.max_num_vgpr, 50285; GCN: .set amdgpu.max_num_agpr, 0286; GCN: .set amdgpu.max_num_sgpr, 80287 288; GCN-LABEL: amdhsa.kernels:289; GCN:      .name: count_use_sgpr96_external_call290; CI:       .sgpr_count: 84291; VI-NOBUG: .sgpr_count: 86292; VI-BUG:   .sgpr_count: 96293; GCN:      .vgpr_count: 50294; GCN:      .name: count_use_sgpr160_external_call295; CI:       .sgpr_count: 84296; VI-NOBUG: .sgpr_count: 86297; VI-BUG:   .sgpr_count: 96298; GCN:      .vgpr_count: 50299; GCN:      .name: count_use_vgpr160_external_call300; CI:       .sgpr_count: 84301; VI-NOBUG: .sgpr_count: 86302; VI-BUG:   .sgpr_count: 96303; GCN:      .vgpr_count: 50304 305attributes #0 = { nounwind noinline norecurse "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }306attributes #1 = { nounwind noinline norecurse "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }307attributes #2 = { nounwind noinline }308 309!llvm.module.flags = !{!0}310!0 = !{i32 1, !"amdhsa_code_object_version", i32 CODE_OBJECT_VERSION}311