147 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -global-isel=0 -mcpu=hawaii < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SDAG %s3; RUN: llc -mtriple=amdgcn-amd-amdhsa -global-isel=1 -mcpu=hawaii < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GISEL %s4 5; A call should be skipped if all lanes are zero, since we don't know6; what side effects should be avoided inside the call.7define hidden void @func() #1 {8 ret void9}10 11define void @if_call(i32 %flag) #0 {12; GCN-LABEL: if_call:13; GCN: ; %bb.0:14; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)15; GCN-NEXT: s_mov_b32 s20, s3316; GCN-NEXT: s_mov_b32 s33, s3217; GCN-NEXT: s_xor_saveexec_b64 s[16:17], -118; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s33 ; 4-byte Folded Spill19; GCN-NEXT: s_mov_b64 exec, s[16:17]20; GCN-NEXT: v_writelane_b32 v1, s30, 021; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v022; GCN-NEXT: s_addk_i32 s32, 0x40023; GCN-NEXT: v_writelane_b32 v1, s31, 124; GCN-NEXT: s_and_saveexec_b64 s[16:17], vcc25; GCN-NEXT: s_cbranch_execz .LBB1_226; GCN-NEXT: ; %bb.1: ; %call27; GCN-NEXT: s_getpc_b64 s[18:19]28; GCN-NEXT: s_add_u32 s18, s18, func@rel32@lo+429; GCN-NEXT: s_addc_u32 s19, s19, func@rel32@hi+1230; GCN-NEXT: s_swappc_b64 s[30:31], s[18:19]31; GCN-NEXT: .LBB1_2: ; %end32; GCN-NEXT: s_or_b64 exec, exec, s[16:17]33; GCN-NEXT: v_readlane_b32 s31, v1, 134; GCN-NEXT: v_readlane_b32 s30, v1, 035; GCN-NEXT: s_mov_b32 s32, s3336; GCN-NEXT: s_xor_saveexec_b64 s[4:5], -137; GCN-NEXT: buffer_load_dword v1, off, s[0:3], s33 ; 4-byte Folded Reload38; GCN-NEXT: s_mov_b64 exec, s[4:5]39; GCN-NEXT: s_mov_b32 s33, s2040; GCN-NEXT: s_waitcnt vmcnt(0)41; GCN-NEXT: s_setpc_b64 s[30:31]42 %cc = icmp eq i32 %flag, 043 br i1 %cc, label %call, label %end44 45call:46 call void @func()47 br label %end48 49end:50 ret void51}52 53define void @if_asm(i32 %flag) #0 {54; GCN-LABEL: if_asm:55; GCN: ; %bb.0:56; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)57; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v058; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc59; GCN-NEXT: s_cbranch_execz .LBB2_260; GCN-NEXT: ; %bb.1: ; %call61; GCN-NEXT: ;;#ASMSTART62; GCN-NEXT: ; sample asm63; GCN-NEXT: ;;#ASMEND64; GCN-NEXT: .LBB2_2: ; %end65; GCN-NEXT: s_or_b64 exec, exec, s[4:5]66; GCN-NEXT: s_setpc_b64 s[30:31]67 %cc = icmp eq i32 %flag, 068 br i1 %cc, label %call, label %end69 70call:71 call void asm sideeffect "; sample asm", ""()72 br label %end73 74end:75 ret void76}77 78define amdgpu_kernel void @if_call_kernel() #0 {79; SDAG-LABEL: if_call_kernel:80; SDAG: ; %bb.0:81; SDAG-NEXT: s_add_i32 s12, s12, s1782; SDAG-NEXT: s_lshr_b32 flat_scratch_hi, s12, 883; SDAG-NEXT: s_add_u32 s0, s0, s1784; SDAG-NEXT: s_addc_u32 s1, s1, 085; SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v086; SDAG-NEXT: s_mov_b32 s32, 087; SDAG-NEXT: s_mov_b32 flat_scratch_lo, s1388; SDAG-NEXT: s_and_saveexec_b64 s[12:13], vcc89; SDAG-NEXT: s_cbranch_execz .LBB3_290; SDAG-NEXT: ; %bb.1: ; %call91; SDAG-NEXT: v_lshlrev_b32_e32 v1, 10, v192; SDAG-NEXT: v_lshlrev_b32_e32 v2, 20, v293; SDAG-NEXT: v_or_b32_e32 v0, v0, v194; SDAG-NEXT: s_getpc_b64 s[18:19]95; SDAG-NEXT: s_add_u32 s18, s18, func@rel32@lo+496; SDAG-NEXT: s_addc_u32 s19, s19, func@rel32@hi+1297; SDAG-NEXT: v_or_b32_e32 v31, v0, v298; SDAG-NEXT: s_mov_b32 s12, s1499; SDAG-NEXT: s_mov_b32 s13, s15100; SDAG-NEXT: s_mov_b32 s14, s16101; SDAG-NEXT: s_swappc_b64 s[30:31], s[18:19]102; SDAG-NEXT: .LBB3_2: ; %end103; SDAG-NEXT: s_endpgm104;105; GISEL-LABEL: if_call_kernel:106; GISEL: ; %bb.0:107; GISEL-NEXT: s_add_i32 s12, s12, s17108; GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8109; GISEL-NEXT: s_add_u32 s0, s0, s17110; GISEL-NEXT: s_addc_u32 s1, s1, 0111; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0112; GISEL-NEXT: s_mov_b32 s32, 0113; GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13114; GISEL-NEXT: s_and_saveexec_b64 s[12:13], vcc115; GISEL-NEXT: s_cbranch_execz .LBB3_2116; GISEL-NEXT: ; %bb.1: ; %call117; GISEL-NEXT: v_lshlrev_b32_e32 v1, 10, v1118; GISEL-NEXT: v_or_b32_e32 v0, v0, v1119; GISEL-NEXT: v_lshlrev_b32_e32 v1, 20, v2120; GISEL-NEXT: s_getpc_b64 s[18:19]121; GISEL-NEXT: s_add_u32 s18, s18, func@rel32@lo+4122; GISEL-NEXT: s_addc_u32 s19, s19, func@rel32@hi+12123; GISEL-NEXT: v_or_b32_e32 v31, v0, v1124; GISEL-NEXT: s_mov_b32 s12, s14125; GISEL-NEXT: s_mov_b32 s13, s15126; GISEL-NEXT: s_mov_b32 s14, s16127; GISEL-NEXT: s_swappc_b64 s[30:31], s[18:19]128; GISEL-NEXT: .LBB3_2: ; %end129; GISEL-NEXT: s_endpgm130 %id = call i32 @llvm.amdgcn.workitem.id.x()131 %cc = icmp eq i32 %id, 0132 br i1 %cc, label %call, label %end133 134call:135 call void @func()136 br label %end137 138end:139 ret void140}141 142declare i32 @llvm.amdgcn.workitem.id.x() #2143 144attributes #0 = { nounwind }145attributes #1 = { nounwind noinline }146attributes #2 = { nounwind readnone speculatable }147