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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -enable-var-scope -check-prefixes=GCN-ISEL %s3; RUN: llc -mtriple=amdgcn -stop-after=amdgpu-isel -enable-new-pm < %s | FileCheck -enable-var-scope -check-prefixes=GCN-ISEL %s4 5; RUN: llc -mtriple=amdgcn -mcpu=verde < %s | FileCheck -enable-var-scope -check-prefixes=CISI %s6; RUN: llc -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -enable-var-scope -check-prefixes=VI %s7; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -enable-var-scope -check-prefixes=GFX9 %s8; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -enable-var-scope -check-prefixes=GFX1010 %s9; RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -mattr=+wavefrontsize32 < %s | FileCheck -enable-var-scope -check-prefixes=GFX1030W32 %s10; RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -mattr=+wavefrontsize64 < %s | FileCheck -enable-var-scope -check-prefixes=GFX1030W64 %s11; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -enable-var-scope -check-prefixes=GFX11 %s12; RUN: llc -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -enable-var-scope -check-prefixes=GFX1250 %s13 14; GCN-ISEL-LABEL: name: sadd64rr15; GCN-ISEL-LABEL: body:16; GCN-ISEL-LABEL: bb.0.entry:17; GCN-ISEL: S_ADD_U64_PSEUDO18 19define amdgpu_kernel void @sadd64rr(ptr addrspace(1) %out, i64 %a, i64 %b) {20; CISI-LABEL: sadd64rr:21; CISI: ; %bb.0: ; %entry22; CISI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x923; CISI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd24; CISI-NEXT: s_mov_b32 s7, 0xf00025; CISI-NEXT: s_mov_b32 s6, -126; CISI-NEXT: s_waitcnt lgkmcnt(0)27; CISI-NEXT: s_mov_b32 s4, s028; CISI-NEXT: s_add_u32 s0, s2, s829; CISI-NEXT: s_mov_b32 s5, s130; CISI-NEXT: s_addc_u32 s1, s3, s931; CISI-NEXT: v_mov_b32_e32 v0, s032; CISI-NEXT: v_mov_b32_e32 v1, s133; CISI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 034; CISI-NEXT: s_endpgm35;36; VI-LABEL: sadd64rr:37; VI: ; %bb.0: ; %entry38; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2439; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x3440; VI-NEXT: s_waitcnt lgkmcnt(0)41; VI-NEXT: v_mov_b32_e32 v0, s042; VI-NEXT: s_add_u32 s0, s2, s443; VI-NEXT: v_mov_b32_e32 v1, s144; VI-NEXT: s_addc_u32 s1, s3, s545; VI-NEXT: v_mov_b32_e32 v3, s146; VI-NEXT: v_mov_b32_e32 v2, s047; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]48; VI-NEXT: s_endpgm49;50; GFX9-LABEL: sadd64rr:51; GFX9: ; %bb.0: ; %entry52; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2453; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3454; GFX9-NEXT: v_mov_b32_e32 v2, 055; GFX9-NEXT: s_waitcnt lgkmcnt(0)56; GFX9-NEXT: s_add_u32 s2, s2, s657; GFX9-NEXT: s_addc_u32 s3, s3, s758; GFX9-NEXT: v_mov_b32_e32 v0, s259; GFX9-NEXT: v_mov_b32_e32 v1, s360; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]61; GFX9-NEXT: s_endpgm62;63; GFX1010-LABEL: sadd64rr:64; GFX1010: ; %bb.0: ; %entry65; GFX1010-NEXT: s_clause 0x166; GFX1010-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2467; GFX1010-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3468; GFX1010-NEXT: v_mov_b32_e32 v2, 069; GFX1010-NEXT: s_waitcnt lgkmcnt(0)70; GFX1010-NEXT: s_add_u32 s2, s2, s671; GFX1010-NEXT: s_addc_u32 s3, s3, s772; GFX1010-NEXT: v_mov_b32_e32 v0, s273; GFX1010-NEXT: v_mov_b32_e32 v1, s374; GFX1010-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]75; GFX1010-NEXT: s_endpgm76;77; GFX1030W32-LABEL: sadd64rr:78; GFX1030W32: ; %bb.0: ; %entry79; GFX1030W32-NEXT: s_clause 0x180; GFX1030W32-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2481; GFX1030W32-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x3482; GFX1030W32-NEXT: v_mov_b32_e32 v2, 083; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)84; GFX1030W32-NEXT: s_add_u32 s2, s2, s485; GFX1030W32-NEXT: s_addc_u32 s3, s3, s586; GFX1030W32-NEXT: v_mov_b32_e32 v0, s287; GFX1030W32-NEXT: v_mov_b32_e32 v1, s388; GFX1030W32-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]89; GFX1030W32-NEXT: s_endpgm90;91; GFX1030W64-LABEL: sadd64rr:92; GFX1030W64: ; %bb.0: ; %entry93; GFX1030W64-NEXT: s_clause 0x194; GFX1030W64-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2495; GFX1030W64-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x3496; GFX1030W64-NEXT: v_mov_b32_e32 v2, 097; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)98; GFX1030W64-NEXT: s_add_u32 s2, s2, s499; GFX1030W64-NEXT: s_addc_u32 s3, s3, s5100; GFX1030W64-NEXT: v_mov_b32_e32 v0, s2101; GFX1030W64-NEXT: v_mov_b32_e32 v1, s3102; GFX1030W64-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]103; GFX1030W64-NEXT: s_endpgm104;105; GFX11-LABEL: sadd64rr:106; GFX11: ; %bb.0: ; %entry107; GFX11-NEXT: s_clause 0x1108; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24109; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34110; GFX11-NEXT: s_waitcnt lgkmcnt(0)111; GFX11-NEXT: s_add_u32 s2, s2, s4112; GFX11-NEXT: s_addc_u32 s3, s3, s5113; GFX11-NEXT: v_mov_b32_e32 v0, s2114; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3115; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]116; GFX11-NEXT: s_endpgm117;118; GFX1250-LABEL: sadd64rr:119; GFX1250: ; %bb.0: ; %entry120; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1121; GFX1250-NEXT: s_clause 0x1122; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24123; GFX1250-NEXT: s_load_b64 s[6:7], s[4:5], 0x34124; GFX1250-NEXT: v_mov_b32_e32 v2, 0125; GFX1250-NEXT: s_wait_kmcnt 0x0126; GFX1250-NEXT: s_add_nc_u64 s[2:3], s[2:3], s[6:7]127; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)128; GFX1250-NEXT: v_mov_b64_e32 v[0:1], s[2:3]129; GFX1250-NEXT: global_store_b64 v2, v[0:1], s[0:1]130; GFX1250-NEXT: s_endpgm131entry:132 %add = add i64 %a, %b133 store i64 %add, ptr addrspace(1) %out134 ret void135}136 137; GCN-ISEL-LABEL: name: sadd64ri138; GCN-ISEL-LABEL: body:139; GCN-ISEL-LABEL: bb.0.entry:140; GCN-ISEL: S_ADD_U64_PSEUDO141 142define amdgpu_kernel void @sadd64ri(ptr addrspace(1) %out, i64 %a) {143; CISI-LABEL: sadd64ri:144; CISI: ; %bb.0: ; %entry145; CISI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9146; CISI-NEXT: s_mov_b32 s7, 0xf000147; CISI-NEXT: s_mov_b32 s6, -1148; CISI-NEXT: s_waitcnt lgkmcnt(0)149; CISI-NEXT: s_mov_b32 s4, s0150; CISI-NEXT: s_add_u32 s0, s2, 0x56789876151; CISI-NEXT: s_mov_b32 s5, s1152; CISI-NEXT: s_addc_u32 s1, s3, 0x1234153; CISI-NEXT: v_mov_b32_e32 v0, s0154; CISI-NEXT: v_mov_b32_e32 v1, s1155; CISI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0156; CISI-NEXT: s_endpgm157;158; VI-LABEL: sadd64ri:159; VI: ; %bb.0: ; %entry160; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24161; VI-NEXT: s_waitcnt lgkmcnt(0)162; VI-NEXT: v_mov_b32_e32 v0, s0163; VI-NEXT: s_add_u32 s0, s2, 0x56789876164; VI-NEXT: v_mov_b32_e32 v1, s1165; VI-NEXT: s_addc_u32 s1, s3, 0x1234166; VI-NEXT: v_mov_b32_e32 v3, s1167; VI-NEXT: v_mov_b32_e32 v2, s0168; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]169; VI-NEXT: s_endpgm170;171; GFX9-LABEL: sadd64ri:172; GFX9: ; %bb.0: ; %entry173; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24174; GFX9-NEXT: v_mov_b32_e32 v2, 0175; GFX9-NEXT: s_waitcnt lgkmcnt(0)176; GFX9-NEXT: s_add_u32 s2, s2, 0x56789876177; GFX9-NEXT: s_addc_u32 s3, s3, 0x1234178; GFX9-NEXT: v_mov_b32_e32 v0, s2179; GFX9-NEXT: v_mov_b32_e32 v1, s3180; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]181; GFX9-NEXT: s_endpgm182;183; GFX1010-LABEL: sadd64ri:184; GFX1010: ; %bb.0: ; %entry185; GFX1010-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24186; GFX1010-NEXT: v_mov_b32_e32 v2, 0187; GFX1010-NEXT: s_waitcnt lgkmcnt(0)188; GFX1010-NEXT: s_add_u32 s2, s2, 0x56789876189; GFX1010-NEXT: s_addc_u32 s3, s3, 0x1234190; GFX1010-NEXT: v_mov_b32_e32 v0, s2191; GFX1010-NEXT: v_mov_b32_e32 v1, s3192; GFX1010-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]193; GFX1010-NEXT: s_endpgm194;195; GFX1030W32-LABEL: sadd64ri:196; GFX1030W32: ; %bb.0: ; %entry197; GFX1030W32-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24198; GFX1030W32-NEXT: v_mov_b32_e32 v2, 0199; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)200; GFX1030W32-NEXT: s_add_u32 s2, s2, 0x56789876201; GFX1030W32-NEXT: s_addc_u32 s3, s3, 0x1234202; GFX1030W32-NEXT: v_mov_b32_e32 v0, s2203; GFX1030W32-NEXT: v_mov_b32_e32 v1, s3204; GFX1030W32-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]205; GFX1030W32-NEXT: s_endpgm206;207; GFX1030W64-LABEL: sadd64ri:208; GFX1030W64: ; %bb.0: ; %entry209; GFX1030W64-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24210; GFX1030W64-NEXT: v_mov_b32_e32 v2, 0211; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)212; GFX1030W64-NEXT: s_add_u32 s2, s2, 0x56789876213; GFX1030W64-NEXT: s_addc_u32 s3, s3, 0x1234214; GFX1030W64-NEXT: v_mov_b32_e32 v0, s2215; GFX1030W64-NEXT: v_mov_b32_e32 v1, s3216; GFX1030W64-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]217; GFX1030W64-NEXT: s_endpgm218;219; GFX11-LABEL: sadd64ri:220; GFX11: ; %bb.0: ; %entry221; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24222; GFX11-NEXT: s_waitcnt lgkmcnt(0)223; GFX11-NEXT: s_add_u32 s2, s2, 0x56789876224; GFX11-NEXT: s_addc_u32 s3, s3, 0x1234225; GFX11-NEXT: v_mov_b32_e32 v0, s2226; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3227; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]228; GFX11-NEXT: s_endpgm229;230; GFX1250-LABEL: sadd64ri:231; GFX1250: ; %bb.0: ; %entry232; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1233; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24234; GFX1250-NEXT: v_mov_b32_e32 v2, 0235; GFX1250-NEXT: s_wait_kmcnt 0x0236; GFX1250-NEXT: s_add_nc_u64 s[2:3], s[2:3], 0x123456789876237; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)238; GFX1250-NEXT: v_mov_b64_e32 v[0:1], s[2:3]239; GFX1250-NEXT: global_store_b64 v2, v[0:1], s[0:1]240; GFX1250-NEXT: s_endpgm241entry:242 %add = add i64 20015998343286, %a243 store i64 %add, ptr addrspace(1) %out244 ret void245}246 247; GCN-ISEL-LABEL: name: vadd64rr248; GCN-ISEL-LABEL: body:249; GCN-ISEL-LABEL: bb.0.entry:250; GCN-ISEL: V_ADD_U64_PSEUDO251 252define amdgpu_kernel void @vadd64rr(ptr addrspace(1) %out, i64 %a) {253; CISI-LABEL: vadd64rr:254; CISI: ; %bb.0: ; %entry255; CISI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9256; CISI-NEXT: s_mov_b32 s7, 0xf000257; CISI-NEXT: s_mov_b32 s6, -1258; CISI-NEXT: s_waitcnt lgkmcnt(0)259; CISI-NEXT: v_mov_b32_e32 v1, s3260; CISI-NEXT: v_add_i32_e32 v0, vcc, s2, v0261; CISI-NEXT: s_mov_b32 s4, s0262; CISI-NEXT: s_mov_b32 s5, s1263; CISI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc264; CISI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0265; CISI-NEXT: s_endpgm266;267; VI-LABEL: vadd64rr:268; VI: ; %bb.0: ; %entry269; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24270; VI-NEXT: s_waitcnt lgkmcnt(0)271; VI-NEXT: v_mov_b32_e32 v4, s3272; VI-NEXT: v_add_u32_e32 v3, vcc, s2, v0273; VI-NEXT: v_mov_b32_e32 v1, s0274; VI-NEXT: v_mov_b32_e32 v2, s1275; VI-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc276; VI-NEXT: flat_store_dwordx2 v[1:2], v[3:4]277; VI-NEXT: s_endpgm278;279; GFX9-LABEL: vadd64rr:280; GFX9: ; %bb.0: ; %entry281; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24282; GFX9-NEXT: v_mov_b32_e32 v2, 0283; GFX9-NEXT: s_waitcnt lgkmcnt(0)284; GFX9-NEXT: v_mov_b32_e32 v1, s3285; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s2, v0286; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc287; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]288; GFX9-NEXT: s_endpgm289;290; GFX1010-LABEL: vadd64rr:291; GFX1010: ; %bb.0: ; %entry292; GFX1010-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24293; GFX1010-NEXT: v_mov_b32_e32 v2, 0294; GFX1010-NEXT: s_waitcnt lgkmcnt(0)295; GFX1010-NEXT: v_add_co_u32 v0, s2, s2, v0296; GFX1010-NEXT: v_add_co_ci_u32_e64 v1, s2, s3, 0, s2297; GFX1010-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]298; GFX1010-NEXT: s_endpgm299;300; GFX1030W32-LABEL: vadd64rr:301; GFX1030W32: ; %bb.0: ; %entry302; GFX1030W32-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24303; GFX1030W32-NEXT: v_mov_b32_e32 v2, 0304; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)305; GFX1030W32-NEXT: v_add_co_u32 v0, s2, s2, v0306; GFX1030W32-NEXT: v_add_co_ci_u32_e64 v1, null, s3, 0, s2307; GFX1030W32-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]308; GFX1030W32-NEXT: s_endpgm309;310; GFX1030W64-LABEL: vadd64rr:311; GFX1030W64: ; %bb.0: ; %entry312; GFX1030W64-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24313; GFX1030W64-NEXT: v_mov_b32_e32 v2, 0314; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)315; GFX1030W64-NEXT: v_add_co_u32 v0, s[4:5], s2, v0316; GFX1030W64-NEXT: v_add_co_ci_u32_e64 v1, null, s3, 0, s[4:5]317; GFX1030W64-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]318; GFX1030W64-NEXT: s_endpgm319;320; GFX11-LABEL: vadd64rr:321; GFX11: ; %bb.0: ; %entry322; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24323; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0324; GFX11-NEXT: v_mov_b32_e32 v2, 0325; GFX11-NEXT: s_waitcnt lgkmcnt(0)326; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)327; GFX11-NEXT: v_add_co_u32 v0, s2, s2, v0328; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, s3, 0, s2329; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]330; GFX11-NEXT: s_endpgm331;332; GFX1250-LABEL: vadd64rr:333; GFX1250: ; %bb.0: ; %entry334; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1335; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24336; GFX1250-NEXT: v_mov_b32_e32 v1, 0337; GFX1250-NEXT: v_and_b32_e32 v0, 0x3ff, v0338; GFX1250-NEXT: s_wait_kmcnt 0x0339; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)340; GFX1250-NEXT: v_add_nc_u64_e32 v[2:3], s[2:3], v[0:1]341; GFX1250-NEXT: global_store_b64 v1, v[2:3], s[0:1]342; GFX1250-NEXT: s_endpgm343entry:344 %tid = call i32 @llvm.amdgcn.workitem.id.x()345 %tid.ext = sext i32 %tid to i64346 %add = add i64 %a, %tid.ext347 store i64 %add, ptr addrspace(1) %out348 ret void349}350 351; GCN-ISEL-LABEL: name: vadd64ri352; GCN-ISEL-LABEL: body:353; GCN-ISEL-LABEL: bb.0.entry:354; GCN-ISEL: V_ADD_U64_PSEUDO355 356define amdgpu_kernel void @vadd64ri(ptr addrspace(1) %out) {357; CISI-LABEL: vadd64ri:358; CISI: ; %bb.0: ; %entry359; CISI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9360; CISI-NEXT: v_add_i32_e32 v0, vcc, 0x56789876, v0361; CISI-NEXT: v_mov_b32_e32 v1, 0x1234362; CISI-NEXT: s_mov_b32 s3, 0xf000363; CISI-NEXT: s_mov_b32 s2, -1364; CISI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc365; CISI-NEXT: s_waitcnt lgkmcnt(0)366; CISI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0367; CISI-NEXT: s_endpgm368;369; VI-LABEL: vadd64ri:370; VI: ; %bb.0: ; %entry371; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24372; VI-NEXT: v_add_u32_e32 v0, vcc, 0x56789876, v0373; VI-NEXT: v_mov_b32_e32 v1, 0x1234374; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc375; VI-NEXT: s_waitcnt lgkmcnt(0)376; VI-NEXT: v_mov_b32_e32 v3, s1377; VI-NEXT: v_mov_b32_e32 v2, s0378; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]379; VI-NEXT: s_endpgm380;381; GFX9-LABEL: vadd64ri:382; GFX9: ; %bb.0: ; %entry383; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24384; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 0x56789876, v0385; GFX9-NEXT: v_mov_b32_e32 v1, 0x1234386; GFX9-NEXT: v_mov_b32_e32 v2, 0387; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc388; GFX9-NEXT: s_waitcnt lgkmcnt(0)389; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]390; GFX9-NEXT: s_endpgm391;392; GFX1010-LABEL: vadd64ri:393; GFX1010: ; %bb.0: ; %entry394; GFX1010-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24395; GFX1010-NEXT: v_add_co_u32 v0, s2, 0x56789876, v0396; GFX1010-NEXT: v_mov_b32_e32 v2, 0397; GFX1010-NEXT: v_add_co_ci_u32_e64 v1, s2, 0x1234, 0, s2398; GFX1010-NEXT: s_waitcnt lgkmcnt(0)399; GFX1010-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]400; GFX1010-NEXT: s_endpgm401;402; GFX1030W32-LABEL: vadd64ri:403; GFX1030W32: ; %bb.0: ; %entry404; GFX1030W32-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24405; GFX1030W32-NEXT: v_add_co_u32 v0, s2, 0x56789876, v0406; GFX1030W32-NEXT: v_mov_b32_e32 v2, 0407; GFX1030W32-NEXT: v_add_co_ci_u32_e64 v1, null, 0x1234, 0, s2408; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)409; GFX1030W32-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]410; GFX1030W32-NEXT: s_endpgm411;412; GFX1030W64-LABEL: vadd64ri:413; GFX1030W64: ; %bb.0: ; %entry414; GFX1030W64-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24415; GFX1030W64-NEXT: v_add_co_u32 v0, s[2:3], 0x56789876, v0416; GFX1030W64-NEXT: v_mov_b32_e32 v2, 0417; GFX1030W64-NEXT: v_add_co_ci_u32_e64 v1, null, 0x1234, 0, s[2:3]418; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)419; GFX1030W64-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]420; GFX1030W64-NEXT: s_endpgm421;422; GFX11-LABEL: vadd64ri:423; GFX11: ; %bb.0: ; %entry424; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24425; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0426; GFX11-NEXT: v_mov_b32_e32 v2, 0427; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)428; GFX11-NEXT: v_add_co_u32 v0, s2, 0x56789876, v0429; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, 0x1234, 0, s2430; GFX11-NEXT: s_waitcnt lgkmcnt(0)431; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]432; GFX11-NEXT: s_endpgm433;434; GFX1250-LABEL: vadd64ri:435; GFX1250: ; %bb.0: ; %entry436; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1437; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x24438; GFX1250-NEXT: v_mov_b32_e32 v1, 0439; GFX1250-NEXT: v_and_b32_e32 v0, 0x3ff, v0440; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)441; GFX1250-NEXT: v_add_nc_u64_e32 v[2:3], 0x123456789876, v[0:1]442; GFX1250-NEXT: s_wait_kmcnt 0x0443; GFX1250-NEXT: global_store_b64 v1, v[2:3], s[0:1]444; GFX1250-NEXT: s_endpgm445entry:446 %tid = call i32 @llvm.amdgcn.workitem.id.x()447 %tid.ext = sext i32 %tid to i64448 %add = add i64 20015998343286, %tid.ext449 store i64 %add, ptr addrspace(1) %out450 ret void451}452 453; GCN-ISEL-LABEL: name: suaddo32454; GCN-ISEL-LABEL: body:455; GCN-ISEL-LABEL: bb.0456; GCN-ISEL: S_ADD_I32457define amdgpu_kernel void @suaddo32(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i32 %a, i32 %b) #0 {458; CISI-LABEL: suaddo32:459; CISI: ; %bb.0:460; CISI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0xd461; CISI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9462; CISI-NEXT: s_mov_b32 s3, 0xf000463; CISI-NEXT: s_mov_b32 s2, -1464; CISI-NEXT: s_waitcnt lgkmcnt(0)465; CISI-NEXT: s_add_i32 s4, s6, s7466; CISI-NEXT: v_mov_b32_e32 v0, s4467; CISI-NEXT: buffer_store_dword v0, off, s[0:3], 0468; CISI-NEXT: s_endpgm469;470; VI-LABEL: suaddo32:471; VI: ; %bb.0:472; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34473; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24474; VI-NEXT: s_waitcnt lgkmcnt(0)475; VI-NEXT: s_add_i32 s0, s0, s1476; VI-NEXT: v_mov_b32_e32 v0, s2477; VI-NEXT: v_mov_b32_e32 v1, s3478; VI-NEXT: v_mov_b32_e32 v2, s0479; VI-NEXT: flat_store_dword v[0:1], v2480; VI-NEXT: s_endpgm481;482; GFX9-LABEL: suaddo32:483; GFX9: ; %bb.0:484; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34485; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24486; GFX9-NEXT: v_mov_b32_e32 v0, 0487; GFX9-NEXT: s_waitcnt lgkmcnt(0)488; GFX9-NEXT: s_add_i32 s0, s0, s1489; GFX9-NEXT: v_mov_b32_e32 v1, s0490; GFX9-NEXT: global_store_dword v0, v1, s[2:3]491; GFX9-NEXT: s_endpgm492;493; GFX1010-LABEL: suaddo32:494; GFX1010: ; %bb.0:495; GFX1010-NEXT: s_clause 0x1496; GFX1010-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34497; GFX1010-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24498; GFX1010-NEXT: v_mov_b32_e32 v0, 0499; GFX1010-NEXT: s_waitcnt lgkmcnt(0)500; GFX1010-NEXT: s_add_i32 s0, s0, s1501; GFX1010-NEXT: v_mov_b32_e32 v1, s0502; GFX1010-NEXT: global_store_dword v0, v1, s[2:3]503; GFX1010-NEXT: s_endpgm504;505; GFX1030W32-LABEL: suaddo32:506; GFX1030W32: ; %bb.0:507; GFX1030W32-NEXT: s_clause 0x1508; GFX1030W32-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34509; GFX1030W32-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24510; GFX1030W32-NEXT: v_mov_b32_e32 v0, 0511; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)512; GFX1030W32-NEXT: s_add_i32 s0, s0, s1513; GFX1030W32-NEXT: v_mov_b32_e32 v1, s0514; GFX1030W32-NEXT: global_store_dword v0, v1, s[2:3]515; GFX1030W32-NEXT: s_endpgm516;517; GFX1030W64-LABEL: suaddo32:518; GFX1030W64: ; %bb.0:519; GFX1030W64-NEXT: s_clause 0x1520; GFX1030W64-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34521; GFX1030W64-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24522; GFX1030W64-NEXT: v_mov_b32_e32 v0, 0523; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)524; GFX1030W64-NEXT: s_add_i32 s0, s0, s1525; GFX1030W64-NEXT: v_mov_b32_e32 v1, s0526; GFX1030W64-NEXT: global_store_dword v0, v1, s[2:3]527; GFX1030W64-NEXT: s_endpgm528;529; GFX11-LABEL: suaddo32:530; GFX11: ; %bb.0:531; GFX11-NEXT: s_clause 0x1532; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x34533; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x24534; GFX11-NEXT: s_waitcnt lgkmcnt(0)535; GFX11-NEXT: s_add_i32 s0, s0, s1536; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)537; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0538; GFX11-NEXT: global_store_b32 v0, v1, s[2:3]539; GFX11-NEXT: s_endpgm540;541; GFX1250-LABEL: suaddo32:542; GFX1250: ; %bb.0:543; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1544; GFX1250-NEXT: s_clause 0x1545; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x34546; GFX1250-NEXT: s_load_b64 s[2:3], s[4:5], 0x24547; GFX1250-NEXT: s_wait_kmcnt 0x0548; GFX1250-NEXT: s_add_co_i32 s0, s0, s1549; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)550; GFX1250-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0551; GFX1250-NEXT: global_store_b32 v0, v1, s[2:3]552; GFX1250-NEXT: s_endpgm553 %uadd = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)554 %val = extractvalue { i32, i1 } %uadd, 0555 %carry = extractvalue { i32, i1 } %uadd, 1556 store i32 %val, ptr addrspace(1) %out, align 4557 ret void558}559 560 561; GCN-ISEL-LABEL: name: uaddo32_vcc_user562; GCN-ISEL-LABEL: body:563; GCN-ISEL-LABEL: bb.0564; GCN-ISEL: V_ADD_CO_U32_e64565 566; below we check selection to v_add/addc567; because the only user of VCC produced by the UADDOis v_cndmask.568; We select to VALU form to avoid unnecessary s_cselect to copy SCC to VCC569 570define amdgpu_kernel void @uaddo32_vcc_user(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i32 %a, i32 %b) #0 {571; CISI-LABEL: uaddo32_vcc_user:572; CISI: ; %bb.0:573; CISI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9574; CISI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd575; CISI-NEXT: s_mov_b32 s7, 0xf000576; CISI-NEXT: s_mov_b32 s6, -1577; CISI-NEXT: s_waitcnt lgkmcnt(0)578; CISI-NEXT: s_mov_b32 s4, s0579; CISI-NEXT: v_mov_b32_e32 v0, s9580; CISI-NEXT: s_mov_b32 s5, s1581; CISI-NEXT: v_add_i32_e32 v0, vcc, s8, v0582; CISI-NEXT: s_mov_b32 s0, s2583; CISI-NEXT: s_mov_b32 s1, s3584; CISI-NEXT: s_mov_b32 s2, s6585; CISI-NEXT: s_mov_b32 s3, s7586; CISI-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc587; CISI-NEXT: buffer_store_dword v0, off, s[4:7], 0588; CISI-NEXT: buffer_store_byte v1, off, s[0:3], 0589; CISI-NEXT: s_endpgm590;591; VI-LABEL: uaddo32_vcc_user:592; VI: ; %bb.0:593; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24594; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34595; VI-NEXT: s_waitcnt lgkmcnt(0)596; VI-NEXT: v_mov_b32_e32 v0, s0597; VI-NEXT: v_mov_b32_e32 v4, s5598; VI-NEXT: v_mov_b32_e32 v1, s1599; VI-NEXT: v_add_u32_e32 v4, vcc, s4, v4600; VI-NEXT: v_mov_b32_e32 v2, s2601; VI-NEXT: v_mov_b32_e32 v3, s3602; VI-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc603; VI-NEXT: flat_store_dword v[0:1], v4604; VI-NEXT: flat_store_byte v[2:3], v5605; VI-NEXT: s_endpgm606;607; GFX9-LABEL: uaddo32_vcc_user:608; GFX9: ; %bb.0:609; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34610; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24611; GFX9-NEXT: v_mov_b32_e32 v0, 0612; GFX9-NEXT: s_waitcnt lgkmcnt(0)613; GFX9-NEXT: v_mov_b32_e32 v1, s7614; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, s6, v1615; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc616; GFX9-NEXT: global_store_dword v0, v1, s[0:1]617; GFX9-NEXT: global_store_byte v0, v2, s[2:3]618; GFX9-NEXT: s_endpgm619;620; GFX1010-LABEL: uaddo32_vcc_user:621; GFX1010: ; %bb.0:622; GFX1010-NEXT: s_clause 0x1623; GFX1010-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34624; GFX1010-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24625; GFX1010-NEXT: v_mov_b32_e32 v0, 0626; GFX1010-NEXT: s_waitcnt lgkmcnt(0)627; GFX1010-NEXT: v_add_co_u32 v1, s4, s6, s7628; GFX1010-NEXT: v_cndmask_b32_e64 v2, 0, 1, s4629; GFX1010-NEXT: global_store_dword v0, v1, s[0:1]630; GFX1010-NEXT: global_store_byte v0, v2, s[2:3]631; GFX1010-NEXT: s_endpgm632;633; GFX1030W32-LABEL: uaddo32_vcc_user:634; GFX1030W32: ; %bb.0:635; GFX1030W32-NEXT: s_clause 0x1636; GFX1030W32-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34637; GFX1030W32-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24638; GFX1030W32-NEXT: v_mov_b32_e32 v0, 0639; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)640; GFX1030W32-NEXT: v_add_co_u32 v1, s4, s6, s7641; GFX1030W32-NEXT: v_cndmask_b32_e64 v2, 0, 1, s4642; GFX1030W32-NEXT: global_store_dword v0, v1, s[0:1]643; GFX1030W32-NEXT: global_store_byte v0, v2, s[2:3]644; GFX1030W32-NEXT: s_endpgm645;646; GFX1030W64-LABEL: uaddo32_vcc_user:647; GFX1030W64: ; %bb.0:648; GFX1030W64-NEXT: s_clause 0x1649; GFX1030W64-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34650; GFX1030W64-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24651; GFX1030W64-NEXT: v_mov_b32_e32 v0, 0652; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)653; GFX1030W64-NEXT: v_add_co_u32 v1, s[4:5], s6, s7654; GFX1030W64-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[4:5]655; GFX1030W64-NEXT: global_store_dword v0, v1, s[0:1]656; GFX1030W64-NEXT: global_store_byte v0, v2, s[2:3]657; GFX1030W64-NEXT: s_endpgm658;659; GFX11-LABEL: uaddo32_vcc_user:660; GFX11: ; %bb.0:661; GFX11-NEXT: s_clause 0x1662; GFX11-NEXT: s_load_b64 s[6:7], s[4:5], 0x34663; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24664; GFX11-NEXT: v_mov_b32_e32 v0, 0665; GFX11-NEXT: s_waitcnt lgkmcnt(0)666; GFX11-NEXT: v_add_co_u32 v1, s4, s6, s7667; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)668; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s4669; GFX11-NEXT: s_clause 0x1670; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]671; GFX11-NEXT: global_store_b8 v0, v2, s[2:3]672; GFX11-NEXT: s_endpgm673;674; GFX1250-LABEL: uaddo32_vcc_user:675; GFX1250: ; %bb.0:676; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1677; GFX1250-NEXT: s_clause 0x1678; GFX1250-NEXT: s_load_b64 s[6:7], s[4:5], 0x34679; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24680; GFX1250-NEXT: v_mov_b32_e32 v0, 0681; GFX1250-NEXT: s_wait_kmcnt 0x0682; GFX1250-NEXT: v_add_co_u32 v1, s4, s6, s7683; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)684; GFX1250-NEXT: v_cndmask_b32_e64 v2, 0, 1, s4685; GFX1250-NEXT: s_clause 0x1686; GFX1250-NEXT: global_store_b32 v0, v1, s[0:1]687; GFX1250-NEXT: global_store_b8 v0, v2, s[2:3]688; GFX1250-NEXT: s_endpgm689 %uadd = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)690 %val = extractvalue { i32, i1 } %uadd, 0691 %carry = extractvalue { i32, i1 } %uadd, 1692 store i32 %val, ptr addrspace(1) %out, align 4693 store i1 %carry, ptr addrspace(1) %carryout694 ret void695}696 697; GCN-ISEL-LABEL: name: suaddo64698; GCN-ISEL-LABEL: body:699; GCN-ISEL-LABEL: bb.0700; GCN-ISEL: S_UADDO_PSEUDO701; GCN-ISEL: S_ADD_CO_PSEUDO702 703define amdgpu_kernel void @suaddo64(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i64 %a, i64 %b) #0 {704; CISI-LABEL: suaddo64:705; CISI: ; %bb.0:706; CISI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9707; CISI-NEXT: s_mov_b32 s11, 0xf000708; CISI-NEXT: s_mov_b32 s10, -1709; CISI-NEXT: s_waitcnt lgkmcnt(0)710; CISI-NEXT: s_add_u32 s4, s4, s6711; CISI-NEXT: s_addc_u32 s5, s5, s7712; CISI-NEXT: s_mov_b32 s8, s0713; CISI-NEXT: s_mov_b32 s9, s1714; CISI-NEXT: v_mov_b32_e32 v0, s4715; CISI-NEXT: v_mov_b32_e32 v1, s5716; CISI-NEXT: s_cselect_b64 s[4:5], -1, 0717; CISI-NEXT: s_mov_b32 s0, s2718; CISI-NEXT: s_mov_b32 s1, s3719; CISI-NEXT: s_mov_b32 s2, s10720; CISI-NEXT: s_mov_b32 s3, s11721; CISI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0722; CISI-NEXT: s_waitcnt expcnt(0)723; CISI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5]724; CISI-NEXT: buffer_store_byte v0, off, s[0:3], 0725; CISI-NEXT: s_endpgm726;727; VI-LABEL: suaddo64:728; VI: ; %bb.0:729; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24730; VI-NEXT: s_waitcnt lgkmcnt(0)731; VI-NEXT: v_mov_b32_e32 v0, s0732; VI-NEXT: s_add_u32 s0, s4, s6733; VI-NEXT: v_mov_b32_e32 v1, s1734; VI-NEXT: s_addc_u32 s1, s5, s7735; VI-NEXT: v_mov_b32_e32 v4, s0736; VI-NEXT: v_mov_b32_e32 v5, s1737; VI-NEXT: s_cselect_b64 s[0:1], -1, 0738; VI-NEXT: v_mov_b32_e32 v2, s2739; VI-NEXT: v_mov_b32_e32 v3, s3740; VI-NEXT: flat_store_dwordx2 v[0:1], v[4:5]741; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]742; VI-NEXT: flat_store_byte v[2:3], v0743; VI-NEXT: s_endpgm744;745; GFX9-LABEL: suaddo64:746; GFX9: ; %bb.0:747; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24748; GFX9-NEXT: v_mov_b32_e32 v2, 0749; GFX9-NEXT: s_waitcnt lgkmcnt(0)750; GFX9-NEXT: s_add_u32 s0, s12, s14751; GFX9-NEXT: s_addc_u32 s1, s13, s15752; GFX9-NEXT: v_mov_b32_e32 v0, s0753; GFX9-NEXT: v_mov_b32_e32 v1, s1754; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 0755; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[0:1]756; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[8:9]757; GFX9-NEXT: global_store_byte v2, v3, s[10:11]758; GFX9-NEXT: s_endpgm759;760; GFX1010-LABEL: suaddo64:761; GFX1010: ; %bb.0:762; GFX1010-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24763; GFX1010-NEXT: v_mov_b32_e32 v2, 0764; GFX1010-NEXT: s_waitcnt lgkmcnt(0)765; GFX1010-NEXT: s_add_u32 s0, s12, s14766; GFX1010-NEXT: s_addc_u32 s1, s13, s15767; GFX1010-NEXT: v_mov_b32_e32 v0, s0768; GFX1010-NEXT: s_cselect_b32 s0, -1, 0769; GFX1010-NEXT: v_mov_b32_e32 v1, s1770; GFX1010-NEXT: v_cndmask_b32_e64 v3, 0, 1, s0771; GFX1010-NEXT: global_store_dwordx2 v2, v[0:1], s[8:9]772; GFX1010-NEXT: global_store_byte v2, v3, s[10:11]773; GFX1010-NEXT: s_endpgm774;775; GFX1030W32-LABEL: suaddo64:776; GFX1030W32: ; %bb.0:777; GFX1030W32-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24778; GFX1030W32-NEXT: v_mov_b32_e32 v2, 0779; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)780; GFX1030W32-NEXT: s_add_u32 s4, s4, s6781; GFX1030W32-NEXT: s_addc_u32 s5, s5, s7782; GFX1030W32-NEXT: v_mov_b32_e32 v0, s4783; GFX1030W32-NEXT: s_cselect_b32 s4, -1, 0784; GFX1030W32-NEXT: v_mov_b32_e32 v1, s5785; GFX1030W32-NEXT: v_cndmask_b32_e64 v3, 0, 1, s4786; GFX1030W32-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]787; GFX1030W32-NEXT: global_store_byte v2, v3, s[2:3]788; GFX1030W32-NEXT: s_endpgm789;790; GFX1030W64-LABEL: suaddo64:791; GFX1030W64: ; %bb.0:792; GFX1030W64-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24793; GFX1030W64-NEXT: v_mov_b32_e32 v2, 0794; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)795; GFX1030W64-NEXT: s_add_u32 s4, s4, s6796; GFX1030W64-NEXT: s_addc_u32 s5, s5, s7797; GFX1030W64-NEXT: v_mov_b32_e32 v0, s4798; GFX1030W64-NEXT: v_mov_b32_e32 v1, s5799; GFX1030W64-NEXT: s_cselect_b64 s[4:5], -1, 0800; GFX1030W64-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[4:5]801; GFX1030W64-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]802; GFX1030W64-NEXT: global_store_byte v2, v3, s[2:3]803; GFX1030W64-NEXT: s_endpgm804;805; GFX11-LABEL: suaddo64:806; GFX11: ; %bb.0:807; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24808; GFX11-NEXT: s_waitcnt lgkmcnt(0)809; GFX11-NEXT: s_add_u32 s4, s4, s6810; GFX11-NEXT: s_addc_u32 s5, s5, s7811; GFX11-NEXT: v_mov_b32_e32 v0, s4812; GFX11-NEXT: s_cselect_b32 s4, -1, 0813; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s5814; GFX11-NEXT: v_cndmask_b32_e64 v3, 0, 1, s4815; GFX11-NEXT: s_clause 0x1816; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]817; GFX11-NEXT: global_store_b8 v2, v3, s[2:3]818; GFX11-NEXT: s_endpgm819;820; GFX1250-LABEL: suaddo64:821; GFX1250: ; %bb.0:822; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1823; GFX1250-NEXT: s_load_b256 s[8:15], s[4:5], 0x24824; GFX1250-NEXT: s_wait_kmcnt 0x0825; GFX1250-NEXT: s_add_co_u32 s0, s12, s14826; GFX1250-NEXT: s_add_co_ci_u32 s1, s13, s15827; GFX1250-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v0, s0828; GFX1250-NEXT: s_cselect_b32 s0, -1, 0829; GFX1250-NEXT: v_mov_b32_e32 v1, s1830; GFX1250-NEXT: v_cndmask_b32_e64 v3, 0, 1, s0831; GFX1250-NEXT: s_clause 0x1832; GFX1250-NEXT: global_store_b64 v2, v[0:1], s[8:9]833; GFX1250-NEXT: global_store_b8 v2, v3, s[10:11]834; GFX1250-NEXT: s_endpgm835 %uadd = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)836 %val = extractvalue { i64, i1 } %uadd, 0837 %carry = extractvalue { i64, i1 } %uadd, 1838 store i64 %val, ptr addrspace(1) %out, align 8839 store i1 %carry, ptr addrspace(1) %carryout840 ret void841}842 843; GCN-ISEL-LABEL: name: vuaddo64844; GCN-ISEL-LABEL: body:845; GCN-ISEL-LABEL: bb.0846; GCN-ISEL: V_ADD_CO_U32_e64847; GCN-ISEL: V_ADDC_U32_e64848 849define amdgpu_kernel void @vuaddo64(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i64 %a) #0 {850; CISI-LABEL: vuaddo64:851; CISI: ; %bb.0:852; CISI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9853; CISI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd854; CISI-NEXT: s_mov_b32 s7, 0xf000855; CISI-NEXT: s_mov_b32 s6, -1856; CISI-NEXT: s_waitcnt lgkmcnt(0)857; CISI-NEXT: s_mov_b32 s4, s0858; CISI-NEXT: v_mov_b32_e32 v1, s9859; CISI-NEXT: v_add_i32_e32 v0, vcc, s8, v0860; CISI-NEXT: s_mov_b32 s5, s1861; CISI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc862; CISI-NEXT: s_mov_b32 s0, s2863; CISI-NEXT: s_mov_b32 s1, s3864; CISI-NEXT: s_mov_b32 s2, s6865; CISI-NEXT: s_mov_b32 s3, s7866; CISI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0867; CISI-NEXT: s_waitcnt expcnt(0)868; CISI-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc869; CISI-NEXT: buffer_store_byte v0, off, s[0:3], 0870; CISI-NEXT: s_endpgm871;872; VI-LABEL: vuaddo64:873; VI: ; %bb.0:874; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24875; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34876; VI-NEXT: s_waitcnt lgkmcnt(0)877; VI-NEXT: v_mov_b32_e32 v1, s0878; VI-NEXT: v_mov_b32_e32 v6, s5879; VI-NEXT: v_add_u32_e32 v5, vcc, s4, v0880; VI-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc881; VI-NEXT: v_mov_b32_e32 v2, s1882; VI-NEXT: v_mov_b32_e32 v3, s2883; VI-NEXT: v_mov_b32_e32 v4, s3884; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc885; VI-NEXT: flat_store_dwordx2 v[1:2], v[5:6]886; VI-NEXT: flat_store_byte v[3:4], v0887; VI-NEXT: s_endpgm888;889; GFX9-LABEL: vuaddo64:890; GFX9: ; %bb.0:891; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34892; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24893; GFX9-NEXT: v_mov_b32_e32 v2, 0894; GFX9-NEXT: s_waitcnt lgkmcnt(0)895; GFX9-NEXT: v_mov_b32_e32 v1, s7896; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v0897; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc898; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]899; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc900; GFX9-NEXT: global_store_byte v2, v0, s[2:3]901; GFX9-NEXT: s_endpgm902;903; GFX1010-LABEL: vuaddo64:904; GFX1010: ; %bb.0:905; GFX1010-NEXT: s_clause 0x1906; GFX1010-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34907; GFX1010-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24908; GFX1010-NEXT: v_mov_b32_e32 v2, 0909; GFX1010-NEXT: s_waitcnt lgkmcnt(0)910; GFX1010-NEXT: v_add_co_u32 v0, s4, s6, v0911; GFX1010-NEXT: v_add_co_ci_u32_e64 v1, s4, s7, 0, s4912; GFX1010-NEXT: v_cndmask_b32_e64 v3, 0, 1, s4913; GFX1010-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]914; GFX1010-NEXT: global_store_byte v2, v3, s[2:3]915; GFX1010-NEXT: s_endpgm916;917; GFX1030W32-LABEL: vuaddo64:918; GFX1030W32: ; %bb.0:919; GFX1030W32-NEXT: s_clause 0x1920; GFX1030W32-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34921; GFX1030W32-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24922; GFX1030W32-NEXT: v_mov_b32_e32 v2, 0923; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)924; GFX1030W32-NEXT: v_add_co_u32 v0, s4, s6, v0925; GFX1030W32-NEXT: v_add_co_ci_u32_e64 v1, s4, s7, 0, s4926; GFX1030W32-NEXT: v_cndmask_b32_e64 v3, 0, 1, s4927; GFX1030W32-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]928; GFX1030W32-NEXT: global_store_byte v2, v3, s[2:3]929; GFX1030W32-NEXT: s_endpgm930;931; GFX1030W64-LABEL: vuaddo64:932; GFX1030W64: ; %bb.0:933; GFX1030W64-NEXT: s_clause 0x1934; GFX1030W64-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34935; GFX1030W64-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24936; GFX1030W64-NEXT: v_mov_b32_e32 v2, 0937; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)938; GFX1030W64-NEXT: v_add_co_u32 v0, s[4:5], s6, v0939; GFX1030W64-NEXT: v_add_co_ci_u32_e64 v1, s[4:5], s7, 0, s[4:5]940; GFX1030W64-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[4:5]941; GFX1030W64-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]942; GFX1030W64-NEXT: global_store_byte v2, v3, s[2:3]943; GFX1030W64-NEXT: s_endpgm944;945; GFX11-LABEL: vuaddo64:946; GFX11: ; %bb.0:947; GFX11-NEXT: s_clause 0x1948; GFX11-NEXT: s_load_b64 s[6:7], s[4:5], 0x34949; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24950; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0951; GFX11-NEXT: v_mov_b32_e32 v2, 0952; GFX11-NEXT: s_waitcnt lgkmcnt(0)953; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)954; GFX11-NEXT: v_add_co_u32 v0, s4, s6, v0955; GFX11-NEXT: v_add_co_ci_u32_e64 v1, s4, s7, 0, s4956; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)957; GFX11-NEXT: v_cndmask_b32_e64 v3, 0, 1, s4958; GFX11-NEXT: s_clause 0x1959; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]960; GFX11-NEXT: global_store_b8 v2, v3, s[2:3]961; GFX11-NEXT: s_endpgm962;963; GFX1250-LABEL: vuaddo64:964; GFX1250: ; %bb.0:965; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1966; GFX1250-NEXT: s_clause 0x1967; GFX1250-NEXT: s_load_b64 s[6:7], s[4:5], 0x34968; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24969; GFX1250-NEXT: v_and_b32_e32 v0, 0x3ff, v0970; GFX1250-NEXT: v_mov_b32_e32 v2, 0971; GFX1250-NEXT: s_wait_kmcnt 0x0972; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)973; GFX1250-NEXT: v_add_co_u32 v0, s4, s6, v0974; GFX1250-NEXT: v_add_co_ci_u32_e64 v1, s4, s7, 0, s4975; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)976; GFX1250-NEXT: v_cndmask_b32_e64 v3, 0, 1, s4977; GFX1250-NEXT: s_clause 0x1978; GFX1250-NEXT: global_store_b64 v2, v[0:1], s[0:1]979; GFX1250-NEXT: global_store_b8 v2, v3, s[2:3]980; GFX1250-NEXT: s_endpgm981 %tid = call i32 @llvm.amdgcn.workitem.id.x()982 %tid.ext = sext i32 %tid to i64983 %uadd = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %a, i64 %tid.ext)984 %val = extractvalue { i64, i1 } %uadd, 0985 %carry = extractvalue { i64, i1 } %uadd, 1986 store i64 %val, ptr addrspace(1) %out, align 8987 store i1 %carry, ptr addrspace(1) %carryout988 ret void989}990 991; GCN-ISEL-LABEL: name: ssub64rr992; GCN-ISEL-LABEL: body:993; GCN-ISEL-LABEL: bb.0.entry:994; GCN-ISEL: S_SUB_U64_PSEUDO995 996define amdgpu_kernel void @ssub64rr(ptr addrspace(1) %out, i64 %a, i64 %b) {997; CISI-LABEL: ssub64rr:998; CISI: ; %bb.0: ; %entry999; CISI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91000; CISI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd1001; CISI-NEXT: s_mov_b32 s7, 0xf0001002; CISI-NEXT: s_mov_b32 s6, -11003; CISI-NEXT: s_waitcnt lgkmcnt(0)1004; CISI-NEXT: s_mov_b32 s4, s01005; CISI-NEXT: s_sub_u32 s0, s2, s81006; CISI-NEXT: s_mov_b32 s5, s11007; CISI-NEXT: s_subb_u32 s1, s3, s91008; CISI-NEXT: v_mov_b32_e32 v0, s01009; CISI-NEXT: v_mov_b32_e32 v1, s11010; CISI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01011; CISI-NEXT: s_endpgm1012;1013; VI-LABEL: ssub64rr:1014; VI: ; %bb.0: ; %entry1015; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241016; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x341017; VI-NEXT: s_waitcnt lgkmcnt(0)1018; VI-NEXT: v_mov_b32_e32 v0, s01019; VI-NEXT: s_sub_u32 s0, s2, s41020; VI-NEXT: v_mov_b32_e32 v1, s11021; VI-NEXT: s_subb_u32 s1, s3, s51022; VI-NEXT: v_mov_b32_e32 v3, s11023; VI-NEXT: v_mov_b32_e32 v2, s01024; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]1025; VI-NEXT: s_endpgm1026;1027; GFX9-LABEL: ssub64rr:1028; GFX9: ; %bb.0: ; %entry1029; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241030; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341031; GFX9-NEXT: v_mov_b32_e32 v2, 01032; GFX9-NEXT: s_waitcnt lgkmcnt(0)1033; GFX9-NEXT: s_sub_u32 s2, s2, s61034; GFX9-NEXT: s_subb_u32 s3, s3, s71035; GFX9-NEXT: v_mov_b32_e32 v0, s21036; GFX9-NEXT: v_mov_b32_e32 v1, s31037; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1038; GFX9-NEXT: s_endpgm1039;1040; GFX1010-LABEL: ssub64rr:1041; GFX1010: ; %bb.0: ; %entry1042; GFX1010-NEXT: s_clause 0x11043; GFX1010-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241044; GFX1010-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341045; GFX1010-NEXT: v_mov_b32_e32 v2, 01046; GFX1010-NEXT: s_waitcnt lgkmcnt(0)1047; GFX1010-NEXT: s_sub_u32 s2, s2, s61048; GFX1010-NEXT: s_subb_u32 s3, s3, s71049; GFX1010-NEXT: v_mov_b32_e32 v0, s21050; GFX1010-NEXT: v_mov_b32_e32 v1, s31051; GFX1010-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1052; GFX1010-NEXT: s_endpgm1053;1054; GFX1030W32-LABEL: ssub64rr:1055; GFX1030W32: ; %bb.0: ; %entry1056; GFX1030W32-NEXT: s_clause 0x11057; GFX1030W32-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241058; GFX1030W32-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x341059; GFX1030W32-NEXT: v_mov_b32_e32 v2, 01060; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)1061; GFX1030W32-NEXT: s_sub_u32 s2, s2, s41062; GFX1030W32-NEXT: s_subb_u32 s3, s3, s51063; GFX1030W32-NEXT: v_mov_b32_e32 v0, s21064; GFX1030W32-NEXT: v_mov_b32_e32 v1, s31065; GFX1030W32-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1066; GFX1030W32-NEXT: s_endpgm1067;1068; GFX1030W64-LABEL: ssub64rr:1069; GFX1030W64: ; %bb.0: ; %entry1070; GFX1030W64-NEXT: s_clause 0x11071; GFX1030W64-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241072; GFX1030W64-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x341073; GFX1030W64-NEXT: v_mov_b32_e32 v2, 01074; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)1075; GFX1030W64-NEXT: s_sub_u32 s2, s2, s41076; GFX1030W64-NEXT: s_subb_u32 s3, s3, s51077; GFX1030W64-NEXT: v_mov_b32_e32 v0, s21078; GFX1030W64-NEXT: v_mov_b32_e32 v1, s31079; GFX1030W64-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1080; GFX1030W64-NEXT: s_endpgm1081;1082; GFX11-LABEL: ssub64rr:1083; GFX11: ; %bb.0: ; %entry1084; GFX11-NEXT: s_clause 0x11085; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x241086; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x341087; GFX11-NEXT: s_waitcnt lgkmcnt(0)1088; GFX11-NEXT: s_sub_u32 s2, s2, s41089; GFX11-NEXT: s_subb_u32 s3, s3, s51090; GFX11-NEXT: v_mov_b32_e32 v0, s21091; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s31092; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]1093; GFX11-NEXT: s_endpgm1094;1095; GFX1250-LABEL: ssub64rr:1096; GFX1250: ; %bb.0: ; %entry1097; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11098; GFX1250-NEXT: s_clause 0x11099; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x241100; GFX1250-NEXT: s_load_b64 s[6:7], s[4:5], 0x341101; GFX1250-NEXT: v_mov_b32_e32 v2, 01102; GFX1250-NEXT: s_wait_kmcnt 0x01103; GFX1250-NEXT: s_sub_nc_u64 s[2:3], s[2:3], s[6:7]1104; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1105; GFX1250-NEXT: v_mov_b64_e32 v[0:1], s[2:3]1106; GFX1250-NEXT: global_store_b64 v2, v[0:1], s[0:1]1107; GFX1250-NEXT: s_endpgm1108entry:1109 %sub = sub i64 %a, %b1110 store i64 %sub, ptr addrspace(1) %out1111 ret void1112}1113 1114; GCN-ISEL-LABEL: name: ssub64ri1115; GCN-ISEL-LABEL: body:1116; GCN-ISEL-LABEL: bb.0.entry:1117; GCN-ISEL: S_SUB_U64_PSEUDO1118 1119define amdgpu_kernel void @ssub64ri(ptr addrspace(1) %out, i64 %a) {1120; CISI-LABEL: ssub64ri:1121; CISI: ; %bb.0: ; %entry1122; CISI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91123; CISI-NEXT: s_mov_b32 s7, 0xf0001124; CISI-NEXT: s_mov_b32 s6, -11125; CISI-NEXT: s_waitcnt lgkmcnt(0)1126; CISI-NEXT: s_mov_b32 s4, s01127; CISI-NEXT: s_sub_u32 s0, 0x56789876, s21128; CISI-NEXT: s_mov_b32 s5, s11129; CISI-NEXT: s_subb_u32 s1, 0x1234, s31130; CISI-NEXT: v_mov_b32_e32 v0, s01131; CISI-NEXT: v_mov_b32_e32 v1, s11132; CISI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01133; CISI-NEXT: s_endpgm1134;1135; VI-LABEL: ssub64ri:1136; VI: ; %bb.0: ; %entry1137; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241138; VI-NEXT: s_waitcnt lgkmcnt(0)1139; VI-NEXT: v_mov_b32_e32 v0, s01140; VI-NEXT: s_sub_u32 s0, 0x56789876, s21141; VI-NEXT: v_mov_b32_e32 v1, s11142; VI-NEXT: s_subb_u32 s1, 0x1234, s31143; VI-NEXT: v_mov_b32_e32 v3, s11144; VI-NEXT: v_mov_b32_e32 v2, s01145; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]1146; VI-NEXT: s_endpgm1147;1148; GFX9-LABEL: ssub64ri:1149; GFX9: ; %bb.0: ; %entry1150; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241151; GFX9-NEXT: v_mov_b32_e32 v2, 01152; GFX9-NEXT: s_waitcnt lgkmcnt(0)1153; GFX9-NEXT: s_sub_u32 s2, 0x56789876, s21154; GFX9-NEXT: s_subb_u32 s3, 0x1234, s31155; GFX9-NEXT: v_mov_b32_e32 v0, s21156; GFX9-NEXT: v_mov_b32_e32 v1, s31157; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1158; GFX9-NEXT: s_endpgm1159;1160; GFX1010-LABEL: ssub64ri:1161; GFX1010: ; %bb.0: ; %entry1162; GFX1010-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241163; GFX1010-NEXT: v_mov_b32_e32 v2, 01164; GFX1010-NEXT: s_waitcnt lgkmcnt(0)1165; GFX1010-NEXT: s_sub_u32 s2, 0x56789876, s21166; GFX1010-NEXT: s_subb_u32 s3, 0x1234, s31167; GFX1010-NEXT: v_mov_b32_e32 v0, s21168; GFX1010-NEXT: v_mov_b32_e32 v1, s31169; GFX1010-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1170; GFX1010-NEXT: s_endpgm1171;1172; GFX1030W32-LABEL: ssub64ri:1173; GFX1030W32: ; %bb.0: ; %entry1174; GFX1030W32-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241175; GFX1030W32-NEXT: v_mov_b32_e32 v2, 01176; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)1177; GFX1030W32-NEXT: s_sub_u32 s2, 0x56789876, s21178; GFX1030W32-NEXT: s_subb_u32 s3, 0x1234, s31179; GFX1030W32-NEXT: v_mov_b32_e32 v0, s21180; GFX1030W32-NEXT: v_mov_b32_e32 v1, s31181; GFX1030W32-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1182; GFX1030W32-NEXT: s_endpgm1183;1184; GFX1030W64-LABEL: ssub64ri:1185; GFX1030W64: ; %bb.0: ; %entry1186; GFX1030W64-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241187; GFX1030W64-NEXT: v_mov_b32_e32 v2, 01188; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)1189; GFX1030W64-NEXT: s_sub_u32 s2, 0x56789876, s21190; GFX1030W64-NEXT: s_subb_u32 s3, 0x1234, s31191; GFX1030W64-NEXT: v_mov_b32_e32 v0, s21192; GFX1030W64-NEXT: v_mov_b32_e32 v1, s31193; GFX1030W64-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1194; GFX1030W64-NEXT: s_endpgm1195;1196; GFX11-LABEL: ssub64ri:1197; GFX11: ; %bb.0: ; %entry1198; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x241199; GFX11-NEXT: s_waitcnt lgkmcnt(0)1200; GFX11-NEXT: s_sub_u32 s2, 0x56789876, s21201; GFX11-NEXT: s_subb_u32 s3, 0x1234, s31202; GFX11-NEXT: v_mov_b32_e32 v0, s21203; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s31204; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]1205; GFX11-NEXT: s_endpgm1206;1207; GFX1250-LABEL: ssub64ri:1208; GFX1250: ; %bb.0: ; %entry1209; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11210; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x241211; GFX1250-NEXT: v_mov_b32_e32 v2, 01212; GFX1250-NEXT: s_wait_kmcnt 0x01213; GFX1250-NEXT: s_sub_nc_u64 s[2:3], 0x123456789876, s[2:3]1214; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1215; GFX1250-NEXT: v_mov_b64_e32 v[0:1], s[2:3]1216; GFX1250-NEXT: global_store_b64 v2, v[0:1], s[0:1]1217; GFX1250-NEXT: s_endpgm1218entry:1219 %sub = sub i64 20015998343286, %a1220 store i64 %sub, ptr addrspace(1) %out1221 ret void1222}1223 1224; GCN-ISEL-LABEL: name: vsub64rr1225; GCN-ISEL-LABEL: body:1226; GCN-ISEL-LABEL: bb.0.entry:1227; GCN-ISEL: V_SUB_U64_PSEUDO1228 1229define amdgpu_kernel void @vsub64rr(ptr addrspace(1) %out, i64 %a) {1230; CISI-LABEL: vsub64rr:1231; CISI: ; %bb.0: ; %entry1232; CISI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91233; CISI-NEXT: s_mov_b32 s7, 0xf0001234; CISI-NEXT: s_mov_b32 s6, -11235; CISI-NEXT: s_waitcnt lgkmcnt(0)1236; CISI-NEXT: v_mov_b32_e32 v1, s31237; CISI-NEXT: v_sub_i32_e32 v0, vcc, s2, v01238; CISI-NEXT: s_mov_b32 s4, s01239; CISI-NEXT: s_mov_b32 s5, s11240; CISI-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc1241; CISI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01242; CISI-NEXT: s_endpgm1243;1244; VI-LABEL: vsub64rr:1245; VI: ; %bb.0: ; %entry1246; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241247; VI-NEXT: s_waitcnt lgkmcnt(0)1248; VI-NEXT: v_mov_b32_e32 v4, s31249; VI-NEXT: v_sub_u32_e32 v3, vcc, s2, v01250; VI-NEXT: v_mov_b32_e32 v1, s01251; VI-NEXT: v_mov_b32_e32 v2, s11252; VI-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc1253; VI-NEXT: flat_store_dwordx2 v[1:2], v[3:4]1254; VI-NEXT: s_endpgm1255;1256; GFX9-LABEL: vsub64rr:1257; GFX9: ; %bb.0: ; %entry1258; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241259; GFX9-NEXT: v_mov_b32_e32 v2, 01260; GFX9-NEXT: s_waitcnt lgkmcnt(0)1261; GFX9-NEXT: v_mov_b32_e32 v1, s31262; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, s2, v01263; GFX9-NEXT: v_subbrev_co_u32_e32 v1, vcc, 0, v1, vcc1264; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1265; GFX9-NEXT: s_endpgm1266;1267; GFX1010-LABEL: vsub64rr:1268; GFX1010: ; %bb.0: ; %entry1269; GFX1010-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241270; GFX1010-NEXT: v_mov_b32_e32 v2, 01271; GFX1010-NEXT: s_waitcnt lgkmcnt(0)1272; GFX1010-NEXT: v_sub_co_u32 v0, s2, s2, v01273; GFX1010-NEXT: v_sub_co_ci_u32_e64 v1, s2, s3, 0, s21274; GFX1010-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1275; GFX1010-NEXT: s_endpgm1276;1277; GFX1030W32-LABEL: vsub64rr:1278; GFX1030W32: ; %bb.0: ; %entry1279; GFX1030W32-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241280; GFX1030W32-NEXT: v_mov_b32_e32 v2, 01281; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)1282; GFX1030W32-NEXT: v_sub_co_u32 v0, s2, s2, v01283; GFX1030W32-NEXT: v_sub_co_ci_u32_e64 v1, null, s3, 0, s21284; GFX1030W32-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1285; GFX1030W32-NEXT: s_endpgm1286;1287; GFX1030W64-LABEL: vsub64rr:1288; GFX1030W64: ; %bb.0: ; %entry1289; GFX1030W64-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241290; GFX1030W64-NEXT: v_mov_b32_e32 v2, 01291; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)1292; GFX1030W64-NEXT: v_sub_co_u32 v0, s[4:5], s2, v01293; GFX1030W64-NEXT: v_sub_co_ci_u32_e64 v1, null, s3, 0, s[4:5]1294; GFX1030W64-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1295; GFX1030W64-NEXT: s_endpgm1296;1297; GFX11-LABEL: vsub64rr:1298; GFX11: ; %bb.0: ; %entry1299; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x241300; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v01301; GFX11-NEXT: v_mov_b32_e32 v2, 01302; GFX11-NEXT: s_waitcnt lgkmcnt(0)1303; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1304; GFX11-NEXT: v_sub_co_u32 v0, s2, s2, v01305; GFX11-NEXT: v_sub_co_ci_u32_e64 v1, null, s3, 0, s21306; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]1307; GFX11-NEXT: s_endpgm1308;1309; GFX1250-LABEL: vsub64rr:1310; GFX1250: ; %bb.0: ; %entry1311; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11312; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x241313; GFX1250-NEXT: v_mov_b32_e32 v1, 01314; GFX1250-NEXT: v_and_b32_e32 v0, 0x3ff, v01315; GFX1250-NEXT: s_wait_kmcnt 0x01316; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)1317; GFX1250-NEXT: v_sub_nc_u64_e32 v[2:3], s[2:3], v[0:1]1318; GFX1250-NEXT: global_store_b64 v1, v[2:3], s[0:1]1319; GFX1250-NEXT: s_endpgm1320entry:1321 %tid = call i32 @llvm.amdgcn.workitem.id.x()1322 %tid.ext = sext i32 %tid to i641323 %sub = sub i64 %a, %tid.ext1324 store i64 %sub, ptr addrspace(1) %out1325 ret void1326}1327 1328; GCN-ISEL-LABEL: name: vsub64ri1329; GCN-ISEL-LABEL: body:1330; GCN-ISEL-LABEL: bb.0.entry:1331; GCN-ISEL: V_SUB_U64_PSEUDO1332 1333define amdgpu_kernel void @vsub64ri(ptr addrspace(1) %out) {1334; CISI-LABEL: vsub64ri:1335; CISI: ; %bb.0: ; %entry1336; CISI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91337; CISI-NEXT: v_sub_i32_e32 v0, vcc, 0x56789876, v01338; CISI-NEXT: v_mov_b32_e32 v1, 0x12341339; CISI-NEXT: s_mov_b32 s3, 0xf0001340; CISI-NEXT: s_mov_b32 s2, -11341; CISI-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc1342; CISI-NEXT: s_waitcnt lgkmcnt(0)1343; CISI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01344; CISI-NEXT: s_endpgm1345;1346; VI-LABEL: vsub64ri:1347; VI: ; %bb.0: ; %entry1348; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241349; VI-NEXT: v_sub_u32_e32 v0, vcc, 0x56789876, v01350; VI-NEXT: v_mov_b32_e32 v1, 0x12341351; VI-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc1352; VI-NEXT: s_waitcnt lgkmcnt(0)1353; VI-NEXT: v_mov_b32_e32 v3, s11354; VI-NEXT: v_mov_b32_e32 v2, s01355; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]1356; VI-NEXT: s_endpgm1357;1358; GFX9-LABEL: vsub64ri:1359; GFX9: ; %bb.0: ; %entry1360; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241361; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, 0x56789876, v01362; GFX9-NEXT: v_mov_b32_e32 v1, 0x12341363; GFX9-NEXT: v_mov_b32_e32 v2, 01364; GFX9-NEXT: v_subbrev_co_u32_e32 v1, vcc, 0, v1, vcc1365; GFX9-NEXT: s_waitcnt lgkmcnt(0)1366; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1367; GFX9-NEXT: s_endpgm1368;1369; GFX1010-LABEL: vsub64ri:1370; GFX1010: ; %bb.0: ; %entry1371; GFX1010-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241372; GFX1010-NEXT: v_sub_co_u32 v0, s2, 0x56789876, v01373; GFX1010-NEXT: v_mov_b32_e32 v2, 01374; GFX1010-NEXT: v_sub_co_ci_u32_e64 v1, s2, 0x1234, 0, s21375; GFX1010-NEXT: s_waitcnt lgkmcnt(0)1376; GFX1010-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1377; GFX1010-NEXT: s_endpgm1378;1379; GFX1030W32-LABEL: vsub64ri:1380; GFX1030W32: ; %bb.0: ; %entry1381; GFX1030W32-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241382; GFX1030W32-NEXT: v_sub_co_u32 v0, s2, 0x56789876, v01383; GFX1030W32-NEXT: v_mov_b32_e32 v2, 01384; GFX1030W32-NEXT: v_sub_co_ci_u32_e64 v1, null, 0x1234, 0, s21385; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)1386; GFX1030W32-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1387; GFX1030W32-NEXT: s_endpgm1388;1389; GFX1030W64-LABEL: vsub64ri:1390; GFX1030W64: ; %bb.0: ; %entry1391; GFX1030W64-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241392; GFX1030W64-NEXT: v_sub_co_u32 v0, s[2:3], 0x56789876, v01393; GFX1030W64-NEXT: v_mov_b32_e32 v2, 01394; GFX1030W64-NEXT: v_sub_co_ci_u32_e64 v1, null, 0x1234, 0, s[2:3]1395; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)1396; GFX1030W64-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1397; GFX1030W64-NEXT: s_endpgm1398;1399; GFX11-LABEL: vsub64ri:1400; GFX11: ; %bb.0: ; %entry1401; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x241402; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v01403; GFX11-NEXT: v_mov_b32_e32 v2, 01404; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1405; GFX11-NEXT: v_sub_co_u32 v0, s2, 0x56789876, v01406; GFX11-NEXT: v_sub_co_ci_u32_e64 v1, null, 0x1234, 0, s21407; GFX11-NEXT: s_waitcnt lgkmcnt(0)1408; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]1409; GFX11-NEXT: s_endpgm1410;1411; GFX1250-LABEL: vsub64ri:1412; GFX1250: ; %bb.0: ; %entry1413; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11414; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x241415; GFX1250-NEXT: v_mov_b32_e32 v1, 01416; GFX1250-NEXT: v_and_b32_e32 v0, 0x3ff, v01417; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)1418; GFX1250-NEXT: v_sub_nc_u64_e32 v[2:3], 0x123456789876, v[0:1]1419; GFX1250-NEXT: s_wait_kmcnt 0x01420; GFX1250-NEXT: global_store_b64 v1, v[2:3], s[0:1]1421; GFX1250-NEXT: s_endpgm1422entry:1423 %tid = call i32 @llvm.amdgcn.workitem.id.x()1424 %tid.ext = sext i32 %tid to i641425 %sub = sub i64 20015998343286, %tid.ext1426 store i64 %sub, ptr addrspace(1) %out1427 ret void1428}1429 1430; GCN-ISEL-LABEL: name: susubo321431; GCN-ISEL-LABEL: body:1432; GCN-ISEL-LABEL: bb.01433; GCN-ISEL: S_SUB_I321434 1435define amdgpu_kernel void @susubo32(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i32 %a, i32 %b) #0 {1436; CISI-LABEL: susubo32:1437; CISI: ; %bb.0:1438; CISI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0xd1439; CISI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91440; CISI-NEXT: s_mov_b32 s3, 0xf0001441; CISI-NEXT: s_mov_b32 s2, -11442; CISI-NEXT: s_waitcnt lgkmcnt(0)1443; CISI-NEXT: s_sub_i32 s4, s6, s71444; CISI-NEXT: v_mov_b32_e32 v0, s41445; CISI-NEXT: buffer_store_dword v0, off, s[0:3], 01446; CISI-NEXT: s_endpgm1447;1448; VI-LABEL: susubo32:1449; VI: ; %bb.0:1450; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x341451; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x241452; VI-NEXT: s_waitcnt lgkmcnt(0)1453; VI-NEXT: s_sub_i32 s0, s0, s11454; VI-NEXT: v_mov_b32_e32 v0, s21455; VI-NEXT: v_mov_b32_e32 v1, s31456; VI-NEXT: v_mov_b32_e32 v2, s01457; VI-NEXT: flat_store_dword v[0:1], v21458; VI-NEXT: s_endpgm1459;1460; GFX9-LABEL: susubo32:1461; GFX9: ; %bb.0:1462; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x341463; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x241464; GFX9-NEXT: v_mov_b32_e32 v0, 01465; GFX9-NEXT: s_waitcnt lgkmcnt(0)1466; GFX9-NEXT: s_sub_i32 s0, s0, s11467; GFX9-NEXT: v_mov_b32_e32 v1, s01468; GFX9-NEXT: global_store_dword v0, v1, s[2:3]1469; GFX9-NEXT: s_endpgm1470;1471; GFX1010-LABEL: susubo32:1472; GFX1010: ; %bb.0:1473; GFX1010-NEXT: s_clause 0x11474; GFX1010-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x341475; GFX1010-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x241476; GFX1010-NEXT: v_mov_b32_e32 v0, 01477; GFX1010-NEXT: s_waitcnt lgkmcnt(0)1478; GFX1010-NEXT: s_sub_i32 s0, s0, s11479; GFX1010-NEXT: v_mov_b32_e32 v1, s01480; GFX1010-NEXT: global_store_dword v0, v1, s[2:3]1481; GFX1010-NEXT: s_endpgm1482;1483; GFX1030W32-LABEL: susubo32:1484; GFX1030W32: ; %bb.0:1485; GFX1030W32-NEXT: s_clause 0x11486; GFX1030W32-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x341487; GFX1030W32-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x241488; GFX1030W32-NEXT: v_mov_b32_e32 v0, 01489; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)1490; GFX1030W32-NEXT: s_sub_i32 s0, s0, s11491; GFX1030W32-NEXT: v_mov_b32_e32 v1, s01492; GFX1030W32-NEXT: global_store_dword v0, v1, s[2:3]1493; GFX1030W32-NEXT: s_endpgm1494;1495; GFX1030W64-LABEL: susubo32:1496; GFX1030W64: ; %bb.0:1497; GFX1030W64-NEXT: s_clause 0x11498; GFX1030W64-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x341499; GFX1030W64-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x241500; GFX1030W64-NEXT: v_mov_b32_e32 v0, 01501; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)1502; GFX1030W64-NEXT: s_sub_i32 s0, s0, s11503; GFX1030W64-NEXT: v_mov_b32_e32 v1, s01504; GFX1030W64-NEXT: global_store_dword v0, v1, s[2:3]1505; GFX1030W64-NEXT: s_endpgm1506;1507; GFX11-LABEL: susubo32:1508; GFX11: ; %bb.0:1509; GFX11-NEXT: s_clause 0x11510; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x341511; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x241512; GFX11-NEXT: s_waitcnt lgkmcnt(0)1513; GFX11-NEXT: s_sub_i32 s0, s0, s11514; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1515; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s01516; GFX11-NEXT: global_store_b32 v0, v1, s[2:3]1517; GFX11-NEXT: s_endpgm1518;1519; GFX1250-LABEL: susubo32:1520; GFX1250: ; %bb.0:1521; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11522; GFX1250-NEXT: s_clause 0x11523; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x341524; GFX1250-NEXT: s_load_b64 s[2:3], s[4:5], 0x241525; GFX1250-NEXT: s_wait_kmcnt 0x01526; GFX1250-NEXT: s_sub_co_i32 s0, s0, s11527; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1528; GFX1250-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s01529; GFX1250-NEXT: global_store_b32 v0, v1, s[2:3]1530; GFX1250-NEXT: s_endpgm1531 %usub = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)1532 %val = extractvalue { i32, i1 } %usub, 01533 %carry = extractvalue { i32, i1 } %usub, 11534 store i32 %val, ptr addrspace(1) %out, align 41535 ret void1536}1537 1538 1539; GCN-ISEL-LABEL: name: usubo32_vcc_user1540; GCN-ISEL-LABEL: body:1541; GCN-ISEL-LABEL: bb.01542; GCN-ISEL: V_SUB_CO_U32_e641543 1544; below we check selection to v_sub/subb1545; because the only user of VCC produced by the USUBOis v_cndmask.1546; We select to VALU form to avoid unnecessary s_cselect to copy SCC to VCC1547 1548define amdgpu_kernel void @usubo32_vcc_user(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i32 %a, i32 %b) #0 {1549; CISI-LABEL: usubo32_vcc_user:1550; CISI: ; %bb.0:1551; CISI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91552; CISI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd1553; CISI-NEXT: s_mov_b32 s7, 0xf0001554; CISI-NEXT: s_mov_b32 s6, -11555; CISI-NEXT: s_waitcnt lgkmcnt(0)1556; CISI-NEXT: s_mov_b32 s4, s01557; CISI-NEXT: v_mov_b32_e32 v0, s91558; CISI-NEXT: s_mov_b32 s5, s11559; CISI-NEXT: v_sub_i32_e32 v0, vcc, s8, v01560; CISI-NEXT: s_mov_b32 s0, s21561; CISI-NEXT: s_mov_b32 s1, s31562; CISI-NEXT: s_mov_b32 s2, s61563; CISI-NEXT: s_mov_b32 s3, s71564; CISI-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1565; CISI-NEXT: buffer_store_dword v0, off, s[4:7], 01566; CISI-NEXT: buffer_store_byte v1, off, s[0:3], 01567; CISI-NEXT: s_endpgm1568;1569; VI-LABEL: usubo32_vcc_user:1570; VI: ; %bb.0:1571; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241572; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x341573; VI-NEXT: s_waitcnt lgkmcnt(0)1574; VI-NEXT: v_mov_b32_e32 v0, s01575; VI-NEXT: v_mov_b32_e32 v4, s51576; VI-NEXT: v_mov_b32_e32 v1, s11577; VI-NEXT: v_sub_u32_e32 v4, vcc, s4, v41578; VI-NEXT: v_mov_b32_e32 v2, s21579; VI-NEXT: v_mov_b32_e32 v3, s31580; VI-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc1581; VI-NEXT: flat_store_dword v[0:1], v41582; VI-NEXT: flat_store_byte v[2:3], v51583; VI-NEXT: s_endpgm1584;1585; GFX9-LABEL: usubo32_vcc_user:1586; GFX9: ; %bb.0:1587; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341588; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241589; GFX9-NEXT: v_mov_b32_e32 v0, 01590; GFX9-NEXT: s_waitcnt lgkmcnt(0)1591; GFX9-NEXT: v_mov_b32_e32 v1, s71592; GFX9-NEXT: v_sub_co_u32_e32 v1, vcc, s6, v11593; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1594; GFX9-NEXT: global_store_dword v0, v1, s[0:1]1595; GFX9-NEXT: global_store_byte v0, v2, s[2:3]1596; GFX9-NEXT: s_endpgm1597;1598; GFX1010-LABEL: usubo32_vcc_user:1599; GFX1010: ; %bb.0:1600; GFX1010-NEXT: s_clause 0x11601; GFX1010-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341602; GFX1010-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241603; GFX1010-NEXT: v_mov_b32_e32 v0, 01604; GFX1010-NEXT: s_waitcnt lgkmcnt(0)1605; GFX1010-NEXT: v_sub_co_u32 v1, s4, s6, s71606; GFX1010-NEXT: v_cndmask_b32_e64 v2, 0, 1, s41607; GFX1010-NEXT: global_store_dword v0, v1, s[0:1]1608; GFX1010-NEXT: global_store_byte v0, v2, s[2:3]1609; GFX1010-NEXT: s_endpgm1610;1611; GFX1030W32-LABEL: usubo32_vcc_user:1612; GFX1030W32: ; %bb.0:1613; GFX1030W32-NEXT: s_clause 0x11614; GFX1030W32-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341615; GFX1030W32-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241616; GFX1030W32-NEXT: v_mov_b32_e32 v0, 01617; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)1618; GFX1030W32-NEXT: v_sub_co_u32 v1, s4, s6, s71619; GFX1030W32-NEXT: v_cndmask_b32_e64 v2, 0, 1, s41620; GFX1030W32-NEXT: global_store_dword v0, v1, s[0:1]1621; GFX1030W32-NEXT: global_store_byte v0, v2, s[2:3]1622; GFX1030W32-NEXT: s_endpgm1623;1624; GFX1030W64-LABEL: usubo32_vcc_user:1625; GFX1030W64: ; %bb.0:1626; GFX1030W64-NEXT: s_clause 0x11627; GFX1030W64-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341628; GFX1030W64-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241629; GFX1030W64-NEXT: v_mov_b32_e32 v0, 01630; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)1631; GFX1030W64-NEXT: v_sub_co_u32 v1, s[4:5], s6, s71632; GFX1030W64-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[4:5]1633; GFX1030W64-NEXT: global_store_dword v0, v1, s[0:1]1634; GFX1030W64-NEXT: global_store_byte v0, v2, s[2:3]1635; GFX1030W64-NEXT: s_endpgm1636;1637; GFX11-LABEL: usubo32_vcc_user:1638; GFX11: ; %bb.0:1639; GFX11-NEXT: s_clause 0x11640; GFX11-NEXT: s_load_b64 s[6:7], s[4:5], 0x341641; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x241642; GFX11-NEXT: v_mov_b32_e32 v0, 01643; GFX11-NEXT: s_waitcnt lgkmcnt(0)1644; GFX11-NEXT: v_sub_co_u32 v1, s4, s6, s71645; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1646; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s41647; GFX11-NEXT: s_clause 0x11648; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]1649; GFX11-NEXT: global_store_b8 v0, v2, s[2:3]1650; GFX11-NEXT: s_endpgm1651;1652; GFX1250-LABEL: usubo32_vcc_user:1653; GFX1250: ; %bb.0:1654; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11655; GFX1250-NEXT: s_clause 0x11656; GFX1250-NEXT: s_load_b64 s[6:7], s[4:5], 0x341657; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x241658; GFX1250-NEXT: v_mov_b32_e32 v0, 01659; GFX1250-NEXT: s_wait_kmcnt 0x01660; GFX1250-NEXT: v_sub_co_u32 v1, s4, s6, s71661; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)1662; GFX1250-NEXT: v_cndmask_b32_e64 v2, 0, 1, s41663; GFX1250-NEXT: s_clause 0x11664; GFX1250-NEXT: global_store_b32 v0, v1, s[0:1]1665; GFX1250-NEXT: global_store_b8 v0, v2, s[2:3]1666; GFX1250-NEXT: s_endpgm1667 %usub = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)1668 %val = extractvalue { i32, i1 } %usub, 01669 %carry = extractvalue { i32, i1 } %usub, 11670 store i32 %val, ptr addrspace(1) %out, align 41671 store i1 %carry, ptr addrspace(1) %carryout1672 ret void1673}1674 1675; GCN-ISEL-LABEL: name: susubo641676; GCN-ISEL-LABEL: body:1677; GCN-ISEL-LABEL: bb.01678; GCN-ISEL: S_USUBO_PSEUDO1679; GCN-ISEL: S_SUB_CO_PSEUDO1680 1681define amdgpu_kernel void @susubo64(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i64 %a, i64 %b) #0 {1682; CISI-LABEL: susubo64:1683; CISI: ; %bb.0:1684; CISI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x91685; CISI-NEXT: s_mov_b32 s11, 0xf0001686; CISI-NEXT: s_mov_b32 s10, -11687; CISI-NEXT: s_waitcnt lgkmcnt(0)1688; CISI-NEXT: s_sub_u32 s4, s4, s61689; CISI-NEXT: s_subb_u32 s5, s5, s71690; CISI-NEXT: s_mov_b32 s8, s01691; CISI-NEXT: s_mov_b32 s9, s11692; CISI-NEXT: v_mov_b32_e32 v0, s41693; CISI-NEXT: v_mov_b32_e32 v1, s51694; CISI-NEXT: s_cselect_b64 s[4:5], -1, 01695; CISI-NEXT: s_mov_b32 s0, s21696; CISI-NEXT: s_mov_b32 s1, s31697; CISI-NEXT: s_mov_b32 s2, s101698; CISI-NEXT: s_mov_b32 s3, s111699; CISI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 01700; CISI-NEXT: s_waitcnt expcnt(0)1701; CISI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5]1702; CISI-NEXT: buffer_store_byte v0, off, s[0:3], 01703; CISI-NEXT: s_endpgm1704;1705; VI-LABEL: susubo64:1706; VI: ; %bb.0:1707; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x241708; VI-NEXT: s_waitcnt lgkmcnt(0)1709; VI-NEXT: v_mov_b32_e32 v0, s01710; VI-NEXT: s_sub_u32 s0, s4, s61711; VI-NEXT: v_mov_b32_e32 v1, s11712; VI-NEXT: s_subb_u32 s1, s5, s71713; VI-NEXT: v_mov_b32_e32 v4, s01714; VI-NEXT: v_mov_b32_e32 v5, s11715; VI-NEXT: s_cselect_b64 s[0:1], -1, 01716; VI-NEXT: v_mov_b32_e32 v2, s21717; VI-NEXT: v_mov_b32_e32 v3, s31718; VI-NEXT: flat_store_dwordx2 v[0:1], v[4:5]1719; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]1720; VI-NEXT: flat_store_byte v[2:3], v01721; VI-NEXT: s_endpgm1722;1723; GFX9-LABEL: susubo64:1724; GFX9: ; %bb.0:1725; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x241726; GFX9-NEXT: v_mov_b32_e32 v2, 01727; GFX9-NEXT: s_waitcnt lgkmcnt(0)1728; GFX9-NEXT: s_sub_u32 s0, s12, s141729; GFX9-NEXT: s_subb_u32 s1, s13, s151730; GFX9-NEXT: v_mov_b32_e32 v0, s01731; GFX9-NEXT: v_mov_b32_e32 v1, s11732; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 01733; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[0:1]1734; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[8:9]1735; GFX9-NEXT: global_store_byte v2, v3, s[10:11]1736; GFX9-NEXT: s_endpgm1737;1738; GFX1010-LABEL: susubo64:1739; GFX1010: ; %bb.0:1740; GFX1010-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x241741; GFX1010-NEXT: v_mov_b32_e32 v2, 01742; GFX1010-NEXT: s_waitcnt lgkmcnt(0)1743; GFX1010-NEXT: s_sub_u32 s0, s12, s141744; GFX1010-NEXT: s_subb_u32 s1, s13, s151745; GFX1010-NEXT: v_mov_b32_e32 v0, s01746; GFX1010-NEXT: s_cselect_b32 s0, -1, 01747; GFX1010-NEXT: v_mov_b32_e32 v1, s11748; GFX1010-NEXT: v_cndmask_b32_e64 v3, 0, 1, s01749; GFX1010-NEXT: global_store_dwordx2 v2, v[0:1], s[8:9]1750; GFX1010-NEXT: global_store_byte v2, v3, s[10:11]1751; GFX1010-NEXT: s_endpgm1752;1753; GFX1030W32-LABEL: susubo64:1754; GFX1030W32: ; %bb.0:1755; GFX1030W32-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x241756; GFX1030W32-NEXT: v_mov_b32_e32 v2, 01757; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)1758; GFX1030W32-NEXT: s_sub_u32 s4, s4, s61759; GFX1030W32-NEXT: s_subb_u32 s5, s5, s71760; GFX1030W32-NEXT: v_mov_b32_e32 v0, s41761; GFX1030W32-NEXT: s_cselect_b32 s4, -1, 01762; GFX1030W32-NEXT: v_mov_b32_e32 v1, s51763; GFX1030W32-NEXT: v_cndmask_b32_e64 v3, 0, 1, s41764; GFX1030W32-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1765; GFX1030W32-NEXT: global_store_byte v2, v3, s[2:3]1766; GFX1030W32-NEXT: s_endpgm1767;1768; GFX1030W64-LABEL: susubo64:1769; GFX1030W64: ; %bb.0:1770; GFX1030W64-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x241771; GFX1030W64-NEXT: v_mov_b32_e32 v2, 01772; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)1773; GFX1030W64-NEXT: s_sub_u32 s4, s4, s61774; GFX1030W64-NEXT: s_subb_u32 s5, s5, s71775; GFX1030W64-NEXT: v_mov_b32_e32 v0, s41776; GFX1030W64-NEXT: v_mov_b32_e32 v1, s51777; GFX1030W64-NEXT: s_cselect_b64 s[4:5], -1, 01778; GFX1030W64-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[4:5]1779; GFX1030W64-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1780; GFX1030W64-NEXT: global_store_byte v2, v3, s[2:3]1781; GFX1030W64-NEXT: s_endpgm1782;1783; GFX11-LABEL: susubo64:1784; GFX11: ; %bb.0:1785; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x241786; GFX11-NEXT: s_waitcnt lgkmcnt(0)1787; GFX11-NEXT: s_sub_u32 s4, s4, s61788; GFX11-NEXT: s_subb_u32 s5, s5, s71789; GFX11-NEXT: v_mov_b32_e32 v0, s41790; GFX11-NEXT: s_cselect_b32 s4, -1, 01791; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s51792; GFX11-NEXT: v_cndmask_b32_e64 v3, 0, 1, s41793; GFX11-NEXT: s_clause 0x11794; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]1795; GFX11-NEXT: global_store_b8 v2, v3, s[2:3]1796; GFX11-NEXT: s_endpgm1797;1798; GFX1250-LABEL: susubo64:1799; GFX1250: ; %bb.0:1800; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11801; GFX1250-NEXT: s_load_b256 s[8:15], s[4:5], 0x241802; GFX1250-NEXT: s_wait_kmcnt 0x01803; GFX1250-NEXT: s_sub_co_u32 s0, s12, s141804; GFX1250-NEXT: s_sub_co_ci_u32 s1, s13, s151805; GFX1250-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v0, s01806; GFX1250-NEXT: s_cselect_b32 s0, -1, 01807; GFX1250-NEXT: v_mov_b32_e32 v1, s11808; GFX1250-NEXT: v_cndmask_b32_e64 v3, 0, 1, s01809; GFX1250-NEXT: s_clause 0x11810; GFX1250-NEXT: global_store_b64 v2, v[0:1], s[8:9]1811; GFX1250-NEXT: global_store_b8 v2, v3, s[10:11]1812; GFX1250-NEXT: s_endpgm1813 %usub = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b)1814 %val = extractvalue { i64, i1 } %usub, 01815 %carry = extractvalue { i64, i1 } %usub, 11816 store i64 %val, ptr addrspace(1) %out, align 81817 store i1 %carry, ptr addrspace(1) %carryout1818 ret void1819}1820 1821; GCN-ISEL-LABEL: name: vusubo641822; GCN-ISEL-LABEL: body:1823; GCN-ISEL-LABEL: bb.01824; GCN-ISEL: V_SUB_CO_U32_e641825; GCN-ISEL: V_SUBB_U32_e641826 1827define amdgpu_kernel void @vusubo64(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i64 %a) #0 {1828; CISI-LABEL: vusubo64:1829; CISI: ; %bb.0:1830; CISI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91831; CISI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd1832; CISI-NEXT: s_mov_b32 s7, 0xf0001833; CISI-NEXT: s_mov_b32 s6, -11834; CISI-NEXT: s_waitcnt lgkmcnt(0)1835; CISI-NEXT: s_mov_b32 s4, s01836; CISI-NEXT: v_mov_b32_e32 v1, s91837; CISI-NEXT: v_sub_i32_e32 v0, vcc, s8, v01838; CISI-NEXT: s_mov_b32 s5, s11839; CISI-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc1840; CISI-NEXT: s_mov_b32 s0, s21841; CISI-NEXT: s_mov_b32 s1, s31842; CISI-NEXT: s_mov_b32 s2, s61843; CISI-NEXT: s_mov_b32 s3, s71844; CISI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01845; CISI-NEXT: s_waitcnt expcnt(0)1846; CISI-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc1847; CISI-NEXT: buffer_store_byte v0, off, s[0:3], 01848; CISI-NEXT: s_endpgm1849;1850; VI-LABEL: vusubo64:1851; VI: ; %bb.0:1852; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241853; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x341854; VI-NEXT: s_waitcnt lgkmcnt(0)1855; VI-NEXT: v_mov_b32_e32 v1, s01856; VI-NEXT: v_mov_b32_e32 v6, s51857; VI-NEXT: v_sub_u32_e32 v5, vcc, s4, v01858; VI-NEXT: v_subbrev_u32_e32 v6, vcc, 0, v6, vcc1859; VI-NEXT: v_mov_b32_e32 v2, s11860; VI-NEXT: v_mov_b32_e32 v3, s21861; VI-NEXT: v_mov_b32_e32 v4, s31862; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc1863; VI-NEXT: flat_store_dwordx2 v[1:2], v[5:6]1864; VI-NEXT: flat_store_byte v[3:4], v01865; VI-NEXT: s_endpgm1866;1867; GFX9-LABEL: vusubo64:1868; GFX9: ; %bb.0:1869; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341870; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241871; GFX9-NEXT: v_mov_b32_e32 v2, 01872; GFX9-NEXT: s_waitcnt lgkmcnt(0)1873; GFX9-NEXT: v_mov_b32_e32 v1, s71874; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, s6, v01875; GFX9-NEXT: v_subbrev_co_u32_e32 v1, vcc, 0, v1, vcc1876; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1877; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc1878; GFX9-NEXT: global_store_byte v2, v0, s[2:3]1879; GFX9-NEXT: s_endpgm1880;1881; GFX1010-LABEL: vusubo64:1882; GFX1010: ; %bb.0:1883; GFX1010-NEXT: s_clause 0x11884; GFX1010-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341885; GFX1010-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241886; GFX1010-NEXT: v_mov_b32_e32 v2, 01887; GFX1010-NEXT: s_waitcnt lgkmcnt(0)1888; GFX1010-NEXT: v_sub_co_u32 v0, s4, s6, v01889; GFX1010-NEXT: v_sub_co_ci_u32_e64 v1, s4, s7, 0, s41890; GFX1010-NEXT: v_cndmask_b32_e64 v3, 0, 1, s41891; GFX1010-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1892; GFX1010-NEXT: global_store_byte v2, v3, s[2:3]1893; GFX1010-NEXT: s_endpgm1894;1895; GFX1030W32-LABEL: vusubo64:1896; GFX1030W32: ; %bb.0:1897; GFX1030W32-NEXT: s_clause 0x11898; GFX1030W32-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341899; GFX1030W32-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241900; GFX1030W32-NEXT: v_mov_b32_e32 v2, 01901; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)1902; GFX1030W32-NEXT: v_sub_co_u32 v0, s4, s6, v01903; GFX1030W32-NEXT: v_sub_co_ci_u32_e64 v1, s4, s7, 0, s41904; GFX1030W32-NEXT: v_cndmask_b32_e64 v3, 0, 1, s41905; GFX1030W32-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1906; GFX1030W32-NEXT: global_store_byte v2, v3, s[2:3]1907; GFX1030W32-NEXT: s_endpgm1908;1909; GFX1030W64-LABEL: vusubo64:1910; GFX1030W64: ; %bb.0:1911; GFX1030W64-NEXT: s_clause 0x11912; GFX1030W64-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341913; GFX1030W64-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241914; GFX1030W64-NEXT: v_mov_b32_e32 v2, 01915; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)1916; GFX1030W64-NEXT: v_sub_co_u32 v0, s[4:5], s6, v01917; GFX1030W64-NEXT: v_sub_co_ci_u32_e64 v1, s[4:5], s7, 0, s[4:5]1918; GFX1030W64-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[4:5]1919; GFX1030W64-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1920; GFX1030W64-NEXT: global_store_byte v2, v3, s[2:3]1921; GFX1030W64-NEXT: s_endpgm1922;1923; GFX11-LABEL: vusubo64:1924; GFX11: ; %bb.0:1925; GFX11-NEXT: s_clause 0x11926; GFX11-NEXT: s_load_b64 s[6:7], s[4:5], 0x341927; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x241928; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v01929; GFX11-NEXT: v_mov_b32_e32 v2, 01930; GFX11-NEXT: s_waitcnt lgkmcnt(0)1931; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1932; GFX11-NEXT: v_sub_co_u32 v0, s4, s6, v01933; GFX11-NEXT: v_sub_co_ci_u32_e64 v1, s4, s7, 0, s41934; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1935; GFX11-NEXT: v_cndmask_b32_e64 v3, 0, 1, s41936; GFX11-NEXT: s_clause 0x11937; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]1938; GFX11-NEXT: global_store_b8 v2, v3, s[2:3]1939; GFX11-NEXT: s_endpgm1940;1941; GFX1250-LABEL: vusubo64:1942; GFX1250: ; %bb.0:1943; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11944; GFX1250-NEXT: s_clause 0x11945; GFX1250-NEXT: s_load_b64 s[6:7], s[4:5], 0x341946; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x241947; GFX1250-NEXT: v_and_b32_e32 v0, 0x3ff, v01948; GFX1250-NEXT: v_mov_b32_e32 v2, 01949; GFX1250-NEXT: s_wait_kmcnt 0x01950; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1951; GFX1250-NEXT: v_sub_co_u32 v0, s4, s6, v01952; GFX1250-NEXT: v_sub_co_ci_u32_e64 v1, s4, s7, 0, s41953; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)1954; GFX1250-NEXT: v_cndmask_b32_e64 v3, 0, 1, s41955; GFX1250-NEXT: s_clause 0x11956; GFX1250-NEXT: global_store_b64 v2, v[0:1], s[0:1]1957; GFX1250-NEXT: global_store_b8 v2, v3, s[2:3]1958; GFX1250-NEXT: s_endpgm1959 %tid = call i32 @llvm.amdgcn.workitem.id.x()1960 %tid.ext = sext i32 %tid to i641961 %usub = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %tid.ext)1962 %val = extractvalue { i64, i1 } %usub, 01963 %carry = extractvalue { i64, i1 } %usub, 11964 store i64 %val, ptr addrspace(1) %out, align 81965 store i1 %carry, ptr addrspace(1) %carryout1966 ret void1967}1968 1969; GCN-ISEL-LABEL: name: sudiv641970; GCN-ISEL-LABEL: body:1971; GCN-ISEL-LABEL: bb.31972; GCN-ISEL: %[[CARRY:[0-9]+]]:sreg_64_xexec = S_UADDO_PSEUDO1973; GCN-ISEL: S_ADD_CO_PSEUDO %{{[0-9]+}}, killed %{{[0-9]+}}, killed %[[CARRY]]1974; GCN-ISEL: %[[CARRY:[0-9]+]]:sreg_64_xexec = S_USUBO_PSEUDO1975; GCN-ISEL: S_SUB_CO_PSEUDO killed %{{[0-9]+}}, %{{[0-9]+}}, %[[CARRY]]1976 1977define amdgpu_kernel void @sudiv64(ptr addrspace(1) %out, i64 %x, i64 %y) {1978; CISI-LABEL: sudiv64:1979; CISI: ; %bb.0:1980; CISI-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x91981; CISI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0xd1982; CISI-NEXT: s_waitcnt lgkmcnt(0)1983; CISI-NEXT: s_or_b64 s[0:1], s[10:11], s[2:3]1984; CISI-NEXT: s_mov_b32 s0, 01985; CISI-NEXT: v_cmp_ne_u64_e64 s[0:1], s[0:1], 01986; CISI-NEXT: s_and_b64 vcc, exec, s[0:1]1987; CISI-NEXT: s_cbranch_vccz .LBB16_41988; CISI-NEXT: ; %bb.1:1989; CISI-NEXT: v_cvt_f32_u32_e32 v0, s21990; CISI-NEXT: v_cvt_f32_u32_e32 v1, s31991; CISI-NEXT: s_sub_u32 s0, 0, s21992; CISI-NEXT: s_subb_u32 s1, 0, s31993; CISI-NEXT: v_madmk_f32 v0, v1, 0x4f800000, v01994; CISI-NEXT: v_rcp_f32_e32 v0, v01995; CISI-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v01996; CISI-NEXT: v_mul_f32_e32 v1, 0x2f800000, v01997; CISI-NEXT: v_trunc_f32_e32 v1, v11998; CISI-NEXT: v_madmk_f32 v0, v1, 0xcf800000, v01999; CISI-NEXT: v_cvt_u32_f32_e32 v1, v12000; CISI-NEXT: v_cvt_u32_f32_e32 v0, v02001; CISI-NEXT: v_mul_lo_u32 v2, s0, v12002; CISI-NEXT: v_mul_hi_u32 v3, s0, v02003; CISI-NEXT: v_mul_lo_u32 v5, s1, v02004; CISI-NEXT: v_mul_lo_u32 v4, s0, v02005; CISI-NEXT: v_add_i32_e32 v2, vcc, v2, v32006; CISI-NEXT: v_add_i32_e32 v2, vcc, v2, v52007; CISI-NEXT: v_mul_hi_u32 v3, v0, v42008; CISI-NEXT: v_mul_lo_u32 v5, v0, v22009; CISI-NEXT: v_mul_hi_u32 v7, v0, v22010; CISI-NEXT: v_mul_lo_u32 v6, v1, v42011; CISI-NEXT: v_mul_hi_u32 v4, v1, v42012; CISI-NEXT: v_add_i32_e32 v3, vcc, v3, v52013; CISI-NEXT: v_addc_u32_e32 v5, vcc, 0, v7, vcc2014; CISI-NEXT: v_mul_hi_u32 v7, v1, v22015; CISI-NEXT: v_mul_lo_u32 v2, v1, v22016; CISI-NEXT: v_add_i32_e32 v3, vcc, v3, v62017; CISI-NEXT: v_addc_u32_e32 v3, vcc, v5, v4, vcc2018; CISI-NEXT: v_addc_u32_e32 v4, vcc, 0, v7, vcc2019; CISI-NEXT: v_add_i32_e32 v2, vcc, v3, v22020; CISI-NEXT: v_addc_u32_e32 v3, vcc, 0, v4, vcc2021; CISI-NEXT: v_add_i32_e32 v0, vcc, v0, v22022; CISI-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc2023; CISI-NEXT: v_mul_lo_u32 v2, s0, v12024; CISI-NEXT: v_mul_hi_u32 v3, s0, v02025; CISI-NEXT: v_mul_lo_u32 v4, s1, v02026; CISI-NEXT: v_add_i32_e32 v2, vcc, v2, v32027; CISI-NEXT: v_mul_lo_u32 v3, s0, v02028; CISI-NEXT: v_add_i32_e32 v2, vcc, v4, v22029; CISI-NEXT: v_mul_lo_u32 v6, v0, v22030; CISI-NEXT: v_mul_hi_u32 v7, v0, v32031; CISI-NEXT: v_mul_hi_u32 v8, v0, v22032; CISI-NEXT: v_mul_hi_u32 v5, v1, v32033; CISI-NEXT: v_mul_lo_u32 v3, v1, v32034; CISI-NEXT: v_mul_hi_u32 v4, v1, v22035; CISI-NEXT: v_add_i32_e32 v6, vcc, v7, v62036; CISI-NEXT: v_addc_u32_e32 v7, vcc, 0, v8, vcc2037; CISI-NEXT: v_mul_lo_u32 v2, v1, v22038; CISI-NEXT: v_add_i32_e32 v3, vcc, v6, v32039; CISI-NEXT: v_addc_u32_e32 v3, vcc, v7, v5, vcc2040; CISI-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc2041; CISI-NEXT: v_add_i32_e32 v2, vcc, v3, v22042; CISI-NEXT: v_addc_u32_e32 v3, vcc, 0, v4, vcc2043; CISI-NEXT: v_add_i32_e32 v0, vcc, v0, v22044; CISI-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc2045; CISI-NEXT: v_mul_lo_u32 v2, s10, v12046; CISI-NEXT: v_mul_hi_u32 v3, s10, v02047; CISI-NEXT: v_mul_hi_u32 v4, s10, v12048; CISI-NEXT: v_mul_hi_u32 v5, s11, v12049; CISI-NEXT: v_mul_lo_u32 v1, s11, v12050; CISI-NEXT: v_add_i32_e32 v2, vcc, v3, v22051; CISI-NEXT: v_addc_u32_e32 v3, vcc, 0, v4, vcc2052; CISI-NEXT: v_mul_lo_u32 v4, s11, v02053; CISI-NEXT: v_mul_hi_u32 v0, s11, v02054; CISI-NEXT: v_add_i32_e32 v2, vcc, v2, v42055; CISI-NEXT: v_addc_u32_e32 v0, vcc, v3, v0, vcc2056; CISI-NEXT: v_addc_u32_e32 v2, vcc, 0, v5, vcc2057; CISI-NEXT: v_add_i32_e32 v0, vcc, v0, v12058; CISI-NEXT: v_addc_u32_e32 v1, vcc, 0, v2, vcc2059; CISI-NEXT: v_mul_lo_u32 v2, s2, v12060; CISI-NEXT: v_mul_hi_u32 v3, s2, v02061; CISI-NEXT: v_mul_lo_u32 v4, s3, v02062; CISI-NEXT: v_mov_b32_e32 v5, s32063; CISI-NEXT: v_add_i32_e32 v2, vcc, v2, v32064; CISI-NEXT: v_mul_lo_u32 v3, s2, v02065; CISI-NEXT: v_add_i32_e32 v2, vcc, v4, v22066; CISI-NEXT: v_sub_i32_e32 v4, vcc, s11, v22067; CISI-NEXT: v_sub_i32_e32 v3, vcc, s10, v32068; CISI-NEXT: v_subb_u32_e64 v4, s[0:1], v4, v5, vcc2069; CISI-NEXT: v_subrev_i32_e64 v5, s[0:1], s2, v32070; CISI-NEXT: v_subbrev_u32_e64 v4, s[0:1], 0, v4, s[0:1]2071; CISI-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v42072; CISI-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[0:1]2073; CISI-NEXT: v_cmp_le_u32_e64 s[0:1], s2, v52074; CISI-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[0:1]2075; CISI-NEXT: v_cmp_eq_u32_e64 s[0:1], s3, v42076; CISI-NEXT: v_cndmask_b32_e64 v4, v6, v5, s[0:1]2077; CISI-NEXT: v_add_i32_e64 v5, s[0:1], 1, v02078; CISI-NEXT: v_addc_u32_e64 v6, s[0:1], 0, v1, s[0:1]2079; CISI-NEXT: v_add_i32_e64 v7, s[0:1], 2, v02080; CISI-NEXT: v_addc_u32_e64 v8, s[0:1], 0, v1, s[0:1]2081; CISI-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v42082; CISI-NEXT: v_cndmask_b32_e64 v4, v5, v7, s[0:1]2083; CISI-NEXT: v_cndmask_b32_e64 v5, v6, v8, s[0:1]2084; CISI-NEXT: v_mov_b32_e32 v6, s112085; CISI-NEXT: v_subb_u32_e32 v2, vcc, v6, v2, vcc2086; CISI-NEXT: v_cmp_le_u32_e32 vcc, s3, v22087; CISI-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc2088; CISI-NEXT: v_cmp_le_u32_e32 vcc, s2, v32089; CISI-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc2090; CISI-NEXT: v_cmp_eq_u32_e32 vcc, s3, v22091; CISI-NEXT: v_cndmask_b32_e32 v2, v6, v3, vcc2092; CISI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22093; CISI-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc2094; CISI-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc2095; CISI-NEXT: s_cbranch_execnz .LBB16_32096; CISI-NEXT: .LBB16_2:2097; CISI-NEXT: v_cvt_f32_u32_e32 v0, s22098; CISI-NEXT: s_sub_i32 s0, 0, s22099; CISI-NEXT: v_rcp_iflag_f32_e32 v0, v02100; CISI-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v02101; CISI-NEXT: v_cvt_u32_f32_e32 v0, v02102; CISI-NEXT: v_mul_lo_u32 v1, s0, v02103; CISI-NEXT: v_mul_hi_u32 v1, v0, v12104; CISI-NEXT: v_add_i32_e32 v0, vcc, v0, v12105; CISI-NEXT: v_mul_hi_u32 v0, s10, v02106; CISI-NEXT: v_readfirstlane_b32 s0, v02107; CISI-NEXT: s_mul_i32 s0, s0, s22108; CISI-NEXT: s_sub_i32 s0, s10, s02109; CISI-NEXT: s_sub_i32 s1, s0, s22110; CISI-NEXT: v_add_i32_e32 v1, vcc, 1, v02111; CISI-NEXT: s_cmp_ge_u32 s0, s22112; CISI-NEXT: s_cselect_b64 vcc, -1, 02113; CISI-NEXT: s_cselect_b32 s0, s1, s02114; CISI-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2115; CISI-NEXT: v_add_i32_e32 v1, vcc, 1, v02116; CISI-NEXT: s_cmp_ge_u32 s0, s22117; CISI-NEXT: s_cselect_b64 vcc, -1, 02118; CISI-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2119; CISI-NEXT: v_mov_b32_e32 v1, 02120; CISI-NEXT: .LBB16_3:2121; CISI-NEXT: s_mov_b32 s11, 0xf0002122; CISI-NEXT: s_mov_b32 s10, -12123; CISI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 02124; CISI-NEXT: s_endpgm2125; CISI-NEXT: .LBB16_4:2126; CISI-NEXT: ; implicit-def: $vgpr0_vgpr12127; CISI-NEXT: s_branch .LBB16_22128;2129; VI-LABEL: sudiv64:2130; VI: ; %bb.0:2131; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242132; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x342133; VI-NEXT: s_waitcnt lgkmcnt(0)2134; VI-NEXT: s_or_b64 s[6:7], s[2:3], s[4:5]2135; VI-NEXT: s_mov_b32 s6, 02136; VI-NEXT: s_cmp_lg_u64 s[6:7], 02137; VI-NEXT: s_cbranch_scc0 .LBB16_32138; VI-NEXT: ; %bb.1:2139; VI-NEXT: v_cvt_f32_u32_e32 v0, s42140; VI-NEXT: v_cvt_f32_u32_e32 v1, s52141; VI-NEXT: s_sub_u32 s8, 0, s42142; VI-NEXT: s_subb_u32 s9, 0, s52143; VI-NEXT: v_madmk_f32 v0, v1, 0x4f800000, v02144; VI-NEXT: v_rcp_f32_e32 v0, v02145; VI-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v02146; VI-NEXT: v_mul_f32_e32 v1, 0x2f800000, v02147; VI-NEXT: v_trunc_f32_e32 v1, v12148; VI-NEXT: v_madmk_f32 v0, v1, 0xcf800000, v02149; VI-NEXT: v_cvt_u32_f32_e32 v4, v12150; VI-NEXT: v_cvt_u32_f32_e32 v5, v02151; VI-NEXT: v_mul_lo_u32 v2, s8, v42152; VI-NEXT: v_mad_u64_u32 v[0:1], s[6:7], s8, v5, 02153; VI-NEXT: v_mul_lo_u32 v3, s9, v52154; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v22155; VI-NEXT: v_add_u32_e32 v3, vcc, v1, v32156; VI-NEXT: v_mul_hi_u32 v6, v5, v02157; VI-NEXT: v_mad_u64_u32 v[1:2], s[6:7], v5, v3, 02158; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v12159; VI-NEXT: v_mad_u64_u32 v[0:1], s[6:7], v4, v0, 02160; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v2, vcc2161; VI-NEXT: v_mad_u64_u32 v[2:3], s[6:7], v4, v3, 02162; VI-NEXT: v_add_u32_e32 v0, vcc, v6, v02163; VI-NEXT: v_addc_u32_e32 v0, vcc, v7, v1, vcc2164; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc2165; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v22166; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc2167; VI-NEXT: v_add_u32_e32 v6, vcc, v5, v02168; VI-NEXT: v_addc_u32_e32 v7, vcc, v4, v1, vcc2169; VI-NEXT: v_mad_u64_u32 v[0:1], s[6:7], s8, v6, 02170; VI-NEXT: v_mul_lo_u32 v4, s8, v72171; VI-NEXT: v_mul_lo_u32 v5, s9, v62172; VI-NEXT: v_mul_hi_u32 v8, v6, v02173; VI-NEXT: v_mad_u64_u32 v[2:3], s[6:7], v7, v0, 02174; VI-NEXT: v_add_u32_e32 v1, vcc, v4, v12175; VI-NEXT: v_add_u32_e32 v1, vcc, v5, v12176; VI-NEXT: v_mad_u64_u32 v[4:5], s[6:7], v6, v1, 02177; VI-NEXT: v_mad_u64_u32 v[0:1], s[6:7], v7, v1, 02178; VI-NEXT: v_add_u32_e32 v4, vcc, v8, v42179; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc2180; VI-NEXT: v_add_u32_e32 v2, vcc, v4, v22181; VI-NEXT: v_addc_u32_e32 v2, vcc, v5, v3, vcc2182; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc2183; VI-NEXT: v_add_u32_e32 v0, vcc, v2, v02184; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc2185; VI-NEXT: v_add_u32_e32 v2, vcc, v6, v02186; VI-NEXT: v_addc_u32_e32 v3, vcc, v7, v1, vcc2187; VI-NEXT: v_mad_u64_u32 v[0:1], s[6:7], s2, v3, 02188; VI-NEXT: v_mul_hi_u32 v4, s2, v22189; VI-NEXT: v_readfirstlane_b32 s8, v12190; VI-NEXT: v_readfirstlane_b32 s9, v02191; VI-NEXT: v_mad_u64_u32 v[0:1], s[6:7], s3, v3, 02192; VI-NEXT: v_mad_u64_u32 v[2:3], s[6:7], s3, v2, 02193; VI-NEXT: v_readfirstlane_b32 s10, v42194; VI-NEXT: s_add_u32 s6, s10, s92195; VI-NEXT: s_addc_u32 s7, 0, s82196; VI-NEXT: v_readfirstlane_b32 s10, v22197; VI-NEXT: v_readfirstlane_b32 s9, v32198; VI-NEXT: s_add_u32 s6, s6, s102199; VI-NEXT: v_readfirstlane_b32 s8, v12200; VI-NEXT: s_addc_u32 s6, s7, s92201; VI-NEXT: s_addc_u32 s8, s8, 02202; VI-NEXT: v_readfirstlane_b32 s7, v02203; VI-NEXT: s_add_u32 s10, s6, s72204; VI-NEXT: v_mov_b32_e32 v0, s102205; VI-NEXT: v_mad_u64_u32 v[0:1], s[6:7], s4, v0, 02206; VI-NEXT: s_addc_u32 s11, 0, s82207; VI-NEXT: s_mul_i32 s8, s4, s112208; VI-NEXT: v_readfirstlane_b32 s9, v12209; VI-NEXT: s_add_i32 s8, s9, s82210; VI-NEXT: s_mul_i32 s9, s5, s102211; VI-NEXT: s_add_i32 s12, s8, s92212; VI-NEXT: s_sub_i32 s13, s3, s122213; VI-NEXT: v_readfirstlane_b32 s8, v02214; VI-NEXT: s_sub_u32 s14, s2, s82215; VI-NEXT: s_cselect_b64 s[8:9], -1, 02216; VI-NEXT: s_subb_u32 s13, s13, s52217; VI-NEXT: s_sub_u32 s15, s14, s42218; VI-NEXT: s_subb_u32 s13, s13, 02219; VI-NEXT: s_cmp_ge_u32 s13, s52220; VI-NEXT: s_cselect_b32 s16, -1, 02221; VI-NEXT: s_cmp_ge_u32 s15, s42222; VI-NEXT: s_cselect_b32 s15, -1, 02223; VI-NEXT: s_cmp_eq_u32 s13, s52224; VI-NEXT: s_cselect_b32 s13, s15, s162225; VI-NEXT: s_add_u32 s15, s10, 12226; VI-NEXT: s_addc_u32 s16, s11, 02227; VI-NEXT: s_add_u32 s17, s10, 22228; VI-NEXT: s_addc_u32 s18, s11, 02229; VI-NEXT: s_cmp_lg_u32 s13, 02230; VI-NEXT: s_cselect_b32 s13, s17, s152231; VI-NEXT: s_cselect_b32 s15, s18, s162232; VI-NEXT: s_cmp_lg_u64 s[8:9], 02233; VI-NEXT: s_subb_u32 s3, s3, s122234; VI-NEXT: s_cmp_ge_u32 s3, s52235; VI-NEXT: s_cselect_b32 s8, -1, 02236; VI-NEXT: s_cmp_ge_u32 s14, s42237; VI-NEXT: s_cselect_b32 s9, -1, 02238; VI-NEXT: s_cmp_eq_u32 s3, s52239; VI-NEXT: s_cselect_b32 s3, s9, s82240; VI-NEXT: s_cmp_lg_u32 s3, 02241; VI-NEXT: s_cselect_b32 s9, s15, s112242; VI-NEXT: s_cselect_b32 s8, s13, s102243; VI-NEXT: s_cbranch_execnz .LBB16_42244; VI-NEXT: .LBB16_2:2245; VI-NEXT: v_cvt_f32_u32_e32 v0, s42246; VI-NEXT: s_sub_i32 s3, 0, s42247; VI-NEXT: v_rcp_iflag_f32_e32 v0, v02248; VI-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v02249; VI-NEXT: v_cvt_u32_f32_e32 v0, v02250; VI-NEXT: v_mul_lo_u32 v1, s3, v02251; VI-NEXT: v_mul_hi_u32 v1, v0, v12252; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v12253; VI-NEXT: v_mul_hi_u32 v0, s2, v02254; VI-NEXT: v_readfirstlane_b32 s3, v02255; VI-NEXT: s_mul_i32 s3, s3, s42256; VI-NEXT: s_sub_i32 s2, s2, s32257; VI-NEXT: s_sub_i32 s3, s2, s42258; VI-NEXT: v_add_u32_e32 v1, vcc, 1, v02259; VI-NEXT: s_cmp_ge_u32 s2, s42260; VI-NEXT: s_cselect_b64 vcc, -1, 02261; VI-NEXT: s_cselect_b32 s2, s3, s22262; VI-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2263; VI-NEXT: v_add_u32_e32 v1, vcc, 1, v02264; VI-NEXT: s_cmp_ge_u32 s2, s42265; VI-NEXT: s_cselect_b64 vcc, -1, 02266; VI-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2267; VI-NEXT: v_mov_b32_e32 v1, 02268; VI-NEXT: s_branch .LBB16_52269; VI-NEXT: .LBB16_3:2270; VI-NEXT: ; implicit-def: $sgpr8_sgpr92271; VI-NEXT: s_branch .LBB16_22272; VI-NEXT: .LBB16_4:2273; VI-NEXT: v_mov_b32_e32 v0, s82274; VI-NEXT: v_mov_b32_e32 v1, s92275; VI-NEXT: .LBB16_5:2276; VI-NEXT: v_mov_b32_e32 v2, s02277; VI-NEXT: v_mov_b32_e32 v3, s12278; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]2279; VI-NEXT: s_endpgm2280;2281; GFX9-LABEL: sudiv64:2282; GFX9: ; %bb.0:2283; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242284; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x342285; GFX9-NEXT: s_waitcnt lgkmcnt(0)2286; GFX9-NEXT: s_or_b64 s[4:5], s[2:3], s[6:7]2287; GFX9-NEXT: s_mov_b32 s4, 02288; GFX9-NEXT: s_cmp_lg_u64 s[4:5], 02289; GFX9-NEXT: s_cbranch_scc0 .LBB16_42290; GFX9-NEXT: ; %bb.1:2291; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s62292; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s72293; GFX9-NEXT: s_sub_u32 s8, 0, s62294; GFX9-NEXT: s_subb_u32 s9, 0, s72295; GFX9-NEXT: v_madmk_f32 v0, v1, 0x4f800000, v02296; GFX9-NEXT: v_rcp_f32_e32 v0, v02297; GFX9-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v02298; GFX9-NEXT: v_mul_f32_e32 v1, 0x2f800000, v02299; GFX9-NEXT: v_trunc_f32_e32 v1, v12300; GFX9-NEXT: v_madmk_f32 v0, v1, 0xcf800000, v02301; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v12302; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v02303; GFX9-NEXT: v_readfirstlane_b32 s10, v12304; GFX9-NEXT: v_readfirstlane_b32 s11, v02305; GFX9-NEXT: s_mul_i32 s12, s8, s102306; GFX9-NEXT: s_mul_hi_u32 s14, s8, s112307; GFX9-NEXT: s_mul_i32 s13, s9, s112308; GFX9-NEXT: s_add_i32 s12, s14, s122309; GFX9-NEXT: s_add_i32 s12, s12, s132310; GFX9-NEXT: s_mul_i32 s15, s8, s112311; GFX9-NEXT: s_mul_i32 s14, s11, s122312; GFX9-NEXT: s_mul_hi_u32 s16, s11, s152313; GFX9-NEXT: s_mul_hi_u32 s13, s11, s122314; GFX9-NEXT: s_add_u32 s14, s16, s142315; GFX9-NEXT: s_addc_u32 s13, 0, s132316; GFX9-NEXT: s_mul_hi_u32 s17, s10, s152317; GFX9-NEXT: s_mul_i32 s15, s10, s152318; GFX9-NEXT: s_add_u32 s14, s14, s152319; GFX9-NEXT: s_mul_hi_u32 s16, s10, s122320; GFX9-NEXT: s_addc_u32 s13, s13, s172321; GFX9-NEXT: s_addc_u32 s14, s16, 02322; GFX9-NEXT: s_mul_i32 s12, s10, s122323; GFX9-NEXT: s_add_u32 s12, s13, s122324; GFX9-NEXT: s_addc_u32 s13, 0, s142325; GFX9-NEXT: s_add_u32 s11, s11, s122326; GFX9-NEXT: s_addc_u32 s10, s10, s132327; GFX9-NEXT: s_mul_i32 s12, s8, s102328; GFX9-NEXT: s_mul_hi_u32 s13, s8, s112329; GFX9-NEXT: s_add_i32 s12, s13, s122330; GFX9-NEXT: s_mul_i32 s9, s9, s112331; GFX9-NEXT: s_add_i32 s12, s12, s92332; GFX9-NEXT: s_mul_i32 s8, s8, s112333; GFX9-NEXT: s_mul_hi_u32 s13, s10, s82334; GFX9-NEXT: s_mul_i32 s14, s10, s82335; GFX9-NEXT: s_mul_i32 s16, s11, s122336; GFX9-NEXT: s_mul_hi_u32 s8, s11, s82337; GFX9-NEXT: s_mul_hi_u32 s15, s11, s122338; GFX9-NEXT: s_add_u32 s8, s8, s162339; GFX9-NEXT: s_addc_u32 s15, 0, s152340; GFX9-NEXT: s_add_u32 s8, s8, s142341; GFX9-NEXT: s_mul_hi_u32 s9, s10, s122342; GFX9-NEXT: s_addc_u32 s8, s15, s132343; GFX9-NEXT: s_addc_u32 s9, s9, 02344; GFX9-NEXT: s_mul_i32 s12, s10, s122345; GFX9-NEXT: s_add_u32 s8, s8, s122346; GFX9-NEXT: s_addc_u32 s9, 0, s92347; GFX9-NEXT: s_add_u32 s8, s11, s82348; GFX9-NEXT: s_addc_u32 s9, s10, s92349; GFX9-NEXT: s_mul_i32 s11, s2, s92350; GFX9-NEXT: s_mul_hi_u32 s12, s2, s82351; GFX9-NEXT: s_mul_hi_u32 s10, s2, s92352; GFX9-NEXT: s_add_u32 s11, s12, s112353; GFX9-NEXT: s_addc_u32 s10, 0, s102354; GFX9-NEXT: s_mul_hi_u32 s13, s3, s82355; GFX9-NEXT: s_mul_i32 s8, s3, s82356; GFX9-NEXT: s_add_u32 s8, s11, s82357; GFX9-NEXT: s_mul_hi_u32 s12, s3, s92358; GFX9-NEXT: s_addc_u32 s8, s10, s132359; GFX9-NEXT: s_addc_u32 s10, s12, 02360; GFX9-NEXT: s_mul_i32 s9, s3, s92361; GFX9-NEXT: s_add_u32 s11, s8, s92362; GFX9-NEXT: s_addc_u32 s10, 0, s102363; GFX9-NEXT: s_mul_i32 s8, s6, s102364; GFX9-NEXT: s_mul_hi_u32 s9, s6, s112365; GFX9-NEXT: s_add_i32 s8, s9, s82366; GFX9-NEXT: s_mul_i32 s9, s7, s112367; GFX9-NEXT: s_add_i32 s12, s8, s92368; GFX9-NEXT: s_sub_i32 s13, s3, s122369; GFX9-NEXT: s_mul_i32 s8, s6, s112370; GFX9-NEXT: s_sub_u32 s14, s2, s82371; GFX9-NEXT: s_cselect_b64 s[8:9], -1, 02372; GFX9-NEXT: s_subb_u32 s13, s13, s72373; GFX9-NEXT: s_sub_u32 s15, s14, s62374; GFX9-NEXT: s_subb_u32 s13, s13, 02375; GFX9-NEXT: s_cmp_ge_u32 s13, s72376; GFX9-NEXT: s_cselect_b32 s16, -1, 02377; GFX9-NEXT: s_cmp_ge_u32 s15, s62378; GFX9-NEXT: s_cselect_b32 s15, -1, 02379; GFX9-NEXT: s_cmp_eq_u32 s13, s72380; GFX9-NEXT: s_cselect_b32 s13, s15, s162381; GFX9-NEXT: s_add_u32 s15, s11, 12382; GFX9-NEXT: s_addc_u32 s16, s10, 02383; GFX9-NEXT: s_add_u32 s17, s11, 22384; GFX9-NEXT: s_addc_u32 s18, s10, 02385; GFX9-NEXT: s_cmp_lg_u32 s13, 02386; GFX9-NEXT: s_cselect_b32 s13, s17, s152387; GFX9-NEXT: s_cselect_b32 s15, s18, s162388; GFX9-NEXT: s_cmp_lg_u64 s[8:9], 02389; GFX9-NEXT: s_subb_u32 s3, s3, s122390; GFX9-NEXT: s_cmp_ge_u32 s3, s72391; GFX9-NEXT: s_cselect_b32 s8, -1, 02392; GFX9-NEXT: s_cmp_ge_u32 s14, s62393; GFX9-NEXT: s_cselect_b32 s9, -1, 02394; GFX9-NEXT: s_cmp_eq_u32 s3, s72395; GFX9-NEXT: s_cselect_b32 s3, s9, s82396; GFX9-NEXT: s_cmp_lg_u32 s3, 02397; GFX9-NEXT: s_cselect_b32 s9, s15, s102398; GFX9-NEXT: s_cselect_b32 s8, s13, s112399; GFX9-NEXT: s_cbranch_execnz .LBB16_32400; GFX9-NEXT: .LBB16_2:2401; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s62402; GFX9-NEXT: s_sub_i32 s3, 0, s62403; GFX9-NEXT: s_mov_b32 s9, 02404; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v02405; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v02406; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v02407; GFX9-NEXT: v_readfirstlane_b32 s4, v02408; GFX9-NEXT: s_mul_i32 s3, s3, s42409; GFX9-NEXT: s_mul_hi_u32 s3, s4, s32410; GFX9-NEXT: s_add_i32 s4, s4, s32411; GFX9-NEXT: s_mul_hi_u32 s3, s2, s42412; GFX9-NEXT: s_mul_i32 s5, s3, s62413; GFX9-NEXT: s_sub_i32 s2, s2, s52414; GFX9-NEXT: s_add_i32 s4, s3, 12415; GFX9-NEXT: s_sub_i32 s5, s2, s62416; GFX9-NEXT: s_cmp_ge_u32 s2, s62417; GFX9-NEXT: s_cselect_b32 s3, s4, s32418; GFX9-NEXT: s_cselect_b32 s2, s5, s22419; GFX9-NEXT: s_add_i32 s4, s3, 12420; GFX9-NEXT: s_cmp_ge_u32 s2, s62421; GFX9-NEXT: s_cselect_b32 s8, s4, s32422; GFX9-NEXT: .LBB16_3:2423; GFX9-NEXT: v_mov_b32_e32 v0, s82424; GFX9-NEXT: v_mov_b32_e32 v2, 02425; GFX9-NEXT: v_mov_b32_e32 v1, s92426; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2427; GFX9-NEXT: s_endpgm2428; GFX9-NEXT: .LBB16_4:2429; GFX9-NEXT: ; implicit-def: $sgpr8_sgpr92430; GFX9-NEXT: s_branch .LBB16_22431;2432; GFX1010-LABEL: sudiv64:2433; GFX1010: ; %bb.0:2434; GFX1010-NEXT: s_clause 0x12435; GFX1010-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242436; GFX1010-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x342437; GFX1010-NEXT: s_waitcnt lgkmcnt(0)2438; GFX1010-NEXT: s_or_b64 s[4:5], s[2:3], s[6:7]2439; GFX1010-NEXT: s_mov_b32 s4, 02440; GFX1010-NEXT: s_cmp_lg_u64 s[4:5], 02441; GFX1010-NEXT: s_cbranch_scc0 .LBB16_42442; GFX1010-NEXT: ; %bb.1:2443; GFX1010-NEXT: v_cvt_f32_u32_e32 v0, s62444; GFX1010-NEXT: v_cvt_f32_u32_e32 v1, s72445; GFX1010-NEXT: s_sub_u32 s9, 0, s62446; GFX1010-NEXT: s_subb_u32 s10, 0, s72447; GFX1010-NEXT: v_madmk_f32 v0, v1, 0x4f800000, v02448; GFX1010-NEXT: v_rcp_f32_e32 v0, v02449; GFX1010-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v02450; GFX1010-NEXT: v_mul_f32_e32 v1, 0x2f800000, v02451; GFX1010-NEXT: v_trunc_f32_e32 v1, v12452; GFX1010-NEXT: v_madmk_f32 v0, v1, 0xcf800000, v02453; GFX1010-NEXT: v_cvt_u32_f32_e32 v1, v12454; GFX1010-NEXT: v_cvt_u32_f32_e32 v0, v02455; GFX1010-NEXT: v_readfirstlane_b32 s5, v12456; GFX1010-NEXT: v_readfirstlane_b32 s8, v02457; GFX1010-NEXT: s_mul_i32 s11, s9, s52458; GFX1010-NEXT: s_mul_hi_u32 s13, s9, s82459; GFX1010-NEXT: s_mul_i32 s12, s10, s82460; GFX1010-NEXT: s_add_i32 s11, s13, s112461; GFX1010-NEXT: s_mul_i32 s14, s9, s82462; GFX1010-NEXT: s_add_i32 s11, s11, s122463; GFX1010-NEXT: s_mul_hi_u32 s13, s8, s142464; GFX1010-NEXT: s_mul_i32 s16, s8, s112465; GFX1010-NEXT: s_mul_hi_u32 s15, s5, s142466; GFX1010-NEXT: s_mul_i32 s12, s5, s142467; GFX1010-NEXT: s_mul_hi_u32 s14, s8, s112468; GFX1010-NEXT: s_add_u32 s13, s13, s162469; GFX1010-NEXT: s_addc_u32 s14, 0, s142470; GFX1010-NEXT: s_mul_hi_u32 s17, s5, s112471; GFX1010-NEXT: s_add_u32 s12, s13, s122472; GFX1010-NEXT: s_mul_i32 s11, s5, s112473; GFX1010-NEXT: s_addc_u32 s12, s14, s152474; GFX1010-NEXT: s_addc_u32 s13, s17, 02475; GFX1010-NEXT: s_add_u32 s11, s12, s112476; GFX1010-NEXT: s_addc_u32 s12, 0, s132477; GFX1010-NEXT: s_add_u32 s8, s8, s112478; GFX1010-NEXT: s_addc_u32 s5, s5, s122479; GFX1010-NEXT: s_mul_hi_u32 s11, s9, s82480; GFX1010-NEXT: s_mul_i32 s12, s9, s82481; GFX1010-NEXT: s_mul_i32 s9, s9, s52482; GFX1010-NEXT: s_mul_i32 s10, s10, s82483; GFX1010-NEXT: s_add_i32 s9, s11, s92484; GFX1010-NEXT: s_mul_i32 s11, s5, s122485; GFX1010-NEXT: s_add_i32 s9, s9, s102486; GFX1010-NEXT: s_mul_hi_u32 s10, s8, s122487; GFX1010-NEXT: s_mul_i32 s15, s8, s92488; GFX1010-NEXT: s_mul_hi_u32 s14, s8, s92489; GFX1010-NEXT: s_add_u32 s10, s10, s152490; GFX1010-NEXT: s_mul_hi_u32 s13, s5, s122491; GFX1010-NEXT: s_addc_u32 s14, 0, s142492; GFX1010-NEXT: s_mul_hi_u32 s12, s5, s92493; GFX1010-NEXT: s_add_u32 s10, s10, s112494; GFX1010-NEXT: s_mul_i32 s9, s5, s92495; GFX1010-NEXT: s_addc_u32 s10, s14, s132496; GFX1010-NEXT: s_addc_u32 s11, s12, 02497; GFX1010-NEXT: s_add_u32 s9, s10, s92498; GFX1010-NEXT: s_addc_u32 s10, 0, s112499; GFX1010-NEXT: s_add_u32 s8, s8, s92500; GFX1010-NEXT: s_addc_u32 s5, s5, s102501; GFX1010-NEXT: s_mul_hi_u32 s9, s2, s82502; GFX1010-NEXT: s_mul_i32 s12, s2, s52503; GFX1010-NEXT: s_mul_hi_u32 s11, s2, s52504; GFX1010-NEXT: s_mul_hi_u32 s10, s3, s82505; GFX1010-NEXT: s_mul_i32 s8, s3, s82506; GFX1010-NEXT: s_add_u32 s9, s9, s122507; GFX1010-NEXT: s_addc_u32 s11, 0, s112508; GFX1010-NEXT: s_mul_hi_u32 s13, s3, s52509; GFX1010-NEXT: s_add_u32 s8, s9, s82510; GFX1010-NEXT: s_mul_i32 s5, s3, s52511; GFX1010-NEXT: s_addc_u32 s8, s11, s102512; GFX1010-NEXT: s_addc_u32 s9, s13, 02513; GFX1010-NEXT: s_add_u32 s5, s8, s52514; GFX1010-NEXT: s_addc_u32 s8, 0, s92515; GFX1010-NEXT: s_mul_hi_u32 s9, s6, s52516; GFX1010-NEXT: s_mul_i32 s10, s6, s82517; GFX1010-NEXT: s_mul_i32 s11, s7, s52518; GFX1010-NEXT: s_add_i32 s9, s9, s102519; GFX1010-NEXT: s_mul_i32 s10, s6, s52520; GFX1010-NEXT: s_add_i32 s9, s9, s112521; GFX1010-NEXT: s_sub_i32 s11, s3, s92522; GFX1010-NEXT: s_sub_u32 s10, s2, s102523; GFX1010-NEXT: s_cselect_b32 s12, -1, 02524; GFX1010-NEXT: s_subb_u32 s11, s11, s72525; GFX1010-NEXT: s_sub_u32 s13, s10, s62526; GFX1010-NEXT: s_subb_u32 s11, s11, 02527; GFX1010-NEXT: s_cmp_ge_u32 s11, s72528; GFX1010-NEXT: s_cselect_b32 s14, -1, 02529; GFX1010-NEXT: s_cmp_ge_u32 s13, s62530; GFX1010-NEXT: s_cselect_b32 s13, -1, 02531; GFX1010-NEXT: s_cmp_eq_u32 s11, s72532; GFX1010-NEXT: s_cselect_b32 s11, s13, s142533; GFX1010-NEXT: s_add_u32 s13, s5, 12534; GFX1010-NEXT: s_addc_u32 s14, s8, 02535; GFX1010-NEXT: s_add_u32 s15, s5, 22536; GFX1010-NEXT: s_addc_u32 s16, s8, 02537; GFX1010-NEXT: s_cmp_lg_u32 s11, 02538; GFX1010-NEXT: s_cselect_b32 s11, s15, s132539; GFX1010-NEXT: s_cselect_b32 s13, s16, s142540; GFX1010-NEXT: s_cmp_lg_u32 s12, 02541; GFX1010-NEXT: s_subb_u32 s3, s3, s92542; GFX1010-NEXT: s_cmp_ge_u32 s3, s72543; GFX1010-NEXT: s_cselect_b32 s9, -1, 02544; GFX1010-NEXT: s_cmp_ge_u32 s10, s62545; GFX1010-NEXT: s_cselect_b32 s10, -1, 02546; GFX1010-NEXT: s_cmp_eq_u32 s3, s72547; GFX1010-NEXT: s_cselect_b32 s3, s10, s92548; GFX1010-NEXT: s_cmp_lg_u32 s3, 02549; GFX1010-NEXT: s_cselect_b32 s9, s13, s82550; GFX1010-NEXT: s_cselect_b32 s8, s11, s52551; GFX1010-NEXT: s_andn2_b32 vcc_lo, exec_lo, s42552; GFX1010-NEXT: s_cbranch_vccnz .LBB16_32553; GFX1010-NEXT: .LBB16_2:2554; GFX1010-NEXT: v_cvt_f32_u32_e32 v0, s62555; GFX1010-NEXT: s_sub_i32 s4, 0, s62556; GFX1010-NEXT: s_mov_b32 s9, 02557; GFX1010-NEXT: v_rcp_iflag_f32_e32 v0, v02558; GFX1010-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v02559; GFX1010-NEXT: v_cvt_u32_f32_e32 v0, v02560; GFX1010-NEXT: v_readfirstlane_b32 s3, v02561; GFX1010-NEXT: s_mul_i32 s4, s4, s32562; GFX1010-NEXT: s_mul_hi_u32 s4, s3, s42563; GFX1010-NEXT: s_add_i32 s3, s3, s42564; GFX1010-NEXT: s_mul_hi_u32 s3, s2, s32565; GFX1010-NEXT: s_mul_i32 s4, s3, s62566; GFX1010-NEXT: s_sub_i32 s2, s2, s42567; GFX1010-NEXT: s_add_i32 s4, s3, 12568; GFX1010-NEXT: s_sub_i32 s5, s2, s62569; GFX1010-NEXT: s_cmp_ge_u32 s2, s62570; GFX1010-NEXT: s_cselect_b32 s3, s4, s32571; GFX1010-NEXT: s_cselect_b32 s2, s5, s22572; GFX1010-NEXT: s_add_i32 s4, s3, 12573; GFX1010-NEXT: s_cmp_ge_u32 s2, s62574; GFX1010-NEXT: s_cselect_b32 s8, s4, s32575; GFX1010-NEXT: .LBB16_3:2576; GFX1010-NEXT: v_mov_b32_e32 v0, s82577; GFX1010-NEXT: v_mov_b32_e32 v2, 02578; GFX1010-NEXT: v_mov_b32_e32 v1, s92579; GFX1010-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2580; GFX1010-NEXT: s_endpgm2581; GFX1010-NEXT: .LBB16_4:2582; GFX1010-NEXT: ; implicit-def: $sgpr8_sgpr92583; GFX1010-NEXT: s_branch .LBB16_22584;2585; GFX1030W32-LABEL: sudiv64:2586; GFX1030W32: ; %bb.0:2587; GFX1030W32-NEXT: s_clause 0x12588; GFX1030W32-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242589; GFX1030W32-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x342590; GFX1030W32-NEXT: s_waitcnt lgkmcnt(0)2591; GFX1030W32-NEXT: s_or_b64 s[6:7], s[2:3], s[4:5]2592; GFX1030W32-NEXT: s_mov_b32 s6, 02593; GFX1030W32-NEXT: s_cmp_lg_u64 s[6:7], 02594; GFX1030W32-NEXT: s_cbranch_scc0 .LBB16_42595; GFX1030W32-NEXT: ; %bb.1:2596; GFX1030W32-NEXT: v_cvt_f32_u32_e32 v0, s42597; GFX1030W32-NEXT: v_cvt_f32_u32_e32 v1, s52598; GFX1030W32-NEXT: s_sub_u32 s9, 0, s42599; GFX1030W32-NEXT: s_subb_u32 s10, 0, s52600; GFX1030W32-NEXT: v_fmamk_f32 v0, v1, 0x4f800000, v02601; GFX1030W32-NEXT: v_rcp_f32_e32 v0, v02602; GFX1030W32-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v02603; GFX1030W32-NEXT: v_mul_f32_e32 v1, 0x2f800000, v02604; GFX1030W32-NEXT: v_trunc_f32_e32 v1, v12605; GFX1030W32-NEXT: v_fmamk_f32 v0, v1, 0xcf800000, v02606; GFX1030W32-NEXT: v_cvt_u32_f32_e32 v1, v12607; GFX1030W32-NEXT: v_cvt_u32_f32_e32 v0, v02608; GFX1030W32-NEXT: v_readfirstlane_b32 s7, v12609; GFX1030W32-NEXT: v_readfirstlane_b32 s8, v02610; GFX1030W32-NEXT: s_mul_i32 s11, s9, s72611; GFX1030W32-NEXT: s_mul_hi_u32 s13, s9, s82612; GFX1030W32-NEXT: s_mul_i32 s12, s10, s82613; GFX1030W32-NEXT: s_add_i32 s11, s13, s112614; GFX1030W32-NEXT: s_mul_i32 s14, s9, s82615; GFX1030W32-NEXT: s_add_i32 s11, s11, s122616; GFX1030W32-NEXT: s_mul_hi_u32 s13, s8, s142617; GFX1030W32-NEXT: s_mul_i32 s16, s8, s112618; GFX1030W32-NEXT: s_mul_hi_u32 s15, s7, s142619; GFX1030W32-NEXT: s_mul_i32 s12, s7, s142620; GFX1030W32-NEXT: s_mul_hi_u32 s14, s8, s112621; GFX1030W32-NEXT: s_add_u32 s13, s13, s162622; GFX1030W32-NEXT: s_addc_u32 s14, 0, s142623; GFX1030W32-NEXT: s_mul_hi_u32 s17, s7, s112624; GFX1030W32-NEXT: s_add_u32 s12, s13, s122625; GFX1030W32-NEXT: s_mul_i32 s11, s7, s112626; GFX1030W32-NEXT: s_addc_u32 s12, s14, s152627; GFX1030W32-NEXT: s_addc_u32 s13, s17, 02628; GFX1030W32-NEXT: s_add_u32 s11, s12, s112629; GFX1030W32-NEXT: s_addc_u32 s12, 0, s132630; GFX1030W32-NEXT: s_add_u32 s8, s8, s112631; GFX1030W32-NEXT: s_addc_u32 s7, s7, s122632; GFX1030W32-NEXT: s_mul_hi_u32 s11, s9, s82633; GFX1030W32-NEXT: s_mul_i32 s12, s9, s82634; GFX1030W32-NEXT: s_mul_i32 s9, s9, s72635; GFX1030W32-NEXT: s_mul_i32 s10, s10, s82636; GFX1030W32-NEXT: s_add_i32 s9, s11, s92637; GFX1030W32-NEXT: s_mul_i32 s11, s7, s122638; GFX1030W32-NEXT: s_add_i32 s9, s9, s102639; GFX1030W32-NEXT: s_mul_hi_u32 s10, s8, s122640; GFX1030W32-NEXT: s_mul_i32 s15, s8, s92641; GFX1030W32-NEXT: s_mul_hi_u32 s14, s8, s92642; GFX1030W32-NEXT: s_add_u32 s10, s10, s152643; GFX1030W32-NEXT: s_mul_hi_u32 s13, s7, s122644; GFX1030W32-NEXT: s_addc_u32 s14, 0, s142645; GFX1030W32-NEXT: s_mul_hi_u32 s12, s7, s92646; GFX1030W32-NEXT: s_add_u32 s10, s10, s112647; GFX1030W32-NEXT: s_mul_i32 s9, s7, s92648; GFX1030W32-NEXT: s_addc_u32 s10, s14, s132649; GFX1030W32-NEXT: s_addc_u32 s11, s12, 02650; GFX1030W32-NEXT: s_add_u32 s9, s10, s92651; GFX1030W32-NEXT: s_addc_u32 s10, 0, s112652; GFX1030W32-NEXT: s_add_u32 s8, s8, s92653; GFX1030W32-NEXT: s_addc_u32 s7, s7, s102654; GFX1030W32-NEXT: s_mul_hi_u32 s9, s2, s82655; GFX1030W32-NEXT: s_mul_i32 s12, s2, s72656; GFX1030W32-NEXT: s_mul_hi_u32 s11, s2, s72657; GFX1030W32-NEXT: s_mul_hi_u32 s10, s3, s82658; GFX1030W32-NEXT: s_mul_i32 s8, s3, s82659; GFX1030W32-NEXT: s_add_u32 s9, s9, s122660; GFX1030W32-NEXT: s_addc_u32 s11, 0, s112661; GFX1030W32-NEXT: s_mul_hi_u32 s13, s3, s72662; GFX1030W32-NEXT: s_add_u32 s8, s9, s82663; GFX1030W32-NEXT: s_mul_i32 s7, s3, s72664; GFX1030W32-NEXT: s_addc_u32 s8, s11, s102665; GFX1030W32-NEXT: s_addc_u32 s9, s13, 02666; GFX1030W32-NEXT: s_add_u32 s7, s8, s72667; GFX1030W32-NEXT: s_addc_u32 s8, 0, s92668; GFX1030W32-NEXT: s_mul_hi_u32 s9, s4, s72669; GFX1030W32-NEXT: s_mul_i32 s10, s4, s82670; GFX1030W32-NEXT: s_mul_i32 s11, s5, s72671; GFX1030W32-NEXT: s_add_i32 s9, s9, s102672; GFX1030W32-NEXT: s_mul_i32 s10, s4, s72673; GFX1030W32-NEXT: s_add_i32 s9, s9, s112674; GFX1030W32-NEXT: s_sub_i32 s11, s3, s92675; GFX1030W32-NEXT: s_sub_u32 s10, s2, s102676; GFX1030W32-NEXT: s_cselect_b32 s12, -1, 02677; GFX1030W32-NEXT: s_subb_u32 s11, s11, s52678; GFX1030W32-NEXT: s_sub_u32 s13, s10, s42679; GFX1030W32-NEXT: s_subb_u32 s11, s11, 02680; GFX1030W32-NEXT: s_cmp_ge_u32 s11, s52681; GFX1030W32-NEXT: s_cselect_b32 s14, -1, 02682; GFX1030W32-NEXT: s_cmp_ge_u32 s13, s42683; GFX1030W32-NEXT: s_cselect_b32 s13, -1, 02684; GFX1030W32-NEXT: s_cmp_eq_u32 s11, s52685; GFX1030W32-NEXT: s_cselect_b32 s11, s13, s142686; GFX1030W32-NEXT: s_add_u32 s13, s7, 12687; GFX1030W32-NEXT: s_addc_u32 s14, s8, 02688; GFX1030W32-NEXT: s_add_u32 s15, s7, 22689; GFX1030W32-NEXT: s_addc_u32 s16, s8, 02690; GFX1030W32-NEXT: s_cmp_lg_u32 s11, 02691; GFX1030W32-NEXT: s_cselect_b32 s11, s15, s132692; GFX1030W32-NEXT: s_cselect_b32 s13, s16, s142693; GFX1030W32-NEXT: s_cmp_lg_u32 s12, 02694; GFX1030W32-NEXT: s_subb_u32 s3, s3, s92695; GFX1030W32-NEXT: s_cmp_ge_u32 s3, s52696; GFX1030W32-NEXT: s_cselect_b32 s9, -1, 02697; GFX1030W32-NEXT: s_cmp_ge_u32 s10, s42698; GFX1030W32-NEXT: s_cselect_b32 s10, -1, 02699; GFX1030W32-NEXT: s_cmp_eq_u32 s3, s52700; GFX1030W32-NEXT: s_cselect_b32 s3, s10, s92701; GFX1030W32-NEXT: s_cmp_lg_u32 s3, 02702; GFX1030W32-NEXT: s_cselect_b32 s9, s13, s82703; GFX1030W32-NEXT: s_cselect_b32 s8, s11, s72704; GFX1030W32-NEXT: s_andn2_b32 vcc_lo, exec_lo, s62705; GFX1030W32-NEXT: s_cbranch_vccnz .LBB16_32706; GFX1030W32-NEXT: .LBB16_2:2707; GFX1030W32-NEXT: v_cvt_f32_u32_e32 v0, s42708; GFX1030W32-NEXT: s_sub_i32 s5, 0, s42709; GFX1030W32-NEXT: s_mov_b32 s9, 02710; GFX1030W32-NEXT: v_rcp_iflag_f32_e32 v0, v02711; GFX1030W32-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v02712; GFX1030W32-NEXT: v_cvt_u32_f32_e32 v0, v02713; GFX1030W32-NEXT: v_readfirstlane_b32 s3, v02714; GFX1030W32-NEXT: s_mul_i32 s5, s5, s32715; GFX1030W32-NEXT: s_mul_hi_u32 s5, s3, s52716; GFX1030W32-NEXT: s_add_i32 s3, s3, s52717; GFX1030W32-NEXT: s_mul_hi_u32 s3, s2, s32718; GFX1030W32-NEXT: s_mul_i32 s5, s3, s42719; GFX1030W32-NEXT: s_sub_i32 s2, s2, s52720; GFX1030W32-NEXT: s_add_i32 s5, s3, 12721; GFX1030W32-NEXT: s_sub_i32 s6, s2, s42722; GFX1030W32-NEXT: s_cmp_ge_u32 s2, s42723; GFX1030W32-NEXT: s_cselect_b32 s3, s5, s32724; GFX1030W32-NEXT: s_cselect_b32 s2, s6, s22725; GFX1030W32-NEXT: s_add_i32 s5, s3, 12726; GFX1030W32-NEXT: s_cmp_ge_u32 s2, s42727; GFX1030W32-NEXT: s_cselect_b32 s8, s5, s32728; GFX1030W32-NEXT: .LBB16_3:2729; GFX1030W32-NEXT: v_mov_b32_e32 v0, s82730; GFX1030W32-NEXT: v_mov_b32_e32 v2, 02731; GFX1030W32-NEXT: v_mov_b32_e32 v1, s92732; GFX1030W32-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2733; GFX1030W32-NEXT: s_endpgm2734; GFX1030W32-NEXT: .LBB16_4:2735; GFX1030W32-NEXT: ; implicit-def: $sgpr8_sgpr92736; GFX1030W32-NEXT: s_branch .LBB16_22737;2738; GFX1030W64-LABEL: sudiv64:2739; GFX1030W64: ; %bb.0:2740; GFX1030W64-NEXT: s_clause 0x12741; GFX1030W64-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242742; GFX1030W64-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x342743; GFX1030W64-NEXT: s_waitcnt lgkmcnt(0)2744; GFX1030W64-NEXT: s_or_b64 s[6:7], s[2:3], s[4:5]2745; GFX1030W64-NEXT: s_mov_b32 s6, 02746; GFX1030W64-NEXT: s_cmp_lg_u64 s[6:7], 02747; GFX1030W64-NEXT: s_cbranch_scc0 .LBB16_42748; GFX1030W64-NEXT: ; %bb.1:2749; GFX1030W64-NEXT: v_cvt_f32_u32_e32 v0, s42750; GFX1030W64-NEXT: v_cvt_f32_u32_e32 v1, s52751; GFX1030W64-NEXT: s_sub_u32 s8, 0, s42752; GFX1030W64-NEXT: s_subb_u32 s9, 0, s52753; GFX1030W64-NEXT: v_fmamk_f32 v0, v1, 0x4f800000, v02754; GFX1030W64-NEXT: v_rcp_f32_e32 v0, v02755; GFX1030W64-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v02756; GFX1030W64-NEXT: v_mul_f32_e32 v1, 0x2f800000, v02757; GFX1030W64-NEXT: v_trunc_f32_e32 v1, v12758; GFX1030W64-NEXT: v_fmamk_f32 v0, v1, 0xcf800000, v02759; GFX1030W64-NEXT: v_cvt_u32_f32_e32 v1, v12760; GFX1030W64-NEXT: v_cvt_u32_f32_e32 v0, v02761; GFX1030W64-NEXT: v_readfirstlane_b32 s6, v12762; GFX1030W64-NEXT: v_readfirstlane_b32 s7, v02763; GFX1030W64-NEXT: s_mul_i32 s10, s8, s62764; GFX1030W64-NEXT: s_mul_hi_u32 s12, s8, s72765; GFX1030W64-NEXT: s_mul_i32 s11, s9, s72766; GFX1030W64-NEXT: s_add_i32 s10, s12, s102767; GFX1030W64-NEXT: s_mul_i32 s13, s8, s72768; GFX1030W64-NEXT: s_add_i32 s10, s10, s112769; GFX1030W64-NEXT: s_mul_hi_u32 s12, s7, s132770; GFX1030W64-NEXT: s_mul_i32 s15, s7, s102771; GFX1030W64-NEXT: s_mul_hi_u32 s14, s6, s132772; GFX1030W64-NEXT: s_mul_i32 s11, s6, s132773; GFX1030W64-NEXT: s_mul_hi_u32 s13, s7, s102774; GFX1030W64-NEXT: s_add_u32 s12, s12, s152775; GFX1030W64-NEXT: s_addc_u32 s13, 0, s132776; GFX1030W64-NEXT: s_mul_hi_u32 s16, s6, s102777; GFX1030W64-NEXT: s_add_u32 s11, s12, s112778; GFX1030W64-NEXT: s_mul_i32 s10, s6, s102779; GFX1030W64-NEXT: s_addc_u32 s11, s13, s142780; GFX1030W64-NEXT: s_addc_u32 s12, s16, 02781; GFX1030W64-NEXT: s_add_u32 s10, s11, s102782; GFX1030W64-NEXT: s_addc_u32 s11, 0, s122783; GFX1030W64-NEXT: s_add_u32 s7, s7, s102784; GFX1030W64-NEXT: s_addc_u32 s6, s6, s112785; GFX1030W64-NEXT: s_mul_hi_u32 s10, s8, s72786; GFX1030W64-NEXT: s_mul_i32 s11, s8, s72787; GFX1030W64-NEXT: s_mul_i32 s8, s8, s62788; GFX1030W64-NEXT: s_mul_i32 s9, s9, s72789; GFX1030W64-NEXT: s_add_i32 s8, s10, s82790; GFX1030W64-NEXT: s_mul_i32 s10, s6, s112791; GFX1030W64-NEXT: s_add_i32 s8, s8, s92792; GFX1030W64-NEXT: s_mul_hi_u32 s9, s7, s112793; GFX1030W64-NEXT: s_mul_i32 s14, s7, s82794; GFX1030W64-NEXT: s_mul_hi_u32 s13, s7, s82795; GFX1030W64-NEXT: s_add_u32 s9, s9, s142796; GFX1030W64-NEXT: s_mul_hi_u32 s12, s6, s112797; GFX1030W64-NEXT: s_addc_u32 s13, 0, s132798; GFX1030W64-NEXT: s_mul_hi_u32 s11, s6, s82799; GFX1030W64-NEXT: s_add_u32 s9, s9, s102800; GFX1030W64-NEXT: s_mul_i32 s8, s6, s82801; GFX1030W64-NEXT: s_addc_u32 s9, s13, s122802; GFX1030W64-NEXT: s_addc_u32 s10, s11, 02803; GFX1030W64-NEXT: s_add_u32 s8, s9, s82804; GFX1030W64-NEXT: s_addc_u32 s9, 0, s102805; GFX1030W64-NEXT: s_add_u32 s7, s7, s82806; GFX1030W64-NEXT: s_addc_u32 s6, s6, s92807; GFX1030W64-NEXT: s_mul_hi_u32 s8, s2, s72808; GFX1030W64-NEXT: s_mul_i32 s11, s2, s62809; GFX1030W64-NEXT: s_mul_hi_u32 s10, s2, s62810; GFX1030W64-NEXT: s_mul_hi_u32 s9, s3, s72811; GFX1030W64-NEXT: s_mul_i32 s7, s3, s72812; GFX1030W64-NEXT: s_add_u32 s8, s8, s112813; GFX1030W64-NEXT: s_addc_u32 s10, 0, s102814; GFX1030W64-NEXT: s_mul_hi_u32 s12, s3, s62815; GFX1030W64-NEXT: s_add_u32 s7, s8, s72816; GFX1030W64-NEXT: s_mul_i32 s6, s3, s62817; GFX1030W64-NEXT: s_addc_u32 s7, s10, s92818; GFX1030W64-NEXT: s_addc_u32 s8, s12, 02819; GFX1030W64-NEXT: s_add_u32 s10, s7, s62820; GFX1030W64-NEXT: s_addc_u32 s11, 0, s82821; GFX1030W64-NEXT: s_mul_hi_u32 s6, s4, s102822; GFX1030W64-NEXT: s_mul_i32 s7, s4, s112823; GFX1030W64-NEXT: s_mul_i32 s8, s5, s102824; GFX1030W64-NEXT: s_add_i32 s6, s6, s72825; GFX1030W64-NEXT: s_add_i32 s8, s6, s82826; GFX1030W64-NEXT: s_mul_i32 s6, s4, s102827; GFX1030W64-NEXT: s_sub_i32 s9, s3, s82828; GFX1030W64-NEXT: s_sub_u32 s12, s2, s62829; GFX1030W64-NEXT: s_cselect_b64 s[6:7], -1, 02830; GFX1030W64-NEXT: s_subb_u32 s9, s9, s52831; GFX1030W64-NEXT: s_sub_u32 s13, s12, s42832; GFX1030W64-NEXT: s_subb_u32 s9, s9, 02833; GFX1030W64-NEXT: s_cmp_ge_u32 s9, s52834; GFX1030W64-NEXT: s_cselect_b32 s14, -1, 02835; GFX1030W64-NEXT: s_cmp_ge_u32 s13, s42836; GFX1030W64-NEXT: s_cselect_b32 s13, -1, 02837; GFX1030W64-NEXT: s_cmp_eq_u32 s9, s52838; GFX1030W64-NEXT: s_cselect_b32 s9, s13, s142839; GFX1030W64-NEXT: s_add_u32 s13, s10, 12840; GFX1030W64-NEXT: s_addc_u32 s14, s11, 02841; GFX1030W64-NEXT: s_add_u32 s15, s10, 22842; GFX1030W64-NEXT: s_addc_u32 s16, s11, 02843; GFX1030W64-NEXT: s_cmp_lg_u32 s9, 02844; GFX1030W64-NEXT: s_cselect_b32 s13, s15, s132845; GFX1030W64-NEXT: s_cselect_b32 s14, s16, s142846; GFX1030W64-NEXT: s_cmp_lg_u64 s[6:7], 02847; GFX1030W64-NEXT: s_subb_u32 s3, s3, s82848; GFX1030W64-NEXT: s_cmp_ge_u32 s3, s52849; GFX1030W64-NEXT: s_cselect_b32 s6, -1, 02850; GFX1030W64-NEXT: s_cmp_ge_u32 s12, s42851; GFX1030W64-NEXT: s_cselect_b32 s7, -1, 02852; GFX1030W64-NEXT: s_cmp_eq_u32 s3, s52853; GFX1030W64-NEXT: s_cselect_b32 s3, s7, s62854; GFX1030W64-NEXT: s_cmp_lg_u32 s3, 02855; GFX1030W64-NEXT: s_cselect_b32 s7, s14, s112856; GFX1030W64-NEXT: s_cselect_b32 s6, s13, s102857; GFX1030W64-NEXT: s_cbranch_execnz .LBB16_32858; GFX1030W64-NEXT: .LBB16_2:2859; GFX1030W64-NEXT: v_cvt_f32_u32_e32 v0, s42860; GFX1030W64-NEXT: s_sub_i32 s5, 0, s42861; GFX1030W64-NEXT: s_mov_b32 s7, 02862; GFX1030W64-NEXT: v_rcp_iflag_f32_e32 v0, v02863; GFX1030W64-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v02864; GFX1030W64-NEXT: v_cvt_u32_f32_e32 v0, v02865; GFX1030W64-NEXT: v_readfirstlane_b32 s3, v02866; GFX1030W64-NEXT: s_mul_i32 s5, s5, s32867; GFX1030W64-NEXT: s_mul_hi_u32 s5, s3, s52868; GFX1030W64-NEXT: s_add_i32 s3, s3, s52869; GFX1030W64-NEXT: s_mul_hi_u32 s3, s2, s32870; GFX1030W64-NEXT: s_mul_i32 s5, s3, s42871; GFX1030W64-NEXT: s_sub_i32 s2, s2, s52872; GFX1030W64-NEXT: s_add_i32 s5, s3, 12873; GFX1030W64-NEXT: s_sub_i32 s6, s2, s42874; GFX1030W64-NEXT: s_cmp_ge_u32 s2, s42875; GFX1030W64-NEXT: s_cselect_b32 s3, s5, s32876; GFX1030W64-NEXT: s_cselect_b32 s2, s6, s22877; GFX1030W64-NEXT: s_add_i32 s5, s3, 12878; GFX1030W64-NEXT: s_cmp_ge_u32 s2, s42879; GFX1030W64-NEXT: s_cselect_b32 s6, s5, s32880; GFX1030W64-NEXT: .LBB16_3:2881; GFX1030W64-NEXT: v_mov_b32_e32 v0, s62882; GFX1030W64-NEXT: v_mov_b32_e32 v2, 02883; GFX1030W64-NEXT: v_mov_b32_e32 v1, s72884; GFX1030W64-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2885; GFX1030W64-NEXT: s_endpgm2886; GFX1030W64-NEXT: .LBB16_4:2887; GFX1030W64-NEXT: ; implicit-def: $sgpr6_sgpr72888; GFX1030W64-NEXT: s_branch .LBB16_22889;2890; GFX11-LABEL: sudiv64:2891; GFX11: ; %bb.0:2892; GFX11-NEXT: s_clause 0x12893; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242894; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x342895; GFX11-NEXT: s_waitcnt lgkmcnt(0)2896; GFX11-NEXT: s_or_b64 s[6:7], s[2:3], s[4:5]2897; GFX11-NEXT: s_mov_b32 s6, 02898; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2899; GFX11-NEXT: s_cmp_lg_u64 s[6:7], 02900; GFX11-NEXT: s_cbranch_scc0 .LBB16_42901; GFX11-NEXT: ; %bb.1:2902; GFX11-NEXT: v_cvt_f32_u32_e32 v0, s42903; GFX11-NEXT: v_cvt_f32_u32_e32 v1, s52904; GFX11-NEXT: s_sub_u32 s9, 0, s42905; GFX11-NEXT: s_subb_u32 s10, 0, s52906; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2907; GFX11-NEXT: v_fmamk_f32 v0, v1, 0x4f800000, v02908; GFX11-NEXT: v_rcp_f32_e32 v0, v02909; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2910; GFX11-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v02911; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2912; GFX11-NEXT: v_mul_f32_e32 v1, 0x2f800000, v02913; GFX11-NEXT: v_trunc_f32_e32 v1, v12914; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)2915; GFX11-NEXT: v_fmamk_f32 v0, v1, 0xcf800000, v02916; GFX11-NEXT: v_cvt_u32_f32_e32 v1, v12917; GFX11-NEXT: v_cvt_u32_f32_e32 v0, v02918; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2919; GFX11-NEXT: v_readfirstlane_b32 s7, v12920; GFX11-NEXT: v_readfirstlane_b32 s8, v02921; GFX11-NEXT: s_mul_i32 s11, s9, s72922; GFX11-NEXT: s_mul_hi_u32 s13, s9, s82923; GFX11-NEXT: s_mul_i32 s12, s10, s82924; GFX11-NEXT: s_add_i32 s11, s13, s112925; GFX11-NEXT: s_mul_i32 s14, s9, s82926; GFX11-NEXT: s_add_i32 s11, s11, s122927; GFX11-NEXT: s_mul_hi_u32 s13, s8, s142928; GFX11-NEXT: s_mul_i32 s16, s8, s112929; GFX11-NEXT: s_mul_hi_u32 s15, s7, s142930; GFX11-NEXT: s_mul_i32 s12, s7, s142931; GFX11-NEXT: s_mul_hi_u32 s14, s8, s112932; GFX11-NEXT: s_add_u32 s13, s13, s162933; GFX11-NEXT: s_addc_u32 s14, 0, s142934; GFX11-NEXT: s_mul_hi_u32 s17, s7, s112935; GFX11-NEXT: s_add_u32 s12, s13, s122936; GFX11-NEXT: s_mul_i32 s11, s7, s112937; GFX11-NEXT: s_addc_u32 s12, s14, s152938; GFX11-NEXT: s_addc_u32 s13, s17, 02939; GFX11-NEXT: s_add_u32 s11, s12, s112940; GFX11-NEXT: s_addc_u32 s12, 0, s132941; GFX11-NEXT: s_add_u32 s8, s8, s112942; GFX11-NEXT: s_addc_u32 s7, s7, s122943; GFX11-NEXT: s_mul_hi_u32 s11, s9, s82944; GFX11-NEXT: s_mul_i32 s12, s9, s82945; GFX11-NEXT: s_mul_i32 s9, s9, s72946; GFX11-NEXT: s_mul_i32 s10, s10, s82947; GFX11-NEXT: s_add_i32 s9, s11, s92948; GFX11-NEXT: s_mul_i32 s11, s7, s122949; GFX11-NEXT: s_add_i32 s9, s9, s102950; GFX11-NEXT: s_mul_hi_u32 s10, s8, s122951; GFX11-NEXT: s_mul_i32 s15, s8, s92952; GFX11-NEXT: s_mul_hi_u32 s14, s8, s92953; GFX11-NEXT: s_add_u32 s10, s10, s152954; GFX11-NEXT: s_mul_hi_u32 s13, s7, s122955; GFX11-NEXT: s_addc_u32 s14, 0, s142956; GFX11-NEXT: s_mul_hi_u32 s12, s7, s92957; GFX11-NEXT: s_add_u32 s10, s10, s112958; GFX11-NEXT: s_mul_i32 s9, s7, s92959; GFX11-NEXT: s_addc_u32 s10, s14, s132960; GFX11-NEXT: s_addc_u32 s11, s12, 02961; GFX11-NEXT: s_add_u32 s9, s10, s92962; GFX11-NEXT: s_addc_u32 s10, 0, s112963; GFX11-NEXT: s_add_u32 s8, s8, s92964; GFX11-NEXT: s_addc_u32 s7, s7, s102965; GFX11-NEXT: s_mul_hi_u32 s9, s2, s82966; GFX11-NEXT: s_mul_i32 s12, s2, s72967; GFX11-NEXT: s_mul_hi_u32 s11, s2, s72968; GFX11-NEXT: s_mul_hi_u32 s10, s3, s82969; GFX11-NEXT: s_mul_i32 s8, s3, s82970; GFX11-NEXT: s_add_u32 s9, s9, s122971; GFX11-NEXT: s_addc_u32 s11, 0, s112972; GFX11-NEXT: s_mul_hi_u32 s13, s3, s72973; GFX11-NEXT: s_add_u32 s8, s9, s82974; GFX11-NEXT: s_mul_i32 s7, s3, s72975; GFX11-NEXT: s_addc_u32 s8, s11, s102976; GFX11-NEXT: s_addc_u32 s9, s13, 02977; GFX11-NEXT: s_add_u32 s7, s8, s72978; GFX11-NEXT: s_addc_u32 s8, 0, s92979; GFX11-NEXT: s_mul_hi_u32 s9, s4, s72980; GFX11-NEXT: s_mul_i32 s10, s4, s82981; GFX11-NEXT: s_mul_i32 s11, s5, s72982; GFX11-NEXT: s_add_i32 s9, s9, s102983; GFX11-NEXT: s_mul_i32 s10, s4, s72984; GFX11-NEXT: s_add_i32 s9, s9, s112985; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2986; GFX11-NEXT: s_sub_i32 s11, s3, s92987; GFX11-NEXT: s_sub_u32 s10, s2, s102988; GFX11-NEXT: s_cselect_b32 s12, -1, 02989; GFX11-NEXT: s_subb_u32 s11, s11, s52990; GFX11-NEXT: s_sub_u32 s13, s10, s42991; GFX11-NEXT: s_subb_u32 s11, s11, 02992; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2993; GFX11-NEXT: s_cmp_ge_u32 s11, s52994; GFX11-NEXT: s_cselect_b32 s14, -1, 02995; GFX11-NEXT: s_cmp_ge_u32 s13, s42996; GFX11-NEXT: s_cselect_b32 s13, -1, 02997; GFX11-NEXT: s_cmp_eq_u32 s11, s52998; GFX11-NEXT: s_cselect_b32 s11, s13, s142999; GFX11-NEXT: s_add_u32 s13, s7, 13000; GFX11-NEXT: s_addc_u32 s14, s8, 03001; GFX11-NEXT: s_add_u32 s15, s7, 23002; GFX11-NEXT: s_addc_u32 s16, s8, 03003; GFX11-NEXT: s_cmp_lg_u32 s11, 03004; GFX11-NEXT: s_cselect_b32 s11, s15, s133005; GFX11-NEXT: s_cselect_b32 s13, s16, s143006; GFX11-NEXT: s_cmp_lg_u32 s12, 03007; GFX11-NEXT: s_subb_u32 s3, s3, s93008; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3009; GFX11-NEXT: s_cmp_ge_u32 s3, s53010; GFX11-NEXT: s_cselect_b32 s9, -1, 03011; GFX11-NEXT: s_cmp_ge_u32 s10, s43012; GFX11-NEXT: s_cselect_b32 s10, -1, 03013; GFX11-NEXT: s_cmp_eq_u32 s3, s53014; GFX11-NEXT: s_cselect_b32 s3, s10, s93015; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3016; GFX11-NEXT: s_cmp_lg_u32 s3, 03017; GFX11-NEXT: s_cselect_b32 s9, s13, s83018; GFX11-NEXT: s_cselect_b32 s8, s11, s73019; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s63020; GFX11-NEXT: s_cbranch_vccnz .LBB16_33021; GFX11-NEXT: .LBB16_2:3022; GFX11-NEXT: v_cvt_f32_u32_e32 v0, s43023; GFX11-NEXT: s_sub_i32 s5, 0, s43024; GFX11-NEXT: s_mov_b32 s9, 03025; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)3026; GFX11-NEXT: v_rcp_iflag_f32_e32 v0, v03027; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3028; GFX11-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v03029; GFX11-NEXT: v_cvt_u32_f32_e32 v0, v03030; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)3031; GFX11-NEXT: v_readfirstlane_b32 s3, v03032; GFX11-NEXT: s_mul_i32 s5, s5, s33033; GFX11-NEXT: s_mul_hi_u32 s5, s3, s53034; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)3035; GFX11-NEXT: s_add_i32 s3, s3, s53036; GFX11-NEXT: s_mul_hi_u32 s3, s2, s33037; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)3038; GFX11-NEXT: s_mul_i32 s5, s3, s43039; GFX11-NEXT: s_sub_i32 s2, s2, s53040; GFX11-NEXT: s_add_i32 s5, s3, 13041; GFX11-NEXT: s_sub_i32 s6, s2, s43042; GFX11-NEXT: s_cmp_ge_u32 s2, s43043; GFX11-NEXT: s_cselect_b32 s3, s5, s33044; GFX11-NEXT: s_cselect_b32 s2, s6, s23045; GFX11-NEXT: s_add_i32 s5, s3, 13046; GFX11-NEXT: s_cmp_ge_u32 s2, s43047; GFX11-NEXT: s_cselect_b32 s8, s5, s33048; GFX11-NEXT: .LBB16_3:3049; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3050; GFX11-NEXT: v_mov_b32_e32 v0, s83051; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s93052; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]3053; GFX11-NEXT: s_endpgm3054; GFX11-NEXT: .LBB16_4:3055; GFX11-NEXT: ; implicit-def: $sgpr8_sgpr93056; GFX11-NEXT: s_branch .LBB16_23057;3058; GFX1250-LABEL: sudiv64:3059; GFX1250: ; %bb.0:3060; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13061; GFX1250-NEXT: s_clause 0x13062; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x243063; GFX1250-NEXT: s_load_b64 s[6:7], s[4:5], 0x343064; GFX1250-NEXT: s_wait_kmcnt 0x03065; GFX1250-NEXT: s_or_b64 s[4:5], s[2:3], s[6:7]3066; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3067; GFX1250-NEXT: s_and_b64 s[4:5], s[4:5], 0xffffffff000000003068; GFX1250-NEXT: s_cbranch_scc0 .LBB16_43069; GFX1250-NEXT: ; %bb.1:3070; GFX1250-NEXT: s_cvt_f32_u32 s4, s63071; GFX1250-NEXT: s_cvt_f32_u32 s5, s73072; GFX1250-NEXT: s_sub_nc_u64 s[10:11], 0, s[6:7]3073; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_2) | instskip(NEXT) | instid1(SALU_CYCLE_3)3074; GFX1250-NEXT: s_fmac_f32 s4, s5, 0x4f8000003075; GFX1250-NEXT: v_s_rcp_f32 s4, s43076; GFX1250-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_3)3077; GFX1250-NEXT: s_mul_f32 s4, s4, 0x5f7ffffc3078; GFX1250-NEXT: s_mul_f32 s5, s4, 0x2f8000003079; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)3080; GFX1250-NEXT: s_trunc_f32 s5, s53081; GFX1250-NEXT: s_fmac_f32 s4, s5, 0xcf8000003082; GFX1250-NEXT: s_cvt_u32_f32 s9, s53083; GFX1250-NEXT: s_mov_b32 s5, 03084; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_3)3085; GFX1250-NEXT: s_cvt_u32_f32 s8, s43086; GFX1250-NEXT: s_mul_u64 s[12:13], s[10:11], s[8:9]3087; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3088; GFX1250-NEXT: s_mul_hi_u32 s15, s8, s133089; GFX1250-NEXT: s_mul_i32 s14, s8, s133090; GFX1250-NEXT: s_mul_hi_u32 s4, s8, s123091; GFX1250-NEXT: s_mul_i32 s17, s9, s123092; GFX1250-NEXT: s_add_nc_u64 s[14:15], s[4:5], s[14:15]3093; GFX1250-NEXT: s_mul_hi_u32 s16, s9, s123094; GFX1250-NEXT: s_mul_hi_u32 s18, s9, s133095; GFX1250-NEXT: s_add_co_u32 s4, s14, s173096; GFX1250-NEXT: s_add_co_ci_u32 s4, s15, s163097; GFX1250-NEXT: s_mul_i32 s12, s9, s133098; GFX1250-NEXT: s_add_co_ci_u32 s13, s18, 03099; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)3100; GFX1250-NEXT: s_add_nc_u64 s[12:13], s[4:5], s[12:13]3101; GFX1250-NEXT: s_add_co_u32 s8, s8, s123102; GFX1250-NEXT: s_add_co_ci_u32 s9, s9, s133103; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)3104; GFX1250-NEXT: s_mul_u64 s[10:11], s[10:11], s[8:9]3105; GFX1250-NEXT: s_mul_hi_u32 s13, s8, s113106; GFX1250-NEXT: s_mul_i32 s12, s8, s113107; GFX1250-NEXT: s_mul_hi_u32 s4, s8, s103108; GFX1250-NEXT: s_mul_i32 s15, s9, s103109; GFX1250-NEXT: s_add_nc_u64 s[12:13], s[4:5], s[12:13]3110; GFX1250-NEXT: s_mul_hi_u32 s14, s9, s103111; GFX1250-NEXT: s_mul_hi_u32 s16, s9, s113112; GFX1250-NEXT: s_add_co_u32 s4, s12, s153113; GFX1250-NEXT: s_add_co_ci_u32 s4, s13, s143114; GFX1250-NEXT: s_mul_i32 s10, s9, s113115; GFX1250-NEXT: s_add_co_ci_u32 s11, s16, 03116; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)3117; GFX1250-NEXT: s_add_nc_u64 s[10:11], s[4:5], s[10:11]3118; GFX1250-NEXT: s_add_co_u32 s8, s8, s103119; GFX1250-NEXT: s_add_co_ci_u32 s10, s9, s113120; GFX1250-NEXT: s_mul_hi_u32 s4, s2, s83121; GFX1250-NEXT: s_mul_hi_u32 s11, s3, s83122; GFX1250-NEXT: s_mul_i32 s12, s3, s83123; GFX1250-NEXT: s_mul_hi_u32 s9, s2, s103124; GFX1250-NEXT: s_mul_i32 s8, s2, s103125; GFX1250-NEXT: s_mul_hi_u32 s13, s3, s103126; GFX1250-NEXT: s_add_nc_u64 s[8:9], s[4:5], s[8:9]3127; GFX1250-NEXT: s_mul_i32 s10, s3, s103128; GFX1250-NEXT: s_add_co_u32 s4, s8, s123129; GFX1250-NEXT: s_add_co_ci_u32 s4, s9, s113130; GFX1250-NEXT: s_add_co_ci_u32 s11, s13, 03131; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)3132; GFX1250-NEXT: s_add_nc_u64 s[8:9], s[4:5], s[10:11]3133; GFX1250-NEXT: s_and_b64 s[10:11], s[8:9], 0xffffffff000000003134; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)3135; GFX1250-NEXT: s_or_b32 s10, s10, s83136; GFX1250-NEXT: s_mul_u64 s[8:9], s[6:7], s[10:11]3137; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3138; GFX1250-NEXT: s_sub_co_u32 s4, s2, s83139; GFX1250-NEXT: s_cselect_b32 s8, -1, 03140; GFX1250-NEXT: s_sub_co_i32 s12, s3, s93141; GFX1250-NEXT: s_cmp_lg_u32 s8, 03142; GFX1250-NEXT: s_sub_co_ci_u32 s12, s12, s73143; GFX1250-NEXT: s_sub_co_u32 s13, s4, s63144; GFX1250-NEXT: s_sub_co_ci_u32 s12, s12, 03145; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3146; GFX1250-NEXT: s_cmp_ge_u32 s12, s73147; GFX1250-NEXT: s_cselect_b32 s14, -1, 03148; GFX1250-NEXT: s_cmp_ge_u32 s13, s63149; GFX1250-NEXT: s_cselect_b32 s15, -1, 03150; GFX1250-NEXT: s_cmp_eq_u32 s12, s73151; GFX1250-NEXT: s_add_nc_u64 s[12:13], s[10:11], 13152; GFX1250-NEXT: s_cselect_b32 s16, s15, s143153; GFX1250-NEXT: s_add_nc_u64 s[14:15], s[10:11], 23154; GFX1250-NEXT: s_cmp_lg_u32 s16, 03155; GFX1250-NEXT: s_cselect_b32 s12, s14, s123156; GFX1250-NEXT: s_cselect_b32 s13, s15, s133157; GFX1250-NEXT: s_cmp_lg_u32 s8, 03158; GFX1250-NEXT: s_sub_co_ci_u32 s3, s3, s93159; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3160; GFX1250-NEXT: s_cmp_ge_u32 s3, s73161; GFX1250-NEXT: s_cselect_b32 s8, -1, 03162; GFX1250-NEXT: s_cmp_ge_u32 s4, s63163; GFX1250-NEXT: s_cselect_b32 s4, -1, 03164; GFX1250-NEXT: s_cmp_eq_u32 s3, s73165; GFX1250-NEXT: s_cselect_b32 s3, s4, s83166; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3167; GFX1250-NEXT: s_cmp_lg_u32 s3, 03168; GFX1250-NEXT: s_cselect_b32 s9, s13, s113169; GFX1250-NEXT: s_cselect_b32 s8, s12, s103170; GFX1250-NEXT: s_cbranch_execnz .LBB16_33171; GFX1250-NEXT: .LBB16_2:3172; GFX1250-NEXT: v_cvt_f32_u32_e32 v0, s63173; GFX1250-NEXT: s_sub_co_i32 s4, 0, s63174; GFX1250-NEXT: s_mov_b32 s9, 03175; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(TRANS32_DEP_1)3176; GFX1250-NEXT: v_rcp_iflag_f32_e32 v0, v03177; GFX1250-NEXT: v_nop3178; GFX1250-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v03179; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3180; GFX1250-NEXT: v_cvt_u32_f32_e32 v0, v03181; GFX1250-NEXT: v_readfirstlane_b32 s3, v03182; GFX1250-NEXT: s_mul_i32 s4, s4, s33183; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)3184; GFX1250-NEXT: s_mul_hi_u32 s4, s3, s43185; GFX1250-NEXT: s_add_co_i32 s3, s3, s43186; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)3187; GFX1250-NEXT: s_mul_hi_u32 s3, s2, s33188; GFX1250-NEXT: s_mul_i32 s4, s3, s63189; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3190; GFX1250-NEXT: s_sub_co_i32 s2, s2, s43191; GFX1250-NEXT: s_add_co_i32 s4, s3, 13192; GFX1250-NEXT: s_sub_co_i32 s5, s2, s63193; GFX1250-NEXT: s_cmp_ge_u32 s2, s63194; GFX1250-NEXT: s_cselect_b32 s3, s4, s33195; GFX1250-NEXT: s_cselect_b32 s2, s5, s23196; GFX1250-NEXT: s_add_co_i32 s4, s3, 13197; GFX1250-NEXT: s_cmp_ge_u32 s2, s63198; GFX1250-NEXT: s_cselect_b32 s8, s4, s33199; GFX1250-NEXT: .LBB16_3:3200; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3201; GFX1250-NEXT: v_mov_b64_e32 v[0:1], s[8:9]3202; GFX1250-NEXT: v_mov_b32_e32 v2, 03203; GFX1250-NEXT: global_store_b64 v2, v[0:1], s[0:1]3204; GFX1250-NEXT: s_endpgm3205; GFX1250-NEXT: .LBB16_4:3206; GFX1250-NEXT: ; implicit-def: $sgpr8_sgpr93207; GFX1250-NEXT: s_branch .LBB16_23208 %result = udiv i64 %x, %y3209 store i64 %result, ptr addrspace(1) %out3210 ret void3211}3212 3213 3214 3215declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #13216 3217declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #13218 3219declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #13220 3221declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #13222 3223declare i32 @llvm.amdgcn.workitem.id.x() #13224 3225attributes #0 = { nounwind }3226attributes #1 = { nounwind readnone }3227 3228;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:3229; GCN-ISEL: {{.*}}3230